reload.c revision 96288
1/* Search an insn for pseudo regs that must be in hard regs and are not. 2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 3 1999, 2000, 2001, 2002 Free Software Foundation, Inc. 4 5This file is part of GCC. 6 7GCC is free software; you can redistribute it and/or modify it under 8the terms of the GNU General Public License as published by the Free 9Software Foundation; either version 2, or (at your option) any later 10version. 11 12GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13WARRANTY; without even the implied warranty of MERCHANTABILITY or 14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15for more details. 16 17You should have received a copy of the GNU General Public License 18along with GCC; see the file COPYING. If not, write to the Free 19Software Foundation, 59 Temple Place - Suite 330, Boston, MA 2002111-1307, USA. */ 21 22 23/* $FreeBSD: head/contrib/gcc/reload.c 96288 2002-05-09 22:08:26Z obrien $ */ 24 25 26/* This file contains subroutines used only from the file reload1.c. 27 It knows how to scan one insn for operands and values 28 that need to be copied into registers to make valid code. 29 It also finds other operands and values which are valid 30 but for which equivalent values in registers exist and 31 ought to be used instead. 32 33 Before processing the first insn of the function, call `init_reload'. 34 35 To scan an insn, call `find_reloads'. This does two things: 36 1. sets up tables describing which values must be reloaded 37 for this insn, and what kind of hard regs they must be reloaded into; 38 2. optionally record the locations where those values appear in 39 the data, so they can be replaced properly later. 40 This is done only if the second arg to `find_reloads' is nonzero. 41 42 The third arg to `find_reloads' specifies the number of levels 43 of indirect addressing supported by the machine. If it is zero, 44 indirect addressing is not valid. If it is one, (MEM (REG n)) 45 is valid even if (REG n) did not get a hard register; if it is two, 46 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a 47 hard register, and similarly for higher values. 48 49 Then you must choose the hard regs to reload those pseudo regs into, 50 and generate appropriate load insns before this insn and perhaps 51 also store insns after this insn. Set up the array `reload_reg_rtx' 52 to contain the REG rtx's for the registers you used. In some 53 cases `find_reloads' will return a nonzero value in `reload_reg_rtx' 54 for certain reloads. Then that tells you which register to use, 55 so you do not need to allocate one. But you still do need to add extra 56 instructions to copy the value into and out of that register. 57 58 Finally you must call `subst_reloads' to substitute the reload reg rtx's 59 into the locations already recorded. 60 61NOTE SIDE EFFECTS: 62 63 find_reloads can alter the operands of the instruction it is called on. 64 65 1. Two operands of any sort may be interchanged, if they are in a 66 commutative instruction. 67 This happens only if find_reloads thinks the instruction will compile 68 better that way. 69 70 2. Pseudo-registers that are equivalent to constants are replaced 71 with those constants if they are not in hard registers. 72 731 happens every time find_reloads is called. 742 happens only when REPLACE is 1, which is only when 75actually doing the reloads, not when just counting them. 76 77Using a reload register for several reloads in one insn: 78 79When an insn has reloads, it is considered as having three parts: 80the input reloads, the insn itself after reloading, and the output reloads. 81Reloads of values used in memory addresses are often needed for only one part. 82 83When this is so, reload_when_needed records which part needs the reload. 84Two reloads for different parts of the insn can share the same reload 85register. 86 87When a reload is used for addresses in multiple parts, or when it is 88an ordinary operand, it is classified as RELOAD_OTHER, and cannot share 89a register with any other reload. */ 90 91#define REG_OK_STRICT 92 93#include "config.h" 94#include "system.h" 95#include "rtl.h" 96#include "tm_p.h" 97#include "insn-config.h" 98#include "expr.h" 99#include "optabs.h" 100#include "recog.h" 101#include "reload.h" 102#include "regs.h" 103#include "hard-reg-set.h" 104#include "flags.h" 105#include "real.h" 106#include "output.h" 107#include "function.h" 108#include "toplev.h" 109 110#ifndef REGISTER_MOVE_COST 111#define REGISTER_MOVE_COST(m, x, y) 2 112#endif 113 114#ifndef REGNO_MODE_OK_FOR_BASE_P 115#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO) 116#endif 117 118#ifndef REG_MODE_OK_FOR_BASE_P 119#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO) 120#endif 121 122/* All reloads of the current insn are recorded here. See reload.h for 123 comments. */ 124int n_reloads; 125struct reload rld[MAX_RELOADS]; 126 127/* All the "earlyclobber" operands of the current insn 128 are recorded here. */ 129int n_earlyclobbers; 130rtx reload_earlyclobbers[MAX_RECOG_OPERANDS]; 131 132int reload_n_operands; 133 134/* Replacing reloads. 135 136 If `replace_reloads' is nonzero, then as each reload is recorded 137 an entry is made for it in the table `replacements'. 138 Then later `subst_reloads' can look through that table and 139 perform all the replacements needed. */ 140 141/* Nonzero means record the places to replace. */ 142static int replace_reloads; 143 144/* Each replacement is recorded with a structure like this. */ 145struct replacement 146{ 147 rtx *where; /* Location to store in */ 148 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside 149 a SUBREG; 0 otherwise. */ 150 int what; /* which reload this is for */ 151 enum machine_mode mode; /* mode it must have */ 152}; 153 154static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)]; 155 156/* Number of replacements currently recorded. */ 157static int n_replacements; 158 159/* Used to track what is modified by an operand. */ 160struct decomposition 161{ 162 int reg_flag; /* Nonzero if referencing a register. */ 163 int safe; /* Nonzero if this can't conflict with anything. */ 164 rtx base; /* Base address for MEM. */ 165 HOST_WIDE_INT start; /* Starting offset or register number. */ 166 HOST_WIDE_INT end; /* Ending offset or register number. */ 167}; 168 169#ifdef SECONDARY_MEMORY_NEEDED 170 171/* Save MEMs needed to copy from one class of registers to another. One MEM 172 is used per mode, but normally only one or two modes are ever used. 173 174 We keep two versions, before and after register elimination. The one 175 after register elimination is record separately for each operand. This 176 is done in case the address is not valid to be sure that we separately 177 reload each. */ 178 179static rtx secondary_memlocs[NUM_MACHINE_MODES]; 180static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS]; 181#endif 182 183/* The instruction we are doing reloads for; 184 so we can test whether a register dies in it. */ 185static rtx this_insn; 186 187/* Nonzero if this instruction is a user-specified asm with operands. */ 188static int this_insn_is_asm; 189 190/* If hard_regs_live_known is nonzero, 191 we can tell which hard regs are currently live, 192 at least enough to succeed in choosing dummy reloads. */ 193static int hard_regs_live_known; 194 195/* Indexed by hard reg number, 196 element is nonnegative if hard reg has been spilled. 197 This vector is passed to `find_reloads' as an argument 198 and is not changed here. */ 199static short *static_reload_reg_p; 200 201/* Set to 1 in subst_reg_equivs if it changes anything. */ 202static int subst_reg_equivs_changed; 203 204/* On return from push_reload, holds the reload-number for the OUT 205 operand, which can be different for that from the input operand. */ 206static int output_reloadnum; 207 208 /* Compare two RTX's. */ 209#define MATCHES(x, y) \ 210 (x == y || (x != 0 && (GET_CODE (x) == REG \ 211 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \ 212 : rtx_equal_p (x, y) && ! side_effects_p (x)))) 213 214 /* Indicates if two reloads purposes are for similar enough things that we 215 can merge their reloads. */ 216#define MERGABLE_RELOADS(when1, when2, op1, op2) \ 217 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \ 218 || ((when1) == (when2) && (op1) == (op2)) \ 219 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \ 220 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \ 221 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \ 222 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \ 223 && (when2) == RELOAD_FOR_OTHER_ADDRESS)) 224 225 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */ 226#define MERGE_TO_OTHER(when1, when2, op1, op2) \ 227 ((when1) != (when2) \ 228 || ! ((op1) == (op2) \ 229 || (when1) == RELOAD_FOR_INPUT \ 230 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \ 231 || (when1) == RELOAD_FOR_OTHER_ADDRESS)) 232 233 /* If we are going to reload an address, compute the reload type to 234 use. */ 235#define ADDR_TYPE(type) \ 236 ((type) == RELOAD_FOR_INPUT_ADDRESS \ 237 ? RELOAD_FOR_INPADDR_ADDRESS \ 238 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \ 239 ? RELOAD_FOR_OUTADDR_ADDRESS \ 240 : (type))) 241 242#ifdef HAVE_SECONDARY_RELOADS 243static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class, 244 enum machine_mode, enum reload_type, 245 enum insn_code *)); 246#endif 247static enum reg_class find_valid_class PARAMS ((enum machine_mode, int)); 248static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode)); 249static void push_replacement PARAMS ((rtx *, int, enum machine_mode)); 250static void combine_reloads PARAMS ((void)); 251static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class, 252 enum reload_type, int, int)); 253static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *, 254 enum machine_mode, enum machine_mode, 255 enum reg_class, int, int)); 256static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx)); 257static struct decomposition decompose PARAMS ((rtx)); 258static int immune_p PARAMS ((rtx, rtx, struct decomposition)); 259static int alternative_allows_memconst PARAMS ((const char *, int)); 260static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int, 261 int, rtx, int *)); 262static rtx make_memloc PARAMS ((rtx, int)); 263static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *, 264 int, enum reload_type, int, rtx)); 265static rtx subst_reg_equivs PARAMS ((rtx, rtx)); 266static rtx subst_indexed_address PARAMS ((rtx)); 267static void update_auto_inc_notes PARAMS ((rtx, int, int)); 268static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *, 269 int, enum reload_type,int, rtx)); 270static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class, 271 enum machine_mode, int, 272 enum reload_type, int)); 273static rtx find_reloads_subreg_address PARAMS ((rtx, int, int, 274 enum reload_type, int, rtx)); 275static void copy_replacements_1 PARAMS ((rtx *, rtx *, int)); 276static int find_inc_amount PARAMS ((rtx, rtx)); 277 278#ifdef HAVE_SECONDARY_RELOADS 279 280/* Determine if any secondary reloads are needed for loading (if IN_P is 281 non-zero) or storing (if IN_P is zero) X to or from a reload register of 282 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads 283 are needed, push them. 284 285 Return the reload number of the secondary reload we made, or -1 if 286 we didn't need one. *PICODE is set to the insn_code to use if we do 287 need a secondary reload. */ 288 289static int 290push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode, 291 type, picode) 292 int in_p; 293 rtx x; 294 int opnum; 295 int optional; 296 enum reg_class reload_class; 297 enum machine_mode reload_mode; 298 enum reload_type type; 299 enum insn_code *picode; 300{ 301 enum reg_class class = NO_REGS; 302 enum machine_mode mode = reload_mode; 303 enum insn_code icode = CODE_FOR_nothing; 304 enum reg_class t_class = NO_REGS; 305 enum machine_mode t_mode = VOIDmode; 306 enum insn_code t_icode = CODE_FOR_nothing; 307 enum reload_type secondary_type; 308 int s_reload, t_reload = -1; 309 310 if (type == RELOAD_FOR_INPUT_ADDRESS 311 || type == RELOAD_FOR_OUTPUT_ADDRESS 312 || type == RELOAD_FOR_INPADDR_ADDRESS 313 || type == RELOAD_FOR_OUTADDR_ADDRESS) 314 secondary_type = type; 315 else 316 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS; 317 318 *picode = CODE_FOR_nothing; 319 320 /* If X is a paradoxical SUBREG, use the inner value to determine both the 321 mode and object being reloaded. */ 322 if (GET_CODE (x) == SUBREG 323 && (GET_MODE_SIZE (GET_MODE (x)) 324 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))) 325 { 326 x = SUBREG_REG (x); 327 reload_mode = GET_MODE (x); 328 } 329 330 /* If X is a pseudo-register that has an equivalent MEM (actually, if it 331 is still a pseudo-register by now, it *must* have an equivalent MEM 332 but we don't want to assume that), use that equivalent when seeing if 333 a secondary reload is needed since whether or not a reload is needed 334 might be sensitive to the form of the MEM. */ 335 336 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER 337 && reg_equiv_mem[REGNO (x)] != 0) 338 x = reg_equiv_mem[REGNO (x)]; 339 340#ifdef SECONDARY_INPUT_RELOAD_CLASS 341 if (in_p) 342 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x); 343#endif 344 345#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 346 if (! in_p) 347 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x); 348#endif 349 350 /* If we don't need any secondary registers, done. */ 351 if (class == NO_REGS) 352 return -1; 353 354 /* Get a possible insn to use. If the predicate doesn't accept X, don't 355 use the insn. */ 356 357 icode = (in_p ? reload_in_optab[(int) reload_mode] 358 : reload_out_optab[(int) reload_mode]); 359 360 if (icode != CODE_FOR_nothing 361 && insn_data[(int) icode].operand[in_p].predicate 362 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode))) 363 icode = CODE_FOR_nothing; 364 365 /* If we will be using an insn, see if it can directly handle the reload 366 register we will be using. If it can, the secondary reload is for a 367 scratch register. If it can't, we will use the secondary reload for 368 an intermediate register and require a tertiary reload for the scratch 369 register. */ 370 371 if (icode != CODE_FOR_nothing) 372 { 373 /* If IN_P is non-zero, the reload register will be the output in 374 operand 0. If IN_P is zero, the reload register will be the input 375 in operand 1. Outputs should have an initial "=", which we must 376 skip. */ 377 378 enum reg_class insn_class; 379 380 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0) 381 insn_class = ALL_REGS; 382 else 383 { 384 char insn_letter 385 = insn_data[(int) icode].operand[!in_p].constraint[in_p]; 386 insn_class 387 = (insn_letter == 'r' ? GENERAL_REGS 388 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter)); 389 390 if (insn_class == NO_REGS) 391 abort (); 392 if (in_p 393 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=') 394 abort (); 395 } 396 397 /* The scratch register's constraint must start with "=&". */ 398 if (insn_data[(int) icode].operand[2].constraint[0] != '=' 399 || insn_data[(int) icode].operand[2].constraint[1] != '&') 400 abort (); 401 402 if (reg_class_subset_p (reload_class, insn_class)) 403 mode = insn_data[(int) icode].operand[2].mode; 404 else 405 { 406 char t_letter = insn_data[(int) icode].operand[2].constraint[2]; 407 class = insn_class; 408 t_mode = insn_data[(int) icode].operand[2].mode; 409 t_class = (t_letter == 'r' ? GENERAL_REGS 410 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter)); 411 t_icode = icode; 412 icode = CODE_FOR_nothing; 413 } 414 } 415 416 /* This case isn't valid, so fail. Reload is allowed to use the same 417 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but 418 in the case of a secondary register, we actually need two different 419 registers for correct code. We fail here to prevent the possibility of 420 silently generating incorrect code later. 421 422 The convention is that secondary input reloads are valid only if the 423 secondary_class is different from class. If you have such a case, you 424 can not use secondary reloads, you must work around the problem some 425 other way. 426 427 Allow this when a reload_in/out pattern is being used. I.e. assume 428 that the generated code handles this case. */ 429 430 if (in_p && class == reload_class && icode == CODE_FOR_nothing 431 && t_icode == CODE_FOR_nothing) 432 abort (); 433 434 /* If we need a tertiary reload, see if we have one we can reuse or else 435 make a new one. */ 436 437 if (t_class != NO_REGS) 438 { 439 for (t_reload = 0; t_reload < n_reloads; t_reload++) 440 if (rld[t_reload].secondary_p 441 && (reg_class_subset_p (t_class, rld[t_reload].class) 442 || reg_class_subset_p (rld[t_reload].class, t_class)) 443 && ((in_p && rld[t_reload].inmode == t_mode) 444 || (! in_p && rld[t_reload].outmode == t_mode)) 445 && ((in_p && (rld[t_reload].secondary_in_icode 446 == CODE_FOR_nothing)) 447 || (! in_p &&(rld[t_reload].secondary_out_icode 448 == CODE_FOR_nothing))) 449 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES) 450 && MERGABLE_RELOADS (secondary_type, 451 rld[t_reload].when_needed, 452 opnum, rld[t_reload].opnum)) 453 { 454 if (in_p) 455 rld[t_reload].inmode = t_mode; 456 if (! in_p) 457 rld[t_reload].outmode = t_mode; 458 459 if (reg_class_subset_p (t_class, rld[t_reload].class)) 460 rld[t_reload].class = t_class; 461 462 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum); 463 rld[t_reload].optional &= optional; 464 rld[t_reload].secondary_p = 1; 465 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed, 466 opnum, rld[t_reload].opnum)) 467 rld[t_reload].when_needed = RELOAD_OTHER; 468 } 469 470 if (t_reload == n_reloads) 471 { 472 /* We need to make a new tertiary reload for this register class. */ 473 rld[t_reload].in = rld[t_reload].out = 0; 474 rld[t_reload].class = t_class; 475 rld[t_reload].inmode = in_p ? t_mode : VOIDmode; 476 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode; 477 rld[t_reload].reg_rtx = 0; 478 rld[t_reload].optional = optional; 479 rld[t_reload].inc = 0; 480 /* Maybe we could combine these, but it seems too tricky. */ 481 rld[t_reload].nocombine = 1; 482 rld[t_reload].in_reg = 0; 483 rld[t_reload].out_reg = 0; 484 rld[t_reload].opnum = opnum; 485 rld[t_reload].when_needed = secondary_type; 486 rld[t_reload].secondary_in_reload = -1; 487 rld[t_reload].secondary_out_reload = -1; 488 rld[t_reload].secondary_in_icode = CODE_FOR_nothing; 489 rld[t_reload].secondary_out_icode = CODE_FOR_nothing; 490 rld[t_reload].secondary_p = 1; 491 492 n_reloads++; 493 } 494 } 495 496 /* See if we can reuse an existing secondary reload. */ 497 for (s_reload = 0; s_reload < n_reloads; s_reload++) 498 if (rld[s_reload].secondary_p 499 && (reg_class_subset_p (class, rld[s_reload].class) 500 || reg_class_subset_p (rld[s_reload].class, class)) 501 && ((in_p && rld[s_reload].inmode == mode) 502 || (! in_p && rld[s_reload].outmode == mode)) 503 && ((in_p && rld[s_reload].secondary_in_reload == t_reload) 504 || (! in_p && rld[s_reload].secondary_out_reload == t_reload)) 505 && ((in_p && rld[s_reload].secondary_in_icode == t_icode) 506 || (! in_p && rld[s_reload].secondary_out_icode == t_icode)) 507 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 508 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed, 509 opnum, rld[s_reload].opnum)) 510 { 511 if (in_p) 512 rld[s_reload].inmode = mode; 513 if (! in_p) 514 rld[s_reload].outmode = mode; 515 516 if (reg_class_subset_p (class, rld[s_reload].class)) 517 rld[s_reload].class = class; 518 519 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum); 520 rld[s_reload].optional &= optional; 521 rld[s_reload].secondary_p = 1; 522 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed, 523 opnum, rld[s_reload].opnum)) 524 rld[s_reload].when_needed = RELOAD_OTHER; 525 } 526 527 if (s_reload == n_reloads) 528 { 529#ifdef SECONDARY_MEMORY_NEEDED 530 /* If we need a memory location to copy between the two reload regs, 531 set it up now. Note that we do the input case before making 532 the reload and the output case after. This is due to the 533 way reloads are output. */ 534 535 if (in_p && icode == CODE_FOR_nothing 536 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode)) 537 { 538 get_secondary_mem (x, reload_mode, opnum, type); 539 540 /* We may have just added new reloads. Make sure we add 541 the new reload at the end. */ 542 s_reload = n_reloads; 543 } 544#endif 545 546 /* We need to make a new secondary reload for this register class. */ 547 rld[s_reload].in = rld[s_reload].out = 0; 548 rld[s_reload].class = class; 549 550 rld[s_reload].inmode = in_p ? mode : VOIDmode; 551 rld[s_reload].outmode = ! in_p ? mode : VOIDmode; 552 rld[s_reload].reg_rtx = 0; 553 rld[s_reload].optional = optional; 554 rld[s_reload].inc = 0; 555 /* Maybe we could combine these, but it seems too tricky. */ 556 rld[s_reload].nocombine = 1; 557 rld[s_reload].in_reg = 0; 558 rld[s_reload].out_reg = 0; 559 rld[s_reload].opnum = opnum; 560 rld[s_reload].when_needed = secondary_type; 561 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1; 562 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1; 563 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing; 564 rld[s_reload].secondary_out_icode 565 = ! in_p ? t_icode : CODE_FOR_nothing; 566 rld[s_reload].secondary_p = 1; 567 568 n_reloads++; 569 570#ifdef SECONDARY_MEMORY_NEEDED 571 if (! in_p && icode == CODE_FOR_nothing 572 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode)) 573 get_secondary_mem (x, mode, opnum, type); 574#endif 575 } 576 577 *picode = icode; 578 return s_reload; 579} 580#endif /* HAVE_SECONDARY_RELOADS */ 581 582#ifdef SECONDARY_MEMORY_NEEDED 583 584/* Return a memory location that will be used to copy X in mode MODE. 585 If we haven't already made a location for this mode in this insn, 586 call find_reloads_address on the location being returned. */ 587 588rtx 589get_secondary_mem (x, mode, opnum, type) 590 rtx x ATTRIBUTE_UNUSED; 591 enum machine_mode mode; 592 int opnum; 593 enum reload_type type; 594{ 595 rtx loc; 596 int mem_valid; 597 598 /* By default, if MODE is narrower than a word, widen it to a word. 599 This is required because most machines that require these memory 600 locations do not support short load and stores from all registers 601 (e.g., FP registers). */ 602 603#ifdef SECONDARY_MEMORY_NEEDED_MODE 604 mode = SECONDARY_MEMORY_NEEDED_MODE (mode); 605#else 606 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode)) 607 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0); 608#endif 609 610 /* If we already have made a MEM for this operand in MODE, return it. */ 611 if (secondary_memlocs_elim[(int) mode][opnum] != 0) 612 return secondary_memlocs_elim[(int) mode][opnum]; 613 614 /* If this is the first time we've tried to get a MEM for this mode, 615 allocate a new one. `something_changed' in reload will get set 616 by noticing that the frame size has changed. */ 617 618 if (secondary_memlocs[(int) mode] == 0) 619 { 620#ifdef SECONDARY_MEMORY_NEEDED_RTX 621 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode); 622#else 623 secondary_memlocs[(int) mode] 624 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0); 625#endif 626 } 627 628 /* Get a version of the address doing any eliminations needed. If that 629 didn't give us a new MEM, make a new one if it isn't valid. */ 630 631 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX); 632 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0)); 633 634 if (! mem_valid && loc == secondary_memlocs[(int) mode]) 635 loc = copy_rtx (loc); 636 637 /* The only time the call below will do anything is if the stack 638 offset is too large. In that case IND_LEVELS doesn't matter, so we 639 can just pass a zero. Adjust the type to be the address of the 640 corresponding object. If the address was valid, save the eliminated 641 address. If it wasn't valid, we need to make a reload each time, so 642 don't save it. */ 643 644 if (! mem_valid) 645 { 646 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS 647 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS 648 : RELOAD_OTHER); 649 650 find_reloads_address (mode, (rtx*) 0, XEXP (loc, 0), &XEXP (loc, 0), 651 opnum, type, 0, 0); 652 } 653 654 secondary_memlocs_elim[(int) mode][opnum] = loc; 655 return loc; 656} 657 658/* Clear any secondary memory locations we've made. */ 659 660void 661clear_secondary_mem () 662{ 663 memset ((char *) secondary_memlocs, 0, sizeof secondary_memlocs); 664} 665#endif /* SECONDARY_MEMORY_NEEDED */ 666 667/* Find the largest class for which every register number plus N is valid in 668 M1 (if in range). Abort if no such class exists. */ 669 670static enum reg_class 671find_valid_class (m1, n) 672 enum machine_mode m1 ATTRIBUTE_UNUSED; 673 int n; 674{ 675 int class; 676 int regno; 677 enum reg_class best_class = NO_REGS; 678 unsigned int best_size = 0; 679 680 for (class = 1; class < N_REG_CLASSES; class++) 681 { 682 int bad = 0; 683 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++) 684 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno) 685 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n) 686 && ! HARD_REGNO_MODE_OK (regno + n, m1)) 687 bad = 1; 688 689 if (! bad && reg_class_size[class] > best_size) 690 best_class = class, best_size = reg_class_size[class]; 691 } 692 693 if (best_size == 0) 694 abort (); 695 696 return best_class; 697} 698 699/* Return the number of a previously made reload that can be combined with 700 a new one, or n_reloads if none of the existing reloads can be used. 701 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to 702 push_reload, they determine the kind of the new reload that we try to 703 combine. P_IN points to the corresponding value of IN, which can be 704 modified by this function. 705 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */ 706 707static int 708find_reusable_reload (p_in, out, class, type, opnum, dont_share) 709 rtx *p_in, out; 710 enum reg_class class; 711 enum reload_type type; 712 int opnum, dont_share; 713{ 714 rtx in = *p_in; 715 int i; 716 /* We can't merge two reloads if the output of either one is 717 earlyclobbered. */ 718 719 if (earlyclobber_operand_p (out)) 720 return n_reloads; 721 722 /* We can use an existing reload if the class is right 723 and at least one of IN and OUT is a match 724 and the other is at worst neutral. 725 (A zero compared against anything is neutral.) 726 727 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are 728 for the same thing since that can cause us to need more reload registers 729 than we otherwise would. */ 730 731 for (i = 0; i < n_reloads; i++) 732 if ((reg_class_subset_p (class, rld[i].class) 733 || reg_class_subset_p (rld[i].class, class)) 734 /* If the existing reload has a register, it must fit our class. */ 735 && (rld[i].reg_rtx == 0 736 || TEST_HARD_REG_BIT (reg_class_contents[(int) class], 737 true_regnum (rld[i].reg_rtx))) 738 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share 739 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out))) 740 || (out != 0 && MATCHES (rld[i].out, out) 741 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in)))) 742 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out)) 743 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 744 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum)) 745 return i; 746 747 /* Reloading a plain reg for input can match a reload to postincrement 748 that reg, since the postincrement's value is the right value. 749 Likewise, it can match a preincrement reload, since we regard 750 the preincrementation as happening before any ref in this insn 751 to that register. */ 752 for (i = 0; i < n_reloads; i++) 753 if ((reg_class_subset_p (class, rld[i].class) 754 || reg_class_subset_p (rld[i].class, class)) 755 /* If the existing reload has a register, it must fit our 756 class. */ 757 && (rld[i].reg_rtx == 0 758 || TEST_HARD_REG_BIT (reg_class_contents[(int) class], 759 true_regnum (rld[i].reg_rtx))) 760 && out == 0 && rld[i].out == 0 && rld[i].in != 0 761 && ((GET_CODE (in) == REG 762 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a' 763 && MATCHES (XEXP (rld[i].in, 0), in)) 764 || (GET_CODE (rld[i].in) == REG 765 && GET_RTX_CLASS (GET_CODE (in)) == 'a' 766 && MATCHES (XEXP (in, 0), rld[i].in))) 767 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out)) 768 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 769 && MERGABLE_RELOADS (type, rld[i].when_needed, 770 opnum, rld[i].opnum)) 771 { 772 /* Make sure reload_in ultimately has the increment, 773 not the plain register. */ 774 if (GET_CODE (in) == REG) 775 *p_in = rld[i].in; 776 return i; 777 } 778 return n_reloads; 779} 780 781/* Return nonzero if X is a SUBREG which will require reloading of its 782 SUBREG_REG expression. */ 783 784static int 785reload_inner_reg_of_subreg (x, mode) 786 rtx x; 787 enum machine_mode mode; 788{ 789 rtx inner; 790 791 /* Only SUBREGs are problematical. */ 792 if (GET_CODE (x) != SUBREG) 793 return 0; 794 795 inner = SUBREG_REG (x); 796 797 /* If INNER is a constant or PLUS, then INNER must be reloaded. */ 798 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS) 799 return 1; 800 801 /* If INNER is not a hard register, then INNER will not need to 802 be reloaded. */ 803 if (GET_CODE (inner) != REG 804 || REGNO (inner) >= FIRST_PSEUDO_REGISTER) 805 return 0; 806 807 /* If INNER is not ok for MODE, then INNER will need reloading. */ 808 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode)) 809 return 1; 810 811 /* If the outer part is a word or smaller, INNER larger than a 812 word and the number of regs for INNER is not the same as the 813 number of words in INNER, then INNER will need reloading. */ 814 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD 815 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD 816 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD) 817 != HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner)))); 818} 819 820/* Record one reload that needs to be performed. 821 IN is an rtx saying where the data are to be found before this instruction. 822 OUT says where they must be stored after the instruction. 823 (IN is zero for data not read, and OUT is zero for data not written.) 824 INLOC and OUTLOC point to the places in the instructions where 825 IN and OUT were found. 826 If IN and OUT are both non-zero, it means the same register must be used 827 to reload both IN and OUT. 828 829 CLASS is a register class required for the reloaded data. 830 INMODE is the machine mode that the instruction requires 831 for the reg that replaces IN and OUTMODE is likewise for OUT. 832 833 If IN is zero, then OUT's location and mode should be passed as 834 INLOC and INMODE. 835 836 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx. 837 838 OPTIONAL nonzero means this reload does not need to be performed: 839 it can be discarded if that is more convenient. 840 841 OPNUM and TYPE say what the purpose of this reload is. 842 843 The return value is the reload-number for this reload. 844 845 If both IN and OUT are nonzero, in some rare cases we might 846 want to make two separate reloads. (Actually we never do this now.) 847 Therefore, the reload-number for OUT is stored in 848 output_reloadnum when we return; the return value applies to IN. 849 Usually (presently always), when IN and OUT are nonzero, 850 the two reload-numbers are equal, but the caller should be careful to 851 distinguish them. */ 852 853int 854push_reload (in, out, inloc, outloc, class, 855 inmode, outmode, strict_low, optional, opnum, type) 856 rtx in, out; 857 rtx *inloc, *outloc; 858 enum reg_class class; 859 enum machine_mode inmode, outmode; 860 int strict_low; 861 int optional; 862 int opnum; 863 enum reload_type type; 864{ 865 int i; 866 int dont_share = 0; 867 int dont_remove_subreg = 0; 868 rtx *in_subreg_loc = 0, *out_subreg_loc = 0; 869 int secondary_in_reload = -1, secondary_out_reload = -1; 870 enum insn_code secondary_in_icode = CODE_FOR_nothing; 871 enum insn_code secondary_out_icode = CODE_FOR_nothing; 872 873 /* INMODE and/or OUTMODE could be VOIDmode if no mode 874 has been specified for the operand. In that case, 875 use the operand's mode as the mode to reload. */ 876 if (inmode == VOIDmode && in != 0) 877 inmode = GET_MODE (in); 878 if (outmode == VOIDmode && out != 0) 879 outmode = GET_MODE (out); 880 881 /* If IN is a pseudo register everywhere-equivalent to a constant, and 882 it is not in a hard register, reload straight from the constant, 883 since we want to get rid of such pseudo registers. 884 Often this is done earlier, but not always in find_reloads_address. */ 885 if (in != 0 && GET_CODE (in) == REG) 886 { 887 int regno = REGNO (in); 888 889 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 890 && reg_equiv_constant[regno] != 0) 891 in = reg_equiv_constant[regno]; 892 } 893 894 /* Likewise for OUT. Of course, OUT will never be equivalent to 895 an actual constant, but it might be equivalent to a memory location 896 (in the case of a parameter). */ 897 if (out != 0 && GET_CODE (out) == REG) 898 { 899 int regno = REGNO (out); 900 901 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 902 && reg_equiv_constant[regno] != 0) 903 out = reg_equiv_constant[regno]; 904 } 905 906 /* If we have a read-write operand with an address side-effect, 907 change either IN or OUT so the side-effect happens only once. */ 908 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out)) 909 switch (GET_CODE (XEXP (in, 0))) 910 { 911 case POST_INC: case POST_DEC: case POST_MODIFY: 912 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0)); 913 break; 914 915 case PRE_INC: case PRE_DEC: case PRE_MODIFY: 916 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0)); 917 break; 918 919 default: 920 break; 921 } 922 923 /* If we are reloading a (SUBREG constant ...), really reload just the 924 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)). 925 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still 926 a pseudo and hence will become a MEM) with M1 wider than M2 and the 927 register is a pseudo, also reload the inside expression. 928 For machines that extend byte loads, do this for any SUBREG of a pseudo 929 where both M1 and M2 are a word or smaller, M1 is wider than M2, and 930 M2 is an integral mode that gets extended when loaded. 931 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 932 either M1 is not valid for R or M2 is wider than a word but we only 933 need one word to store an M2-sized quantity in R. 934 (However, if OUT is nonzero, we need to reload the reg *and* 935 the subreg, so do nothing here, and let following statement handle it.) 936 937 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere; 938 we can't handle it here because CONST_INT does not indicate a mode. 939 940 Similarly, we must reload the inside expression if we have a 941 STRICT_LOW_PART (presumably, in == out in the cas). 942 943 Also reload the inner expression if it does not require a secondary 944 reload but the SUBREG does. 945 946 Finally, reload the inner expression if it is a register that is in 947 the class whose registers cannot be referenced in a different size 948 and M1 is not the same size as M2. If subreg_lowpart_p is false, we 949 cannot reload just the inside since we might end up with the wrong 950 register class. But if it is inside a STRICT_LOW_PART, we have 951 no choice, so we hope we do get the right register class there. */ 952 953 if (in != 0 && GET_CODE (in) == SUBREG 954 && (subreg_lowpart_p (in) || strict_low) 955#ifdef CLASS_CANNOT_CHANGE_MODE 956 && (class != CLASS_CANNOT_CHANGE_MODE 957 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)), inmode)) 958#endif 959 && (CONSTANT_P (SUBREG_REG (in)) 960 || GET_CODE (SUBREG_REG (in)) == PLUS 961 || strict_low 962 || (((GET_CODE (SUBREG_REG (in)) == REG 963 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER) 964 || GET_CODE (SUBREG_REG (in)) == MEM) 965 && ((GET_MODE_SIZE (inmode) 966 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 967#ifdef LOAD_EXTEND_OP 968 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 969 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 970 <= UNITS_PER_WORD) 971 && (GET_MODE_SIZE (inmode) 972 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 973 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in))) 974 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL) 975#endif 976#ifdef WORD_REGISTER_OPERATIONS 977 || ((GET_MODE_SIZE (inmode) 978 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 979 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD == 980 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1) 981 / UNITS_PER_WORD))) 982#endif 983 )) 984 || (GET_CODE (SUBREG_REG (in)) == REG 985 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 986 /* The case where out is nonzero 987 is handled differently in the following statement. */ 988 && (out == 0 || subreg_lowpart_p (in)) 989 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 990 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 991 > UNITS_PER_WORD) 992 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 993 / UNITS_PER_WORD) 994 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)), 995 GET_MODE (SUBREG_REG (in))))) 996 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode))) 997#ifdef SECONDARY_INPUT_RELOAD_CLASS 998 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS 999 && (SECONDARY_INPUT_RELOAD_CLASS (class, 1000 GET_MODE (SUBREG_REG (in)), 1001 SUBREG_REG (in)) 1002 == NO_REGS)) 1003#endif 1004#ifdef CLASS_CANNOT_CHANGE_MODE 1005 || (GET_CODE (SUBREG_REG (in)) == REG 1006 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1007 && (TEST_HARD_REG_BIT 1008 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE], 1009 REGNO (SUBREG_REG (in)))) 1010 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)), 1011 inmode)) 1012#endif 1013 )) 1014 { 1015 in_subreg_loc = inloc; 1016 inloc = &SUBREG_REG (in); 1017 in = *inloc; 1018#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS) 1019 if (GET_CODE (in) == MEM) 1020 /* This is supposed to happen only for paradoxical subregs made by 1021 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */ 1022 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode)) 1023 abort (); 1024#endif 1025 inmode = GET_MODE (in); 1026 } 1027 1028 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1029 either M1 is not valid for R or M2 is wider than a word but we only 1030 need one word to store an M2-sized quantity in R. 1031 1032 However, we must reload the inner reg *as well as* the subreg in 1033 that case. */ 1034 1035 /* Similar issue for (SUBREG constant ...) if it was not handled by the 1036 code above. This can happen if SUBREG_BYTE != 0. */ 1037 1038 if (in != 0 && reload_inner_reg_of_subreg (in, inmode)) 1039 { 1040 enum reg_class in_class = class; 1041 1042 if (GET_CODE (SUBREG_REG (in)) == REG) 1043 in_class 1044 = find_valid_class (inmode, 1045 subreg_regno_offset (REGNO (SUBREG_REG (in)), 1046 GET_MODE (SUBREG_REG (in)), 1047 SUBREG_BYTE (in), 1048 GET_MODE (in))); 1049 1050 /* This relies on the fact that emit_reload_insns outputs the 1051 instructions for input reloads of type RELOAD_OTHER in the same 1052 order as the reloads. Thus if the outer reload is also of type 1053 RELOAD_OTHER, we are guaranteed that this inner reload will be 1054 output before the outer reload. */ 1055 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0, 1056 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type); 1057 dont_remove_subreg = 1; 1058 } 1059 1060 /* Similarly for paradoxical and problematical SUBREGs on the output. 1061 Note that there is no reason we need worry about the previous value 1062 of SUBREG_REG (out); even if wider than out, 1063 storing in a subreg is entitled to clobber it all 1064 (except in the case of STRICT_LOW_PART, 1065 and in that case the constraint should label it input-output.) */ 1066 if (out != 0 && GET_CODE (out) == SUBREG 1067 && (subreg_lowpart_p (out) || strict_low) 1068#ifdef CLASS_CANNOT_CHANGE_MODE 1069 && (class != CLASS_CANNOT_CHANGE_MODE 1070 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)), 1071 outmode)) 1072#endif 1073 && (CONSTANT_P (SUBREG_REG (out)) 1074 || strict_low 1075 || (((GET_CODE (SUBREG_REG (out)) == REG 1076 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER) 1077 || GET_CODE (SUBREG_REG (out)) == MEM) 1078 && ((GET_MODE_SIZE (outmode) 1079 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) 1080#ifdef WORD_REGISTER_OPERATIONS 1081 || ((GET_MODE_SIZE (outmode) 1082 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) 1083 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD == 1084 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1) 1085 / UNITS_PER_WORD))) 1086#endif 1087 )) 1088 || (GET_CODE (SUBREG_REG (out)) == REG 1089 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1090 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD 1091 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1092 > UNITS_PER_WORD) 1093 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1094 / UNITS_PER_WORD) 1095 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)), 1096 GET_MODE (SUBREG_REG (out))))) 1097 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode))) 1098#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 1099 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS 1100 && (SECONDARY_OUTPUT_RELOAD_CLASS (class, 1101 GET_MODE (SUBREG_REG (out)), 1102 SUBREG_REG (out)) 1103 == NO_REGS)) 1104#endif 1105#ifdef CLASS_CANNOT_CHANGE_MODE 1106 || (GET_CODE (SUBREG_REG (out)) == REG 1107 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1108 && (TEST_HARD_REG_BIT 1109 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE], 1110 REGNO (SUBREG_REG (out)))) 1111 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)), 1112 outmode)) 1113#endif 1114 )) 1115 { 1116 out_subreg_loc = outloc; 1117 outloc = &SUBREG_REG (out); 1118 out = *outloc; 1119#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS) 1120 if (GET_CODE (out) == MEM 1121 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode)) 1122 abort (); 1123#endif 1124 outmode = GET_MODE (out); 1125 } 1126 1127 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1128 either M1 is not valid for R or M2 is wider than a word but we only 1129 need one word to store an M2-sized quantity in R. 1130 1131 However, we must reload the inner reg *as well as* the subreg in 1132 that case. In this case, the inner reg is an in-out reload. */ 1133 1134 if (out != 0 && reload_inner_reg_of_subreg (out, outmode)) 1135 { 1136 /* This relies on the fact that emit_reload_insns outputs the 1137 instructions for output reloads of type RELOAD_OTHER in reverse 1138 order of the reloads. Thus if the outer reload is also of type 1139 RELOAD_OTHER, we are guaranteed that this inner reload will be 1140 output after the outer reload. */ 1141 dont_remove_subreg = 1; 1142 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out), 1143 &SUBREG_REG (out), 1144 find_valid_class (outmode, 1145 subreg_regno_offset (REGNO (SUBREG_REG (out)), 1146 GET_MODE (SUBREG_REG (out)), 1147 SUBREG_BYTE (out), 1148 GET_MODE (out))), 1149 VOIDmode, VOIDmode, 0, 0, 1150 opnum, RELOAD_OTHER); 1151 } 1152 1153 /* If IN appears in OUT, we can't share any input-only reload for IN. */ 1154 if (in != 0 && out != 0 && GET_CODE (out) == MEM 1155 && (GET_CODE (in) == REG || GET_CODE (in) == MEM) 1156 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0))) 1157 dont_share = 1; 1158 1159 /* If IN is a SUBREG of a hard register, make a new REG. This 1160 simplifies some of the cases below. */ 1161 1162 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG 1163 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1164 && ! dont_remove_subreg) 1165 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in)); 1166 1167 /* Similarly for OUT. */ 1168 if (out != 0 && GET_CODE (out) == SUBREG 1169 && GET_CODE (SUBREG_REG (out)) == REG 1170 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1171 && ! dont_remove_subreg) 1172 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out)); 1173 1174 /* Narrow down the class of register wanted if that is 1175 desirable on this machine for efficiency. */ 1176 if (in != 0) 1177 class = PREFERRED_RELOAD_CLASS (in, class); 1178 1179 /* Output reloads may need analogous treatment, different in detail. */ 1180#ifdef PREFERRED_OUTPUT_RELOAD_CLASS 1181 if (out != 0) 1182 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class); 1183#endif 1184 1185 /* Make sure we use a class that can handle the actual pseudo 1186 inside any subreg. For example, on the 386, QImode regs 1187 can appear within SImode subregs. Although GENERAL_REGS 1188 can handle SImode, QImode needs a smaller class. */ 1189#ifdef LIMIT_RELOAD_CLASS 1190 if (in_subreg_loc) 1191 class = LIMIT_RELOAD_CLASS (inmode, class); 1192 else if (in != 0 && GET_CODE (in) == SUBREG) 1193 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class); 1194 1195 if (out_subreg_loc) 1196 class = LIMIT_RELOAD_CLASS (outmode, class); 1197 if (out != 0 && GET_CODE (out) == SUBREG) 1198 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class); 1199#endif 1200 1201 /* Verify that this class is at least possible for the mode that 1202 is specified. */ 1203 if (this_insn_is_asm) 1204 { 1205 enum machine_mode mode; 1206 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode)) 1207 mode = inmode; 1208 else 1209 mode = outmode; 1210 if (mode == VOIDmode) 1211 { 1212 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'"); 1213 mode = word_mode; 1214 if (in != 0) 1215 inmode = word_mode; 1216 if (out != 0) 1217 outmode = word_mode; 1218 } 1219 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1220 if (HARD_REGNO_MODE_OK (i, mode) 1221 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i)) 1222 { 1223 int nregs = HARD_REGNO_NREGS (i, mode); 1224 1225 int j; 1226 for (j = 1; j < nregs; j++) 1227 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j)) 1228 break; 1229 if (j == nregs) 1230 break; 1231 } 1232 if (i == FIRST_PSEUDO_REGISTER) 1233 { 1234 error_for_asm (this_insn, "impossible register constraint in `asm'"); 1235 class = ALL_REGS; 1236 } 1237 } 1238 1239 /* Optional output reloads are always OK even if we have no register class, 1240 since the function of these reloads is only to have spill_reg_store etc. 1241 set, so that the storing insn can be deleted later. */ 1242 if (class == NO_REGS 1243 && (optional == 0 || type != RELOAD_FOR_OUTPUT)) 1244 abort (); 1245 1246 i = find_reusable_reload (&in, out, class, type, opnum, dont_share); 1247 1248 if (i == n_reloads) 1249 { 1250 /* See if we need a secondary reload register to move between CLASS 1251 and IN or CLASS and OUT. Get the icode and push any required reloads 1252 needed for each of them if so. */ 1253 1254#ifdef SECONDARY_INPUT_RELOAD_CLASS 1255 if (in != 0) 1256 secondary_in_reload 1257 = push_secondary_reload (1, in, opnum, optional, class, inmode, type, 1258 &secondary_in_icode); 1259#endif 1260 1261#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 1262 if (out != 0 && GET_CODE (out) != SCRATCH) 1263 secondary_out_reload 1264 = push_secondary_reload (0, out, opnum, optional, class, outmode, 1265 type, &secondary_out_icode); 1266#endif 1267 1268 /* We found no existing reload suitable for re-use. 1269 So add an additional reload. */ 1270 1271#ifdef SECONDARY_MEMORY_NEEDED 1272 /* If a memory location is needed for the copy, make one. */ 1273 if (in != 0 && GET_CODE (in) == REG 1274 && REGNO (in) < FIRST_PSEUDO_REGISTER 1275 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)), 1276 class, inmode)) 1277 get_secondary_mem (in, inmode, opnum, type); 1278#endif 1279 1280 i = n_reloads; 1281 rld[i].in = in; 1282 rld[i].out = out; 1283 rld[i].class = class; 1284 rld[i].inmode = inmode; 1285 rld[i].outmode = outmode; 1286 rld[i].reg_rtx = 0; 1287 rld[i].optional = optional; 1288 rld[i].inc = 0; 1289 rld[i].nocombine = 0; 1290 rld[i].in_reg = inloc ? *inloc : 0; 1291 rld[i].out_reg = outloc ? *outloc : 0; 1292 rld[i].opnum = opnum; 1293 rld[i].when_needed = type; 1294 rld[i].secondary_in_reload = secondary_in_reload; 1295 rld[i].secondary_out_reload = secondary_out_reload; 1296 rld[i].secondary_in_icode = secondary_in_icode; 1297 rld[i].secondary_out_icode = secondary_out_icode; 1298 rld[i].secondary_p = 0; 1299 1300 n_reloads++; 1301 1302#ifdef SECONDARY_MEMORY_NEEDED 1303 if (out != 0 && GET_CODE (out) == REG 1304 && REGNO (out) < FIRST_PSEUDO_REGISTER 1305 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)), 1306 outmode)) 1307 get_secondary_mem (out, outmode, opnum, type); 1308#endif 1309 } 1310 else 1311 { 1312 /* We are reusing an existing reload, 1313 but we may have additional information for it. 1314 For example, we may now have both IN and OUT 1315 while the old one may have just one of them. */ 1316 1317 /* The modes can be different. If they are, we want to reload in 1318 the larger mode, so that the value is valid for both modes. */ 1319 if (inmode != VOIDmode 1320 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode)) 1321 rld[i].inmode = inmode; 1322 if (outmode != VOIDmode 1323 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode)) 1324 rld[i].outmode = outmode; 1325 if (in != 0) 1326 { 1327 rtx in_reg = inloc ? *inloc : 0; 1328 /* If we merge reloads for two distinct rtl expressions that 1329 are identical in content, there might be duplicate address 1330 reloads. Remove the extra set now, so that if we later find 1331 that we can inherit this reload, we can get rid of the 1332 address reloads altogether. 1333 1334 Do not do this if both reloads are optional since the result 1335 would be an optional reload which could potentially leave 1336 unresolved address replacements. 1337 1338 It is not sufficient to call transfer_replacements since 1339 choose_reload_regs will remove the replacements for address 1340 reloads of inherited reloads which results in the same 1341 problem. */ 1342 if (rld[i].in != in && rtx_equal_p (in, rld[i].in) 1343 && ! (rld[i].optional && optional)) 1344 { 1345 /* We must keep the address reload with the lower operand 1346 number alive. */ 1347 if (opnum > rld[i].opnum) 1348 { 1349 remove_address_replacements (in); 1350 in = rld[i].in; 1351 in_reg = rld[i].in_reg; 1352 } 1353 else 1354 remove_address_replacements (rld[i].in); 1355 } 1356 rld[i].in = in; 1357 rld[i].in_reg = in_reg; 1358 } 1359 if (out != 0) 1360 { 1361 rld[i].out = out; 1362 rld[i].out_reg = outloc ? *outloc : 0; 1363 } 1364 if (reg_class_subset_p (class, rld[i].class)) 1365 rld[i].class = class; 1366 rld[i].optional &= optional; 1367 if (MERGE_TO_OTHER (type, rld[i].when_needed, 1368 opnum, rld[i].opnum)) 1369 rld[i].when_needed = RELOAD_OTHER; 1370 rld[i].opnum = MIN (rld[i].opnum, opnum); 1371 } 1372 1373 /* If the ostensible rtx being reloaded differs from the rtx found 1374 in the location to substitute, this reload is not safe to combine 1375 because we cannot reliably tell whether it appears in the insn. */ 1376 1377 if (in != 0 && in != *inloc) 1378 rld[i].nocombine = 1; 1379 1380#if 0 1381 /* This was replaced by changes in find_reloads_address_1 and the new 1382 function inc_for_reload, which go with a new meaning of reload_inc. */ 1383 1384 /* If this is an IN/OUT reload in an insn that sets the CC, 1385 it must be for an autoincrement. It doesn't work to store 1386 the incremented value after the insn because that would clobber the CC. 1387 So we must do the increment of the value reloaded from, 1388 increment it, store it back, then decrement again. */ 1389 if (out != 0 && sets_cc0_p (PATTERN (this_insn))) 1390 { 1391 out = 0; 1392 rld[i].out = 0; 1393 rld[i].inc = find_inc_amount (PATTERN (this_insn), in); 1394 /* If we did not find a nonzero amount-to-increment-by, 1395 that contradicts the belief that IN is being incremented 1396 in an address in this insn. */ 1397 if (rld[i].inc == 0) 1398 abort (); 1399 } 1400#endif 1401 1402 /* If we will replace IN and OUT with the reload-reg, 1403 record where they are located so that substitution need 1404 not do a tree walk. */ 1405 1406 if (replace_reloads) 1407 { 1408 if (inloc != 0) 1409 { 1410 struct replacement *r = &replacements[n_replacements++]; 1411 r->what = i; 1412 r->subreg_loc = in_subreg_loc; 1413 r->where = inloc; 1414 r->mode = inmode; 1415 } 1416 if (outloc != 0 && outloc != inloc) 1417 { 1418 struct replacement *r = &replacements[n_replacements++]; 1419 r->what = i; 1420 r->where = outloc; 1421 r->subreg_loc = out_subreg_loc; 1422 r->mode = outmode; 1423 } 1424 } 1425 1426 /* If this reload is just being introduced and it has both 1427 an incoming quantity and an outgoing quantity that are 1428 supposed to be made to match, see if either one of the two 1429 can serve as the place to reload into. 1430 1431 If one of them is acceptable, set rld[i].reg_rtx 1432 to that one. */ 1433 1434 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0) 1435 { 1436 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc, 1437 inmode, outmode, 1438 rld[i].class, i, 1439 earlyclobber_operand_p (out)); 1440 1441 /* If the outgoing register already contains the same value 1442 as the incoming one, we can dispense with loading it. 1443 The easiest way to tell the caller that is to give a phony 1444 value for the incoming operand (same as outgoing one). */ 1445 if (rld[i].reg_rtx == out 1446 && (GET_CODE (in) == REG || CONSTANT_P (in)) 1447 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out), 1448 static_reload_reg_p, i, inmode)) 1449 rld[i].in = out; 1450 } 1451 1452 /* If this is an input reload and the operand contains a register that 1453 dies in this insn and is used nowhere else, see if it is the right class 1454 to be used for this reload. Use it if so. (This occurs most commonly 1455 in the case of paradoxical SUBREGs and in-out reloads). We cannot do 1456 this if it is also an output reload that mentions the register unless 1457 the output is a SUBREG that clobbers an entire register. 1458 1459 Note that the operand might be one of the spill regs, if it is a 1460 pseudo reg and we are in a block where spilling has not taken place. 1461 But if there is no spilling in this block, that is OK. 1462 An explicitly used hard reg cannot be a spill reg. */ 1463 1464 if (rld[i].reg_rtx == 0 && in != 0) 1465 { 1466 rtx note; 1467 int regno; 1468 enum machine_mode rel_mode = inmode; 1469 1470 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode)) 1471 rel_mode = outmode; 1472 1473 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) 1474 if (REG_NOTE_KIND (note) == REG_DEAD 1475 && GET_CODE (XEXP (note, 0)) == REG 1476 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER 1477 && reg_mentioned_p (XEXP (note, 0), in) 1478 && ! refers_to_regno_for_reload_p (regno, 1479 (regno 1480 + HARD_REGNO_NREGS (regno, 1481 rel_mode)), 1482 PATTERN (this_insn), inloc) 1483 /* If this is also an output reload, IN cannot be used as 1484 the reload register if it is set in this insn unless IN 1485 is also OUT. */ 1486 && (out == 0 || in == out 1487 || ! hard_reg_set_here_p (regno, 1488 (regno 1489 + HARD_REGNO_NREGS (regno, 1490 rel_mode)), 1491 PATTERN (this_insn))) 1492 /* ??? Why is this code so different from the previous? 1493 Is there any simple coherent way to describe the two together? 1494 What's going on here. */ 1495 && (in != out 1496 || (GET_CODE (in) == SUBREG 1497 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1)) 1498 / UNITS_PER_WORD) 1499 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1500 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))) 1501 /* Make sure the operand fits in the reg that dies. */ 1502 && (GET_MODE_SIZE (rel_mode) 1503 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))) 1504 && HARD_REGNO_MODE_OK (regno, inmode) 1505 && HARD_REGNO_MODE_OK (regno, outmode)) 1506 { 1507 unsigned int offs; 1508 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode), 1509 HARD_REGNO_NREGS (regno, outmode)); 1510 1511 for (offs = 0; offs < nregs; offs++) 1512 if (fixed_regs[regno + offs] 1513 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1514 regno + offs)) 1515 break; 1516 1517 if (offs == nregs) 1518 { 1519 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno); 1520 break; 1521 } 1522 } 1523 } 1524 1525 if (out) 1526 output_reloadnum = i; 1527 1528 return i; 1529} 1530 1531/* Record an additional place we must replace a value 1532 for which we have already recorded a reload. 1533 RELOADNUM is the value returned by push_reload 1534 when the reload was recorded. 1535 This is used in insn patterns that use match_dup. */ 1536 1537static void 1538push_replacement (loc, reloadnum, mode) 1539 rtx *loc; 1540 int reloadnum; 1541 enum machine_mode mode; 1542{ 1543 if (replace_reloads) 1544 { 1545 struct replacement *r = &replacements[n_replacements++]; 1546 r->what = reloadnum; 1547 r->where = loc; 1548 r->subreg_loc = 0; 1549 r->mode = mode; 1550 } 1551} 1552 1553/* Transfer all replacements that used to be in reload FROM to be in 1554 reload TO. */ 1555 1556void 1557transfer_replacements (to, from) 1558 int to, from; 1559{ 1560 int i; 1561 1562 for (i = 0; i < n_replacements; i++) 1563 if (replacements[i].what == from) 1564 replacements[i].what = to; 1565} 1566 1567/* IN_RTX is the value loaded by a reload that we now decided to inherit, 1568 or a subpart of it. If we have any replacements registered for IN_RTX, 1569 cancel the reloads that were supposed to load them. 1570 Return non-zero if we canceled any reloads. */ 1571int 1572remove_address_replacements (in_rtx) 1573 rtx in_rtx; 1574{ 1575 int i, j; 1576 char reload_flags[MAX_RELOADS]; 1577 int something_changed = 0; 1578 1579 memset (reload_flags, 0, sizeof reload_flags); 1580 for (i = 0, j = 0; i < n_replacements; i++) 1581 { 1582 if (loc_mentioned_in_p (replacements[i].where, in_rtx)) 1583 reload_flags[replacements[i].what] |= 1; 1584 else 1585 { 1586 replacements[j++] = replacements[i]; 1587 reload_flags[replacements[i].what] |= 2; 1588 } 1589 } 1590 /* Note that the following store must be done before the recursive calls. */ 1591 n_replacements = j; 1592 1593 for (i = n_reloads - 1; i >= 0; i--) 1594 { 1595 if (reload_flags[i] == 1) 1596 { 1597 deallocate_reload_reg (i); 1598 remove_address_replacements (rld[i].in); 1599 rld[i].in = 0; 1600 something_changed = 1; 1601 } 1602 } 1603 return something_changed; 1604} 1605 1606/* If there is only one output reload, and it is not for an earlyclobber 1607 operand, try to combine it with a (logically unrelated) input reload 1608 to reduce the number of reload registers needed. 1609 1610 This is safe if the input reload does not appear in 1611 the value being output-reloaded, because this implies 1612 it is not needed any more once the original insn completes. 1613 1614 If that doesn't work, see we can use any of the registers that 1615 die in this insn as a reload register. We can if it is of the right 1616 class and does not appear in the value being output-reloaded. */ 1617 1618static void 1619combine_reloads () 1620{ 1621 int i; 1622 int output_reload = -1; 1623 int secondary_out = -1; 1624 rtx note; 1625 1626 /* Find the output reload; return unless there is exactly one 1627 and that one is mandatory. */ 1628 1629 for (i = 0; i < n_reloads; i++) 1630 if (rld[i].out != 0) 1631 { 1632 if (output_reload >= 0) 1633 return; 1634 output_reload = i; 1635 } 1636 1637 if (output_reload < 0 || rld[output_reload].optional) 1638 return; 1639 1640 /* An input-output reload isn't combinable. */ 1641 1642 if (rld[output_reload].in != 0) 1643 return; 1644 1645 /* If this reload is for an earlyclobber operand, we can't do anything. */ 1646 if (earlyclobber_operand_p (rld[output_reload].out)) 1647 return; 1648 1649 /* If there is a reload for part of the address of this operand, we would 1650 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend 1651 its life to the point where doing this combine would not lower the 1652 number of spill registers needed. */ 1653 for (i = 0; i < n_reloads; i++) 1654 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 1655 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 1656 && rld[i].opnum == rld[output_reload].opnum) 1657 return; 1658 1659 /* Check each input reload; can we combine it? */ 1660 1661 for (i = 0; i < n_reloads; i++) 1662 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine 1663 /* Life span of this reload must not extend past main insn. */ 1664 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS 1665 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS 1666 && rld[i].when_needed != RELOAD_OTHER 1667 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode) 1668 == CLASS_MAX_NREGS (rld[output_reload].class, 1669 rld[output_reload].outmode)) 1670 && rld[i].inc == 0 1671 && rld[i].reg_rtx == 0 1672#ifdef SECONDARY_MEMORY_NEEDED 1673 /* Don't combine two reloads with different secondary 1674 memory locations. */ 1675 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0 1676 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0 1677 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum], 1678 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum])) 1679#endif 1680 && (SMALL_REGISTER_CLASSES 1681 ? (rld[i].class == rld[output_reload].class) 1682 : (reg_class_subset_p (rld[i].class, 1683 rld[output_reload].class) 1684 || reg_class_subset_p (rld[output_reload].class, 1685 rld[i].class))) 1686 && (MATCHES (rld[i].in, rld[output_reload].out) 1687 /* Args reversed because the first arg seems to be 1688 the one that we imagine being modified 1689 while the second is the one that might be affected. */ 1690 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out, 1691 rld[i].in) 1692 /* However, if the input is a register that appears inside 1693 the output, then we also can't share. 1694 Imagine (set (mem (reg 69)) (plus (reg 69) ...)). 1695 If the same reload reg is used for both reg 69 and the 1696 result to be stored in memory, then that result 1697 will clobber the address of the memory ref. */ 1698 && ! (GET_CODE (rld[i].in) == REG 1699 && reg_overlap_mentioned_for_reload_p (rld[i].in, 1700 rld[output_reload].out)))) 1701 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode) 1702 && (reg_class_size[(int) rld[i].class] 1703 || SMALL_REGISTER_CLASSES) 1704 /* We will allow making things slightly worse by combining an 1705 input and an output, but no worse than that. */ 1706 && (rld[i].when_needed == RELOAD_FOR_INPUT 1707 || rld[i].when_needed == RELOAD_FOR_OUTPUT)) 1708 { 1709 int j; 1710 1711 /* We have found a reload to combine with! */ 1712 rld[i].out = rld[output_reload].out; 1713 rld[i].out_reg = rld[output_reload].out_reg; 1714 rld[i].outmode = rld[output_reload].outmode; 1715 /* Mark the old output reload as inoperative. */ 1716 rld[output_reload].out = 0; 1717 /* The combined reload is needed for the entire insn. */ 1718 rld[i].when_needed = RELOAD_OTHER; 1719 /* If the output reload had a secondary reload, copy it. */ 1720 if (rld[output_reload].secondary_out_reload != -1) 1721 { 1722 rld[i].secondary_out_reload 1723 = rld[output_reload].secondary_out_reload; 1724 rld[i].secondary_out_icode 1725 = rld[output_reload].secondary_out_icode; 1726 } 1727 1728#ifdef SECONDARY_MEMORY_NEEDED 1729 /* Copy any secondary MEM. */ 1730 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0) 1731 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] 1732 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]; 1733#endif 1734 /* If required, minimize the register class. */ 1735 if (reg_class_subset_p (rld[output_reload].class, 1736 rld[i].class)) 1737 rld[i].class = rld[output_reload].class; 1738 1739 /* Transfer all replacements from the old reload to the combined. */ 1740 for (j = 0; j < n_replacements; j++) 1741 if (replacements[j].what == output_reload) 1742 replacements[j].what = i; 1743 1744 return; 1745 } 1746 1747 /* If this insn has only one operand that is modified or written (assumed 1748 to be the first), it must be the one corresponding to this reload. It 1749 is safe to use anything that dies in this insn for that output provided 1750 that it does not occur in the output (we already know it isn't an 1751 earlyclobber. If this is an asm insn, give up. */ 1752 1753 if (INSN_CODE (this_insn) == -1) 1754 return; 1755 1756 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++) 1757 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '=' 1758 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+') 1759 return; 1760 1761 /* See if some hard register that dies in this insn and is not used in 1762 the output is the right class. Only works if the register we pick 1763 up can fully hold our output reload. */ 1764 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) 1765 if (REG_NOTE_KIND (note) == REG_DEAD 1766 && GET_CODE (XEXP (note, 0)) == REG 1767 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0), 1768 rld[output_reload].out) 1769 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER 1770 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode) 1771 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class], 1772 REGNO (XEXP (note, 0))) 1773 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode) 1774 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0)))) 1775 /* Ensure that a secondary or tertiary reload for this output 1776 won't want this register. */ 1777 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1 1778 || (! (TEST_HARD_REG_BIT 1779 (reg_class_contents[(int) rld[secondary_out].class], 1780 REGNO (XEXP (note, 0)))) 1781 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1 1782 || ! (TEST_HARD_REG_BIT 1783 (reg_class_contents[(int) rld[secondary_out].class], 1784 REGNO (XEXP (note, 0))))))) 1785 && ! fixed_regs[REGNO (XEXP (note, 0))]) 1786 { 1787 rld[output_reload].reg_rtx 1788 = gen_rtx_REG (rld[output_reload].outmode, 1789 REGNO (XEXP (note, 0))); 1790 return; 1791 } 1792} 1793 1794/* Try to find a reload register for an in-out reload (expressions IN and OUT). 1795 See if one of IN and OUT is a register that may be used; 1796 this is desirable since a spill-register won't be needed. 1797 If so, return the register rtx that proves acceptable. 1798 1799 INLOC and OUTLOC are locations where IN and OUT appear in the insn. 1800 CLASS is the register class required for the reload. 1801 1802 If FOR_REAL is >= 0, it is the number of the reload, 1803 and in some cases when it can be discovered that OUT doesn't need 1804 to be computed, clear out rld[FOR_REAL].out. 1805 1806 If FOR_REAL is -1, this should not be done, because this call 1807 is just to see if a register can be found, not to find and install it. 1808 1809 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This 1810 puts an additional constraint on being able to use IN for OUT since 1811 IN must not appear elsewhere in the insn (it is assumed that IN itself 1812 is safe from the earlyclobber). */ 1813 1814static rtx 1815find_dummy_reload (real_in, real_out, inloc, outloc, 1816 inmode, outmode, class, for_real, earlyclobber) 1817 rtx real_in, real_out; 1818 rtx *inloc, *outloc; 1819 enum machine_mode inmode, outmode; 1820 enum reg_class class; 1821 int for_real; 1822 int earlyclobber; 1823{ 1824 rtx in = real_in; 1825 rtx out = real_out; 1826 int in_offset = 0; 1827 int out_offset = 0; 1828 rtx value = 0; 1829 1830 /* If operands exceed a word, we can't use either of them 1831 unless they have the same size. */ 1832 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode) 1833 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD 1834 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD)) 1835 return 0; 1836 1837 /* Note that {in,out}_offset are needed only when 'in' or 'out' 1838 respectively refers to a hard register. */ 1839 1840 /* Find the inside of any subregs. */ 1841 while (GET_CODE (out) == SUBREG) 1842 { 1843 if (GET_CODE (SUBREG_REG (out)) == REG 1844 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER) 1845 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)), 1846 GET_MODE (SUBREG_REG (out)), 1847 SUBREG_BYTE (out), 1848 GET_MODE (out)); 1849 out = SUBREG_REG (out); 1850 } 1851 while (GET_CODE (in) == SUBREG) 1852 { 1853 if (GET_CODE (SUBREG_REG (in)) == REG 1854 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER) 1855 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)), 1856 GET_MODE (SUBREG_REG (in)), 1857 SUBREG_BYTE (in), 1858 GET_MODE (in)); 1859 in = SUBREG_REG (in); 1860 } 1861 1862 /* Narrow down the reg class, the same way push_reload will; 1863 otherwise we might find a dummy now, but push_reload won't. */ 1864 class = PREFERRED_RELOAD_CLASS (in, class); 1865 1866 /* See if OUT will do. */ 1867 if (GET_CODE (out) == REG 1868 && REGNO (out) < FIRST_PSEUDO_REGISTER) 1869 { 1870 unsigned int regno = REGNO (out) + out_offset; 1871 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode); 1872 rtx saved_rtx; 1873 1874 /* When we consider whether the insn uses OUT, 1875 ignore references within IN. They don't prevent us 1876 from copying IN into OUT, because those refs would 1877 move into the insn that reloads IN. 1878 1879 However, we only ignore IN in its role as this reload. 1880 If the insn uses IN elsewhere and it contains OUT, 1881 that counts. We can't be sure it's the "same" operand 1882 so it might not go through this reload. */ 1883 saved_rtx = *inloc; 1884 *inloc = const0_rtx; 1885 1886 if (regno < FIRST_PSEUDO_REGISTER 1887 && HARD_REGNO_MODE_OK (regno, outmode) 1888 && ! refers_to_regno_for_reload_p (regno, regno + nwords, 1889 PATTERN (this_insn), outloc)) 1890 { 1891 unsigned int i; 1892 1893 for (i = 0; i < nwords; i++) 1894 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1895 regno + i)) 1896 break; 1897 1898 if (i == nwords) 1899 { 1900 if (GET_CODE (real_out) == REG) 1901 value = real_out; 1902 else 1903 value = gen_rtx_REG (outmode, regno); 1904 } 1905 } 1906 1907 *inloc = saved_rtx; 1908 } 1909 1910 /* Consider using IN if OUT was not acceptable 1911 or if OUT dies in this insn (like the quotient in a divmod insn). 1912 We can't use IN unless it is dies in this insn, 1913 which means we must know accurately which hard regs are live. 1914 Also, the result can't go in IN if IN is used within OUT, 1915 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */ 1916 if (hard_regs_live_known 1917 && GET_CODE (in) == REG 1918 && REGNO (in) < FIRST_PSEUDO_REGISTER 1919 && (value == 0 1920 || find_reg_note (this_insn, REG_UNUSED, real_out)) 1921 && find_reg_note (this_insn, REG_DEAD, real_in) 1922 && !fixed_regs[REGNO (in)] 1923 && HARD_REGNO_MODE_OK (REGNO (in), 1924 /* The only case where out and real_out might 1925 have different modes is where real_out 1926 is a subreg, and in that case, out 1927 has a real mode. */ 1928 (GET_MODE (out) != VOIDmode 1929 ? GET_MODE (out) : outmode))) 1930 { 1931 unsigned int regno = REGNO (in) + in_offset; 1932 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode); 1933 1934 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0) 1935 && ! hard_reg_set_here_p (regno, regno + nwords, 1936 PATTERN (this_insn)) 1937 && (! earlyclobber 1938 || ! refers_to_regno_for_reload_p (regno, regno + nwords, 1939 PATTERN (this_insn), inloc))) 1940 { 1941 unsigned int i; 1942 1943 for (i = 0; i < nwords; i++) 1944 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1945 regno + i)) 1946 break; 1947 1948 if (i == nwords) 1949 { 1950 /* If we were going to use OUT as the reload reg 1951 and changed our mind, it means OUT is a dummy that 1952 dies here. So don't bother copying value to it. */ 1953 if (for_real >= 0 && value == real_out) 1954 rld[for_real].out = 0; 1955 if (GET_CODE (real_in) == REG) 1956 value = real_in; 1957 else 1958 value = gen_rtx_REG (inmode, regno); 1959 } 1960 } 1961 } 1962 1963 return value; 1964} 1965 1966/* This page contains subroutines used mainly for determining 1967 whether the IN or an OUT of a reload can serve as the 1968 reload register. */ 1969 1970/* Return 1 if X is an operand of an insn that is being earlyclobbered. */ 1971 1972int 1973earlyclobber_operand_p (x) 1974 rtx x; 1975{ 1976 int i; 1977 1978 for (i = 0; i < n_earlyclobbers; i++) 1979 if (reload_earlyclobbers[i] == x) 1980 return 1; 1981 1982 return 0; 1983} 1984 1985/* Return 1 if expression X alters a hard reg in the range 1986 from BEG_REGNO (inclusive) to END_REGNO (exclusive), 1987 either explicitly or in the guise of a pseudo-reg allocated to REGNO. 1988 X should be the body of an instruction. */ 1989 1990static int 1991hard_reg_set_here_p (beg_regno, end_regno, x) 1992 unsigned int beg_regno, end_regno; 1993 rtx x; 1994{ 1995 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER) 1996 { 1997 rtx op0 = SET_DEST (x); 1998 1999 while (GET_CODE (op0) == SUBREG) 2000 op0 = SUBREG_REG (op0); 2001 if (GET_CODE (op0) == REG) 2002 { 2003 unsigned int r = REGNO (op0); 2004 2005 /* See if this reg overlaps range under consideration. */ 2006 if (r < end_regno 2007 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno) 2008 return 1; 2009 } 2010 } 2011 else if (GET_CODE (x) == PARALLEL) 2012 { 2013 int i = XVECLEN (x, 0) - 1; 2014 2015 for (; i >= 0; i--) 2016 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i))) 2017 return 1; 2018 } 2019 2020 return 0; 2021} 2022 2023/* Return 1 if ADDR is a valid memory address for mode MODE, 2024 and check that each pseudo reg has the proper kind of 2025 hard reg. */ 2026 2027int 2028strict_memory_address_p (mode, addr) 2029 enum machine_mode mode ATTRIBUTE_UNUSED; 2030 rtx addr; 2031{ 2032 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win); 2033 return 0; 2034 2035 win: 2036 return 1; 2037} 2038 2039/* Like rtx_equal_p except that it allows a REG and a SUBREG to match 2040 if they are the same hard reg, and has special hacks for 2041 autoincrement and autodecrement. 2042 This is specifically intended for find_reloads to use 2043 in determining whether two operands match. 2044 X is the operand whose number is the lower of the two. 2045 2046 The value is 2 if Y contains a pre-increment that matches 2047 a non-incrementing address in X. */ 2048 2049/* ??? To be completely correct, we should arrange to pass 2050 for X the output operand and for Y the input operand. 2051 For now, we assume that the output operand has the lower number 2052 because that is natural in (SET output (... input ...)). */ 2053 2054int 2055operands_match_p (x, y) 2056 rtx x, y; 2057{ 2058 int i; 2059 RTX_CODE code = GET_CODE (x); 2060 const char *fmt; 2061 int success_2; 2062 2063 if (x == y) 2064 return 1; 2065 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)) 2066 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG 2067 && GET_CODE (SUBREG_REG (y)) == REG))) 2068 { 2069 int j; 2070 2071 if (code == SUBREG) 2072 { 2073 i = REGNO (SUBREG_REG (x)); 2074 if (i >= FIRST_PSEUDO_REGISTER) 2075 goto slow; 2076 i += subreg_regno_offset (REGNO (SUBREG_REG (x)), 2077 GET_MODE (SUBREG_REG (x)), 2078 SUBREG_BYTE (x), 2079 GET_MODE (x)); 2080 } 2081 else 2082 i = REGNO (x); 2083 2084 if (GET_CODE (y) == SUBREG) 2085 { 2086 j = REGNO (SUBREG_REG (y)); 2087 if (j >= FIRST_PSEUDO_REGISTER) 2088 goto slow; 2089 j += subreg_regno_offset (REGNO (SUBREG_REG (y)), 2090 GET_MODE (SUBREG_REG (y)), 2091 SUBREG_BYTE (y), 2092 GET_MODE (y)); 2093 } 2094 else 2095 j = REGNO (y); 2096 2097 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a 2098 multiple hard register group, so that for example (reg:DI 0) and 2099 (reg:SI 1) will be considered the same register. */ 2100 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD 2101 && i < FIRST_PSEUDO_REGISTER) 2102 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1; 2103 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD 2104 && j < FIRST_PSEUDO_REGISTER) 2105 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1; 2106 2107 return i == j; 2108 } 2109 /* If two operands must match, because they are really a single 2110 operand of an assembler insn, then two postincrements are invalid 2111 because the assembler insn would increment only once. 2112 On the other hand, an postincrement matches ordinary indexing 2113 if the postincrement is the output operand. */ 2114 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY) 2115 return operands_match_p (XEXP (x, 0), y); 2116 /* Two preincrements are invalid 2117 because the assembler insn would increment only once. 2118 On the other hand, an preincrement matches ordinary indexing 2119 if the preincrement is the input operand. 2120 In this case, return 2, since some callers need to do special 2121 things when this happens. */ 2122 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC 2123 || GET_CODE (y) == PRE_MODIFY) 2124 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0; 2125 2126 slow: 2127 2128 /* Now we have disposed of all the cases 2129 in which different rtx codes can match. */ 2130 if (code != GET_CODE (y)) 2131 return 0; 2132 if (code == LABEL_REF) 2133 return XEXP (x, 0) == XEXP (y, 0); 2134 if (code == SYMBOL_REF) 2135 return XSTR (x, 0) == XSTR (y, 0); 2136 2137 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ 2138 2139 if (GET_MODE (x) != GET_MODE (y)) 2140 return 0; 2141 2142 /* Compare the elements. If any pair of corresponding elements 2143 fail to match, return 0 for the whole things. */ 2144 2145 success_2 = 0; 2146 fmt = GET_RTX_FORMAT (code); 2147 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2148 { 2149 int val, j; 2150 switch (fmt[i]) 2151 { 2152 case 'w': 2153 if (XWINT (x, i) != XWINT (y, i)) 2154 return 0; 2155 break; 2156 2157 case 'i': 2158 if (XINT (x, i) != XINT (y, i)) 2159 return 0; 2160 break; 2161 2162 case 'e': 2163 val = operands_match_p (XEXP (x, i), XEXP (y, i)); 2164 if (val == 0) 2165 return 0; 2166 /* If any subexpression returns 2, 2167 we should return 2 if we are successful. */ 2168 if (val == 2) 2169 success_2 = 1; 2170 break; 2171 2172 case '0': 2173 break; 2174 2175 case 'E': 2176 if (XVECLEN (x, i) != XVECLEN (y, i)) 2177 return 0; 2178 for (j = XVECLEN (x, i) - 1; j >= 0; --j) 2179 { 2180 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j)); 2181 if (val == 0) 2182 return 0; 2183 if (val == 2) 2184 success_2 = 1; 2185 } 2186 break; 2187 2188 /* It is believed that rtx's at this level will never 2189 contain anything but integers and other rtx's, 2190 except for within LABEL_REFs and SYMBOL_REFs. */ 2191 default: 2192 abort (); 2193 } 2194 } 2195 return 1 + success_2; 2196} 2197 2198/* Describe the range of registers or memory referenced by X. 2199 If X is a register, set REG_FLAG and put the first register 2200 number into START and the last plus one into END. 2201 If X is a memory reference, put a base address into BASE 2202 and a range of integer offsets into START and END. 2203 If X is pushing on the stack, we can assume it causes no trouble, 2204 so we set the SAFE field. */ 2205 2206static struct decomposition 2207decompose (x) 2208 rtx x; 2209{ 2210 struct decomposition val; 2211 int all_const = 0; 2212 2213 val.reg_flag = 0; 2214 val.safe = 0; 2215 val.base = 0; 2216 if (GET_CODE (x) == MEM) 2217 { 2218 rtx base = NULL_RTX, offset = 0; 2219 rtx addr = XEXP (x, 0); 2220 2221 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC 2222 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) 2223 { 2224 val.base = XEXP (addr, 0); 2225 val.start = -GET_MODE_SIZE (GET_MODE (x)); 2226 val.end = GET_MODE_SIZE (GET_MODE (x)); 2227 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM; 2228 return val; 2229 } 2230 2231 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY) 2232 { 2233 if (GET_CODE (XEXP (addr, 1)) == PLUS 2234 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0) 2235 && CONSTANT_P (XEXP (XEXP (addr, 1), 1))) 2236 { 2237 val.base = XEXP (addr, 0); 2238 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1)); 2239 val.end = INTVAL (XEXP (XEXP (addr, 1), 1)); 2240 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM; 2241 return val; 2242 } 2243 } 2244 2245 if (GET_CODE (addr) == CONST) 2246 { 2247 addr = XEXP (addr, 0); 2248 all_const = 1; 2249 } 2250 if (GET_CODE (addr) == PLUS) 2251 { 2252 if (CONSTANT_P (XEXP (addr, 0))) 2253 { 2254 base = XEXP (addr, 1); 2255 offset = XEXP (addr, 0); 2256 } 2257 else if (CONSTANT_P (XEXP (addr, 1))) 2258 { 2259 base = XEXP (addr, 0); 2260 offset = XEXP (addr, 1); 2261 } 2262 } 2263 2264 if (offset == 0) 2265 { 2266 base = addr; 2267 offset = const0_rtx; 2268 } 2269 if (GET_CODE (offset) == CONST) 2270 offset = XEXP (offset, 0); 2271 if (GET_CODE (offset) == PLUS) 2272 { 2273 if (GET_CODE (XEXP (offset, 0)) == CONST_INT) 2274 { 2275 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1)); 2276 offset = XEXP (offset, 0); 2277 } 2278 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT) 2279 { 2280 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0)); 2281 offset = XEXP (offset, 1); 2282 } 2283 else 2284 { 2285 base = gen_rtx_PLUS (GET_MODE (base), base, offset); 2286 offset = const0_rtx; 2287 } 2288 } 2289 else if (GET_CODE (offset) != CONST_INT) 2290 { 2291 base = gen_rtx_PLUS (GET_MODE (base), base, offset); 2292 offset = const0_rtx; 2293 } 2294 2295 if (all_const && GET_CODE (base) == PLUS) 2296 base = gen_rtx_CONST (GET_MODE (base), base); 2297 2298 if (GET_CODE (offset) != CONST_INT) 2299 abort (); 2300 2301 val.start = INTVAL (offset); 2302 val.end = val.start + GET_MODE_SIZE (GET_MODE (x)); 2303 val.base = base; 2304 return val; 2305 } 2306 else if (GET_CODE (x) == REG) 2307 { 2308 val.reg_flag = 1; 2309 val.start = true_regnum (x); 2310 if (val.start < 0) 2311 { 2312 /* A pseudo with no hard reg. */ 2313 val.start = REGNO (x); 2314 val.end = val.start + 1; 2315 } 2316 else 2317 /* A hard reg. */ 2318 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); 2319 } 2320 else if (GET_CODE (x) == SUBREG) 2321 { 2322 if (GET_CODE (SUBREG_REG (x)) != REG) 2323 /* This could be more precise, but it's good enough. */ 2324 return decompose (SUBREG_REG (x)); 2325 val.reg_flag = 1; 2326 val.start = true_regnum (x); 2327 if (val.start < 0) 2328 return decompose (SUBREG_REG (x)); 2329 else 2330 /* A hard reg. */ 2331 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); 2332 } 2333 else if (CONSTANT_P (x) 2334 /* This hasn't been assigned yet, so it can't conflict yet. */ 2335 || GET_CODE (x) == SCRATCH) 2336 val.safe = 1; 2337 else 2338 abort (); 2339 return val; 2340} 2341 2342/* Return 1 if altering Y will not modify the value of X. 2343 Y is also described by YDATA, which should be decompose (Y). */ 2344 2345static int 2346immune_p (x, y, ydata) 2347 rtx x, y; 2348 struct decomposition ydata; 2349{ 2350 struct decomposition xdata; 2351 2352 if (ydata.reg_flag) 2353 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0); 2354 if (ydata.safe) 2355 return 1; 2356 2357 if (GET_CODE (y) != MEM) 2358 abort (); 2359 /* If Y is memory and X is not, Y can't affect X. */ 2360 if (GET_CODE (x) != MEM) 2361 return 1; 2362 2363 xdata = decompose (x); 2364 2365 if (! rtx_equal_p (xdata.base, ydata.base)) 2366 { 2367 /* If bases are distinct symbolic constants, there is no overlap. */ 2368 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base)) 2369 return 1; 2370 /* Constants and stack slots never overlap. */ 2371 if (CONSTANT_P (xdata.base) 2372 && (ydata.base == frame_pointer_rtx 2373 || ydata.base == hard_frame_pointer_rtx 2374 || ydata.base == stack_pointer_rtx)) 2375 return 1; 2376 if (CONSTANT_P (ydata.base) 2377 && (xdata.base == frame_pointer_rtx 2378 || xdata.base == hard_frame_pointer_rtx 2379 || xdata.base == stack_pointer_rtx)) 2380 return 1; 2381 /* If either base is variable, we don't know anything. */ 2382 return 0; 2383 } 2384 2385 return (xdata.start >= ydata.end || ydata.start >= xdata.end); 2386} 2387 2388/* Similar, but calls decompose. */ 2389 2390int 2391safe_from_earlyclobber (op, clobber) 2392 rtx op, clobber; 2393{ 2394 struct decomposition early_data; 2395 2396 early_data = decompose (clobber); 2397 return immune_p (op, clobber, early_data); 2398} 2399 2400/* Main entry point of this file: search the body of INSN 2401 for values that need reloading and record them with push_reload. 2402 REPLACE nonzero means record also where the values occur 2403 so that subst_reloads can be used. 2404 2405 IND_LEVELS says how many levels of indirection are supported by this 2406 machine; a value of zero means that a memory reference is not a valid 2407 memory address. 2408 2409 LIVE_KNOWN says we have valid information about which hard 2410 regs are live at each point in the program; this is true when 2411 we are called from global_alloc but false when stupid register 2412 allocation has been done. 2413 2414 RELOAD_REG_P if nonzero is a vector indexed by hard reg number 2415 which is nonnegative if the reg has been commandeered for reloading into. 2416 It is copied into STATIC_RELOAD_REG_P and referenced from there 2417 by various subroutines. 2418 2419 Return TRUE if some operands need to be changed, because of swapping 2420 commutative operands, reg_equiv_address substitution, or whatever. */ 2421 2422int 2423find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) 2424 rtx insn; 2425 int replace, ind_levels; 2426 int live_known; 2427 short *reload_reg_p; 2428{ 2429 int insn_code_number; 2430 int i, j; 2431 int noperands; 2432 /* These start out as the constraints for the insn 2433 and they are chewed up as we consider alternatives. */ 2434 char *constraints[MAX_RECOG_OPERANDS]; 2435 /* These are the preferred classes for an operand, or NO_REGS if it isn't 2436 a register. */ 2437 enum reg_class preferred_class[MAX_RECOG_OPERANDS]; 2438 char pref_or_nothing[MAX_RECOG_OPERANDS]; 2439 /* Nonzero for a MEM operand whose entire address needs a reload. */ 2440 int address_reloaded[MAX_RECOG_OPERANDS]; 2441 /* Value of enum reload_type to use for operand. */ 2442 enum reload_type operand_type[MAX_RECOG_OPERANDS]; 2443 /* Value of enum reload_type to use within address of operand. */ 2444 enum reload_type address_type[MAX_RECOG_OPERANDS]; 2445 /* Save the usage of each operand. */ 2446 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS]; 2447 int no_input_reloads = 0, no_output_reloads = 0; 2448 int n_alternatives; 2449 int this_alternative[MAX_RECOG_OPERANDS]; 2450 char this_alternative_match_win[MAX_RECOG_OPERANDS]; 2451 char this_alternative_win[MAX_RECOG_OPERANDS]; 2452 char this_alternative_offmemok[MAX_RECOG_OPERANDS]; 2453 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS]; 2454 int this_alternative_matches[MAX_RECOG_OPERANDS]; 2455 int swapped; 2456 int goal_alternative[MAX_RECOG_OPERANDS]; 2457 int this_alternative_number; 2458 int goal_alternative_number = 0; 2459 int operand_reloadnum[MAX_RECOG_OPERANDS]; 2460 int goal_alternative_matches[MAX_RECOG_OPERANDS]; 2461 int goal_alternative_matched[MAX_RECOG_OPERANDS]; 2462 char goal_alternative_match_win[MAX_RECOG_OPERANDS]; 2463 char goal_alternative_win[MAX_RECOG_OPERANDS]; 2464 char goal_alternative_offmemok[MAX_RECOG_OPERANDS]; 2465 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS]; 2466 int goal_alternative_swapped; 2467 int best; 2468 int commutative; 2469 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS]; 2470 rtx substed_operand[MAX_RECOG_OPERANDS]; 2471 rtx body = PATTERN (insn); 2472 rtx set = single_set (insn); 2473 int goal_earlyclobber = 0, this_earlyclobber; 2474 enum machine_mode operand_mode[MAX_RECOG_OPERANDS]; 2475 int retval = 0; 2476 2477 this_insn = insn; 2478 n_reloads = 0; 2479 n_replacements = 0; 2480 n_earlyclobbers = 0; 2481 replace_reloads = replace; 2482 hard_regs_live_known = live_known; 2483 static_reload_reg_p = reload_reg_p; 2484 2485 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads; 2486 neither are insns that SET cc0. Insns that use CC0 are not allowed 2487 to have any input reloads. */ 2488 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN) 2489 no_output_reloads = 1; 2490 2491#ifdef HAVE_cc0 2492 if (reg_referenced_p (cc0_rtx, PATTERN (insn))) 2493 no_input_reloads = 1; 2494 if (reg_set_p (cc0_rtx, PATTERN (insn))) 2495 no_output_reloads = 1; 2496#endif 2497 2498#ifdef SECONDARY_MEMORY_NEEDED 2499 /* The eliminated forms of any secondary memory locations are per-insn, so 2500 clear them out here. */ 2501 2502 memset ((char *) secondary_memlocs_elim, 0, sizeof secondary_memlocs_elim); 2503#endif 2504 2505 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it 2506 is cheap to move between them. If it is not, there may not be an insn 2507 to do the copy, so we may need a reload. */ 2508 if (GET_CODE (body) == SET 2509 && GET_CODE (SET_DEST (body)) == REG 2510 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER 2511 && GET_CODE (SET_SRC (body)) == REG 2512 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER 2513 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)), 2514 REGNO_REG_CLASS (REGNO (SET_SRC (body))), 2515 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2) 2516 return 0; 2517 2518 extract_insn (insn); 2519 2520 noperands = reload_n_operands = recog_data.n_operands; 2521 n_alternatives = recog_data.n_alternatives; 2522 2523 /* Just return "no reloads" if insn has no operands with constraints. */ 2524 if (noperands == 0 || n_alternatives == 0) 2525 return 0; 2526 2527 insn_code_number = INSN_CODE (insn); 2528 this_insn_is_asm = insn_code_number < 0; 2529 2530 memcpy (operand_mode, recog_data.operand_mode, 2531 noperands * sizeof (enum machine_mode)); 2532 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *)); 2533 2534 commutative = -1; 2535 2536 /* If we will need to know, later, whether some pair of operands 2537 are the same, we must compare them now and save the result. 2538 Reloading the base and index registers will clobber them 2539 and afterward they will fail to match. */ 2540 2541 for (i = 0; i < noperands; i++) 2542 { 2543 char *p; 2544 int c; 2545 2546 substed_operand[i] = recog_data.operand[i]; 2547 p = constraints[i]; 2548 2549 modified[i] = RELOAD_READ; 2550 2551 /* Scan this operand's constraint to see if it is an output operand, 2552 an in-out operand, is commutative, or should match another. */ 2553 2554 while ((c = *p++)) 2555 { 2556 if (c == '=') 2557 modified[i] = RELOAD_WRITE; 2558 else if (c == '+') 2559 modified[i] = RELOAD_READ_WRITE; 2560 else if (c == '%') 2561 { 2562 /* The last operand should not be marked commutative. */ 2563 if (i == noperands - 1) 2564 abort (); 2565 2566 commutative = i; 2567 } 2568 else if (ISDIGIT (c)) 2569 { 2570 c = strtoul (p - 1, &p, 10); 2571 2572 operands_match[c][i] 2573 = operands_match_p (recog_data.operand[c], 2574 recog_data.operand[i]); 2575 2576 /* An operand may not match itself. */ 2577 if (c == i) 2578 abort (); 2579 2580 /* If C can be commuted with C+1, and C might need to match I, 2581 then C+1 might also need to match I. */ 2582 if (commutative >= 0) 2583 { 2584 if (c == commutative || c == commutative + 1) 2585 { 2586 int other = c + (c == commutative ? 1 : -1); 2587 operands_match[other][i] 2588 = operands_match_p (recog_data.operand[other], 2589 recog_data.operand[i]); 2590 } 2591 if (i == commutative || i == commutative + 1) 2592 { 2593 int other = i + (i == commutative ? 1 : -1); 2594 operands_match[c][other] 2595 = operands_match_p (recog_data.operand[c], 2596 recog_data.operand[other]); 2597 } 2598 /* Note that C is supposed to be less than I. 2599 No need to consider altering both C and I because in 2600 that case we would alter one into the other. */ 2601 } 2602 } 2603 } 2604 } 2605 2606 /* Examine each operand that is a memory reference or memory address 2607 and reload parts of the addresses into index registers. 2608 Also here any references to pseudo regs that didn't get hard regs 2609 but are equivalent to constants get replaced in the insn itself 2610 with those constants. Nobody will ever see them again. 2611 2612 Finally, set up the preferred classes of each operand. */ 2613 2614 for (i = 0; i < noperands; i++) 2615 { 2616 RTX_CODE code = GET_CODE (recog_data.operand[i]); 2617 2618 address_reloaded[i] = 0; 2619 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT 2620 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT 2621 : RELOAD_OTHER); 2622 address_type[i] 2623 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS 2624 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS 2625 : RELOAD_OTHER); 2626 2627 if (*constraints[i] == 0) 2628 /* Ignore things like match_operator operands. */ 2629 ; 2630 else if (constraints[i][0] == 'p') 2631 { 2632 find_reloads_address (VOIDmode, (rtx*) 0, 2633 recog_data.operand[i], 2634 recog_data.operand_loc[i], 2635 i, operand_type[i], ind_levels, insn); 2636 2637 /* If we now have a simple operand where we used to have a 2638 PLUS or MULT, re-recognize and try again. */ 2639 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o' 2640 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG) 2641 && (GET_CODE (recog_data.operand[i]) == MULT 2642 || GET_CODE (recog_data.operand[i]) == PLUS)) 2643 { 2644 INSN_CODE (insn) = -1; 2645 retval = find_reloads (insn, replace, ind_levels, live_known, 2646 reload_reg_p); 2647 return retval; 2648 } 2649 2650 recog_data.operand[i] = *recog_data.operand_loc[i]; 2651 substed_operand[i] = recog_data.operand[i]; 2652 } 2653 else if (code == MEM) 2654 { 2655 address_reloaded[i] 2656 = find_reloads_address (GET_MODE (recog_data.operand[i]), 2657 recog_data.operand_loc[i], 2658 XEXP (recog_data.operand[i], 0), 2659 &XEXP (recog_data.operand[i], 0), 2660 i, address_type[i], ind_levels, insn); 2661 recog_data.operand[i] = *recog_data.operand_loc[i]; 2662 substed_operand[i] = recog_data.operand[i]; 2663 } 2664 else if (code == SUBREG) 2665 { 2666 rtx reg = SUBREG_REG (recog_data.operand[i]); 2667 rtx op 2668 = find_reloads_toplev (recog_data.operand[i], i, address_type[i], 2669 ind_levels, 2670 set != 0 2671 && &SET_DEST (set) == recog_data.operand_loc[i], 2672 insn, 2673 &address_reloaded[i]); 2674 2675 /* If we made a MEM to load (a part of) the stackslot of a pseudo 2676 that didn't get a hard register, emit a USE with a REG_EQUAL 2677 note in front so that we might inherit a previous, possibly 2678 wider reload. */ 2679 2680 if (replace 2681 && GET_CODE (op) == MEM 2682 && GET_CODE (reg) == REG 2683 && (GET_MODE_SIZE (GET_MODE (reg)) 2684 >= GET_MODE_SIZE (GET_MODE (op)))) 2685 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg), 2686 insn), 2687 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]); 2688 2689 substed_operand[i] = recog_data.operand[i] = op; 2690 } 2691 else if (code == PLUS || GET_RTX_CLASS (code) == '1') 2692 /* We can get a PLUS as an "operand" as a result of register 2693 elimination. See eliminate_regs and gen_reload. We handle 2694 a unary operator by reloading the operand. */ 2695 substed_operand[i] = recog_data.operand[i] 2696 = find_reloads_toplev (recog_data.operand[i], i, address_type[i], 2697 ind_levels, 0, insn, 2698 &address_reloaded[i]); 2699 else if (code == REG) 2700 { 2701 /* This is equivalent to calling find_reloads_toplev. 2702 The code is duplicated for speed. 2703 When we find a pseudo always equivalent to a constant, 2704 we replace it by the constant. We must be sure, however, 2705 that we don't try to replace it in the insn in which it 2706 is being set. */ 2707 int regno = REGNO (recog_data.operand[i]); 2708 if (reg_equiv_constant[regno] != 0 2709 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i])) 2710 { 2711 /* Record the existing mode so that the check if constants are 2712 allowed will work when operand_mode isn't specified. */ 2713 2714 if (operand_mode[i] == VOIDmode) 2715 operand_mode[i] = GET_MODE (recog_data.operand[i]); 2716 2717 substed_operand[i] = recog_data.operand[i] 2718 = reg_equiv_constant[regno]; 2719 } 2720 if (reg_equiv_memory_loc[regno] != 0 2721 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 2722 /* We need not give a valid is_set_dest argument since the case 2723 of a constant equivalence was checked above. */ 2724 substed_operand[i] = recog_data.operand[i] 2725 = find_reloads_toplev (recog_data.operand[i], i, address_type[i], 2726 ind_levels, 0, insn, 2727 &address_reloaded[i]); 2728 } 2729 /* If the operand is still a register (we didn't replace it with an 2730 equivalent), get the preferred class to reload it into. */ 2731 code = GET_CODE (recog_data.operand[i]); 2732 preferred_class[i] 2733 = ((code == REG && REGNO (recog_data.operand[i]) 2734 >= FIRST_PSEUDO_REGISTER) 2735 ? reg_preferred_class (REGNO (recog_data.operand[i])) 2736 : NO_REGS); 2737 pref_or_nothing[i] 2738 = (code == REG 2739 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER 2740 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS); 2741 } 2742 2743 /* If this is simply a copy from operand 1 to operand 0, merge the 2744 preferred classes for the operands. */ 2745 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set) 2746 && recog_data.operand[1] == SET_SRC (set)) 2747 { 2748 preferred_class[0] = preferred_class[1] 2749 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]]; 2750 pref_or_nothing[0] |= pref_or_nothing[1]; 2751 pref_or_nothing[1] |= pref_or_nothing[0]; 2752 } 2753 2754 /* Now see what we need for pseudo-regs that didn't get hard regs 2755 or got the wrong kind of hard reg. For this, we must consider 2756 all the operands together against the register constraints. */ 2757 2758 best = MAX_RECOG_OPERANDS * 2 + 600; 2759 2760 swapped = 0; 2761 goal_alternative_swapped = 0; 2762 try_swapped: 2763 2764 /* The constraints are made of several alternatives. 2765 Each operand's constraint looks like foo,bar,... with commas 2766 separating the alternatives. The first alternatives for all 2767 operands go together, the second alternatives go together, etc. 2768 2769 First loop over alternatives. */ 2770 2771 for (this_alternative_number = 0; 2772 this_alternative_number < n_alternatives; 2773 this_alternative_number++) 2774 { 2775 /* Loop over operands for one constraint alternative. */ 2776 /* LOSERS counts those that don't fit this alternative 2777 and would require loading. */ 2778 int losers = 0; 2779 /* BAD is set to 1 if it some operand can't fit this alternative 2780 even after reloading. */ 2781 int bad = 0; 2782 /* REJECT is a count of how undesirable this alternative says it is 2783 if any reloading is required. If the alternative matches exactly 2784 then REJECT is ignored, but otherwise it gets this much 2785 counted against it in addition to the reloading needed. Each 2786 ? counts three times here since we want the disparaging caused by 2787 a bad register class to only count 1/3 as much. */ 2788 int reject = 0; 2789 2790 this_earlyclobber = 0; 2791 2792 for (i = 0; i < noperands; i++) 2793 { 2794 char *p = constraints[i]; 2795 int win = 0; 2796 int did_match = 0; 2797 /* 0 => this operand can be reloaded somehow for this alternative. */ 2798 int badop = 1; 2799 /* 0 => this operand can be reloaded if the alternative allows regs. */ 2800 int winreg = 0; 2801 int c; 2802 rtx operand = recog_data.operand[i]; 2803 int offset = 0; 2804 /* Nonzero means this is a MEM that must be reloaded into a reg 2805 regardless of what the constraint says. */ 2806 int force_reload = 0; 2807 int offmemok = 0; 2808 /* Nonzero if a constant forced into memory would be OK for this 2809 operand. */ 2810 int constmemok = 0; 2811 int earlyclobber = 0; 2812 2813 /* If the predicate accepts a unary operator, it means that 2814 we need to reload the operand, but do not do this for 2815 match_operator and friends. */ 2816 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0) 2817 operand = XEXP (operand, 0); 2818 2819 /* If the operand is a SUBREG, extract 2820 the REG or MEM (or maybe even a constant) within. 2821 (Constants can occur as a result of reg_equiv_constant.) */ 2822 2823 while (GET_CODE (operand) == SUBREG) 2824 { 2825 /* Offset only matters when operand is a REG and 2826 it is a hard reg. This is because it is passed 2827 to reg_fits_class_p if it is a REG and all pseudos 2828 return 0 from that function. */ 2829 if (GET_CODE (SUBREG_REG (operand)) == REG 2830 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER) 2831 { 2832 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)), 2833 GET_MODE (SUBREG_REG (operand)), 2834 SUBREG_BYTE (operand), 2835 GET_MODE (operand)); 2836 } 2837 operand = SUBREG_REG (operand); 2838 /* Force reload if this is a constant or PLUS or if there may 2839 be a problem accessing OPERAND in the outer mode. */ 2840 if (CONSTANT_P (operand) 2841 || GET_CODE (operand) == PLUS 2842 /* We must force a reload of paradoxical SUBREGs 2843 of a MEM because the alignment of the inner value 2844 may not be enough to do the outer reference. On 2845 big-endian machines, it may also reference outside 2846 the object. 2847 2848 On machines that extend byte operations and we have a 2849 SUBREG where both the inner and outer modes are no wider 2850 than a word and the inner mode is narrower, is integral, 2851 and gets extended when loaded from memory, combine.c has 2852 made assumptions about the behavior of the machine in such 2853 register access. If the data is, in fact, in memory we 2854 must always load using the size assumed to be in the 2855 register and let the insn do the different-sized 2856 accesses. 2857 2858 This is doubly true if WORD_REGISTER_OPERATIONS. In 2859 this case eliminate_regs has left non-paradoxical 2860 subregs for push_reloads to see. Make sure it does 2861 by forcing the reload. 2862 2863 ??? When is it right at this stage to have a subreg 2864 of a mem that is _not_ to be handled specialy? IMO 2865 those should have been reduced to just a mem. */ 2866 || ((GET_CODE (operand) == MEM 2867 || (GET_CODE (operand)== REG 2868 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 2869#ifndef WORD_REGISTER_OPERATIONS 2870 && (((GET_MODE_BITSIZE (GET_MODE (operand)) 2871 < BIGGEST_ALIGNMENT) 2872 && (GET_MODE_SIZE (operand_mode[i]) 2873 > GET_MODE_SIZE (GET_MODE (operand)))) 2874 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN) 2875#ifdef LOAD_EXTEND_OP 2876 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 2877 && (GET_MODE_SIZE (GET_MODE (operand)) 2878 <= UNITS_PER_WORD) 2879 && (GET_MODE_SIZE (operand_mode[i]) 2880 > GET_MODE_SIZE (GET_MODE (operand))) 2881 && INTEGRAL_MODE_P (GET_MODE (operand)) 2882 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL) 2883#endif 2884 ) 2885#endif 2886 ) 2887 /* This following hunk of code should no longer be 2888 needed at all with SUBREG_BYTE. If you need this 2889 code back, please explain to me why so I can 2890 fix the real problem. -DaveM */ 2891#if 0 2892 /* Subreg of a hard reg which can't handle the subreg's mode 2893 or which would handle that mode in the wrong number of 2894 registers for subregging to work. */ 2895 || (GET_CODE (operand) == REG 2896 && REGNO (operand) < FIRST_PSEUDO_REGISTER 2897 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 2898 && (GET_MODE_SIZE (GET_MODE (operand)) 2899 > UNITS_PER_WORD) 2900 && ((GET_MODE_SIZE (GET_MODE (operand)) 2901 / UNITS_PER_WORD) 2902 != HARD_REGNO_NREGS (REGNO (operand), 2903 GET_MODE (operand)))) 2904 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset, 2905 operand_mode[i]))) 2906#endif 2907 ) 2908 force_reload = 1; 2909 } 2910 2911 this_alternative[i] = (int) NO_REGS; 2912 this_alternative_win[i] = 0; 2913 this_alternative_match_win[i] = 0; 2914 this_alternative_offmemok[i] = 0; 2915 this_alternative_earlyclobber[i] = 0; 2916 this_alternative_matches[i] = -1; 2917 2918 /* An empty constraint or empty alternative 2919 allows anything which matched the pattern. */ 2920 if (*p == 0 || *p == ',') 2921 win = 1, badop = 0; 2922 2923 /* Scan this alternative's specs for this operand; 2924 set WIN if the operand fits any letter in this alternative. 2925 Otherwise, clear BADOP if this operand could 2926 fit some letter after reloads, 2927 or set WINREG if this operand could fit after reloads 2928 provided the constraint allows some registers. */ 2929 2930 while (*p && (c = *p++) != ',') 2931 switch (c) 2932 { 2933 case '=': case '+': case '*': 2934 break; 2935 2936 case '%': 2937 /* The last operand should not be marked commutative. */ 2938 if (i != noperands - 1) 2939 commutative = i; 2940 break; 2941 2942 case '?': 2943 reject += 6; 2944 break; 2945 2946 case '!': 2947 reject = 600; 2948 break; 2949 2950 case '#': 2951 /* Ignore rest of this alternative as far as 2952 reloading is concerned. */ 2953 while (*p && *p != ',') 2954 p++; 2955 break; 2956 2957 case '0': case '1': case '2': case '3': case '4': 2958 case '5': case '6': case '7': case '8': case '9': 2959 c = strtoul (p - 1, &p, 10); 2960 2961 this_alternative_matches[i] = c; 2962 /* We are supposed to match a previous operand. 2963 If we do, we win if that one did. 2964 If we do not, count both of the operands as losers. 2965 (This is too conservative, since most of the time 2966 only a single reload insn will be needed to make 2967 the two operands win. As a result, this alternative 2968 may be rejected when it is actually desirable.) */ 2969 if ((swapped && (c != commutative || i != commutative + 1)) 2970 /* If we are matching as if two operands were swapped, 2971 also pretend that operands_match had been computed 2972 with swapped. 2973 But if I is the second of those and C is the first, 2974 don't exchange them, because operands_match is valid 2975 only on one side of its diagonal. */ 2976 ? (operands_match 2977 [(c == commutative || c == commutative + 1) 2978 ? 2 * commutative + 1 - c : c] 2979 [(i == commutative || i == commutative + 1) 2980 ? 2 * commutative + 1 - i : i]) 2981 : operands_match[c][i]) 2982 { 2983 /* If we are matching a non-offsettable address where an 2984 offsettable address was expected, then we must reject 2985 this combination, because we can't reload it. */ 2986 if (this_alternative_offmemok[c] 2987 && GET_CODE (recog_data.operand[c]) == MEM 2988 && this_alternative[c] == (int) NO_REGS 2989 && ! this_alternative_win[c]) 2990 bad = 1; 2991 2992 did_match = this_alternative_win[c]; 2993 } 2994 else 2995 { 2996 /* Operands don't match. */ 2997 rtx value; 2998 /* Retroactively mark the operand we had to match 2999 as a loser, if it wasn't already. */ 3000 if (this_alternative_win[c]) 3001 losers++; 3002 this_alternative_win[c] = 0; 3003 if (this_alternative[c] == (int) NO_REGS) 3004 bad = 1; 3005 /* But count the pair only once in the total badness of 3006 this alternative, if the pair can be a dummy reload. */ 3007 value 3008 = find_dummy_reload (recog_data.operand[i], 3009 recog_data.operand[c], 3010 recog_data.operand_loc[i], 3011 recog_data.operand_loc[c], 3012 operand_mode[i], operand_mode[c], 3013 this_alternative[c], -1, 3014 this_alternative_earlyclobber[c]); 3015 3016 if (value != 0) 3017 losers--; 3018 } 3019 /* This can be fixed with reloads if the operand 3020 we are supposed to match can be fixed with reloads. */ 3021 badop = 0; 3022 this_alternative[i] = this_alternative[c]; 3023 3024 /* If we have to reload this operand and some previous 3025 operand also had to match the same thing as this 3026 operand, we don't know how to do that. So reject this 3027 alternative. */ 3028 if (! did_match || force_reload) 3029 for (j = 0; j < i; j++) 3030 if (this_alternative_matches[j] 3031 == this_alternative_matches[i]) 3032 badop = 1; 3033 break; 3034 3035 case 'p': 3036 /* All necessary reloads for an address_operand 3037 were handled in find_reloads_address. */ 3038 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode); 3039 win = 1; 3040 badop = 0; 3041 break; 3042 3043 case 'm': 3044 if (force_reload) 3045 break; 3046 if (GET_CODE (operand) == MEM 3047 || (GET_CODE (operand) == REG 3048 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3049 && reg_renumber[REGNO (operand)] < 0)) 3050 win = 1; 3051 if (CONSTANT_P (operand) 3052 /* force_const_mem does not accept HIGH. */ 3053 && GET_CODE (operand) != HIGH) 3054 badop = 0; 3055 constmemok = 1; 3056 break; 3057 3058 case '<': 3059 if (GET_CODE (operand) == MEM 3060 && ! address_reloaded[i] 3061 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC 3062 || GET_CODE (XEXP (operand, 0)) == POST_DEC)) 3063 win = 1; 3064 break; 3065 3066 case '>': 3067 if (GET_CODE (operand) == MEM 3068 && ! address_reloaded[i] 3069 && (GET_CODE (XEXP (operand, 0)) == PRE_INC 3070 || GET_CODE (XEXP (operand, 0)) == POST_INC)) 3071 win = 1; 3072 break; 3073 3074 /* Memory operand whose address is not offsettable. */ 3075 case 'V': 3076 if (force_reload) 3077 break; 3078 if (GET_CODE (operand) == MEM 3079 && ! (ind_levels ? offsettable_memref_p (operand) 3080 : offsettable_nonstrict_memref_p (operand)) 3081 /* Certain mem addresses will become offsettable 3082 after they themselves are reloaded. This is important; 3083 we don't want our own handling of unoffsettables 3084 to override the handling of reg_equiv_address. */ 3085 && !(GET_CODE (XEXP (operand, 0)) == REG 3086 && (ind_levels == 0 3087 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))) 3088 win = 1; 3089 break; 3090 3091 /* Memory operand whose address is offsettable. */ 3092 case 'o': 3093 if (force_reload) 3094 break; 3095 if ((GET_CODE (operand) == MEM 3096 /* If IND_LEVELS, find_reloads_address won't reload a 3097 pseudo that didn't get a hard reg, so we have to 3098 reject that case. */ 3099 && ((ind_levels ? offsettable_memref_p (operand) 3100 : offsettable_nonstrict_memref_p (operand)) 3101 /* A reloaded address is offsettable because it is now 3102 just a simple register indirect. */ 3103 || address_reloaded[i])) 3104 || (GET_CODE (operand) == REG 3105 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3106 && reg_renumber[REGNO (operand)] < 0 3107 /* If reg_equiv_address is nonzero, we will be 3108 loading it into a register; hence it will be 3109 offsettable, but we cannot say that reg_equiv_mem 3110 is offsettable without checking. */ 3111 && ((reg_equiv_mem[REGNO (operand)] != 0 3112 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)])) 3113 || (reg_equiv_address[REGNO (operand)] != 0)))) 3114 win = 1; 3115 /* force_const_mem does not accept HIGH. */ 3116 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH) 3117 || GET_CODE (operand) == MEM) 3118 badop = 0; 3119 constmemok = 1; 3120 offmemok = 1; 3121 break; 3122 3123 case '&': 3124 /* Output operand that is stored before the need for the 3125 input operands (and their index registers) is over. */ 3126 earlyclobber = 1, this_earlyclobber = 1; 3127 break; 3128 3129 case 'E': 3130#ifndef REAL_ARITHMETIC 3131 /* Match any floating double constant, but only if 3132 we can examine the bits of it reliably. */ 3133 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT 3134 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD) 3135 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float) 3136 break; 3137#endif 3138 if (GET_CODE (operand) == CONST_DOUBLE) 3139 win = 1; 3140 break; 3141 3142 case 'F': 3143 if (GET_CODE (operand) == CONST_DOUBLE) 3144 win = 1; 3145 break; 3146 3147 case 'G': 3148 case 'H': 3149 if (GET_CODE (operand) == CONST_DOUBLE 3150 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c)) 3151 win = 1; 3152 break; 3153 3154 case 's': 3155 if (GET_CODE (operand) == CONST_INT 3156 || (GET_CODE (operand) == CONST_DOUBLE 3157 && GET_MODE (operand) == VOIDmode)) 3158 break; 3159 case 'i': 3160 if (CONSTANT_P (operand) 3161#ifdef LEGITIMATE_PIC_OPERAND_P 3162 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)) 3163#endif 3164 ) 3165 win = 1; 3166 break; 3167 3168 case 'n': 3169 if (GET_CODE (operand) == CONST_INT 3170 || (GET_CODE (operand) == CONST_DOUBLE 3171 && GET_MODE (operand) == VOIDmode)) 3172 win = 1; 3173 break; 3174 3175 case 'I': 3176 case 'J': 3177 case 'K': 3178 case 'L': 3179 case 'M': 3180 case 'N': 3181 case 'O': 3182 case 'P': 3183 if (GET_CODE (operand) == CONST_INT 3184 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c)) 3185 win = 1; 3186 break; 3187 3188 case 'X': 3189 win = 1; 3190 break; 3191 3192 case 'g': 3193 if (! force_reload 3194 /* A PLUS is never a valid operand, but reload can make 3195 it from a register when eliminating registers. */ 3196 && GET_CODE (operand) != PLUS 3197 /* A SCRATCH is not a valid operand. */ 3198 && GET_CODE (operand) != SCRATCH 3199#ifdef LEGITIMATE_PIC_OPERAND_P 3200 && (! CONSTANT_P (operand) 3201 || ! flag_pic 3202 || LEGITIMATE_PIC_OPERAND_P (operand)) 3203#endif 3204 && (GENERAL_REGS == ALL_REGS 3205 || GET_CODE (operand) != REG 3206 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER 3207 && reg_renumber[REGNO (operand)] < 0))) 3208 win = 1; 3209 /* Drop through into 'r' case. */ 3210 3211 case 'r': 3212 this_alternative[i] 3213 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS]; 3214 goto reg; 3215 3216 default: 3217 if (REG_CLASS_FROM_LETTER (c) == NO_REGS) 3218 { 3219#ifdef EXTRA_CONSTRAINT 3220 if (EXTRA_CONSTRAINT (operand, c)) 3221 win = 1; 3222#endif 3223 break; 3224 } 3225 3226 this_alternative[i] 3227 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)]; 3228 reg: 3229 if (GET_MODE (operand) == BLKmode) 3230 break; 3231 winreg = 1; 3232 if (GET_CODE (operand) == REG 3233 && reg_fits_class_p (operand, this_alternative[i], 3234 offset, GET_MODE (recog_data.operand[i]))) 3235 win = 1; 3236 break; 3237 } 3238 3239 constraints[i] = p; 3240 3241 /* If this operand could be handled with a reg, 3242 and some reg is allowed, then this operand can be handled. */ 3243 if (winreg && this_alternative[i] != (int) NO_REGS) 3244 badop = 0; 3245 3246 /* Record which operands fit this alternative. */ 3247 this_alternative_earlyclobber[i] = earlyclobber; 3248 if (win && ! force_reload) 3249 this_alternative_win[i] = 1; 3250 else if (did_match && ! force_reload) 3251 this_alternative_match_win[i] = 1; 3252 else 3253 { 3254 int const_to_mem = 0; 3255 3256 this_alternative_offmemok[i] = offmemok; 3257 losers++; 3258 if (badop) 3259 bad = 1; 3260 /* Alternative loses if it has no regs for a reg operand. */ 3261 if (GET_CODE (operand) == REG 3262 && this_alternative[i] == (int) NO_REGS 3263 && this_alternative_matches[i] < 0) 3264 bad = 1; 3265 3266 /* If this is a constant that is reloaded into the desired 3267 class by copying it to memory first, count that as another 3268 reload. This is consistent with other code and is 3269 required to avoid choosing another alternative when 3270 the constant is moved into memory by this function on 3271 an early reload pass. Note that the test here is 3272 precisely the same as in the code below that calls 3273 force_const_mem. */ 3274 if (CONSTANT_P (operand) 3275 /* force_const_mem does not accept HIGH. */ 3276 && GET_CODE (operand) != HIGH 3277 && ((PREFERRED_RELOAD_CLASS (operand, 3278 (enum reg_class) this_alternative[i]) 3279 == NO_REGS) 3280 || no_input_reloads) 3281 && operand_mode[i] != VOIDmode) 3282 { 3283 const_to_mem = 1; 3284 if (this_alternative[i] != (int) NO_REGS) 3285 losers++; 3286 } 3287 3288 /* If we can't reload this value at all, reject this 3289 alternative. Note that we could also lose due to 3290 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that 3291 here. */ 3292 3293 if (! CONSTANT_P (operand) 3294 && (enum reg_class) this_alternative[i] != NO_REGS 3295 && (PREFERRED_RELOAD_CLASS (operand, 3296 (enum reg_class) this_alternative[i]) 3297 == NO_REGS)) 3298 bad = 1; 3299 3300 /* Alternative loses if it requires a type of reload not 3301 permitted for this insn. We can always reload SCRATCH 3302 and objects with a REG_UNUSED note. */ 3303 else if (GET_CODE (operand) != SCRATCH 3304 && modified[i] != RELOAD_READ && no_output_reloads 3305 && ! find_reg_note (insn, REG_UNUSED, operand)) 3306 bad = 1; 3307 else if (modified[i] != RELOAD_WRITE && no_input_reloads 3308 && ! const_to_mem) 3309 bad = 1; 3310 3311 /* We prefer to reload pseudos over reloading other things, 3312 since such reloads may be able to be eliminated later. 3313 If we are reloading a SCRATCH, we won't be generating any 3314 insns, just using a register, so it is also preferred. 3315 So bump REJECT in other cases. Don't do this in the 3316 case where we are forcing a constant into memory and 3317 it will then win since we don't want to have a different 3318 alternative match then. */ 3319 if (! (GET_CODE (operand) == REG 3320 && REGNO (operand) >= FIRST_PSEUDO_REGISTER) 3321 && GET_CODE (operand) != SCRATCH 3322 && ! (const_to_mem && constmemok)) 3323 reject += 2; 3324 3325 /* Input reloads can be inherited more often than output 3326 reloads can be removed, so penalize output reloads. */ 3327 if (operand_type[i] != RELOAD_FOR_INPUT 3328 && GET_CODE (operand) != SCRATCH) 3329 reject++; 3330 } 3331 3332 /* If this operand is a pseudo register that didn't get a hard 3333 reg and this alternative accepts some register, see if the 3334 class that we want is a subset of the preferred class for this 3335 register. If not, but it intersects that class, use the 3336 preferred class instead. If it does not intersect the preferred 3337 class, show that usage of this alternative should be discouraged; 3338 it will be discouraged more still if the register is `preferred 3339 or nothing'. We do this because it increases the chance of 3340 reusing our spill register in a later insn and avoiding a pair 3341 of memory stores and loads. 3342 3343 Don't bother with this if this alternative will accept this 3344 operand. 3345 3346 Don't do this for a multiword operand, since it is only a 3347 small win and has the risk of requiring more spill registers, 3348 which could cause a large loss. 3349 3350 Don't do this if the preferred class has only one register 3351 because we might otherwise exhaust the class. */ 3352 3353 if (! win && ! did_match 3354 && this_alternative[i] != (int) NO_REGS 3355 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 3356 && reg_class_size[(int) preferred_class[i]] > 1) 3357 { 3358 if (! reg_class_subset_p (this_alternative[i], 3359 preferred_class[i])) 3360 { 3361 /* Since we don't have a way of forming the intersection, 3362 we just do something special if the preferred class 3363 is a subset of the class we have; that's the most 3364 common case anyway. */ 3365 if (reg_class_subset_p (preferred_class[i], 3366 this_alternative[i])) 3367 this_alternative[i] = (int) preferred_class[i]; 3368 else 3369 reject += (2 + 2 * pref_or_nothing[i]); 3370 } 3371 } 3372 } 3373 3374 /* Now see if any output operands that are marked "earlyclobber" 3375 in this alternative conflict with any input operands 3376 or any memory addresses. */ 3377 3378 for (i = 0; i < noperands; i++) 3379 if (this_alternative_earlyclobber[i] 3380 && (this_alternative_win[i] || this_alternative_match_win[i])) 3381 { 3382 struct decomposition early_data; 3383 3384 early_data = decompose (recog_data.operand[i]); 3385 3386 if (modified[i] == RELOAD_READ) 3387 abort (); 3388 3389 if (this_alternative[i] == NO_REGS) 3390 { 3391 this_alternative_earlyclobber[i] = 0; 3392 if (this_insn_is_asm) 3393 error_for_asm (this_insn, 3394 "`&' constraint used with no register class"); 3395 else 3396 abort (); 3397 } 3398 3399 for (j = 0; j < noperands; j++) 3400 /* Is this an input operand or a memory ref? */ 3401 if ((GET_CODE (recog_data.operand[j]) == MEM 3402 || modified[j] != RELOAD_WRITE) 3403 && j != i 3404 /* Ignore things like match_operator operands. */ 3405 && *recog_data.constraints[j] != 0 3406 /* Don't count an input operand that is constrained to match 3407 the early clobber operand. */ 3408 && ! (this_alternative_matches[j] == i 3409 && rtx_equal_p (recog_data.operand[i], 3410 recog_data.operand[j])) 3411 /* Is it altered by storing the earlyclobber operand? */ 3412 && !immune_p (recog_data.operand[j], recog_data.operand[i], 3413 early_data)) 3414 { 3415 /* If the output is in a single-reg class, 3416 it's costly to reload it, so reload the input instead. */ 3417 if (reg_class_size[this_alternative[i]] == 1 3418 && (GET_CODE (recog_data.operand[j]) == REG 3419 || GET_CODE (recog_data.operand[j]) == SUBREG)) 3420 { 3421 losers++; 3422 this_alternative_win[j] = 0; 3423 this_alternative_match_win[j] = 0; 3424 } 3425 else 3426 break; 3427 } 3428 /* If an earlyclobber operand conflicts with something, 3429 it must be reloaded, so request this and count the cost. */ 3430 if (j != noperands) 3431 { 3432 losers++; 3433 this_alternative_win[i] = 0; 3434 this_alternative_match_win[j] = 0; 3435 for (j = 0; j < noperands; j++) 3436 if (this_alternative_matches[j] == i 3437 && this_alternative_match_win[j]) 3438 { 3439 this_alternative_win[j] = 0; 3440 this_alternative_match_win[j] = 0; 3441 losers++; 3442 } 3443 } 3444 } 3445 3446 /* If one alternative accepts all the operands, no reload required, 3447 choose that alternative; don't consider the remaining ones. */ 3448 if (losers == 0) 3449 { 3450 /* Unswap these so that they are never swapped at `finish'. */ 3451 if (commutative >= 0) 3452 { 3453 recog_data.operand[commutative] = substed_operand[commutative]; 3454 recog_data.operand[commutative + 1] 3455 = substed_operand[commutative + 1]; 3456 } 3457 for (i = 0; i < noperands; i++) 3458 { 3459 goal_alternative_win[i] = this_alternative_win[i]; 3460 goal_alternative_match_win[i] = this_alternative_match_win[i]; 3461 goal_alternative[i] = this_alternative[i]; 3462 goal_alternative_offmemok[i] = this_alternative_offmemok[i]; 3463 goal_alternative_matches[i] = this_alternative_matches[i]; 3464 goal_alternative_earlyclobber[i] 3465 = this_alternative_earlyclobber[i]; 3466 } 3467 goal_alternative_number = this_alternative_number; 3468 goal_alternative_swapped = swapped; 3469 goal_earlyclobber = this_earlyclobber; 3470 goto finish; 3471 } 3472 3473 /* REJECT, set by the ! and ? constraint characters and when a register 3474 would be reloaded into a non-preferred class, discourages the use of 3475 this alternative for a reload goal. REJECT is incremented by six 3476 for each ? and two for each non-preferred class. */ 3477 losers = losers * 6 + reject; 3478 3479 /* If this alternative can be made to work by reloading, 3480 and it needs less reloading than the others checked so far, 3481 record it as the chosen goal for reloading. */ 3482 if (! bad && best > losers) 3483 { 3484 for (i = 0; i < noperands; i++) 3485 { 3486 goal_alternative[i] = this_alternative[i]; 3487 goal_alternative_win[i] = this_alternative_win[i]; 3488 goal_alternative_match_win[i] = this_alternative_match_win[i]; 3489 goal_alternative_offmemok[i] = this_alternative_offmemok[i]; 3490 goal_alternative_matches[i] = this_alternative_matches[i]; 3491 goal_alternative_earlyclobber[i] 3492 = this_alternative_earlyclobber[i]; 3493 } 3494 goal_alternative_swapped = swapped; 3495 best = losers; 3496 goal_alternative_number = this_alternative_number; 3497 goal_earlyclobber = this_earlyclobber; 3498 } 3499 } 3500 3501 /* If insn is commutative (it's safe to exchange a certain pair of operands) 3502 then we need to try each alternative twice, 3503 the second time matching those two operands 3504 as if we had exchanged them. 3505 To do this, really exchange them in operands. 3506 3507 If we have just tried the alternatives the second time, 3508 return operands to normal and drop through. */ 3509 3510 if (commutative >= 0) 3511 { 3512 swapped = !swapped; 3513 if (swapped) 3514 { 3515 enum reg_class tclass; 3516 int t; 3517 3518 recog_data.operand[commutative] = substed_operand[commutative + 1]; 3519 recog_data.operand[commutative + 1] = substed_operand[commutative]; 3520 /* Swap the duplicates too. */ 3521 for (i = 0; i < recog_data.n_dups; i++) 3522 if (recog_data.dup_num[i] == commutative 3523 || recog_data.dup_num[i] == commutative + 1) 3524 *recog_data.dup_loc[i] 3525 = recog_data.operand[(int) recog_data.dup_num[i]]; 3526 3527 tclass = preferred_class[commutative]; 3528 preferred_class[commutative] = preferred_class[commutative + 1]; 3529 preferred_class[commutative + 1] = tclass; 3530 3531 t = pref_or_nothing[commutative]; 3532 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1]; 3533 pref_or_nothing[commutative + 1] = t; 3534 3535 memcpy (constraints, recog_data.constraints, 3536 noperands * sizeof (char *)); 3537 goto try_swapped; 3538 } 3539 else 3540 { 3541 recog_data.operand[commutative] = substed_operand[commutative]; 3542 recog_data.operand[commutative + 1] 3543 = substed_operand[commutative + 1]; 3544 /* Unswap the duplicates too. */ 3545 for (i = 0; i < recog_data.n_dups; i++) 3546 if (recog_data.dup_num[i] == commutative 3547 || recog_data.dup_num[i] == commutative + 1) 3548 *recog_data.dup_loc[i] 3549 = recog_data.operand[(int) recog_data.dup_num[i]]; 3550 } 3551 } 3552 3553 /* The operands don't meet the constraints. 3554 goal_alternative describes the alternative 3555 that we could reach by reloading the fewest operands. 3556 Reload so as to fit it. */ 3557 3558 if (best == MAX_RECOG_OPERANDS * 2 + 600) 3559 { 3560 /* No alternative works with reloads?? */ 3561 if (insn_code_number >= 0) 3562 fatal_insn ("unable to generate reloads for:", insn); 3563 error_for_asm (insn, "inconsistent operand constraints in an `asm'"); 3564 /* Avoid further trouble with this insn. */ 3565 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 3566 n_reloads = 0; 3567 return 0; 3568 } 3569 3570 /* Jump to `finish' from above if all operands are valid already. 3571 In that case, goal_alternative_win is all 1. */ 3572 finish: 3573 3574 /* Right now, for any pair of operands I and J that are required to match, 3575 with I < J, 3576 goal_alternative_matches[J] is I. 3577 Set up goal_alternative_matched as the inverse function: 3578 goal_alternative_matched[I] = J. */ 3579 3580 for (i = 0; i < noperands; i++) 3581 goal_alternative_matched[i] = -1; 3582 3583 for (i = 0; i < noperands; i++) 3584 if (! goal_alternative_win[i] 3585 && goal_alternative_matches[i] >= 0) 3586 goal_alternative_matched[goal_alternative_matches[i]] = i; 3587 3588 for (i = 0; i < noperands; i++) 3589 goal_alternative_win[i] |= goal_alternative_match_win[i]; 3590 3591 /* If the best alternative is with operands 1 and 2 swapped, 3592 consider them swapped before reporting the reloads. Update the 3593 operand numbers of any reloads already pushed. */ 3594 3595 if (goal_alternative_swapped) 3596 { 3597 rtx tem; 3598 3599 tem = substed_operand[commutative]; 3600 substed_operand[commutative] = substed_operand[commutative + 1]; 3601 substed_operand[commutative + 1] = tem; 3602 tem = recog_data.operand[commutative]; 3603 recog_data.operand[commutative] = recog_data.operand[commutative + 1]; 3604 recog_data.operand[commutative + 1] = tem; 3605 tem = *recog_data.operand_loc[commutative]; 3606 *recog_data.operand_loc[commutative] 3607 = *recog_data.operand_loc[commutative + 1]; 3608 *recog_data.operand_loc[commutative + 1] = tem; 3609 3610 for (i = 0; i < n_reloads; i++) 3611 { 3612 if (rld[i].opnum == commutative) 3613 rld[i].opnum = commutative + 1; 3614 else if (rld[i].opnum == commutative + 1) 3615 rld[i].opnum = commutative; 3616 } 3617 } 3618 3619 for (i = 0; i < noperands; i++) 3620 { 3621 operand_reloadnum[i] = -1; 3622 3623 /* If this is an earlyclobber operand, we need to widen the scope. 3624 The reload must remain valid from the start of the insn being 3625 reloaded until after the operand is stored into its destination. 3626 We approximate this with RELOAD_OTHER even though we know that we 3627 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads. 3628 3629 One special case that is worth checking is when we have an 3630 output that is earlyclobber but isn't used past the insn (typically 3631 a SCRATCH). In this case, we only need have the reload live 3632 through the insn itself, but not for any of our input or output 3633 reloads. 3634 But we must not accidentally narrow the scope of an existing 3635 RELOAD_OTHER reload - leave these alone. 3636 3637 In any case, anything needed to address this operand can remain 3638 however they were previously categorized. */ 3639 3640 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER) 3641 operand_type[i] 3642 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i]) 3643 ? RELOAD_FOR_INSN : RELOAD_OTHER); 3644 } 3645 3646 /* Any constants that aren't allowed and can't be reloaded 3647 into registers are here changed into memory references. */ 3648 for (i = 0; i < noperands; i++) 3649 if (! goal_alternative_win[i] 3650 && CONSTANT_P (recog_data.operand[i]) 3651 /* force_const_mem does not accept HIGH. */ 3652 && GET_CODE (recog_data.operand[i]) != HIGH 3653 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i], 3654 (enum reg_class) goal_alternative[i]) 3655 == NO_REGS) 3656 || no_input_reloads) 3657 && operand_mode[i] != VOIDmode) 3658 { 3659 substed_operand[i] = recog_data.operand[i] 3660 = find_reloads_toplev (force_const_mem (operand_mode[i], 3661 recog_data.operand[i]), 3662 i, address_type[i], ind_levels, 0, insn, 3663 NULL); 3664 if (alternative_allows_memconst (recog_data.constraints[i], 3665 goal_alternative_number)) 3666 goal_alternative_win[i] = 1; 3667 } 3668 3669 /* Record the values of the earlyclobber operands for the caller. */ 3670 if (goal_earlyclobber) 3671 for (i = 0; i < noperands; i++) 3672 if (goal_alternative_earlyclobber[i]) 3673 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i]; 3674 3675 /* Now record reloads for all the operands that need them. */ 3676 for (i = 0; i < noperands; i++) 3677 if (! goal_alternative_win[i]) 3678 { 3679 /* Operands that match previous ones have already been handled. */ 3680 if (goal_alternative_matches[i] >= 0) 3681 ; 3682 /* Handle an operand with a nonoffsettable address 3683 appearing where an offsettable address will do 3684 by reloading the address into a base register. 3685 3686 ??? We can also do this when the operand is a register and 3687 reg_equiv_mem is not offsettable, but this is a bit tricky, 3688 so we don't bother with it. It may not be worth doing. */ 3689 else if (goal_alternative_matched[i] == -1 3690 && goal_alternative_offmemok[i] 3691 && GET_CODE (recog_data.operand[i]) == MEM) 3692 { 3693 operand_reloadnum[i] 3694 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX, 3695 &XEXP (recog_data.operand[i], 0), (rtx*) 0, 3696 MODE_BASE_REG_CLASS (VOIDmode), 3697 GET_MODE (XEXP (recog_data.operand[i], 0)), 3698 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT); 3699 rld[operand_reloadnum[i]].inc 3700 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i])); 3701 3702 /* If this operand is an output, we will have made any 3703 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but 3704 now we are treating part of the operand as an input, so 3705 we must change these to RELOAD_FOR_INPUT_ADDRESS. */ 3706 3707 if (modified[i] == RELOAD_WRITE) 3708 { 3709 for (j = 0; j < n_reloads; j++) 3710 { 3711 if (rld[j].opnum == i) 3712 { 3713 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS) 3714 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS; 3715 else if (rld[j].when_needed 3716 == RELOAD_FOR_OUTADDR_ADDRESS) 3717 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS; 3718 } 3719 } 3720 } 3721 } 3722 else if (goal_alternative_matched[i] == -1) 3723 { 3724 operand_reloadnum[i] 3725 = push_reload ((modified[i] != RELOAD_WRITE 3726 ? recog_data.operand[i] : 0), 3727 (modified[i] != RELOAD_READ 3728 ? recog_data.operand[i] : 0), 3729 (modified[i] != RELOAD_WRITE 3730 ? recog_data.operand_loc[i] : 0), 3731 (modified[i] != RELOAD_READ 3732 ? recog_data.operand_loc[i] : 0), 3733 (enum reg_class) goal_alternative[i], 3734 (modified[i] == RELOAD_WRITE 3735 ? VOIDmode : operand_mode[i]), 3736 (modified[i] == RELOAD_READ 3737 ? VOIDmode : operand_mode[i]), 3738 (insn_code_number < 0 ? 0 3739 : insn_data[insn_code_number].operand[i].strict_low), 3740 0, i, operand_type[i]); 3741 } 3742 /* In a matching pair of operands, one must be input only 3743 and the other must be output only. 3744 Pass the input operand as IN and the other as OUT. */ 3745 else if (modified[i] == RELOAD_READ 3746 && modified[goal_alternative_matched[i]] == RELOAD_WRITE) 3747 { 3748 operand_reloadnum[i] 3749 = push_reload (recog_data.operand[i], 3750 recog_data.operand[goal_alternative_matched[i]], 3751 recog_data.operand_loc[i], 3752 recog_data.operand_loc[goal_alternative_matched[i]], 3753 (enum reg_class) goal_alternative[i], 3754 operand_mode[i], 3755 operand_mode[goal_alternative_matched[i]], 3756 0, 0, i, RELOAD_OTHER); 3757 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum; 3758 } 3759 else if (modified[i] == RELOAD_WRITE 3760 && modified[goal_alternative_matched[i]] == RELOAD_READ) 3761 { 3762 operand_reloadnum[goal_alternative_matched[i]] 3763 = push_reload (recog_data.operand[goal_alternative_matched[i]], 3764 recog_data.operand[i], 3765 recog_data.operand_loc[goal_alternative_matched[i]], 3766 recog_data.operand_loc[i], 3767 (enum reg_class) goal_alternative[i], 3768 operand_mode[goal_alternative_matched[i]], 3769 operand_mode[i], 3770 0, 0, i, RELOAD_OTHER); 3771 operand_reloadnum[i] = output_reloadnum; 3772 } 3773 else if (insn_code_number >= 0) 3774 abort (); 3775 else 3776 { 3777 error_for_asm (insn, "inconsistent operand constraints in an `asm'"); 3778 /* Avoid further trouble with this insn. */ 3779 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 3780 n_reloads = 0; 3781 return 0; 3782 } 3783 } 3784 else if (goal_alternative_matched[i] < 0 3785 && goal_alternative_matches[i] < 0 3786 && optimize) 3787 { 3788 /* For each non-matching operand that's a MEM or a pseudo-register 3789 that didn't get a hard register, make an optional reload. 3790 This may get done even if the insn needs no reloads otherwise. */ 3791 3792 rtx operand = recog_data.operand[i]; 3793 3794 while (GET_CODE (operand) == SUBREG) 3795 operand = SUBREG_REG (operand); 3796 if ((GET_CODE (operand) == MEM 3797 || (GET_CODE (operand) == REG 3798 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 3799 /* If this is only for an output, the optional reload would not 3800 actually cause us to use a register now, just note that 3801 something is stored here. */ 3802 && ((enum reg_class) goal_alternative[i] != NO_REGS 3803 || modified[i] == RELOAD_WRITE) 3804 && ! no_input_reloads 3805 /* An optional output reload might allow to delete INSN later. 3806 We mustn't make in-out reloads on insns that are not permitted 3807 output reloads. 3808 If this is an asm, we can't delete it; we must not even call 3809 push_reload for an optional output reload in this case, 3810 because we can't be sure that the constraint allows a register, 3811 and push_reload verifies the constraints for asms. */ 3812 && (modified[i] == RELOAD_READ 3813 || (! no_output_reloads && ! this_insn_is_asm))) 3814 operand_reloadnum[i] 3815 = push_reload ((modified[i] != RELOAD_WRITE 3816 ? recog_data.operand[i] : 0), 3817 (modified[i] != RELOAD_READ 3818 ? recog_data.operand[i] : 0), 3819 (modified[i] != RELOAD_WRITE 3820 ? recog_data.operand_loc[i] : 0), 3821 (modified[i] != RELOAD_READ 3822 ? recog_data.operand_loc[i] : 0), 3823 (enum reg_class) goal_alternative[i], 3824 (modified[i] == RELOAD_WRITE 3825 ? VOIDmode : operand_mode[i]), 3826 (modified[i] == RELOAD_READ 3827 ? VOIDmode : operand_mode[i]), 3828 (insn_code_number < 0 ? 0 3829 : insn_data[insn_code_number].operand[i].strict_low), 3830 1, i, operand_type[i]); 3831 /* If a memory reference remains (either as a MEM or a pseudo that 3832 did not get a hard register), yet we can't make an optional 3833 reload, check if this is actually a pseudo register reference; 3834 we then need to emit a USE and/or a CLOBBER so that reload 3835 inheritance will do the right thing. */ 3836 else if (replace 3837 && (GET_CODE (operand) == MEM 3838 || (GET_CODE (operand) == REG 3839 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3840 && reg_renumber [REGNO (operand)] < 0))) 3841 { 3842 operand = *recog_data.operand_loc[i]; 3843 3844 while (GET_CODE (operand) == SUBREG) 3845 operand = SUBREG_REG (operand); 3846 if (GET_CODE (operand) == REG) 3847 { 3848 if (modified[i] != RELOAD_WRITE) 3849 /* We mark the USE with QImode so that we recognize 3850 it as one that can be safely deleted at the end 3851 of reload. */ 3852 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand), 3853 insn), QImode); 3854 if (modified[i] != RELOAD_READ) 3855 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn); 3856 } 3857 } 3858 } 3859 else if (goal_alternative_matches[i] >= 0 3860 && goal_alternative_win[goal_alternative_matches[i]] 3861 && modified[i] == RELOAD_READ 3862 && modified[goal_alternative_matches[i]] == RELOAD_WRITE 3863 && ! no_input_reloads && ! no_output_reloads 3864 && optimize) 3865 { 3866 /* Similarly, make an optional reload for a pair of matching 3867 objects that are in MEM or a pseudo that didn't get a hard reg. */ 3868 3869 rtx operand = recog_data.operand[i]; 3870 3871 while (GET_CODE (operand) == SUBREG) 3872 operand = SUBREG_REG (operand); 3873 if ((GET_CODE (operand) == MEM 3874 || (GET_CODE (operand) == REG 3875 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 3876 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]] 3877 != NO_REGS)) 3878 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]] 3879 = push_reload (recog_data.operand[goal_alternative_matches[i]], 3880 recog_data.operand[i], 3881 recog_data.operand_loc[goal_alternative_matches[i]], 3882 recog_data.operand_loc[i], 3883 (enum reg_class) goal_alternative[goal_alternative_matches[i]], 3884 operand_mode[goal_alternative_matches[i]], 3885 operand_mode[i], 3886 0, 1, goal_alternative_matches[i], RELOAD_OTHER); 3887 } 3888 3889 /* Perform whatever substitutions on the operands we are supposed 3890 to make due to commutativity or replacement of registers 3891 with equivalent constants or memory slots. */ 3892 3893 for (i = 0; i < noperands; i++) 3894 { 3895 /* We only do this on the last pass through reload, because it is 3896 possible for some data (like reg_equiv_address) to be changed during 3897 later passes. Moreover, we loose the opportunity to get a useful 3898 reload_{in,out}_reg when we do these replacements. */ 3899 3900 if (replace) 3901 { 3902 rtx substitution = substed_operand[i]; 3903 3904 *recog_data.operand_loc[i] = substitution; 3905 3906 /* If we're replacing an operand with a LABEL_REF, we need 3907 to make sure that there's a REG_LABEL note attached to 3908 this instruction. */ 3909 if (GET_CODE (insn) != JUMP_INSN 3910 && GET_CODE (substitution) == LABEL_REF 3911 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0))) 3912 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, 3913 XEXP (substitution, 0), 3914 REG_NOTES (insn)); 3915 } 3916 else 3917 retval |= (substed_operand[i] != *recog_data.operand_loc[i]); 3918 } 3919 3920 /* If this insn pattern contains any MATCH_DUP's, make sure that 3921 they will be substituted if the operands they match are substituted. 3922 Also do now any substitutions we already did on the operands. 3923 3924 Don't do this if we aren't making replacements because we might be 3925 propagating things allocated by frame pointer elimination into places 3926 it doesn't expect. */ 3927 3928 if (insn_code_number >= 0 && replace) 3929 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--) 3930 { 3931 int opno = recog_data.dup_num[i]; 3932 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno]; 3933 if (operand_reloadnum[opno] >= 0) 3934 push_replacement (recog_data.dup_loc[i], operand_reloadnum[opno], 3935 insn_data[insn_code_number].operand[opno].mode); 3936 } 3937 3938#if 0 3939 /* This loses because reloading of prior insns can invalidate the equivalence 3940 (or at least find_equiv_reg isn't smart enough to find it any more), 3941 causing this insn to need more reload regs than it needed before. 3942 It may be too late to make the reload regs available. 3943 Now this optimization is done safely in choose_reload_regs. */ 3944 3945 /* For each reload of a reg into some other class of reg, 3946 search for an existing equivalent reg (same value now) in the right class. 3947 We can use it as long as we don't need to change its contents. */ 3948 for (i = 0; i < n_reloads; i++) 3949 if (rld[i].reg_rtx == 0 3950 && rld[i].in != 0 3951 && GET_CODE (rld[i].in) == REG 3952 && rld[i].out == 0) 3953 { 3954 rld[i].reg_rtx 3955 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1, 3956 static_reload_reg_p, 0, rld[i].inmode); 3957 /* Prevent generation of insn to load the value 3958 because the one we found already has the value. */ 3959 if (rld[i].reg_rtx) 3960 rld[i].in = rld[i].reg_rtx; 3961 } 3962#endif 3963 3964 /* Perhaps an output reload can be combined with another 3965 to reduce needs by one. */ 3966 if (!goal_earlyclobber) 3967 combine_reloads (); 3968 3969 /* If we have a pair of reloads for parts of an address, they are reloading 3970 the same object, the operands themselves were not reloaded, and they 3971 are for two operands that are supposed to match, merge the reloads and 3972 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */ 3973 3974 for (i = 0; i < n_reloads; i++) 3975 { 3976 int k; 3977 3978 for (j = i + 1; j < n_reloads; j++) 3979 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS 3980 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 3981 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS 3982 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 3983 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS 3984 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 3985 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS 3986 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 3987 && rtx_equal_p (rld[i].in, rld[j].in) 3988 && (operand_reloadnum[rld[i].opnum] < 0 3989 || rld[operand_reloadnum[rld[i].opnum]].optional) 3990 && (operand_reloadnum[rld[j].opnum] < 0 3991 || rld[operand_reloadnum[rld[j].opnum]].optional) 3992 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum 3993 || (goal_alternative_matches[rld[j].opnum] 3994 == rld[i].opnum))) 3995 { 3996 for (k = 0; k < n_replacements; k++) 3997 if (replacements[k].what == j) 3998 replacements[k].what = i; 3999 4000 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4001 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4002 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR; 4003 else 4004 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS; 4005 rld[j].in = 0; 4006 } 4007 } 4008 4009 /* Scan all the reloads and update their type. 4010 If a reload is for the address of an operand and we didn't reload 4011 that operand, change the type. Similarly, change the operand number 4012 of a reload when two operands match. If a reload is optional, treat it 4013 as though the operand isn't reloaded. 4014 4015 ??? This latter case is somewhat odd because if we do the optional 4016 reload, it means the object is hanging around. Thus we need only 4017 do the address reload if the optional reload was NOT done. 4018 4019 Change secondary reloads to be the address type of their operand, not 4020 the normal type. 4021 4022 If an operand's reload is now RELOAD_OTHER, change any 4023 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to 4024 RELOAD_FOR_OTHER_ADDRESS. */ 4025 4026 for (i = 0; i < n_reloads; i++) 4027 { 4028 if (rld[i].secondary_p 4029 && rld[i].when_needed == operand_type[rld[i].opnum]) 4030 rld[i].when_needed = address_type[rld[i].opnum]; 4031 4032 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS 4033 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 4034 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4035 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4036 && (operand_reloadnum[rld[i].opnum] < 0 4037 || rld[operand_reloadnum[rld[i].opnum]].optional)) 4038 { 4039 /* If we have a secondary reload to go along with this reload, 4040 change its type to RELOAD_FOR_OPADDR_ADDR. */ 4041 4042 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS 4043 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS) 4044 && rld[i].secondary_in_reload != -1) 4045 { 4046 int secondary_in_reload = rld[i].secondary_in_reload; 4047 4048 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR; 4049 4050 /* If there's a tertiary reload we have to change it also. */ 4051 if (secondary_in_reload > 0 4052 && rld[secondary_in_reload].secondary_in_reload != -1) 4053 rld[rld[secondary_in_reload].secondary_in_reload].when_needed 4054 = RELOAD_FOR_OPADDR_ADDR; 4055 } 4056 4057 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 4058 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4059 && rld[i].secondary_out_reload != -1) 4060 { 4061 int secondary_out_reload = rld[i].secondary_out_reload; 4062 4063 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR; 4064 4065 /* If there's a tertiary reload we have to change it also. */ 4066 if (secondary_out_reload 4067 && rld[secondary_out_reload].secondary_out_reload != -1) 4068 rld[rld[secondary_out_reload].secondary_out_reload].when_needed 4069 = RELOAD_FOR_OPADDR_ADDR; 4070 } 4071 4072 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4073 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4074 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR; 4075 else 4076 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS; 4077 } 4078 4079 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS 4080 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS) 4081 && operand_reloadnum[rld[i].opnum] >= 0 4082 && (rld[operand_reloadnum[rld[i].opnum]].when_needed 4083 == RELOAD_OTHER)) 4084 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS; 4085 4086 if (goal_alternative_matches[rld[i].opnum] >= 0) 4087 rld[i].opnum = goal_alternative_matches[rld[i].opnum]; 4088 } 4089 4090 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads. 4091 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR 4092 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads. 4093 4094 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never 4095 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a 4096 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads. 4097 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload, 4098 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all 4099 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it. 4100 This is complicated by the fact that a single operand can have more 4101 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix 4102 choose_reload_regs without affecting code quality, and cases that 4103 actually fail are extremely rare, so it turns out to be better to fix 4104 the problem here by not generating cases that choose_reload_regs will 4105 fail for. */ 4106 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS / 4107 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for 4108 a single operand. 4109 We can reduce the register pressure by exploiting that a 4110 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads 4111 does not conflict with any of them, if it is only used for the first of 4112 the RELOAD_FOR_X_ADDRESS reloads. */ 4113 { 4114 int first_op_addr_num = -2; 4115 int first_inpaddr_num[MAX_RECOG_OPERANDS]; 4116 int first_outpaddr_num[MAX_RECOG_OPERANDS]; 4117 int need_change = 0; 4118 /* We use last_op_addr_reload and the contents of the above arrays 4119 first as flags - -2 means no instance encountered, -1 means exactly 4120 one instance encountered. 4121 If more than one instance has been encountered, we store the reload 4122 number of the first reload of the kind in question; reload numbers 4123 are known to be non-negative. */ 4124 for (i = 0; i < noperands; i++) 4125 first_inpaddr_num[i] = first_outpaddr_num[i] = -2; 4126 for (i = n_reloads - 1; i >= 0; i--) 4127 { 4128 switch (rld[i].when_needed) 4129 { 4130 case RELOAD_FOR_OPERAND_ADDRESS: 4131 if (++first_op_addr_num >= 0) 4132 { 4133 first_op_addr_num = i; 4134 need_change = 1; 4135 } 4136 break; 4137 case RELOAD_FOR_INPUT_ADDRESS: 4138 if (++first_inpaddr_num[rld[i].opnum] >= 0) 4139 { 4140 first_inpaddr_num[rld[i].opnum] = i; 4141 need_change = 1; 4142 } 4143 break; 4144 case RELOAD_FOR_OUTPUT_ADDRESS: 4145 if (++first_outpaddr_num[rld[i].opnum] >= 0) 4146 { 4147 first_outpaddr_num[rld[i].opnum] = i; 4148 need_change = 1; 4149 } 4150 break; 4151 default: 4152 break; 4153 } 4154 } 4155 4156 if (need_change) 4157 { 4158 for (i = 0; i < n_reloads; i++) 4159 { 4160 int first_num; 4161 enum reload_type type; 4162 4163 switch (rld[i].when_needed) 4164 { 4165 case RELOAD_FOR_OPADDR_ADDR: 4166 first_num = first_op_addr_num; 4167 type = RELOAD_FOR_OPERAND_ADDRESS; 4168 break; 4169 case RELOAD_FOR_INPADDR_ADDRESS: 4170 first_num = first_inpaddr_num[rld[i].opnum]; 4171 type = RELOAD_FOR_INPUT_ADDRESS; 4172 break; 4173 case RELOAD_FOR_OUTADDR_ADDRESS: 4174 first_num = first_outpaddr_num[rld[i].opnum]; 4175 type = RELOAD_FOR_OUTPUT_ADDRESS; 4176 break; 4177 default: 4178 continue; 4179 } 4180 if (first_num < 0) 4181 continue; 4182 else if (i > first_num) 4183 rld[i].when_needed = type; 4184 else 4185 { 4186 /* Check if the only TYPE reload that uses reload I is 4187 reload FIRST_NUM. */ 4188 for (j = n_reloads - 1; j > first_num; j--) 4189 { 4190 if (rld[j].when_needed == type 4191 && (rld[i].secondary_p 4192 ? rld[j].secondary_in_reload == i 4193 : reg_mentioned_p (rld[i].in, rld[j].in))) 4194 { 4195 rld[i].when_needed = type; 4196 break; 4197 } 4198 } 4199 } 4200 } 4201 } 4202 } 4203 4204 /* See if we have any reloads that are now allowed to be merged 4205 because we've changed when the reload is needed to 4206 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only 4207 check for the most common cases. */ 4208 4209 for (i = 0; i < n_reloads; i++) 4210 if (rld[i].in != 0 && rld[i].out == 0 4211 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS 4212 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR 4213 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS)) 4214 for (j = 0; j < n_reloads; j++) 4215 if (i != j && rld[j].in != 0 && rld[j].out == 0 4216 && rld[j].when_needed == rld[i].when_needed 4217 && MATCHES (rld[i].in, rld[j].in) 4218 && rld[i].class == rld[j].class 4219 && !rld[i].nocombine && !rld[j].nocombine 4220 && rld[i].reg_rtx == rld[j].reg_rtx) 4221 { 4222 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum); 4223 transfer_replacements (i, j); 4224 rld[j].in = 0; 4225 } 4226 4227#ifdef HAVE_cc0 4228 /* If we made any reloads for addresses, see if they violate a 4229 "no input reloads" requirement for this insn. But loads that we 4230 do after the insn (such as for output addresses) are fine. */ 4231 if (no_input_reloads) 4232 for (i = 0; i < n_reloads; i++) 4233 if (rld[i].in != 0 4234 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS 4235 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS) 4236 abort (); 4237#endif 4238 4239 /* Compute reload_mode and reload_nregs. */ 4240 for (i = 0; i < n_reloads; i++) 4241 { 4242 rld[i].mode 4243 = (rld[i].inmode == VOIDmode 4244 || (GET_MODE_SIZE (rld[i].outmode) 4245 > GET_MODE_SIZE (rld[i].inmode))) 4246 ? rld[i].outmode : rld[i].inmode; 4247 4248 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode); 4249 } 4250 4251 /* Special case a simple move with an input reload and a 4252 destination of a hard reg, if the hard reg is ok, use it. */ 4253 for (i = 0; i < n_reloads; i++) 4254 if (rld[i].when_needed == RELOAD_FOR_INPUT 4255 && GET_CODE (PATTERN (insn)) == SET 4256 && GET_CODE (SET_DEST (PATTERN (insn))) == REG 4257 && SET_SRC (PATTERN (insn)) == rld[i].in) 4258 { 4259 rtx dest = SET_DEST (PATTERN (insn)); 4260 unsigned int regno = REGNO (dest); 4261 4262 if (regno < FIRST_PSEUDO_REGISTER 4263 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno) 4264 && HARD_REGNO_MODE_OK (regno, rld[i].mode)) 4265 rld[i].reg_rtx = dest; 4266 } 4267 4268 return retval; 4269} 4270 4271/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT 4272 accepts a memory operand with constant address. */ 4273 4274static int 4275alternative_allows_memconst (constraint, altnum) 4276 const char *constraint; 4277 int altnum; 4278{ 4279 int c; 4280 /* Skip alternatives before the one requested. */ 4281 while (altnum > 0) 4282 { 4283 while (*constraint++ != ','); 4284 altnum--; 4285 } 4286 /* Scan the requested alternative for 'm' or 'o'. 4287 If one of them is present, this alternative accepts memory constants. */ 4288 while ((c = *constraint++) && c != ',' && c != '#') 4289 if (c == 'm' || c == 'o') 4290 return 1; 4291 return 0; 4292} 4293 4294/* Scan X for memory references and scan the addresses for reloading. 4295 Also checks for references to "constant" regs that we want to eliminate 4296 and replaces them with the values they stand for. 4297 We may alter X destructively if it contains a reference to such. 4298 If X is just a constant reg, we return the equivalent value 4299 instead of X. 4300 4301 IND_LEVELS says how many levels of indirect addressing this machine 4302 supports. 4303 4304 OPNUM and TYPE identify the purpose of the reload. 4305 4306 IS_SET_DEST is true if X is the destination of a SET, which is not 4307 appropriate to be replaced by a constant. 4308 4309 INSN, if nonzero, is the insn in which we do the reload. It is used 4310 to determine if we may generate output reloads, and where to put USEs 4311 for pseudos that we have to replace with stack slots. 4312 4313 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the 4314 result of find_reloads_address. */ 4315 4316static rtx 4317find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn, 4318 address_reloaded) 4319 rtx x; 4320 int opnum; 4321 enum reload_type type; 4322 int ind_levels; 4323 int is_set_dest; 4324 rtx insn; 4325 int *address_reloaded; 4326{ 4327 RTX_CODE code = GET_CODE (x); 4328 4329 const char *fmt = GET_RTX_FORMAT (code); 4330 int i; 4331 int copied; 4332 4333 if (code == REG) 4334 { 4335 /* This code is duplicated for speed in find_reloads. */ 4336 int regno = REGNO (x); 4337 if (reg_equiv_constant[regno] != 0 && !is_set_dest) 4338 x = reg_equiv_constant[regno]; 4339#if 0 4340 /* This creates (subreg (mem...)) which would cause an unnecessary 4341 reload of the mem. */ 4342 else if (reg_equiv_mem[regno] != 0) 4343 x = reg_equiv_mem[regno]; 4344#endif 4345 else if (reg_equiv_memory_loc[regno] 4346 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 4347 { 4348 rtx mem = make_memloc (x, regno); 4349 if (reg_equiv_address[regno] 4350 || ! rtx_equal_p (mem, reg_equiv_mem[regno])) 4351 { 4352 /* If this is not a toplevel operand, find_reloads doesn't see 4353 this substitution. We have to emit a USE of the pseudo so 4354 that delete_output_reload can see it. */ 4355 if (replace_reloads && recog_data.operand[opnum] != x) 4356 /* We mark the USE with QImode so that we recognize it 4357 as one that can be safely deleted at the end of 4358 reload. */ 4359 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn), 4360 QImode); 4361 x = mem; 4362 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0), 4363 opnum, type, ind_levels, insn); 4364 if (address_reloaded) 4365 *address_reloaded = i; 4366 } 4367 } 4368 return x; 4369 } 4370 if (code == MEM) 4371 { 4372 rtx tem = x; 4373 4374 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0), 4375 opnum, type, ind_levels, insn); 4376 if (address_reloaded) 4377 *address_reloaded = i; 4378 4379 return tem; 4380 } 4381 4382 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG) 4383 { 4384 /* Check for SUBREG containing a REG that's equivalent to a constant. 4385 If the constant has a known value, truncate it right now. 4386 Similarly if we are extracting a single-word of a multi-word 4387 constant. If the constant is symbolic, allow it to be substituted 4388 normally. push_reload will strip the subreg later. If the 4389 constant is VOIDmode, abort because we will lose the mode of 4390 the register (this should never happen because one of the cases 4391 above should handle it). */ 4392 4393 int regno = REGNO (SUBREG_REG (x)); 4394 rtx tem; 4395 4396 if (subreg_lowpart_p (x) 4397 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4398 && reg_equiv_constant[regno] != 0 4399 && (tem = gen_lowpart_common (GET_MODE (x), 4400 reg_equiv_constant[regno])) != 0) 4401 return tem; 4402 4403 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD 4404 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4405 && reg_equiv_constant[regno] != 0 4406 && (tem = operand_subword (reg_equiv_constant[regno], 4407 SUBREG_BYTE (x) / UNITS_PER_WORD, 0, 4408 GET_MODE (SUBREG_REG (x)))) != 0) 4409 { 4410 /* TEM is now a word sized constant for the bits from X that 4411 we wanted. However, TEM may be the wrong representation. 4412 4413 Use gen_lowpart_common to convert a CONST_INT into a 4414 CONST_DOUBLE and vice versa as needed according to by the mode 4415 of the SUBREG. */ 4416 tem = gen_lowpart_common (GET_MODE (x), tem); 4417 if (!tem) 4418 abort (); 4419 return tem; 4420 } 4421 4422 /* If the SUBREG is wider than a word, the above test will fail. 4423 For example, we might have a SImode SUBREG of a DImode SUBREG_REG 4424 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for 4425 a 32 bit target. We still can - and have to - handle this 4426 for non-paradoxical subregs of CONST_INTs. */ 4427 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4428 && reg_equiv_constant[regno] != 0 4429 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT 4430 && (GET_MODE_SIZE (GET_MODE (x)) 4431 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))) 4432 { 4433 int shift = SUBREG_BYTE (x) * BITS_PER_UNIT; 4434 if (WORDS_BIG_ENDIAN) 4435 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) 4436 - GET_MODE_BITSIZE (GET_MODE (x)) 4437 - shift); 4438 /* Here we use the knowledge that CONST_INTs have a 4439 HOST_WIDE_INT field. */ 4440 if (shift >= HOST_BITS_PER_WIDE_INT) 4441 shift = HOST_BITS_PER_WIDE_INT - 1; 4442 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift); 4443 } 4444 4445 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4446 && reg_equiv_constant[regno] != 0 4447 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode) 4448 abort (); 4449 4450 /* If the subreg contains a reg that will be converted to a mem, 4451 convert the subreg to a narrower memref now. 4452 Otherwise, we would get (subreg (mem ...) ...), 4453 which would force reload of the mem. 4454 4455 We also need to do this if there is an equivalent MEM that is 4456 not offsettable. In that case, alter_subreg would produce an 4457 invalid address on big-endian machines. 4458 4459 For machines that extend byte loads, we must not reload using 4460 a wider mode if we have a paradoxical SUBREG. find_reloads will 4461 force a reload in that case. So we should not do anything here. */ 4462 4463 else if (regno >= FIRST_PSEUDO_REGISTER 4464#ifdef LOAD_EXTEND_OP 4465 && (GET_MODE_SIZE (GET_MODE (x)) 4466 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) 4467#endif 4468 && (reg_equiv_address[regno] != 0 4469 || (reg_equiv_mem[regno] != 0 4470 && (! strict_memory_address_p (GET_MODE (x), 4471 XEXP (reg_equiv_mem[regno], 0)) 4472 || ! offsettable_memref_p (reg_equiv_mem[regno]) 4473 || num_not_at_initial_offset)))) 4474 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels, 4475 insn); 4476 } 4477 4478 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 4479 { 4480 if (fmt[i] == 'e') 4481 { 4482 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type, 4483 ind_levels, is_set_dest, insn, 4484 address_reloaded); 4485 /* If we have replaced a reg with it's equivalent memory loc - 4486 that can still be handled here e.g. if it's in a paradoxical 4487 subreg - we must make the change in a copy, rather than using 4488 a destructive change. This way, find_reloads can still elect 4489 not to do the change. */ 4490 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied) 4491 { 4492 x = shallow_copy_rtx (x); 4493 copied = 1; 4494 } 4495 XEXP (x, i) = new_part; 4496 } 4497 } 4498 return x; 4499} 4500 4501/* Return a mem ref for the memory equivalent of reg REGNO. 4502 This mem ref is not shared with anything. */ 4503 4504static rtx 4505make_memloc (ad, regno) 4506 rtx ad; 4507 int regno; 4508{ 4509 /* We must rerun eliminate_regs, in case the elimination 4510 offsets have changed. */ 4511 rtx tem 4512 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0); 4513 4514 /* If TEM might contain a pseudo, we must copy it to avoid 4515 modifying it when we do the substitution for the reload. */ 4516 if (rtx_varies_p (tem, 0)) 4517 tem = copy_rtx (tem); 4518 4519 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem); 4520 tem = adjust_address_nv (tem, GET_MODE (ad), 0); 4521 4522 /* Copy the result if it's still the same as the equivalence, to avoid 4523 modifying it when we do the substitution for the reload. */ 4524 if (tem == reg_equiv_memory_loc[regno]) 4525 tem = copy_rtx (tem); 4526 return tem; 4527} 4528 4529/* Record all reloads needed for handling memory address AD 4530 which appears in *LOC in a memory reference to mode MODE 4531 which itself is found in location *MEMREFLOC. 4532 Note that we take shortcuts assuming that no multi-reg machine mode 4533 occurs as part of an address. 4534 4535 OPNUM and TYPE specify the purpose of this reload. 4536 4537 IND_LEVELS says how many levels of indirect addressing this machine 4538 supports. 4539 4540 INSN, if nonzero, is the insn in which we do the reload. It is used 4541 to determine if we may generate output reloads, and where to put USEs 4542 for pseudos that we have to replace with stack slots. 4543 4544 Value is nonzero if this address is reloaded or replaced as a whole. 4545 This is interesting to the caller if the address is an autoincrement. 4546 4547 Note that there is no verification that the address will be valid after 4548 this routine does its work. Instead, we rely on the fact that the address 4549 was valid when reload started. So we need only undo things that reload 4550 could have broken. These are wrong register types, pseudos not allocated 4551 to a hard register, and frame pointer elimination. */ 4552 4553static int 4554find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn) 4555 enum machine_mode mode; 4556 rtx *memrefloc; 4557 rtx ad; 4558 rtx *loc; 4559 int opnum; 4560 enum reload_type type; 4561 int ind_levels; 4562 rtx insn; 4563{ 4564 int regno; 4565 int removed_and = 0; 4566 rtx tem; 4567 4568 /* If the address is a register, see if it is a legitimate address and 4569 reload if not. We first handle the cases where we need not reload 4570 or where we must reload in a non-standard way. */ 4571 4572 if (GET_CODE (ad) == REG) 4573 { 4574 regno = REGNO (ad); 4575 4576 /* If the register is equivalent to an invariant expression, substitute 4577 the invariant, and eliminate any eliminable register references. */ 4578 tem = reg_equiv_constant[regno]; 4579 if (tem != 0 4580 && (tem = eliminate_regs (tem, mode, insn)) 4581 && strict_memory_address_p (mode, tem)) 4582 { 4583 *loc = ad = tem; 4584 return 0; 4585 } 4586 4587 tem = reg_equiv_memory_loc[regno]; 4588 if (tem != 0) 4589 { 4590 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset) 4591 { 4592 tem = make_memloc (ad, regno); 4593 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0))) 4594 { 4595 find_reloads_address (GET_MODE (tem), (rtx*) 0, XEXP (tem, 0), 4596 &XEXP (tem, 0), opnum, ADDR_TYPE (type), 4597 ind_levels, insn); 4598 } 4599 /* We can avoid a reload if the register's equivalent memory 4600 expression is valid as an indirect memory address. 4601 But not all addresses are valid in a mem used as an indirect 4602 address: only reg or reg+constant. */ 4603 4604 if (ind_levels > 0 4605 && strict_memory_address_p (mode, tem) 4606 && (GET_CODE (XEXP (tem, 0)) == REG 4607 || (GET_CODE (XEXP (tem, 0)) == PLUS 4608 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG 4609 && CONSTANT_P (XEXP (XEXP (tem, 0), 1))))) 4610 { 4611 /* TEM is not the same as what we'll be replacing the 4612 pseudo with after reload, put a USE in front of INSN 4613 in the final reload pass. */ 4614 if (replace_reloads 4615 && num_not_at_initial_offset 4616 && ! rtx_equal_p (tem, reg_equiv_mem[regno])) 4617 { 4618 *loc = tem; 4619 /* We mark the USE with QImode so that we 4620 recognize it as one that can be safely 4621 deleted at the end of reload. */ 4622 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), 4623 insn), QImode); 4624 4625 /* This doesn't really count as replacing the address 4626 as a whole, since it is still a memory access. */ 4627 } 4628 return 0; 4629 } 4630 ad = tem; 4631 } 4632 } 4633 4634 /* The only remaining case where we can avoid a reload is if this is a 4635 hard register that is valid as a base register and which is not the 4636 subject of a CLOBBER in this insn. */ 4637 4638 else if (regno < FIRST_PSEUDO_REGISTER 4639 && REGNO_MODE_OK_FOR_BASE_P (regno, mode) 4640 && ! regno_clobbered_p (regno, this_insn, mode, 0)) 4641 return 0; 4642 4643 /* If we do not have one of the cases above, we must do the reload. */ 4644 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode), 4645 GET_MODE (ad), VOIDmode, 0, 0, opnum, type); 4646 return 1; 4647 } 4648 4649 if (strict_memory_address_p (mode, ad)) 4650 { 4651 /* The address appears valid, so reloads are not needed. 4652 But the address may contain an eliminable register. 4653 This can happen because a machine with indirect addressing 4654 may consider a pseudo register by itself a valid address even when 4655 it has failed to get a hard reg. 4656 So do a tree-walk to find and eliminate all such regs. */ 4657 4658 /* But first quickly dispose of a common case. */ 4659 if (GET_CODE (ad) == PLUS 4660 && GET_CODE (XEXP (ad, 1)) == CONST_INT 4661 && GET_CODE (XEXP (ad, 0)) == REG 4662 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0) 4663 return 0; 4664 4665 subst_reg_equivs_changed = 0; 4666 *loc = subst_reg_equivs (ad, insn); 4667 4668 if (! subst_reg_equivs_changed) 4669 return 0; 4670 4671 /* Check result for validity after substitution. */ 4672 if (strict_memory_address_p (mode, ad)) 4673 return 0; 4674 } 4675 4676#ifdef LEGITIMIZE_RELOAD_ADDRESS 4677 do 4678 { 4679 if (memrefloc) 4680 { 4681 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type, 4682 ind_levels, win); 4683 } 4684 break; 4685 win: 4686 *memrefloc = copy_rtx (*memrefloc); 4687 XEXP (*memrefloc, 0) = ad; 4688 move_replacements (&ad, &XEXP (*memrefloc, 0)); 4689 return 1; 4690 } 4691 while (0); 4692#endif 4693 4694 /* The address is not valid. We have to figure out why. First see if 4695 we have an outer AND and remove it if so. Then analyze what's inside. */ 4696 4697 if (GET_CODE (ad) == AND) 4698 { 4699 removed_and = 1; 4700 loc = &XEXP (ad, 0); 4701 ad = *loc; 4702 } 4703 4704 /* One possibility for why the address is invalid is that it is itself 4705 a MEM. This can happen when the frame pointer is being eliminated, a 4706 pseudo is not allocated to a hard register, and the offset between the 4707 frame and stack pointers is not its initial value. In that case the 4708 pseudo will have been replaced by a MEM referring to the 4709 stack pointer. */ 4710 if (GET_CODE (ad) == MEM) 4711 { 4712 /* First ensure that the address in this MEM is valid. Then, unless 4713 indirect addresses are valid, reload the MEM into a register. */ 4714 tem = ad; 4715 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0), 4716 opnum, ADDR_TYPE (type), 4717 ind_levels == 0 ? 0 : ind_levels - 1, insn); 4718 4719 /* If tem was changed, then we must create a new memory reference to 4720 hold it and store it back into memrefloc. */ 4721 if (tem != ad && memrefloc) 4722 { 4723 *memrefloc = copy_rtx (*memrefloc); 4724 copy_replacements (tem, XEXP (*memrefloc, 0)); 4725 loc = &XEXP (*memrefloc, 0); 4726 if (removed_and) 4727 loc = &XEXP (*loc, 0); 4728 } 4729 4730 /* Check similar cases as for indirect addresses as above except 4731 that we can allow pseudos and a MEM since they should have been 4732 taken care of above. */ 4733 4734 if (ind_levels == 0 4735 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok) 4736 || GET_CODE (XEXP (tem, 0)) == MEM 4737 || ! (GET_CODE (XEXP (tem, 0)) == REG 4738 || (GET_CODE (XEXP (tem, 0)) == PLUS 4739 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG 4740 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT))) 4741 { 4742 /* Must use TEM here, not AD, since it is the one that will 4743 have any subexpressions reloaded, if needed. */ 4744 push_reload (tem, NULL_RTX, loc, (rtx*) 0, 4745 MODE_BASE_REG_CLASS (mode), GET_MODE (tem), 4746 VOIDmode, 0, 4747 0, opnum, type); 4748 return ! removed_and; 4749 } 4750 else 4751 return 0; 4752 } 4753 4754 /* If we have address of a stack slot but it's not valid because the 4755 displacement is too large, compute the sum in a register. 4756 Handle all base registers here, not just fp/ap/sp, because on some 4757 targets (namely SH) we can also get too large displacements from 4758 big-endian corrections. */ 4759 else if (GET_CODE (ad) == PLUS 4760 && GET_CODE (XEXP (ad, 0)) == REG 4761 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER 4762 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode) 4763 && GET_CODE (XEXP (ad, 1)) == CONST_INT) 4764 { 4765 /* Unshare the MEM rtx so we can safely alter it. */ 4766 if (memrefloc) 4767 { 4768 *memrefloc = copy_rtx (*memrefloc); 4769 loc = &XEXP (*memrefloc, 0); 4770 if (removed_and) 4771 loc = &XEXP (*loc, 0); 4772 } 4773 4774 if (double_reg_address_ok) 4775 { 4776 /* Unshare the sum as well. */ 4777 *loc = ad = copy_rtx (ad); 4778 4779 /* Reload the displacement into an index reg. 4780 We assume the frame pointer or arg pointer is a base reg. */ 4781 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), 4782 INDEX_REG_CLASS, GET_MODE (ad), opnum, 4783 type, ind_levels); 4784 return 0; 4785 } 4786 else 4787 { 4788 /* If the sum of two regs is not necessarily valid, 4789 reload the sum into a base reg. 4790 That will at least work. */ 4791 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode), 4792 Pmode, opnum, type, ind_levels); 4793 } 4794 return ! removed_and; 4795 } 4796 4797 /* If we have an indexed stack slot, there are three possible reasons why 4798 it might be invalid: The index might need to be reloaded, the address 4799 might have been made by frame pointer elimination and hence have a 4800 constant out of range, or both reasons might apply. 4801 4802 We can easily check for an index needing reload, but even if that is the 4803 case, we might also have an invalid constant. To avoid making the 4804 conservative assumption and requiring two reloads, we see if this address 4805 is valid when not interpreted strictly. If it is, the only problem is 4806 that the index needs a reload and find_reloads_address_1 will take care 4807 of it. 4808 4809 If we decide to do something here, it must be that 4810 `double_reg_address_ok' is true and that this address rtl was made by 4811 eliminate_regs. We generate a reload of the fp/sp/ap + constant and 4812 rework the sum so that the reload register will be added to the index. 4813 This is safe because we know the address isn't shared. 4814 4815 We check for fp/ap/sp as both the first and second operand of the 4816 innermost PLUS. */ 4817 4818 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT 4819 && GET_CODE (XEXP (ad, 0)) == PLUS 4820 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx 4821#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM 4822 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx 4823#endif 4824#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4825 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx 4826#endif 4827 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx) 4828 && ! memory_address_p (mode, ad)) 4829 { 4830 *loc = ad = gen_rtx_PLUS (GET_MODE (ad), 4831 plus_constant (XEXP (XEXP (ad, 0), 0), 4832 INTVAL (XEXP (ad, 1))), 4833 XEXP (XEXP (ad, 0), 1)); 4834 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), 4835 MODE_BASE_REG_CLASS (mode), 4836 GET_MODE (ad), opnum, type, ind_levels); 4837 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, 4838 type, 0, insn); 4839 4840 return 0; 4841 } 4842 4843 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT 4844 && GET_CODE (XEXP (ad, 0)) == PLUS 4845 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx 4846#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM 4847 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx 4848#endif 4849#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4850 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx 4851#endif 4852 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx) 4853 && ! memory_address_p (mode, ad)) 4854 { 4855 *loc = ad = gen_rtx_PLUS (GET_MODE (ad), 4856 XEXP (XEXP (ad, 0), 0), 4857 plus_constant (XEXP (XEXP (ad, 0), 1), 4858 INTVAL (XEXP (ad, 1)))); 4859 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), 4860 MODE_BASE_REG_CLASS (mode), 4861 GET_MODE (ad), opnum, type, ind_levels); 4862 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum, 4863 type, 0, insn); 4864 4865 return 0; 4866 } 4867 4868 /* See if address becomes valid when an eliminable register 4869 in a sum is replaced. */ 4870 4871 tem = ad; 4872 if (GET_CODE (ad) == PLUS) 4873 tem = subst_indexed_address (ad); 4874 if (tem != ad && strict_memory_address_p (mode, tem)) 4875 { 4876 /* Ok, we win that way. Replace any additional eliminable 4877 registers. */ 4878 4879 subst_reg_equivs_changed = 0; 4880 tem = subst_reg_equivs (tem, insn); 4881 4882 /* Make sure that didn't make the address invalid again. */ 4883 4884 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem)) 4885 { 4886 *loc = tem; 4887 return 0; 4888 } 4889 } 4890 4891 /* If constants aren't valid addresses, reload the constant address 4892 into a register. */ 4893 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad)) 4894 { 4895 /* If AD is an address in the constant pool, the MEM rtx may be shared. 4896 Unshare it so we can safely alter it. */ 4897 if (memrefloc && GET_CODE (ad) == SYMBOL_REF 4898 && CONSTANT_POOL_ADDRESS_P (ad)) 4899 { 4900 *memrefloc = copy_rtx (*memrefloc); 4901 loc = &XEXP (*memrefloc, 0); 4902 if (removed_and) 4903 loc = &XEXP (*loc, 0); 4904 } 4905 4906 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode), 4907 Pmode, opnum, type, ind_levels); 4908 return ! removed_and; 4909 } 4910 4911 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels, 4912 insn); 4913} 4914 4915/* Find all pseudo regs appearing in AD 4916 that are eliminable in favor of equivalent values 4917 and do not have hard regs; replace them by their equivalents. 4918 INSN, if nonzero, is the insn in which we do the reload. We put USEs in 4919 front of it for pseudos that we have to replace with stack slots. */ 4920 4921static rtx 4922subst_reg_equivs (ad, insn) 4923 rtx ad; 4924 rtx insn; 4925{ 4926 RTX_CODE code = GET_CODE (ad); 4927 int i; 4928 const char *fmt; 4929 4930 switch (code) 4931 { 4932 case HIGH: 4933 case CONST_INT: 4934 case CONST: 4935 case CONST_DOUBLE: 4936 case CONST_VECTOR: 4937 case SYMBOL_REF: 4938 case LABEL_REF: 4939 case PC: 4940 case CC0: 4941 return ad; 4942 4943 case REG: 4944 { 4945 int regno = REGNO (ad); 4946 4947 if (reg_equiv_constant[regno] != 0) 4948 { 4949 subst_reg_equivs_changed = 1; 4950 return reg_equiv_constant[regno]; 4951 } 4952 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset) 4953 { 4954 rtx mem = make_memloc (ad, regno); 4955 if (! rtx_equal_p (mem, reg_equiv_mem[regno])) 4956 { 4957 subst_reg_equivs_changed = 1; 4958 /* We mark the USE with QImode so that we recognize it 4959 as one that can be safely deleted at the end of 4960 reload. */ 4961 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn), 4962 QImode); 4963 return mem; 4964 } 4965 } 4966 } 4967 return ad; 4968 4969 case PLUS: 4970 /* Quickly dispose of a common case. */ 4971 if (XEXP (ad, 0) == frame_pointer_rtx 4972 && GET_CODE (XEXP (ad, 1)) == CONST_INT) 4973 return ad; 4974 break; 4975 4976 default: 4977 break; 4978 } 4979 4980 fmt = GET_RTX_FORMAT (code); 4981 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 4982 if (fmt[i] == 'e') 4983 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn); 4984 return ad; 4985} 4986 4987/* Compute the sum of X and Y, making canonicalizations assumed in an 4988 address, namely: sum constant integers, surround the sum of two 4989 constants with a CONST, put the constant as the second operand, and 4990 group the constant on the outermost sum. 4991 4992 This routine assumes both inputs are already in canonical form. */ 4993 4994rtx 4995form_sum (x, y) 4996 rtx x, y; 4997{ 4998 rtx tem; 4999 enum machine_mode mode = GET_MODE (x); 5000 5001 if (mode == VOIDmode) 5002 mode = GET_MODE (y); 5003 5004 if (mode == VOIDmode) 5005 mode = Pmode; 5006 5007 if (GET_CODE (x) == CONST_INT) 5008 return plus_constant (y, INTVAL (x)); 5009 else if (GET_CODE (y) == CONST_INT) 5010 return plus_constant (x, INTVAL (y)); 5011 else if (CONSTANT_P (x)) 5012 tem = x, x = y, y = tem; 5013 5014 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1))) 5015 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y)); 5016 5017 /* Note that if the operands of Y are specified in the opposite 5018 order in the recursive calls below, infinite recursion will occur. */ 5019 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1))) 5020 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1)); 5021 5022 /* If both constant, encapsulate sum. Otherwise, just form sum. A 5023 constant will have been placed second. */ 5024 if (CONSTANT_P (x) && CONSTANT_P (y)) 5025 { 5026 if (GET_CODE (x) == CONST) 5027 x = XEXP (x, 0); 5028 if (GET_CODE (y) == CONST) 5029 y = XEXP (y, 0); 5030 5031 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y)); 5032 } 5033 5034 return gen_rtx_PLUS (mode, x, y); 5035} 5036 5037/* If ADDR is a sum containing a pseudo register that should be 5038 replaced with a constant (from reg_equiv_constant), 5039 return the result of doing so, and also apply the associative 5040 law so that the result is more likely to be a valid address. 5041 (But it is not guaranteed to be one.) 5042 5043 Note that at most one register is replaced, even if more are 5044 replaceable. Also, we try to put the result into a canonical form 5045 so it is more likely to be a valid address. 5046 5047 In all other cases, return ADDR. */ 5048 5049static rtx 5050subst_indexed_address (addr) 5051 rtx addr; 5052{ 5053 rtx op0 = 0, op1 = 0, op2 = 0; 5054 rtx tem; 5055 int regno; 5056 5057 if (GET_CODE (addr) == PLUS) 5058 { 5059 /* Try to find a register to replace. */ 5060 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0; 5061 if (GET_CODE (op0) == REG 5062 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER 5063 && reg_renumber[regno] < 0 5064 && reg_equiv_constant[regno] != 0) 5065 op0 = reg_equiv_constant[regno]; 5066 else if (GET_CODE (op1) == REG 5067 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER 5068 && reg_renumber[regno] < 0 5069 && reg_equiv_constant[regno] != 0) 5070 op1 = reg_equiv_constant[regno]; 5071 else if (GET_CODE (op0) == PLUS 5072 && (tem = subst_indexed_address (op0)) != op0) 5073 op0 = tem; 5074 else if (GET_CODE (op1) == PLUS 5075 && (tem = subst_indexed_address (op1)) != op1) 5076 op1 = tem; 5077 else 5078 return addr; 5079 5080 /* Pick out up to three things to add. */ 5081 if (GET_CODE (op1) == PLUS) 5082 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0); 5083 else if (GET_CODE (op0) == PLUS) 5084 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0); 5085 5086 /* Compute the sum. */ 5087 if (op2 != 0) 5088 op1 = form_sum (op1, op2); 5089 if (op1 != 0) 5090 op0 = form_sum (op0, op1); 5091 5092 return op0; 5093 } 5094 return addr; 5095} 5096 5097/* Update the REG_INC notes for an insn. It updates all REG_INC 5098 notes for the instruction which refer to REGNO the to refer 5099 to the reload number. 5100 5101 INSN is the insn for which any REG_INC notes need updating. 5102 5103 REGNO is the register number which has been reloaded. 5104 5105 RELOADNUM is the reload number. */ 5106 5107static void 5108update_auto_inc_notes (insn, regno, reloadnum) 5109 rtx insn ATTRIBUTE_UNUSED; 5110 int regno ATTRIBUTE_UNUSED; 5111 int reloadnum ATTRIBUTE_UNUSED; 5112{ 5113#ifdef AUTO_INC_DEC 5114 rtx link; 5115 5116 for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) 5117 if (REG_NOTE_KIND (link) == REG_INC 5118 && REGNO (XEXP (link, 0)) == regno) 5119 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); 5120#endif 5121} 5122 5123/* Record the pseudo registers we must reload into hard registers in a 5124 subexpression of a would-be memory address, X referring to a value 5125 in mode MODE. (This function is not called if the address we find 5126 is strictly valid.) 5127 5128 CONTEXT = 1 means we are considering regs as index regs, 5129 = 0 means we are considering them as base regs. 5130 5131 OPNUM and TYPE specify the purpose of any reloads made. 5132 5133 IND_LEVELS says how many levels of indirect addressing are 5134 supported at this point in the address. 5135 5136 INSN, if nonzero, is the insn in which we do the reload. It is used 5137 to determine if we may generate output reloads. 5138 5139 We return nonzero if X, as a whole, is reloaded or replaced. */ 5140 5141/* Note that we take shortcuts assuming that no multi-reg machine mode 5142 occurs as part of an address. 5143 Also, this is not fully machine-customizable; it works for machines 5144 such as VAXen and 68000's and 32000's, but other possible machines 5145 could have addressing modes that this does not handle right. */ 5146 5147static int 5148find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn) 5149 enum machine_mode mode; 5150 rtx x; 5151 int context; 5152 rtx *loc; 5153 int opnum; 5154 enum reload_type type; 5155 int ind_levels; 5156 rtx insn; 5157{ 5158 RTX_CODE code = GET_CODE (x); 5159 5160 switch (code) 5161 { 5162 case PLUS: 5163 { 5164 rtx orig_op0 = XEXP (x, 0); 5165 rtx orig_op1 = XEXP (x, 1); 5166 RTX_CODE code0 = GET_CODE (orig_op0); 5167 RTX_CODE code1 = GET_CODE (orig_op1); 5168 rtx op0 = orig_op0; 5169 rtx op1 = orig_op1; 5170 5171 if (GET_CODE (op0) == SUBREG) 5172 { 5173 op0 = SUBREG_REG (op0); 5174 code0 = GET_CODE (op0); 5175 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER) 5176 op0 = gen_rtx_REG (word_mode, 5177 (REGNO (op0) + 5178 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)), 5179 GET_MODE (SUBREG_REG (orig_op0)), 5180 SUBREG_BYTE (orig_op0), 5181 GET_MODE (orig_op0)))); 5182 } 5183 5184 if (GET_CODE (op1) == SUBREG) 5185 { 5186 op1 = SUBREG_REG (op1); 5187 code1 = GET_CODE (op1); 5188 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER) 5189 /* ??? Why is this given op1's mode and above for 5190 ??? op0 SUBREGs we use word_mode? */ 5191 op1 = gen_rtx_REG (GET_MODE (op1), 5192 (REGNO (op1) + 5193 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)), 5194 GET_MODE (SUBREG_REG (orig_op1)), 5195 SUBREG_BYTE (orig_op1), 5196 GET_MODE (orig_op1)))); 5197 } 5198 5199 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE 5200 || code0 == ZERO_EXTEND || code1 == MEM) 5201 { 5202 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5203 type, ind_levels, insn); 5204 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5205 type, ind_levels, insn); 5206 } 5207 5208 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE 5209 || code1 == ZERO_EXTEND || code0 == MEM) 5210 { 5211 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5212 type, ind_levels, insn); 5213 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5214 type, ind_levels, insn); 5215 } 5216 5217 else if (code0 == CONST_INT || code0 == CONST 5218 || code0 == SYMBOL_REF || code0 == LABEL_REF) 5219 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5220 type, ind_levels, insn); 5221 5222 else if (code1 == CONST_INT || code1 == CONST 5223 || code1 == SYMBOL_REF || code1 == LABEL_REF) 5224 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5225 type, ind_levels, insn); 5226 5227 else if (code0 == REG && code1 == REG) 5228 { 5229 if (REG_OK_FOR_INDEX_P (op0) 5230 && REG_MODE_OK_FOR_BASE_P (op1, mode)) 5231 return 0; 5232 else if (REG_OK_FOR_INDEX_P (op1) 5233 && REG_MODE_OK_FOR_BASE_P (op0, mode)) 5234 return 0; 5235 else if (REG_MODE_OK_FOR_BASE_P (op1, mode)) 5236 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5237 type, ind_levels, insn); 5238 else if (REG_MODE_OK_FOR_BASE_P (op0, mode)) 5239 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5240 type, ind_levels, insn); 5241 else if (REG_OK_FOR_INDEX_P (op1)) 5242 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5243 type, ind_levels, insn); 5244 else if (REG_OK_FOR_INDEX_P (op0)) 5245 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5246 type, ind_levels, insn); 5247 else 5248 { 5249 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5250 type, ind_levels, insn); 5251 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5252 type, ind_levels, insn); 5253 } 5254 } 5255 5256 else if (code0 == REG) 5257 { 5258 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5259 type, ind_levels, insn); 5260 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5261 type, ind_levels, insn); 5262 } 5263 5264 else if (code1 == REG) 5265 { 5266 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5267 type, ind_levels, insn); 5268 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5269 type, ind_levels, insn); 5270 } 5271 } 5272 5273 return 0; 5274 5275 case POST_MODIFY: 5276 case PRE_MODIFY: 5277 { 5278 rtx op0 = XEXP (x, 0); 5279 rtx op1 = XEXP (x, 1); 5280 5281 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS) 5282 return 0; 5283 5284 /* Currently, we only support {PRE,POST}_MODIFY constructs 5285 where a base register is {inc,dec}remented by the contents 5286 of another register or by a constant value. Thus, these 5287 operands must match. */ 5288 if (op0 != XEXP (op1, 0)) 5289 abort (); 5290 5291 /* Require index register (or constant). Let's just handle the 5292 register case in the meantime... If the target allows 5293 auto-modify by a constant then we could try replacing a pseudo 5294 register with its equivalent constant where applicable. */ 5295 if (REG_P (XEXP (op1, 1))) 5296 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1)))) 5297 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1), 5298 opnum, type, ind_levels, insn); 5299 5300 if (REG_P (XEXP (op1, 0))) 5301 { 5302 int regno = REGNO (XEXP (op1, 0)); 5303 int reloadnum; 5304 5305 /* A register that is incremented cannot be constant! */ 5306 if (regno >= FIRST_PSEUDO_REGISTER 5307 && reg_equiv_constant[regno] != 0) 5308 abort (); 5309 5310 /* Handle a register that is equivalent to a memory location 5311 which cannot be addressed directly. */ 5312 if (reg_equiv_memory_loc[regno] != 0 5313 && (reg_equiv_address[regno] != 0 5314 || num_not_at_initial_offset)) 5315 { 5316 rtx tem = make_memloc (XEXP (x, 0), regno); 5317 5318 if (reg_equiv_address[regno] 5319 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5320 { 5321 /* First reload the memory location's address. 5322 We can't use ADDR_TYPE (type) here, because we need to 5323 write back the value after reading it, hence we actually 5324 need two registers. */ 5325 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0), 5326 &XEXP (tem, 0), opnum, 5327 RELOAD_OTHER, 5328 ind_levels, insn); 5329 5330 /* Then reload the memory location into a base 5331 register. */ 5332 reloadnum = push_reload (tem, tem, &XEXP (x, 0), 5333 &XEXP (op1, 0), 5334 MODE_BASE_REG_CLASS (mode), 5335 GET_MODE (x), GET_MODE (x), 0, 5336 0, opnum, RELOAD_OTHER); 5337 5338 update_auto_inc_notes (this_insn, regno, reloadnum); 5339 return 0; 5340 } 5341 } 5342 5343 if (reg_renumber[regno] >= 0) 5344 regno = reg_renumber[regno]; 5345 5346 /* We require a base register here... */ 5347 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x))) 5348 { 5349 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0), 5350 &XEXP (op1, 0), &XEXP (x, 0), 5351 MODE_BASE_REG_CLASS (mode), 5352 GET_MODE (x), GET_MODE (x), 0, 0, 5353 opnum, RELOAD_OTHER); 5354 5355 update_auto_inc_notes (this_insn, regno, reloadnum); 5356 return 0; 5357 } 5358 } 5359 else 5360 abort (); 5361 } 5362 return 0; 5363 5364 case POST_INC: 5365 case POST_DEC: 5366 case PRE_INC: 5367 case PRE_DEC: 5368 if (GET_CODE (XEXP (x, 0)) == REG) 5369 { 5370 int regno = REGNO (XEXP (x, 0)); 5371 int value = 0; 5372 rtx x_orig = x; 5373 5374 /* A register that is incremented cannot be constant! */ 5375 if (regno >= FIRST_PSEUDO_REGISTER 5376 && reg_equiv_constant[regno] != 0) 5377 abort (); 5378 5379 /* Handle a register that is equivalent to a memory location 5380 which cannot be addressed directly. */ 5381 if (reg_equiv_memory_loc[regno] != 0 5382 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 5383 { 5384 rtx tem = make_memloc (XEXP (x, 0), regno); 5385 if (reg_equiv_address[regno] 5386 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5387 { 5388 /* First reload the memory location's address. 5389 We can't use ADDR_TYPE (type) here, because we need to 5390 write back the value after reading it, hence we actually 5391 need two registers. */ 5392 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), 5393 &XEXP (tem, 0), opnum, type, 5394 ind_levels, insn); 5395 /* Put this inside a new increment-expression. */ 5396 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem); 5397 /* Proceed to reload that, as if it contained a register. */ 5398 } 5399 } 5400 5401 /* If we have a hard register that is ok as an index, 5402 don't make a reload. If an autoincrement of a nice register 5403 isn't "valid", it must be that no autoincrement is "valid". 5404 If that is true and something made an autoincrement anyway, 5405 this must be a special context where one is allowed. 5406 (For example, a "push" instruction.) 5407 We can't improve this address, so leave it alone. */ 5408 5409 /* Otherwise, reload the autoincrement into a suitable hard reg 5410 and record how much to increment by. */ 5411 5412 if (reg_renumber[regno] >= 0) 5413 regno = reg_renumber[regno]; 5414 if ((regno >= FIRST_PSEUDO_REGISTER 5415 || !(context ? REGNO_OK_FOR_INDEX_P (regno) 5416 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))) 5417 { 5418 int reloadnum; 5419 5420 /* If we can output the register afterwards, do so, this 5421 saves the extra update. 5422 We can do so if we have an INSN - i.e. no JUMP_INSN nor 5423 CALL_INSN - and it does not set CC0. 5424 But don't do this if we cannot directly address the 5425 memory location, since this will make it harder to 5426 reuse address reloads, and increases register pressure. 5427 Also don't do this if we can probably update x directly. */ 5428 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM 5429 ? XEXP (x, 0) 5430 : reg_equiv_mem[regno]); 5431 int icode = (int) add_optab->handlers[(int) Pmode].insn_code; 5432 if (insn && GET_CODE (insn) == INSN && equiv 5433 && memory_operand (equiv, GET_MODE (equiv)) 5434#ifdef HAVE_cc0 5435 && ! sets_cc0_p (PATTERN (insn)) 5436#endif 5437 && ! (icode != CODE_FOR_nothing 5438 && ((*insn_data[icode].operand[0].predicate) 5439 (equiv, Pmode)) 5440 && ((*insn_data[icode].operand[1].predicate) 5441 (equiv, Pmode)))) 5442 { 5443 /* We use the original pseudo for loc, so that 5444 emit_reload_insns() knows which pseudo this 5445 reload refers to and updates the pseudo rtx, not 5446 its equivalent memory location, as well as the 5447 corresponding entry in reg_last_reload_reg. */ 5448 loc = &XEXP (x_orig, 0); 5449 x = XEXP (x, 0); 5450 reloadnum 5451 = push_reload (x, x, loc, loc, 5452 (context ? INDEX_REG_CLASS : 5453 MODE_BASE_REG_CLASS (mode)), 5454 GET_MODE (x), GET_MODE (x), 0, 0, 5455 opnum, RELOAD_OTHER); 5456 } 5457 else 5458 { 5459 reloadnum 5460 = push_reload (x, NULL_RTX, loc, (rtx*) 0, 5461 (context ? INDEX_REG_CLASS : 5462 MODE_BASE_REG_CLASS (mode)), 5463 GET_MODE (x), GET_MODE (x), 0, 0, 5464 opnum, type); 5465 rld[reloadnum].inc 5466 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0)); 5467 5468 value = 1; 5469 } 5470 5471 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)), 5472 reloadnum); 5473 } 5474 return value; 5475 } 5476 5477 else if (GET_CODE (XEXP (x, 0)) == MEM) 5478 { 5479 /* This is probably the result of a substitution, by eliminate_regs, 5480 of an equivalent address for a pseudo that was not allocated to a 5481 hard register. Verify that the specified address is valid and 5482 reload it into a register. */ 5483 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */ 5484 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0); 5485 rtx link; 5486 int reloadnum; 5487 5488 /* Since we know we are going to reload this item, don't decrement 5489 for the indirection level. 5490 5491 Note that this is actually conservative: it would be slightly 5492 more efficient to use the value of SPILL_INDIRECT_LEVELS from 5493 reload1.c here. */ 5494 /* We can't use ADDR_TYPE (type) here, because we need to 5495 write back the value after reading it, hence we actually 5496 need two registers. */ 5497 find_reloads_address (GET_MODE (x), &XEXP (x, 0), 5498 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0), 5499 opnum, type, ind_levels, insn); 5500 5501 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0, 5502 (context ? INDEX_REG_CLASS : 5503 MODE_BASE_REG_CLASS (mode)), 5504 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5505 rld[reloadnum].inc 5506 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0)); 5507 5508 link = FIND_REG_INC_NOTE (this_insn, tem); 5509 if (link != 0) 5510 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); 5511 5512 return 1; 5513 } 5514 return 0; 5515 5516 case MEM: 5517 /* This is probably the result of a substitution, by eliminate_regs, of 5518 an equivalent address for a pseudo that was not allocated to a hard 5519 register. Verify that the specified address is valid and reload it 5520 into a register. 5521 5522 Since we know we are going to reload this item, don't decrement for 5523 the indirection level. 5524 5525 Note that this is actually conservative: it would be slightly more 5526 efficient to use the value of SPILL_INDIRECT_LEVELS from 5527 reload1.c here. */ 5528 5529 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0), 5530 opnum, ADDR_TYPE (type), ind_levels, insn); 5531 push_reload (*loc, NULL_RTX, loc, (rtx*) 0, 5532 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)), 5533 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5534 return 1; 5535 5536 case REG: 5537 { 5538 int regno = REGNO (x); 5539 5540 if (reg_equiv_constant[regno] != 0) 5541 { 5542 find_reloads_address_part (reg_equiv_constant[regno], loc, 5543 (context ? INDEX_REG_CLASS : 5544 MODE_BASE_REG_CLASS (mode)), 5545 GET_MODE (x), opnum, type, ind_levels); 5546 return 1; 5547 } 5548 5549#if 0 /* This might screw code in reload1.c to delete prior output-reload 5550 that feeds this insn. */ 5551 if (reg_equiv_mem[regno] != 0) 5552 { 5553 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0, 5554 (context ? INDEX_REG_CLASS : 5555 MODE_BASE_REG_CLASS (mode)), 5556 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5557 return 1; 5558 } 5559#endif 5560 5561 if (reg_equiv_memory_loc[regno] 5562 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 5563 { 5564 rtx tem = make_memloc (x, regno); 5565 if (reg_equiv_address[regno] != 0 5566 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5567 { 5568 x = tem; 5569 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), 5570 &XEXP (x, 0), opnum, ADDR_TYPE (type), 5571 ind_levels, insn); 5572 } 5573 } 5574 5575 if (reg_renumber[regno] >= 0) 5576 regno = reg_renumber[regno]; 5577 5578 if ((regno >= FIRST_PSEUDO_REGISTER 5579 || !(context ? REGNO_OK_FOR_INDEX_P (regno) 5580 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))) 5581 { 5582 push_reload (x, NULL_RTX, loc, (rtx*) 0, 5583 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)), 5584 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5585 return 1; 5586 } 5587 5588 /* If a register appearing in an address is the subject of a CLOBBER 5589 in this insn, reload it into some other register to be safe. 5590 The CLOBBER is supposed to make the register unavailable 5591 from before this insn to after it. */ 5592 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0)) 5593 { 5594 push_reload (x, NULL_RTX, loc, (rtx*) 0, 5595 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)), 5596 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5597 return 1; 5598 } 5599 } 5600 return 0; 5601 5602 case SUBREG: 5603 if (GET_CODE (SUBREG_REG (x)) == REG) 5604 { 5605 /* If this is a SUBREG of a hard register and the resulting register 5606 is of the wrong class, reload the whole SUBREG. This avoids 5607 needless copies if SUBREG_REG is multi-word. */ 5608 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) 5609 { 5610 int regno = subreg_regno (x); 5611 5612 if (! (context ? REGNO_OK_FOR_INDEX_P (regno) 5613 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))) 5614 { 5615 push_reload (x, NULL_RTX, loc, (rtx*) 0, 5616 (context ? INDEX_REG_CLASS : 5617 MODE_BASE_REG_CLASS (mode)), 5618 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5619 return 1; 5620 } 5621 } 5622 /* If this is a SUBREG of a pseudo-register, and the pseudo-register 5623 is larger than the class size, then reload the whole SUBREG. */ 5624 else 5625 { 5626 enum reg_class class = (context ? INDEX_REG_CLASS 5627 : MODE_BASE_REG_CLASS (mode)); 5628 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x))) 5629 > reg_class_size[class]) 5630 { 5631 x = find_reloads_subreg_address (x, 0, opnum, type, 5632 ind_levels, insn); 5633 push_reload (x, NULL_RTX, loc, (rtx*) 0, class, 5634 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5635 return 1; 5636 } 5637 } 5638 } 5639 break; 5640 5641 default: 5642 break; 5643 } 5644 5645 { 5646 const char *fmt = GET_RTX_FORMAT (code); 5647 int i; 5648 5649 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5650 { 5651 if (fmt[i] == 'e') 5652 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i), 5653 opnum, type, ind_levels, insn); 5654 } 5655 } 5656 5657 return 0; 5658} 5659 5660/* X, which is found at *LOC, is a part of an address that needs to be 5661 reloaded into a register of class CLASS. If X is a constant, or if 5662 X is a PLUS that contains a constant, check that the constant is a 5663 legitimate operand and that we are supposed to be able to load 5664 it into the register. 5665 5666 If not, force the constant into memory and reload the MEM instead. 5667 5668 MODE is the mode to use, in case X is an integer constant. 5669 5670 OPNUM and TYPE describe the purpose of any reloads made. 5671 5672 IND_LEVELS says how many levels of indirect addressing this machine 5673 supports. */ 5674 5675static void 5676find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels) 5677 rtx x; 5678 rtx *loc; 5679 enum reg_class class; 5680 enum machine_mode mode; 5681 int opnum; 5682 enum reload_type type; 5683 int ind_levels; 5684{ 5685 if (CONSTANT_P (x) 5686 && (! LEGITIMATE_CONSTANT_P (x) 5687 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS)) 5688 { 5689 rtx tem; 5690 5691 tem = x = force_const_mem (mode, x); 5692 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0), 5693 opnum, type, ind_levels, 0); 5694 } 5695 5696 else if (GET_CODE (x) == PLUS 5697 && CONSTANT_P (XEXP (x, 1)) 5698 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1)) 5699 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS)) 5700 { 5701 rtx tem; 5702 5703 tem = force_const_mem (GET_MODE (x), XEXP (x, 1)); 5704 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem); 5705 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0), 5706 opnum, type, ind_levels, 0); 5707 } 5708 5709 push_reload (x, NULL_RTX, loc, (rtx*) 0, class, 5710 mode, VOIDmode, 0, 0, opnum, type); 5711} 5712 5713/* X, a subreg of a pseudo, is a part of an address that needs to be 5714 reloaded. 5715 5716 If the pseudo is equivalent to a memory location that cannot be directly 5717 addressed, make the necessary address reloads. 5718 5719 If address reloads have been necessary, or if the address is changed 5720 by register elimination, return the rtx of the memory location; 5721 otherwise, return X. 5722 5723 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the 5724 memory location. 5725 5726 OPNUM and TYPE identify the purpose of the reload. 5727 5728 IND_LEVELS says how many levels of indirect addressing are 5729 supported at this point in the address. 5730 5731 INSN, if nonzero, is the insn in which we do the reload. It is used 5732 to determine where to put USEs for pseudos that we have to replace with 5733 stack slots. */ 5734 5735static rtx 5736find_reloads_subreg_address (x, force_replace, opnum, type, 5737 ind_levels, insn) 5738 rtx x; 5739 int force_replace; 5740 int opnum; 5741 enum reload_type type; 5742 int ind_levels; 5743 rtx insn; 5744{ 5745 int regno = REGNO (SUBREG_REG (x)); 5746 5747 if (reg_equiv_memory_loc[regno]) 5748 { 5749 /* If the address is not directly addressable, or if the address is not 5750 offsettable, then it must be replaced. */ 5751 if (! force_replace 5752 && (reg_equiv_address[regno] 5753 || ! offsettable_memref_p (reg_equiv_mem[regno]))) 5754 force_replace = 1; 5755 5756 if (force_replace || num_not_at_initial_offset) 5757 { 5758 rtx tem = make_memloc (SUBREG_REG (x), regno); 5759 5760 /* If the address changes because of register elimination, then 5761 it must be replaced. */ 5762 if (force_replace 5763 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5764 { 5765 int offset = SUBREG_BYTE (x); 5766 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x)); 5767 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))); 5768 5769 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset); 5770 PUT_MODE (tem, GET_MODE (x)); 5771 5772 /* If this was a paradoxical subreg that we replaced, the 5773 resulting memory must be sufficiently aligned to allow 5774 us to widen the mode of the memory. */ 5775 if (outer_size > inner_size && STRICT_ALIGNMENT) 5776 { 5777 rtx base; 5778 5779 base = XEXP (tem, 0); 5780 if (GET_CODE (base) == PLUS) 5781 { 5782 if (GET_CODE (XEXP (base, 1)) == CONST_INT 5783 && INTVAL (XEXP (base, 1)) % outer_size != 0) 5784 return x; 5785 base = XEXP (base, 0); 5786 } 5787 if (GET_CODE (base) != REG 5788 || (REGNO_POINTER_ALIGN (REGNO (base)) 5789 < outer_size * BITS_PER_UNIT)) 5790 return x; 5791 } 5792 5793 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), 5794 &XEXP (tem, 0), opnum, ADDR_TYPE (type), 5795 ind_levels, insn); 5796 5797 /* If this is not a toplevel operand, find_reloads doesn't see 5798 this substitution. We have to emit a USE of the pseudo so 5799 that delete_output_reload can see it. */ 5800 if (replace_reloads && recog_data.operand[opnum] != x) 5801 /* We mark the USE with QImode so that we recognize it 5802 as one that can be safely deleted at the end of 5803 reload. */ 5804 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, 5805 SUBREG_REG (x)), 5806 insn), QImode); 5807 x = tem; 5808 } 5809 } 5810 } 5811 return x; 5812} 5813 5814/* Substitute into the current INSN the registers into which we have reloaded 5815 the things that need reloading. The array `replacements' 5816 contains the locations of all pointers that must be changed 5817 and says what to replace them with. 5818 5819 Return the rtx that X translates into; usually X, but modified. */ 5820 5821void 5822subst_reloads (insn) 5823 rtx insn; 5824{ 5825 int i; 5826 5827 for (i = 0; i < n_replacements; i++) 5828 { 5829 struct replacement *r = &replacements[i]; 5830 rtx reloadreg = rld[r->what].reg_rtx; 5831 if (reloadreg) 5832 { 5833#ifdef ENABLE_CHECKING 5834 /* Internal consistency test. Check that we don't modify 5835 anything in the equivalence arrays. Whenever something from 5836 those arrays needs to be reloaded, it must be unshared before 5837 being substituted into; the equivalence must not be modified. 5838 Otherwise, if the equivalence is used after that, it will 5839 have been modified, and the thing substituted (probably a 5840 register) is likely overwritten and not a usable equivalence. */ 5841 int check_regno; 5842 5843 for (check_regno = 0; check_regno < max_regno; check_regno++) 5844 { 5845#define CHECK_MODF(ARRAY) \ 5846 if (ARRAY[check_regno] \ 5847 && loc_mentioned_in_p (r->where, \ 5848 ARRAY[check_regno])) \ 5849 abort () 5850 5851 CHECK_MODF (reg_equiv_constant); 5852 CHECK_MODF (reg_equiv_memory_loc); 5853 CHECK_MODF (reg_equiv_address); 5854 CHECK_MODF (reg_equiv_mem); 5855#undef CHECK_MODF 5856 } 5857#endif /* ENABLE_CHECKING */ 5858 5859 /* If we're replacing a LABEL_REF with a register, add a 5860 REG_LABEL note to indicate to flow which label this 5861 register refers to. */ 5862 if (GET_CODE (*r->where) == LABEL_REF 5863 && GET_CODE (insn) == JUMP_INSN) 5864 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, 5865 XEXP (*r->where, 0), 5866 REG_NOTES (insn)); 5867 5868 /* Encapsulate RELOADREG so its machine mode matches what 5869 used to be there. Note that gen_lowpart_common will 5870 do the wrong thing if RELOADREG is multi-word. RELOADREG 5871 will always be a REG here. */ 5872 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode) 5873 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg)); 5874 5875 /* If we are putting this into a SUBREG and RELOADREG is a 5876 SUBREG, we would be making nested SUBREGs, so we have to fix 5877 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */ 5878 5879 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG) 5880 { 5881 if (GET_MODE (*r->subreg_loc) 5882 == GET_MODE (SUBREG_REG (reloadreg))) 5883 *r->subreg_loc = SUBREG_REG (reloadreg); 5884 else 5885 { 5886 int final_offset = 5887 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg); 5888 5889 /* When working with SUBREGs the rule is that the byte 5890 offset must be a multiple of the SUBREG's mode. */ 5891 final_offset = (final_offset / 5892 GET_MODE_SIZE (GET_MODE (*r->subreg_loc))); 5893 final_offset = (final_offset * 5894 GET_MODE_SIZE (GET_MODE (*r->subreg_loc))); 5895 5896 *r->where = SUBREG_REG (reloadreg); 5897 SUBREG_BYTE (*r->subreg_loc) = final_offset; 5898 } 5899 } 5900 else 5901 *r->where = reloadreg; 5902 } 5903 /* If reload got no reg and isn't optional, something's wrong. */ 5904 else if (! rld[r->what].optional) 5905 abort (); 5906 } 5907} 5908 5909/* Make a copy of any replacements being done into X and move those 5910 copies to locations in Y, a copy of X. */ 5911 5912void 5913copy_replacements (x, y) 5914 rtx x, y; 5915{ 5916 /* We can't support X being a SUBREG because we might then need to know its 5917 location if something inside it was replaced. */ 5918 if (GET_CODE (x) == SUBREG) 5919 abort (); 5920 5921 copy_replacements_1 (&x, &y, n_replacements); 5922} 5923 5924static void 5925copy_replacements_1 (px, py, orig_replacements) 5926 rtx *px; 5927 rtx *py; 5928 int orig_replacements; 5929{ 5930 int i, j; 5931 rtx x, y; 5932 struct replacement *r; 5933 enum rtx_code code; 5934 const char *fmt; 5935 5936 for (j = 0; j < orig_replacements; j++) 5937 { 5938 if (replacements[j].subreg_loc == px) 5939 { 5940 r = &replacements[n_replacements++]; 5941 r->where = replacements[j].where; 5942 r->subreg_loc = py; 5943 r->what = replacements[j].what; 5944 r->mode = replacements[j].mode; 5945 } 5946 else if (replacements[j].where == px) 5947 { 5948 r = &replacements[n_replacements++]; 5949 r->where = py; 5950 r->subreg_loc = 0; 5951 r->what = replacements[j].what; 5952 r->mode = replacements[j].mode; 5953 } 5954 } 5955 5956 x = *px; 5957 y = *py; 5958 code = GET_CODE (x); 5959 fmt = GET_RTX_FORMAT (code); 5960 5961 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5962 { 5963 if (fmt[i] == 'e') 5964 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements); 5965 else if (fmt[i] == 'E') 5966 for (j = XVECLEN (x, i); --j >= 0; ) 5967 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j), 5968 orig_replacements); 5969 } 5970} 5971 5972/* Change any replacements being done to *X to be done to *Y */ 5973 5974void 5975move_replacements (x, y) 5976 rtx *x; 5977 rtx *y; 5978{ 5979 int i; 5980 5981 for (i = 0; i < n_replacements; i++) 5982 if (replacements[i].subreg_loc == x) 5983 replacements[i].subreg_loc = y; 5984 else if (replacements[i].where == x) 5985 { 5986 replacements[i].where = y; 5987 replacements[i].subreg_loc = 0; 5988 } 5989} 5990 5991/* If LOC was scheduled to be replaced by something, return the replacement. 5992 Otherwise, return *LOC. */ 5993 5994rtx 5995find_replacement (loc) 5996 rtx *loc; 5997{ 5998 struct replacement *r; 5999 6000 for (r = &replacements[0]; r < &replacements[n_replacements]; r++) 6001 { 6002 rtx reloadreg = rld[r->what].reg_rtx; 6003 6004 if (reloadreg && r->where == loc) 6005 { 6006 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode) 6007 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg)); 6008 6009 return reloadreg; 6010 } 6011 else if (reloadreg && r->subreg_loc == loc) 6012 { 6013 /* RELOADREG must be either a REG or a SUBREG. 6014 6015 ??? Is it actually still ever a SUBREG? If so, why? */ 6016 6017 if (GET_CODE (reloadreg) == REG) 6018 return gen_rtx_REG (GET_MODE (*loc), 6019 (REGNO (reloadreg) + 6020 subreg_regno_offset (REGNO (SUBREG_REG (*loc)), 6021 GET_MODE (SUBREG_REG (*loc)), 6022 SUBREG_BYTE (*loc), 6023 GET_MODE (*loc)))); 6024 else if (GET_MODE (reloadreg) == GET_MODE (*loc)) 6025 return reloadreg; 6026 else 6027 { 6028 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc); 6029 6030 /* When working with SUBREGs the rule is that the byte 6031 offset must be a multiple of the SUBREG's mode. */ 6032 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc))); 6033 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc))); 6034 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg), 6035 final_offset); 6036 } 6037 } 6038 } 6039 6040 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for 6041 what's inside and make a new rtl if so. */ 6042 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS 6043 || GET_CODE (*loc) == MULT) 6044 { 6045 rtx x = find_replacement (&XEXP (*loc, 0)); 6046 rtx y = find_replacement (&XEXP (*loc, 1)); 6047 6048 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1)) 6049 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y); 6050 } 6051 6052 return *loc; 6053} 6054 6055/* Return nonzero if register in range [REGNO, ENDREGNO) 6056 appears either explicitly or implicitly in X 6057 other than being stored into (except for earlyclobber operands). 6058 6059 References contained within the substructure at LOC do not count. 6060 LOC may be zero, meaning don't ignore anything. 6061 6062 This is similar to refers_to_regno_p in rtlanal.c except that we 6063 look at equivalences for pseudos that didn't get hard registers. */ 6064 6065int 6066refers_to_regno_for_reload_p (regno, endregno, x, loc) 6067 unsigned int regno, endregno; 6068 rtx x; 6069 rtx *loc; 6070{ 6071 int i; 6072 unsigned int r; 6073 RTX_CODE code; 6074 const char *fmt; 6075 6076 if (x == 0) 6077 return 0; 6078 6079 repeat: 6080 code = GET_CODE (x); 6081 6082 switch (code) 6083 { 6084 case REG: 6085 r = REGNO (x); 6086 6087 /* If this is a pseudo, a hard register must not have been allocated. 6088 X must therefore either be a constant or be in memory. */ 6089 if (r >= FIRST_PSEUDO_REGISTER) 6090 { 6091 if (reg_equiv_memory_loc[r]) 6092 return refers_to_regno_for_reload_p (regno, endregno, 6093 reg_equiv_memory_loc[r], 6094 (rtx*) 0); 6095 6096 if (reg_equiv_constant[r]) 6097 return 0; 6098 6099 abort (); 6100 } 6101 6102 return (endregno > r 6103 && regno < r + (r < FIRST_PSEUDO_REGISTER 6104 ? HARD_REGNO_NREGS (r, GET_MODE (x)) 6105 : 1)); 6106 6107 case SUBREG: 6108 /* If this is a SUBREG of a hard reg, we can see exactly which 6109 registers are being modified. Otherwise, handle normally. */ 6110 if (GET_CODE (SUBREG_REG (x)) == REG 6111 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) 6112 { 6113 unsigned int inner_regno = subreg_regno (x); 6114 unsigned int inner_endregno 6115 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER 6116 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 6117 6118 return endregno > inner_regno && regno < inner_endregno; 6119 } 6120 break; 6121 6122 case CLOBBER: 6123 case SET: 6124 if (&SET_DEST (x) != loc 6125 /* Note setting a SUBREG counts as referring to the REG it is in for 6126 a pseudo but not for hard registers since we can 6127 treat each word individually. */ 6128 && ((GET_CODE (SET_DEST (x)) == SUBREG 6129 && loc != &SUBREG_REG (SET_DEST (x)) 6130 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG 6131 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER 6132 && refers_to_regno_for_reload_p (regno, endregno, 6133 SUBREG_REG (SET_DEST (x)), 6134 loc)) 6135 /* If the output is an earlyclobber operand, this is 6136 a conflict. */ 6137 || ((GET_CODE (SET_DEST (x)) != REG 6138 || earlyclobber_operand_p (SET_DEST (x))) 6139 && refers_to_regno_for_reload_p (regno, endregno, 6140 SET_DEST (x), loc)))) 6141 return 1; 6142 6143 if (code == CLOBBER || loc == &SET_SRC (x)) 6144 return 0; 6145 x = SET_SRC (x); 6146 goto repeat; 6147 6148 default: 6149 break; 6150 } 6151 6152 /* X does not match, so try its subexpressions. */ 6153 6154 fmt = GET_RTX_FORMAT (code); 6155 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 6156 { 6157 if (fmt[i] == 'e' && loc != &XEXP (x, i)) 6158 { 6159 if (i == 0) 6160 { 6161 x = XEXP (x, 0); 6162 goto repeat; 6163 } 6164 else 6165 if (refers_to_regno_for_reload_p (regno, endregno, 6166 XEXP (x, i), loc)) 6167 return 1; 6168 } 6169 else if (fmt[i] == 'E') 6170 { 6171 int j; 6172 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 6173 if (loc != &XVECEXP (x, i, j) 6174 && refers_to_regno_for_reload_p (regno, endregno, 6175 XVECEXP (x, i, j), loc)) 6176 return 1; 6177 } 6178 } 6179 return 0; 6180} 6181 6182/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG, 6183 we check if any register number in X conflicts with the relevant register 6184 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN 6185 contains a MEM (we don't bother checking for memory addresses that can't 6186 conflict because we expect this to be a rare case. 6187 6188 This function is similar to reg_overlap_mentioned_p in rtlanal.c except 6189 that we look at equivalences for pseudos that didn't get hard registers. */ 6190 6191int 6192reg_overlap_mentioned_for_reload_p (x, in) 6193 rtx x, in; 6194{ 6195 int regno, endregno; 6196 6197 /* Overly conservative. */ 6198 if (GET_CODE (x) == STRICT_LOW_PART 6199 || GET_RTX_CLASS (GET_CODE (x)) == 'a') 6200 x = XEXP (x, 0); 6201 6202 /* If either argument is a constant, then modifying X can not affect IN. */ 6203 if (CONSTANT_P (x) || CONSTANT_P (in)) 6204 return 0; 6205 else if (GET_CODE (x) == SUBREG) 6206 { 6207 regno = REGNO (SUBREG_REG (x)); 6208 if (regno < FIRST_PSEUDO_REGISTER) 6209 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)), 6210 GET_MODE (SUBREG_REG (x)), 6211 SUBREG_BYTE (x), 6212 GET_MODE (x)); 6213 } 6214 else if (GET_CODE (x) == REG) 6215 { 6216 regno = REGNO (x); 6217 6218 /* If this is a pseudo, it must not have been assigned a hard register. 6219 Therefore, it must either be in memory or be a constant. */ 6220 6221 if (regno >= FIRST_PSEUDO_REGISTER) 6222 { 6223 if (reg_equiv_memory_loc[regno]) 6224 return refers_to_mem_for_reload_p (in); 6225 else if (reg_equiv_constant[regno]) 6226 return 0; 6227 abort (); 6228 } 6229 } 6230 else if (GET_CODE (x) == MEM) 6231 return refers_to_mem_for_reload_p (in); 6232 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC 6233 || GET_CODE (x) == CC0) 6234 return reg_mentioned_p (x, in); 6235 else if (GET_CODE (x) == PLUS) 6236 return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in) 6237 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in)); 6238 else 6239 abort (); 6240 6241 endregno = regno + (regno < FIRST_PSEUDO_REGISTER 6242 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 6243 6244 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0); 6245} 6246 6247/* Return nonzero if anything in X contains a MEM. Look also for pseudo 6248 registers. */ 6249 6250int 6251refers_to_mem_for_reload_p (x) 6252 rtx x; 6253{ 6254 const char *fmt; 6255 int i; 6256 6257 if (GET_CODE (x) == MEM) 6258 return 1; 6259 6260 if (GET_CODE (x) == REG) 6261 return (REGNO (x) >= FIRST_PSEUDO_REGISTER 6262 && reg_equiv_memory_loc[REGNO (x)]); 6263 6264 fmt = GET_RTX_FORMAT (GET_CODE (x)); 6265 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) 6266 if (fmt[i] == 'e' 6267 && (GET_CODE (XEXP (x, i)) == MEM 6268 || refers_to_mem_for_reload_p (XEXP (x, i)))) 6269 return 1; 6270 6271 return 0; 6272} 6273 6274/* Check the insns before INSN to see if there is a suitable register 6275 containing the same value as GOAL. 6276 If OTHER is -1, look for a register in class CLASS. 6277 Otherwise, just see if register number OTHER shares GOAL's value. 6278 6279 Return an rtx for the register found, or zero if none is found. 6280 6281 If RELOAD_REG_P is (short *)1, 6282 we reject any hard reg that appears in reload_reg_rtx 6283 because such a hard reg is also needed coming into this insn. 6284 6285 If RELOAD_REG_P is any other nonzero value, 6286 it is a vector indexed by hard reg number 6287 and we reject any hard reg whose element in the vector is nonnegative 6288 as well as any that appears in reload_reg_rtx. 6289 6290 If GOAL is zero, then GOALREG is a register number; we look 6291 for an equivalent for that register. 6292 6293 MODE is the machine mode of the value we want an equivalence for. 6294 If GOAL is nonzero and not VOIDmode, then it must have mode MODE. 6295 6296 This function is used by jump.c as well as in the reload pass. 6297 6298 If GOAL is the sum of the stack pointer and a constant, we treat it 6299 as if it were a constant except that sp is required to be unchanging. */ 6300 6301rtx 6302find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode) 6303 rtx goal; 6304 rtx insn; 6305 enum reg_class class; 6306 int other; 6307 short *reload_reg_p; 6308 int goalreg; 6309 enum machine_mode mode; 6310{ 6311 rtx p = insn; 6312 rtx goaltry, valtry, value, where; 6313 rtx pat; 6314 int regno = -1; 6315 int valueno; 6316 int goal_mem = 0; 6317 int goal_const = 0; 6318 int goal_mem_addr_varies = 0; 6319 int need_stable_sp = 0; 6320 int nregs; 6321 int valuenregs; 6322 6323 if (goal == 0) 6324 regno = goalreg; 6325 else if (GET_CODE (goal) == REG) 6326 regno = REGNO (goal); 6327 else if (GET_CODE (goal) == MEM) 6328 { 6329 enum rtx_code code = GET_CODE (XEXP (goal, 0)); 6330 if (MEM_VOLATILE_P (goal)) 6331 return 0; 6332 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT) 6333 return 0; 6334 /* An address with side effects must be reexecuted. */ 6335 switch (code) 6336 { 6337 case POST_INC: 6338 case PRE_INC: 6339 case POST_DEC: 6340 case PRE_DEC: 6341 case POST_MODIFY: 6342 case PRE_MODIFY: 6343 return 0; 6344 default: 6345 break; 6346 } 6347 goal_mem = 1; 6348 } 6349 else if (CONSTANT_P (goal)) 6350 goal_const = 1; 6351 else if (GET_CODE (goal) == PLUS 6352 && XEXP (goal, 0) == stack_pointer_rtx 6353 && CONSTANT_P (XEXP (goal, 1))) 6354 goal_const = need_stable_sp = 1; 6355 else if (GET_CODE (goal) == PLUS 6356 && XEXP (goal, 0) == frame_pointer_rtx 6357 && CONSTANT_P (XEXP (goal, 1))) 6358 goal_const = 1; 6359 else 6360 return 0; 6361 6362 /* Scan insns back from INSN, looking for one that copies 6363 a value into or out of GOAL. 6364 Stop and give up if we reach a label. */ 6365 6366 while (1) 6367 { 6368 p = PREV_INSN (p); 6369 if (p == 0 || GET_CODE (p) == CODE_LABEL) 6370 return 0; 6371 6372 if (GET_CODE (p) == INSN 6373 /* If we don't want spill regs ... */ 6374 && (! (reload_reg_p != 0 6375 && reload_reg_p != (short *) (HOST_WIDE_INT) 1) 6376 /* ... then ignore insns introduced by reload; they aren't 6377 useful and can cause results in reload_as_needed to be 6378 different from what they were when calculating the need for 6379 spills. If we notice an input-reload insn here, we will 6380 reject it below, but it might hide a usable equivalent. 6381 That makes bad code. It may even abort: perhaps no reg was 6382 spilled for this insn because it was assumed we would find 6383 that equivalent. */ 6384 || INSN_UID (p) < reload_first_uid)) 6385 { 6386 rtx tem; 6387 pat = single_set (p); 6388 6389 /* First check for something that sets some reg equal to GOAL. */ 6390 if (pat != 0 6391 && ((regno >= 0 6392 && true_regnum (SET_SRC (pat)) == regno 6393 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 6394 || 6395 (regno >= 0 6396 && true_regnum (SET_DEST (pat)) == regno 6397 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0) 6398 || 6399 (goal_const && rtx_equal_p (SET_SRC (pat), goal) 6400 /* When looking for stack pointer + const, 6401 make sure we don't use a stack adjust. */ 6402 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal) 6403 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 6404 || (goal_mem 6405 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0 6406 && rtx_renumbered_equal_p (goal, SET_SRC (pat))) 6407 || (goal_mem 6408 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0 6409 && rtx_renumbered_equal_p (goal, SET_DEST (pat))) 6410 /* If we are looking for a constant, 6411 and something equivalent to that constant was copied 6412 into a reg, we can use that reg. */ 6413 || (goal_const && REG_NOTES (p) != 0 6414 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX)) 6415 && ((rtx_equal_p (XEXP (tem, 0), goal) 6416 && (valueno 6417 = true_regnum (valtry = SET_DEST (pat))) >= 0) 6418 || (GET_CODE (SET_DEST (pat)) == REG 6419 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE 6420 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) 6421 == MODE_FLOAT) 6422 && GET_CODE (goal) == CONST_INT 6423 && 0 != (goaltry 6424 = operand_subword (XEXP (tem, 0), 0, 0, 6425 VOIDmode)) 6426 && rtx_equal_p (goal, goaltry) 6427 && (valtry 6428 = operand_subword (SET_DEST (pat), 0, 0, 6429 VOIDmode)) 6430 && (valueno = true_regnum (valtry)) >= 0))) 6431 || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 6432 NULL_RTX)) 6433 && GET_CODE (SET_DEST (pat)) == REG 6434 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE 6435 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) 6436 == MODE_FLOAT) 6437 && GET_CODE (goal) == CONST_INT 6438 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0, 6439 VOIDmode)) 6440 && rtx_equal_p (goal, goaltry) 6441 && (valtry 6442 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode)) 6443 && (valueno = true_regnum (valtry)) >= 0))) 6444 { 6445 if (other >= 0) 6446 { 6447 if (valueno != other) 6448 continue; 6449 } 6450 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER) 6451 continue; 6452 else 6453 { 6454 int i; 6455 6456 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--) 6457 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 6458 valueno + i)) 6459 break; 6460 if (i >= 0) 6461 continue; 6462 } 6463 value = valtry; 6464 where = p; 6465 break; 6466 } 6467 } 6468 } 6469 6470 /* We found a previous insn copying GOAL into a suitable other reg VALUE 6471 (or copying VALUE into GOAL, if GOAL is also a register). 6472 Now verify that VALUE is really valid. */ 6473 6474 /* VALUENO is the register number of VALUE; a hard register. */ 6475 6476 /* Don't try to re-use something that is killed in this insn. We want 6477 to be able to trust REG_UNUSED notes. */ 6478 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value)) 6479 return 0; 6480 6481 /* If we propose to get the value from the stack pointer or if GOAL is 6482 a MEM based on the stack pointer, we need a stable SP. */ 6483 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM 6484 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx, 6485 goal))) 6486 need_stable_sp = 1; 6487 6488 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */ 6489 if (GET_MODE (value) != mode) 6490 return 0; 6491 6492 /* Reject VALUE if it was loaded from GOAL 6493 and is also a register that appears in the address of GOAL. */ 6494 6495 if (goal_mem && value == SET_DEST (single_set (where)) 6496 && refers_to_regno_for_reload_p (valueno, 6497 (valueno 6498 + HARD_REGNO_NREGS (valueno, mode)), 6499 goal, (rtx*) 0)) 6500 return 0; 6501 6502 /* Reject registers that overlap GOAL. */ 6503 6504 if (!goal_mem && !goal_const 6505 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno 6506 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode)) 6507 return 0; 6508 6509 nregs = HARD_REGNO_NREGS (regno, mode); 6510 valuenregs = HARD_REGNO_NREGS (valueno, mode); 6511 6512 /* Reject VALUE if it is one of the regs reserved for reloads. 6513 Reload1 knows how to reuse them anyway, and it would get 6514 confused if we allocated one without its knowledge. 6515 (Now that insns introduced by reload are ignored above, 6516 this case shouldn't happen, but I'm not positive.) */ 6517 6518 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1) 6519 { 6520 int i; 6521 for (i = 0; i < valuenregs; ++i) 6522 if (reload_reg_p[valueno + i] >= 0) 6523 return 0; 6524 } 6525 6526 /* Reject VALUE if it is a register being used for an input reload 6527 even if it is not one of those reserved. */ 6528 6529 if (reload_reg_p != 0) 6530 { 6531 int i; 6532 for (i = 0; i < n_reloads; i++) 6533 if (rld[i].reg_rtx != 0 && rld[i].in) 6534 { 6535 int regno1 = REGNO (rld[i].reg_rtx); 6536 int nregs1 = HARD_REGNO_NREGS (regno1, 6537 GET_MODE (rld[i].reg_rtx)); 6538 if (regno1 < valueno + valuenregs 6539 && regno1 + nregs1 > valueno) 6540 return 0; 6541 } 6542 } 6543 6544 if (goal_mem) 6545 /* We must treat frame pointer as varying here, 6546 since it can vary--in a nonlocal goto as generated by expand_goto. */ 6547 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0)); 6548 6549 /* Now verify that the values of GOAL and VALUE remain unaltered 6550 until INSN is reached. */ 6551 6552 p = insn; 6553 while (1) 6554 { 6555 p = PREV_INSN (p); 6556 if (p == where) 6557 return value; 6558 6559 /* Don't trust the conversion past a function call 6560 if either of the two is in a call-clobbered register, or memory. */ 6561 if (GET_CODE (p) == CALL_INSN) 6562 { 6563 int i; 6564 6565 if (goal_mem || need_stable_sp) 6566 return 0; 6567 6568 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER) 6569 for (i = 0; i < nregs; ++i) 6570 if (call_used_regs[regno + i]) 6571 return 0; 6572 6573 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER) 6574 for (i = 0; i < valuenregs; ++i) 6575 if (call_used_regs[valueno + i]) 6576 return 0; 6577#ifdef NON_SAVING_SETJMP 6578 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL)) 6579 return 0; 6580#endif 6581 } 6582 6583 if (INSN_P (p)) 6584 { 6585 pat = PATTERN (p); 6586 6587 /* Watch out for unspec_volatile, and volatile asms. */ 6588 if (volatile_insn_p (pat)) 6589 return 0; 6590 6591 /* If this insn P stores in either GOAL or VALUE, return 0. 6592 If GOAL is a memory ref and this insn writes memory, return 0. 6593 If GOAL is a memory ref and its address is not constant, 6594 and this insn P changes a register used in GOAL, return 0. */ 6595 6596 if (GET_CODE (pat) == COND_EXEC) 6597 pat = COND_EXEC_CODE (pat); 6598 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER) 6599 { 6600 rtx dest = SET_DEST (pat); 6601 while (GET_CODE (dest) == SUBREG 6602 || GET_CODE (dest) == ZERO_EXTRACT 6603 || GET_CODE (dest) == SIGN_EXTRACT 6604 || GET_CODE (dest) == STRICT_LOW_PART) 6605 dest = XEXP (dest, 0); 6606 if (GET_CODE (dest) == REG) 6607 { 6608 int xregno = REGNO (dest); 6609 int xnregs; 6610 if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 6611 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6612 else 6613 xnregs = 1; 6614 if (xregno < regno + nregs && xregno + xnregs > regno) 6615 return 0; 6616 if (xregno < valueno + valuenregs 6617 && xregno + xnregs > valueno) 6618 return 0; 6619 if (goal_mem_addr_varies 6620 && reg_overlap_mentioned_for_reload_p (dest, goal)) 6621 return 0; 6622 if (xregno == STACK_POINTER_REGNUM && need_stable_sp) 6623 return 0; 6624 } 6625 else if (goal_mem && GET_CODE (dest) == MEM 6626 && ! push_operand (dest, GET_MODE (dest))) 6627 return 0; 6628 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER 6629 && reg_equiv_memory_loc[regno] != 0) 6630 return 0; 6631 else if (need_stable_sp && push_operand (dest, GET_MODE (dest))) 6632 return 0; 6633 } 6634 else if (GET_CODE (pat) == PARALLEL) 6635 { 6636 int i; 6637 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--) 6638 { 6639 rtx v1 = XVECEXP (pat, 0, i); 6640 if (GET_CODE (v1) == COND_EXEC) 6641 v1 = COND_EXEC_CODE (v1); 6642 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER) 6643 { 6644 rtx dest = SET_DEST (v1); 6645 while (GET_CODE (dest) == SUBREG 6646 || GET_CODE (dest) == ZERO_EXTRACT 6647 || GET_CODE (dest) == SIGN_EXTRACT 6648 || GET_CODE (dest) == STRICT_LOW_PART) 6649 dest = XEXP (dest, 0); 6650 if (GET_CODE (dest) == REG) 6651 { 6652 int xregno = REGNO (dest); 6653 int xnregs; 6654 if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 6655 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6656 else 6657 xnregs = 1; 6658 if (xregno < regno + nregs 6659 && xregno + xnregs > regno) 6660 return 0; 6661 if (xregno < valueno + valuenregs 6662 && xregno + xnregs > valueno) 6663 return 0; 6664 if (goal_mem_addr_varies 6665 && reg_overlap_mentioned_for_reload_p (dest, 6666 goal)) 6667 return 0; 6668 if (xregno == STACK_POINTER_REGNUM && need_stable_sp) 6669 return 0; 6670 } 6671 else if (goal_mem && GET_CODE (dest) == MEM 6672 && ! push_operand (dest, GET_MODE (dest))) 6673 return 0; 6674 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER 6675 && reg_equiv_memory_loc[regno] != 0) 6676 return 0; 6677 else if (need_stable_sp 6678 && push_operand (dest, GET_MODE (dest))) 6679 return 0; 6680 } 6681 } 6682 } 6683 6684 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p)) 6685 { 6686 rtx link; 6687 6688 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0; 6689 link = XEXP (link, 1)) 6690 { 6691 pat = XEXP (link, 0); 6692 if (GET_CODE (pat) == CLOBBER) 6693 { 6694 rtx dest = SET_DEST (pat); 6695 6696 if (GET_CODE (dest) == REG) 6697 { 6698 int xregno = REGNO (dest); 6699 int xnregs 6700 = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6701 6702 if (xregno < regno + nregs 6703 && xregno + xnregs > regno) 6704 return 0; 6705 else if (xregno < valueno + valuenregs 6706 && xregno + xnregs > valueno) 6707 return 0; 6708 else if (goal_mem_addr_varies 6709 && reg_overlap_mentioned_for_reload_p (dest, 6710 goal)) 6711 return 0; 6712 } 6713 6714 else if (goal_mem && GET_CODE (dest) == MEM 6715 && ! push_operand (dest, GET_MODE (dest))) 6716 return 0; 6717 else if (need_stable_sp 6718 && push_operand (dest, GET_MODE (dest))) 6719 return 0; 6720 } 6721 } 6722 } 6723 6724#ifdef AUTO_INC_DEC 6725 /* If this insn auto-increments or auto-decrements 6726 either regno or valueno, return 0 now. 6727 If GOAL is a memory ref and its address is not constant, 6728 and this insn P increments a register used in GOAL, return 0. */ 6729 { 6730 rtx link; 6731 6732 for (link = REG_NOTES (p); link; link = XEXP (link, 1)) 6733 if (REG_NOTE_KIND (link) == REG_INC 6734 && GET_CODE (XEXP (link, 0)) == REG) 6735 { 6736 int incno = REGNO (XEXP (link, 0)); 6737 if (incno < regno + nregs && incno >= regno) 6738 return 0; 6739 if (incno < valueno + valuenregs && incno >= valueno) 6740 return 0; 6741 if (goal_mem_addr_varies 6742 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0), 6743 goal)) 6744 return 0; 6745 } 6746 } 6747#endif 6748 } 6749 } 6750} 6751 6752/* Find a place where INCED appears in an increment or decrement operator 6753 within X, and return the amount INCED is incremented or decremented by. 6754 The value is always positive. */ 6755 6756static int 6757find_inc_amount (x, inced) 6758 rtx x, inced; 6759{ 6760 enum rtx_code code = GET_CODE (x); 6761 const char *fmt; 6762 int i; 6763 6764 if (code == MEM) 6765 { 6766 rtx addr = XEXP (x, 0); 6767 if ((GET_CODE (addr) == PRE_DEC 6768 || GET_CODE (addr) == POST_DEC 6769 || GET_CODE (addr) == PRE_INC 6770 || GET_CODE (addr) == POST_INC) 6771 && XEXP (addr, 0) == inced) 6772 return GET_MODE_SIZE (GET_MODE (x)); 6773 else if ((GET_CODE (addr) == PRE_MODIFY 6774 || GET_CODE (addr) == POST_MODIFY) 6775 && GET_CODE (XEXP (addr, 1)) == PLUS 6776 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0) 6777 && XEXP (addr, 0) == inced 6778 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT) 6779 { 6780 i = INTVAL (XEXP (XEXP (addr, 1), 1)); 6781 return i < 0 ? -i : i; 6782 } 6783 } 6784 6785 fmt = GET_RTX_FORMAT (code); 6786 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 6787 { 6788 if (fmt[i] == 'e') 6789 { 6790 int tem = find_inc_amount (XEXP (x, i), inced); 6791 if (tem != 0) 6792 return tem; 6793 } 6794 if (fmt[i] == 'E') 6795 { 6796 int j; 6797 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 6798 { 6799 int tem = find_inc_amount (XVECEXP (x, i, j), inced); 6800 if (tem != 0) 6801 return tem; 6802 } 6803 } 6804 } 6805 6806 return 0; 6807} 6808 6809/* Return 1 if register REGNO is the subject of a clobber in insn INSN. 6810 If SETS is nonzero, also consider SETs. */ 6811 6812int 6813regno_clobbered_p (regno, insn, mode, sets) 6814 unsigned int regno; 6815 rtx insn; 6816 enum machine_mode mode; 6817 int sets; 6818{ 6819 unsigned int nregs = HARD_REGNO_NREGS (regno, mode); 6820 unsigned int endregno = regno + nregs; 6821 6822 if ((GET_CODE (PATTERN (insn)) == CLOBBER 6823 || (sets && GET_CODE (PATTERN (insn)) == SET)) 6824 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG) 6825 { 6826 unsigned int test = REGNO (XEXP (PATTERN (insn), 0)); 6827 6828 return test >= regno && test < endregno; 6829 } 6830 6831 if (GET_CODE (PATTERN (insn)) == PARALLEL) 6832 { 6833 int i = XVECLEN (PATTERN (insn), 0) - 1; 6834 6835 for (; i >= 0; i--) 6836 { 6837 rtx elt = XVECEXP (PATTERN (insn), 0, i); 6838 if ((GET_CODE (elt) == CLOBBER 6839 || (sets && GET_CODE (PATTERN (insn)) == SET)) 6840 && GET_CODE (XEXP (elt, 0)) == REG) 6841 { 6842 unsigned int test = REGNO (XEXP (elt, 0)); 6843 6844 if (test >= regno && test < endregno) 6845 return 1; 6846 } 6847 } 6848 } 6849 6850 return 0; 6851} 6852 6853static const char *const reload_when_needed_name[] = 6854{ 6855 "RELOAD_FOR_INPUT", 6856 "RELOAD_FOR_OUTPUT", 6857 "RELOAD_FOR_INSN", 6858 "RELOAD_FOR_INPUT_ADDRESS", 6859 "RELOAD_FOR_INPADDR_ADDRESS", 6860 "RELOAD_FOR_OUTPUT_ADDRESS", 6861 "RELOAD_FOR_OUTADDR_ADDRESS", 6862 "RELOAD_FOR_OPERAND_ADDRESS", 6863 "RELOAD_FOR_OPADDR_ADDR", 6864 "RELOAD_OTHER", 6865 "RELOAD_FOR_OTHER_ADDRESS" 6866}; 6867 6868static const char * const reg_class_names[] = REG_CLASS_NAMES; 6869 6870/* These functions are used to print the variables set by 'find_reloads' */ 6871 6872void 6873debug_reload_to_stream (f) 6874 FILE *f; 6875{ 6876 int r; 6877 const char *prefix; 6878 6879 if (! f) 6880 f = stderr; 6881 for (r = 0; r < n_reloads; r++) 6882 { 6883 fprintf (f, "Reload %d: ", r); 6884 6885 if (rld[r].in != 0) 6886 { 6887 fprintf (f, "reload_in (%s) = ", 6888 GET_MODE_NAME (rld[r].inmode)); 6889 print_inline_rtx (f, rld[r].in, 24); 6890 fprintf (f, "\n\t"); 6891 } 6892 6893 if (rld[r].out != 0) 6894 { 6895 fprintf (f, "reload_out (%s) = ", 6896 GET_MODE_NAME (rld[r].outmode)); 6897 print_inline_rtx (f, rld[r].out, 24); 6898 fprintf (f, "\n\t"); 6899 } 6900 6901 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]); 6902 6903 fprintf (f, "%s (opnum = %d)", 6904 reload_when_needed_name[(int) rld[r].when_needed], 6905 rld[r].opnum); 6906 6907 if (rld[r].optional) 6908 fprintf (f, ", optional"); 6909 6910 if (rld[r].nongroup) 6911 fprintf (f, ", nongroup"); 6912 6913 if (rld[r].inc != 0) 6914 fprintf (f, ", inc by %d", rld[r].inc); 6915 6916 if (rld[r].nocombine) 6917 fprintf (f, ", can't combine"); 6918 6919 if (rld[r].secondary_p) 6920 fprintf (f, ", secondary_reload_p"); 6921 6922 if (rld[r].in_reg != 0) 6923 { 6924 fprintf (f, "\n\treload_in_reg: "); 6925 print_inline_rtx (f, rld[r].in_reg, 24); 6926 } 6927 6928 if (rld[r].out_reg != 0) 6929 { 6930 fprintf (f, "\n\treload_out_reg: "); 6931 print_inline_rtx (f, rld[r].out_reg, 24); 6932 } 6933 6934 if (rld[r].reg_rtx != 0) 6935 { 6936 fprintf (f, "\n\treload_reg_rtx: "); 6937 print_inline_rtx (f, rld[r].reg_rtx, 24); 6938 } 6939 6940 prefix = "\n\t"; 6941 if (rld[r].secondary_in_reload != -1) 6942 { 6943 fprintf (f, "%ssecondary_in_reload = %d", 6944 prefix, rld[r].secondary_in_reload); 6945 prefix = ", "; 6946 } 6947 6948 if (rld[r].secondary_out_reload != -1) 6949 fprintf (f, "%ssecondary_out_reload = %d\n", 6950 prefix, rld[r].secondary_out_reload); 6951 6952 prefix = "\n\t"; 6953 if (rld[r].secondary_in_icode != CODE_FOR_nothing) 6954 { 6955 fprintf (f, "%ssecondary_in_icode = %s", prefix, 6956 insn_data[rld[r].secondary_in_icode].name); 6957 prefix = ", "; 6958 } 6959 6960 if (rld[r].secondary_out_icode != CODE_FOR_nothing) 6961 fprintf (f, "%ssecondary_out_icode = %s", prefix, 6962 insn_data[rld[r].secondary_out_icode].name); 6963 6964 fprintf (f, "\n"); 6965 } 6966} 6967 6968void 6969debug_reload () 6970{ 6971 debug_reload_to_stream (stderr); 6972} 6973