reload.c revision 52557
1/* Search an insn for pseudo regs that must be in hard regs and are not. 2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc. 3 4This file is part of GNU CC. 5 6GNU CC is free software; you can redistribute it and/or modify 7it under the terms of the GNU General Public License as published by 8the Free Software Foundation; either version 2, or (at your option) 9any later version. 10 11GNU CC is distributed in the hope that it will be useful, 12but WITHOUT ANY WARRANTY; without even the implied warranty of 13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14GNU General Public License for more details. 15 16You should have received a copy of the GNU General Public License 17along with GNU CC; see the file COPYING. If not, write to 18the Free Software Foundation, 59 Temple Place - Suite 330, 19Boston, MA 02111-1307, USA. */ 20 21/* $FreeBSD: head/contrib/gcc/reload.c 52557 1999-10-27 09:23:37Z obrien $ */ 22 23 24/* This file contains subroutines used only from the file reload1.c. 25 It knows how to scan one insn for operands and values 26 that need to be copied into registers to make valid code. 27 It also finds other operands and values which are valid 28 but for which equivalent values in registers exist and 29 ought to be used instead. 30 31 Before processing the first insn of the function, call `init_reload'. 32 33 To scan an insn, call `find_reloads'. This does two things: 34 1. sets up tables describing which values must be reloaded 35 for this insn, and what kind of hard regs they must be reloaded into; 36 2. optionally record the locations where those values appear in 37 the data, so they can be replaced properly later. 38 This is done only if the second arg to `find_reloads' is nonzero. 39 40 The third arg to `find_reloads' specifies the number of levels 41 of indirect addressing supported by the machine. If it is zero, 42 indirect addressing is not valid. If it is one, (MEM (REG n)) 43 is valid even if (REG n) did not get a hard register; if it is two, 44 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a 45 hard register, and similarly for higher values. 46 47 Then you must choose the hard regs to reload those pseudo regs into, 48 and generate appropriate load insns before this insn and perhaps 49 also store insns after this insn. Set up the array `reload_reg_rtx' 50 to contain the REG rtx's for the registers you used. In some 51 cases `find_reloads' will return a nonzero value in `reload_reg_rtx' 52 for certain reloads. Then that tells you which register to use, 53 so you do not need to allocate one. But you still do need to add extra 54 instructions to copy the value into and out of that register. 55 56 Finally you must call `subst_reloads' to substitute the reload reg rtx's 57 into the locations already recorded. 58 59NOTE SIDE EFFECTS: 60 61 find_reloads can alter the operands of the instruction it is called on. 62 63 1. Two operands of any sort may be interchanged, if they are in a 64 commutative instruction. 65 This happens only if find_reloads thinks the instruction will compile 66 better that way. 67 68 2. Pseudo-registers that are equivalent to constants are replaced 69 with those constants if they are not in hard registers. 70 711 happens every time find_reloads is called. 722 happens only when REPLACE is 1, which is only when 73actually doing the reloads, not when just counting them. 74 75 76Using a reload register for several reloads in one insn: 77 78When an insn has reloads, it is considered as having three parts: 79the input reloads, the insn itself after reloading, and the output reloads. 80Reloads of values used in memory addresses are often needed for only one part. 81 82When this is so, reload_when_needed records which part needs the reload. 83Two reloads for different parts of the insn can share the same reload 84register. 85 86When a reload is used for addresses in multiple parts, or when it is 87an ordinary operand, it is classified as RELOAD_OTHER, and cannot share 88a register with any other reload. */ 89 90#define REG_OK_STRICT 91 92#include "config.h" 93#include "system.h" 94#include "rtl.h" 95#include "insn-config.h" 96#include "insn-codes.h" 97#include "recog.h" 98#include "reload.h" 99#include "regs.h" 100#include "hard-reg-set.h" 101#include "flags.h" 102#include "real.h" 103#include "output.h" 104#include "expr.h" 105#include "toplev.h" 106 107#ifndef REGISTER_MOVE_COST 108#define REGISTER_MOVE_COST(x, y) 2 109#endif 110 111#ifndef REGNO_MODE_OK_FOR_BASE_P 112#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO) 113#endif 114 115#ifndef REG_MODE_OK_FOR_BASE_P 116#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO) 117#endif 118 119/* The variables set up by `find_reloads' are: 120 121 n_reloads number of distinct reloads needed; max reload # + 1 122 tables indexed by reload number 123 reload_in rtx for value to reload from 124 reload_out rtx for where to store reload-reg afterward if nec 125 (often the same as reload_in) 126 reload_reg_class enum reg_class, saying what regs to reload into 127 reload_inmode enum machine_mode; mode this operand should have 128 when reloaded, on input. 129 reload_outmode enum machine_mode; mode this operand should have 130 when reloaded, on output. 131 reload_optional char, nonzero for an optional reload. 132 Optional reloads are ignored unless the 133 value is already sitting in a register. 134 reload_nongroup char, nonzero when a reload must use a register 135 not already allocated to a group. 136 reload_inc int, positive amount to increment or decrement by if 137 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC. 138 Ignored otherwise (don't assume it is zero). 139 reload_in_reg rtx. A reg for which reload_in is the equivalent. 140 If reload_in is a symbol_ref which came from 141 reg_equiv_constant, then this is the pseudo 142 which has that symbol_ref as equivalent. 143 reload_reg_rtx rtx. This is the register to reload into. 144 If it is zero when `find_reloads' returns, 145 you must find a suitable register in the class 146 specified by reload_reg_class, and store here 147 an rtx for that register with mode from 148 reload_inmode or reload_outmode. 149 reload_nocombine char, nonzero if this reload shouldn't be 150 combined with another reload. 151 reload_opnum int, operand number being reloaded. This is 152 used to group related reloads and need not always 153 be equal to the actual operand number in the insn, 154 though it current will be; for in-out operands, it 155 is one of the two operand numbers. 156 reload_when_needed enum, classifies reload as needed either for 157 addressing an input reload, addressing an output, 158 for addressing a non-reloaded mem ref, 159 or for unspecified purposes (i.e., more than one 160 of the above). 161 reload_secondary_p int, 1 if this is a secondary register for one 162 or more reloads. 163 reload_secondary_in_reload 164 reload_secondary_out_reload 165 int, gives the reload number of a secondary 166 reload, when needed; otherwise -1 167 reload_secondary_in_icode 168 reload_secondary_out_icode 169 enum insn_code, if a secondary reload is required, 170 gives the INSN_CODE that uses the secondary 171 reload as a scratch register, or CODE_FOR_nothing 172 if the secondary reload register is to be an 173 intermediate register. */ 174int n_reloads; 175 176rtx reload_in[MAX_RELOADS]; 177rtx reload_out[MAX_RELOADS]; 178enum reg_class reload_reg_class[MAX_RELOADS]; 179enum machine_mode reload_inmode[MAX_RELOADS]; 180enum machine_mode reload_outmode[MAX_RELOADS]; 181rtx reload_reg_rtx[MAX_RELOADS]; 182char reload_optional[MAX_RELOADS]; 183char reload_nongroup[MAX_RELOADS]; 184int reload_inc[MAX_RELOADS]; 185rtx reload_in_reg[MAX_RELOADS]; 186rtx reload_out_reg[MAX_RELOADS]; 187char reload_nocombine[MAX_RELOADS]; 188int reload_opnum[MAX_RELOADS]; 189enum reload_type reload_when_needed[MAX_RELOADS]; 190int reload_secondary_p[MAX_RELOADS]; 191int reload_secondary_in_reload[MAX_RELOADS]; 192int reload_secondary_out_reload[MAX_RELOADS]; 193enum insn_code reload_secondary_in_icode[MAX_RELOADS]; 194enum insn_code reload_secondary_out_icode[MAX_RELOADS]; 195 196/* All the "earlyclobber" operands of the current insn 197 are recorded here. */ 198int n_earlyclobbers; 199rtx reload_earlyclobbers[MAX_RECOG_OPERANDS]; 200 201int reload_n_operands; 202 203/* Replacing reloads. 204 205 If `replace_reloads' is nonzero, then as each reload is recorded 206 an entry is made for it in the table `replacements'. 207 Then later `subst_reloads' can look through that table and 208 perform all the replacements needed. */ 209 210/* Nonzero means record the places to replace. */ 211static int replace_reloads; 212 213/* Each replacement is recorded with a structure like this. */ 214struct replacement 215{ 216 rtx *where; /* Location to store in */ 217 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside 218 a SUBREG; 0 otherwise. */ 219 int what; /* which reload this is for */ 220 enum machine_mode mode; /* mode it must have */ 221}; 222 223static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)]; 224 225/* Number of replacements currently recorded. */ 226static int n_replacements; 227 228/* Used to track what is modified by an operand. */ 229struct decomposition 230{ 231 int reg_flag; /* Nonzero if referencing a register. */ 232 int safe; /* Nonzero if this can't conflict with anything. */ 233 rtx base; /* Base address for MEM. */ 234 HOST_WIDE_INT start; /* Starting offset or register number. */ 235 HOST_WIDE_INT end; /* Ending offset or register number. */ 236}; 237 238#ifdef SECONDARY_MEMORY_NEEDED 239 240/* Save MEMs needed to copy from one class of registers to another. One MEM 241 is used per mode, but normally only one or two modes are ever used. 242 243 We keep two versions, before and after register elimination. The one 244 after register elimination is record separately for each operand. This 245 is done in case the address is not valid to be sure that we separately 246 reload each. */ 247 248static rtx secondary_memlocs[NUM_MACHINE_MODES]; 249static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS]; 250#endif 251 252/* The instruction we are doing reloads for; 253 so we can test whether a register dies in it. */ 254static rtx this_insn; 255 256/* Nonzero if this instruction is a user-specified asm with operands. */ 257static int this_insn_is_asm; 258 259/* If hard_regs_live_known is nonzero, 260 we can tell which hard regs are currently live, 261 at least enough to succeed in choosing dummy reloads. */ 262static int hard_regs_live_known; 263 264/* Indexed by hard reg number, 265 element is nonnegative if hard reg has been spilled. 266 This vector is passed to `find_reloads' as an argument 267 and is not changed here. */ 268static short *static_reload_reg_p; 269 270/* Set to 1 in subst_reg_equivs if it changes anything. */ 271static int subst_reg_equivs_changed; 272 273/* On return from push_reload, holds the reload-number for the OUT 274 operand, which can be different for that from the input operand. */ 275static int output_reloadnum; 276 277 /* Compare two RTX's. */ 278#define MATCHES(x, y) \ 279 (x == y || (x != 0 && (GET_CODE (x) == REG \ 280 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \ 281 : rtx_equal_p (x, y) && ! side_effects_p (x)))) 282 283 /* Indicates if two reloads purposes are for similar enough things that we 284 can merge their reloads. */ 285#define MERGABLE_RELOADS(when1, when2, op1, op2) \ 286 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \ 287 || ((when1) == (when2) && (op1) == (op2)) \ 288 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \ 289 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \ 290 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \ 291 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \ 292 && (when2) == RELOAD_FOR_OTHER_ADDRESS)) 293 294 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */ 295#define MERGE_TO_OTHER(when1, when2, op1, op2) \ 296 ((when1) != (when2) \ 297 || ! ((op1) == (op2) \ 298 || (when1) == RELOAD_FOR_INPUT \ 299 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \ 300 || (when1) == RELOAD_FOR_OTHER_ADDRESS)) 301 302 /* If we are going to reload an address, compute the reload type to 303 use. */ 304#define ADDR_TYPE(type) \ 305 ((type) == RELOAD_FOR_INPUT_ADDRESS \ 306 ? RELOAD_FOR_INPADDR_ADDRESS \ 307 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \ 308 ? RELOAD_FOR_OUTADDR_ADDRESS \ 309 : (type))) 310 311#ifdef HAVE_SECONDARY_RELOADS 312static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class, 313 enum machine_mode, enum reload_type, 314 enum insn_code *)); 315#endif 316static enum reg_class find_valid_class PROTO((enum machine_mode, int)); 317static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class, 318 enum machine_mode, enum machine_mode, 319 int, int, int, enum reload_type)); 320static void push_replacement PROTO((rtx *, int, enum machine_mode)); 321static void combine_reloads PROTO((void)); 322static int find_reusable_reload PROTO((rtx *, rtx, enum reg_class, 323 enum reload_type, int, int)); 324static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *, 325 enum machine_mode, enum machine_mode, 326 enum reg_class, int, int)); 327static int earlyclobber_operand_p PROTO((rtx)); 328static int hard_reg_set_here_p PROTO((int, int, rtx)); 329static struct decomposition decompose PROTO((rtx)); 330static int immune_p PROTO((rtx, rtx, struct decomposition)); 331static int alternative_allows_memconst PROTO((const char *, int)); 332static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int, rtx)); 333static rtx make_memloc PROTO((rtx, int)); 334static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *, 335 int, enum reload_type, int, rtx)); 336static rtx subst_reg_equivs PROTO((rtx, rtx)); 337static rtx subst_indexed_address PROTO((rtx)); 338static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *, 339 int, enum reload_type,int, rtx)); 340static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class, 341 enum machine_mode, int, 342 enum reload_type, int)); 343static rtx find_reloads_subreg_address PROTO((rtx, int, int, enum reload_type, 344 int, rtx)); 345static int find_inc_amount PROTO((rtx, rtx)); 346static int loc_mentioned_in_p PROTO((rtx *, rtx)); 347 348#ifdef HAVE_SECONDARY_RELOADS 349 350/* Determine if any secondary reloads are needed for loading (if IN_P is 351 non-zero) or storing (if IN_P is zero) X to or from a reload register of 352 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads 353 are needed, push them. 354 355 Return the reload number of the secondary reload we made, or -1 if 356 we didn't need one. *PICODE is set to the insn_code to use if we do 357 need a secondary reload. */ 358 359static int 360push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode, 361 type, picode) 362 int in_p; 363 rtx x; 364 int opnum; 365 int optional; 366 enum reg_class reload_class; 367 enum machine_mode reload_mode; 368 enum reload_type type; 369 enum insn_code *picode; 370{ 371 enum reg_class class = NO_REGS; 372 enum machine_mode mode = reload_mode; 373 enum insn_code icode = CODE_FOR_nothing; 374 enum reg_class t_class = NO_REGS; 375 enum machine_mode t_mode = VOIDmode; 376 enum insn_code t_icode = CODE_FOR_nothing; 377 enum reload_type secondary_type; 378 int s_reload, t_reload = -1; 379 380 if (type == RELOAD_FOR_INPUT_ADDRESS 381 || type == RELOAD_FOR_OUTPUT_ADDRESS 382 || type == RELOAD_FOR_INPADDR_ADDRESS 383 || type == RELOAD_FOR_OUTADDR_ADDRESS) 384 secondary_type = type; 385 else 386 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS; 387 388 *picode = CODE_FOR_nothing; 389 390 /* If X is a paradoxical SUBREG, use the inner value to determine both the 391 mode and object being reloaded. */ 392 if (GET_CODE (x) == SUBREG 393 && (GET_MODE_SIZE (GET_MODE (x)) 394 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))) 395 { 396 x = SUBREG_REG (x); 397 reload_mode = GET_MODE (x); 398 } 399 400 /* If X is a pseudo-register that has an equivalent MEM (actually, if it 401 is still a pseudo-register by now, it *must* have an equivalent MEM 402 but we don't want to assume that), use that equivalent when seeing if 403 a secondary reload is needed since whether or not a reload is needed 404 might be sensitive to the form of the MEM. */ 405 406 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER 407 && reg_equiv_mem[REGNO (x)] != 0) 408 x = reg_equiv_mem[REGNO (x)]; 409 410#ifdef SECONDARY_INPUT_RELOAD_CLASS 411 if (in_p) 412 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x); 413#endif 414 415#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 416 if (! in_p) 417 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x); 418#endif 419 420 /* If we don't need any secondary registers, done. */ 421 if (class == NO_REGS) 422 return -1; 423 424 /* Get a possible insn to use. If the predicate doesn't accept X, don't 425 use the insn. */ 426 427 icode = (in_p ? reload_in_optab[(int) reload_mode] 428 : reload_out_optab[(int) reload_mode]); 429 430 if (icode != CODE_FOR_nothing 431 && insn_operand_predicate[(int) icode][in_p] 432 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode))) 433 icode = CODE_FOR_nothing; 434 435 /* If we will be using an insn, see if it can directly handle the reload 436 register we will be using. If it can, the secondary reload is for a 437 scratch register. If it can't, we will use the secondary reload for 438 an intermediate register and require a tertiary reload for the scratch 439 register. */ 440 441 if (icode != CODE_FOR_nothing) 442 { 443 /* If IN_P is non-zero, the reload register will be the output in 444 operand 0. If IN_P is zero, the reload register will be the input 445 in operand 1. Outputs should have an initial "=", which we must 446 skip. */ 447 448 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p]; 449 enum reg_class insn_class 450 = (insn_letter == 'r' ? GENERAL_REGS 451 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter)); 452 453 if (insn_class == NO_REGS 454 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=') 455 /* The scratch register's constraint must start with "=&". */ 456 || insn_operand_constraint[(int) icode][2][0] != '=' 457 || insn_operand_constraint[(int) icode][2][1] != '&') 458 abort (); 459 460 if (reg_class_subset_p (reload_class, insn_class)) 461 mode = insn_operand_mode[(int) icode][2]; 462 else 463 { 464 char t_letter = insn_operand_constraint[(int) icode][2][2]; 465 class = insn_class; 466 t_mode = insn_operand_mode[(int) icode][2]; 467 t_class = (t_letter == 'r' ? GENERAL_REGS 468 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter)); 469 t_icode = icode; 470 icode = CODE_FOR_nothing; 471 } 472 } 473 474 /* This case isn't valid, so fail. Reload is allowed to use the same 475 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but 476 in the case of a secondary register, we actually need two different 477 registers for correct code. We fail here to prevent the possibility of 478 silently generating incorrect code later. 479 480 The convention is that secondary input reloads are valid only if the 481 secondary_class is different from class. If you have such a case, you 482 can not use secondary reloads, you must work around the problem some 483 other way. 484 485 Allow this when MODE is not reload_mode and assume that the generated 486 code handles this case (it does on the Alpha, which is the only place 487 this currently happens). */ 488 489 if (in_p && class == reload_class && mode == reload_mode) 490 abort (); 491 492 /* If we need a tertiary reload, see if we have one we can reuse or else 493 make a new one. */ 494 495 if (t_class != NO_REGS) 496 { 497 for (t_reload = 0; t_reload < n_reloads; t_reload++) 498 if (reload_secondary_p[t_reload] 499 && (reg_class_subset_p (t_class, reload_reg_class[t_reload]) 500 || reg_class_subset_p (reload_reg_class[t_reload], t_class)) 501 && ((in_p && reload_inmode[t_reload] == t_mode) 502 || (! in_p && reload_outmode[t_reload] == t_mode)) 503 && ((in_p && (reload_secondary_in_icode[t_reload] 504 == CODE_FOR_nothing)) 505 || (! in_p &&(reload_secondary_out_icode[t_reload] 506 == CODE_FOR_nothing))) 507 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES) 508 && MERGABLE_RELOADS (secondary_type, 509 reload_when_needed[t_reload], 510 opnum, reload_opnum[t_reload])) 511 { 512 if (in_p) 513 reload_inmode[t_reload] = t_mode; 514 if (! in_p) 515 reload_outmode[t_reload] = t_mode; 516 517 if (reg_class_subset_p (t_class, reload_reg_class[t_reload])) 518 reload_reg_class[t_reload] = t_class; 519 520 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum); 521 reload_optional[t_reload] &= optional; 522 reload_secondary_p[t_reload] = 1; 523 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload], 524 opnum, reload_opnum[t_reload])) 525 reload_when_needed[t_reload] = RELOAD_OTHER; 526 } 527 528 if (t_reload == n_reloads) 529 { 530 /* We need to make a new tertiary reload for this register class. */ 531 reload_in[t_reload] = reload_out[t_reload] = 0; 532 reload_reg_class[t_reload] = t_class; 533 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode; 534 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode; 535 reload_reg_rtx[t_reload] = 0; 536 reload_optional[t_reload] = optional; 537 reload_nongroup[t_reload] = 0; 538 reload_inc[t_reload] = 0; 539 /* Maybe we could combine these, but it seems too tricky. */ 540 reload_nocombine[t_reload] = 1; 541 reload_in_reg[t_reload] = 0; 542 reload_out_reg[t_reload] = 0; 543 reload_opnum[t_reload] = opnum; 544 reload_when_needed[t_reload] = secondary_type; 545 reload_secondary_in_reload[t_reload] = -1; 546 reload_secondary_out_reload[t_reload] = -1; 547 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing; 548 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing; 549 reload_secondary_p[t_reload] = 1; 550 551 n_reloads++; 552 } 553 } 554 555 /* See if we can reuse an existing secondary reload. */ 556 for (s_reload = 0; s_reload < n_reloads; s_reload++) 557 if (reload_secondary_p[s_reload] 558 && (reg_class_subset_p (class, reload_reg_class[s_reload]) 559 || reg_class_subset_p (reload_reg_class[s_reload], class)) 560 && ((in_p && reload_inmode[s_reload] == mode) 561 || (! in_p && reload_outmode[s_reload] == mode)) 562 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload) 563 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload)) 564 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode) 565 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode)) 566 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 567 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload], 568 opnum, reload_opnum[s_reload])) 569 { 570 if (in_p) 571 reload_inmode[s_reload] = mode; 572 if (! in_p) 573 reload_outmode[s_reload] = mode; 574 575 if (reg_class_subset_p (class, reload_reg_class[s_reload])) 576 reload_reg_class[s_reload] = class; 577 578 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum); 579 reload_optional[s_reload] &= optional; 580 reload_secondary_p[s_reload] = 1; 581 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload], 582 opnum, reload_opnum[s_reload])) 583 reload_when_needed[s_reload] = RELOAD_OTHER; 584 } 585 586 if (s_reload == n_reloads) 587 { 588#ifdef SECONDARY_MEMORY_NEEDED 589 /* If we need a memory location to copy between the two reload regs, 590 set it up now. Note that we do the input case before making 591 the reload and the output case after. This is due to the 592 way reloads are output. */ 593 594 if (in_p && icode == CODE_FOR_nothing 595 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode)) 596 get_secondary_mem (x, reload_mode, opnum, type); 597#endif 598 599 /* We need to make a new secondary reload for this register class. */ 600 reload_in[s_reload] = reload_out[s_reload] = 0; 601 reload_reg_class[s_reload] = class; 602 603 reload_inmode[s_reload] = in_p ? mode : VOIDmode; 604 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode; 605 reload_reg_rtx[s_reload] = 0; 606 reload_optional[s_reload] = optional; 607 reload_nongroup[s_reload] = 0; 608 reload_inc[s_reload] = 0; 609 /* Maybe we could combine these, but it seems too tricky. */ 610 reload_nocombine[s_reload] = 1; 611 reload_in_reg[s_reload] = 0; 612 reload_out_reg[s_reload] = 0; 613 reload_opnum[s_reload] = opnum; 614 reload_when_needed[s_reload] = secondary_type; 615 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1; 616 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1; 617 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing; 618 reload_secondary_out_icode[s_reload] 619 = ! in_p ? t_icode : CODE_FOR_nothing; 620 reload_secondary_p[s_reload] = 1; 621 622 n_reloads++; 623 624#ifdef SECONDARY_MEMORY_NEEDED 625 if (! in_p && icode == CODE_FOR_nothing 626 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode)) 627 get_secondary_mem (x, mode, opnum, type); 628#endif 629 } 630 631 *picode = icode; 632 return s_reload; 633} 634#endif /* HAVE_SECONDARY_RELOADS */ 635 636#ifdef SECONDARY_MEMORY_NEEDED 637 638/* Return a memory location that will be used to copy X in mode MODE. 639 If we haven't already made a location for this mode in this insn, 640 call find_reloads_address on the location being returned. */ 641 642rtx 643get_secondary_mem (x, mode, opnum, type) 644 rtx x; 645 enum machine_mode mode; 646 int opnum; 647 enum reload_type type; 648{ 649 rtx loc; 650 int mem_valid; 651 652 /* By default, if MODE is narrower than a word, widen it to a word. 653 This is required because most machines that require these memory 654 locations do not support short load and stores from all registers 655 (e.g., FP registers). */ 656 657#ifdef SECONDARY_MEMORY_NEEDED_MODE 658 mode = SECONDARY_MEMORY_NEEDED_MODE (mode); 659#else 660 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD) 661 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0); 662#endif 663 664 /* If we already have made a MEM for this operand in MODE, return it. */ 665 if (secondary_memlocs_elim[(int) mode][opnum] != 0) 666 return secondary_memlocs_elim[(int) mode][opnum]; 667 668 /* If this is the first time we've tried to get a MEM for this mode, 669 allocate a new one. `something_changed' in reload will get set 670 by noticing that the frame size has changed. */ 671 672 if (secondary_memlocs[(int) mode] == 0) 673 { 674#ifdef SECONDARY_MEMORY_NEEDED_RTX 675 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode); 676#else 677 secondary_memlocs[(int) mode] 678 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0); 679#endif 680 } 681 682 /* Get a version of the address doing any eliminations needed. If that 683 didn't give us a new MEM, make a new one if it isn't valid. */ 684 685 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX); 686 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0)); 687 688 if (! mem_valid && loc == secondary_memlocs[(int) mode]) 689 loc = copy_rtx (loc); 690 691 /* The only time the call below will do anything is if the stack 692 offset is too large. In that case IND_LEVELS doesn't matter, so we 693 can just pass a zero. Adjust the type to be the address of the 694 corresponding object. If the address was valid, save the eliminated 695 address. If it wasn't valid, we need to make a reload each time, so 696 don't save it. */ 697 698 if (! mem_valid) 699 { 700 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS 701 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS 702 : RELOAD_OTHER); 703 704 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0), 705 opnum, type, 0, 0); 706 } 707 708 secondary_memlocs_elim[(int) mode][opnum] = loc; 709 return loc; 710} 711 712/* Clear any secondary memory locations we've made. */ 713 714void 715clear_secondary_mem () 716{ 717 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs); 718} 719#endif /* SECONDARY_MEMORY_NEEDED */ 720 721/* Find the largest class for which every register number plus N is valid in 722 M1 (if in range). Abort if no such class exists. */ 723 724static enum reg_class 725find_valid_class (m1, n) 726 enum machine_mode m1; 727 int n; 728{ 729 int class; 730 int regno; 731 enum reg_class best_class; 732 int best_size = 0; 733 734 for (class = 1; class < N_REG_CLASSES; class++) 735 { 736 int bad = 0; 737 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++) 738 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno) 739 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n) 740 && ! HARD_REGNO_MODE_OK (regno + n, m1)) 741 bad = 1; 742 743 if (! bad && reg_class_size[class] > best_size) 744 best_class = class, best_size = reg_class_size[class]; 745 } 746 747 if (best_size == 0) 748 abort (); 749 750 return best_class; 751} 752 753/* Return the number of a previously made reload that can be combined with 754 a new one, or n_reloads if none of the existing reloads can be used. 755 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to 756 push_reload, they determine the kind of the new reload that we try to 757 combine. P_IN points to the corresponding value of IN, which can be 758 modified by this function. 759 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */ 760static int 761find_reusable_reload (p_in, out, class, type, opnum, dont_share) 762 rtx *p_in, out; 763 enum reg_class class; 764 enum reload_type type; 765 int opnum, dont_share; 766{ 767 rtx in = *p_in; 768 int i; 769 /* We can't merge two reloads if the output of either one is 770 earlyclobbered. */ 771 772 if (earlyclobber_operand_p (out)) 773 return n_reloads; 774 775 /* We can use an existing reload if the class is right 776 and at least one of IN and OUT is a match 777 and the other is at worst neutral. 778 (A zero compared against anything is neutral.) 779 780 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are 781 for the same thing since that can cause us to need more reload registers 782 than we otherwise would. */ 783 784 for (i = 0; i < n_reloads; i++) 785 if ((reg_class_subset_p (class, reload_reg_class[i]) 786 || reg_class_subset_p (reload_reg_class[i], class)) 787 /* If the existing reload has a register, it must fit our class. */ 788 && (reload_reg_rtx[i] == 0 789 || TEST_HARD_REG_BIT (reg_class_contents[(int) class], 790 true_regnum (reload_reg_rtx[i]))) 791 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share 792 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out))) 793 || 794 (out != 0 && MATCHES (reload_out[i], out) 795 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in)))) 796 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i])) 797 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 798 && MERGABLE_RELOADS (type, reload_when_needed[i], 799 opnum, reload_opnum[i])) 800 return i; 801 802 /* Reloading a plain reg for input can match a reload to postincrement 803 that reg, since the postincrement's value is the right value. 804 Likewise, it can match a preincrement reload, since we regard 805 the preincrementation as happening before any ref in this insn 806 to that register. */ 807 for (i = 0; i < n_reloads; i++) 808 if ((reg_class_subset_p (class, reload_reg_class[i]) 809 || reg_class_subset_p (reload_reg_class[i], class)) 810 /* If the existing reload has a register, it must fit our 811 class. */ 812 && (reload_reg_rtx[i] == 0 813 || TEST_HARD_REG_BIT (reg_class_contents[(int) class], 814 true_regnum (reload_reg_rtx[i]))) 815 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0 816 && ((GET_CODE (in) == REG 817 && (GET_CODE (reload_in[i]) == POST_INC 818 || GET_CODE (reload_in[i]) == POST_DEC 819 || GET_CODE (reload_in[i]) == PRE_INC 820 || GET_CODE (reload_in[i]) == PRE_DEC) 821 && MATCHES (XEXP (reload_in[i], 0), in)) 822 || 823 (GET_CODE (reload_in[i]) == REG 824 && (GET_CODE (in) == POST_INC 825 || GET_CODE (in) == POST_DEC 826 || GET_CODE (in) == PRE_INC 827 || GET_CODE (in) == PRE_DEC) 828 && MATCHES (XEXP (in, 0), reload_in[i]))) 829 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i])) 830 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 831 && MERGABLE_RELOADS (type, reload_when_needed[i], 832 opnum, reload_opnum[i])) 833 { 834 /* Make sure reload_in ultimately has the increment, 835 not the plain register. */ 836 if (GET_CODE (in) == REG) 837 *p_in = reload_in[i]; 838 return i; 839 } 840 return n_reloads; 841} 842 843/* Record one reload that needs to be performed. 844 IN is an rtx saying where the data are to be found before this instruction. 845 OUT says where they must be stored after the instruction. 846 (IN is zero for data not read, and OUT is zero for data not written.) 847 INLOC and OUTLOC point to the places in the instructions where 848 IN and OUT were found. 849 If IN and OUT are both non-zero, it means the same register must be used 850 to reload both IN and OUT. 851 852 CLASS is a register class required for the reloaded data. 853 INMODE is the machine mode that the instruction requires 854 for the reg that replaces IN and OUTMODE is likewise for OUT. 855 856 If IN is zero, then OUT's location and mode should be passed as 857 INLOC and INMODE. 858 859 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx. 860 861 OPTIONAL nonzero means this reload does not need to be performed: 862 it can be discarded if that is more convenient. 863 864 OPNUM and TYPE say what the purpose of this reload is. 865 866 The return value is the reload-number for this reload. 867 868 If both IN and OUT are nonzero, in some rare cases we might 869 want to make two separate reloads. (Actually we never do this now.) 870 Therefore, the reload-number for OUT is stored in 871 output_reloadnum when we return; the return value applies to IN. 872 Usually (presently always), when IN and OUT are nonzero, 873 the two reload-numbers are equal, but the caller should be careful to 874 distinguish them. */ 875 876static int 877push_reload (in, out, inloc, outloc, class, 878 inmode, outmode, strict_low, optional, opnum, type) 879 rtx in, out; 880 rtx *inloc, *outloc; 881 enum reg_class class; 882 enum machine_mode inmode, outmode; 883 int strict_low; 884 int optional; 885 int opnum; 886 enum reload_type type; 887{ 888 register int i; 889 int dont_share = 0; 890 int dont_remove_subreg = 0; 891 rtx *in_subreg_loc = 0, *out_subreg_loc = 0; 892 int secondary_in_reload = -1, secondary_out_reload = -1; 893 enum insn_code secondary_in_icode = CODE_FOR_nothing; 894 enum insn_code secondary_out_icode = CODE_FOR_nothing; 895 896 /* INMODE and/or OUTMODE could be VOIDmode if no mode 897 has been specified for the operand. In that case, 898 use the operand's mode as the mode to reload. */ 899 if (inmode == VOIDmode && in != 0) 900 inmode = GET_MODE (in); 901 if (outmode == VOIDmode && out != 0) 902 outmode = GET_MODE (out); 903 904 /* If IN is a pseudo register everywhere-equivalent to a constant, and 905 it is not in a hard register, reload straight from the constant, 906 since we want to get rid of such pseudo registers. 907 Often this is done earlier, but not always in find_reloads_address. */ 908 if (in != 0 && GET_CODE (in) == REG) 909 { 910 register int regno = REGNO (in); 911 912 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 913 && reg_equiv_constant[regno] != 0) 914 in = reg_equiv_constant[regno]; 915 } 916 917 /* Likewise for OUT. Of course, OUT will never be equivalent to 918 an actual constant, but it might be equivalent to a memory location 919 (in the case of a parameter). */ 920 if (out != 0 && GET_CODE (out) == REG) 921 { 922 register int regno = REGNO (out); 923 924 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 925 && reg_equiv_constant[regno] != 0) 926 out = reg_equiv_constant[regno]; 927 } 928 929 /* If we have a read-write operand with an address side-effect, 930 change either IN or OUT so the side-effect happens only once. */ 931 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out)) 932 { 933 if (GET_CODE (XEXP (in, 0)) == POST_INC 934 || GET_CODE (XEXP (in, 0)) == POST_DEC) 935 in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0)); 936 if (GET_CODE (XEXP (in, 0)) == PRE_INC 937 || GET_CODE (XEXP (in, 0)) == PRE_DEC) 938 out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0)); 939 } 940 941 /* If we are reloading a (SUBREG constant ...), really reload just the 942 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)). 943 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still 944 a pseudo and hence will become a MEM) with M1 wider than M2 and the 945 register is a pseudo, also reload the inside expression. 946 For machines that extend byte loads, do this for any SUBREG of a pseudo 947 where both M1 and M2 are a word or smaller, M1 is wider than M2, and 948 M2 is an integral mode that gets extended when loaded. 949 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 950 either M1 is not valid for R or M2 is wider than a word but we only 951 need one word to store an M2-sized quantity in R. 952 (However, if OUT is nonzero, we need to reload the reg *and* 953 the subreg, so do nothing here, and let following statement handle it.) 954 955 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere; 956 we can't handle it here because CONST_INT does not indicate a mode. 957 958 Similarly, we must reload the inside expression if we have a 959 STRICT_LOW_PART (presumably, in == out in the cas). 960 961 Also reload the inner expression if it does not require a secondary 962 reload but the SUBREG does. 963 964 Finally, reload the inner expression if it is a register that is in 965 the class whose registers cannot be referenced in a different size 966 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we 967 cannot reload just the inside since we might end up with the wrong 968 register class. But if it is inside a STRICT_LOW_PART, we have 969 no choice, so we hope we do get the right register class there. */ 970 971 if (in != 0 && GET_CODE (in) == SUBREG 972 && (SUBREG_WORD (in) == 0 || strict_low) 973#ifdef CLASS_CANNOT_CHANGE_SIZE 974 && class != CLASS_CANNOT_CHANGE_SIZE 975#endif 976 && (CONSTANT_P (SUBREG_REG (in)) 977 || GET_CODE (SUBREG_REG (in)) == PLUS 978 || strict_low 979 || (((GET_CODE (SUBREG_REG (in)) == REG 980 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER) 981 || GET_CODE (SUBREG_REG (in)) == MEM) 982 && ((GET_MODE_SIZE (inmode) 983 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 984#ifdef LOAD_EXTEND_OP 985 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 986 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 987 <= UNITS_PER_WORD) 988 && (GET_MODE_SIZE (inmode) 989 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 990 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in))) 991 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL) 992#endif 993#ifdef WORD_REGISTER_OPERATIONS 994 || ((GET_MODE_SIZE (inmode) 995 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 996 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD == 997 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1) 998 / UNITS_PER_WORD))) 999#endif 1000 )) 1001 || (GET_CODE (SUBREG_REG (in)) == REG 1002 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1003 /* The case where out is nonzero 1004 is handled differently in the following statement. */ 1005 && (out == 0 || SUBREG_WORD (in) == 0) 1006 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 1007 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1008 > UNITS_PER_WORD) 1009 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1010 / UNITS_PER_WORD) 1011 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)), 1012 GET_MODE (SUBREG_REG (in))))) 1013 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in)) 1014 + SUBREG_WORD (in)), 1015 inmode))) 1016#ifdef SECONDARY_INPUT_RELOAD_CLASS 1017 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS 1018 && (SECONDARY_INPUT_RELOAD_CLASS (class, 1019 GET_MODE (SUBREG_REG (in)), 1020 SUBREG_REG (in)) 1021 == NO_REGS)) 1022#endif 1023#ifdef CLASS_CANNOT_CHANGE_SIZE 1024 || (GET_CODE (SUBREG_REG (in)) == REG 1025 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1026 && (TEST_HARD_REG_BIT 1027 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE], 1028 REGNO (SUBREG_REG (in)))) 1029 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1030 != GET_MODE_SIZE (inmode))) 1031#endif 1032 )) 1033 { 1034 in_subreg_loc = inloc; 1035 inloc = &SUBREG_REG (in); 1036 in = *inloc; 1037#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS) 1038 if (GET_CODE (in) == MEM) 1039 /* This is supposed to happen only for paradoxical subregs made by 1040 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */ 1041 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode)) 1042 abort (); 1043#endif 1044 inmode = GET_MODE (in); 1045 } 1046 1047 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1048 either M1 is not valid for R or M2 is wider than a word but we only 1049 need one word to store an M2-sized quantity in R. 1050 1051 However, we must reload the inner reg *as well as* the subreg in 1052 that case. */ 1053 1054 /* Similar issue for (SUBREG constant ...) if it was not handled by the 1055 code above. This can happen if SUBREG_WORD != 0. */ 1056 1057 if (in != 0 && GET_CODE (in) == SUBREG 1058 && (CONSTANT_P (SUBREG_REG (in)) 1059 || (GET_CODE (SUBREG_REG (in)) == REG 1060 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1061 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)) 1062 + SUBREG_WORD (in), 1063 inmode) 1064 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 1065 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1066 > UNITS_PER_WORD) 1067 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1068 / UNITS_PER_WORD) 1069 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)), 1070 GET_MODE (SUBREG_REG (in))))))))) 1071 { 1072 /* This relies on the fact that emit_reload_insns outputs the 1073 instructions for input reloads of type RELOAD_OTHER in the same 1074 order as the reloads. Thus if the outer reload is also of type 1075 RELOAD_OTHER, we are guaranteed that this inner reload will be 1076 output before the outer reload. */ 1077 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR, 1078 find_valid_class (inmode, SUBREG_WORD (in)), 1079 VOIDmode, VOIDmode, 0, 0, opnum, type); 1080 dont_remove_subreg = 1; 1081 } 1082 1083 /* Similarly for paradoxical and problematical SUBREGs on the output. 1084 Note that there is no reason we need worry about the previous value 1085 of SUBREG_REG (out); even if wider than out, 1086 storing in a subreg is entitled to clobber it all 1087 (except in the case of STRICT_LOW_PART, 1088 and in that case the constraint should label it input-output.) */ 1089 if (out != 0 && GET_CODE (out) == SUBREG 1090 && (SUBREG_WORD (out) == 0 || strict_low) 1091#ifdef CLASS_CANNOT_CHANGE_SIZE 1092 && class != CLASS_CANNOT_CHANGE_SIZE 1093#endif 1094 && (CONSTANT_P (SUBREG_REG (out)) 1095 || strict_low 1096 || (((GET_CODE (SUBREG_REG (out)) == REG 1097 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER) 1098 || GET_CODE (SUBREG_REG (out)) == MEM) 1099 && ((GET_MODE_SIZE (outmode) 1100 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) 1101#ifdef WORD_REGISTER_OPERATIONS 1102 || ((GET_MODE_SIZE (outmode) 1103 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) 1104 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD == 1105 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1) 1106 / UNITS_PER_WORD))) 1107#endif 1108 )) 1109 || (GET_CODE (SUBREG_REG (out)) == REG 1110 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1111 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD 1112 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1113 > UNITS_PER_WORD) 1114 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1115 / UNITS_PER_WORD) 1116 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)), 1117 GET_MODE (SUBREG_REG (out))))) 1118 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out)) 1119 + SUBREG_WORD (out)), 1120 outmode))) 1121#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 1122 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS 1123 && (SECONDARY_OUTPUT_RELOAD_CLASS (class, 1124 GET_MODE (SUBREG_REG (out)), 1125 SUBREG_REG (out)) 1126 == NO_REGS)) 1127#endif 1128#ifdef CLASS_CANNOT_CHANGE_SIZE 1129 || (GET_CODE (SUBREG_REG (out)) == REG 1130 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1131 && (TEST_HARD_REG_BIT 1132 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE], 1133 REGNO (SUBREG_REG (out)))) 1134 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1135 != GET_MODE_SIZE (outmode))) 1136#endif 1137 )) 1138 { 1139 out_subreg_loc = outloc; 1140 outloc = &SUBREG_REG (out); 1141 out = *outloc; 1142#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS) 1143 if (GET_CODE (out) == MEM 1144 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode)) 1145 abort (); 1146#endif 1147 outmode = GET_MODE (out); 1148 } 1149 1150 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1151 either M1 is not valid for R or M2 is wider than a word but we only 1152 need one word to store an M2-sized quantity in R. 1153 1154 However, we must reload the inner reg *as well as* the subreg in 1155 that case. In this case, the inner reg is an in-out reload. */ 1156 1157 if (out != 0 && GET_CODE (out) == SUBREG 1158 && GET_CODE (SUBREG_REG (out)) == REG 1159 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1160 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out), 1161 outmode) 1162 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD 1163 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1164 > UNITS_PER_WORD) 1165 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1166 / UNITS_PER_WORD) 1167 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)), 1168 GET_MODE (SUBREG_REG (out))))))) 1169 { 1170 /* This relies on the fact that emit_reload_insns outputs the 1171 instructions for output reloads of type RELOAD_OTHER in reverse 1172 order of the reloads. Thus if the outer reload is also of type 1173 RELOAD_OTHER, we are guaranteed that this inner reload will be 1174 output after the outer reload. */ 1175 dont_remove_subreg = 1; 1176 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out), 1177 &SUBREG_REG (out), 1178 find_valid_class (outmode, SUBREG_WORD (out)), 1179 VOIDmode, VOIDmode, 0, 0, 1180 opnum, RELOAD_OTHER); 1181 } 1182 1183 /* If IN appears in OUT, we can't share any input-only reload for IN. */ 1184 if (in != 0 && out != 0 && GET_CODE (out) == MEM 1185 && (GET_CODE (in) == REG || GET_CODE (in) == MEM) 1186 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0))) 1187 dont_share = 1; 1188 1189 /* If IN is a SUBREG of a hard register, make a new REG. This 1190 simplifies some of the cases below. */ 1191 1192 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG 1193 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1194 && ! dont_remove_subreg) 1195 in = gen_rtx_REG (GET_MODE (in), 1196 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in)); 1197 1198 /* Similarly for OUT. */ 1199 if (out != 0 && GET_CODE (out) == SUBREG 1200 && GET_CODE (SUBREG_REG (out)) == REG 1201 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1202 && ! dont_remove_subreg) 1203 out = gen_rtx_REG (GET_MODE (out), 1204 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out)); 1205 1206 /* Narrow down the class of register wanted if that is 1207 desirable on this machine for efficiency. */ 1208 if (in != 0) 1209 class = PREFERRED_RELOAD_CLASS (in, class); 1210 1211 /* Output reloads may need analogous treatment, different in detail. */ 1212#ifdef PREFERRED_OUTPUT_RELOAD_CLASS 1213 if (out != 0) 1214 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class); 1215#endif 1216 1217 /* Make sure we use a class that can handle the actual pseudo 1218 inside any subreg. For example, on the 386, QImode regs 1219 can appear within SImode subregs. Although GENERAL_REGS 1220 can handle SImode, QImode needs a smaller class. */ 1221#ifdef LIMIT_RELOAD_CLASS 1222 if (in_subreg_loc) 1223 class = LIMIT_RELOAD_CLASS (inmode, class); 1224 else if (in != 0 && GET_CODE (in) == SUBREG) 1225 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class); 1226 1227 if (out_subreg_loc) 1228 class = LIMIT_RELOAD_CLASS (outmode, class); 1229 if (out != 0 && GET_CODE (out) == SUBREG) 1230 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class); 1231#endif 1232 1233 /* Verify that this class is at least possible for the mode that 1234 is specified. */ 1235 if (this_insn_is_asm) 1236 { 1237 enum machine_mode mode; 1238 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode)) 1239 mode = inmode; 1240 else 1241 mode = outmode; 1242 if (mode == VOIDmode) 1243 { 1244 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'"); 1245 mode = word_mode; 1246 if (in != 0) 1247 inmode = word_mode; 1248 if (out != 0) 1249 outmode = word_mode; 1250 } 1251 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1252 if (HARD_REGNO_MODE_OK (i, mode) 1253 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i)) 1254 { 1255 int nregs = HARD_REGNO_NREGS (i, mode); 1256 1257 int j; 1258 for (j = 1; j < nregs; j++) 1259 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j)) 1260 break; 1261 if (j == nregs) 1262 break; 1263 } 1264 if (i == FIRST_PSEUDO_REGISTER) 1265 { 1266 error_for_asm (this_insn, "impossible register constraint in `asm'"); 1267 class = ALL_REGS; 1268 } 1269 } 1270 1271 /* Optional output reloads are always OK even if we have no register class, 1272 since the function of these reloads is only to have spill_reg_store etc. 1273 set, so that the storing insn can be deleted later. */ 1274 if (class == NO_REGS 1275 && (optional == 0 || type != RELOAD_FOR_OUTPUT)) 1276 abort (); 1277 1278 i = find_reusable_reload (&in, out, class, type, opnum, dont_share); 1279 1280 if (i == n_reloads) 1281 { 1282 /* See if we need a secondary reload register to move between CLASS 1283 and IN or CLASS and OUT. Get the icode and push any required reloads 1284 needed for each of them if so. */ 1285 1286#ifdef SECONDARY_INPUT_RELOAD_CLASS 1287 if (in != 0) 1288 secondary_in_reload 1289 = push_secondary_reload (1, in, opnum, optional, class, inmode, type, 1290 &secondary_in_icode); 1291#endif 1292 1293#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 1294 if (out != 0 && GET_CODE (out) != SCRATCH) 1295 secondary_out_reload 1296 = push_secondary_reload (0, out, opnum, optional, class, outmode, 1297 type, &secondary_out_icode); 1298#endif 1299 1300 /* We found no existing reload suitable for re-use. 1301 So add an additional reload. */ 1302 1303#ifdef SECONDARY_MEMORY_NEEDED 1304 /* If a memory location is needed for the copy, make one. */ 1305 if (in != 0 && GET_CODE (in) == REG 1306 && REGNO (in) < FIRST_PSEUDO_REGISTER 1307 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)), 1308 class, inmode)) 1309 get_secondary_mem (in, inmode, opnum, type); 1310#endif 1311 1312 i = n_reloads; 1313 reload_in[i] = in; 1314 reload_out[i] = out; 1315 reload_reg_class[i] = class; 1316 reload_inmode[i] = inmode; 1317 reload_outmode[i] = outmode; 1318 reload_reg_rtx[i] = 0; 1319 reload_optional[i] = optional; 1320 reload_nongroup[i] = 0; 1321 reload_inc[i] = 0; 1322 reload_nocombine[i] = 0; 1323 reload_in_reg[i] = inloc ? *inloc : 0; 1324 reload_out_reg[i] = outloc ? *outloc : 0; 1325 reload_opnum[i] = opnum; 1326 reload_when_needed[i] = type; 1327 reload_secondary_in_reload[i] = secondary_in_reload; 1328 reload_secondary_out_reload[i] = secondary_out_reload; 1329 reload_secondary_in_icode[i] = secondary_in_icode; 1330 reload_secondary_out_icode[i] = secondary_out_icode; 1331 reload_secondary_p[i] = 0; 1332 1333 n_reloads++; 1334 1335#ifdef SECONDARY_MEMORY_NEEDED 1336 if (out != 0 && GET_CODE (out) == REG 1337 && REGNO (out) < FIRST_PSEUDO_REGISTER 1338 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)), 1339 outmode)) 1340 get_secondary_mem (out, outmode, opnum, type); 1341#endif 1342 } 1343 else 1344 { 1345 /* We are reusing an existing reload, 1346 but we may have additional information for it. 1347 For example, we may now have both IN and OUT 1348 while the old one may have just one of them. */ 1349 1350 /* The modes can be different. If they are, we want to reload in 1351 the larger mode, so that the value is valid for both modes. */ 1352 if (inmode != VOIDmode 1353 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i])) 1354 reload_inmode[i] = inmode; 1355 if (outmode != VOIDmode 1356 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i])) 1357 reload_outmode[i] = outmode; 1358 if (in != 0) 1359 { 1360 rtx in_reg = inloc ? *inloc : 0; 1361 /* If we merge reloads for two distinct rtl expressions that 1362 are identical in content, there might be duplicate address 1363 reloads. Remove the extra set now, so that if we later find 1364 that we can inherit this reload, we can get rid of the 1365 address reloads altogether. 1366 1367 Do not do this if both reloads are optional since the result 1368 would be an optional reload which could potentially leave 1369 unresolved address replacements. 1370 1371 It is not sufficient to call transfer_replacements since 1372 choose_reload_regs will remove the replacements for address 1373 reloads of inherited reloads which results in the same 1374 problem. */ 1375 if (reload_in[i] != in && rtx_equal_p (in, reload_in[i]) 1376 && ! (reload_optional[i] && optional)) 1377 { 1378 /* We must keep the address reload with the lower operand 1379 number alive. */ 1380 if (opnum > reload_opnum[i]) 1381 { 1382 remove_address_replacements (in); 1383 in = reload_in[i]; 1384 in_reg = reload_in_reg[i]; 1385 } 1386 else 1387 remove_address_replacements (reload_in[i]); 1388 } 1389 reload_in[i] = in; 1390 reload_in_reg[i] = in_reg; 1391 } 1392 if (out != 0) 1393 { 1394 reload_out[i] = out; 1395 reload_out_reg[i] = outloc ? *outloc : 0; 1396 } 1397 if (reg_class_subset_p (class, reload_reg_class[i])) 1398 reload_reg_class[i] = class; 1399 reload_optional[i] &= optional; 1400 if (MERGE_TO_OTHER (type, reload_when_needed[i], 1401 opnum, reload_opnum[i])) 1402 reload_when_needed[i] = RELOAD_OTHER; 1403 reload_opnum[i] = MIN (reload_opnum[i], opnum); 1404 } 1405 1406 /* If the ostensible rtx being reload differs from the rtx found 1407 in the location to substitute, this reload is not safe to combine 1408 because we cannot reliably tell whether it appears in the insn. */ 1409 1410 if (in != 0 && in != *inloc) 1411 reload_nocombine[i] = 1; 1412 1413#if 0 1414 /* This was replaced by changes in find_reloads_address_1 and the new 1415 function inc_for_reload, which go with a new meaning of reload_inc. */ 1416 1417 /* If this is an IN/OUT reload in an insn that sets the CC, 1418 it must be for an autoincrement. It doesn't work to store 1419 the incremented value after the insn because that would clobber the CC. 1420 So we must do the increment of the value reloaded from, 1421 increment it, store it back, then decrement again. */ 1422 if (out != 0 && sets_cc0_p (PATTERN (this_insn))) 1423 { 1424 out = 0; 1425 reload_out[i] = 0; 1426 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in); 1427 /* If we did not find a nonzero amount-to-increment-by, 1428 that contradicts the belief that IN is being incremented 1429 in an address in this insn. */ 1430 if (reload_inc[i] == 0) 1431 abort (); 1432 } 1433#endif 1434 1435 /* If we will replace IN and OUT with the reload-reg, 1436 record where they are located so that substitution need 1437 not do a tree walk. */ 1438 1439 if (replace_reloads) 1440 { 1441 if (inloc != 0) 1442 { 1443 register struct replacement *r = &replacements[n_replacements++]; 1444 r->what = i; 1445 r->subreg_loc = in_subreg_loc; 1446 r->where = inloc; 1447 r->mode = inmode; 1448 } 1449 if (outloc != 0 && outloc != inloc) 1450 { 1451 register struct replacement *r = &replacements[n_replacements++]; 1452 r->what = i; 1453 r->where = outloc; 1454 r->subreg_loc = out_subreg_loc; 1455 r->mode = outmode; 1456 } 1457 } 1458 1459 /* If this reload is just being introduced and it has both 1460 an incoming quantity and an outgoing quantity that are 1461 supposed to be made to match, see if either one of the two 1462 can serve as the place to reload into. 1463 1464 If one of them is acceptable, set reload_reg_rtx[i] 1465 to that one. */ 1466 1467 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0) 1468 { 1469 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc, 1470 inmode, outmode, 1471 reload_reg_class[i], i, 1472 earlyclobber_operand_p (out)); 1473 1474 /* If the outgoing register already contains the same value 1475 as the incoming one, we can dispense with loading it. 1476 The easiest way to tell the caller that is to give a phony 1477 value for the incoming operand (same as outgoing one). */ 1478 if (reload_reg_rtx[i] == out 1479 && (GET_CODE (in) == REG || CONSTANT_P (in)) 1480 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out), 1481 static_reload_reg_p, i, inmode)) 1482 reload_in[i] = out; 1483 } 1484 1485 /* If this is an input reload and the operand contains a register that 1486 dies in this insn and is used nowhere else, see if it is the right class 1487 to be used for this reload. Use it if so. (This occurs most commonly 1488 in the case of paradoxical SUBREGs and in-out reloads). We cannot do 1489 this if it is also an output reload that mentions the register unless 1490 the output is a SUBREG that clobbers an entire register. 1491 1492 Note that the operand might be one of the spill regs, if it is a 1493 pseudo reg and we are in a block where spilling has not taken place. 1494 But if there is no spilling in this block, that is OK. 1495 An explicitly used hard reg cannot be a spill reg. */ 1496 1497 if (reload_reg_rtx[i] == 0 && in != 0) 1498 { 1499 rtx note; 1500 int regno; 1501 1502 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) 1503 if (REG_NOTE_KIND (note) == REG_DEAD 1504 && GET_CODE (XEXP (note, 0)) == REG 1505 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER 1506 && reg_mentioned_p (XEXP (note, 0), in) 1507 && ! refers_to_regno_for_reload_p (regno, 1508 (regno 1509 + HARD_REGNO_NREGS (regno, 1510 inmode)), 1511 PATTERN (this_insn), inloc) 1512 /* If this is also an output reload, IN cannot be used as 1513 the reload register if it is set in this insn unless IN 1514 is also OUT. */ 1515 && (out == 0 || in == out 1516 || ! hard_reg_set_here_p (regno, 1517 (regno 1518 + HARD_REGNO_NREGS (regno, 1519 inmode)), 1520 PATTERN (this_insn))) 1521 /* ??? Why is this code so different from the previous? 1522 Is there any simple coherent way to describe the two together? 1523 What's going on here. */ 1524 && (in != out 1525 || (GET_CODE (in) == SUBREG 1526 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1)) 1527 / UNITS_PER_WORD) 1528 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1529 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))) 1530 /* Make sure the operand fits in the reg that dies. */ 1531 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))) 1532 && HARD_REGNO_MODE_OK (regno, inmode) 1533 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))) 1534 && HARD_REGNO_MODE_OK (regno, outmode) 1535 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno) 1536 && !fixed_regs[regno]) 1537 { 1538 reload_reg_rtx[i] = gen_rtx_REG (inmode, regno); 1539 break; 1540 } 1541 } 1542 1543 if (out) 1544 output_reloadnum = i; 1545 1546 return i; 1547} 1548 1549/* Record an additional place we must replace a value 1550 for which we have already recorded a reload. 1551 RELOADNUM is the value returned by push_reload 1552 when the reload was recorded. 1553 This is used in insn patterns that use match_dup. */ 1554 1555static void 1556push_replacement (loc, reloadnum, mode) 1557 rtx *loc; 1558 int reloadnum; 1559 enum machine_mode mode; 1560{ 1561 if (replace_reloads) 1562 { 1563 register struct replacement *r = &replacements[n_replacements++]; 1564 r->what = reloadnum; 1565 r->where = loc; 1566 r->subreg_loc = 0; 1567 r->mode = mode; 1568 } 1569} 1570 1571/* Transfer all replacements that used to be in reload FROM to be in 1572 reload TO. */ 1573 1574void 1575transfer_replacements (to, from) 1576 int to, from; 1577{ 1578 int i; 1579 1580 for (i = 0; i < n_replacements; i++) 1581 if (replacements[i].what == from) 1582 replacements[i].what = to; 1583} 1584 1585/* IN_RTX is the value loaded by a reload that we now decided to inherit, 1586 or a subpart of it. If we have any replacements registered for IN_RTX, 1587 cancel the reloads that were supposed to load them. 1588 Return non-zero if we canceled any reloads. */ 1589int 1590remove_address_replacements (in_rtx) 1591 rtx in_rtx; 1592{ 1593 int i, j; 1594 char reload_flags[MAX_RELOADS]; 1595 int something_changed = 0; 1596 1597 bzero (reload_flags, sizeof reload_flags); 1598 for (i = 0, j = 0; i < n_replacements; i++) 1599 { 1600 if (loc_mentioned_in_p (replacements[i].where, in_rtx)) 1601 reload_flags[replacements[i].what] |= 1; 1602 else 1603 { 1604 replacements[j++] = replacements[i]; 1605 reload_flags[replacements[i].what] |= 2; 1606 } 1607 } 1608 /* Note that the following store must be done before the recursive calls. */ 1609 n_replacements = j; 1610 1611 for (i = n_reloads - 1; i >= 0; i--) 1612 { 1613 if (reload_flags[i] == 1) 1614 { 1615 deallocate_reload_reg (i); 1616 remove_address_replacements (reload_in[i]); 1617 reload_in[i] = 0; 1618 something_changed = 1; 1619 } 1620 } 1621 return something_changed; 1622} 1623 1624/* Return non-zero if IN contains a piece of rtl that has the address LOC */ 1625static int 1626loc_mentioned_in_p (loc, in) 1627 rtx *loc, in; 1628{ 1629 enum rtx_code code = GET_CODE (in); 1630 char *fmt = GET_RTX_FORMAT (code); 1631 int i, j; 1632 1633 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1634 { 1635 if (loc == &XEXP (in, i)) 1636 return 1; 1637 if (fmt[i] == 'e') 1638 { 1639 if (loc_mentioned_in_p (loc, XEXP (in, i))) 1640 return 1; 1641 } 1642 else if (fmt[i] == 'E') 1643 for (j = XVECLEN (in, i) - 1; i >= 0; i--) 1644 if (loc_mentioned_in_p (loc, XVECEXP (in, i, j))) 1645 return 1; 1646 } 1647 return 0; 1648} 1649 1650/* If there is only one output reload, and it is not for an earlyclobber 1651 operand, try to combine it with a (logically unrelated) input reload 1652 to reduce the number of reload registers needed. 1653 1654 This is safe if the input reload does not appear in 1655 the value being output-reloaded, because this implies 1656 it is not needed any more once the original insn completes. 1657 1658 If that doesn't work, see we can use any of the registers that 1659 die in this insn as a reload register. We can if it is of the right 1660 class and does not appear in the value being output-reloaded. */ 1661 1662static void 1663combine_reloads () 1664{ 1665 int i; 1666 int output_reload = -1; 1667 int secondary_out = -1; 1668 rtx note; 1669 1670 /* Find the output reload; return unless there is exactly one 1671 and that one is mandatory. */ 1672 1673 for (i = 0; i < n_reloads; i++) 1674 if (reload_out[i] != 0) 1675 { 1676 if (output_reload >= 0) 1677 return; 1678 output_reload = i; 1679 } 1680 1681 if (output_reload < 0 || reload_optional[output_reload]) 1682 return; 1683 1684 /* An input-output reload isn't combinable. */ 1685 1686 if (reload_in[output_reload] != 0) 1687 return; 1688 1689 /* If this reload is for an earlyclobber operand, we can't do anything. */ 1690 if (earlyclobber_operand_p (reload_out[output_reload])) 1691 return; 1692 1693 /* Check each input reload; can we combine it? */ 1694 1695 for (i = 0; i < n_reloads; i++) 1696 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i] 1697 /* Life span of this reload must not extend past main insn. */ 1698 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS 1699 && reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS 1700 && reload_when_needed[i] != RELOAD_OTHER 1701 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i]) 1702 == CLASS_MAX_NREGS (reload_reg_class[output_reload], 1703 reload_outmode[output_reload])) 1704 && reload_inc[i] == 0 1705 && reload_reg_rtx[i] == 0 1706#ifdef SECONDARY_MEMORY_NEEDED 1707 /* Don't combine two reloads with different secondary 1708 memory locations. */ 1709 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0 1710 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0 1711 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]], 1712 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]])) 1713#endif 1714 && (SMALL_REGISTER_CLASSES 1715 ? (reload_reg_class[i] == reload_reg_class[output_reload]) 1716 : (reg_class_subset_p (reload_reg_class[i], 1717 reload_reg_class[output_reload]) 1718 || reg_class_subset_p (reload_reg_class[output_reload], 1719 reload_reg_class[i]))) 1720 && (MATCHES (reload_in[i], reload_out[output_reload]) 1721 /* Args reversed because the first arg seems to be 1722 the one that we imagine being modified 1723 while the second is the one that might be affected. */ 1724 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload], 1725 reload_in[i]) 1726 /* However, if the input is a register that appears inside 1727 the output, then we also can't share. 1728 Imagine (set (mem (reg 69)) (plus (reg 69) ...)). 1729 If the same reload reg is used for both reg 69 and the 1730 result to be stored in memory, then that result 1731 will clobber the address of the memory ref. */ 1732 && ! (GET_CODE (reload_in[i]) == REG 1733 && reg_overlap_mentioned_for_reload_p (reload_in[i], 1734 reload_out[output_reload])))) 1735 && (reg_class_size[(int) reload_reg_class[i]] 1736 || SMALL_REGISTER_CLASSES) 1737 /* We will allow making things slightly worse by combining an 1738 input and an output, but no worse than that. */ 1739 && (reload_when_needed[i] == RELOAD_FOR_INPUT 1740 || reload_when_needed[i] == RELOAD_FOR_OUTPUT)) 1741 { 1742 int j; 1743 1744 /* We have found a reload to combine with! */ 1745 reload_out[i] = reload_out[output_reload]; 1746 reload_out_reg[i] = reload_out_reg[output_reload]; 1747 reload_outmode[i] = reload_outmode[output_reload]; 1748 /* Mark the old output reload as inoperative. */ 1749 reload_out[output_reload] = 0; 1750 /* The combined reload is needed for the entire insn. */ 1751 reload_when_needed[i] = RELOAD_OTHER; 1752 /* If the output reload had a secondary reload, copy it. */ 1753 if (reload_secondary_out_reload[output_reload] != -1) 1754 { 1755 reload_secondary_out_reload[i] 1756 = reload_secondary_out_reload[output_reload]; 1757 reload_secondary_out_icode[i] 1758 = reload_secondary_out_icode[output_reload]; 1759 } 1760 1761#ifdef SECONDARY_MEMORY_NEEDED 1762 /* Copy any secondary MEM. */ 1763 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0) 1764 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] 1765 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]; 1766#endif 1767 /* If required, minimize the register class. */ 1768 if (reg_class_subset_p (reload_reg_class[output_reload], 1769 reload_reg_class[i])) 1770 reload_reg_class[i] = reload_reg_class[output_reload]; 1771 1772 /* Transfer all replacements from the old reload to the combined. */ 1773 for (j = 0; j < n_replacements; j++) 1774 if (replacements[j].what == output_reload) 1775 replacements[j].what = i; 1776 1777 return; 1778 } 1779 1780 /* If this insn has only one operand that is modified or written (assumed 1781 to be the first), it must be the one corresponding to this reload. It 1782 is safe to use anything that dies in this insn for that output provided 1783 that it does not occur in the output (we already know it isn't an 1784 earlyclobber. If this is an asm insn, give up. */ 1785 1786 if (INSN_CODE (this_insn) == -1) 1787 return; 1788 1789 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++) 1790 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '=' 1791 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+') 1792 return; 1793 1794 /* See if some hard register that dies in this insn and is not used in 1795 the output is the right class. Only works if the register we pick 1796 up can fully hold our output reload. */ 1797 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) 1798 if (REG_NOTE_KIND (note) == REG_DEAD 1799 && GET_CODE (XEXP (note, 0)) == REG 1800 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0), 1801 reload_out[output_reload]) 1802 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER 1803 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload]) 1804 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]], 1805 REGNO (XEXP (note, 0))) 1806 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload]) 1807 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0)))) 1808 /* Ensure that a secondary or tertiary reload for this output 1809 won't want this register. */ 1810 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1 1811 || (! (TEST_HARD_REG_BIT 1812 (reg_class_contents[(int) reload_reg_class[secondary_out]], 1813 REGNO (XEXP (note, 0)))) 1814 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1 1815 || ! (TEST_HARD_REG_BIT 1816 (reg_class_contents[(int) reload_reg_class[secondary_out]], 1817 REGNO (XEXP (note, 0))))))) 1818 && ! fixed_regs[REGNO (XEXP (note, 0))]) 1819 { 1820 reload_reg_rtx[output_reload] 1821 = gen_rtx_REG (reload_outmode[output_reload], 1822 REGNO (XEXP (note, 0))); 1823 return; 1824 } 1825} 1826 1827/* Try to find a reload register for an in-out reload (expressions IN and OUT). 1828 See if one of IN and OUT is a register that may be used; 1829 this is desirable since a spill-register won't be needed. 1830 If so, return the register rtx that proves acceptable. 1831 1832 INLOC and OUTLOC are locations where IN and OUT appear in the insn. 1833 CLASS is the register class required for the reload. 1834 1835 If FOR_REAL is >= 0, it is the number of the reload, 1836 and in some cases when it can be discovered that OUT doesn't need 1837 to be computed, clear out reload_out[FOR_REAL]. 1838 1839 If FOR_REAL is -1, this should not be done, because this call 1840 is just to see if a register can be found, not to find and install it. 1841 1842 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This 1843 puts an additional constraint on being able to use IN for OUT since 1844 IN must not appear elsewhere in the insn (it is assumed that IN itself 1845 is safe from the earlyclobber). */ 1846 1847static rtx 1848find_dummy_reload (real_in, real_out, inloc, outloc, 1849 inmode, outmode, class, for_real, earlyclobber) 1850 rtx real_in, real_out; 1851 rtx *inloc, *outloc; 1852 enum machine_mode inmode, outmode; 1853 enum reg_class class; 1854 int for_real; 1855 int earlyclobber; 1856{ 1857 rtx in = real_in; 1858 rtx out = real_out; 1859 int in_offset = 0; 1860 int out_offset = 0; 1861 rtx value = 0; 1862 1863 /* If operands exceed a word, we can't use either of them 1864 unless they have the same size. */ 1865 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode) 1866 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD 1867 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD)) 1868 return 0; 1869 1870 /* Find the inside of any subregs. */ 1871 while (GET_CODE (out) == SUBREG) 1872 { 1873 out_offset = SUBREG_WORD (out); 1874 out = SUBREG_REG (out); 1875 } 1876 while (GET_CODE (in) == SUBREG) 1877 { 1878 in_offset = SUBREG_WORD (in); 1879 in = SUBREG_REG (in); 1880 } 1881 1882 /* Narrow down the reg class, the same way push_reload will; 1883 otherwise we might find a dummy now, but push_reload won't. */ 1884 class = PREFERRED_RELOAD_CLASS (in, class); 1885 1886 /* See if OUT will do. */ 1887 if (GET_CODE (out) == REG 1888 && REGNO (out) < FIRST_PSEUDO_REGISTER) 1889 { 1890 register int regno = REGNO (out) + out_offset; 1891 int nwords = HARD_REGNO_NREGS (regno, outmode); 1892 rtx saved_rtx; 1893 1894 /* When we consider whether the insn uses OUT, 1895 ignore references within IN. They don't prevent us 1896 from copying IN into OUT, because those refs would 1897 move into the insn that reloads IN. 1898 1899 However, we only ignore IN in its role as this reload. 1900 If the insn uses IN elsewhere and it contains OUT, 1901 that counts. We can't be sure it's the "same" operand 1902 so it might not go through this reload. */ 1903 saved_rtx = *inloc; 1904 *inloc = const0_rtx; 1905 1906 if (regno < FIRST_PSEUDO_REGISTER 1907 /* A fixed reg that can overlap other regs better not be used 1908 for reloading in any way. */ 1909#ifdef OVERLAPPING_REGNO_P 1910 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno)) 1911#endif 1912 && ! refers_to_regno_for_reload_p (regno, regno + nwords, 1913 PATTERN (this_insn), outloc)) 1914 { 1915 int i; 1916 for (i = 0; i < nwords; i++) 1917 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1918 regno + i)) 1919 break; 1920 1921 if (i == nwords) 1922 { 1923 if (GET_CODE (real_out) == REG) 1924 value = real_out; 1925 else 1926 value = gen_rtx_REG (outmode, regno); 1927 } 1928 } 1929 1930 *inloc = saved_rtx; 1931 } 1932 1933 /* Consider using IN if OUT was not acceptable 1934 or if OUT dies in this insn (like the quotient in a divmod insn). 1935 We can't use IN unless it is dies in this insn, 1936 which means we must know accurately which hard regs are live. 1937 Also, the result can't go in IN if IN is used within OUT, 1938 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */ 1939 if (hard_regs_live_known 1940 && GET_CODE (in) == REG 1941 && REGNO (in) < FIRST_PSEUDO_REGISTER 1942 && (value == 0 1943 || find_reg_note (this_insn, REG_UNUSED, real_out)) 1944 && find_reg_note (this_insn, REG_DEAD, real_in) 1945 && !fixed_regs[REGNO (in)] 1946 && HARD_REGNO_MODE_OK (REGNO (in), 1947 /* The only case where out and real_out might 1948 have different modes is where real_out 1949 is a subreg, and in that case, out 1950 has a real mode. */ 1951 (GET_MODE (out) != VOIDmode 1952 ? GET_MODE (out) : outmode))) 1953 { 1954 register int regno = REGNO (in) + in_offset; 1955 int nwords = HARD_REGNO_NREGS (regno, inmode); 1956 1957 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR) 1958 && ! hard_reg_set_here_p (regno, regno + nwords, 1959 PATTERN (this_insn)) 1960 && (! earlyclobber 1961 || ! refers_to_regno_for_reload_p (regno, regno + nwords, 1962 PATTERN (this_insn), inloc))) 1963 { 1964 int i; 1965 for (i = 0; i < nwords; i++) 1966 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1967 regno + i)) 1968 break; 1969 1970 if (i == nwords) 1971 { 1972 /* If we were going to use OUT as the reload reg 1973 and changed our mind, it means OUT is a dummy that 1974 dies here. So don't bother copying value to it. */ 1975 if (for_real >= 0 && value == real_out) 1976 reload_out[for_real] = 0; 1977 if (GET_CODE (real_in) == REG) 1978 value = real_in; 1979 else 1980 value = gen_rtx_REG (inmode, regno); 1981 } 1982 } 1983 } 1984 1985 return value; 1986} 1987 1988/* This page contains subroutines used mainly for determining 1989 whether the IN or an OUT of a reload can serve as the 1990 reload register. */ 1991 1992/* Return 1 if X is an operand of an insn that is being earlyclobbered. */ 1993 1994static int 1995earlyclobber_operand_p (x) 1996 rtx x; 1997{ 1998 int i; 1999 2000 for (i = 0; i < n_earlyclobbers; i++) 2001 if (reload_earlyclobbers[i] == x) 2002 return 1; 2003 2004 return 0; 2005} 2006 2007/* Return 1 if expression X alters a hard reg in the range 2008 from BEG_REGNO (inclusive) to END_REGNO (exclusive), 2009 either explicitly or in the guise of a pseudo-reg allocated to REGNO. 2010 X should be the body of an instruction. */ 2011 2012static int 2013hard_reg_set_here_p (beg_regno, end_regno, x) 2014 register int beg_regno, end_regno; 2015 rtx x; 2016{ 2017 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER) 2018 { 2019 register rtx op0 = SET_DEST (x); 2020 while (GET_CODE (op0) == SUBREG) 2021 op0 = SUBREG_REG (op0); 2022 if (GET_CODE (op0) == REG) 2023 { 2024 register int r = REGNO (op0); 2025 /* See if this reg overlaps range under consideration. */ 2026 if (r < end_regno 2027 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno) 2028 return 1; 2029 } 2030 } 2031 else if (GET_CODE (x) == PARALLEL) 2032 { 2033 register int i = XVECLEN (x, 0) - 1; 2034 for (; i >= 0; i--) 2035 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i))) 2036 return 1; 2037 } 2038 2039 return 0; 2040} 2041 2042/* Return 1 if ADDR is a valid memory address for mode MODE, 2043 and check that each pseudo reg has the proper kind of 2044 hard reg. */ 2045 2046int 2047strict_memory_address_p (mode, addr) 2048 enum machine_mode mode; 2049 register rtx addr; 2050{ 2051 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win); 2052 return 0; 2053 2054 win: 2055 return 1; 2056} 2057 2058/* Like rtx_equal_p except that it allows a REG and a SUBREG to match 2059 if they are the same hard reg, and has special hacks for 2060 autoincrement and autodecrement. 2061 This is specifically intended for find_reloads to use 2062 in determining whether two operands match. 2063 X is the operand whose number is the lower of the two. 2064 2065 The value is 2 if Y contains a pre-increment that matches 2066 a non-incrementing address in X. */ 2067 2068/* ??? To be completely correct, we should arrange to pass 2069 for X the output operand and for Y the input operand. 2070 For now, we assume that the output operand has the lower number 2071 because that is natural in (SET output (... input ...)). */ 2072 2073int 2074operands_match_p (x, y) 2075 register rtx x, y; 2076{ 2077 register int i; 2078 register RTX_CODE code = GET_CODE (x); 2079 register char *fmt; 2080 int success_2; 2081 2082 if (x == y) 2083 return 1; 2084 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)) 2085 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG 2086 && GET_CODE (SUBREG_REG (y)) == REG))) 2087 { 2088 register int j; 2089 2090 if (code == SUBREG) 2091 { 2092 i = REGNO (SUBREG_REG (x)); 2093 if (i >= FIRST_PSEUDO_REGISTER) 2094 goto slow; 2095 i += SUBREG_WORD (x); 2096 } 2097 else 2098 i = REGNO (x); 2099 2100 if (GET_CODE (y) == SUBREG) 2101 { 2102 j = REGNO (SUBREG_REG (y)); 2103 if (j >= FIRST_PSEUDO_REGISTER) 2104 goto slow; 2105 j += SUBREG_WORD (y); 2106 } 2107 else 2108 j = REGNO (y); 2109 2110 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a 2111 multiple hard register group, so that for example (reg:DI 0) and 2112 (reg:SI 1) will be considered the same register. */ 2113 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD 2114 && i < FIRST_PSEUDO_REGISTER) 2115 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1; 2116 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD 2117 && j < FIRST_PSEUDO_REGISTER) 2118 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1; 2119 2120 return i == j; 2121 } 2122 /* If two operands must match, because they are really a single 2123 operand of an assembler insn, then two postincrements are invalid 2124 because the assembler insn would increment only once. 2125 On the other hand, an postincrement matches ordinary indexing 2126 if the postincrement is the output operand. */ 2127 if (code == POST_DEC || code == POST_INC) 2128 return operands_match_p (XEXP (x, 0), y); 2129 /* Two preincrements are invalid 2130 because the assembler insn would increment only once. 2131 On the other hand, an preincrement matches ordinary indexing 2132 if the preincrement is the input operand. 2133 In this case, return 2, since some callers need to do special 2134 things when this happens. */ 2135 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC) 2136 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0; 2137 2138 slow: 2139 2140 /* Now we have disposed of all the cases 2141 in which different rtx codes can match. */ 2142 if (code != GET_CODE (y)) 2143 return 0; 2144 if (code == LABEL_REF) 2145 return XEXP (x, 0) == XEXP (y, 0); 2146 if (code == SYMBOL_REF) 2147 return XSTR (x, 0) == XSTR (y, 0); 2148 2149 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ 2150 2151 if (GET_MODE (x) != GET_MODE (y)) 2152 return 0; 2153 2154 /* Compare the elements. If any pair of corresponding elements 2155 fail to match, return 0 for the whole things. */ 2156 2157 success_2 = 0; 2158 fmt = GET_RTX_FORMAT (code); 2159 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2160 { 2161 int val, j; 2162 switch (fmt[i]) 2163 { 2164 case 'w': 2165 if (XWINT (x, i) != XWINT (y, i)) 2166 return 0; 2167 break; 2168 2169 case 'i': 2170 if (XINT (x, i) != XINT (y, i)) 2171 return 0; 2172 break; 2173 2174 case 'e': 2175 val = operands_match_p (XEXP (x, i), XEXP (y, i)); 2176 if (val == 0) 2177 return 0; 2178 /* If any subexpression returns 2, 2179 we should return 2 if we are successful. */ 2180 if (val == 2) 2181 success_2 = 1; 2182 break; 2183 2184 case '0': 2185 break; 2186 2187 case 'E': 2188 if (XVECLEN (x, i) != XVECLEN (y, i)) 2189 return 0; 2190 for (j = XVECLEN (x, i) - 1; j >= 0; --j) 2191 { 2192 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j)); 2193 if (val == 0) 2194 return 0; 2195 if (val == 2) 2196 success_2 = 1; 2197 } 2198 break; 2199 2200 /* It is believed that rtx's at this level will never 2201 contain anything but integers and other rtx's, 2202 except for within LABEL_REFs and SYMBOL_REFs. */ 2203 default: 2204 abort (); 2205 } 2206 } 2207 return 1 + success_2; 2208} 2209 2210/* Describe the range of registers or memory referenced by X. 2211 If X is a register, set REG_FLAG and put the first register 2212 number into START and the last plus one into END. 2213 If X is a memory reference, put a base address into BASE 2214 and a range of integer offsets into START and END. 2215 If X is pushing on the stack, we can assume it causes no trouble, 2216 so we set the SAFE field. */ 2217 2218static struct decomposition 2219decompose (x) 2220 rtx x; 2221{ 2222 struct decomposition val; 2223 int all_const = 0; 2224 2225 val.reg_flag = 0; 2226 val.safe = 0; 2227 val.base = 0; 2228 if (GET_CODE (x) == MEM) 2229 { 2230 rtx base, offset = 0; 2231 rtx addr = XEXP (x, 0); 2232 2233 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC 2234 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) 2235 { 2236 val.base = XEXP (addr, 0); 2237 val.start = - GET_MODE_SIZE (GET_MODE (x)); 2238 val.end = GET_MODE_SIZE (GET_MODE (x)); 2239 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM; 2240 return val; 2241 } 2242 2243 if (GET_CODE (addr) == CONST) 2244 { 2245 addr = XEXP (addr, 0); 2246 all_const = 1; 2247 } 2248 if (GET_CODE (addr) == PLUS) 2249 { 2250 if (CONSTANT_P (XEXP (addr, 0))) 2251 { 2252 base = XEXP (addr, 1); 2253 offset = XEXP (addr, 0); 2254 } 2255 else if (CONSTANT_P (XEXP (addr, 1))) 2256 { 2257 base = XEXP (addr, 0); 2258 offset = XEXP (addr, 1); 2259 } 2260 } 2261 2262 if (offset == 0) 2263 { 2264 base = addr; 2265 offset = const0_rtx; 2266 } 2267 if (GET_CODE (offset) == CONST) 2268 offset = XEXP (offset, 0); 2269 if (GET_CODE (offset) == PLUS) 2270 { 2271 if (GET_CODE (XEXP (offset, 0)) == CONST_INT) 2272 { 2273 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1)); 2274 offset = XEXP (offset, 0); 2275 } 2276 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT) 2277 { 2278 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0)); 2279 offset = XEXP (offset, 1); 2280 } 2281 else 2282 { 2283 base = gen_rtx_PLUS (GET_MODE (base), base, offset); 2284 offset = const0_rtx; 2285 } 2286 } 2287 else if (GET_CODE (offset) != CONST_INT) 2288 { 2289 base = gen_rtx_PLUS (GET_MODE (base), base, offset); 2290 offset = const0_rtx; 2291 } 2292 2293 if (all_const && GET_CODE (base) == PLUS) 2294 base = gen_rtx_CONST (GET_MODE (base), base); 2295 2296 if (GET_CODE (offset) != CONST_INT) 2297 abort (); 2298 2299 val.start = INTVAL (offset); 2300 val.end = val.start + GET_MODE_SIZE (GET_MODE (x)); 2301 val.base = base; 2302 return val; 2303 } 2304 else if (GET_CODE (x) == REG) 2305 { 2306 val.reg_flag = 1; 2307 val.start = true_regnum (x); 2308 if (val.start < 0) 2309 { 2310 /* A pseudo with no hard reg. */ 2311 val.start = REGNO (x); 2312 val.end = val.start + 1; 2313 } 2314 else 2315 /* A hard reg. */ 2316 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); 2317 } 2318 else if (GET_CODE (x) == SUBREG) 2319 { 2320 if (GET_CODE (SUBREG_REG (x)) != REG) 2321 /* This could be more precise, but it's good enough. */ 2322 return decompose (SUBREG_REG (x)); 2323 val.reg_flag = 1; 2324 val.start = true_regnum (x); 2325 if (val.start < 0) 2326 return decompose (SUBREG_REG (x)); 2327 else 2328 /* A hard reg. */ 2329 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); 2330 } 2331 else if (CONSTANT_P (x) 2332 /* This hasn't been assigned yet, so it can't conflict yet. */ 2333 || GET_CODE (x) == SCRATCH) 2334 val.safe = 1; 2335 else 2336 abort (); 2337 return val; 2338} 2339 2340/* Return 1 if altering Y will not modify the value of X. 2341 Y is also described by YDATA, which should be decompose (Y). */ 2342 2343static int 2344immune_p (x, y, ydata) 2345 rtx x, y; 2346 struct decomposition ydata; 2347{ 2348 struct decomposition xdata; 2349 2350 if (ydata.reg_flag) 2351 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR); 2352 if (ydata.safe) 2353 return 1; 2354 2355 if (GET_CODE (y) != MEM) 2356 abort (); 2357 /* If Y is memory and X is not, Y can't affect X. */ 2358 if (GET_CODE (x) != MEM) 2359 return 1; 2360 2361 xdata = decompose (x); 2362 2363 if (! rtx_equal_p (xdata.base, ydata.base)) 2364 { 2365 /* If bases are distinct symbolic constants, there is no overlap. */ 2366 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base)) 2367 return 1; 2368 /* Constants and stack slots never overlap. */ 2369 if (CONSTANT_P (xdata.base) 2370 && (ydata.base == frame_pointer_rtx 2371 || ydata.base == hard_frame_pointer_rtx 2372 || ydata.base == stack_pointer_rtx)) 2373 return 1; 2374 if (CONSTANT_P (ydata.base) 2375 && (xdata.base == frame_pointer_rtx 2376 || xdata.base == hard_frame_pointer_rtx 2377 || xdata.base == stack_pointer_rtx)) 2378 return 1; 2379 /* If either base is variable, we don't know anything. */ 2380 return 0; 2381 } 2382 2383 2384 return (xdata.start >= ydata.end || ydata.start >= xdata.end); 2385} 2386 2387/* Similar, but calls decompose. */ 2388 2389int 2390safe_from_earlyclobber (op, clobber) 2391 rtx op, clobber; 2392{ 2393 struct decomposition early_data; 2394 2395 early_data = decompose (clobber); 2396 return immune_p (op, clobber, early_data); 2397} 2398 2399/* Main entry point of this file: search the body of INSN 2400 for values that need reloading and record them with push_reload. 2401 REPLACE nonzero means record also where the values occur 2402 so that subst_reloads can be used. 2403 2404 IND_LEVELS says how many levels of indirection are supported by this 2405 machine; a value of zero means that a memory reference is not a valid 2406 memory address. 2407 2408 LIVE_KNOWN says we have valid information about which hard 2409 regs are live at each point in the program; this is true when 2410 we are called from global_alloc but false when stupid register 2411 allocation has been done. 2412 2413 RELOAD_REG_P if nonzero is a vector indexed by hard reg number 2414 which is nonnegative if the reg has been commandeered for reloading into. 2415 It is copied into STATIC_RELOAD_REG_P and referenced from there 2416 by various subroutines. 2417 2418 Return TRUE if some operands need to be changed, because of swapping 2419 commutative operands, reg_equiv_address substitution, or whatever. */ 2420 2421int 2422find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) 2423 rtx insn; 2424 int replace, ind_levels; 2425 int live_known; 2426 short *reload_reg_p; 2427{ 2428#ifdef REGISTER_CONSTRAINTS 2429 2430 register int insn_code_number; 2431 register int i, j; 2432 int noperands; 2433 /* These start out as the constraints for the insn 2434 and they are chewed up as we consider alternatives. */ 2435 char *constraints[MAX_RECOG_OPERANDS]; 2436 /* These are the preferred classes for an operand, or NO_REGS if it isn't 2437 a register. */ 2438 enum reg_class preferred_class[MAX_RECOG_OPERANDS]; 2439 char pref_or_nothing[MAX_RECOG_OPERANDS]; 2440 /* Nonzero for a MEM operand whose entire address needs a reload. */ 2441 int address_reloaded[MAX_RECOG_OPERANDS]; 2442 /* Value of enum reload_type to use for operand. */ 2443 enum reload_type operand_type[MAX_RECOG_OPERANDS]; 2444 /* Value of enum reload_type to use within address of operand. */ 2445 enum reload_type address_type[MAX_RECOG_OPERANDS]; 2446 /* Save the usage of each operand. */ 2447 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS]; 2448 int no_input_reloads = 0, no_output_reloads = 0; 2449 int n_alternatives; 2450 int this_alternative[MAX_RECOG_OPERANDS]; 2451 char this_alternative_win[MAX_RECOG_OPERANDS]; 2452 char this_alternative_offmemok[MAX_RECOG_OPERANDS]; 2453 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS]; 2454 int this_alternative_matches[MAX_RECOG_OPERANDS]; 2455 int swapped; 2456 int goal_alternative[MAX_RECOG_OPERANDS]; 2457 int this_alternative_number; 2458 int goal_alternative_number; 2459 int operand_reloadnum[MAX_RECOG_OPERANDS]; 2460 int goal_alternative_matches[MAX_RECOG_OPERANDS]; 2461 int goal_alternative_matched[MAX_RECOG_OPERANDS]; 2462 char goal_alternative_win[MAX_RECOG_OPERANDS]; 2463 char goal_alternative_offmemok[MAX_RECOG_OPERANDS]; 2464 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS]; 2465 int goal_alternative_swapped; 2466 int best; 2467 int commutative; 2468 int changed; 2469 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS]; 2470 rtx substed_operand[MAX_RECOG_OPERANDS]; 2471 rtx body = PATTERN (insn); 2472 rtx set = single_set (insn); 2473 int goal_earlyclobber, this_earlyclobber; 2474 enum machine_mode operand_mode[MAX_RECOG_OPERANDS]; 2475 int retval = 0; 2476 /* Cache the last regno for the last pseudo we did an output reload 2477 for in case the next insn uses it. */ 2478 static int last_output_reload_regno = -1; 2479 2480 this_insn = insn; 2481 n_reloads = 0; 2482 n_replacements = 0; 2483 n_earlyclobbers = 0; 2484 replace_reloads = replace; 2485 hard_regs_live_known = live_known; 2486 static_reload_reg_p = reload_reg_p; 2487 2488 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads; 2489 neither are insns that SET cc0. Insns that use CC0 are not allowed 2490 to have any input reloads. */ 2491 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN) 2492 no_output_reloads = 1; 2493 2494#ifdef HAVE_cc0 2495 if (reg_referenced_p (cc0_rtx, PATTERN (insn))) 2496 no_input_reloads = 1; 2497 if (reg_set_p (cc0_rtx, PATTERN (insn))) 2498 no_output_reloads = 1; 2499#endif 2500 2501#ifdef SECONDARY_MEMORY_NEEDED 2502 /* The eliminated forms of any secondary memory locations are per-insn, so 2503 clear them out here. */ 2504 2505 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim); 2506#endif 2507 2508 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it 2509 is cheap to move between them. If it is not, there may not be an insn 2510 to do the copy, so we may need a reload. */ 2511 if (GET_CODE (body) == SET 2512 && GET_CODE (SET_DEST (body)) == REG 2513 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER 2514 && GET_CODE (SET_SRC (body)) == REG 2515 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER 2516 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))), 2517 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2) 2518 return 0; 2519 2520 extract_insn (insn); 2521 2522 noperands = reload_n_operands = recog_n_operands; 2523 n_alternatives = recog_n_alternatives; 2524 2525 /* Just return "no reloads" if insn has no operands with constraints. */ 2526 if (noperands == 0 || n_alternatives == 0) 2527 return 0; 2528 2529 insn_code_number = INSN_CODE (insn); 2530 this_insn_is_asm = insn_code_number < 0; 2531 2532 bcopy ((char *) recog_operand_mode, (char *) operand_mode, 2533 noperands * sizeof (enum machine_mode)); 2534 bcopy ((char *) recog_constraints, (char *) constraints, 2535 noperands * sizeof (char *)); 2536 2537 commutative = -1; 2538 2539 /* If we will need to know, later, whether some pair of operands 2540 are the same, we must compare them now and save the result. 2541 Reloading the base and index registers will clobber them 2542 and afterward they will fail to match. */ 2543 2544 for (i = 0; i < noperands; i++) 2545 { 2546 register char *p; 2547 register int c; 2548 2549 substed_operand[i] = recog_operand[i]; 2550 p = constraints[i]; 2551 2552 modified[i] = RELOAD_READ; 2553 2554 /* Scan this operand's constraint to see if it is an output operand, 2555 an in-out operand, is commutative, or should match another. */ 2556 2557 while ((c = *p++)) 2558 { 2559 if (c == '=') 2560 modified[i] = RELOAD_WRITE; 2561 else if (c == '+') 2562 modified[i] = RELOAD_READ_WRITE; 2563 else if (c == '%') 2564 { 2565 /* The last operand should not be marked commutative. */ 2566 if (i == noperands - 1) 2567 abort (); 2568 2569 commutative = i; 2570 } 2571 else if (c >= '0' && c <= '9') 2572 { 2573 c -= '0'; 2574 operands_match[c][i] 2575 = operands_match_p (recog_operand[c], recog_operand[i]); 2576 2577 /* An operand may not match itself. */ 2578 if (c == i) 2579 abort (); 2580 2581 /* If C can be commuted with C+1, and C might need to match I, 2582 then C+1 might also need to match I. */ 2583 if (commutative >= 0) 2584 { 2585 if (c == commutative || c == commutative + 1) 2586 { 2587 int other = c + (c == commutative ? 1 : -1); 2588 operands_match[other][i] 2589 = operands_match_p (recog_operand[other], recog_operand[i]); 2590 } 2591 if (i == commutative || i == commutative + 1) 2592 { 2593 int other = i + (i == commutative ? 1 : -1); 2594 operands_match[c][other] 2595 = operands_match_p (recog_operand[c], recog_operand[other]); 2596 } 2597 /* Note that C is supposed to be less than I. 2598 No need to consider altering both C and I because in 2599 that case we would alter one into the other. */ 2600 } 2601 } 2602 } 2603 } 2604 2605 /* Examine each operand that is a memory reference or memory address 2606 and reload parts of the addresses into index registers. 2607 Also here any references to pseudo regs that didn't get hard regs 2608 but are equivalent to constants get replaced in the insn itself 2609 with those constants. Nobody will ever see them again. 2610 2611 Finally, set up the preferred classes of each operand. */ 2612 2613 for (i = 0; i < noperands; i++) 2614 { 2615 register RTX_CODE code = GET_CODE (recog_operand[i]); 2616 2617 address_reloaded[i] = 0; 2618 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT 2619 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT 2620 : RELOAD_OTHER); 2621 address_type[i] 2622 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS 2623 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS 2624 : RELOAD_OTHER); 2625 2626 if (*constraints[i] == 0) 2627 /* Ignore things like match_operator operands. */ 2628 ; 2629 else if (constraints[i][0] == 'p') 2630 { 2631 find_reloads_address (VOIDmode, NULL_PTR, 2632 recog_operand[i], recog_operand_loc[i], 2633 i, operand_type[i], ind_levels, insn); 2634 2635 /* If we now have a simple operand where we used to have a 2636 PLUS or MULT, re-recognize and try again. */ 2637 if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc[i])) == 'o' 2638 || GET_CODE (*recog_operand_loc[i]) == SUBREG) 2639 && (GET_CODE (recog_operand[i]) == MULT 2640 || GET_CODE (recog_operand[i]) == PLUS)) 2641 { 2642 INSN_CODE (insn) = -1; 2643 retval = find_reloads (insn, replace, ind_levels, live_known, 2644 reload_reg_p); 2645 return retval; 2646 } 2647 2648 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]; 2649 } 2650 else if (code == MEM) 2651 { 2652 address_reloaded[i] 2653 = find_reloads_address (GET_MODE (recog_operand[i]), 2654 recog_operand_loc[i], 2655 XEXP (recog_operand[i], 0), 2656 &XEXP (recog_operand[i], 0), 2657 i, address_type[i], ind_levels, insn); 2658 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]; 2659 } 2660 else if (code == SUBREG) 2661 { 2662 rtx reg = SUBREG_REG (recog_operand[i]); 2663 rtx op 2664 = find_reloads_toplev (recog_operand[i], i, address_type[i], 2665 ind_levels, 2666 set != 0 2667 && &SET_DEST (set) == recog_operand_loc[i], 2668 insn); 2669 2670 /* If we made a MEM to load (a part of) the stackslot of a pseudo 2671 that didn't get a hard register, emit a USE with a REG_EQUAL 2672 note in front so that we might inherit a previous, possibly 2673 wider reload. */ 2674 2675 if (replace 2676 && GET_CODE (op) == MEM 2677 && GET_CODE (reg) == REG 2678 && (GET_MODE_SIZE (GET_MODE (reg)) 2679 >= GET_MODE_SIZE (GET_MODE (op)))) 2680 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn)) 2681 = gen_rtx_EXPR_LIST (REG_EQUAL, 2682 reg_equiv_memory_loc[REGNO (reg)], NULL_RTX); 2683 2684 substed_operand[i] = recog_operand[i] = op; 2685 } 2686 else if (code == PLUS || GET_RTX_CLASS (code) == '1') 2687 /* We can get a PLUS as an "operand" as a result of register 2688 elimination. See eliminate_regs and gen_reload. We handle 2689 a unary operator by reloading the operand. */ 2690 substed_operand[i] = recog_operand[i] 2691 = find_reloads_toplev (recog_operand[i], i, address_type[i], 2692 ind_levels, 0, insn); 2693 else if (code == REG) 2694 { 2695 /* This is equivalent to calling find_reloads_toplev. 2696 The code is duplicated for speed. 2697 When we find a pseudo always equivalent to a constant, 2698 we replace it by the constant. We must be sure, however, 2699 that we don't try to replace it in the insn in which it 2700 is being set. */ 2701 register int regno = REGNO (recog_operand[i]); 2702 if (reg_equiv_constant[regno] != 0 2703 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i])) 2704 { 2705 /* Record the existing mode so that the check if constants are 2706 allowed will work when operand_mode isn't specified. */ 2707 2708 if (operand_mode[i] == VOIDmode) 2709 operand_mode[i] = GET_MODE (recog_operand[i]); 2710 2711 substed_operand[i] = recog_operand[i] 2712 = reg_equiv_constant[regno]; 2713 } 2714 if (reg_equiv_memory_loc[regno] != 0 2715 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 2716 /* We need not give a valid is_set_dest argument since the case 2717 of a constant equivalence was checked above. */ 2718 substed_operand[i] = recog_operand[i] 2719 = find_reloads_toplev (recog_operand[i], i, address_type[i], 2720 ind_levels, 0, insn); 2721 } 2722 /* If the operand is still a register (we didn't replace it with an 2723 equivalent), get the preferred class to reload it into. */ 2724 code = GET_CODE (recog_operand[i]); 2725 preferred_class[i] 2726 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER) 2727 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS); 2728 pref_or_nothing[i] 2729 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER 2730 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS); 2731 } 2732 2733#ifdef HAVE_cc0 2734 /* If we made any reloads for addresses, see if they violate a 2735 "no input reloads" requirement for this insn. */ 2736 if (no_input_reloads) 2737 for (i = 0; i < n_reloads; i++) 2738 if (reload_in[i] != 0) 2739 abort (); 2740#endif 2741 2742 /* If this is simply a copy from operand 1 to operand 0, merge the 2743 preferred classes for the operands. */ 2744 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set) 2745 && recog_operand[1] == SET_SRC (set)) 2746 { 2747 preferred_class[0] = preferred_class[1] 2748 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]]; 2749 pref_or_nothing[0] |= pref_or_nothing[1]; 2750 pref_or_nothing[1] |= pref_or_nothing[0]; 2751 } 2752 2753 /* Now see what we need for pseudo-regs that didn't get hard regs 2754 or got the wrong kind of hard reg. For this, we must consider 2755 all the operands together against the register constraints. */ 2756 2757 best = MAX_RECOG_OPERANDS * 2 + 600; 2758 2759 swapped = 0; 2760 goal_alternative_swapped = 0; 2761 try_swapped: 2762 2763 /* The constraints are made of several alternatives. 2764 Each operand's constraint looks like foo,bar,... with commas 2765 separating the alternatives. The first alternatives for all 2766 operands go together, the second alternatives go together, etc. 2767 2768 First loop over alternatives. */ 2769 2770 for (this_alternative_number = 0; 2771 this_alternative_number < n_alternatives; 2772 this_alternative_number++) 2773 { 2774 /* Loop over operands for one constraint alternative. */ 2775 /* LOSERS counts those that don't fit this alternative 2776 and would require loading. */ 2777 int losers = 0; 2778 /* BAD is set to 1 if it some operand can't fit this alternative 2779 even after reloading. */ 2780 int bad = 0; 2781 /* REJECT is a count of how undesirable this alternative says it is 2782 if any reloading is required. If the alternative matches exactly 2783 then REJECT is ignored, but otherwise it gets this much 2784 counted against it in addition to the reloading needed. Each 2785 ? counts three times here since we want the disparaging caused by 2786 a bad register class to only count 1/3 as much. */ 2787 int reject = 0; 2788 2789 this_earlyclobber = 0; 2790 2791 for (i = 0; i < noperands; i++) 2792 { 2793 register char *p = constraints[i]; 2794 register int win = 0; 2795 /* 0 => this operand can be reloaded somehow for this alternative */ 2796 int badop = 1; 2797 /* 0 => this operand can be reloaded if the alternative allows regs. */ 2798 int winreg = 0; 2799 int c; 2800 register rtx operand = recog_operand[i]; 2801 int offset = 0; 2802 /* Nonzero means this is a MEM that must be reloaded into a reg 2803 regardless of what the constraint says. */ 2804 int force_reload = 0; 2805 int offmemok = 0; 2806 /* Nonzero if a constant forced into memory would be OK for this 2807 operand. */ 2808 int constmemok = 0; 2809 int earlyclobber = 0; 2810 2811 /* If the predicate accepts a unary operator, it means that 2812 we need to reload the operand, but do not do this for 2813 match_operator and friends. */ 2814 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0) 2815 operand = XEXP (operand, 0); 2816 2817 /* If the operand is a SUBREG, extract 2818 the REG or MEM (or maybe even a constant) within. 2819 (Constants can occur as a result of reg_equiv_constant.) */ 2820 2821 while (GET_CODE (operand) == SUBREG) 2822 { 2823 offset += SUBREG_WORD (operand); 2824 operand = SUBREG_REG (operand); 2825 /* Force reload if this is a constant or PLUS or if there may 2826 be a problem accessing OPERAND in the outer mode. */ 2827 if (CONSTANT_P (operand) 2828 || GET_CODE (operand) == PLUS 2829 /* We must force a reload of paradoxical SUBREGs 2830 of a MEM because the alignment of the inner value 2831 may not be enough to do the outer reference. On 2832 big-endian machines, it may also reference outside 2833 the object. 2834 2835 On machines that extend byte operations and we have a 2836 SUBREG where both the inner and outer modes are no wider 2837 than a word and the inner mode is narrower, is integral, 2838 and gets extended when loaded from memory, combine.c has 2839 made assumptions about the behavior of the machine in such 2840 register access. If the data is, in fact, in memory we 2841 must always load using the size assumed to be in the 2842 register and let the insn do the different-sized 2843 accesses. 2844 2845 This is doubly true if WORD_REGISTER_OPERATIONS. In 2846 this case eliminate_regs has left non-paradoxical 2847 subregs for push_reloads to see. Make sure it does 2848 by forcing the reload. 2849 2850 ??? When is it right at this stage to have a subreg 2851 of a mem that is _not_ to be handled specialy? IMO 2852 those should have been reduced to just a mem. */ 2853 || ((GET_CODE (operand) == MEM 2854 || (GET_CODE (operand)== REG 2855 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 2856#ifndef WORD_REGISTER_OPERATIONS 2857 && (((GET_MODE_BITSIZE (GET_MODE (operand)) 2858 < BIGGEST_ALIGNMENT) 2859 && (GET_MODE_SIZE (operand_mode[i]) 2860 > GET_MODE_SIZE (GET_MODE (operand)))) 2861 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN) 2862#ifdef LOAD_EXTEND_OP 2863 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 2864 && (GET_MODE_SIZE (GET_MODE (operand)) 2865 <= UNITS_PER_WORD) 2866 && (GET_MODE_SIZE (operand_mode[i]) 2867 > GET_MODE_SIZE (GET_MODE (operand))) 2868 && INTEGRAL_MODE_P (GET_MODE (operand)) 2869 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL) 2870#endif 2871 ) 2872#endif 2873 ) 2874 /* Subreg of a hard reg which can't handle the subreg's mode 2875 or which would handle that mode in the wrong number of 2876 registers for subregging to work. */ 2877 || (GET_CODE (operand) == REG 2878 && REGNO (operand) < FIRST_PSEUDO_REGISTER 2879 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 2880 && (GET_MODE_SIZE (GET_MODE (operand)) 2881 > UNITS_PER_WORD) 2882 && ((GET_MODE_SIZE (GET_MODE (operand)) 2883 / UNITS_PER_WORD) 2884 != HARD_REGNO_NREGS (REGNO (operand), 2885 GET_MODE (operand)))) 2886 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset, 2887 operand_mode[i])))) 2888 force_reload = 1; 2889 } 2890 2891 this_alternative[i] = (int) NO_REGS; 2892 this_alternative_win[i] = 0; 2893 this_alternative_offmemok[i] = 0; 2894 this_alternative_earlyclobber[i] = 0; 2895 this_alternative_matches[i] = -1; 2896 2897 /* An empty constraint or empty alternative 2898 allows anything which matched the pattern. */ 2899 if (*p == 0 || *p == ',') 2900 win = 1, badop = 0; 2901 2902 /* Scan this alternative's specs for this operand; 2903 set WIN if the operand fits any letter in this alternative. 2904 Otherwise, clear BADOP if this operand could 2905 fit some letter after reloads, 2906 or set WINREG if this operand could fit after reloads 2907 provided the constraint allows some registers. */ 2908 2909 while (*p && (c = *p++) != ',') 2910 switch (c) 2911 { 2912 case '=': 2913 case '+': 2914 case '*': 2915 break; 2916 2917 case '%': 2918 /* The last operand should not be marked commutative. */ 2919 if (i != noperands - 1) 2920 commutative = i; 2921 break; 2922 2923 case '?': 2924 reject += 6; 2925 break; 2926 2927 case '!': 2928 reject = 600; 2929 break; 2930 2931 case '#': 2932 /* Ignore rest of this alternative as far as 2933 reloading is concerned. */ 2934 while (*p && *p != ',') p++; 2935 break; 2936 2937 case '0': 2938 case '1': 2939 case '2': 2940 case '3': 2941 case '4': 2942 c -= '0'; 2943 this_alternative_matches[i] = c; 2944 /* We are supposed to match a previous operand. 2945 If we do, we win if that one did. 2946 If we do not, count both of the operands as losers. 2947 (This is too conservative, since most of the time 2948 only a single reload insn will be needed to make 2949 the two operands win. As a result, this alternative 2950 may be rejected when it is actually desirable.) */ 2951 if ((swapped && (c != commutative || i != commutative + 1)) 2952 /* If we are matching as if two operands were swapped, 2953 also pretend that operands_match had been computed 2954 with swapped. 2955 But if I is the second of those and C is the first, 2956 don't exchange them, because operands_match is valid 2957 only on one side of its diagonal. */ 2958 ? (operands_match 2959 [(c == commutative || c == commutative + 1) 2960 ? 2*commutative + 1 - c : c] 2961 [(i == commutative || i == commutative + 1) 2962 ? 2*commutative + 1 - i : i]) 2963 : operands_match[c][i]) 2964 { 2965 /* If we are matching a non-offsettable address where an 2966 offsettable address was expected, then we must reject 2967 this combination, because we can't reload it. */ 2968 if (this_alternative_offmemok[c] 2969 && GET_CODE (recog_operand[c]) == MEM 2970 && this_alternative[c] == (int) NO_REGS 2971 && ! this_alternative_win[c]) 2972 bad = 1; 2973 2974 win = this_alternative_win[c]; 2975 } 2976 else 2977 { 2978 /* Operands don't match. */ 2979 rtx value; 2980 /* Retroactively mark the operand we had to match 2981 as a loser, if it wasn't already. */ 2982 if (this_alternative_win[c]) 2983 losers++; 2984 this_alternative_win[c] = 0; 2985 if (this_alternative[c] == (int) NO_REGS) 2986 bad = 1; 2987 /* But count the pair only once in the total badness of 2988 this alternative, if the pair can be a dummy reload. */ 2989 value 2990 = find_dummy_reload (recog_operand[i], recog_operand[c], 2991 recog_operand_loc[i], recog_operand_loc[c], 2992 operand_mode[i], operand_mode[c], 2993 this_alternative[c], -1, 2994 this_alternative_earlyclobber[c]); 2995 2996 if (value != 0) 2997 losers--; 2998 } 2999 /* This can be fixed with reloads if the operand 3000 we are supposed to match can be fixed with reloads. */ 3001 badop = 0; 3002 this_alternative[i] = this_alternative[c]; 3003 3004 /* If we have to reload this operand and some previous 3005 operand also had to match the same thing as this 3006 operand, we don't know how to do that. So reject this 3007 alternative. */ 3008 if (! win || force_reload) 3009 for (j = 0; j < i; j++) 3010 if (this_alternative_matches[j] 3011 == this_alternative_matches[i]) 3012 badop = 1; 3013 3014 break; 3015 3016 case 'p': 3017 /* All necessary reloads for an address_operand 3018 were handled in find_reloads_address. */ 3019 this_alternative[i] = (int) BASE_REG_CLASS; 3020 win = 1; 3021 break; 3022 3023 case 'm': 3024 if (force_reload) 3025 break; 3026 if (GET_CODE (operand) == MEM 3027 || (GET_CODE (operand) == REG 3028 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3029 && reg_renumber[REGNO (operand)] < 0)) 3030 win = 1; 3031 if (CONSTANT_P (operand) 3032 /* force_const_mem does not accept HIGH. */ 3033 && GET_CODE (operand) != HIGH) 3034 badop = 0; 3035 constmemok = 1; 3036 break; 3037 3038 case '<': 3039 if (GET_CODE (operand) == MEM 3040 && ! address_reloaded[i] 3041 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC 3042 || GET_CODE (XEXP (operand, 0)) == POST_DEC)) 3043 win = 1; 3044 break; 3045 3046 case '>': 3047 if (GET_CODE (operand) == MEM 3048 && ! address_reloaded[i] 3049 && (GET_CODE (XEXP (operand, 0)) == PRE_INC 3050 || GET_CODE (XEXP (operand, 0)) == POST_INC)) 3051 win = 1; 3052 break; 3053 3054 /* Memory operand whose address is not offsettable. */ 3055 case 'V': 3056 if (force_reload) 3057 break; 3058 if (GET_CODE (operand) == MEM 3059 && ! (ind_levels ? offsettable_memref_p (operand) 3060 : offsettable_nonstrict_memref_p (operand)) 3061 /* Certain mem addresses will become offsettable 3062 after they themselves are reloaded. This is important; 3063 we don't want our own handling of unoffsettables 3064 to override the handling of reg_equiv_address. */ 3065 && !(GET_CODE (XEXP (operand, 0)) == REG 3066 && (ind_levels == 0 3067 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))) 3068 win = 1; 3069 break; 3070 3071 /* Memory operand whose address is offsettable. */ 3072 case 'o': 3073 if (force_reload) 3074 break; 3075 if ((GET_CODE (operand) == MEM 3076 /* If IND_LEVELS, find_reloads_address won't reload a 3077 pseudo that didn't get a hard reg, so we have to 3078 reject that case. */ 3079 && ((ind_levels ? offsettable_memref_p (operand) 3080 : offsettable_nonstrict_memref_p (operand)) 3081 /* A reloaded address is offsettable because it is now 3082 just a simple register indirect. */ 3083 || address_reloaded[i])) 3084 || (GET_CODE (operand) == REG 3085 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3086 && reg_renumber[REGNO (operand)] < 0 3087 /* If reg_equiv_address is nonzero, we will be 3088 loading it into a register; hence it will be 3089 offsettable, but we cannot say that reg_equiv_mem 3090 is offsettable without checking. */ 3091 && ((reg_equiv_mem[REGNO (operand)] != 0 3092 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)])) 3093 || (reg_equiv_address[REGNO (operand)] != 0)))) 3094 win = 1; 3095 /* force_const_mem does not accept HIGH. */ 3096 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH) 3097 || GET_CODE (operand) == MEM) 3098 badop = 0; 3099 constmemok = 1; 3100 offmemok = 1; 3101 break; 3102 3103 case '&': 3104 /* Output operand that is stored before the need for the 3105 input operands (and their index registers) is over. */ 3106 earlyclobber = 1, this_earlyclobber = 1; 3107 break; 3108 3109 case 'E': 3110#ifndef REAL_ARITHMETIC 3111 /* Match any floating double constant, but only if 3112 we can examine the bits of it reliably. */ 3113 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT 3114 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD) 3115 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float) 3116 break; 3117#endif 3118 if (GET_CODE (operand) == CONST_DOUBLE) 3119 win = 1; 3120 break; 3121 3122 case 'F': 3123 if (GET_CODE (operand) == CONST_DOUBLE) 3124 win = 1; 3125 break; 3126 3127 case 'G': 3128 case 'H': 3129 if (GET_CODE (operand) == CONST_DOUBLE 3130 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c)) 3131 win = 1; 3132 break; 3133 3134 case 's': 3135 if (GET_CODE (operand) == CONST_INT 3136 || (GET_CODE (operand) == CONST_DOUBLE 3137 && GET_MODE (operand) == VOIDmode)) 3138 break; 3139 case 'i': 3140 if (CONSTANT_P (operand) 3141#ifdef LEGITIMATE_PIC_OPERAND_P 3142 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)) 3143#endif 3144 ) 3145 win = 1; 3146 break; 3147 3148 case 'n': 3149 if (GET_CODE (operand) == CONST_INT 3150 || (GET_CODE (operand) == CONST_DOUBLE 3151 && GET_MODE (operand) == VOIDmode)) 3152 win = 1; 3153 break; 3154 3155 case 'I': 3156 case 'J': 3157 case 'K': 3158 case 'L': 3159 case 'M': 3160 case 'N': 3161 case 'O': 3162 case 'P': 3163 if (GET_CODE (operand) == CONST_INT 3164 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c)) 3165 win = 1; 3166 break; 3167 3168 case 'X': 3169 win = 1; 3170 break; 3171 3172 case 'g': 3173 if (! force_reload 3174 /* A PLUS is never a valid operand, but reload can make 3175 it from a register when eliminating registers. */ 3176 && GET_CODE (operand) != PLUS 3177 /* A SCRATCH is not a valid operand. */ 3178 && GET_CODE (operand) != SCRATCH 3179#ifdef LEGITIMATE_PIC_OPERAND_P 3180 && (! CONSTANT_P (operand) 3181 || ! flag_pic 3182 || LEGITIMATE_PIC_OPERAND_P (operand)) 3183#endif 3184 && (GENERAL_REGS == ALL_REGS 3185 || GET_CODE (operand) != REG 3186 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER 3187 && reg_renumber[REGNO (operand)] < 0))) 3188 win = 1; 3189 /* Drop through into 'r' case */ 3190 3191 case 'r': 3192 this_alternative[i] 3193 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS]; 3194 goto reg; 3195 3196#ifdef EXTRA_CONSTRAINT 3197 case 'Q': 3198 case 'R': 3199 case 'S': 3200 case 'T': 3201 case 'U': 3202 if (EXTRA_CONSTRAINT (operand, c)) 3203 win = 1; 3204 break; 3205#endif 3206 3207 default: 3208 this_alternative[i] 3209 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)]; 3210 3211 reg: 3212 if (GET_MODE (operand) == BLKmode) 3213 break; 3214 winreg = 1; 3215 if (GET_CODE (operand) == REG 3216 && reg_fits_class_p (operand, this_alternative[i], 3217 offset, GET_MODE (recog_operand[i]))) 3218 win = 1; 3219 break; 3220 } 3221 3222 constraints[i] = p; 3223 3224 /* If this operand could be handled with a reg, 3225 and some reg is allowed, then this operand can be handled. */ 3226 if (winreg && this_alternative[i] != (int) NO_REGS) 3227 badop = 0; 3228 3229 /* Record which operands fit this alternative. */ 3230 this_alternative_earlyclobber[i] = earlyclobber; 3231 if (win && ! force_reload) 3232 this_alternative_win[i] = 1; 3233 else 3234 { 3235 int const_to_mem = 0; 3236 3237 this_alternative_offmemok[i] = offmemok; 3238 losers++; 3239 if (badop) 3240 bad = 1; 3241 /* Alternative loses if it has no regs for a reg operand. */ 3242 if (GET_CODE (operand) == REG 3243 && this_alternative[i] == (int) NO_REGS 3244 && this_alternative_matches[i] < 0) 3245 bad = 1; 3246 3247#if 0 3248 /* If this is a pseudo-register that is set in the previous 3249 insns, there's a good chance that it will already be in a 3250 spill register and we can use that spill register. So 3251 make this case cheaper. 3252 3253 Disabled for egcs. egcs has better inheritance code and 3254 this change causes problems with the improved reload 3255 inheritance code. */ 3256 if (GET_CODE (operand) == REG 3257 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3258 && REGNO (operand) == last_output_reload_regno) 3259 reject--; 3260#endif 3261 3262 /* If this is a constant that is reloaded into the desired 3263 class by copying it to memory first, count that as another 3264 reload. This is consistent with other code and is 3265 required to avoid choosing another alternative when 3266 the constant is moved into memory by this function on 3267 an early reload pass. Note that the test here is 3268 precisely the same as in the code below that calls 3269 force_const_mem. */ 3270 if (CONSTANT_P (operand) 3271 /* force_const_mem does not accept HIGH. */ 3272 && GET_CODE (operand) != HIGH 3273 && ((PREFERRED_RELOAD_CLASS (operand, 3274 (enum reg_class) this_alternative[i]) 3275 == NO_REGS) 3276 || no_input_reloads) 3277 && operand_mode[i] != VOIDmode) 3278 { 3279 const_to_mem = 1; 3280 if (this_alternative[i] != (int) NO_REGS) 3281 losers++; 3282 } 3283 3284 /* If we can't reload this value at all, reject this 3285 alternative. Note that we could also lose due to 3286 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that 3287 here. */ 3288 3289 if (! CONSTANT_P (operand) 3290 && (enum reg_class) this_alternative[i] != NO_REGS 3291 && (PREFERRED_RELOAD_CLASS (operand, 3292 (enum reg_class) this_alternative[i]) 3293 == NO_REGS)) 3294 bad = 1; 3295 3296 /* Alternative loses if it requires a type of reload not 3297 permitted for this insn. We can always reload SCRATCH 3298 and objects with a REG_UNUSED note. */ 3299 else if (GET_CODE (operand) != SCRATCH 3300 && modified[i] != RELOAD_READ && no_output_reloads 3301 && ! find_reg_note (insn, REG_UNUSED, operand)) 3302 bad = 1; 3303 else if (modified[i] != RELOAD_WRITE && no_input_reloads 3304 && ! const_to_mem) 3305 bad = 1; 3306 3307 3308 /* We prefer to reload pseudos over reloading other things, 3309 since such reloads may be able to be eliminated later. 3310 If we are reloading a SCRATCH, we won't be generating any 3311 insns, just using a register, so it is also preferred. 3312 So bump REJECT in other cases. Don't do this in the 3313 case where we are forcing a constant into memory and 3314 it will then win since we don't want to have a different 3315 alternative match then. */ 3316 if (! (GET_CODE (operand) == REG 3317 && REGNO (operand) >= FIRST_PSEUDO_REGISTER) 3318 && GET_CODE (operand) != SCRATCH 3319 && ! (const_to_mem && constmemok)) 3320 reject += 2; 3321 3322 /* Input reloads can be inherited more often than output 3323 reloads can be removed, so penalize output reloads. */ 3324 if (operand_type[i] != RELOAD_FOR_INPUT 3325 && GET_CODE (operand) != SCRATCH) 3326 reject++; 3327 } 3328 3329 /* If this operand is a pseudo register that didn't get a hard 3330 reg and this alternative accepts some register, see if the 3331 class that we want is a subset of the preferred class for this 3332 register. If not, but it intersects that class, use the 3333 preferred class instead. If it does not intersect the preferred 3334 class, show that usage of this alternative should be discouraged; 3335 it will be discouraged more still if the register is `preferred 3336 or nothing'. We do this because it increases the chance of 3337 reusing our spill register in a later insn and avoiding a pair 3338 of memory stores and loads. 3339 3340 Don't bother with this if this alternative will accept this 3341 operand. 3342 3343 Don't do this for a multiword operand, since it is only a 3344 small win and has the risk of requiring more spill registers, 3345 which could cause a large loss. 3346 3347 Don't do this if the preferred class has only one register 3348 because we might otherwise exhaust the class. */ 3349 3350 3351 if (! win && this_alternative[i] != (int) NO_REGS 3352 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 3353 && reg_class_size[(int) preferred_class[i]] > 1) 3354 { 3355 if (! reg_class_subset_p (this_alternative[i], 3356 preferred_class[i])) 3357 { 3358 /* Since we don't have a way of forming the intersection, 3359 we just do something special if the preferred class 3360 is a subset of the class we have; that's the most 3361 common case anyway. */ 3362 if (reg_class_subset_p (preferred_class[i], 3363 this_alternative[i])) 3364 this_alternative[i] = (int) preferred_class[i]; 3365 else 3366 reject += (2 + 2 * pref_or_nothing[i]); 3367 } 3368 } 3369 } 3370 3371 /* Now see if any output operands that are marked "earlyclobber" 3372 in this alternative conflict with any input operands 3373 or any memory addresses. */ 3374 3375 for (i = 0; i < noperands; i++) 3376 if (this_alternative_earlyclobber[i] 3377 && this_alternative_win[i]) 3378 { 3379 struct decomposition early_data; 3380 3381 early_data = decompose (recog_operand[i]); 3382 3383 if (modified[i] == RELOAD_READ) 3384 abort (); 3385 3386 if (this_alternative[i] == NO_REGS) 3387 { 3388 this_alternative_earlyclobber[i] = 0; 3389 if (this_insn_is_asm) 3390 error_for_asm (this_insn, 3391 "`&' constraint used with no register class"); 3392 else 3393 abort (); 3394 } 3395 3396 for (j = 0; j < noperands; j++) 3397 /* Is this an input operand or a memory ref? */ 3398 if ((GET_CODE (recog_operand[j]) == MEM 3399 || modified[j] != RELOAD_WRITE) 3400 && j != i 3401 /* Ignore things like match_operator operands. */ 3402 && *recog_constraints[j] != 0 3403 /* Don't count an input operand that is constrained to match 3404 the early clobber operand. */ 3405 && ! (this_alternative_matches[j] == i 3406 && rtx_equal_p (recog_operand[i], recog_operand[j])) 3407 /* Is it altered by storing the earlyclobber operand? */ 3408 && !immune_p (recog_operand[j], recog_operand[i], early_data)) 3409 { 3410 /* If the output is in a single-reg class, 3411 it's costly to reload it, so reload the input instead. */ 3412 if (reg_class_size[this_alternative[i]] == 1 3413 && (GET_CODE (recog_operand[j]) == REG 3414 || GET_CODE (recog_operand[j]) == SUBREG)) 3415 { 3416 losers++; 3417 this_alternative_win[j] = 0; 3418 } 3419 else 3420 break; 3421 } 3422 /* If an earlyclobber operand conflicts with something, 3423 it must be reloaded, so request this and count the cost. */ 3424 if (j != noperands) 3425 { 3426 losers++; 3427 this_alternative_win[i] = 0; 3428 for (j = 0; j < noperands; j++) 3429 if (this_alternative_matches[j] == i 3430 && this_alternative_win[j]) 3431 { 3432 this_alternative_win[j] = 0; 3433 losers++; 3434 } 3435 } 3436 } 3437 3438 /* If one alternative accepts all the operands, no reload required, 3439 choose that alternative; don't consider the remaining ones. */ 3440 if (losers == 0) 3441 { 3442 /* Unswap these so that they are never swapped at `finish'. */ 3443 if (commutative >= 0) 3444 { 3445 recog_operand[commutative] = substed_operand[commutative]; 3446 recog_operand[commutative + 1] 3447 = substed_operand[commutative + 1]; 3448 } 3449 for (i = 0; i < noperands; i++) 3450 { 3451 goal_alternative_win[i] = 1; 3452 goal_alternative[i] = this_alternative[i]; 3453 goal_alternative_offmemok[i] = this_alternative_offmemok[i]; 3454 goal_alternative_matches[i] = this_alternative_matches[i]; 3455 goal_alternative_earlyclobber[i] 3456 = this_alternative_earlyclobber[i]; 3457 } 3458 goal_alternative_number = this_alternative_number; 3459 goal_alternative_swapped = swapped; 3460 goal_earlyclobber = this_earlyclobber; 3461 goto finish; 3462 } 3463 3464 /* REJECT, set by the ! and ? constraint characters and when a register 3465 would be reloaded into a non-preferred class, discourages the use of 3466 this alternative for a reload goal. REJECT is incremented by six 3467 for each ? and two for each non-preferred class. */ 3468 losers = losers * 6 + reject; 3469 3470 /* If this alternative can be made to work by reloading, 3471 and it needs less reloading than the others checked so far, 3472 record it as the chosen goal for reloading. */ 3473 if (! bad && best > losers) 3474 { 3475 for (i = 0; i < noperands; i++) 3476 { 3477 goal_alternative[i] = this_alternative[i]; 3478 goal_alternative_win[i] = this_alternative_win[i]; 3479 goal_alternative_offmemok[i] = this_alternative_offmemok[i]; 3480 goal_alternative_matches[i] = this_alternative_matches[i]; 3481 goal_alternative_earlyclobber[i] 3482 = this_alternative_earlyclobber[i]; 3483 } 3484 goal_alternative_swapped = swapped; 3485 best = losers; 3486 goal_alternative_number = this_alternative_number; 3487 goal_earlyclobber = this_earlyclobber; 3488 } 3489 } 3490 3491 /* If insn is commutative (it's safe to exchange a certain pair of operands) 3492 then we need to try each alternative twice, 3493 the second time matching those two operands 3494 as if we had exchanged them. 3495 To do this, really exchange them in operands. 3496 3497 If we have just tried the alternatives the second time, 3498 return operands to normal and drop through. */ 3499 3500 if (commutative >= 0) 3501 { 3502 swapped = !swapped; 3503 if (swapped) 3504 { 3505 register enum reg_class tclass; 3506 register int t; 3507 3508 recog_operand[commutative] = substed_operand[commutative + 1]; 3509 recog_operand[commutative + 1] = substed_operand[commutative]; 3510 3511 tclass = preferred_class[commutative]; 3512 preferred_class[commutative] = preferred_class[commutative + 1]; 3513 preferred_class[commutative + 1] = tclass; 3514 3515 t = pref_or_nothing[commutative]; 3516 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1]; 3517 pref_or_nothing[commutative + 1] = t; 3518 3519 bcopy ((char *) recog_constraints, (char *) constraints, 3520 noperands * sizeof (char *)); 3521 goto try_swapped; 3522 } 3523 else 3524 { 3525 recog_operand[commutative] = substed_operand[commutative]; 3526 recog_operand[commutative + 1] = substed_operand[commutative + 1]; 3527 } 3528 } 3529 3530 /* The operands don't meet the constraints. 3531 goal_alternative describes the alternative 3532 that we could reach by reloading the fewest operands. 3533 Reload so as to fit it. */ 3534 3535 if (best == MAX_RECOG_OPERANDS * 2 + 600) 3536 { 3537 /* No alternative works with reloads?? */ 3538 if (insn_code_number >= 0) 3539 fatal_insn ("Unable to generate reloads for:", insn); 3540 error_for_asm (insn, "inconsistent operand constraints in an `asm'"); 3541 /* Avoid further trouble with this insn. */ 3542 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 3543 n_reloads = 0; 3544 return 0; 3545 } 3546 3547 /* Jump to `finish' from above if all operands are valid already. 3548 In that case, goal_alternative_win is all 1. */ 3549 finish: 3550 3551 /* Right now, for any pair of operands I and J that are required to match, 3552 with I < J, 3553 goal_alternative_matches[J] is I. 3554 Set up goal_alternative_matched as the inverse function: 3555 goal_alternative_matched[I] = J. */ 3556 3557 for (i = 0; i < noperands; i++) 3558 goal_alternative_matched[i] = -1; 3559 3560 for (i = 0; i < noperands; i++) 3561 if (! goal_alternative_win[i] 3562 && goal_alternative_matches[i] >= 0) 3563 goal_alternative_matched[goal_alternative_matches[i]] = i; 3564 3565 /* If the best alternative is with operands 1 and 2 swapped, 3566 consider them swapped before reporting the reloads. Update the 3567 operand numbers of any reloads already pushed. */ 3568 3569 if (goal_alternative_swapped) 3570 { 3571 register rtx tem; 3572 3573 tem = substed_operand[commutative]; 3574 substed_operand[commutative] = substed_operand[commutative + 1]; 3575 substed_operand[commutative + 1] = tem; 3576 tem = recog_operand[commutative]; 3577 recog_operand[commutative] = recog_operand[commutative + 1]; 3578 recog_operand[commutative + 1] = tem; 3579 tem = *recog_operand_loc[commutative]; 3580 *recog_operand_loc[commutative] = *recog_operand_loc[commutative+1]; 3581 *recog_operand_loc[commutative+1] = tem; 3582 3583 for (i = 0; i < n_reloads; i++) 3584 { 3585 if (reload_opnum[i] == commutative) 3586 reload_opnum[i] = commutative + 1; 3587 else if (reload_opnum[i] == commutative + 1) 3588 reload_opnum[i] = commutative; 3589 } 3590 } 3591 3592 for (i = 0; i < noperands; i++) 3593 { 3594 operand_reloadnum[i] = -1; 3595 3596 /* If this is an earlyclobber operand, we need to widen the scope. 3597 The reload must remain valid from the start of the insn being 3598 reloaded until after the operand is stored into its destination. 3599 We approximate this with RELOAD_OTHER even though we know that we 3600 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads. 3601 3602 One special case that is worth checking is when we have an 3603 output that is earlyclobber but isn't used past the insn (typically 3604 a SCRATCH). In this case, we only need have the reload live 3605 through the insn itself, but not for any of our input or output 3606 reloads. 3607 But we must not accidentally narrow the scope of an existing 3608 RELOAD_OTHER reload - leave these alone. 3609 3610 In any case, anything needed to address this operand can remain 3611 however they were previously categorized. */ 3612 3613 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER) 3614 operand_type[i] 3615 = (find_reg_note (insn, REG_UNUSED, recog_operand[i]) 3616 ? RELOAD_FOR_INSN : RELOAD_OTHER); 3617 } 3618 3619 /* Any constants that aren't allowed and can't be reloaded 3620 into registers are here changed into memory references. */ 3621 for (i = 0; i < noperands; i++) 3622 if (! goal_alternative_win[i] 3623 && CONSTANT_P (recog_operand[i]) 3624 /* force_const_mem does not accept HIGH. */ 3625 && GET_CODE (recog_operand[i]) != HIGH 3626 && ((PREFERRED_RELOAD_CLASS (recog_operand[i], 3627 (enum reg_class) goal_alternative[i]) 3628 == NO_REGS) 3629 || no_input_reloads) 3630 && operand_mode[i] != VOIDmode) 3631 { 3632 substed_operand[i] = recog_operand[i] 3633 = find_reloads_toplev (force_const_mem (operand_mode[i], 3634 recog_operand[i]), 3635 i, address_type[i], ind_levels, 0, insn); 3636 if (alternative_allows_memconst (recog_constraints[i], 3637 goal_alternative_number)) 3638 goal_alternative_win[i] = 1; 3639 } 3640 3641 /* Record the values of the earlyclobber operands for the caller. */ 3642 if (goal_earlyclobber) 3643 for (i = 0; i < noperands; i++) 3644 if (goal_alternative_earlyclobber[i]) 3645 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i]; 3646 3647 /* Now record reloads for all the operands that need them. */ 3648 last_output_reload_regno = -1; 3649 for (i = 0; i < noperands; i++) 3650 if (! goal_alternative_win[i]) 3651 { 3652 /* Operands that match previous ones have already been handled. */ 3653 if (goal_alternative_matches[i] >= 0) 3654 ; 3655 /* Handle an operand with a nonoffsettable address 3656 appearing where an offsettable address will do 3657 by reloading the address into a base register. 3658 3659 ??? We can also do this when the operand is a register and 3660 reg_equiv_mem is not offsettable, but this is a bit tricky, 3661 so we don't bother with it. It may not be worth doing. */ 3662 else if (goal_alternative_matched[i] == -1 3663 && goal_alternative_offmemok[i] 3664 && GET_CODE (recog_operand[i]) == MEM) 3665 { 3666 operand_reloadnum[i] 3667 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX, 3668 &XEXP (recog_operand[i], 0), NULL_PTR, 3669 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)), 3670 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT); 3671 reload_inc[operand_reloadnum[i]] 3672 = GET_MODE_SIZE (GET_MODE (recog_operand[i])); 3673 3674 /* If this operand is an output, we will have made any 3675 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but 3676 now we are treating part of the operand as an input, so 3677 we must change these to RELOAD_FOR_INPUT_ADDRESS. */ 3678 3679 if (modified[i] == RELOAD_WRITE) 3680 { 3681 for (j = 0; j < n_reloads; j++) 3682 { 3683 if (reload_opnum[j] == i) 3684 { 3685 if (reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS) 3686 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS; 3687 else if (reload_when_needed[j] 3688 == RELOAD_FOR_OUTADDR_ADDRESS) 3689 reload_when_needed[j] = RELOAD_FOR_INPADDR_ADDRESS; 3690 } 3691 } 3692 } 3693 } 3694 else if (goal_alternative_matched[i] == -1) 3695 { 3696 operand_reloadnum[i] 3697 = push_reload ((modified[i] != RELOAD_WRITE 3698 ? recog_operand[i] : 0), 3699 modified[i] != RELOAD_READ ? recog_operand[i] : 0, 3700 (modified[i] != RELOAD_WRITE 3701 ? recog_operand_loc[i] : 0), 3702 (modified[i] != RELOAD_READ 3703 ? recog_operand_loc[i] : 0), 3704 (enum reg_class) goal_alternative[i], 3705 (modified[i] == RELOAD_WRITE 3706 ? VOIDmode : operand_mode[i]), 3707 (modified[i] == RELOAD_READ 3708 ? VOIDmode : operand_mode[i]), 3709 (insn_code_number < 0 ? 0 3710 : insn_operand_strict_low[insn_code_number][i]), 3711 0, i, operand_type[i]); 3712 if (modified[i] != RELOAD_READ 3713 && GET_CODE (recog_operand[i]) == REG) 3714 last_output_reload_regno = REGNO (recog_operand[i]); 3715 } 3716 /* In a matching pair of operands, one must be input only 3717 and the other must be output only. 3718 Pass the input operand as IN and the other as OUT. */ 3719 else if (modified[i] == RELOAD_READ 3720 && modified[goal_alternative_matched[i]] == RELOAD_WRITE) 3721 { 3722 operand_reloadnum[i] 3723 = push_reload (recog_operand[i], 3724 recog_operand[goal_alternative_matched[i]], 3725 recog_operand_loc[i], 3726 recog_operand_loc[goal_alternative_matched[i]], 3727 (enum reg_class) goal_alternative[i], 3728 operand_mode[i], 3729 operand_mode[goal_alternative_matched[i]], 3730 0, 0, i, RELOAD_OTHER); 3731 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum; 3732 if (GET_CODE (recog_operand[goal_alternative_matched[i]]) == REG) 3733 last_output_reload_regno 3734 = REGNO (recog_operand[goal_alternative_matched[i]]); 3735 } 3736 else if (modified[i] == RELOAD_WRITE 3737 && modified[goal_alternative_matched[i]] == RELOAD_READ) 3738 { 3739 operand_reloadnum[goal_alternative_matched[i]] 3740 = push_reload (recog_operand[goal_alternative_matched[i]], 3741 recog_operand[i], 3742 recog_operand_loc[goal_alternative_matched[i]], 3743 recog_operand_loc[i], 3744 (enum reg_class) goal_alternative[i], 3745 operand_mode[goal_alternative_matched[i]], 3746 operand_mode[i], 3747 0, 0, i, RELOAD_OTHER); 3748 operand_reloadnum[i] = output_reloadnum; 3749 if (GET_CODE (recog_operand[i]) == REG) 3750 last_output_reload_regno = REGNO (recog_operand[i]); 3751 } 3752 else if (insn_code_number >= 0) 3753 abort (); 3754 else 3755 { 3756 error_for_asm (insn, "inconsistent operand constraints in an `asm'"); 3757 /* Avoid further trouble with this insn. */ 3758 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 3759 n_reloads = 0; 3760 return 0; 3761 } 3762 } 3763 else if (goal_alternative_matched[i] < 0 3764 && goal_alternative_matches[i] < 0 3765 && optimize) 3766 { 3767 /* For each non-matching operand that's a MEM or a pseudo-register 3768 that didn't get a hard register, make an optional reload. 3769 This may get done even if the insn needs no reloads otherwise. */ 3770 3771 rtx operand = recog_operand[i]; 3772 3773 while (GET_CODE (operand) == SUBREG) 3774 operand = XEXP (operand, 0); 3775 if ((GET_CODE (operand) == MEM 3776 || (GET_CODE (operand) == REG 3777 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 3778 /* If this is only for an output, the optional reload would not 3779 actually cause us to use a register now, just note that 3780 something is stored here. */ 3781 && ((enum reg_class) goal_alternative[i] != NO_REGS 3782 || modified[i] == RELOAD_WRITE) 3783 && ! no_input_reloads 3784 /* An optional output reload might allow to delete INSN later. 3785 We mustn't make in-out reloads on insns that are not permitted 3786 output reloads. 3787 If this is an asm, we can't delete it; we must not even call 3788 push_reload for an optional output reload in this case, 3789 because we can't be sure that the constraint allows a register, 3790 and push_reload verifies the constraints for asms. */ 3791 && (modified[i] == RELOAD_READ 3792 || (! no_output_reloads && ! this_insn_is_asm))) 3793 operand_reloadnum[i] 3794 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0, 3795 modified[i] != RELOAD_READ ? recog_operand[i] : 0, 3796 (modified[i] != RELOAD_WRITE 3797 ? recog_operand_loc[i] : 0), 3798 (modified[i] != RELOAD_READ 3799 ? recog_operand_loc[i] : 0), 3800 (enum reg_class) goal_alternative[i], 3801 (modified[i] == RELOAD_WRITE 3802 ? VOIDmode : operand_mode[i]), 3803 (modified[i] == RELOAD_READ 3804 ? VOIDmode : operand_mode[i]), 3805 (insn_code_number < 0 ? 0 3806 : insn_operand_strict_low[insn_code_number][i]), 3807 1, i, operand_type[i]); 3808 /* If a memory reference remains (either as a MEM or a pseudo that 3809 did not get a hard register), yet we can't make an optional 3810 reload, check if this is actually a pseudo register reference; 3811 we then need to emit a USE and/or a CLOBBER so that reload 3812 inheritance will do the right thing. */ 3813 else if (replace 3814 && (GET_CODE (operand) == MEM 3815 || (GET_CODE (operand) == REG 3816 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3817 && reg_renumber [REGNO (operand)] < 0))) 3818 { 3819 operand = *recog_operand_loc[i]; 3820 3821 while (GET_CODE (operand) == SUBREG) 3822 operand = XEXP (operand, 0); 3823 if (GET_CODE (operand) == REG) 3824 { 3825 if (modified[i] != RELOAD_WRITE) 3826 emit_insn_before (gen_rtx_USE (VOIDmode, operand), insn); 3827 if (modified[i] != RELOAD_READ) 3828 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn); 3829 } 3830 } 3831 } 3832 else if (goal_alternative_matches[i] >= 0 3833 && goal_alternative_win[goal_alternative_matches[i]] 3834 && modified[i] == RELOAD_READ 3835 && modified[goal_alternative_matches[i]] == RELOAD_WRITE 3836 && ! no_input_reloads && ! no_output_reloads 3837 && optimize) 3838 { 3839 /* Similarly, make an optional reload for a pair of matching 3840 objects that are in MEM or a pseudo that didn't get a hard reg. */ 3841 3842 rtx operand = recog_operand[i]; 3843 3844 while (GET_CODE (operand) == SUBREG) 3845 operand = XEXP (operand, 0); 3846 if ((GET_CODE (operand) == MEM 3847 || (GET_CODE (operand) == REG 3848 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 3849 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]] 3850 != NO_REGS)) 3851 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]] 3852 = push_reload (recog_operand[goal_alternative_matches[i]], 3853 recog_operand[i], 3854 recog_operand_loc[goal_alternative_matches[i]], 3855 recog_operand_loc[i], 3856 (enum reg_class) goal_alternative[goal_alternative_matches[i]], 3857 operand_mode[goal_alternative_matches[i]], 3858 operand_mode[i], 3859 0, 1, goal_alternative_matches[i], RELOAD_OTHER); 3860 } 3861 3862 /* Perform whatever substitutions on the operands we are supposed 3863 to make due to commutativity or replacement of registers 3864 with equivalent constants or memory slots. */ 3865 3866 for (i = 0; i < noperands; i++) 3867 { 3868 /* We only do this on the last pass through reload, because it is 3869 possible for some data (like reg_equiv_address) to be changed during 3870 later passes. Moreover, we loose the opportunity to get a useful 3871 reload_{in,out}_reg when we do these replacements. */ 3872 3873 if (replace) 3874 { 3875 rtx substitution = substed_operand[i]; 3876 3877 *recog_operand_loc[i] = substitution; 3878 3879 /* If we're replacing an operand with a LABEL_REF, we need 3880 to make sure that there's a REG_LABEL note attached to 3881 this instruction. */ 3882 if (GET_CODE (insn) != JUMP_INSN 3883 && GET_CODE (substitution) == LABEL_REF 3884 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0))) 3885 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, 3886 XEXP (substitution, 0), 3887 REG_NOTES (insn)); 3888 } 3889 else 3890 retval |= (substed_operand[i] != *recog_operand_loc[i]); 3891 } 3892 3893 /* If this insn pattern contains any MATCH_DUP's, make sure that 3894 they will be substituted if the operands they match are substituted. 3895 Also do now any substitutions we already did on the operands. 3896 3897 Don't do this if we aren't making replacements because we might be 3898 propagating things allocated by frame pointer elimination into places 3899 it doesn't expect. */ 3900 3901 if (insn_code_number >= 0 && replace) 3902 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--) 3903 { 3904 int opno = recog_dup_num[i]; 3905 *recog_dup_loc[i] = *recog_operand_loc[opno]; 3906 if (operand_reloadnum[opno] >= 0) 3907 push_replacement (recog_dup_loc[i], operand_reloadnum[opno], 3908 insn_operand_mode[insn_code_number][opno]); 3909 } 3910 3911#if 0 3912 /* This loses because reloading of prior insns can invalidate the equivalence 3913 (or at least find_equiv_reg isn't smart enough to find it any more), 3914 causing this insn to need more reload regs than it needed before. 3915 It may be too late to make the reload regs available. 3916 Now this optimization is done safely in choose_reload_regs. */ 3917 3918 /* For each reload of a reg into some other class of reg, 3919 search for an existing equivalent reg (same value now) in the right class. 3920 We can use it as long as we don't need to change its contents. */ 3921 for (i = 0; i < n_reloads; i++) 3922 if (reload_reg_rtx[i] == 0 3923 && reload_in[i] != 0 3924 && GET_CODE (reload_in[i]) == REG 3925 && reload_out[i] == 0) 3926 { 3927 reload_reg_rtx[i] 3928 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1, 3929 static_reload_reg_p, 0, reload_inmode[i]); 3930 /* Prevent generation of insn to load the value 3931 because the one we found already has the value. */ 3932 if (reload_reg_rtx[i]) 3933 reload_in[i] = reload_reg_rtx[i]; 3934 } 3935#endif 3936 3937 /* Perhaps an output reload can be combined with another 3938 to reduce needs by one. */ 3939 if (!goal_earlyclobber) 3940 combine_reloads (); 3941 3942 /* If we have a pair of reloads for parts of an address, they are reloading 3943 the same object, the operands themselves were not reloaded, and they 3944 are for two operands that are supposed to match, merge the reloads and 3945 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */ 3946 3947 for (i = 0; i < n_reloads; i++) 3948 { 3949 int k; 3950 3951 for (j = i + 1; j < n_reloads; j++) 3952 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS 3953 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS 3954 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS 3955 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS) 3956 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS 3957 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS 3958 || reload_when_needed[j] == RELOAD_FOR_INPADDR_ADDRESS 3959 || reload_when_needed[j] == RELOAD_FOR_OUTADDR_ADDRESS) 3960 && rtx_equal_p (reload_in[i], reload_in[j]) 3961 && (operand_reloadnum[reload_opnum[i]] < 0 3962 || reload_optional[operand_reloadnum[reload_opnum[i]]]) 3963 && (operand_reloadnum[reload_opnum[j]] < 0 3964 || reload_optional[operand_reloadnum[reload_opnum[j]]]) 3965 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j] 3966 || (goal_alternative_matches[reload_opnum[j]] 3967 == reload_opnum[i]))) 3968 { 3969 for (k = 0; k < n_replacements; k++) 3970 if (replacements[k].what == j) 3971 replacements[k].what = i; 3972 3973 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS 3974 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS) 3975 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR; 3976 else 3977 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS; 3978 reload_in[j] = 0; 3979 } 3980 } 3981 3982 /* Scan all the reloads and update their type. 3983 If a reload is for the address of an operand and we didn't reload 3984 that operand, change the type. Similarly, change the operand number 3985 of a reload when two operands match. If a reload is optional, treat it 3986 as though the operand isn't reloaded. 3987 3988 ??? This latter case is somewhat odd because if we do the optional 3989 reload, it means the object is hanging around. Thus we need only 3990 do the address reload if the optional reload was NOT done. 3991 3992 Change secondary reloads to be the address type of their operand, not 3993 the normal type. 3994 3995 If an operand's reload is now RELOAD_OTHER, change any 3996 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to 3997 RELOAD_FOR_OTHER_ADDRESS. */ 3998 3999 for (i = 0; i < n_reloads; i++) 4000 { 4001 if (reload_secondary_p[i] 4002 && reload_when_needed[i] == operand_type[reload_opnum[i]]) 4003 reload_when_needed[i] = address_type[reload_opnum[i]]; 4004 4005 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS 4006 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS 4007 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS 4008 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS) 4009 && (operand_reloadnum[reload_opnum[i]] < 0 4010 || reload_optional[operand_reloadnum[reload_opnum[i]]])) 4011 { 4012 /* If we have a secondary reload to go along with this reload, 4013 change its type to RELOAD_FOR_OPADDR_ADDR. */ 4014 4015 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS 4016 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS) 4017 && reload_secondary_in_reload[i] != -1) 4018 { 4019 int secondary_in_reload = reload_secondary_in_reload[i]; 4020 4021 reload_when_needed[secondary_in_reload] 4022 = RELOAD_FOR_OPADDR_ADDR; 4023 4024 /* If there's a tertiary reload we have to change it also. */ 4025 if (secondary_in_reload > 0 4026 && reload_secondary_in_reload[secondary_in_reload] != -1) 4027 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]] 4028 = RELOAD_FOR_OPADDR_ADDR; 4029 } 4030 4031 if ((reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS 4032 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS) 4033 && reload_secondary_out_reload[i] != -1) 4034 { 4035 int secondary_out_reload = reload_secondary_out_reload[i]; 4036 4037 reload_when_needed[secondary_out_reload] 4038 = RELOAD_FOR_OPADDR_ADDR; 4039 4040 /* If there's a tertiary reload we have to change it also. */ 4041 if (secondary_out_reload 4042 && reload_secondary_out_reload[secondary_out_reload] != -1) 4043 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]] 4044 = RELOAD_FOR_OPADDR_ADDR; 4045 } 4046 4047 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS 4048 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS) 4049 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR; 4050 else 4051 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS; 4052 } 4053 4054 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS 4055 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS) 4056 && operand_reloadnum[reload_opnum[i]] >= 0 4057 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]] 4058 == RELOAD_OTHER)) 4059 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS; 4060 4061 if (goal_alternative_matches[reload_opnum[i]] >= 0) 4062 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]]; 4063 } 4064 4065 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads. 4066 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR 4067 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads. 4068 4069 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never 4070 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a 4071 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads. 4072 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload, 4073 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all 4074 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it. 4075 This is complicated by the fact that a single operand can have more 4076 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix 4077 choose_reload_regs without affecting code quality, and cases that 4078 actually fail are extremely rare, so it turns out to be better to fix 4079 the problem here by not generating cases that choose_reload_regs will 4080 fail for. */ 4081 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS / 4082 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for 4083 a single operand. 4084 We can reduce the register pressure by exploiting that a 4085 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads 4086 does not conflict with any of them, if it is only used for the first of 4087 the RELOAD_FOR_X_ADDRESS reloads. */ 4088 { 4089 int first_op_addr_num = -2; 4090 int first_inpaddr_num[MAX_RECOG_OPERANDS]; 4091 int first_outpaddr_num[MAX_RECOG_OPERANDS]; 4092 int need_change= 0; 4093 /* We use last_op_addr_reload and the contents of the above arrays 4094 first as flags - -2 means no instance encountered, -1 means exactly 4095 one instance encountered. 4096 If more than one instance has been encountered, we store the reload 4097 number of the first reload of the kind in question; reload numbers 4098 are known to be non-negative. */ 4099 for (i = 0; i < noperands; i++) 4100 first_inpaddr_num[i] = first_outpaddr_num[i] = -2; 4101 for (i = n_reloads - 1; i >= 0; i--) 4102 { 4103 switch (reload_when_needed[i]) 4104 { 4105 case RELOAD_FOR_OPERAND_ADDRESS: 4106 if (++first_op_addr_num >= 0) 4107 { 4108 first_op_addr_num = i; 4109 need_change = 1; 4110 } 4111 break; 4112 case RELOAD_FOR_INPUT_ADDRESS: 4113 if (++first_inpaddr_num[reload_opnum[i]] >= 0) 4114 { 4115 first_inpaddr_num[reload_opnum[i]] = i; 4116 need_change = 1; 4117 } 4118 break; 4119 case RELOAD_FOR_OUTPUT_ADDRESS: 4120 if (++first_outpaddr_num[reload_opnum[i]] >= 0) 4121 { 4122 first_outpaddr_num[reload_opnum[i]] = i; 4123 need_change = 1; 4124 } 4125 break; 4126 default: 4127 break; 4128 } 4129 } 4130 4131 if (need_change) 4132 { 4133 for (i = 0; i < n_reloads; i++) 4134 { 4135 int first_num, type; 4136 4137 switch (reload_when_needed[i]) 4138 { 4139 case RELOAD_FOR_OPADDR_ADDR: 4140 first_num = first_op_addr_num; 4141 type = RELOAD_FOR_OPERAND_ADDRESS; 4142 break; 4143 case RELOAD_FOR_INPADDR_ADDRESS: 4144 first_num = first_inpaddr_num[reload_opnum[i]]; 4145 type = RELOAD_FOR_INPUT_ADDRESS; 4146 break; 4147 case RELOAD_FOR_OUTADDR_ADDRESS: 4148 first_num = first_outpaddr_num[reload_opnum[i]]; 4149 type = RELOAD_FOR_OUTPUT_ADDRESS; 4150 break; 4151 default: 4152 continue; 4153 } 4154 if (first_num < 0) 4155 continue; 4156 else if (i > first_num) 4157 reload_when_needed[i] = type; 4158 else 4159 { 4160 /* Check if the only TYPE reload that uses reload I is 4161 reload FIRST_NUM. */ 4162 for (j = n_reloads - 1; j > first_num; j--) 4163 { 4164 if (reload_when_needed[j] == type 4165 && (reload_secondary_p[i] 4166 ? reload_secondary_in_reload[j] == i 4167 : reg_mentioned_p (reload_in[i], reload_in[j]))) 4168 { 4169 reload_when_needed[i] = type; 4170 break; 4171 } 4172 } 4173 } 4174 } 4175 } 4176 } 4177 4178 /* See if we have any reloads that are now allowed to be merged 4179 because we've changed when the reload is needed to 4180 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only 4181 check for the most common cases. */ 4182 4183 for (i = 0; i < n_reloads; i++) 4184 if (reload_in[i] != 0 && reload_out[i] == 0 4185 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS 4186 || reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR 4187 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS)) 4188 for (j = 0; j < n_reloads; j++) 4189 if (i != j && reload_in[j] != 0 && reload_out[j] == 0 4190 && reload_when_needed[j] == reload_when_needed[i] 4191 && MATCHES (reload_in[i], reload_in[j]) 4192 && reload_reg_class[i] == reload_reg_class[j] 4193 && !reload_nocombine[i] && !reload_nocombine[j] 4194 && reload_reg_rtx[i] == reload_reg_rtx[j]) 4195 { 4196 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]); 4197 transfer_replacements (i, j); 4198 reload_in[j] = 0; 4199 } 4200 4201 /* Set which reloads must use registers not used in any group. Start 4202 with those that conflict with a group and then include ones that 4203 conflict with ones that are already known to conflict with a group. */ 4204 4205 changed = 0; 4206 for (i = 0; i < n_reloads; i++) 4207 { 4208 enum machine_mode mode = reload_inmode[i]; 4209 enum reg_class class = reload_reg_class[i]; 4210 int size; 4211 4212 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode)) 4213 mode = reload_outmode[i]; 4214 size = CLASS_MAX_NREGS (class, mode); 4215 4216 if (size == 1) 4217 for (j = 0; j < n_reloads; j++) 4218 if ((CLASS_MAX_NREGS (reload_reg_class[j], 4219 (GET_MODE_SIZE (reload_outmode[j]) 4220 > GET_MODE_SIZE (reload_inmode[j])) 4221 ? reload_outmode[j] : reload_inmode[j]) 4222 > 1) 4223 && !reload_optional[j] 4224 && (reload_in[j] != 0 || reload_out[j] != 0 4225 || reload_secondary_p[j]) 4226 && reloads_conflict (i, j) 4227 && reg_classes_intersect_p (class, reload_reg_class[j])) 4228 { 4229 reload_nongroup[i] = 1; 4230 changed = 1; 4231 break; 4232 } 4233 } 4234 4235 while (changed) 4236 { 4237 changed = 0; 4238 4239 for (i = 0; i < n_reloads; i++) 4240 { 4241 enum machine_mode mode = reload_inmode[i]; 4242 enum reg_class class = reload_reg_class[i]; 4243 int size; 4244 4245 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode)) 4246 mode = reload_outmode[i]; 4247 size = CLASS_MAX_NREGS (class, mode); 4248 4249 if (! reload_nongroup[i] && size == 1) 4250 for (j = 0; j < n_reloads; j++) 4251 if (reload_nongroup[j] 4252 && reloads_conflict (i, j) 4253 && reg_classes_intersect_p (class, reload_reg_class[j])) 4254 { 4255 reload_nongroup[i] = 1; 4256 changed = 1; 4257 break; 4258 } 4259 } 4260 } 4261 4262#else /* no REGISTER_CONSTRAINTS */ 4263 int noperands; 4264 int insn_code_number; 4265 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */ 4266 register int i; 4267 rtx body = PATTERN (insn); 4268 int retval = 0; 4269 4270 n_reloads = 0; 4271 n_replacements = 0; 4272 n_earlyclobbers = 0; 4273 replace_reloads = replace; 4274 this_insn = insn; 4275 4276 extract_insn (insn); 4277 4278 noperands = reload_n_operands = recog_n_operands; 4279 4280 /* Return if the insn needs no reload processing. */ 4281 if (noperands == 0) 4282 return; 4283 4284 for (i = 0; i < noperands; i++) 4285 { 4286 register RTX_CODE code = GET_CODE (recog_operand[i]); 4287 int is_set_dest = GET_CODE (body) == SET && (i == 0); 4288 4289 if (insn_code_number >= 0) 4290 if (insn_operand_address_p[insn_code_number][i]) 4291 find_reloads_address (VOIDmode, NULL_PTR, 4292 recog_operand[i], recog_operand_loc[i], 4293 i, RELOAD_FOR_INPUT, ind_levels, insn); 4294 4295 /* In these cases, we can't tell if the operand is an input 4296 or an output, so be conservative. In practice it won't be 4297 problem. */ 4298 4299 if (code == MEM) 4300 find_reloads_address (GET_MODE (recog_operand[i]), 4301 recog_operand_loc[i], 4302 XEXP (recog_operand[i], 0), 4303 &XEXP (recog_operand[i], 0), 4304 i, RELOAD_OTHER, ind_levels, insn); 4305 if (code == SUBREG) 4306 recog_operand[i] = *recog_operand_loc[i] 4307 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER, 4308 ind_levels, is_set_dest); 4309 if (code == REG) 4310 { 4311 register int regno = REGNO (recog_operand[i]); 4312 if (reg_equiv_constant[regno] != 0 && !is_set_dest) 4313 recog_operand[i] = *recog_operand_loc[i] 4314 = reg_equiv_constant[regno]; 4315#if 0 /* This might screw code in reload1.c to delete prior output-reload 4316 that feeds this insn. */ 4317 if (reg_equiv_mem[regno] != 0) 4318 recog_operand[i] = *recog_operand_loc[i] 4319 = reg_equiv_mem[regno]; 4320#endif 4321 } 4322 } 4323 4324 /* Perhaps an output reload can be combined with another 4325 to reduce needs by one. */ 4326 if (!goal_earlyclobber) 4327 combine_reloads (); 4328#endif /* no REGISTER_CONSTRAINTS */ 4329 return retval; 4330} 4331 4332/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT 4333 accepts a memory operand with constant address. */ 4334 4335static int 4336alternative_allows_memconst (constraint, altnum) 4337 const char *constraint; 4338 int altnum; 4339{ 4340 register int c; 4341 /* Skip alternatives before the one requested. */ 4342 while (altnum > 0) 4343 { 4344 while (*constraint++ != ','); 4345 altnum--; 4346 } 4347 /* Scan the requested alternative for 'm' or 'o'. 4348 If one of them is present, this alternative accepts memory constants. */ 4349 while ((c = *constraint++) && c != ',' && c != '#') 4350 if (c == 'm' || c == 'o') 4351 return 1; 4352 return 0; 4353} 4354 4355/* Scan X for memory references and scan the addresses for reloading. 4356 Also checks for references to "constant" regs that we want to eliminate 4357 and replaces them with the values they stand for. 4358 We may alter X destructively if it contains a reference to such. 4359 If X is just a constant reg, we return the equivalent value 4360 instead of X. 4361 4362 IND_LEVELS says how many levels of indirect addressing this machine 4363 supports. 4364 4365 OPNUM and TYPE identify the purpose of the reload. 4366 4367 IS_SET_DEST is true if X is the destination of a SET, which is not 4368 appropriate to be replaced by a constant. 4369 4370 INSN, if nonzero, is the insn in which we do the reload. It is used 4371 to determine if we may generate output reloads, and where to put USEs 4372 for pseudos that we have to replace with stack slots. */ 4373 4374static rtx 4375find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn) 4376 rtx x; 4377 int opnum; 4378 enum reload_type type; 4379 int ind_levels; 4380 int is_set_dest; 4381 rtx insn; 4382{ 4383 register RTX_CODE code = GET_CODE (x); 4384 4385 register char *fmt = GET_RTX_FORMAT (code); 4386 register int i; 4387 int copied; 4388 4389 if (code == REG) 4390 { 4391 /* This code is duplicated for speed in find_reloads. */ 4392 register int regno = REGNO (x); 4393 if (reg_equiv_constant[regno] != 0 && !is_set_dest) 4394 x = reg_equiv_constant[regno]; 4395#if 0 4396/* This creates (subreg (mem...)) which would cause an unnecessary 4397 reload of the mem. */ 4398 else if (reg_equiv_mem[regno] != 0) 4399 x = reg_equiv_mem[regno]; 4400#endif 4401 else if (reg_equiv_memory_loc[regno] 4402 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 4403 { 4404 rtx mem = make_memloc (x, regno); 4405 if (reg_equiv_address[regno] 4406 || ! rtx_equal_p (mem, reg_equiv_mem[regno])) 4407 { 4408 /* If this is not a toplevel operand, find_reloads doesn't see 4409 this substitution. We have to emit a USE of the pseudo so 4410 that delete_output_reload can see it. */ 4411 if (replace_reloads && recog_operand[opnum] != x) 4412 emit_insn_before (gen_rtx_USE (VOIDmode, x), insn); 4413 x = mem; 4414 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0), 4415 opnum, type, ind_levels, insn); 4416 } 4417 } 4418 return x; 4419 } 4420 if (code == MEM) 4421 { 4422 rtx tem = x; 4423 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0), 4424 opnum, type, ind_levels, insn); 4425 return tem; 4426 } 4427 4428 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG) 4429 { 4430 /* Check for SUBREG containing a REG that's equivalent to a constant. 4431 If the constant has a known value, truncate it right now. 4432 Similarly if we are extracting a single-word of a multi-word 4433 constant. If the constant is symbolic, allow it to be substituted 4434 normally. push_reload will strip the subreg later. If the 4435 constant is VOIDmode, abort because we will lose the mode of 4436 the register (this should never happen because one of the cases 4437 above should handle it). */ 4438 4439 register int regno = REGNO (SUBREG_REG (x)); 4440 rtx tem; 4441 4442 if (subreg_lowpart_p (x) 4443 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4444 && reg_equiv_constant[regno] != 0 4445 && (tem = gen_lowpart_common (GET_MODE (x), 4446 reg_equiv_constant[regno])) != 0) 4447 return tem; 4448 4449 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD 4450 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4451 && reg_equiv_constant[regno] != 0 4452 && (tem = operand_subword (reg_equiv_constant[regno], 4453 SUBREG_WORD (x), 0, 4454 GET_MODE (SUBREG_REG (x)))) != 0) 4455 { 4456 /* TEM is now a word sized constant for the bits from X that 4457 we wanted. However, TEM may be the wrong representation. 4458 4459 Use gen_lowpart_common to convert a CONST_INT into a 4460 CONST_DOUBLE and vice versa as needed according to by the mode 4461 of the SUBREG. */ 4462 tem = gen_lowpart_common (GET_MODE (x), tem); 4463 if (!tem) 4464 abort (); 4465 return tem; 4466 } 4467 4468 /* If the SUBREG is wider than a word, the above test will fail. 4469 For example, we might have a SImode SUBREG of a DImode SUBREG_REG 4470 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for 4471 a 32 bit target. We still can - and have to - handle this 4472 for non-paradoxical subregs of CONST_INTs. */ 4473 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4474 && reg_equiv_constant[regno] != 0 4475 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT 4476 && (GET_MODE_SIZE (GET_MODE (x)) 4477 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))) 4478 { 4479 int shift = SUBREG_WORD (x) * BITS_PER_WORD; 4480 if (WORDS_BIG_ENDIAN) 4481 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) 4482 - GET_MODE_BITSIZE (GET_MODE (x)) 4483 - shift); 4484 /* Here we use the knowledge that CONST_INTs have a 4485 HOST_WIDE_INT field. */ 4486 if (shift >= HOST_BITS_PER_WIDE_INT) 4487 shift = HOST_BITS_PER_WIDE_INT - 1; 4488 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift); 4489 } 4490 4491 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4492 && reg_equiv_constant[regno] != 0 4493 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode) 4494 abort (); 4495 4496 /* If the subreg contains a reg that will be converted to a mem, 4497 convert the subreg to a narrower memref now. 4498 Otherwise, we would get (subreg (mem ...) ...), 4499 which would force reload of the mem. 4500 4501 We also need to do this if there is an equivalent MEM that is 4502 not offsettable. In that case, alter_subreg would produce an 4503 invalid address on big-endian machines. 4504 4505 For machines that extend byte loads, we must not reload using 4506 a wider mode if we have a paradoxical SUBREG. find_reloads will 4507 force a reload in that case. So we should not do anything here. */ 4508 4509 else if (regno >= FIRST_PSEUDO_REGISTER 4510#ifdef LOAD_EXTEND_OP 4511 && (GET_MODE_SIZE (GET_MODE (x)) 4512 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) 4513#endif 4514 && (reg_equiv_address[regno] != 0 4515 || (reg_equiv_mem[regno] != 0 4516 && (! strict_memory_address_p (GET_MODE (x), 4517 XEXP (reg_equiv_mem[regno], 0)) 4518 || ! offsettable_memref_p (reg_equiv_mem[regno]) 4519 || num_not_at_initial_offset)))) 4520 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels, 4521 insn); 4522 } 4523 4524 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 4525 { 4526 if (fmt[i] == 'e') 4527 { 4528 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type, 4529 ind_levels, is_set_dest, insn); 4530 /* If we have replaced a reg with it's equivalent memory loc - 4531 that can still be handled here e.g. if it's in a paradoxical 4532 subreg - we must make the change in a copy, rather than using 4533 a destructive change. This way, find_reloads can still elect 4534 not to do the change. */ 4535 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied) 4536 { 4537 x = shallow_copy_rtx (x); 4538 copied = 1; 4539 } 4540 XEXP (x, i) = new_part; 4541 } 4542 } 4543 return x; 4544} 4545 4546/* Return a mem ref for the memory equivalent of reg REGNO. 4547 This mem ref is not shared with anything. */ 4548 4549static rtx 4550make_memloc (ad, regno) 4551 rtx ad; 4552 int regno; 4553{ 4554 /* We must rerun eliminate_regs, in case the elimination 4555 offsets have changed. */ 4556 rtx tem 4557 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0); 4558 4559 /* If TEM might contain a pseudo, we must copy it to avoid 4560 modifying it when we do the substitution for the reload. */ 4561 if (rtx_varies_p (tem)) 4562 tem = copy_rtx (tem); 4563 4564 tem = gen_rtx_MEM (GET_MODE (ad), tem); 4565 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]); 4566 return tem; 4567} 4568 4569/* Record all reloads needed for handling memory address AD 4570 which appears in *LOC in a memory reference to mode MODE 4571 which itself is found in location *MEMREFLOC. 4572 Note that we take shortcuts assuming that no multi-reg machine mode 4573 occurs as part of an address. 4574 4575 OPNUM and TYPE specify the purpose of this reload. 4576 4577 IND_LEVELS says how many levels of indirect addressing this machine 4578 supports. 4579 4580 INSN, if nonzero, is the insn in which we do the reload. It is used 4581 to determine if we may generate output reloads, and where to put USEs 4582 for pseudos that we have to replace with stack slots. 4583 4584 Value is nonzero if this address is reloaded or replaced as a whole. 4585 This is interesting to the caller if the address is an autoincrement. 4586 4587 Note that there is no verification that the address will be valid after 4588 this routine does its work. Instead, we rely on the fact that the address 4589 was valid when reload started. So we need only undo things that reload 4590 could have broken. These are wrong register types, pseudos not allocated 4591 to a hard register, and frame pointer elimination. */ 4592 4593static int 4594find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn) 4595 enum machine_mode mode; 4596 rtx *memrefloc; 4597 rtx ad; 4598 rtx *loc; 4599 int opnum; 4600 enum reload_type type; 4601 int ind_levels; 4602 rtx insn; 4603{ 4604 register int regno; 4605 int removed_and = 0; 4606 rtx tem; 4607 4608 /* If the address is a register, see if it is a legitimate address and 4609 reload if not. We first handle the cases where we need not reload 4610 or where we must reload in a non-standard way. */ 4611 4612 if (GET_CODE (ad) == REG) 4613 { 4614 regno = REGNO (ad); 4615 4616 if (reg_equiv_constant[regno] != 0 4617 && strict_memory_address_p (mode, reg_equiv_constant[regno])) 4618 { 4619 *loc = ad = reg_equiv_constant[regno]; 4620 return 0; 4621 } 4622 4623 tem = reg_equiv_memory_loc[regno]; 4624 if (tem != 0) 4625 { 4626 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset) 4627 { 4628 tem = make_memloc (ad, regno); 4629 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0))) 4630 { 4631 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0), 4632 &XEXP (tem, 0), opnum, ADDR_TYPE (type), 4633 ind_levels, insn); 4634 } 4635 /* We can avoid a reload if the register's equivalent memory 4636 expression is valid as an indirect memory address. 4637 But not all addresses are valid in a mem used as an indirect 4638 address: only reg or reg+constant. */ 4639 4640 if (ind_levels > 0 4641 && strict_memory_address_p (mode, tem) 4642 && (GET_CODE (XEXP (tem, 0)) == REG 4643 || (GET_CODE (XEXP (tem, 0)) == PLUS 4644 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG 4645 && CONSTANT_P (XEXP (XEXP (tem, 0), 1))))) 4646 { 4647 /* TEM is not the same as what we'll be replacing the 4648 pseudo with after reload, put a USE in front of INSN 4649 in the final reload pass. */ 4650 if (replace_reloads 4651 && num_not_at_initial_offset 4652 && ! rtx_equal_p (tem, reg_equiv_mem[regno])) 4653 { 4654 *loc = tem; 4655 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn); 4656 /* This doesn't really count as replacing the address 4657 as a whole, since it is still a memory access. */ 4658 } 4659 return 0; 4660 } 4661 ad = tem; 4662 } 4663 } 4664 4665 /* The only remaining case where we can avoid a reload is if this is a 4666 hard register that is valid as a base register and which is not the 4667 subject of a CLOBBER in this insn. */ 4668 4669 else if (regno < FIRST_PSEUDO_REGISTER 4670 && REGNO_MODE_OK_FOR_BASE_P (regno, mode) 4671 && ! regno_clobbered_p (regno, this_insn)) 4672 return 0; 4673 4674 /* If we do not have one of the cases above, we must do the reload. */ 4675 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS, 4676 GET_MODE (ad), VOIDmode, 0, 0, opnum, type); 4677 return 1; 4678 } 4679 4680 if (strict_memory_address_p (mode, ad)) 4681 { 4682 /* The address appears valid, so reloads are not needed. 4683 But the address may contain an eliminable register. 4684 This can happen because a machine with indirect addressing 4685 may consider a pseudo register by itself a valid address even when 4686 it has failed to get a hard reg. 4687 So do a tree-walk to find and eliminate all such regs. */ 4688 4689 /* But first quickly dispose of a common case. */ 4690 if (GET_CODE (ad) == PLUS 4691 && GET_CODE (XEXP (ad, 1)) == CONST_INT 4692 && GET_CODE (XEXP (ad, 0)) == REG 4693 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0) 4694 return 0; 4695 4696 subst_reg_equivs_changed = 0; 4697 *loc = subst_reg_equivs (ad, insn); 4698 4699 if (! subst_reg_equivs_changed) 4700 return 0; 4701 4702 /* Check result for validity after substitution. */ 4703 if (strict_memory_address_p (mode, ad)) 4704 return 0; 4705 } 4706 4707#ifdef LEGITIMIZE_RELOAD_ADDRESS 4708 do 4709 { 4710 if (memrefloc) 4711 { 4712 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type, 4713 ind_levels, win); 4714 } 4715 break; 4716 win: 4717 *memrefloc = copy_rtx (*memrefloc); 4718 XEXP (*memrefloc, 0) = ad; 4719 move_replacements (&ad, &XEXP (*memrefloc, 0)); 4720 return 1; 4721 } 4722 while (0); 4723#endif 4724 4725 /* The address is not valid. We have to figure out why. First see if 4726 we have an outer AND and remove it if so. Then analyze what's inside. */ 4727 4728 if (GET_CODE (ad) == AND) 4729 { 4730 removed_and = 1; 4731 loc = &XEXP (ad, 0); 4732 ad = *loc; 4733 } 4734 4735 /* One possibility for why the address is invalid is that it is itself 4736 a MEM. This can happen when the frame pointer is being eliminated, a 4737 pseudo is not allocated to a hard register, and the offset between the 4738 frame and stack pointers is not its initial value. In that case the 4739 pseudo will have been replaced by a MEM referring to the 4740 stack pointer. */ 4741 if (GET_CODE (ad) == MEM) 4742 { 4743 /* First ensure that the address in this MEM is valid. Then, unless 4744 indirect addresses are valid, reload the MEM into a register. */ 4745 tem = ad; 4746 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0), 4747 opnum, ADDR_TYPE (type), 4748 ind_levels == 0 ? 0 : ind_levels - 1, insn); 4749 4750 /* If tem was changed, then we must create a new memory reference to 4751 hold it and store it back into memrefloc. */ 4752 if (tem != ad && memrefloc) 4753 { 4754 *memrefloc = copy_rtx (*memrefloc); 4755 copy_replacements (tem, XEXP (*memrefloc, 0)); 4756 loc = &XEXP (*memrefloc, 0); 4757 if (removed_and) 4758 loc = &XEXP (*loc, 0); 4759 } 4760 4761 /* Check similar cases as for indirect addresses as above except 4762 that we can allow pseudos and a MEM since they should have been 4763 taken care of above. */ 4764 4765 if (ind_levels == 0 4766 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok) 4767 || GET_CODE (XEXP (tem, 0)) == MEM 4768 || ! (GET_CODE (XEXP (tem, 0)) == REG 4769 || (GET_CODE (XEXP (tem, 0)) == PLUS 4770 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG 4771 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT))) 4772 { 4773 /* Must use TEM here, not AD, since it is the one that will 4774 have any subexpressions reloaded, if needed. */ 4775 push_reload (tem, NULL_RTX, loc, NULL_PTR, 4776 BASE_REG_CLASS, GET_MODE (tem), 4777 VOIDmode, 0, 4778 0, opnum, type); 4779 return ! removed_and; 4780 } 4781 else 4782 return 0; 4783 } 4784 4785 /* If we have address of a stack slot but it's not valid because the 4786 displacement is too large, compute the sum in a register. 4787 Handle all base registers here, not just fp/ap/sp, because on some 4788 targets (namely SH) we can also get too large displacements from 4789 big-endian corrections. */ 4790 else if (GET_CODE (ad) == PLUS 4791 && GET_CODE (XEXP (ad, 0)) == REG 4792 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER 4793 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode) 4794 && GET_CODE (XEXP (ad, 1)) == CONST_INT) 4795 { 4796 /* Unshare the MEM rtx so we can safely alter it. */ 4797 if (memrefloc) 4798 { 4799 *memrefloc = copy_rtx (*memrefloc); 4800 loc = &XEXP (*memrefloc, 0); 4801 if (removed_and) 4802 loc = &XEXP (*loc, 0); 4803 } 4804 4805 if (double_reg_address_ok) 4806 { 4807 /* Unshare the sum as well. */ 4808 *loc = ad = copy_rtx (ad); 4809 4810 /* Reload the displacement into an index reg. 4811 We assume the frame pointer or arg pointer is a base reg. */ 4812 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), 4813 INDEX_REG_CLASS, GET_MODE (ad), opnum, 4814 type, ind_levels); 4815 return 0; 4816 } 4817 else 4818 { 4819 /* If the sum of two regs is not necessarily valid, 4820 reload the sum into a base reg. 4821 That will at least work. */ 4822 find_reloads_address_part (ad, loc, BASE_REG_CLASS, 4823 Pmode, opnum, type, ind_levels); 4824 } 4825 return ! removed_and; 4826 } 4827 4828 /* If we have an indexed stack slot, there are three possible reasons why 4829 it might be invalid: The index might need to be reloaded, the address 4830 might have been made by frame pointer elimination and hence have a 4831 constant out of range, or both reasons might apply. 4832 4833 We can easily check for an index needing reload, but even if that is the 4834 case, we might also have an invalid constant. To avoid making the 4835 conservative assumption and requiring two reloads, we see if this address 4836 is valid when not interpreted strictly. If it is, the only problem is 4837 that the index needs a reload and find_reloads_address_1 will take care 4838 of it. 4839 4840 There is still a case when we might generate an extra reload, 4841 however. In certain cases eliminate_regs will return a MEM for a REG 4842 (see the code there for details). In those cases, memory_address_p 4843 applied to our address will return 0 so we will think that our offset 4844 must be too large. But it might indeed be valid and the only problem 4845 is that a MEM is present where a REG should be. This case should be 4846 very rare and there doesn't seem to be any way to avoid it. 4847 4848 If we decide to do something here, it must be that 4849 `double_reg_address_ok' is true and that this address rtl was made by 4850 eliminate_regs. We generate a reload of the fp/sp/ap + constant and 4851 rework the sum so that the reload register will be added to the index. 4852 This is safe because we know the address isn't shared. 4853 4854 We check for fp/ap/sp as both the first and second operand of the 4855 innermost PLUS. */ 4856 4857 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT 4858 && GET_CODE (XEXP (ad, 0)) == PLUS 4859 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx 4860#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM 4861 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx 4862#endif 4863#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4864 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx 4865#endif 4866 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx) 4867 && ! memory_address_p (mode, ad)) 4868 { 4869 *loc = ad = gen_rtx_PLUS (GET_MODE (ad), 4870 plus_constant (XEXP (XEXP (ad, 0), 0), 4871 INTVAL (XEXP (ad, 1))), 4872 XEXP (XEXP (ad, 0), 1)); 4873 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS, 4874 GET_MODE (ad), opnum, type, ind_levels); 4875 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, 4876 type, 0, insn); 4877 4878 return 0; 4879 } 4880 4881 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT 4882 && GET_CODE (XEXP (ad, 0)) == PLUS 4883 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx 4884#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM 4885 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx 4886#endif 4887#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4888 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx 4889#endif 4890 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx) 4891 && ! memory_address_p (mode, ad)) 4892 { 4893 *loc = ad = gen_rtx_PLUS (GET_MODE (ad), 4894 XEXP (XEXP (ad, 0), 0), 4895 plus_constant (XEXP (XEXP (ad, 0), 1), 4896 INTVAL (XEXP (ad, 1)))); 4897 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS, 4898 GET_MODE (ad), opnum, type, ind_levels); 4899 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum, 4900 type, 0, insn); 4901 4902 return 0; 4903 } 4904 4905 /* See if address becomes valid when an eliminable register 4906 in a sum is replaced. */ 4907 4908 tem = ad; 4909 if (GET_CODE (ad) == PLUS) 4910 tem = subst_indexed_address (ad); 4911 if (tem != ad && strict_memory_address_p (mode, tem)) 4912 { 4913 /* Ok, we win that way. Replace any additional eliminable 4914 registers. */ 4915 4916 subst_reg_equivs_changed = 0; 4917 tem = subst_reg_equivs (tem, insn); 4918 4919 /* Make sure that didn't make the address invalid again. */ 4920 4921 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem)) 4922 { 4923 *loc = tem; 4924 return 0; 4925 } 4926 } 4927 4928 /* If constants aren't valid addresses, reload the constant address 4929 into a register. */ 4930 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad)) 4931 { 4932 /* If AD is in address in the constant pool, the MEM rtx may be shared. 4933 Unshare it so we can safely alter it. */ 4934 if (memrefloc && GET_CODE (ad) == SYMBOL_REF 4935 && CONSTANT_POOL_ADDRESS_P (ad)) 4936 { 4937 *memrefloc = copy_rtx (*memrefloc); 4938 loc = &XEXP (*memrefloc, 0); 4939 if (removed_and) 4940 loc = &XEXP (*loc, 0); 4941 } 4942 4943 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type, 4944 ind_levels); 4945 return ! removed_and; 4946 } 4947 4948 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels, 4949 insn); 4950} 4951 4952/* Find all pseudo regs appearing in AD 4953 that are eliminable in favor of equivalent values 4954 and do not have hard regs; replace them by their equivalents. 4955 INSN, if nonzero, is the insn in which we do the reload. We put USEs in 4956 front of it for pseudos that we have to replace with stack slots. */ 4957 4958static rtx 4959subst_reg_equivs (ad, insn) 4960 rtx ad; 4961 rtx insn; 4962{ 4963 register RTX_CODE code = GET_CODE (ad); 4964 register int i; 4965 register char *fmt; 4966 4967 switch (code) 4968 { 4969 case HIGH: 4970 case CONST_INT: 4971 case CONST: 4972 case CONST_DOUBLE: 4973 case SYMBOL_REF: 4974 case LABEL_REF: 4975 case PC: 4976 case CC0: 4977 return ad; 4978 4979 case REG: 4980 { 4981 register int regno = REGNO (ad); 4982 4983 if (reg_equiv_constant[regno] != 0) 4984 { 4985 subst_reg_equivs_changed = 1; 4986 return reg_equiv_constant[regno]; 4987 } 4988 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset) 4989 { 4990 rtx mem = make_memloc (ad, regno); 4991 if (! rtx_equal_p (mem, reg_equiv_mem[regno])) 4992 { 4993 subst_reg_equivs_changed = 1; 4994 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn); 4995 return mem; 4996 } 4997 } 4998 } 4999 return ad; 5000 5001 case PLUS: 5002 /* Quickly dispose of a common case. */ 5003 if (XEXP (ad, 0) == frame_pointer_rtx 5004 && GET_CODE (XEXP (ad, 1)) == CONST_INT) 5005 return ad; 5006 break; 5007 5008 default: 5009 break; 5010 } 5011 5012 fmt = GET_RTX_FORMAT (code); 5013 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5014 if (fmt[i] == 'e') 5015 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn); 5016 return ad; 5017} 5018 5019/* Compute the sum of X and Y, making canonicalizations assumed in an 5020 address, namely: sum constant integers, surround the sum of two 5021 constants with a CONST, put the constant as the second operand, and 5022 group the constant on the outermost sum. 5023 5024 This routine assumes both inputs are already in canonical form. */ 5025 5026rtx 5027form_sum (x, y) 5028 rtx x, y; 5029{ 5030 rtx tem; 5031 enum machine_mode mode = GET_MODE (x); 5032 5033 if (mode == VOIDmode) 5034 mode = GET_MODE (y); 5035 5036 if (mode == VOIDmode) 5037 mode = Pmode; 5038 5039 if (GET_CODE (x) == CONST_INT) 5040 return plus_constant (y, INTVAL (x)); 5041 else if (GET_CODE (y) == CONST_INT) 5042 return plus_constant (x, INTVAL (y)); 5043 else if (CONSTANT_P (x)) 5044 tem = x, x = y, y = tem; 5045 5046 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1))) 5047 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y)); 5048 5049 /* Note that if the operands of Y are specified in the opposite 5050 order in the recursive calls below, infinite recursion will occur. */ 5051 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1))) 5052 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1)); 5053 5054 /* If both constant, encapsulate sum. Otherwise, just form sum. A 5055 constant will have been placed second. */ 5056 if (CONSTANT_P (x) && CONSTANT_P (y)) 5057 { 5058 if (GET_CODE (x) == CONST) 5059 x = XEXP (x, 0); 5060 if (GET_CODE (y) == CONST) 5061 y = XEXP (y, 0); 5062 5063 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y)); 5064 } 5065 5066 return gen_rtx_PLUS (mode, x, y); 5067} 5068 5069/* If ADDR is a sum containing a pseudo register that should be 5070 replaced with a constant (from reg_equiv_constant), 5071 return the result of doing so, and also apply the associative 5072 law so that the result is more likely to be a valid address. 5073 (But it is not guaranteed to be one.) 5074 5075 Note that at most one register is replaced, even if more are 5076 replaceable. Also, we try to put the result into a canonical form 5077 so it is more likely to be a valid address. 5078 5079 In all other cases, return ADDR. */ 5080 5081static rtx 5082subst_indexed_address (addr) 5083 rtx addr; 5084{ 5085 rtx op0 = 0, op1 = 0, op2 = 0; 5086 rtx tem; 5087 int regno; 5088 5089 if (GET_CODE (addr) == PLUS) 5090 { 5091 /* Try to find a register to replace. */ 5092 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0; 5093 if (GET_CODE (op0) == REG 5094 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER 5095 && reg_renumber[regno] < 0 5096 && reg_equiv_constant[regno] != 0) 5097 op0 = reg_equiv_constant[regno]; 5098 else if (GET_CODE (op1) == REG 5099 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER 5100 && reg_renumber[regno] < 0 5101 && reg_equiv_constant[regno] != 0) 5102 op1 = reg_equiv_constant[regno]; 5103 else if (GET_CODE (op0) == PLUS 5104 && (tem = subst_indexed_address (op0)) != op0) 5105 op0 = tem; 5106 else if (GET_CODE (op1) == PLUS 5107 && (tem = subst_indexed_address (op1)) != op1) 5108 op1 = tem; 5109 else 5110 return addr; 5111 5112 /* Pick out up to three things to add. */ 5113 if (GET_CODE (op1) == PLUS) 5114 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0); 5115 else if (GET_CODE (op0) == PLUS) 5116 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0); 5117 5118 /* Compute the sum. */ 5119 if (op2 != 0) 5120 op1 = form_sum (op1, op2); 5121 if (op1 != 0) 5122 op0 = form_sum (op0, op1); 5123 5124 return op0; 5125 } 5126 return addr; 5127} 5128 5129/* Record the pseudo registers we must reload into hard registers in a 5130 subexpression of a would-be memory address, X referring to a value 5131 in mode MODE. (This function is not called if the address we find 5132 is strictly valid.) 5133 5134 CONTEXT = 1 means we are considering regs as index regs, 5135 = 0 means we are considering them as base regs. 5136 5137 OPNUM and TYPE specify the purpose of any reloads made. 5138 5139 IND_LEVELS says how many levels of indirect addressing are 5140 supported at this point in the address. 5141 5142 INSN, if nonzero, is the insn in which we do the reload. It is used 5143 to determine if we may generate output reloads. 5144 5145 We return nonzero if X, as a whole, is reloaded or replaced. */ 5146 5147/* Note that we take shortcuts assuming that no multi-reg machine mode 5148 occurs as part of an address. 5149 Also, this is not fully machine-customizable; it works for machines 5150 such as vaxes and 68000's and 32000's, but other possible machines 5151 could have addressing modes that this does not handle right. */ 5152 5153static int 5154find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn) 5155 enum machine_mode mode; 5156 rtx x; 5157 int context; 5158 rtx *loc; 5159 int opnum; 5160 enum reload_type type; 5161 int ind_levels; 5162 rtx insn; 5163{ 5164 register RTX_CODE code = GET_CODE (x); 5165 5166 switch (code) 5167 { 5168 case PLUS: 5169 { 5170 register rtx orig_op0 = XEXP (x, 0); 5171 register rtx orig_op1 = XEXP (x, 1); 5172 register RTX_CODE code0 = GET_CODE (orig_op0); 5173 register RTX_CODE code1 = GET_CODE (orig_op1); 5174 register rtx op0 = orig_op0; 5175 register rtx op1 = orig_op1; 5176 5177 if (GET_CODE (op0) == SUBREG) 5178 { 5179 op0 = SUBREG_REG (op0); 5180 code0 = GET_CODE (op0); 5181 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER) 5182 op0 = gen_rtx_REG (word_mode, 5183 REGNO (op0) + SUBREG_WORD (orig_op0)); 5184 } 5185 5186 if (GET_CODE (op1) == SUBREG) 5187 { 5188 op1 = SUBREG_REG (op1); 5189 code1 = GET_CODE (op1); 5190 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER) 5191 op1 = gen_rtx_REG (GET_MODE (op1), 5192 REGNO (op1) + SUBREG_WORD (orig_op1)); 5193 } 5194 5195 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE 5196 || code0 == ZERO_EXTEND || code1 == MEM) 5197 { 5198 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5199 type, ind_levels, insn); 5200 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5201 type, ind_levels, insn); 5202 } 5203 5204 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE 5205 || code1 == ZERO_EXTEND || code0 == MEM) 5206 { 5207 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5208 type, ind_levels, insn); 5209 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5210 type, ind_levels, insn); 5211 } 5212 5213 else if (code0 == CONST_INT || code0 == CONST 5214 || code0 == SYMBOL_REF || code0 == LABEL_REF) 5215 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5216 type, ind_levels, insn); 5217 5218 else if (code1 == CONST_INT || code1 == CONST 5219 || code1 == SYMBOL_REF || code1 == LABEL_REF) 5220 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5221 type, ind_levels, insn); 5222 5223 else if (code0 == REG && code1 == REG) 5224 { 5225 if (REG_OK_FOR_INDEX_P (op0) 5226 && REG_MODE_OK_FOR_BASE_P (op1, mode)) 5227 return 0; 5228 else if (REG_OK_FOR_INDEX_P (op1) 5229 && REG_MODE_OK_FOR_BASE_P (op0, mode)) 5230 return 0; 5231 else if (REG_MODE_OK_FOR_BASE_P (op1, mode)) 5232 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5233 type, ind_levels, insn); 5234 else if (REG_MODE_OK_FOR_BASE_P (op0, mode)) 5235 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5236 type, ind_levels, insn); 5237 else if (REG_OK_FOR_INDEX_P (op1)) 5238 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5239 type, ind_levels, insn); 5240 else if (REG_OK_FOR_INDEX_P (op0)) 5241 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5242 type, ind_levels, insn); 5243 else 5244 { 5245 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5246 type, ind_levels, insn); 5247 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5248 type, ind_levels, insn); 5249 } 5250 } 5251 5252 else if (code0 == REG) 5253 { 5254 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5255 type, ind_levels, insn); 5256 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5257 type, ind_levels, insn); 5258 } 5259 5260 else if (code1 == REG) 5261 { 5262 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5263 type, ind_levels, insn); 5264 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5265 type, ind_levels, insn); 5266 } 5267 } 5268 5269 return 0; 5270 5271 case POST_INC: 5272 case POST_DEC: 5273 case PRE_INC: 5274 case PRE_DEC: 5275 if (GET_CODE (XEXP (x, 0)) == REG) 5276 { 5277 register int regno = REGNO (XEXP (x, 0)); 5278 int value = 0; 5279 rtx x_orig = x; 5280 5281 /* A register that is incremented cannot be constant! */ 5282 if (regno >= FIRST_PSEUDO_REGISTER 5283 && reg_equiv_constant[regno] != 0) 5284 abort (); 5285 5286 /* Handle a register that is equivalent to a memory location 5287 which cannot be addressed directly. */ 5288 if (reg_equiv_memory_loc[regno] != 0 5289 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 5290 { 5291 rtx tem = make_memloc (XEXP (x, 0), regno); 5292 if (reg_equiv_address[regno] 5293 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5294 { 5295 /* First reload the memory location's address. 5296 We can't use ADDR_TYPE (type) here, because we need to 5297 write back the value after reading it, hence we actually 5298 need two registers. */ 5299 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), 5300 &XEXP (tem, 0), opnum, type, 5301 ind_levels, insn); 5302 /* Put this inside a new increment-expression. */ 5303 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem); 5304 /* Proceed to reload that, as if it contained a register. */ 5305 } 5306 } 5307 5308 /* If we have a hard register that is ok as an index, 5309 don't make a reload. If an autoincrement of a nice register 5310 isn't "valid", it must be that no autoincrement is "valid". 5311 If that is true and something made an autoincrement anyway, 5312 this must be a special context where one is allowed. 5313 (For example, a "push" instruction.) 5314 We can't improve this address, so leave it alone. */ 5315 5316 /* Otherwise, reload the autoincrement into a suitable hard reg 5317 and record how much to increment by. */ 5318 5319 if (reg_renumber[regno] >= 0) 5320 regno = reg_renumber[regno]; 5321 if ((regno >= FIRST_PSEUDO_REGISTER 5322 || !(context ? REGNO_OK_FOR_INDEX_P (regno) 5323 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))) 5324 { 5325#ifdef AUTO_INC_DEC 5326 register rtx link; 5327#endif 5328 int reloadnum; 5329 5330 /* If we can output the register afterwards, do so, this 5331 saves the extra update. 5332 We can do so if we have an INSN - i.e. no JUMP_INSN nor 5333 CALL_INSN - and it does not set CC0. 5334 But don't do this if we cannot directly address the 5335 memory location, since this will make it harder to 5336 reuse address reloads, and increases register pressure. 5337 Also don't do this if we can probably update x directly. */ 5338 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM 5339 ? XEXP (x, 0) 5340 : reg_equiv_mem[regno]); 5341 int icode = (int) add_optab->handlers[(int) Pmode].insn_code; 5342 if (insn && GET_CODE (insn) == INSN && equiv 5343 && memory_operand (equiv, GET_MODE (equiv)) 5344#ifdef HAVE_cc0 5345 && ! sets_cc0_p (PATTERN (insn)) 5346#endif 5347 && ! (icode != CODE_FOR_nothing 5348 && (*insn_operand_predicate[icode][0]) (equiv, Pmode) 5349 && (*insn_operand_predicate[icode][1]) (equiv, Pmode))) 5350 { 5351 loc = &XEXP (x, 0); 5352 x = XEXP (x, 0); 5353 reloadnum 5354 = push_reload (x, x, loc, loc, 5355 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5356 GET_MODE (x), GET_MODE (x), 0, 0, 5357 opnum, RELOAD_OTHER); 5358 5359 /* If we created a new MEM based on reg_equiv_mem[REGNO], then 5360 LOC above is part of the new MEM, not the MEM in INSN. 5361 5362 We must also replace the address of the MEM in INSN. */ 5363 if (&XEXP (x_orig, 0) != loc) 5364 push_replacement (&XEXP (x_orig, 0), reloadnum, VOIDmode); 5365 5366 } 5367 else 5368 { 5369 reloadnum 5370 = push_reload (x, NULL_RTX, loc, NULL_PTR, 5371 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5372 GET_MODE (x), GET_MODE (x), 0, 0, 5373 opnum, type); 5374 reload_inc[reloadnum] 5375 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0)); 5376 5377 value = 1; 5378 } 5379 5380#ifdef AUTO_INC_DEC 5381 /* Update the REG_INC notes. */ 5382 5383 for (link = REG_NOTES (this_insn); 5384 link; link = XEXP (link, 1)) 5385 if (REG_NOTE_KIND (link) == REG_INC 5386 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0))) 5387 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); 5388#endif 5389 } 5390 return value; 5391 } 5392 5393 else if (GET_CODE (XEXP (x, 0)) == MEM) 5394 { 5395 /* This is probably the result of a substitution, by eliminate_regs, 5396 of an equivalent address for a pseudo that was not allocated to a 5397 hard register. Verify that the specified address is valid and 5398 reload it into a register. */ 5399 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */ 5400 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0); 5401 register rtx link; 5402 int reloadnum; 5403 5404 /* Since we know we are going to reload this item, don't decrement 5405 for the indirection level. 5406 5407 Note that this is actually conservative: it would be slightly 5408 more efficient to use the value of SPILL_INDIRECT_LEVELS from 5409 reload1.c here. */ 5410 /* We can't use ADDR_TYPE (type) here, because we need to 5411 write back the value after reading it, hence we actually 5412 need two registers. */ 5413 find_reloads_address (GET_MODE (x), &XEXP (x, 0), 5414 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0), 5415 opnum, type, ind_levels, insn); 5416 5417 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR, 5418 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5419 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5420 reload_inc[reloadnum] 5421 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0)); 5422 5423 link = FIND_REG_INC_NOTE (this_insn, tem); 5424 if (link != 0) 5425 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); 5426 5427 return 1; 5428 } 5429 return 0; 5430 5431 case MEM: 5432 /* This is probably the result of a substitution, by eliminate_regs, of 5433 an equivalent address for a pseudo that was not allocated to a hard 5434 register. Verify that the specified address is valid and reload it 5435 into a register. 5436 5437 Since we know we are going to reload this item, don't decrement for 5438 the indirection level. 5439 5440 Note that this is actually conservative: it would be slightly more 5441 efficient to use the value of SPILL_INDIRECT_LEVELS from 5442 reload1.c here. */ 5443 5444 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0), 5445 opnum, ADDR_TYPE (type), ind_levels, insn); 5446 push_reload (*loc, NULL_RTX, loc, NULL_PTR, 5447 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5448 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5449 return 1; 5450 5451 case REG: 5452 { 5453 register int regno = REGNO (x); 5454 5455 if (reg_equiv_constant[regno] != 0) 5456 { 5457 find_reloads_address_part (reg_equiv_constant[regno], loc, 5458 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5459 GET_MODE (x), opnum, type, ind_levels); 5460 return 1; 5461 } 5462 5463#if 0 /* This might screw code in reload1.c to delete prior output-reload 5464 that feeds this insn. */ 5465 if (reg_equiv_mem[regno] != 0) 5466 { 5467 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR, 5468 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5469 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5470 return 1; 5471 } 5472#endif 5473 5474 if (reg_equiv_memory_loc[regno] 5475 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 5476 { 5477 rtx tem = make_memloc (x, regno); 5478 if (reg_equiv_address[regno] != 0 5479 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5480 { 5481 x = tem; 5482 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), 5483 &XEXP (x, 0), opnum, ADDR_TYPE (type), 5484 ind_levels, insn); 5485 } 5486 } 5487 5488 if (reg_renumber[regno] >= 0) 5489 regno = reg_renumber[regno]; 5490 5491 if ((regno >= FIRST_PSEUDO_REGISTER 5492 || !(context ? REGNO_OK_FOR_INDEX_P (regno) 5493 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))) 5494 { 5495 push_reload (x, NULL_RTX, loc, NULL_PTR, 5496 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5497 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5498 return 1; 5499 } 5500 5501 /* If a register appearing in an address is the subject of a CLOBBER 5502 in this insn, reload it into some other register to be safe. 5503 The CLOBBER is supposed to make the register unavailable 5504 from before this insn to after it. */ 5505 if (regno_clobbered_p (regno, this_insn)) 5506 { 5507 push_reload (x, NULL_RTX, loc, NULL_PTR, 5508 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5509 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5510 return 1; 5511 } 5512 } 5513 return 0; 5514 5515 case SUBREG: 5516 if (GET_CODE (SUBREG_REG (x)) == REG) 5517 { 5518 /* If this is a SUBREG of a hard register and the resulting register 5519 is of the wrong class, reload the whole SUBREG. This avoids 5520 needless copies if SUBREG_REG is multi-word. */ 5521 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) 5522 { 5523 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x); 5524 5525 if (! (context ? REGNO_OK_FOR_INDEX_P (regno) 5526 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))) 5527 { 5528 push_reload (x, NULL_RTX, loc, NULL_PTR, 5529 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5530 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5531 return 1; 5532 } 5533 } 5534 /* If this is a SUBREG of a pseudo-register, and the pseudo-register 5535 is larger than the class size, then reload the whole SUBREG. */ 5536 else 5537 { 5538 enum reg_class class = (context ? INDEX_REG_CLASS 5539 : BASE_REG_CLASS); 5540 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x))) 5541 > reg_class_size[class]) 5542 { 5543 x = find_reloads_subreg_address (x, 0, opnum, type, 5544 ind_levels, insn); 5545 push_reload (x, NULL_RTX, loc, NULL_PTR, class, 5546 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5547 return 1; 5548 } 5549 } 5550 } 5551 break; 5552 5553 default: 5554 break; 5555 } 5556 5557 { 5558 register char *fmt = GET_RTX_FORMAT (code); 5559 register int i; 5560 5561 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5562 { 5563 if (fmt[i] == 'e') 5564 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i), 5565 opnum, type, ind_levels, insn); 5566 } 5567 } 5568 5569 return 0; 5570} 5571 5572/* X, which is found at *LOC, is a part of an address that needs to be 5573 reloaded into a register of class CLASS. If X is a constant, or if 5574 X is a PLUS that contains a constant, check that the constant is a 5575 legitimate operand and that we are supposed to be able to load 5576 it into the register. 5577 5578 If not, force the constant into memory and reload the MEM instead. 5579 5580 MODE is the mode to use, in case X is an integer constant. 5581 5582 OPNUM and TYPE describe the purpose of any reloads made. 5583 5584 IND_LEVELS says how many levels of indirect addressing this machine 5585 supports. */ 5586 5587static void 5588find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels) 5589 rtx x; 5590 rtx *loc; 5591 enum reg_class class; 5592 enum machine_mode mode; 5593 int opnum; 5594 enum reload_type type; 5595 int ind_levels; 5596{ 5597 if (CONSTANT_P (x) 5598 && (! LEGITIMATE_CONSTANT_P (x) 5599 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS)) 5600 { 5601 rtx tem; 5602 5603 /* If this is a CONST_INT, it could have been created by a 5604 plus_constant call in eliminate_regs, which means it may be 5605 on the reload_obstack. reload_obstack will be freed later, so 5606 we can't allow such RTL to be put in the constant pool. There 5607 is code in force_const_mem to check for this case, but it doesn't 5608 work because we have already popped off the reload_obstack, so 5609 rtl_obstack == saveable_obstack is true at this point. */ 5610 if (GET_CODE (x) == CONST_INT) 5611 tem = x = force_const_mem (mode, GEN_INT (INTVAL (x))); 5612 else 5613 tem = x = force_const_mem (mode, x); 5614 5615 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0), 5616 opnum, type, ind_levels, 0); 5617 } 5618 5619 else if (GET_CODE (x) == PLUS 5620 && CONSTANT_P (XEXP (x, 1)) 5621 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1)) 5622 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS)) 5623 { 5624 rtx tem; 5625 5626 /* See comment above. */ 5627 if (GET_CODE (XEXP (x, 1)) == CONST_INT) 5628 tem = force_const_mem (GET_MODE (x), GEN_INT (INTVAL (XEXP (x, 1)))); 5629 else 5630 tem = force_const_mem (GET_MODE (x), XEXP (x, 1)); 5631 5632 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem); 5633 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0), 5634 opnum, type, ind_levels, 0); 5635 } 5636 5637 push_reload (x, NULL_RTX, loc, NULL_PTR, class, 5638 mode, VOIDmode, 0, 0, opnum, type); 5639} 5640 5641/* X, a subreg of a pseudo, is a part of an address that needs to be 5642 reloaded. 5643 5644 If the pseudo is equivalent to a memory location that cannot be directly 5645 addressed, make the necessary address reloads. 5646 5647 If address reloads have been necessary, or if the address is changed 5648 by register elimination, return the rtx of the memory location; 5649 otherwise, return X. 5650 5651 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the 5652 memory location. 5653 5654 OPNUM and TYPE identify the purpose of the reload. 5655 5656 IND_LEVELS says how many levels of indirect addressing are 5657 supported at this point in the address. 5658 5659 INSN, if nonzero, is the insn in which we do the reload. It is used 5660 to determine where to put USEs for pseudos that we have to replace with 5661 stack slots. */ 5662 5663static rtx 5664find_reloads_subreg_address (x, force_replace, opnum, type, 5665 ind_levels, insn) 5666 rtx x; 5667 int force_replace; 5668 int opnum; 5669 enum reload_type type; 5670 int ind_levels; 5671 rtx insn; 5672{ 5673 int regno = REGNO (SUBREG_REG (x)); 5674 5675 if (reg_equiv_memory_loc[regno]) 5676 { 5677 /* If the address is not directly addressable, or if the address is not 5678 offsettable, then it must be replaced. */ 5679 if (! force_replace 5680 && (reg_equiv_address[regno] 5681 || ! offsettable_memref_p (reg_equiv_mem[regno]))) 5682 force_replace = 1; 5683 5684 if (force_replace || num_not_at_initial_offset) 5685 { 5686 rtx tem = make_memloc (SUBREG_REG (x), regno); 5687 5688 /* If the address changes because of register elimination, then 5689 it must be replaced. */ 5690 if (force_replace 5691 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5692 { 5693 int offset = SUBREG_WORD (x) * UNITS_PER_WORD; 5694 5695 if (BYTES_BIG_ENDIAN) 5696 { 5697 int size; 5698 5699 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))); 5700 offset += MIN (size, UNITS_PER_WORD); 5701 size = GET_MODE_SIZE (GET_MODE (x)); 5702 offset -= MIN (size, UNITS_PER_WORD); 5703 } 5704 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset); 5705 PUT_MODE (tem, GET_MODE (x)); 5706 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), 5707 &XEXP (tem, 0), opnum, ADDR_TYPE (type), 5708 ind_levels, insn); 5709 /* If this is not a toplevel operand, find_reloads doesn't see 5710 this substitution. We have to emit a USE of the pseudo so 5711 that delete_output_reload can see it. */ 5712 if (replace_reloads && recog_operand[opnum] != x) 5713 emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn); 5714 x = tem; 5715 } 5716 } 5717 } 5718 return x; 5719} 5720 5721/* Substitute into the current INSN the registers into which we have reloaded 5722 the things that need reloading. The array `replacements' 5723 says contains the locations of all pointers that must be changed 5724 and says what to replace them with. 5725 5726 Return the rtx that X translates into; usually X, but modified. */ 5727 5728void 5729subst_reloads () 5730{ 5731 register int i; 5732 5733 for (i = 0; i < n_replacements; i++) 5734 { 5735 register struct replacement *r = &replacements[i]; 5736 register rtx reloadreg = reload_reg_rtx[r->what]; 5737 if (reloadreg) 5738 { 5739 /* Encapsulate RELOADREG so its machine mode matches what 5740 used to be there. Note that gen_lowpart_common will 5741 do the wrong thing if RELOADREG is multi-word. RELOADREG 5742 will always be a REG here. */ 5743 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode) 5744 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg)); 5745 5746 /* If we are putting this into a SUBREG and RELOADREG is a 5747 SUBREG, we would be making nested SUBREGs, so we have to fix 5748 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */ 5749 5750 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG) 5751 { 5752 if (GET_MODE (*r->subreg_loc) 5753 == GET_MODE (SUBREG_REG (reloadreg))) 5754 *r->subreg_loc = SUBREG_REG (reloadreg); 5755 else 5756 { 5757 *r->where = SUBREG_REG (reloadreg); 5758 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg); 5759 } 5760 } 5761 else 5762 *r->where = reloadreg; 5763 } 5764 /* If reload got no reg and isn't optional, something's wrong. */ 5765 else if (! reload_optional[r->what]) 5766 abort (); 5767 } 5768} 5769 5770/* Make a copy of any replacements being done into X and move those copies 5771 to locations in Y, a copy of X. We only look at the highest level of 5772 the RTL. */ 5773 5774void 5775copy_replacements (x, y) 5776 rtx x; 5777 rtx y; 5778{ 5779 int i, j; 5780 enum rtx_code code = GET_CODE (x); 5781 char *fmt = GET_RTX_FORMAT (code); 5782 struct replacement *r; 5783 5784 /* We can't support X being a SUBREG because we might then need to know its 5785 location if something inside it was replaced. */ 5786 if (code == SUBREG) 5787 abort (); 5788 5789 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5790 if (fmt[i] == 'e') 5791 for (j = 0; j < n_replacements; j++) 5792 { 5793 if (replacements[j].subreg_loc == &XEXP (x, i)) 5794 { 5795 r = &replacements[n_replacements++]; 5796 r->where = replacements[j].where; 5797 r->subreg_loc = &XEXP (y, i); 5798 r->what = replacements[j].what; 5799 r->mode = replacements[j].mode; 5800 } 5801 else if (replacements[j].where == &XEXP (x, i)) 5802 { 5803 r = &replacements[n_replacements++]; 5804 r->where = &XEXP (y, i); 5805 r->subreg_loc = 0; 5806 r->what = replacements[j].what; 5807 r->mode = replacements[j].mode; 5808 } 5809 } 5810} 5811 5812/* Change any replacements being done to *X to be done to *Y */ 5813 5814void 5815move_replacements (x, y) 5816 rtx *x; 5817 rtx *y; 5818{ 5819 int i; 5820 5821 for (i = 0; i < n_replacements; i++) 5822 if (replacements[i].subreg_loc == x) 5823 replacements[i].subreg_loc = y; 5824 else if (replacements[i].where == x) 5825 { 5826 replacements[i].where = y; 5827 replacements[i].subreg_loc = 0; 5828 } 5829} 5830 5831/* If LOC was scheduled to be replaced by something, return the replacement. 5832 Otherwise, return *LOC. */ 5833 5834rtx 5835find_replacement (loc) 5836 rtx *loc; 5837{ 5838 struct replacement *r; 5839 5840 for (r = &replacements[0]; r < &replacements[n_replacements]; r++) 5841 { 5842 rtx reloadreg = reload_reg_rtx[r->what]; 5843 5844 if (reloadreg && r->where == loc) 5845 { 5846 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode) 5847 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg)); 5848 5849 return reloadreg; 5850 } 5851 else if (reloadreg && r->subreg_loc == loc) 5852 { 5853 /* RELOADREG must be either a REG or a SUBREG. 5854 5855 ??? Is it actually still ever a SUBREG? If so, why? */ 5856 5857 if (GET_CODE (reloadreg) == REG) 5858 return gen_rtx_REG (GET_MODE (*loc), 5859 REGNO (reloadreg) + SUBREG_WORD (*loc)); 5860 else if (GET_MODE (reloadreg) == GET_MODE (*loc)) 5861 return reloadreg; 5862 else 5863 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg), 5864 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc)); 5865 } 5866 } 5867 5868 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for 5869 what's inside and make a new rtl if so. */ 5870 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS 5871 || GET_CODE (*loc) == MULT) 5872 { 5873 rtx x = find_replacement (&XEXP (*loc, 0)); 5874 rtx y = find_replacement (&XEXP (*loc, 1)); 5875 5876 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1)) 5877 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y); 5878 } 5879 5880 return *loc; 5881} 5882 5883/* Return nonzero if register in range [REGNO, ENDREGNO) 5884 appears either explicitly or implicitly in X 5885 other than being stored into (except for earlyclobber operands). 5886 5887 References contained within the substructure at LOC do not count. 5888 LOC may be zero, meaning don't ignore anything. 5889 5890 This is similar to refers_to_regno_p in rtlanal.c except that we 5891 look at equivalences for pseudos that didn't get hard registers. */ 5892 5893int 5894refers_to_regno_for_reload_p (regno, endregno, x, loc) 5895 int regno, endregno; 5896 rtx x; 5897 rtx *loc; 5898{ 5899 register int i; 5900 register RTX_CODE code; 5901 register char *fmt; 5902 5903 if (x == 0) 5904 return 0; 5905 5906 repeat: 5907 code = GET_CODE (x); 5908 5909 switch (code) 5910 { 5911 case REG: 5912 i = REGNO (x); 5913 5914 /* If this is a pseudo, a hard register must not have been allocated. 5915 X must therefore either be a constant or be in memory. */ 5916 if (i >= FIRST_PSEUDO_REGISTER) 5917 { 5918 if (reg_equiv_memory_loc[i]) 5919 return refers_to_regno_for_reload_p (regno, endregno, 5920 reg_equiv_memory_loc[i], 5921 NULL_PTR); 5922 5923 if (reg_equiv_constant[i]) 5924 return 0; 5925 5926 abort (); 5927 } 5928 5929 return (endregno > i 5930 && regno < i + (i < FIRST_PSEUDO_REGISTER 5931 ? HARD_REGNO_NREGS (i, GET_MODE (x)) 5932 : 1)); 5933 5934 case SUBREG: 5935 /* If this is a SUBREG of a hard reg, we can see exactly which 5936 registers are being modified. Otherwise, handle normally. */ 5937 if (GET_CODE (SUBREG_REG (x)) == REG 5938 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) 5939 { 5940 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x); 5941 int inner_endregno 5942 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER 5943 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 5944 5945 return endregno > inner_regno && regno < inner_endregno; 5946 } 5947 break; 5948 5949 case CLOBBER: 5950 case SET: 5951 if (&SET_DEST (x) != loc 5952 /* Note setting a SUBREG counts as referring to the REG it is in for 5953 a pseudo but not for hard registers since we can 5954 treat each word individually. */ 5955 && ((GET_CODE (SET_DEST (x)) == SUBREG 5956 && loc != &SUBREG_REG (SET_DEST (x)) 5957 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG 5958 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER 5959 && refers_to_regno_for_reload_p (regno, endregno, 5960 SUBREG_REG (SET_DEST (x)), 5961 loc)) 5962 /* If the output is an earlyclobber operand, this is 5963 a conflict. */ 5964 || ((GET_CODE (SET_DEST (x)) != REG 5965 || earlyclobber_operand_p (SET_DEST (x))) 5966 && refers_to_regno_for_reload_p (regno, endregno, 5967 SET_DEST (x), loc)))) 5968 return 1; 5969 5970 if (code == CLOBBER || loc == &SET_SRC (x)) 5971 return 0; 5972 x = SET_SRC (x); 5973 goto repeat; 5974 5975 default: 5976 break; 5977 } 5978 5979 /* X does not match, so try its subexpressions. */ 5980 5981 fmt = GET_RTX_FORMAT (code); 5982 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5983 { 5984 if (fmt[i] == 'e' && loc != &XEXP (x, i)) 5985 { 5986 if (i == 0) 5987 { 5988 x = XEXP (x, 0); 5989 goto repeat; 5990 } 5991 else 5992 if (refers_to_regno_for_reload_p (regno, endregno, 5993 XEXP (x, i), loc)) 5994 return 1; 5995 } 5996 else if (fmt[i] == 'E') 5997 { 5998 register int j; 5999 for (j = XVECLEN (x, i) - 1; j >=0; j--) 6000 if (loc != &XVECEXP (x, i, j) 6001 && refers_to_regno_for_reload_p (regno, endregno, 6002 XVECEXP (x, i, j), loc)) 6003 return 1; 6004 } 6005 } 6006 return 0; 6007} 6008 6009/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG, 6010 we check if any register number in X conflicts with the relevant register 6011 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN 6012 contains a MEM (we don't bother checking for memory addresses that can't 6013 conflict because we expect this to be a rare case. 6014 6015 This function is similar to reg_overlap_mention_p in rtlanal.c except 6016 that we look at equivalences for pseudos that didn't get hard registers. */ 6017 6018int 6019reg_overlap_mentioned_for_reload_p (x, in) 6020 rtx x, in; 6021{ 6022 int regno, endregno; 6023 6024 /* Overly conservative. */ 6025 if (GET_CODE (x) == STRICT_LOW_PART) 6026 x = XEXP (x, 0); 6027 6028 /* If either argument is a constant, then modifying X can not affect IN. */ 6029 if (CONSTANT_P (x) || CONSTANT_P (in)) 6030 return 0; 6031 else if (GET_CODE (x) == SUBREG) 6032 { 6033 regno = REGNO (SUBREG_REG (x)); 6034 if (regno < FIRST_PSEUDO_REGISTER) 6035 regno += SUBREG_WORD (x); 6036 } 6037 else if (GET_CODE (x) == REG) 6038 { 6039 regno = REGNO (x); 6040 6041 /* If this is a pseudo, it must not have been assigned a hard register. 6042 Therefore, it must either be in memory or be a constant. */ 6043 6044 if (regno >= FIRST_PSEUDO_REGISTER) 6045 { 6046 if (reg_equiv_memory_loc[regno]) 6047 return refers_to_mem_for_reload_p (in); 6048 else if (reg_equiv_constant[regno]) 6049 return 0; 6050 abort (); 6051 } 6052 } 6053 else if (GET_CODE (x) == MEM) 6054 return refers_to_mem_for_reload_p (in); 6055 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC 6056 || GET_CODE (x) == CC0) 6057 return reg_mentioned_p (x, in); 6058 else 6059 abort (); 6060 6061 endregno = regno + (regno < FIRST_PSEUDO_REGISTER 6062 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 6063 6064 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR); 6065} 6066 6067/* Return nonzero if anything in X contains a MEM. Look also for pseudo 6068 registers. */ 6069 6070int 6071refers_to_mem_for_reload_p (x) 6072 rtx x; 6073{ 6074 char *fmt; 6075 int i; 6076 6077 if (GET_CODE (x) == MEM) 6078 return 1; 6079 6080 if (GET_CODE (x) == REG) 6081 return (REGNO (x) >= FIRST_PSEUDO_REGISTER 6082 && reg_equiv_memory_loc[REGNO (x)]); 6083 6084 fmt = GET_RTX_FORMAT (GET_CODE (x)); 6085 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) 6086 if (fmt[i] == 'e' 6087 && (GET_CODE (XEXP (x, i)) == MEM 6088 || refers_to_mem_for_reload_p (XEXP (x, i)))) 6089 return 1; 6090 6091 return 0; 6092} 6093 6094/* Check the insns before INSN to see if there is a suitable register 6095 containing the same value as GOAL. 6096 If OTHER is -1, look for a register in class CLASS. 6097 Otherwise, just see if register number OTHER shares GOAL's value. 6098 6099 Return an rtx for the register found, or zero if none is found. 6100 6101 If RELOAD_REG_P is (short *)1, 6102 we reject any hard reg that appears in reload_reg_rtx 6103 because such a hard reg is also needed coming into this insn. 6104 6105 If RELOAD_REG_P is any other nonzero value, 6106 it is a vector indexed by hard reg number 6107 and we reject any hard reg whose element in the vector is nonnegative 6108 as well as any that appears in reload_reg_rtx. 6109 6110 If GOAL is zero, then GOALREG is a register number; we look 6111 for an equivalent for that register. 6112 6113 MODE is the machine mode of the value we want an equivalence for. 6114 If GOAL is nonzero and not VOIDmode, then it must have mode MODE. 6115 6116 This function is used by jump.c as well as in the reload pass. 6117 6118 If GOAL is the sum of the stack pointer and a constant, we treat it 6119 as if it were a constant except that sp is required to be unchanging. */ 6120 6121rtx 6122find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode) 6123 register rtx goal; 6124 rtx insn; 6125 enum reg_class class; 6126 register int other; 6127 short *reload_reg_p; 6128 int goalreg; 6129 enum machine_mode mode; 6130{ 6131 register rtx p = insn; 6132 rtx goaltry, valtry, value, where; 6133 register rtx pat; 6134 register int regno = -1; 6135 int valueno; 6136 int goal_mem = 0; 6137 int goal_const = 0; 6138 int goal_mem_addr_varies = 0; 6139 int need_stable_sp = 0; 6140 int nregs; 6141 int valuenregs; 6142 6143 if (goal == 0) 6144 regno = goalreg; 6145 else if (GET_CODE (goal) == REG) 6146 regno = REGNO (goal); 6147 else if (GET_CODE (goal) == MEM) 6148 { 6149 enum rtx_code code = GET_CODE (XEXP (goal, 0)); 6150 if (MEM_VOLATILE_P (goal)) 6151 return 0; 6152 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT) 6153 return 0; 6154 /* An address with side effects must be reexecuted. */ 6155 switch (code) 6156 { 6157 case POST_INC: 6158 case PRE_INC: 6159 case POST_DEC: 6160 case PRE_DEC: 6161 return 0; 6162 default: 6163 break; 6164 } 6165 goal_mem = 1; 6166 } 6167 else if (CONSTANT_P (goal)) 6168 goal_const = 1; 6169 else if (GET_CODE (goal) == PLUS 6170 && XEXP (goal, 0) == stack_pointer_rtx 6171 && CONSTANT_P (XEXP (goal, 1))) 6172 goal_const = need_stable_sp = 1; 6173 else if (GET_CODE (goal) == PLUS 6174 && XEXP (goal, 0) == frame_pointer_rtx 6175 && CONSTANT_P (XEXP (goal, 1))) 6176 goal_const = 1; 6177 else 6178 return 0; 6179 6180 /* On some machines, certain regs must always be rejected 6181 because they don't behave the way ordinary registers do. */ 6182 6183#ifdef OVERLAPPING_REGNO_P 6184 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER 6185 && OVERLAPPING_REGNO_P (regno)) 6186 return 0; 6187#endif 6188 6189 /* Scan insns back from INSN, looking for one that copies 6190 a value into or out of GOAL. 6191 Stop and give up if we reach a label. */ 6192 6193 while (1) 6194 { 6195 p = PREV_INSN (p); 6196 if (p == 0 || GET_CODE (p) == CODE_LABEL) 6197 return 0; 6198 if (GET_CODE (p) == INSN 6199 /* If we don't want spill regs ... */ 6200 && (! (reload_reg_p != 0 6201 && reload_reg_p != (short *) (HOST_WIDE_INT) 1) 6202 /* ... then ignore insns introduced by reload; they aren't useful 6203 and can cause results in reload_as_needed to be different 6204 from what they were when calculating the need for spills. 6205 If we notice an input-reload insn here, we will reject it below, 6206 but it might hide a usable equivalent. That makes bad code. 6207 It may even abort: perhaps no reg was spilled for this insn 6208 because it was assumed we would find that equivalent. */ 6209 || INSN_UID (p) < reload_first_uid)) 6210 { 6211 rtx tem; 6212 pat = single_set (p); 6213 /* First check for something that sets some reg equal to GOAL. */ 6214 if (pat != 0 6215 && ((regno >= 0 6216 && true_regnum (SET_SRC (pat)) == regno 6217 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 6218 || 6219 (regno >= 0 6220 && true_regnum (SET_DEST (pat)) == regno 6221 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0) 6222 || 6223 (goal_const && rtx_equal_p (SET_SRC (pat), goal) 6224 /* When looking for stack pointer + const, 6225 make sure we don't use a stack adjust. */ 6226 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal) 6227 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 6228 || (goal_mem 6229 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0 6230 && rtx_renumbered_equal_p (goal, SET_SRC (pat))) 6231 || (goal_mem 6232 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0 6233 && rtx_renumbered_equal_p (goal, SET_DEST (pat))) 6234 /* If we are looking for a constant, 6235 and something equivalent to that constant was copied 6236 into a reg, we can use that reg. */ 6237 || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 6238 NULL_RTX)) 6239 && rtx_equal_p (XEXP (tem, 0), goal) 6240 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 6241 || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 6242 NULL_RTX)) 6243 && GET_CODE (SET_DEST (pat)) == REG 6244 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE 6245 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT 6246 && GET_CODE (goal) == CONST_INT 6247 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0, 6248 VOIDmode)) 6249 && rtx_equal_p (goal, goaltry) 6250 && (valtry = operand_subword (SET_DEST (pat), 0, 0, 6251 VOIDmode)) 6252 && (valueno = true_regnum (valtry)) >= 0) 6253 || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 6254 NULL_RTX)) 6255 && GET_CODE (SET_DEST (pat)) == REG 6256 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE 6257 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT 6258 && GET_CODE (goal) == CONST_INT 6259 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0, 6260 VOIDmode)) 6261 && rtx_equal_p (goal, goaltry) 6262 && (valtry 6263 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode)) 6264 && (valueno = true_regnum (valtry)) >= 0))) 6265 if (other >= 0 6266 ? valueno == other 6267 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER 6268 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], 6269 valueno))) 6270 { 6271 value = valtry; 6272 where = p; 6273 break; 6274 } 6275 } 6276 } 6277 6278 /* We found a previous insn copying GOAL into a suitable other reg VALUE 6279 (or copying VALUE into GOAL, if GOAL is also a register). 6280 Now verify that VALUE is really valid. */ 6281 6282 /* VALUENO is the register number of VALUE; a hard register. */ 6283 6284 /* Don't try to re-use something that is killed in this insn. We want 6285 to be able to trust REG_UNUSED notes. */ 6286 if (find_reg_note (where, REG_UNUSED, value)) 6287 return 0; 6288 6289 /* If we propose to get the value from the stack pointer or if GOAL is 6290 a MEM based on the stack pointer, we need a stable SP. */ 6291 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM 6292 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx, 6293 goal))) 6294 need_stable_sp = 1; 6295 6296 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */ 6297 if (GET_MODE (value) != mode) 6298 return 0; 6299 6300 /* Reject VALUE if it was loaded from GOAL 6301 and is also a register that appears in the address of GOAL. */ 6302 6303 if (goal_mem && value == SET_DEST (single_set (where)) 6304 && refers_to_regno_for_reload_p (valueno, 6305 (valueno 6306 + HARD_REGNO_NREGS (valueno, mode)), 6307 goal, NULL_PTR)) 6308 return 0; 6309 6310 /* Reject registers that overlap GOAL. */ 6311 6312 if (!goal_mem && !goal_const 6313 && regno + HARD_REGNO_NREGS (regno, mode) > valueno 6314 && regno < valueno + HARD_REGNO_NREGS (valueno, mode)) 6315 return 0; 6316 6317 /* Reject VALUE if it is one of the regs reserved for reloads. 6318 Reload1 knows how to reuse them anyway, and it would get 6319 confused if we allocated one without its knowledge. 6320 (Now that insns introduced by reload are ignored above, 6321 this case shouldn't happen, but I'm not positive.) */ 6322 6323 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1 6324 && reload_reg_p[valueno] >= 0) 6325 return 0; 6326 6327 /* On some machines, certain regs must always be rejected 6328 because they don't behave the way ordinary registers do. */ 6329 6330#ifdef OVERLAPPING_REGNO_P 6331 if (OVERLAPPING_REGNO_P (valueno)) 6332 return 0; 6333#endif 6334 6335 nregs = HARD_REGNO_NREGS (regno, mode); 6336 valuenregs = HARD_REGNO_NREGS (valueno, mode); 6337 6338 /* Reject VALUE if it is a register being used for an input reload 6339 even if it is not one of those reserved. */ 6340 6341 if (reload_reg_p != 0) 6342 { 6343 int i; 6344 for (i = 0; i < n_reloads; i++) 6345 if (reload_reg_rtx[i] != 0 && reload_in[i]) 6346 { 6347 int regno1 = REGNO (reload_reg_rtx[i]); 6348 int nregs1 = HARD_REGNO_NREGS (regno1, 6349 GET_MODE (reload_reg_rtx[i])); 6350 if (regno1 < valueno + valuenregs 6351 && regno1 + nregs1 > valueno) 6352 return 0; 6353 } 6354 } 6355 6356 if (goal_mem) 6357 /* We must treat frame pointer as varying here, 6358 since it can vary--in a nonlocal goto as generated by expand_goto. */ 6359 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0)); 6360 6361 /* Now verify that the values of GOAL and VALUE remain unaltered 6362 until INSN is reached. */ 6363 6364 p = insn; 6365 while (1) 6366 { 6367 p = PREV_INSN (p); 6368 if (p == where) 6369 return value; 6370 6371 /* Don't trust the conversion past a function call 6372 if either of the two is in a call-clobbered register, or memory. */ 6373 if (GET_CODE (p) == CALL_INSN 6374 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER 6375 && call_used_regs[regno]) 6376 || 6377 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER 6378 && call_used_regs[valueno]) 6379 || 6380 goal_mem 6381 || need_stable_sp)) 6382 return 0; 6383 6384#ifdef NON_SAVING_SETJMP 6385 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE 6386 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP) 6387 return 0; 6388#endif 6389 6390#ifdef INSN_CLOBBERS_REGNO_P 6391 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER 6392 && INSN_CLOBBERS_REGNO_P (p, valueno)) 6393 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER 6394 && INSN_CLOBBERS_REGNO_P (p, regno))) 6395 return 0; 6396#endif 6397 6398 if (GET_RTX_CLASS (GET_CODE (p)) == 'i') 6399 { 6400 pat = PATTERN (p); 6401 6402 /* Watch out for unspec_volatile, and volatile asms. */ 6403 if (volatile_insn_p (pat)) 6404 return 0; 6405 6406 /* If this insn P stores in either GOAL or VALUE, return 0. 6407 If GOAL is a memory ref and this insn writes memory, return 0. 6408 If GOAL is a memory ref and its address is not constant, 6409 and this insn P changes a register used in GOAL, return 0. */ 6410 6411 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER) 6412 { 6413 register rtx dest = SET_DEST (pat); 6414 while (GET_CODE (dest) == SUBREG 6415 || GET_CODE (dest) == ZERO_EXTRACT 6416 || GET_CODE (dest) == SIGN_EXTRACT 6417 || GET_CODE (dest) == STRICT_LOW_PART) 6418 dest = XEXP (dest, 0); 6419 if (GET_CODE (dest) == REG) 6420 { 6421 register int xregno = REGNO (dest); 6422 int xnregs; 6423 if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 6424 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6425 else 6426 xnregs = 1; 6427 if (xregno < regno + nregs && xregno + xnregs > regno) 6428 return 0; 6429 if (xregno < valueno + valuenregs 6430 && xregno + xnregs > valueno) 6431 return 0; 6432 if (goal_mem_addr_varies 6433 && reg_overlap_mentioned_for_reload_p (dest, goal)) 6434 return 0; 6435 if (xregno == STACK_POINTER_REGNUM && need_stable_sp) 6436 return 0; 6437 } 6438 else if (goal_mem && GET_CODE (dest) == MEM 6439 && ! push_operand (dest, GET_MODE (dest))) 6440 return 0; 6441 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER 6442 && reg_equiv_memory_loc[regno] != 0) 6443 return 0; 6444 else if (need_stable_sp && push_operand (dest, GET_MODE (dest))) 6445 return 0; 6446 } 6447 else if (GET_CODE (pat) == PARALLEL) 6448 { 6449 register int i; 6450 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--) 6451 { 6452 register rtx v1 = XVECEXP (pat, 0, i); 6453 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER) 6454 { 6455 register rtx dest = SET_DEST (v1); 6456 while (GET_CODE (dest) == SUBREG 6457 || GET_CODE (dest) == ZERO_EXTRACT 6458 || GET_CODE (dest) == SIGN_EXTRACT 6459 || GET_CODE (dest) == STRICT_LOW_PART) 6460 dest = XEXP (dest, 0); 6461 if (GET_CODE (dest) == REG) 6462 { 6463 register int xregno = REGNO (dest); 6464 int xnregs; 6465 if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 6466 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6467 else 6468 xnregs = 1; 6469 if (xregno < regno + nregs 6470 && xregno + xnregs > regno) 6471 return 0; 6472 if (xregno < valueno + valuenregs 6473 && xregno + xnregs > valueno) 6474 return 0; 6475 if (goal_mem_addr_varies 6476 && reg_overlap_mentioned_for_reload_p (dest, 6477 goal)) 6478 return 0; 6479 if (xregno == STACK_POINTER_REGNUM && need_stable_sp) 6480 return 0; 6481 } 6482 else if (goal_mem && GET_CODE (dest) == MEM 6483 && ! push_operand (dest, GET_MODE (dest))) 6484 return 0; 6485 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER 6486 && reg_equiv_memory_loc[regno] != 0) 6487 return 0; 6488 else if (need_stable_sp 6489 && push_operand (dest, GET_MODE (dest))) 6490 return 0; 6491 } 6492 } 6493 } 6494 6495 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p)) 6496 { 6497 rtx link; 6498 6499 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0; 6500 link = XEXP (link, 1)) 6501 { 6502 pat = XEXP (link, 0); 6503 if (GET_CODE (pat) == CLOBBER) 6504 { 6505 register rtx dest = SET_DEST (pat); 6506 while (GET_CODE (dest) == SUBREG 6507 || GET_CODE (dest) == ZERO_EXTRACT 6508 || GET_CODE (dest) == SIGN_EXTRACT 6509 || GET_CODE (dest) == STRICT_LOW_PART) 6510 dest = XEXP (dest, 0); 6511 if (GET_CODE (dest) == REG) 6512 { 6513 register int xregno = REGNO (dest); 6514 int xnregs; 6515 if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 6516 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6517 else 6518 xnregs = 1; 6519 if (xregno < regno + nregs 6520 && xregno + xnregs > regno) 6521 return 0; 6522 if (xregno < valueno + valuenregs 6523 && xregno + xnregs > valueno) 6524 return 0; 6525 if (goal_mem_addr_varies 6526 && reg_overlap_mentioned_for_reload_p (dest, 6527 goal)) 6528 return 0; 6529 } 6530 else if (goal_mem && GET_CODE (dest) == MEM 6531 && ! push_operand (dest, GET_MODE (dest))) 6532 return 0; 6533 else if (need_stable_sp 6534 && push_operand (dest, GET_MODE (dest))) 6535 return 0; 6536 } 6537 } 6538 } 6539 6540#ifdef AUTO_INC_DEC 6541 /* If this insn auto-increments or auto-decrements 6542 either regno or valueno, return 0 now. 6543 If GOAL is a memory ref and its address is not constant, 6544 and this insn P increments a register used in GOAL, return 0. */ 6545 { 6546 register rtx link; 6547 6548 for (link = REG_NOTES (p); link; link = XEXP (link, 1)) 6549 if (REG_NOTE_KIND (link) == REG_INC 6550 && GET_CODE (XEXP (link, 0)) == REG) 6551 { 6552 register int incno = REGNO (XEXP (link, 0)); 6553 if (incno < regno + nregs && incno >= regno) 6554 return 0; 6555 if (incno < valueno + valuenregs && incno >= valueno) 6556 return 0; 6557 if (goal_mem_addr_varies 6558 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0), 6559 goal)) 6560 return 0; 6561 } 6562 } 6563#endif 6564 } 6565 } 6566} 6567 6568/* Find a place where INCED appears in an increment or decrement operator 6569 within X, and return the amount INCED is incremented or decremented by. 6570 The value is always positive. */ 6571 6572static int 6573find_inc_amount (x, inced) 6574 rtx x, inced; 6575{ 6576 register enum rtx_code code = GET_CODE (x); 6577 register char *fmt; 6578 register int i; 6579 6580 if (code == MEM) 6581 { 6582 register rtx addr = XEXP (x, 0); 6583 if ((GET_CODE (addr) == PRE_DEC 6584 || GET_CODE (addr) == POST_DEC 6585 || GET_CODE (addr) == PRE_INC 6586 || GET_CODE (addr) == POST_INC) 6587 && XEXP (addr, 0) == inced) 6588 return GET_MODE_SIZE (GET_MODE (x)); 6589 } 6590 6591 fmt = GET_RTX_FORMAT (code); 6592 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 6593 { 6594 if (fmt[i] == 'e') 6595 { 6596 register int tem = find_inc_amount (XEXP (x, i), inced); 6597 if (tem != 0) 6598 return tem; 6599 } 6600 if (fmt[i] == 'E') 6601 { 6602 register int j; 6603 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 6604 { 6605 register int tem = find_inc_amount (XVECEXP (x, i, j), inced); 6606 if (tem != 0) 6607 return tem; 6608 } 6609 } 6610 } 6611 6612 return 0; 6613} 6614 6615/* Return 1 if register REGNO is the subject of a clobber in insn INSN. */ 6616 6617int 6618regno_clobbered_p (regno, insn) 6619 int regno; 6620 rtx insn; 6621{ 6622 if (GET_CODE (PATTERN (insn)) == CLOBBER 6623 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG) 6624 return REGNO (XEXP (PATTERN (insn), 0)) == regno; 6625 6626 if (GET_CODE (PATTERN (insn)) == PARALLEL) 6627 { 6628 int i = XVECLEN (PATTERN (insn), 0) - 1; 6629 6630 for (; i >= 0; i--) 6631 { 6632 rtx elt = XVECEXP (PATTERN (insn), 0, i); 6633 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG 6634 && REGNO (XEXP (elt, 0)) == regno) 6635 return 1; 6636 } 6637 } 6638 6639 return 0; 6640} 6641 6642static char *reload_when_needed_name[] = 6643{ 6644 "RELOAD_FOR_INPUT", 6645 "RELOAD_FOR_OUTPUT", 6646 "RELOAD_FOR_INSN", 6647 "RELOAD_FOR_INPUT_ADDRESS", 6648 "RELOAD_FOR_INPADDR_ADDRESS", 6649 "RELOAD_FOR_OUTPUT_ADDRESS", 6650 "RELOAD_FOR_OUTADDR_ADDRESS", 6651 "RELOAD_FOR_OPERAND_ADDRESS", 6652 "RELOAD_FOR_OPADDR_ADDR", 6653 "RELOAD_OTHER", 6654 "RELOAD_FOR_OTHER_ADDRESS" 6655}; 6656 6657static char *reg_class_names[] = REG_CLASS_NAMES; 6658 6659/* These functions are used to print the variables set by 'find_reloads' */ 6660 6661void 6662debug_reload_to_stream (f) 6663 FILE *f; 6664{ 6665 int r; 6666 char *prefix; 6667 6668 if (! f) 6669 f = stderr; 6670 for (r = 0; r < n_reloads; r++) 6671 { 6672 fprintf (f, "Reload %d: ", r); 6673 6674 if (reload_in[r] != 0) 6675 { 6676 fprintf (f, "reload_in (%s) = ", 6677 GET_MODE_NAME (reload_inmode[r])); 6678 print_inline_rtx (f, reload_in[r], 24); 6679 fprintf (f, "\n\t"); 6680 } 6681 6682 if (reload_out[r] != 0) 6683 { 6684 fprintf (f, "reload_out (%s) = ", 6685 GET_MODE_NAME (reload_outmode[r])); 6686 print_inline_rtx (f, reload_out[r], 24); 6687 fprintf (f, "\n\t"); 6688 } 6689 6690 fprintf (f, "%s, ", reg_class_names[(int) reload_reg_class[r]]); 6691 6692 fprintf (f, "%s (opnum = %d)", 6693 reload_when_needed_name[(int) reload_when_needed[r]], 6694 reload_opnum[r]); 6695 6696 if (reload_optional[r]) 6697 fprintf (f, ", optional"); 6698 6699 if (reload_nongroup[r]) 6700 fprintf (stderr, ", nongroup"); 6701 6702 if (reload_inc[r] != 0) 6703 fprintf (f, ", inc by %d", reload_inc[r]); 6704 6705 if (reload_nocombine[r]) 6706 fprintf (f, ", can't combine"); 6707 6708 if (reload_secondary_p[r]) 6709 fprintf (f, ", secondary_reload_p"); 6710 6711 if (reload_in_reg[r] != 0) 6712 { 6713 fprintf (f, "\n\treload_in_reg: "); 6714 print_inline_rtx (f, reload_in_reg[r], 24); 6715 } 6716 6717 if (reload_out_reg[r] != 0) 6718 { 6719 fprintf (f, "\n\treload_out_reg: "); 6720 print_inline_rtx (f, reload_out_reg[r], 24); 6721 } 6722 6723 if (reload_reg_rtx[r] != 0) 6724 { 6725 fprintf (f, "\n\treload_reg_rtx: "); 6726 print_inline_rtx (f, reload_reg_rtx[r], 24); 6727 } 6728 6729 prefix = "\n\t"; 6730 if (reload_secondary_in_reload[r] != -1) 6731 { 6732 fprintf (f, "%ssecondary_in_reload = %d", 6733 prefix, reload_secondary_in_reload[r]); 6734 prefix = ", "; 6735 } 6736 6737 if (reload_secondary_out_reload[r] != -1) 6738 fprintf (f, "%ssecondary_out_reload = %d\n", 6739 prefix, reload_secondary_out_reload[r]); 6740 6741 prefix = "\n\t"; 6742 if (reload_secondary_in_icode[r] != CODE_FOR_nothing) 6743 { 6744 fprintf (stderr, "%ssecondary_in_icode = %s", prefix, 6745 insn_name[reload_secondary_in_icode[r]]); 6746 prefix = ", "; 6747 } 6748 6749 if (reload_secondary_out_icode[r] != CODE_FOR_nothing) 6750 fprintf (stderr, "%ssecondary_out_icode = %s", prefix, 6751 insn_name[reload_secondary_out_icode[r]]); 6752 6753 fprintf (f, "\n"); 6754 } 6755} 6756 6757void 6758debug_reload () 6759{ 6760 debug_reload_to_stream (stderr); 6761} 6762