reload.c revision 104764
1/* Search an insn for pseudo regs that must be in hard regs and are not. 2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 3 1999, 2000, 2001, 2002 Free Software Foundation, Inc. 4 5This file is part of GCC. 6 7GCC is free software; you can redistribute it and/or modify it under 8the terms of the GNU General Public License as published by the Free 9Software Foundation; either version 2, or (at your option) any later 10version. 11 12GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13WARRANTY; without even the implied warranty of MERCHANTABILITY or 14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15for more details. 16 17You should have received a copy of the GNU General Public License 18along with GCC; see the file COPYING. If not, write to the Free 19Software Foundation, 59 Temple Place - Suite 330, Boston, MA 2002111-1307, USA. */ 21 22 23/* $FreeBSD: head/contrib/gcc/reload.c 104764 2002-10-10 04:50:29Z kan $ */ 24 25 26/* This file contains subroutines used only from the file reload1.c. 27 It knows how to scan one insn for operands and values 28 that need to be copied into registers to make valid code. 29 It also finds other operands and values which are valid 30 but for which equivalent values in registers exist and 31 ought to be used instead. 32 33 Before processing the first insn of the function, call `init_reload'. 34 35 To scan an insn, call `find_reloads'. This does two things: 36 1. sets up tables describing which values must be reloaded 37 for this insn, and what kind of hard regs they must be reloaded into; 38 2. optionally record the locations where those values appear in 39 the data, so they can be replaced properly later. 40 This is done only if the second arg to `find_reloads' is nonzero. 41 42 The third arg to `find_reloads' specifies the number of levels 43 of indirect addressing supported by the machine. If it is zero, 44 indirect addressing is not valid. If it is one, (MEM (REG n)) 45 is valid even if (REG n) did not get a hard register; if it is two, 46 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a 47 hard register, and similarly for higher values. 48 49 Then you must choose the hard regs to reload those pseudo regs into, 50 and generate appropriate load insns before this insn and perhaps 51 also store insns after this insn. Set up the array `reload_reg_rtx' 52 to contain the REG rtx's for the registers you used. In some 53 cases `find_reloads' will return a nonzero value in `reload_reg_rtx' 54 for certain reloads. Then that tells you which register to use, 55 so you do not need to allocate one. But you still do need to add extra 56 instructions to copy the value into and out of that register. 57 58 Finally you must call `subst_reloads' to substitute the reload reg rtx's 59 into the locations already recorded. 60 61NOTE SIDE EFFECTS: 62 63 find_reloads can alter the operands of the instruction it is called on. 64 65 1. Two operands of any sort may be interchanged, if they are in a 66 commutative instruction. 67 This happens only if find_reloads thinks the instruction will compile 68 better that way. 69 70 2. Pseudo-registers that are equivalent to constants are replaced 71 with those constants if they are not in hard registers. 72 731 happens every time find_reloads is called. 742 happens only when REPLACE is 1, which is only when 75actually doing the reloads, not when just counting them. 76 77Using a reload register for several reloads in one insn: 78 79When an insn has reloads, it is considered as having three parts: 80the input reloads, the insn itself after reloading, and the output reloads. 81Reloads of values used in memory addresses are often needed for only one part. 82 83When this is so, reload_when_needed records which part needs the reload. 84Two reloads for different parts of the insn can share the same reload 85register. 86 87When a reload is used for addresses in multiple parts, or when it is 88an ordinary operand, it is classified as RELOAD_OTHER, and cannot share 89a register with any other reload. */ 90 91#define REG_OK_STRICT 92 93#include "config.h" 94#include "system.h" 95#include "rtl.h" 96#include "tm_p.h" 97#include "insn-config.h" 98#include "expr.h" 99#include "optabs.h" 100#include "recog.h" 101#include "reload.h" 102#include "regs.h" 103#include "hard-reg-set.h" 104#include "flags.h" 105#include "real.h" 106#include "output.h" 107#include "function.h" 108#include "toplev.h" 109 110#ifndef REGISTER_MOVE_COST 111#define REGISTER_MOVE_COST(m, x, y) 2 112#endif 113 114#ifndef REGNO_MODE_OK_FOR_BASE_P 115#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO) 116#endif 117 118#ifndef REG_MODE_OK_FOR_BASE_P 119#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO) 120#endif 121 122/* All reloads of the current insn are recorded here. See reload.h for 123 comments. */ 124int n_reloads; 125struct reload rld[MAX_RELOADS]; 126 127/* All the "earlyclobber" operands of the current insn 128 are recorded here. */ 129int n_earlyclobbers; 130rtx reload_earlyclobbers[MAX_RECOG_OPERANDS]; 131 132int reload_n_operands; 133 134/* Replacing reloads. 135 136 If `replace_reloads' is nonzero, then as each reload is recorded 137 an entry is made for it in the table `replacements'. 138 Then later `subst_reloads' can look through that table and 139 perform all the replacements needed. */ 140 141/* Nonzero means record the places to replace. */ 142static int replace_reloads; 143 144/* Each replacement is recorded with a structure like this. */ 145struct replacement 146{ 147 rtx *where; /* Location to store in */ 148 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside 149 a SUBREG; 0 otherwise. */ 150 int what; /* which reload this is for */ 151 enum machine_mode mode; /* mode it must have */ 152}; 153 154static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)]; 155 156/* Number of replacements currently recorded. */ 157static int n_replacements; 158 159/* Used to track what is modified by an operand. */ 160struct decomposition 161{ 162 int reg_flag; /* Nonzero if referencing a register. */ 163 int safe; /* Nonzero if this can't conflict with anything. */ 164 rtx base; /* Base address for MEM. */ 165 HOST_WIDE_INT start; /* Starting offset or register number. */ 166 HOST_WIDE_INT end; /* Ending offset or register number. */ 167}; 168 169#ifdef SECONDARY_MEMORY_NEEDED 170 171/* Save MEMs needed to copy from one class of registers to another. One MEM 172 is used per mode, but normally only one or two modes are ever used. 173 174 We keep two versions, before and after register elimination. The one 175 after register elimination is record separately for each operand. This 176 is done in case the address is not valid to be sure that we separately 177 reload each. */ 178 179static rtx secondary_memlocs[NUM_MACHINE_MODES]; 180static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS]; 181#endif 182 183/* The instruction we are doing reloads for; 184 so we can test whether a register dies in it. */ 185static rtx this_insn; 186 187/* Nonzero if this instruction is a user-specified asm with operands. */ 188static int this_insn_is_asm; 189 190/* If hard_regs_live_known is nonzero, 191 we can tell which hard regs are currently live, 192 at least enough to succeed in choosing dummy reloads. */ 193static int hard_regs_live_known; 194 195/* Indexed by hard reg number, 196 element is nonnegative if hard reg has been spilled. 197 This vector is passed to `find_reloads' as an argument 198 and is not changed here. */ 199static short *static_reload_reg_p; 200 201/* Set to 1 in subst_reg_equivs if it changes anything. */ 202static int subst_reg_equivs_changed; 203 204/* On return from push_reload, holds the reload-number for the OUT 205 operand, which can be different for that from the input operand. */ 206static int output_reloadnum; 207 208 /* Compare two RTX's. */ 209#define MATCHES(x, y) \ 210 (x == y || (x != 0 && (GET_CODE (x) == REG \ 211 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \ 212 : rtx_equal_p (x, y) && ! side_effects_p (x)))) 213 214 /* Indicates if two reloads purposes are for similar enough things that we 215 can merge their reloads. */ 216#define MERGABLE_RELOADS(when1, when2, op1, op2) \ 217 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \ 218 || ((when1) == (when2) && (op1) == (op2)) \ 219 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \ 220 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \ 221 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \ 222 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \ 223 && (when2) == RELOAD_FOR_OTHER_ADDRESS)) 224 225 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */ 226#define MERGE_TO_OTHER(when1, when2, op1, op2) \ 227 ((when1) != (when2) \ 228 || ! ((op1) == (op2) \ 229 || (when1) == RELOAD_FOR_INPUT \ 230 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \ 231 || (when1) == RELOAD_FOR_OTHER_ADDRESS)) 232 233 /* If we are going to reload an address, compute the reload type to 234 use. */ 235#define ADDR_TYPE(type) \ 236 ((type) == RELOAD_FOR_INPUT_ADDRESS \ 237 ? RELOAD_FOR_INPADDR_ADDRESS \ 238 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \ 239 ? RELOAD_FOR_OUTADDR_ADDRESS \ 240 : (type))) 241 242#ifdef HAVE_SECONDARY_RELOADS 243static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class, 244 enum machine_mode, enum reload_type, 245 enum insn_code *)); 246#endif 247static enum reg_class find_valid_class PARAMS ((enum machine_mode, int, 248 unsigned int)); 249static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode)); 250static void push_replacement PARAMS ((rtx *, int, enum machine_mode)); 251static void combine_reloads PARAMS ((void)); 252static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class, 253 enum reload_type, int, int)); 254static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *, 255 enum machine_mode, enum machine_mode, 256 enum reg_class, int, int)); 257static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx)); 258static struct decomposition decompose PARAMS ((rtx)); 259static int immune_p PARAMS ((rtx, rtx, struct decomposition)); 260static int alternative_allows_memconst PARAMS ((const char *, int)); 261static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int, 262 int, rtx, int *)); 263static rtx make_memloc PARAMS ((rtx, int)); 264static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *, 265 int, enum reload_type, int, rtx)); 266static rtx subst_reg_equivs PARAMS ((rtx, rtx)); 267static rtx subst_indexed_address PARAMS ((rtx)); 268static void update_auto_inc_notes PARAMS ((rtx, int, int)); 269static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *, 270 int, enum reload_type,int, rtx)); 271static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class, 272 enum machine_mode, int, 273 enum reload_type, int)); 274static rtx find_reloads_subreg_address PARAMS ((rtx, int, int, 275 enum reload_type, int, rtx)); 276static void copy_replacements_1 PARAMS ((rtx *, rtx *, int)); 277static int find_inc_amount PARAMS ((rtx, rtx)); 278 279#ifdef HAVE_SECONDARY_RELOADS 280 281/* Determine if any secondary reloads are needed for loading (if IN_P is 282 non-zero) or storing (if IN_P is zero) X to or from a reload register of 283 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads 284 are needed, push them. 285 286 Return the reload number of the secondary reload we made, or -1 if 287 we didn't need one. *PICODE is set to the insn_code to use if we do 288 need a secondary reload. */ 289 290static int 291push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode, 292 type, picode) 293 int in_p; 294 rtx x; 295 int opnum; 296 int optional; 297 enum reg_class reload_class; 298 enum machine_mode reload_mode; 299 enum reload_type type; 300 enum insn_code *picode; 301{ 302 enum reg_class class = NO_REGS; 303 enum machine_mode mode = reload_mode; 304 enum insn_code icode = CODE_FOR_nothing; 305 enum reg_class t_class = NO_REGS; 306 enum machine_mode t_mode = VOIDmode; 307 enum insn_code t_icode = CODE_FOR_nothing; 308 enum reload_type secondary_type; 309 int s_reload, t_reload = -1; 310 311 if (type == RELOAD_FOR_INPUT_ADDRESS 312 || type == RELOAD_FOR_OUTPUT_ADDRESS 313 || type == RELOAD_FOR_INPADDR_ADDRESS 314 || type == RELOAD_FOR_OUTADDR_ADDRESS) 315 secondary_type = type; 316 else 317 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS; 318 319 *picode = CODE_FOR_nothing; 320 321 /* If X is a paradoxical SUBREG, use the inner value to determine both the 322 mode and object being reloaded. */ 323 if (GET_CODE (x) == SUBREG 324 && (GET_MODE_SIZE (GET_MODE (x)) 325 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))) 326 { 327 x = SUBREG_REG (x); 328 reload_mode = GET_MODE (x); 329 } 330 331 /* If X is a pseudo-register that has an equivalent MEM (actually, if it 332 is still a pseudo-register by now, it *must* have an equivalent MEM 333 but we don't want to assume that), use that equivalent when seeing if 334 a secondary reload is needed since whether or not a reload is needed 335 might be sensitive to the form of the MEM. */ 336 337 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER 338 && reg_equiv_mem[REGNO (x)] != 0) 339 x = reg_equiv_mem[REGNO (x)]; 340 341#ifdef SECONDARY_INPUT_RELOAD_CLASS 342 if (in_p) 343 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x); 344#endif 345 346#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 347 if (! in_p) 348 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x); 349#endif 350 351 /* If we don't need any secondary registers, done. */ 352 if (class == NO_REGS) 353 return -1; 354 355 /* Get a possible insn to use. If the predicate doesn't accept X, don't 356 use the insn. */ 357 358 icode = (in_p ? reload_in_optab[(int) reload_mode] 359 : reload_out_optab[(int) reload_mode]); 360 361 if (icode != CODE_FOR_nothing 362 && insn_data[(int) icode].operand[in_p].predicate 363 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode))) 364 icode = CODE_FOR_nothing; 365 366 /* If we will be using an insn, see if it can directly handle the reload 367 register we will be using. If it can, the secondary reload is for a 368 scratch register. If it can't, we will use the secondary reload for 369 an intermediate register and require a tertiary reload for the scratch 370 register. */ 371 372 if (icode != CODE_FOR_nothing) 373 { 374 /* If IN_P is non-zero, the reload register will be the output in 375 operand 0. If IN_P is zero, the reload register will be the input 376 in operand 1. Outputs should have an initial "=", which we must 377 skip. */ 378 379 enum reg_class insn_class; 380 381 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0) 382 insn_class = ALL_REGS; 383 else 384 { 385 char insn_letter 386 = insn_data[(int) icode].operand[!in_p].constraint[in_p]; 387 insn_class 388 = (insn_letter == 'r' ? GENERAL_REGS 389 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter)); 390 391 if (insn_class == NO_REGS) 392 abort (); 393 if (in_p 394 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=') 395 abort (); 396 } 397 398 /* The scratch register's constraint must start with "=&". */ 399 if (insn_data[(int) icode].operand[2].constraint[0] != '=' 400 || insn_data[(int) icode].operand[2].constraint[1] != '&') 401 abort (); 402 403 if (reg_class_subset_p (reload_class, insn_class)) 404 mode = insn_data[(int) icode].operand[2].mode; 405 else 406 { 407 char t_letter = insn_data[(int) icode].operand[2].constraint[2]; 408 class = insn_class; 409 t_mode = insn_data[(int) icode].operand[2].mode; 410 t_class = (t_letter == 'r' ? GENERAL_REGS 411 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter)); 412 t_icode = icode; 413 icode = CODE_FOR_nothing; 414 } 415 } 416 417 /* This case isn't valid, so fail. Reload is allowed to use the same 418 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but 419 in the case of a secondary register, we actually need two different 420 registers for correct code. We fail here to prevent the possibility of 421 silently generating incorrect code later. 422 423 The convention is that secondary input reloads are valid only if the 424 secondary_class is different from class. If you have such a case, you 425 can not use secondary reloads, you must work around the problem some 426 other way. 427 428 Allow this when a reload_in/out pattern is being used. I.e. assume 429 that the generated code handles this case. */ 430 431 if (in_p && class == reload_class && icode == CODE_FOR_nothing 432 && t_icode == CODE_FOR_nothing) 433 abort (); 434 435 /* If we need a tertiary reload, see if we have one we can reuse or else 436 make a new one. */ 437 438 if (t_class != NO_REGS) 439 { 440 for (t_reload = 0; t_reload < n_reloads; t_reload++) 441 if (rld[t_reload].secondary_p 442 && (reg_class_subset_p (t_class, rld[t_reload].class) 443 || reg_class_subset_p (rld[t_reload].class, t_class)) 444 && ((in_p && rld[t_reload].inmode == t_mode) 445 || (! in_p && rld[t_reload].outmode == t_mode)) 446 && ((in_p && (rld[t_reload].secondary_in_icode 447 == CODE_FOR_nothing)) 448 || (! in_p &&(rld[t_reload].secondary_out_icode 449 == CODE_FOR_nothing))) 450 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES) 451 && MERGABLE_RELOADS (secondary_type, 452 rld[t_reload].when_needed, 453 opnum, rld[t_reload].opnum)) 454 { 455 if (in_p) 456 rld[t_reload].inmode = t_mode; 457 if (! in_p) 458 rld[t_reload].outmode = t_mode; 459 460 if (reg_class_subset_p (t_class, rld[t_reload].class)) 461 rld[t_reload].class = t_class; 462 463 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum); 464 rld[t_reload].optional &= optional; 465 rld[t_reload].secondary_p = 1; 466 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed, 467 opnum, rld[t_reload].opnum)) 468 rld[t_reload].when_needed = RELOAD_OTHER; 469 } 470 471 if (t_reload == n_reloads) 472 { 473 /* We need to make a new tertiary reload for this register class. */ 474 rld[t_reload].in = rld[t_reload].out = 0; 475 rld[t_reload].class = t_class; 476 rld[t_reload].inmode = in_p ? t_mode : VOIDmode; 477 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode; 478 rld[t_reload].reg_rtx = 0; 479 rld[t_reload].optional = optional; 480 rld[t_reload].inc = 0; 481 /* Maybe we could combine these, but it seems too tricky. */ 482 rld[t_reload].nocombine = 1; 483 rld[t_reload].in_reg = 0; 484 rld[t_reload].out_reg = 0; 485 rld[t_reload].opnum = opnum; 486 rld[t_reload].when_needed = secondary_type; 487 rld[t_reload].secondary_in_reload = -1; 488 rld[t_reload].secondary_out_reload = -1; 489 rld[t_reload].secondary_in_icode = CODE_FOR_nothing; 490 rld[t_reload].secondary_out_icode = CODE_FOR_nothing; 491 rld[t_reload].secondary_p = 1; 492 493 n_reloads++; 494 } 495 } 496 497 /* See if we can reuse an existing secondary reload. */ 498 for (s_reload = 0; s_reload < n_reloads; s_reload++) 499 if (rld[s_reload].secondary_p 500 && (reg_class_subset_p (class, rld[s_reload].class) 501 || reg_class_subset_p (rld[s_reload].class, class)) 502 && ((in_p && rld[s_reload].inmode == mode) 503 || (! in_p && rld[s_reload].outmode == mode)) 504 && ((in_p && rld[s_reload].secondary_in_reload == t_reload) 505 || (! in_p && rld[s_reload].secondary_out_reload == t_reload)) 506 && ((in_p && rld[s_reload].secondary_in_icode == t_icode) 507 || (! in_p && rld[s_reload].secondary_out_icode == t_icode)) 508 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 509 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed, 510 opnum, rld[s_reload].opnum)) 511 { 512 if (in_p) 513 rld[s_reload].inmode = mode; 514 if (! in_p) 515 rld[s_reload].outmode = mode; 516 517 if (reg_class_subset_p (class, rld[s_reload].class)) 518 rld[s_reload].class = class; 519 520 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum); 521 rld[s_reload].optional &= optional; 522 rld[s_reload].secondary_p = 1; 523 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed, 524 opnum, rld[s_reload].opnum)) 525 rld[s_reload].when_needed = RELOAD_OTHER; 526 } 527 528 if (s_reload == n_reloads) 529 { 530#ifdef SECONDARY_MEMORY_NEEDED 531 /* If we need a memory location to copy between the two reload regs, 532 set it up now. Note that we do the input case before making 533 the reload and the output case after. This is due to the 534 way reloads are output. */ 535 536 if (in_p && icode == CODE_FOR_nothing 537 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode)) 538 { 539 get_secondary_mem (x, reload_mode, opnum, type); 540 541 /* We may have just added new reloads. Make sure we add 542 the new reload at the end. */ 543 s_reload = n_reloads; 544 } 545#endif 546 547 /* We need to make a new secondary reload for this register class. */ 548 rld[s_reload].in = rld[s_reload].out = 0; 549 rld[s_reload].class = class; 550 551 rld[s_reload].inmode = in_p ? mode : VOIDmode; 552 rld[s_reload].outmode = ! in_p ? mode : VOIDmode; 553 rld[s_reload].reg_rtx = 0; 554 rld[s_reload].optional = optional; 555 rld[s_reload].inc = 0; 556 /* Maybe we could combine these, but it seems too tricky. */ 557 rld[s_reload].nocombine = 1; 558 rld[s_reload].in_reg = 0; 559 rld[s_reload].out_reg = 0; 560 rld[s_reload].opnum = opnum; 561 rld[s_reload].when_needed = secondary_type; 562 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1; 563 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1; 564 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing; 565 rld[s_reload].secondary_out_icode 566 = ! in_p ? t_icode : CODE_FOR_nothing; 567 rld[s_reload].secondary_p = 1; 568 569 n_reloads++; 570 571#ifdef SECONDARY_MEMORY_NEEDED 572 if (! in_p && icode == CODE_FOR_nothing 573 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode)) 574 get_secondary_mem (x, mode, opnum, type); 575#endif 576 } 577 578 *picode = icode; 579 return s_reload; 580} 581#endif /* HAVE_SECONDARY_RELOADS */ 582 583#ifdef SECONDARY_MEMORY_NEEDED 584 585/* Return a memory location that will be used to copy X in mode MODE. 586 If we haven't already made a location for this mode in this insn, 587 call find_reloads_address on the location being returned. */ 588 589rtx 590get_secondary_mem (x, mode, opnum, type) 591 rtx x ATTRIBUTE_UNUSED; 592 enum machine_mode mode; 593 int opnum; 594 enum reload_type type; 595{ 596 rtx loc; 597 int mem_valid; 598 599 /* By default, if MODE is narrower than a word, widen it to a word. 600 This is required because most machines that require these memory 601 locations do not support short load and stores from all registers 602 (e.g., FP registers). */ 603 604#ifdef SECONDARY_MEMORY_NEEDED_MODE 605 mode = SECONDARY_MEMORY_NEEDED_MODE (mode); 606#else 607 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode)) 608 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0); 609#endif 610 611 /* If we already have made a MEM for this operand in MODE, return it. */ 612 if (secondary_memlocs_elim[(int) mode][opnum] != 0) 613 return secondary_memlocs_elim[(int) mode][opnum]; 614 615 /* If this is the first time we've tried to get a MEM for this mode, 616 allocate a new one. `something_changed' in reload will get set 617 by noticing that the frame size has changed. */ 618 619 if (secondary_memlocs[(int) mode] == 0) 620 { 621#ifdef SECONDARY_MEMORY_NEEDED_RTX 622 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode); 623#else 624 secondary_memlocs[(int) mode] 625 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0); 626#endif 627 } 628 629 /* Get a version of the address doing any eliminations needed. If that 630 didn't give us a new MEM, make a new one if it isn't valid. */ 631 632 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX); 633 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0)); 634 635 if (! mem_valid && loc == secondary_memlocs[(int) mode]) 636 loc = copy_rtx (loc); 637 638 /* The only time the call below will do anything is if the stack 639 offset is too large. In that case IND_LEVELS doesn't matter, so we 640 can just pass a zero. Adjust the type to be the address of the 641 corresponding object. If the address was valid, save the eliminated 642 address. If it wasn't valid, we need to make a reload each time, so 643 don't save it. */ 644 645 if (! mem_valid) 646 { 647 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS 648 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS 649 : RELOAD_OTHER); 650 651 find_reloads_address (mode, (rtx*) 0, XEXP (loc, 0), &XEXP (loc, 0), 652 opnum, type, 0, 0); 653 } 654 655 secondary_memlocs_elim[(int) mode][opnum] = loc; 656 return loc; 657} 658 659/* Clear any secondary memory locations we've made. */ 660 661void 662clear_secondary_mem () 663{ 664 memset ((char *) secondary_memlocs, 0, sizeof secondary_memlocs); 665} 666#endif /* SECONDARY_MEMORY_NEEDED */ 667 668/* Find the largest class for which every register number plus N is valid in 669 M1 (if in range) and is cheap to move into REGNO. 670 Abort if no such class exists. */ 671 672static enum reg_class 673find_valid_class (m1, n, dest_regno) 674 enum machine_mode m1 ATTRIBUTE_UNUSED; 675 int n; 676 unsigned int dest_regno; 677{ 678 int best_cost = -1; 679 int class; 680 int regno; 681 enum reg_class best_class = NO_REGS; 682 enum reg_class dest_class = REGNO_REG_CLASS (dest_regno); 683 unsigned int best_size = 0; 684 int cost; 685 686 for (class = 1; class < N_REG_CLASSES; class++) 687 { 688 int bad = 0; 689 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++) 690 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno) 691 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n) 692 && ! HARD_REGNO_MODE_OK (regno + n, m1)) 693 bad = 1; 694 695 if (bad) 696 continue; 697 cost = REGISTER_MOVE_COST (m1, class, dest_class); 698 699 if ((reg_class_size[class] > best_size 700 && (best_cost < 0 || best_cost >= cost)) 701 || best_cost > cost) 702 { 703 best_class = class; 704 best_size = reg_class_size[class]; 705 best_cost = REGISTER_MOVE_COST (m1, class, dest_class); 706 } 707 } 708 709 if (best_size == 0) 710 abort (); 711 712 return best_class; 713} 714 715/* Return the number of a previously made reload that can be combined with 716 a new one, or n_reloads if none of the existing reloads can be used. 717 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to 718 push_reload, they determine the kind of the new reload that we try to 719 combine. P_IN points to the corresponding value of IN, which can be 720 modified by this function. 721 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */ 722 723static int 724find_reusable_reload (p_in, out, class, type, opnum, dont_share) 725 rtx *p_in, out; 726 enum reg_class class; 727 enum reload_type type; 728 int opnum, dont_share; 729{ 730 rtx in = *p_in; 731 int i; 732 /* We can't merge two reloads if the output of either one is 733 earlyclobbered. */ 734 735 if (earlyclobber_operand_p (out)) 736 return n_reloads; 737 738 /* We can use an existing reload if the class is right 739 and at least one of IN and OUT is a match 740 and the other is at worst neutral. 741 (A zero compared against anything is neutral.) 742 743 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are 744 for the same thing since that can cause us to need more reload registers 745 than we otherwise would. */ 746 747 for (i = 0; i < n_reloads; i++) 748 if ((reg_class_subset_p (class, rld[i].class) 749 || reg_class_subset_p (rld[i].class, class)) 750 /* If the existing reload has a register, it must fit our class. */ 751 && (rld[i].reg_rtx == 0 752 || TEST_HARD_REG_BIT (reg_class_contents[(int) class], 753 true_regnum (rld[i].reg_rtx))) 754 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share 755 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out))) 756 || (out != 0 && MATCHES (rld[i].out, out) 757 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in)))) 758 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out)) 759 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 760 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum)) 761 return i; 762 763 /* Reloading a plain reg for input can match a reload to postincrement 764 that reg, since the postincrement's value is the right value. 765 Likewise, it can match a preincrement reload, since we regard 766 the preincrementation as happening before any ref in this insn 767 to that register. */ 768 for (i = 0; i < n_reloads; i++) 769 if ((reg_class_subset_p (class, rld[i].class) 770 || reg_class_subset_p (rld[i].class, class)) 771 /* If the existing reload has a register, it must fit our 772 class. */ 773 && (rld[i].reg_rtx == 0 774 || TEST_HARD_REG_BIT (reg_class_contents[(int) class], 775 true_regnum (rld[i].reg_rtx))) 776 && out == 0 && rld[i].out == 0 && rld[i].in != 0 777 && ((GET_CODE (in) == REG 778 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a' 779 && MATCHES (XEXP (rld[i].in, 0), in)) 780 || (GET_CODE (rld[i].in) == REG 781 && GET_RTX_CLASS (GET_CODE (in)) == 'a' 782 && MATCHES (XEXP (in, 0), rld[i].in))) 783 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out)) 784 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 785 && MERGABLE_RELOADS (type, rld[i].when_needed, 786 opnum, rld[i].opnum)) 787 { 788 /* Make sure reload_in ultimately has the increment, 789 not the plain register. */ 790 if (GET_CODE (in) == REG) 791 *p_in = rld[i].in; 792 return i; 793 } 794 return n_reloads; 795} 796 797/* Return nonzero if X is a SUBREG which will require reloading of its 798 SUBREG_REG expression. */ 799 800static int 801reload_inner_reg_of_subreg (x, mode) 802 rtx x; 803 enum machine_mode mode; 804{ 805 rtx inner; 806 807 /* Only SUBREGs are problematical. */ 808 if (GET_CODE (x) != SUBREG) 809 return 0; 810 811 inner = SUBREG_REG (x); 812 813 /* If INNER is a constant or PLUS, then INNER must be reloaded. */ 814 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS) 815 return 1; 816 817 /* If INNER is not a hard register, then INNER will not need to 818 be reloaded. */ 819 if (GET_CODE (inner) != REG 820 || REGNO (inner) >= FIRST_PSEUDO_REGISTER) 821 return 0; 822 823 /* If INNER is not ok for MODE, then INNER will need reloading. */ 824 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode)) 825 return 1; 826 827 /* If the outer part is a word or smaller, INNER larger than a 828 word and the number of regs for INNER is not the same as the 829 number of words in INNER, then INNER will need reloading. */ 830 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD 831 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD 832 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD) 833 != HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner)))); 834} 835 836/* Record one reload that needs to be performed. 837 IN is an rtx saying where the data are to be found before this instruction. 838 OUT says where they must be stored after the instruction. 839 (IN is zero for data not read, and OUT is zero for data not written.) 840 INLOC and OUTLOC point to the places in the instructions where 841 IN and OUT were found. 842 If IN and OUT are both non-zero, it means the same register must be used 843 to reload both IN and OUT. 844 845 CLASS is a register class required for the reloaded data. 846 INMODE is the machine mode that the instruction requires 847 for the reg that replaces IN and OUTMODE is likewise for OUT. 848 849 If IN is zero, then OUT's location and mode should be passed as 850 INLOC and INMODE. 851 852 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx. 853 854 OPTIONAL nonzero means this reload does not need to be performed: 855 it can be discarded if that is more convenient. 856 857 OPNUM and TYPE say what the purpose of this reload is. 858 859 The return value is the reload-number for this reload. 860 861 If both IN and OUT are nonzero, in some rare cases we might 862 want to make two separate reloads. (Actually we never do this now.) 863 Therefore, the reload-number for OUT is stored in 864 output_reloadnum when we return; the return value applies to IN. 865 Usually (presently always), when IN and OUT are nonzero, 866 the two reload-numbers are equal, but the caller should be careful to 867 distinguish them. */ 868 869int 870push_reload (in, out, inloc, outloc, class, 871 inmode, outmode, strict_low, optional, opnum, type) 872 rtx in, out; 873 rtx *inloc, *outloc; 874 enum reg_class class; 875 enum machine_mode inmode, outmode; 876 int strict_low; 877 int optional; 878 int opnum; 879 enum reload_type type; 880{ 881 int i; 882 int dont_share = 0; 883 int dont_remove_subreg = 0; 884 rtx *in_subreg_loc = 0, *out_subreg_loc = 0; 885 int secondary_in_reload = -1, secondary_out_reload = -1; 886 enum insn_code secondary_in_icode = CODE_FOR_nothing; 887 enum insn_code secondary_out_icode = CODE_FOR_nothing; 888 889 /* INMODE and/or OUTMODE could be VOIDmode if no mode 890 has been specified for the operand. In that case, 891 use the operand's mode as the mode to reload. */ 892 if (inmode == VOIDmode && in != 0) 893 inmode = GET_MODE (in); 894 if (outmode == VOIDmode && out != 0) 895 outmode = GET_MODE (out); 896 897 /* If IN is a pseudo register everywhere-equivalent to a constant, and 898 it is not in a hard register, reload straight from the constant, 899 since we want to get rid of such pseudo registers. 900 Often this is done earlier, but not always in find_reloads_address. */ 901 if (in != 0 && GET_CODE (in) == REG) 902 { 903 int regno = REGNO (in); 904 905 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 906 && reg_equiv_constant[regno] != 0) 907 in = reg_equiv_constant[regno]; 908 } 909 910 /* Likewise for OUT. Of course, OUT will never be equivalent to 911 an actual constant, but it might be equivalent to a memory location 912 (in the case of a parameter). */ 913 if (out != 0 && GET_CODE (out) == REG) 914 { 915 int regno = REGNO (out); 916 917 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 918 && reg_equiv_constant[regno] != 0) 919 out = reg_equiv_constant[regno]; 920 } 921 922 /* If we have a read-write operand with an address side-effect, 923 change either IN or OUT so the side-effect happens only once. */ 924 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out)) 925 switch (GET_CODE (XEXP (in, 0))) 926 { 927 case POST_INC: case POST_DEC: case POST_MODIFY: 928 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0)); 929 break; 930 931 case PRE_INC: case PRE_DEC: case PRE_MODIFY: 932 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0)); 933 break; 934 935 default: 936 break; 937 } 938 939 /* If we are reloading a (SUBREG constant ...), really reload just the 940 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)). 941 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still 942 a pseudo and hence will become a MEM) with M1 wider than M2 and the 943 register is a pseudo, also reload the inside expression. 944 For machines that extend byte loads, do this for any SUBREG of a pseudo 945 where both M1 and M2 are a word or smaller, M1 is wider than M2, and 946 M2 is an integral mode that gets extended when loaded. 947 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 948 either M1 is not valid for R or M2 is wider than a word but we only 949 need one word to store an M2-sized quantity in R. 950 (However, if OUT is nonzero, we need to reload the reg *and* 951 the subreg, so do nothing here, and let following statement handle it.) 952 953 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere; 954 we can't handle it here because CONST_INT does not indicate a mode. 955 956 Similarly, we must reload the inside expression if we have a 957 STRICT_LOW_PART (presumably, in == out in the cas). 958 959 Also reload the inner expression if it does not require a secondary 960 reload but the SUBREG does. 961 962 Finally, reload the inner expression if it is a register that is in 963 the class whose registers cannot be referenced in a different size 964 and M1 is not the same size as M2. If subreg_lowpart_p is false, we 965 cannot reload just the inside since we might end up with the wrong 966 register class. But if it is inside a STRICT_LOW_PART, we have 967 no choice, so we hope we do get the right register class there. */ 968 969 if (in != 0 && GET_CODE (in) == SUBREG 970 && (subreg_lowpart_p (in) || strict_low) 971#ifdef CLASS_CANNOT_CHANGE_MODE 972 && (class != CLASS_CANNOT_CHANGE_MODE 973 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)), inmode)) 974#endif 975 && (CONSTANT_P (SUBREG_REG (in)) 976 || GET_CODE (SUBREG_REG (in)) == PLUS 977 || strict_low 978 || (((GET_CODE (SUBREG_REG (in)) == REG 979 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER) 980 || GET_CODE (SUBREG_REG (in)) == MEM) 981 && ((GET_MODE_SIZE (inmode) 982 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 983#ifdef LOAD_EXTEND_OP 984 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 985 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 986 <= UNITS_PER_WORD) 987 && (GET_MODE_SIZE (inmode) 988 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 989 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in))) 990 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL) 991#endif 992#ifdef WORD_REGISTER_OPERATIONS 993 || ((GET_MODE_SIZE (inmode) 994 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 995 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD == 996 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1) 997 / UNITS_PER_WORD))) 998#endif 999 )) 1000 || (GET_CODE (SUBREG_REG (in)) == REG 1001 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1002 /* The case where out is nonzero 1003 is handled differently in the following statement. */ 1004 && (out == 0 || subreg_lowpart_p (in)) 1005 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 1006 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1007 > UNITS_PER_WORD) 1008 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1009 / UNITS_PER_WORD) 1010 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)), 1011 GET_MODE (SUBREG_REG (in))))) 1012 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode))) 1013#ifdef SECONDARY_INPUT_RELOAD_CLASS 1014 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS 1015 && (SECONDARY_INPUT_RELOAD_CLASS (class, 1016 GET_MODE (SUBREG_REG (in)), 1017 SUBREG_REG (in)) 1018 == NO_REGS)) 1019#endif 1020#ifdef CLASS_CANNOT_CHANGE_MODE 1021 || (GET_CODE (SUBREG_REG (in)) == REG 1022 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1023 && (TEST_HARD_REG_BIT 1024 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE], 1025 REGNO (SUBREG_REG (in)))) 1026 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)), 1027 inmode)) 1028#endif 1029 )) 1030 { 1031 in_subreg_loc = inloc; 1032 inloc = &SUBREG_REG (in); 1033 in = *inloc; 1034#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS) 1035 if (GET_CODE (in) == MEM) 1036 /* This is supposed to happen only for paradoxical subregs made by 1037 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */ 1038 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode)) 1039 abort (); 1040#endif 1041 inmode = GET_MODE (in); 1042 } 1043 1044 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1045 either M1 is not valid for R or M2 is wider than a word but we only 1046 need one word to store an M2-sized quantity in R. 1047 1048 However, we must reload the inner reg *as well as* the subreg in 1049 that case. */ 1050 1051 /* Similar issue for (SUBREG constant ...) if it was not handled by the 1052 code above. This can happen if SUBREG_BYTE != 0. */ 1053 1054 if (in != 0 && reload_inner_reg_of_subreg (in, inmode)) 1055 { 1056 enum reg_class in_class = class; 1057 1058 if (GET_CODE (SUBREG_REG (in)) == REG) 1059 in_class 1060 = find_valid_class (inmode, 1061 subreg_regno_offset (REGNO (SUBREG_REG (in)), 1062 GET_MODE (SUBREG_REG (in)), 1063 SUBREG_BYTE (in), 1064 GET_MODE (in)), 1065 REGNO (SUBREG_REG (in))); 1066 1067 /* This relies on the fact that emit_reload_insns outputs the 1068 instructions for input reloads of type RELOAD_OTHER in the same 1069 order as the reloads. Thus if the outer reload is also of type 1070 RELOAD_OTHER, we are guaranteed that this inner reload will be 1071 output before the outer reload. */ 1072 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0, 1073 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type); 1074 dont_remove_subreg = 1; 1075 } 1076 1077 /* Similarly for paradoxical and problematical SUBREGs on the output. 1078 Note that there is no reason we need worry about the previous value 1079 of SUBREG_REG (out); even if wider than out, 1080 storing in a subreg is entitled to clobber it all 1081 (except in the case of STRICT_LOW_PART, 1082 and in that case the constraint should label it input-output.) */ 1083 if (out != 0 && GET_CODE (out) == SUBREG 1084 && (subreg_lowpart_p (out) || strict_low) 1085#ifdef CLASS_CANNOT_CHANGE_MODE 1086 && (class != CLASS_CANNOT_CHANGE_MODE 1087 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)), 1088 outmode)) 1089#endif 1090 && (CONSTANT_P (SUBREG_REG (out)) 1091 || strict_low 1092 || (((GET_CODE (SUBREG_REG (out)) == REG 1093 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER) 1094 || GET_CODE (SUBREG_REG (out)) == MEM) 1095 && ((GET_MODE_SIZE (outmode) 1096 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) 1097#ifdef WORD_REGISTER_OPERATIONS 1098 || ((GET_MODE_SIZE (outmode) 1099 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) 1100 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD == 1101 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1) 1102 / UNITS_PER_WORD))) 1103#endif 1104 )) 1105 || (GET_CODE (SUBREG_REG (out)) == REG 1106 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1107 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD 1108 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1109 > UNITS_PER_WORD) 1110 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1111 / UNITS_PER_WORD) 1112 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)), 1113 GET_MODE (SUBREG_REG (out))))) 1114 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode))) 1115#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 1116 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS 1117 && (SECONDARY_OUTPUT_RELOAD_CLASS (class, 1118 GET_MODE (SUBREG_REG (out)), 1119 SUBREG_REG (out)) 1120 == NO_REGS)) 1121#endif 1122#ifdef CLASS_CANNOT_CHANGE_MODE 1123 || (GET_CODE (SUBREG_REG (out)) == REG 1124 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1125 && (TEST_HARD_REG_BIT 1126 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE], 1127 REGNO (SUBREG_REG (out)))) 1128 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)), 1129 outmode)) 1130#endif 1131 )) 1132 { 1133 out_subreg_loc = outloc; 1134 outloc = &SUBREG_REG (out); 1135 out = *outloc; 1136#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS) 1137 if (GET_CODE (out) == MEM 1138 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode)) 1139 abort (); 1140#endif 1141 outmode = GET_MODE (out); 1142 } 1143 1144 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1145 either M1 is not valid for R or M2 is wider than a word but we only 1146 need one word to store an M2-sized quantity in R. 1147 1148 However, we must reload the inner reg *as well as* the subreg in 1149 that case. In this case, the inner reg is an in-out reload. */ 1150 1151 if (out != 0 && reload_inner_reg_of_subreg (out, outmode)) 1152 { 1153 /* This relies on the fact that emit_reload_insns outputs the 1154 instructions for output reloads of type RELOAD_OTHER in reverse 1155 order of the reloads. Thus if the outer reload is also of type 1156 RELOAD_OTHER, we are guaranteed that this inner reload will be 1157 output after the outer reload. */ 1158 dont_remove_subreg = 1; 1159 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out), 1160 &SUBREG_REG (out), 1161 find_valid_class (outmode, 1162 subreg_regno_offset (REGNO (SUBREG_REG (out)), 1163 GET_MODE (SUBREG_REG (out)), 1164 SUBREG_BYTE (out), 1165 GET_MODE (out)), 1166 REGNO (SUBREG_REG (out))), 1167 VOIDmode, VOIDmode, 0, 0, 1168 opnum, RELOAD_OTHER); 1169 } 1170 1171 /* If IN appears in OUT, we can't share any input-only reload for IN. */ 1172 if (in != 0 && out != 0 && GET_CODE (out) == MEM 1173 && (GET_CODE (in) == REG || GET_CODE (in) == MEM) 1174 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0))) 1175 dont_share = 1; 1176 1177 /* If IN is a SUBREG of a hard register, make a new REG. This 1178 simplifies some of the cases below. */ 1179 1180 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG 1181 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1182 && ! dont_remove_subreg) 1183 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in)); 1184 1185 /* Similarly for OUT. */ 1186 if (out != 0 && GET_CODE (out) == SUBREG 1187 && GET_CODE (SUBREG_REG (out)) == REG 1188 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1189 && ! dont_remove_subreg) 1190 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out)); 1191 1192 /* Narrow down the class of register wanted if that is 1193 desirable on this machine for efficiency. */ 1194 if (in != 0) 1195 class = PREFERRED_RELOAD_CLASS (in, class); 1196 1197 /* Output reloads may need analogous treatment, different in detail. */ 1198#ifdef PREFERRED_OUTPUT_RELOAD_CLASS 1199 if (out != 0) 1200 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class); 1201#endif 1202 1203 /* Make sure we use a class that can handle the actual pseudo 1204 inside any subreg. For example, on the 386, QImode regs 1205 can appear within SImode subregs. Although GENERAL_REGS 1206 can handle SImode, QImode needs a smaller class. */ 1207#ifdef LIMIT_RELOAD_CLASS 1208 if (in_subreg_loc) 1209 class = LIMIT_RELOAD_CLASS (inmode, class); 1210 else if (in != 0 && GET_CODE (in) == SUBREG) 1211 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class); 1212 1213 if (out_subreg_loc) 1214 class = LIMIT_RELOAD_CLASS (outmode, class); 1215 if (out != 0 && GET_CODE (out) == SUBREG) 1216 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class); 1217#endif 1218 1219 /* Verify that this class is at least possible for the mode that 1220 is specified. */ 1221 if (this_insn_is_asm) 1222 { 1223 enum machine_mode mode; 1224 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode)) 1225 mode = inmode; 1226 else 1227 mode = outmode; 1228 if (mode == VOIDmode) 1229 { 1230 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'"); 1231 mode = word_mode; 1232 if (in != 0) 1233 inmode = word_mode; 1234 if (out != 0) 1235 outmode = word_mode; 1236 } 1237 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1238 if (HARD_REGNO_MODE_OK (i, mode) 1239 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i)) 1240 { 1241 int nregs = HARD_REGNO_NREGS (i, mode); 1242 1243 int j; 1244 for (j = 1; j < nregs; j++) 1245 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j)) 1246 break; 1247 if (j == nregs) 1248 break; 1249 } 1250 if (i == FIRST_PSEUDO_REGISTER) 1251 { 1252 error_for_asm (this_insn, "impossible register constraint in `asm'"); 1253 class = ALL_REGS; 1254 } 1255 } 1256 1257 /* Optional output reloads are always OK even if we have no register class, 1258 since the function of these reloads is only to have spill_reg_store etc. 1259 set, so that the storing insn can be deleted later. */ 1260 if (class == NO_REGS 1261 && (optional == 0 || type != RELOAD_FOR_OUTPUT)) 1262 abort (); 1263 1264 i = find_reusable_reload (&in, out, class, type, opnum, dont_share); 1265 1266 if (i == n_reloads) 1267 { 1268 /* See if we need a secondary reload register to move between CLASS 1269 and IN or CLASS and OUT. Get the icode and push any required reloads 1270 needed for each of them if so. */ 1271 1272#ifdef SECONDARY_INPUT_RELOAD_CLASS 1273 if (in != 0) 1274 secondary_in_reload 1275 = push_secondary_reload (1, in, opnum, optional, class, inmode, type, 1276 &secondary_in_icode); 1277#endif 1278 1279#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 1280 if (out != 0 && GET_CODE (out) != SCRATCH) 1281 secondary_out_reload 1282 = push_secondary_reload (0, out, opnum, optional, class, outmode, 1283 type, &secondary_out_icode); 1284#endif 1285 1286 /* We found no existing reload suitable for re-use. 1287 So add an additional reload. */ 1288 1289#ifdef SECONDARY_MEMORY_NEEDED 1290 { 1291 int regnum; 1292 1293 /* If a memory location is needed for the copy, make one. */ 1294 if (in != 0 1295 && ((regnum = true_regnum (in)) >= 0) 1296 && regnum < FIRST_PSEUDO_REGISTER 1297 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (regnum), 1298 class, inmode)) 1299 get_secondary_mem (in, inmode, opnum, type); 1300 } 1301#endif 1302 1303 i = n_reloads; 1304 rld[i].in = in; 1305 rld[i].out = out; 1306 rld[i].class = class; 1307 rld[i].inmode = inmode; 1308 rld[i].outmode = outmode; 1309 rld[i].reg_rtx = 0; 1310 rld[i].optional = optional; 1311 rld[i].inc = 0; 1312 rld[i].nocombine = 0; 1313 rld[i].in_reg = inloc ? *inloc : 0; 1314 rld[i].out_reg = outloc ? *outloc : 0; 1315 rld[i].opnum = opnum; 1316 rld[i].when_needed = type; 1317 rld[i].secondary_in_reload = secondary_in_reload; 1318 rld[i].secondary_out_reload = secondary_out_reload; 1319 rld[i].secondary_in_icode = secondary_in_icode; 1320 rld[i].secondary_out_icode = secondary_out_icode; 1321 rld[i].secondary_p = 0; 1322 1323 n_reloads++; 1324 1325#ifdef SECONDARY_MEMORY_NEEDED 1326 { 1327 int regnum; 1328 1329 if (out != 0 1330 && ((regnum = true_regnum (out)) >= 0) 1331 && regnum < FIRST_PSEUDO_REGISTER 1332 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (regnum), 1333 outmode)) 1334 get_secondary_mem (out, outmode, opnum, type); 1335 } 1336#endif 1337 } 1338 else 1339 { 1340 /* We are reusing an existing reload, 1341 but we may have additional information for it. 1342 For example, we may now have both IN and OUT 1343 while the old one may have just one of them. */ 1344 1345 /* The modes can be different. If they are, we want to reload in 1346 the larger mode, so that the value is valid for both modes. */ 1347 if (inmode != VOIDmode 1348 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode)) 1349 rld[i].inmode = inmode; 1350 if (outmode != VOIDmode 1351 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode)) 1352 rld[i].outmode = outmode; 1353 if (in != 0) 1354 { 1355 rtx in_reg = inloc ? *inloc : 0; 1356 /* If we merge reloads for two distinct rtl expressions that 1357 are identical in content, there might be duplicate address 1358 reloads. Remove the extra set now, so that if we later find 1359 that we can inherit this reload, we can get rid of the 1360 address reloads altogether. 1361 1362 Do not do this if both reloads are optional since the result 1363 would be an optional reload which could potentially leave 1364 unresolved address replacements. 1365 1366 It is not sufficient to call transfer_replacements since 1367 choose_reload_regs will remove the replacements for address 1368 reloads of inherited reloads which results in the same 1369 problem. */ 1370 if (rld[i].in != in && rtx_equal_p (in, rld[i].in) 1371 && ! (rld[i].optional && optional)) 1372 { 1373 /* We must keep the address reload with the lower operand 1374 number alive. */ 1375 if (opnum > rld[i].opnum) 1376 { 1377 remove_address_replacements (in); 1378 in = rld[i].in; 1379 in_reg = rld[i].in_reg; 1380 } 1381 else 1382 remove_address_replacements (rld[i].in); 1383 } 1384 rld[i].in = in; 1385 rld[i].in_reg = in_reg; 1386 } 1387 if (out != 0) 1388 { 1389 rld[i].out = out; 1390 rld[i].out_reg = outloc ? *outloc : 0; 1391 } 1392 if (reg_class_subset_p (class, rld[i].class)) 1393 rld[i].class = class; 1394 rld[i].optional &= optional; 1395 if (MERGE_TO_OTHER (type, rld[i].when_needed, 1396 opnum, rld[i].opnum)) 1397 rld[i].when_needed = RELOAD_OTHER; 1398 rld[i].opnum = MIN (rld[i].opnum, opnum); 1399 } 1400 1401 /* If the ostensible rtx being reloaded differs from the rtx found 1402 in the location to substitute, this reload is not safe to combine 1403 because we cannot reliably tell whether it appears in the insn. */ 1404 1405 if (in != 0 && in != *inloc) 1406 rld[i].nocombine = 1; 1407 1408#if 0 1409 /* This was replaced by changes in find_reloads_address_1 and the new 1410 function inc_for_reload, which go with a new meaning of reload_inc. */ 1411 1412 /* If this is an IN/OUT reload in an insn that sets the CC, 1413 it must be for an autoincrement. It doesn't work to store 1414 the incremented value after the insn because that would clobber the CC. 1415 So we must do the increment of the value reloaded from, 1416 increment it, store it back, then decrement again. */ 1417 if (out != 0 && sets_cc0_p (PATTERN (this_insn))) 1418 { 1419 out = 0; 1420 rld[i].out = 0; 1421 rld[i].inc = find_inc_amount (PATTERN (this_insn), in); 1422 /* If we did not find a nonzero amount-to-increment-by, 1423 that contradicts the belief that IN is being incremented 1424 in an address in this insn. */ 1425 if (rld[i].inc == 0) 1426 abort (); 1427 } 1428#endif 1429 1430 /* If we will replace IN and OUT with the reload-reg, 1431 record where they are located so that substitution need 1432 not do a tree walk. */ 1433 1434 if (replace_reloads) 1435 { 1436 if (inloc != 0) 1437 { 1438 struct replacement *r = &replacements[n_replacements++]; 1439 r->what = i; 1440 r->subreg_loc = in_subreg_loc; 1441 r->where = inloc; 1442 r->mode = inmode; 1443 } 1444 if (outloc != 0 && outloc != inloc) 1445 { 1446 struct replacement *r = &replacements[n_replacements++]; 1447 r->what = i; 1448 r->where = outloc; 1449 r->subreg_loc = out_subreg_loc; 1450 r->mode = outmode; 1451 } 1452 } 1453 1454 /* If this reload is just being introduced and it has both 1455 an incoming quantity and an outgoing quantity that are 1456 supposed to be made to match, see if either one of the two 1457 can serve as the place to reload into. 1458 1459 If one of them is acceptable, set rld[i].reg_rtx 1460 to that one. */ 1461 1462 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0) 1463 { 1464 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc, 1465 inmode, outmode, 1466 rld[i].class, i, 1467 earlyclobber_operand_p (out)); 1468 1469 /* If the outgoing register already contains the same value 1470 as the incoming one, we can dispense with loading it. 1471 The easiest way to tell the caller that is to give a phony 1472 value for the incoming operand (same as outgoing one). */ 1473 if (rld[i].reg_rtx == out 1474 && (GET_CODE (in) == REG || CONSTANT_P (in)) 1475 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out), 1476 static_reload_reg_p, i, inmode)) 1477 rld[i].in = out; 1478 } 1479 1480 /* If this is an input reload and the operand contains a register that 1481 dies in this insn and is used nowhere else, see if it is the right class 1482 to be used for this reload. Use it if so. (This occurs most commonly 1483 in the case of paradoxical SUBREGs and in-out reloads). We cannot do 1484 this if it is also an output reload that mentions the register unless 1485 the output is a SUBREG that clobbers an entire register. 1486 1487 Note that the operand might be one of the spill regs, if it is a 1488 pseudo reg and we are in a block where spilling has not taken place. 1489 But if there is no spilling in this block, that is OK. 1490 An explicitly used hard reg cannot be a spill reg. */ 1491 1492 if (rld[i].reg_rtx == 0 && in != 0) 1493 { 1494 rtx note; 1495 int regno; 1496 enum machine_mode rel_mode = inmode; 1497 1498 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode)) 1499 rel_mode = outmode; 1500 1501 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) 1502 if (REG_NOTE_KIND (note) == REG_DEAD 1503 && GET_CODE (XEXP (note, 0)) == REG 1504 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER 1505 && reg_mentioned_p (XEXP (note, 0), in) 1506 && ! refers_to_regno_for_reload_p (regno, 1507 (regno 1508 + HARD_REGNO_NREGS (regno, 1509 rel_mode)), 1510 PATTERN (this_insn), inloc) 1511 /* If this is also an output reload, IN cannot be used as 1512 the reload register if it is set in this insn unless IN 1513 is also OUT. */ 1514 && (out == 0 || in == out 1515 || ! hard_reg_set_here_p (regno, 1516 (regno 1517 + HARD_REGNO_NREGS (regno, 1518 rel_mode)), 1519 PATTERN (this_insn))) 1520 /* ??? Why is this code so different from the previous? 1521 Is there any simple coherent way to describe the two together? 1522 What's going on here. */ 1523 && (in != out 1524 || (GET_CODE (in) == SUBREG 1525 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1)) 1526 / UNITS_PER_WORD) 1527 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1528 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))) 1529 /* Make sure the operand fits in the reg that dies. */ 1530 && (GET_MODE_SIZE (rel_mode) 1531 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))) 1532 && HARD_REGNO_MODE_OK (regno, inmode) 1533 && HARD_REGNO_MODE_OK (regno, outmode)) 1534 { 1535 unsigned int offs; 1536 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode), 1537 HARD_REGNO_NREGS (regno, outmode)); 1538 1539 for (offs = 0; offs < nregs; offs++) 1540 if (fixed_regs[regno + offs] 1541 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1542 regno + offs)) 1543 break; 1544 1545 if (offs == nregs) 1546 { 1547 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno); 1548 break; 1549 } 1550 } 1551 } 1552 1553 if (out) 1554 output_reloadnum = i; 1555 1556 return i; 1557} 1558 1559/* Record an additional place we must replace a value 1560 for which we have already recorded a reload. 1561 RELOADNUM is the value returned by push_reload 1562 when the reload was recorded. 1563 This is used in insn patterns that use match_dup. */ 1564 1565static void 1566push_replacement (loc, reloadnum, mode) 1567 rtx *loc; 1568 int reloadnum; 1569 enum machine_mode mode; 1570{ 1571 if (replace_reloads) 1572 { 1573 struct replacement *r = &replacements[n_replacements++]; 1574 r->what = reloadnum; 1575 r->where = loc; 1576 r->subreg_loc = 0; 1577 r->mode = mode; 1578 } 1579} 1580 1581/* Transfer all replacements that used to be in reload FROM to be in 1582 reload TO. */ 1583 1584void 1585transfer_replacements (to, from) 1586 int to, from; 1587{ 1588 int i; 1589 1590 for (i = 0; i < n_replacements; i++) 1591 if (replacements[i].what == from) 1592 replacements[i].what = to; 1593} 1594 1595/* IN_RTX is the value loaded by a reload that we now decided to inherit, 1596 or a subpart of it. If we have any replacements registered for IN_RTX, 1597 cancel the reloads that were supposed to load them. 1598 Return non-zero if we canceled any reloads. */ 1599int 1600remove_address_replacements (in_rtx) 1601 rtx in_rtx; 1602{ 1603 int i, j; 1604 char reload_flags[MAX_RELOADS]; 1605 int something_changed = 0; 1606 1607 memset (reload_flags, 0, sizeof reload_flags); 1608 for (i = 0, j = 0; i < n_replacements; i++) 1609 { 1610 if (loc_mentioned_in_p (replacements[i].where, in_rtx)) 1611 reload_flags[replacements[i].what] |= 1; 1612 else 1613 { 1614 replacements[j++] = replacements[i]; 1615 reload_flags[replacements[i].what] |= 2; 1616 } 1617 } 1618 /* Note that the following store must be done before the recursive calls. */ 1619 n_replacements = j; 1620 1621 for (i = n_reloads - 1; i >= 0; i--) 1622 { 1623 if (reload_flags[i] == 1) 1624 { 1625 deallocate_reload_reg (i); 1626 remove_address_replacements (rld[i].in); 1627 rld[i].in = 0; 1628 something_changed = 1; 1629 } 1630 } 1631 return something_changed; 1632} 1633 1634/* If there is only one output reload, and it is not for an earlyclobber 1635 operand, try to combine it with a (logically unrelated) input reload 1636 to reduce the number of reload registers needed. 1637 1638 This is safe if the input reload does not appear in 1639 the value being output-reloaded, because this implies 1640 it is not needed any more once the original insn completes. 1641 1642 If that doesn't work, see we can use any of the registers that 1643 die in this insn as a reload register. We can if it is of the right 1644 class and does not appear in the value being output-reloaded. */ 1645 1646static void 1647combine_reloads () 1648{ 1649 int i; 1650 int output_reload = -1; 1651 int secondary_out = -1; 1652 rtx note; 1653 1654 /* Find the output reload; return unless there is exactly one 1655 and that one is mandatory. */ 1656 1657 for (i = 0; i < n_reloads; i++) 1658 if (rld[i].out != 0) 1659 { 1660 if (output_reload >= 0) 1661 return; 1662 output_reload = i; 1663 } 1664 1665 if (output_reload < 0 || rld[output_reload].optional) 1666 return; 1667 1668 /* An input-output reload isn't combinable. */ 1669 1670 if (rld[output_reload].in != 0) 1671 return; 1672 1673 /* If this reload is for an earlyclobber operand, we can't do anything. */ 1674 if (earlyclobber_operand_p (rld[output_reload].out)) 1675 return; 1676 1677 /* If there is a reload for part of the address of this operand, we would 1678 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend 1679 its life to the point where doing this combine would not lower the 1680 number of spill registers needed. */ 1681 for (i = 0; i < n_reloads; i++) 1682 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 1683 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 1684 && rld[i].opnum == rld[output_reload].opnum) 1685 return; 1686 1687 /* Check each input reload; can we combine it? */ 1688 1689 for (i = 0; i < n_reloads; i++) 1690 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine 1691 /* Life span of this reload must not extend past main insn. */ 1692 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS 1693 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS 1694 && rld[i].when_needed != RELOAD_OTHER 1695 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode) 1696 == CLASS_MAX_NREGS (rld[output_reload].class, 1697 rld[output_reload].outmode)) 1698 && rld[i].inc == 0 1699 && rld[i].reg_rtx == 0 1700#ifdef SECONDARY_MEMORY_NEEDED 1701 /* Don't combine two reloads with different secondary 1702 memory locations. */ 1703 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0 1704 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0 1705 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum], 1706 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum])) 1707#endif 1708 && (SMALL_REGISTER_CLASSES 1709 ? (rld[i].class == rld[output_reload].class) 1710 : (reg_class_subset_p (rld[i].class, 1711 rld[output_reload].class) 1712 || reg_class_subset_p (rld[output_reload].class, 1713 rld[i].class))) 1714 && (MATCHES (rld[i].in, rld[output_reload].out) 1715 /* Args reversed because the first arg seems to be 1716 the one that we imagine being modified 1717 while the second is the one that might be affected. */ 1718 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out, 1719 rld[i].in) 1720 /* However, if the input is a register that appears inside 1721 the output, then we also can't share. 1722 Imagine (set (mem (reg 69)) (plus (reg 69) ...)). 1723 If the same reload reg is used for both reg 69 and the 1724 result to be stored in memory, then that result 1725 will clobber the address of the memory ref. */ 1726 && ! (GET_CODE (rld[i].in) == REG 1727 && reg_overlap_mentioned_for_reload_p (rld[i].in, 1728 rld[output_reload].out)))) 1729 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode) 1730 && (reg_class_size[(int) rld[i].class] 1731 || SMALL_REGISTER_CLASSES) 1732 /* We will allow making things slightly worse by combining an 1733 input and an output, but no worse than that. */ 1734 && (rld[i].when_needed == RELOAD_FOR_INPUT 1735 || rld[i].when_needed == RELOAD_FOR_OUTPUT)) 1736 { 1737 int j; 1738 1739 /* We have found a reload to combine with! */ 1740 rld[i].out = rld[output_reload].out; 1741 rld[i].out_reg = rld[output_reload].out_reg; 1742 rld[i].outmode = rld[output_reload].outmode; 1743 /* Mark the old output reload as inoperative. */ 1744 rld[output_reload].out = 0; 1745 /* The combined reload is needed for the entire insn. */ 1746 rld[i].when_needed = RELOAD_OTHER; 1747 /* If the output reload had a secondary reload, copy it. */ 1748 if (rld[output_reload].secondary_out_reload != -1) 1749 { 1750 rld[i].secondary_out_reload 1751 = rld[output_reload].secondary_out_reload; 1752 rld[i].secondary_out_icode 1753 = rld[output_reload].secondary_out_icode; 1754 } 1755 1756#ifdef SECONDARY_MEMORY_NEEDED 1757 /* Copy any secondary MEM. */ 1758 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0) 1759 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] 1760 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]; 1761#endif 1762 /* If required, minimize the register class. */ 1763 if (reg_class_subset_p (rld[output_reload].class, 1764 rld[i].class)) 1765 rld[i].class = rld[output_reload].class; 1766 1767 /* Transfer all replacements from the old reload to the combined. */ 1768 for (j = 0; j < n_replacements; j++) 1769 if (replacements[j].what == output_reload) 1770 replacements[j].what = i; 1771 1772 return; 1773 } 1774 1775 /* If this insn has only one operand that is modified or written (assumed 1776 to be the first), it must be the one corresponding to this reload. It 1777 is safe to use anything that dies in this insn for that output provided 1778 that it does not occur in the output (we already know it isn't an 1779 earlyclobber. If this is an asm insn, give up. */ 1780 1781 if (INSN_CODE (this_insn) == -1) 1782 return; 1783 1784 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++) 1785 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '=' 1786 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+') 1787 return; 1788 1789 /* See if some hard register that dies in this insn and is not used in 1790 the output is the right class. Only works if the register we pick 1791 up can fully hold our output reload. */ 1792 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) 1793 if (REG_NOTE_KIND (note) == REG_DEAD 1794 && GET_CODE (XEXP (note, 0)) == REG 1795 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0), 1796 rld[output_reload].out) 1797 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER 1798 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode) 1799 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class], 1800 REGNO (XEXP (note, 0))) 1801 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode) 1802 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0)))) 1803 /* Ensure that a secondary or tertiary reload for this output 1804 won't want this register. */ 1805 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1 1806 || (! (TEST_HARD_REG_BIT 1807 (reg_class_contents[(int) rld[secondary_out].class], 1808 REGNO (XEXP (note, 0)))) 1809 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1 1810 || ! (TEST_HARD_REG_BIT 1811 (reg_class_contents[(int) rld[secondary_out].class], 1812 REGNO (XEXP (note, 0))))))) 1813 && ! fixed_regs[REGNO (XEXP (note, 0))]) 1814 { 1815 rld[output_reload].reg_rtx 1816 = gen_rtx_REG (rld[output_reload].outmode, 1817 REGNO (XEXP (note, 0))); 1818 return; 1819 } 1820} 1821 1822/* Try to find a reload register for an in-out reload (expressions IN and OUT). 1823 See if one of IN and OUT is a register that may be used; 1824 this is desirable since a spill-register won't be needed. 1825 If so, return the register rtx that proves acceptable. 1826 1827 INLOC and OUTLOC are locations where IN and OUT appear in the insn. 1828 CLASS is the register class required for the reload. 1829 1830 If FOR_REAL is >= 0, it is the number of the reload, 1831 and in some cases when it can be discovered that OUT doesn't need 1832 to be computed, clear out rld[FOR_REAL].out. 1833 1834 If FOR_REAL is -1, this should not be done, because this call 1835 is just to see if a register can be found, not to find and install it. 1836 1837 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This 1838 puts an additional constraint on being able to use IN for OUT since 1839 IN must not appear elsewhere in the insn (it is assumed that IN itself 1840 is safe from the earlyclobber). */ 1841 1842static rtx 1843find_dummy_reload (real_in, real_out, inloc, outloc, 1844 inmode, outmode, class, for_real, earlyclobber) 1845 rtx real_in, real_out; 1846 rtx *inloc, *outloc; 1847 enum machine_mode inmode, outmode; 1848 enum reg_class class; 1849 int for_real; 1850 int earlyclobber; 1851{ 1852 rtx in = real_in; 1853 rtx out = real_out; 1854 int in_offset = 0; 1855 int out_offset = 0; 1856 rtx value = 0; 1857 1858 /* If operands exceed a word, we can't use either of them 1859 unless they have the same size. */ 1860 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode) 1861 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD 1862 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD)) 1863 return 0; 1864 1865 /* Note that {in,out}_offset are needed only when 'in' or 'out' 1866 respectively refers to a hard register. */ 1867 1868 /* Find the inside of any subregs. */ 1869 while (GET_CODE (out) == SUBREG) 1870 { 1871 if (GET_CODE (SUBREG_REG (out)) == REG 1872 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER) 1873 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)), 1874 GET_MODE (SUBREG_REG (out)), 1875 SUBREG_BYTE (out), 1876 GET_MODE (out)); 1877 out = SUBREG_REG (out); 1878 } 1879 while (GET_CODE (in) == SUBREG) 1880 { 1881 if (GET_CODE (SUBREG_REG (in)) == REG 1882 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER) 1883 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)), 1884 GET_MODE (SUBREG_REG (in)), 1885 SUBREG_BYTE (in), 1886 GET_MODE (in)); 1887 in = SUBREG_REG (in); 1888 } 1889 1890 /* Narrow down the reg class, the same way push_reload will; 1891 otherwise we might find a dummy now, but push_reload won't. */ 1892 class = PREFERRED_RELOAD_CLASS (in, class); 1893 1894 /* See if OUT will do. */ 1895 if (GET_CODE (out) == REG 1896 && REGNO (out) < FIRST_PSEUDO_REGISTER) 1897 { 1898 unsigned int regno = REGNO (out) + out_offset; 1899 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode); 1900 rtx saved_rtx; 1901 1902 /* When we consider whether the insn uses OUT, 1903 ignore references within IN. They don't prevent us 1904 from copying IN into OUT, because those refs would 1905 move into the insn that reloads IN. 1906 1907 However, we only ignore IN in its role as this reload. 1908 If the insn uses IN elsewhere and it contains OUT, 1909 that counts. We can't be sure it's the "same" operand 1910 so it might not go through this reload. */ 1911 saved_rtx = *inloc; 1912 *inloc = const0_rtx; 1913 1914 if (regno < FIRST_PSEUDO_REGISTER 1915 && HARD_REGNO_MODE_OK (regno, outmode) 1916 && ! refers_to_regno_for_reload_p (regno, regno + nwords, 1917 PATTERN (this_insn), outloc)) 1918 { 1919 unsigned int i; 1920 1921 for (i = 0; i < nwords; i++) 1922 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1923 regno + i)) 1924 break; 1925 1926 if (i == nwords) 1927 { 1928 if (GET_CODE (real_out) == REG) 1929 value = real_out; 1930 else 1931 value = gen_rtx_REG (outmode, regno); 1932 } 1933 } 1934 1935 *inloc = saved_rtx; 1936 } 1937 1938 /* Consider using IN if OUT was not acceptable 1939 or if OUT dies in this insn (like the quotient in a divmod insn). 1940 We can't use IN unless it is dies in this insn, 1941 which means we must know accurately which hard regs are live. 1942 Also, the result can't go in IN if IN is used within OUT, 1943 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */ 1944 if (hard_regs_live_known 1945 && GET_CODE (in) == REG 1946 && REGNO (in) < FIRST_PSEUDO_REGISTER 1947 && (value == 0 1948 || find_reg_note (this_insn, REG_UNUSED, real_out)) 1949 && find_reg_note (this_insn, REG_DEAD, real_in) 1950 && !fixed_regs[REGNO (in)] 1951 && HARD_REGNO_MODE_OK (REGNO (in), 1952 /* The only case where out and real_out might 1953 have different modes is where real_out 1954 is a subreg, and in that case, out 1955 has a real mode. */ 1956 (GET_MODE (out) != VOIDmode 1957 ? GET_MODE (out) : outmode))) 1958 { 1959 unsigned int regno = REGNO (in) + in_offset; 1960 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode); 1961 1962 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0) 1963 && ! hard_reg_set_here_p (regno, regno + nwords, 1964 PATTERN (this_insn)) 1965 && (! earlyclobber 1966 || ! refers_to_regno_for_reload_p (regno, regno + nwords, 1967 PATTERN (this_insn), inloc))) 1968 { 1969 unsigned int i; 1970 1971 for (i = 0; i < nwords; i++) 1972 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1973 regno + i)) 1974 break; 1975 1976 if (i == nwords) 1977 { 1978 /* If we were going to use OUT as the reload reg 1979 and changed our mind, it means OUT is a dummy that 1980 dies here. So don't bother copying value to it. */ 1981 if (for_real >= 0 && value == real_out) 1982 rld[for_real].out = 0; 1983 if (GET_CODE (real_in) == REG) 1984 value = real_in; 1985 else 1986 value = gen_rtx_REG (inmode, regno); 1987 } 1988 } 1989 } 1990 1991 return value; 1992} 1993 1994/* This page contains subroutines used mainly for determining 1995 whether the IN or an OUT of a reload can serve as the 1996 reload register. */ 1997 1998/* Return 1 if X is an operand of an insn that is being earlyclobbered. */ 1999 2000int 2001earlyclobber_operand_p (x) 2002 rtx x; 2003{ 2004 int i; 2005 2006 for (i = 0; i < n_earlyclobbers; i++) 2007 if (reload_earlyclobbers[i] == x) 2008 return 1; 2009 2010 return 0; 2011} 2012 2013/* Return 1 if expression X alters a hard reg in the range 2014 from BEG_REGNO (inclusive) to END_REGNO (exclusive), 2015 either explicitly or in the guise of a pseudo-reg allocated to REGNO. 2016 X should be the body of an instruction. */ 2017 2018static int 2019hard_reg_set_here_p (beg_regno, end_regno, x) 2020 unsigned int beg_regno, end_regno; 2021 rtx x; 2022{ 2023 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER) 2024 { 2025 rtx op0 = SET_DEST (x); 2026 2027 while (GET_CODE (op0) == SUBREG) 2028 op0 = SUBREG_REG (op0); 2029 if (GET_CODE (op0) == REG) 2030 { 2031 unsigned int r = REGNO (op0); 2032 2033 /* See if this reg overlaps range under consideration. */ 2034 if (r < end_regno 2035 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno) 2036 return 1; 2037 } 2038 } 2039 else if (GET_CODE (x) == PARALLEL) 2040 { 2041 int i = XVECLEN (x, 0) - 1; 2042 2043 for (; i >= 0; i--) 2044 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i))) 2045 return 1; 2046 } 2047 2048 return 0; 2049} 2050 2051/* Return 1 if ADDR is a valid memory address for mode MODE, 2052 and check that each pseudo reg has the proper kind of 2053 hard reg. */ 2054 2055int 2056strict_memory_address_p (mode, addr) 2057 enum machine_mode mode ATTRIBUTE_UNUSED; 2058 rtx addr; 2059{ 2060 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win); 2061 return 0; 2062 2063 win: 2064 return 1; 2065} 2066 2067/* Like rtx_equal_p except that it allows a REG and a SUBREG to match 2068 if they are the same hard reg, and has special hacks for 2069 autoincrement and autodecrement. 2070 This is specifically intended for find_reloads to use 2071 in determining whether two operands match. 2072 X is the operand whose number is the lower of the two. 2073 2074 The value is 2 if Y contains a pre-increment that matches 2075 a non-incrementing address in X. */ 2076 2077/* ??? To be completely correct, we should arrange to pass 2078 for X the output operand and for Y the input operand. 2079 For now, we assume that the output operand has the lower number 2080 because that is natural in (SET output (... input ...)). */ 2081 2082int 2083operands_match_p (x, y) 2084 rtx x, y; 2085{ 2086 int i; 2087 RTX_CODE code = GET_CODE (x); 2088 const char *fmt; 2089 int success_2; 2090 2091 if (x == y) 2092 return 1; 2093 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)) 2094 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG 2095 && GET_CODE (SUBREG_REG (y)) == REG))) 2096 { 2097 int j; 2098 2099 if (code == SUBREG) 2100 { 2101 i = REGNO (SUBREG_REG (x)); 2102 if (i >= FIRST_PSEUDO_REGISTER) 2103 goto slow; 2104 i += subreg_regno_offset (REGNO (SUBREG_REG (x)), 2105 GET_MODE (SUBREG_REG (x)), 2106 SUBREG_BYTE (x), 2107 GET_MODE (x)); 2108 } 2109 else 2110 i = REGNO (x); 2111 2112 if (GET_CODE (y) == SUBREG) 2113 { 2114 j = REGNO (SUBREG_REG (y)); 2115 if (j >= FIRST_PSEUDO_REGISTER) 2116 goto slow; 2117 j += subreg_regno_offset (REGNO (SUBREG_REG (y)), 2118 GET_MODE (SUBREG_REG (y)), 2119 SUBREG_BYTE (y), 2120 GET_MODE (y)); 2121 } 2122 else 2123 j = REGNO (y); 2124 2125 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a 2126 multiple hard register group, so that for example (reg:DI 0) and 2127 (reg:SI 1) will be considered the same register. */ 2128 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD 2129 && i < FIRST_PSEUDO_REGISTER) 2130 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1; 2131 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD 2132 && j < FIRST_PSEUDO_REGISTER) 2133 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1; 2134 2135 return i == j; 2136 } 2137 /* If two operands must match, because they are really a single 2138 operand of an assembler insn, then two postincrements are invalid 2139 because the assembler insn would increment only once. 2140 On the other hand, an postincrement matches ordinary indexing 2141 if the postincrement is the output operand. */ 2142 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY) 2143 return operands_match_p (XEXP (x, 0), y); 2144 /* Two preincrements are invalid 2145 because the assembler insn would increment only once. 2146 On the other hand, an preincrement matches ordinary indexing 2147 if the preincrement is the input operand. 2148 In this case, return 2, since some callers need to do special 2149 things when this happens. */ 2150 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC 2151 || GET_CODE (y) == PRE_MODIFY) 2152 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0; 2153 2154 slow: 2155 2156 /* Now we have disposed of all the cases 2157 in which different rtx codes can match. */ 2158 if (code != GET_CODE (y)) 2159 return 0; 2160 if (code == LABEL_REF) 2161 return XEXP (x, 0) == XEXP (y, 0); 2162 if (code == SYMBOL_REF) 2163 return XSTR (x, 0) == XSTR (y, 0); 2164 2165 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ 2166 2167 if (GET_MODE (x) != GET_MODE (y)) 2168 return 0; 2169 2170 /* Compare the elements. If any pair of corresponding elements 2171 fail to match, return 0 for the whole things. */ 2172 2173 success_2 = 0; 2174 fmt = GET_RTX_FORMAT (code); 2175 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2176 { 2177 int val, j; 2178 switch (fmt[i]) 2179 { 2180 case 'w': 2181 if (XWINT (x, i) != XWINT (y, i)) 2182 return 0; 2183 break; 2184 2185 case 'i': 2186 if (XINT (x, i) != XINT (y, i)) 2187 return 0; 2188 break; 2189 2190 case 'e': 2191 val = operands_match_p (XEXP (x, i), XEXP (y, i)); 2192 if (val == 0) 2193 return 0; 2194 /* If any subexpression returns 2, 2195 we should return 2 if we are successful. */ 2196 if (val == 2) 2197 success_2 = 1; 2198 break; 2199 2200 case '0': 2201 break; 2202 2203 case 'E': 2204 if (XVECLEN (x, i) != XVECLEN (y, i)) 2205 return 0; 2206 for (j = XVECLEN (x, i) - 1; j >= 0; --j) 2207 { 2208 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j)); 2209 if (val == 0) 2210 return 0; 2211 if (val == 2) 2212 success_2 = 1; 2213 } 2214 break; 2215 2216 /* It is believed that rtx's at this level will never 2217 contain anything but integers and other rtx's, 2218 except for within LABEL_REFs and SYMBOL_REFs. */ 2219 default: 2220 abort (); 2221 } 2222 } 2223 return 1 + success_2; 2224} 2225 2226/* Describe the range of registers or memory referenced by X. 2227 If X is a register, set REG_FLAG and put the first register 2228 number into START and the last plus one into END. 2229 If X is a memory reference, put a base address into BASE 2230 and a range of integer offsets into START and END. 2231 If X is pushing on the stack, we can assume it causes no trouble, 2232 so we set the SAFE field. */ 2233 2234static struct decomposition 2235decompose (x) 2236 rtx x; 2237{ 2238 struct decomposition val; 2239 int all_const = 0; 2240 2241 val.reg_flag = 0; 2242 val.safe = 0; 2243 val.base = 0; 2244 if (GET_CODE (x) == MEM) 2245 { 2246 rtx base = NULL_RTX, offset = 0; 2247 rtx addr = XEXP (x, 0); 2248 2249 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC 2250 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) 2251 { 2252 val.base = XEXP (addr, 0); 2253 val.start = -GET_MODE_SIZE (GET_MODE (x)); 2254 val.end = GET_MODE_SIZE (GET_MODE (x)); 2255 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM; 2256 return val; 2257 } 2258 2259 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY) 2260 { 2261 if (GET_CODE (XEXP (addr, 1)) == PLUS 2262 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0) 2263 && CONSTANT_P (XEXP (XEXP (addr, 1), 1))) 2264 { 2265 val.base = XEXP (addr, 0); 2266 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1)); 2267 val.end = INTVAL (XEXP (XEXP (addr, 1), 1)); 2268 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM; 2269 return val; 2270 } 2271 } 2272 2273 if (GET_CODE (addr) == CONST) 2274 { 2275 addr = XEXP (addr, 0); 2276 all_const = 1; 2277 } 2278 if (GET_CODE (addr) == PLUS) 2279 { 2280 if (CONSTANT_P (XEXP (addr, 0))) 2281 { 2282 base = XEXP (addr, 1); 2283 offset = XEXP (addr, 0); 2284 } 2285 else if (CONSTANT_P (XEXP (addr, 1))) 2286 { 2287 base = XEXP (addr, 0); 2288 offset = XEXP (addr, 1); 2289 } 2290 } 2291 2292 if (offset == 0) 2293 { 2294 base = addr; 2295 offset = const0_rtx; 2296 } 2297 if (GET_CODE (offset) == CONST) 2298 offset = XEXP (offset, 0); 2299 if (GET_CODE (offset) == PLUS) 2300 { 2301 if (GET_CODE (XEXP (offset, 0)) == CONST_INT) 2302 { 2303 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1)); 2304 offset = XEXP (offset, 0); 2305 } 2306 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT) 2307 { 2308 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0)); 2309 offset = XEXP (offset, 1); 2310 } 2311 else 2312 { 2313 base = gen_rtx_PLUS (GET_MODE (base), base, offset); 2314 offset = const0_rtx; 2315 } 2316 } 2317 else if (GET_CODE (offset) != CONST_INT) 2318 { 2319 base = gen_rtx_PLUS (GET_MODE (base), base, offset); 2320 offset = const0_rtx; 2321 } 2322 2323 if (all_const && GET_CODE (base) == PLUS) 2324 base = gen_rtx_CONST (GET_MODE (base), base); 2325 2326 if (GET_CODE (offset) != CONST_INT) 2327 abort (); 2328 2329 val.start = INTVAL (offset); 2330 val.end = val.start + GET_MODE_SIZE (GET_MODE (x)); 2331 val.base = base; 2332 return val; 2333 } 2334 else if (GET_CODE (x) == REG) 2335 { 2336 val.reg_flag = 1; 2337 val.start = true_regnum (x); 2338 if (val.start < 0) 2339 { 2340 /* A pseudo with no hard reg. */ 2341 val.start = REGNO (x); 2342 val.end = val.start + 1; 2343 } 2344 else 2345 /* A hard reg. */ 2346 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); 2347 } 2348 else if (GET_CODE (x) == SUBREG) 2349 { 2350 if (GET_CODE (SUBREG_REG (x)) != REG) 2351 /* This could be more precise, but it's good enough. */ 2352 return decompose (SUBREG_REG (x)); 2353 val.reg_flag = 1; 2354 val.start = true_regnum (x); 2355 if (val.start < 0) 2356 return decompose (SUBREG_REG (x)); 2357 else 2358 /* A hard reg. */ 2359 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); 2360 } 2361 else if (CONSTANT_P (x) 2362 /* This hasn't been assigned yet, so it can't conflict yet. */ 2363 || GET_CODE (x) == SCRATCH) 2364 val.safe = 1; 2365 else 2366 abort (); 2367 return val; 2368} 2369 2370/* Return 1 if altering Y will not modify the value of X. 2371 Y is also described by YDATA, which should be decompose (Y). */ 2372 2373static int 2374immune_p (x, y, ydata) 2375 rtx x, y; 2376 struct decomposition ydata; 2377{ 2378 struct decomposition xdata; 2379 2380 if (ydata.reg_flag) 2381 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0); 2382 if (ydata.safe) 2383 return 1; 2384 2385 if (GET_CODE (y) != MEM) 2386 abort (); 2387 /* If Y is memory and X is not, Y can't affect X. */ 2388 if (GET_CODE (x) != MEM) 2389 return 1; 2390 2391 xdata = decompose (x); 2392 2393 if (! rtx_equal_p (xdata.base, ydata.base)) 2394 { 2395 /* If bases are distinct symbolic constants, there is no overlap. */ 2396 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base)) 2397 return 1; 2398 /* Constants and stack slots never overlap. */ 2399 if (CONSTANT_P (xdata.base) 2400 && (ydata.base == frame_pointer_rtx 2401 || ydata.base == hard_frame_pointer_rtx 2402 || ydata.base == stack_pointer_rtx)) 2403 return 1; 2404 if (CONSTANT_P (ydata.base) 2405 && (xdata.base == frame_pointer_rtx 2406 || xdata.base == hard_frame_pointer_rtx 2407 || xdata.base == stack_pointer_rtx)) 2408 return 1; 2409 /* If either base is variable, we don't know anything. */ 2410 return 0; 2411 } 2412 2413 return (xdata.start >= ydata.end || ydata.start >= xdata.end); 2414} 2415 2416/* Similar, but calls decompose. */ 2417 2418int 2419safe_from_earlyclobber (op, clobber) 2420 rtx op, clobber; 2421{ 2422 struct decomposition early_data; 2423 2424 early_data = decompose (clobber); 2425 return immune_p (op, clobber, early_data); 2426} 2427 2428/* Main entry point of this file: search the body of INSN 2429 for values that need reloading and record them with push_reload. 2430 REPLACE nonzero means record also where the values occur 2431 so that subst_reloads can be used. 2432 2433 IND_LEVELS says how many levels of indirection are supported by this 2434 machine; a value of zero means that a memory reference is not a valid 2435 memory address. 2436 2437 LIVE_KNOWN says we have valid information about which hard 2438 regs are live at each point in the program; this is true when 2439 we are called from global_alloc but false when stupid register 2440 allocation has been done. 2441 2442 RELOAD_REG_P if nonzero is a vector indexed by hard reg number 2443 which is nonnegative if the reg has been commandeered for reloading into. 2444 It is copied into STATIC_RELOAD_REG_P and referenced from there 2445 by various subroutines. 2446 2447 Return TRUE if some operands need to be changed, because of swapping 2448 commutative operands, reg_equiv_address substitution, or whatever. */ 2449 2450int 2451find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) 2452 rtx insn; 2453 int replace, ind_levels; 2454 int live_known; 2455 short *reload_reg_p; 2456{ 2457 int insn_code_number; 2458 int i, j; 2459 int noperands; 2460 /* These start out as the constraints for the insn 2461 and they are chewed up as we consider alternatives. */ 2462 char *constraints[MAX_RECOG_OPERANDS]; 2463 /* These are the preferred classes for an operand, or NO_REGS if it isn't 2464 a register. */ 2465 enum reg_class preferred_class[MAX_RECOG_OPERANDS]; 2466 char pref_or_nothing[MAX_RECOG_OPERANDS]; 2467 /* Nonzero for a MEM operand whose entire address needs a reload. */ 2468 int address_reloaded[MAX_RECOG_OPERANDS]; 2469 /* Value of enum reload_type to use for operand. */ 2470 enum reload_type operand_type[MAX_RECOG_OPERANDS]; 2471 /* Value of enum reload_type to use within address of operand. */ 2472 enum reload_type address_type[MAX_RECOG_OPERANDS]; 2473 /* Save the usage of each operand. */ 2474 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS]; 2475 int no_input_reloads = 0, no_output_reloads = 0; 2476 int n_alternatives; 2477 int this_alternative[MAX_RECOG_OPERANDS]; 2478 char this_alternative_match_win[MAX_RECOG_OPERANDS]; 2479 char this_alternative_win[MAX_RECOG_OPERANDS]; 2480 char this_alternative_offmemok[MAX_RECOG_OPERANDS]; 2481 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS]; 2482 int this_alternative_matches[MAX_RECOG_OPERANDS]; 2483 int swapped; 2484 int goal_alternative[MAX_RECOG_OPERANDS]; 2485 int this_alternative_number; 2486 int goal_alternative_number = 0; 2487 int operand_reloadnum[MAX_RECOG_OPERANDS]; 2488 int goal_alternative_matches[MAX_RECOG_OPERANDS]; 2489 int goal_alternative_matched[MAX_RECOG_OPERANDS]; 2490 char goal_alternative_match_win[MAX_RECOG_OPERANDS]; 2491 char goal_alternative_win[MAX_RECOG_OPERANDS]; 2492 char goal_alternative_offmemok[MAX_RECOG_OPERANDS]; 2493 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS]; 2494 int goal_alternative_swapped; 2495 int best; 2496 int commutative; 2497 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS]; 2498 rtx substed_operand[MAX_RECOG_OPERANDS]; 2499 rtx body = PATTERN (insn); 2500 rtx set = single_set (insn); 2501 int goal_earlyclobber = 0, this_earlyclobber; 2502 enum machine_mode operand_mode[MAX_RECOG_OPERANDS]; 2503 int retval = 0; 2504 2505 this_insn = insn; 2506 n_reloads = 0; 2507 n_replacements = 0; 2508 n_earlyclobbers = 0; 2509 replace_reloads = replace; 2510 hard_regs_live_known = live_known; 2511 static_reload_reg_p = reload_reg_p; 2512 2513 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads; 2514 neither are insns that SET cc0. Insns that use CC0 are not allowed 2515 to have any input reloads. */ 2516 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN) 2517 no_output_reloads = 1; 2518 2519#ifdef HAVE_cc0 2520 if (reg_referenced_p (cc0_rtx, PATTERN (insn))) 2521 no_input_reloads = 1; 2522 if (reg_set_p (cc0_rtx, PATTERN (insn))) 2523 no_output_reloads = 1; 2524#endif 2525 2526#ifdef SECONDARY_MEMORY_NEEDED 2527 /* The eliminated forms of any secondary memory locations are per-insn, so 2528 clear them out here. */ 2529 2530 memset ((char *) secondary_memlocs_elim, 0, sizeof secondary_memlocs_elim); 2531#endif 2532 2533 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it 2534 is cheap to move between them. If it is not, there may not be an insn 2535 to do the copy, so we may need a reload. */ 2536 if (GET_CODE (body) == SET 2537 && GET_CODE (SET_DEST (body)) == REG 2538 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER 2539 && GET_CODE (SET_SRC (body)) == REG 2540 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER 2541 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)), 2542 REGNO_REG_CLASS (REGNO (SET_SRC (body))), 2543 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2) 2544 return 0; 2545 2546 extract_insn (insn); 2547 2548 noperands = reload_n_operands = recog_data.n_operands; 2549 n_alternatives = recog_data.n_alternatives; 2550 2551 /* Just return "no reloads" if insn has no operands with constraints. */ 2552 if (noperands == 0 || n_alternatives == 0) 2553 return 0; 2554 2555 insn_code_number = INSN_CODE (insn); 2556 this_insn_is_asm = insn_code_number < 0; 2557 2558 memcpy (operand_mode, recog_data.operand_mode, 2559 noperands * sizeof (enum machine_mode)); 2560 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *)); 2561 2562 commutative = -1; 2563 2564 /* If we will need to know, later, whether some pair of operands 2565 are the same, we must compare them now and save the result. 2566 Reloading the base and index registers will clobber them 2567 and afterward they will fail to match. */ 2568 2569 for (i = 0; i < noperands; i++) 2570 { 2571 char *p; 2572 int c; 2573 2574 substed_operand[i] = recog_data.operand[i]; 2575 p = constraints[i]; 2576 2577 modified[i] = RELOAD_READ; 2578 2579 /* Scan this operand's constraint to see if it is an output operand, 2580 an in-out operand, is commutative, or should match another. */ 2581 2582 while ((c = *p++)) 2583 { 2584 if (c == '=') 2585 modified[i] = RELOAD_WRITE; 2586 else if (c == '+') 2587 modified[i] = RELOAD_READ_WRITE; 2588 else if (c == '%') 2589 { 2590 /* The last operand should not be marked commutative. */ 2591 if (i == noperands - 1) 2592 abort (); 2593 2594 commutative = i; 2595 } 2596 else if (ISDIGIT (c)) 2597 { 2598 c = strtoul (p - 1, &p, 10); 2599 2600 operands_match[c][i] 2601 = operands_match_p (recog_data.operand[c], 2602 recog_data.operand[i]); 2603 2604 /* An operand may not match itself. */ 2605 if (c == i) 2606 abort (); 2607 2608 /* If C can be commuted with C+1, and C might need to match I, 2609 then C+1 might also need to match I. */ 2610 if (commutative >= 0) 2611 { 2612 if (c == commutative || c == commutative + 1) 2613 { 2614 int other = c + (c == commutative ? 1 : -1); 2615 operands_match[other][i] 2616 = operands_match_p (recog_data.operand[other], 2617 recog_data.operand[i]); 2618 } 2619 if (i == commutative || i == commutative + 1) 2620 { 2621 int other = i + (i == commutative ? 1 : -1); 2622 operands_match[c][other] 2623 = operands_match_p (recog_data.operand[c], 2624 recog_data.operand[other]); 2625 } 2626 /* Note that C is supposed to be less than I. 2627 No need to consider altering both C and I because in 2628 that case we would alter one into the other. */ 2629 } 2630 } 2631 } 2632 } 2633 2634 /* Examine each operand that is a memory reference or memory address 2635 and reload parts of the addresses into index registers. 2636 Also here any references to pseudo regs that didn't get hard regs 2637 but are equivalent to constants get replaced in the insn itself 2638 with those constants. Nobody will ever see them again. 2639 2640 Finally, set up the preferred classes of each operand. */ 2641 2642 for (i = 0; i < noperands; i++) 2643 { 2644 RTX_CODE code = GET_CODE (recog_data.operand[i]); 2645 2646 address_reloaded[i] = 0; 2647 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT 2648 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT 2649 : RELOAD_OTHER); 2650 address_type[i] 2651 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS 2652 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS 2653 : RELOAD_OTHER); 2654 2655 if (*constraints[i] == 0) 2656 /* Ignore things like match_operator operands. */ 2657 ; 2658 else if (constraints[i][0] == 'p') 2659 { 2660 find_reloads_address (recog_data.operand_mode[i], (rtx*) 0, 2661 recog_data.operand[i], 2662 recog_data.operand_loc[i], 2663 i, operand_type[i], ind_levels, insn); 2664 2665 /* If we now have a simple operand where we used to have a 2666 PLUS or MULT, re-recognize and try again. */ 2667 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o' 2668 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG) 2669 && (GET_CODE (recog_data.operand[i]) == MULT 2670 || GET_CODE (recog_data.operand[i]) == PLUS)) 2671 { 2672 INSN_CODE (insn) = -1; 2673 retval = find_reloads (insn, replace, ind_levels, live_known, 2674 reload_reg_p); 2675 return retval; 2676 } 2677 2678 recog_data.operand[i] = *recog_data.operand_loc[i]; 2679 substed_operand[i] = recog_data.operand[i]; 2680 } 2681 else if (code == MEM) 2682 { 2683 address_reloaded[i] 2684 = find_reloads_address (GET_MODE (recog_data.operand[i]), 2685 recog_data.operand_loc[i], 2686 XEXP (recog_data.operand[i], 0), 2687 &XEXP (recog_data.operand[i], 0), 2688 i, address_type[i], ind_levels, insn); 2689 recog_data.operand[i] = *recog_data.operand_loc[i]; 2690 substed_operand[i] = recog_data.operand[i]; 2691 } 2692 else if (code == SUBREG) 2693 { 2694 rtx reg = SUBREG_REG (recog_data.operand[i]); 2695 rtx op 2696 = find_reloads_toplev (recog_data.operand[i], i, address_type[i], 2697 ind_levels, 2698 set != 0 2699 && &SET_DEST (set) == recog_data.operand_loc[i], 2700 insn, 2701 &address_reloaded[i]); 2702 2703 /* If we made a MEM to load (a part of) the stackslot of a pseudo 2704 that didn't get a hard register, emit a USE with a REG_EQUAL 2705 note in front so that we might inherit a previous, possibly 2706 wider reload. */ 2707 2708 if (replace 2709 && GET_CODE (op) == MEM 2710 && GET_CODE (reg) == REG 2711 && (GET_MODE_SIZE (GET_MODE (reg)) 2712 >= GET_MODE_SIZE (GET_MODE (op)))) 2713 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg), 2714 insn), 2715 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]); 2716 2717 substed_operand[i] = recog_data.operand[i] = op; 2718 } 2719 else if (code == PLUS || GET_RTX_CLASS (code) == '1') 2720 /* We can get a PLUS as an "operand" as a result of register 2721 elimination. See eliminate_regs and gen_reload. We handle 2722 a unary operator by reloading the operand. */ 2723 substed_operand[i] = recog_data.operand[i] 2724 = find_reloads_toplev (recog_data.operand[i], i, address_type[i], 2725 ind_levels, 0, insn, 2726 &address_reloaded[i]); 2727 else if (code == REG) 2728 { 2729 /* This is equivalent to calling find_reloads_toplev. 2730 The code is duplicated for speed. 2731 When we find a pseudo always equivalent to a constant, 2732 we replace it by the constant. We must be sure, however, 2733 that we don't try to replace it in the insn in which it 2734 is being set. */ 2735 int regno = REGNO (recog_data.operand[i]); 2736 if (reg_equiv_constant[regno] != 0 2737 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i])) 2738 { 2739 /* Record the existing mode so that the check if constants are 2740 allowed will work when operand_mode isn't specified. */ 2741 2742 if (operand_mode[i] == VOIDmode) 2743 operand_mode[i] = GET_MODE (recog_data.operand[i]); 2744 2745 substed_operand[i] = recog_data.operand[i] 2746 = reg_equiv_constant[regno]; 2747 } 2748 if (reg_equiv_memory_loc[regno] != 0 2749 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 2750 /* We need not give a valid is_set_dest argument since the case 2751 of a constant equivalence was checked above. */ 2752 substed_operand[i] = recog_data.operand[i] 2753 = find_reloads_toplev (recog_data.operand[i], i, address_type[i], 2754 ind_levels, 0, insn, 2755 &address_reloaded[i]); 2756 } 2757 /* If the operand is still a register (we didn't replace it with an 2758 equivalent), get the preferred class to reload it into. */ 2759 code = GET_CODE (recog_data.operand[i]); 2760 preferred_class[i] 2761 = ((code == REG && REGNO (recog_data.operand[i]) 2762 >= FIRST_PSEUDO_REGISTER) 2763 ? reg_preferred_class (REGNO (recog_data.operand[i])) 2764 : NO_REGS); 2765 pref_or_nothing[i] 2766 = (code == REG 2767 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER 2768 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS); 2769 } 2770 2771 /* If this is simply a copy from operand 1 to operand 0, merge the 2772 preferred classes for the operands. */ 2773 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set) 2774 && recog_data.operand[1] == SET_SRC (set)) 2775 { 2776 preferred_class[0] = preferred_class[1] 2777 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]]; 2778 pref_or_nothing[0] |= pref_or_nothing[1]; 2779 pref_or_nothing[1] |= pref_or_nothing[0]; 2780 } 2781 2782 /* Now see what we need for pseudo-regs that didn't get hard regs 2783 or got the wrong kind of hard reg. For this, we must consider 2784 all the operands together against the register constraints. */ 2785 2786 best = MAX_RECOG_OPERANDS * 2 + 600; 2787 2788 swapped = 0; 2789 goal_alternative_swapped = 0; 2790 try_swapped: 2791 2792 /* The constraints are made of several alternatives. 2793 Each operand's constraint looks like foo,bar,... with commas 2794 separating the alternatives. The first alternatives for all 2795 operands go together, the second alternatives go together, etc. 2796 2797 First loop over alternatives. */ 2798 2799 for (this_alternative_number = 0; 2800 this_alternative_number < n_alternatives; 2801 this_alternative_number++) 2802 { 2803 /* Loop over operands for one constraint alternative. */ 2804 /* LOSERS counts those that don't fit this alternative 2805 and would require loading. */ 2806 int losers = 0; 2807 /* BAD is set to 1 if it some operand can't fit this alternative 2808 even after reloading. */ 2809 int bad = 0; 2810 /* REJECT is a count of how undesirable this alternative says it is 2811 if any reloading is required. If the alternative matches exactly 2812 then REJECT is ignored, but otherwise it gets this much 2813 counted against it in addition to the reloading needed. Each 2814 ? counts three times here since we want the disparaging caused by 2815 a bad register class to only count 1/3 as much. */ 2816 int reject = 0; 2817 2818 this_earlyclobber = 0; 2819 2820 for (i = 0; i < noperands; i++) 2821 { 2822 char *p = constraints[i]; 2823 int win = 0; 2824 int did_match = 0; 2825 /* 0 => this operand can be reloaded somehow for this alternative. */ 2826 int badop = 1; 2827 /* 0 => this operand can be reloaded if the alternative allows regs. */ 2828 int winreg = 0; 2829 int c; 2830 rtx operand = recog_data.operand[i]; 2831 int offset = 0; 2832 /* Nonzero means this is a MEM that must be reloaded into a reg 2833 regardless of what the constraint says. */ 2834 int force_reload = 0; 2835 int offmemok = 0; 2836 /* Nonzero if a constant forced into memory would be OK for this 2837 operand. */ 2838 int constmemok = 0; 2839 int earlyclobber = 0; 2840 2841 /* If the predicate accepts a unary operator, it means that 2842 we need to reload the operand, but do not do this for 2843 match_operator and friends. */ 2844 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0) 2845 operand = XEXP (operand, 0); 2846 2847 /* If the operand is a SUBREG, extract 2848 the REG or MEM (or maybe even a constant) within. 2849 (Constants can occur as a result of reg_equiv_constant.) */ 2850 2851 while (GET_CODE (operand) == SUBREG) 2852 { 2853 /* Offset only matters when operand is a REG and 2854 it is a hard reg. This is because it is passed 2855 to reg_fits_class_p if it is a REG and all pseudos 2856 return 0 from that function. */ 2857 if (GET_CODE (SUBREG_REG (operand)) == REG 2858 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER) 2859 { 2860 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)), 2861 GET_MODE (SUBREG_REG (operand)), 2862 SUBREG_BYTE (operand), 2863 GET_MODE (operand)); 2864 } 2865 operand = SUBREG_REG (operand); 2866 /* Force reload if this is a constant or PLUS or if there may 2867 be a problem accessing OPERAND in the outer mode. */ 2868 if (CONSTANT_P (operand) 2869 || GET_CODE (operand) == PLUS 2870 /* We must force a reload of paradoxical SUBREGs 2871 of a MEM because the alignment of the inner value 2872 may not be enough to do the outer reference. On 2873 big-endian machines, it may also reference outside 2874 the object. 2875 2876 On machines that extend byte operations and we have a 2877 SUBREG where both the inner and outer modes are no wider 2878 than a word and the inner mode is narrower, is integral, 2879 and gets extended when loaded from memory, combine.c has 2880 made assumptions about the behavior of the machine in such 2881 register access. If the data is, in fact, in memory we 2882 must always load using the size assumed to be in the 2883 register and let the insn do the different-sized 2884 accesses. 2885 2886 This is doubly true if WORD_REGISTER_OPERATIONS. In 2887 this case eliminate_regs has left non-paradoxical 2888 subregs for push_reloads to see. Make sure it does 2889 by forcing the reload. 2890 2891 ??? When is it right at this stage to have a subreg 2892 of a mem that is _not_ to be handled specialy? IMO 2893 those should have been reduced to just a mem. */ 2894 || ((GET_CODE (operand) == MEM 2895 || (GET_CODE (operand)== REG 2896 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 2897#ifndef WORD_REGISTER_OPERATIONS 2898 && (((GET_MODE_BITSIZE (GET_MODE (operand)) 2899 < BIGGEST_ALIGNMENT) 2900 && (GET_MODE_SIZE (operand_mode[i]) 2901 > GET_MODE_SIZE (GET_MODE (operand)))) 2902 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN) 2903#ifdef LOAD_EXTEND_OP 2904 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 2905 && (GET_MODE_SIZE (GET_MODE (operand)) 2906 <= UNITS_PER_WORD) 2907 && (GET_MODE_SIZE (operand_mode[i]) 2908 > GET_MODE_SIZE (GET_MODE (operand))) 2909 && INTEGRAL_MODE_P (GET_MODE (operand)) 2910 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL) 2911#endif 2912 ) 2913#endif 2914 ) 2915 /* This following hunk of code should no longer be 2916 needed at all with SUBREG_BYTE. If you need this 2917 code back, please explain to me why so I can 2918 fix the real problem. -DaveM */ 2919#if 0 2920 /* Subreg of a hard reg which can't handle the subreg's mode 2921 or which would handle that mode in the wrong number of 2922 registers for subregging to work. */ 2923 || (GET_CODE (operand) == REG 2924 && REGNO (operand) < FIRST_PSEUDO_REGISTER 2925 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 2926 && (GET_MODE_SIZE (GET_MODE (operand)) 2927 > UNITS_PER_WORD) 2928 && ((GET_MODE_SIZE (GET_MODE (operand)) 2929 / UNITS_PER_WORD) 2930 != HARD_REGNO_NREGS (REGNO (operand), 2931 GET_MODE (operand)))) 2932 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset, 2933 operand_mode[i]))) 2934#endif 2935 ) 2936 force_reload = 1; 2937 } 2938 2939 this_alternative[i] = (int) NO_REGS; 2940 this_alternative_win[i] = 0; 2941 this_alternative_match_win[i] = 0; 2942 this_alternative_offmemok[i] = 0; 2943 this_alternative_earlyclobber[i] = 0; 2944 this_alternative_matches[i] = -1; 2945 2946 /* An empty constraint or empty alternative 2947 allows anything which matched the pattern. */ 2948 if (*p == 0 || *p == ',') 2949 win = 1, badop = 0; 2950 2951 /* Scan this alternative's specs for this operand; 2952 set WIN if the operand fits any letter in this alternative. 2953 Otherwise, clear BADOP if this operand could 2954 fit some letter after reloads, 2955 or set WINREG if this operand could fit after reloads 2956 provided the constraint allows some registers. */ 2957 2958 while (*p && (c = *p++) != ',') 2959 switch (c) 2960 { 2961 case '=': case '+': case '*': 2962 break; 2963 2964 case '%': 2965 /* The last operand should not be marked commutative. */ 2966 if (i != noperands - 1) 2967 commutative = i; 2968 break; 2969 2970 case '?': 2971 reject += 6; 2972 break; 2973 2974 case '!': 2975 reject = 600; 2976 break; 2977 2978 case '#': 2979 /* Ignore rest of this alternative as far as 2980 reloading is concerned. */ 2981 while (*p && *p != ',') 2982 p++; 2983 break; 2984 2985 case '0': case '1': case '2': case '3': case '4': 2986 case '5': case '6': case '7': case '8': case '9': 2987 c = strtoul (p - 1, &p, 10); 2988 2989 this_alternative_matches[i] = c; 2990 /* We are supposed to match a previous operand. 2991 If we do, we win if that one did. 2992 If we do not, count both of the operands as losers. 2993 (This is too conservative, since most of the time 2994 only a single reload insn will be needed to make 2995 the two operands win. As a result, this alternative 2996 may be rejected when it is actually desirable.) */ 2997 if ((swapped && (c != commutative || i != commutative + 1)) 2998 /* If we are matching as if two operands were swapped, 2999 also pretend that operands_match had been computed 3000 with swapped. 3001 But if I is the second of those and C is the first, 3002 don't exchange them, because operands_match is valid 3003 only on one side of its diagonal. */ 3004 ? (operands_match 3005 [(c == commutative || c == commutative + 1) 3006 ? 2 * commutative + 1 - c : c] 3007 [(i == commutative || i == commutative + 1) 3008 ? 2 * commutative + 1 - i : i]) 3009 : operands_match[c][i]) 3010 { 3011 /* If we are matching a non-offsettable address where an 3012 offsettable address was expected, then we must reject 3013 this combination, because we can't reload it. */ 3014 if (this_alternative_offmemok[c] 3015 && GET_CODE (recog_data.operand[c]) == MEM 3016 && this_alternative[c] == (int) NO_REGS 3017 && ! this_alternative_win[c]) 3018 bad = 1; 3019 3020 did_match = this_alternative_win[c]; 3021 } 3022 else 3023 { 3024 /* Operands don't match. */ 3025 rtx value; 3026 /* Retroactively mark the operand we had to match 3027 as a loser, if it wasn't already. */ 3028 if (this_alternative_win[c]) 3029 losers++; 3030 this_alternative_win[c] = 0; 3031 if (this_alternative[c] == (int) NO_REGS) 3032 bad = 1; 3033 /* But count the pair only once in the total badness of 3034 this alternative, if the pair can be a dummy reload. */ 3035 value 3036 = find_dummy_reload (recog_data.operand[i], 3037 recog_data.operand[c], 3038 recog_data.operand_loc[i], 3039 recog_data.operand_loc[c], 3040 operand_mode[i], operand_mode[c], 3041 this_alternative[c], -1, 3042 this_alternative_earlyclobber[c]); 3043 3044 if (value != 0) 3045 losers--; 3046 } 3047 /* This can be fixed with reloads if the operand 3048 we are supposed to match can be fixed with reloads. */ 3049 badop = 0; 3050 this_alternative[i] = this_alternative[c]; 3051 3052 /* If we have to reload this operand and some previous 3053 operand also had to match the same thing as this 3054 operand, we don't know how to do that. So reject this 3055 alternative. */ 3056 if (! did_match || force_reload) 3057 for (j = 0; j < i; j++) 3058 if (this_alternative_matches[j] 3059 == this_alternative_matches[i]) 3060 badop = 1; 3061 break; 3062 3063 case 'p': 3064 /* All necessary reloads for an address_operand 3065 were handled in find_reloads_address. */ 3066 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode); 3067 win = 1; 3068 badop = 0; 3069 break; 3070 3071 case 'm': 3072 if (force_reload) 3073 break; 3074 if (GET_CODE (operand) == MEM 3075 || (GET_CODE (operand) == REG 3076 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3077 && reg_renumber[REGNO (operand)] < 0)) 3078 win = 1; 3079 if (CONSTANT_P (operand) 3080 /* force_const_mem does not accept HIGH. */ 3081 && GET_CODE (operand) != HIGH) 3082 badop = 0; 3083 constmemok = 1; 3084 break; 3085 3086 case '<': 3087 if (GET_CODE (operand) == MEM 3088 && ! address_reloaded[i] 3089 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC 3090 || GET_CODE (XEXP (operand, 0)) == POST_DEC)) 3091 win = 1; 3092 break; 3093 3094 case '>': 3095 if (GET_CODE (operand) == MEM 3096 && ! address_reloaded[i] 3097 && (GET_CODE (XEXP (operand, 0)) == PRE_INC 3098 || GET_CODE (XEXP (operand, 0)) == POST_INC)) 3099 win = 1; 3100 break; 3101 3102 /* Memory operand whose address is not offsettable. */ 3103 case 'V': 3104 if (force_reload) 3105 break; 3106 if (GET_CODE (operand) == MEM 3107 && ! (ind_levels ? offsettable_memref_p (operand) 3108 : offsettable_nonstrict_memref_p (operand)) 3109 /* Certain mem addresses will become offsettable 3110 after they themselves are reloaded. This is important; 3111 we don't want our own handling of unoffsettables 3112 to override the handling of reg_equiv_address. */ 3113 && !(GET_CODE (XEXP (operand, 0)) == REG 3114 && (ind_levels == 0 3115 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))) 3116 win = 1; 3117 break; 3118 3119 /* Memory operand whose address is offsettable. */ 3120 case 'o': 3121 if (force_reload) 3122 break; 3123 if ((GET_CODE (operand) == MEM 3124 /* If IND_LEVELS, find_reloads_address won't reload a 3125 pseudo that didn't get a hard reg, so we have to 3126 reject that case. */ 3127 && ((ind_levels ? offsettable_memref_p (operand) 3128 : offsettable_nonstrict_memref_p (operand)) 3129 /* A reloaded address is offsettable because it is now 3130 just a simple register indirect. */ 3131 || address_reloaded[i])) 3132 || (GET_CODE (operand) == REG 3133 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3134 && reg_renumber[REGNO (operand)] < 0 3135 /* If reg_equiv_address is nonzero, we will be 3136 loading it into a register; hence it will be 3137 offsettable, but we cannot say that reg_equiv_mem 3138 is offsettable without checking. */ 3139 && ((reg_equiv_mem[REGNO (operand)] != 0 3140 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)])) 3141 || (reg_equiv_address[REGNO (operand)] != 0)))) 3142 win = 1; 3143 /* force_const_mem does not accept HIGH. */ 3144 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH) 3145 || GET_CODE (operand) == MEM) 3146 badop = 0; 3147 constmemok = 1; 3148 offmemok = 1; 3149 break; 3150 3151 case '&': 3152 /* Output operand that is stored before the need for the 3153 input operands (and their index registers) is over. */ 3154 earlyclobber = 1, this_earlyclobber = 1; 3155 break; 3156 3157 case 'E': 3158#ifndef REAL_ARITHMETIC 3159 /* Match any floating double constant, but only if 3160 we can examine the bits of it reliably. */ 3161 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT 3162 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD) 3163 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float) 3164 break; 3165#endif 3166 if (GET_CODE (operand) == CONST_DOUBLE) 3167 win = 1; 3168 break; 3169 3170 case 'F': 3171 if (GET_CODE (operand) == CONST_DOUBLE) 3172 win = 1; 3173 break; 3174 3175 case 'G': 3176 case 'H': 3177 if (GET_CODE (operand) == CONST_DOUBLE 3178 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c)) 3179 win = 1; 3180 break; 3181 3182 case 's': 3183 if (GET_CODE (operand) == CONST_INT 3184 || (GET_CODE (operand) == CONST_DOUBLE 3185 && GET_MODE (operand) == VOIDmode)) 3186 break; 3187 case 'i': 3188 if (CONSTANT_P (operand) 3189#ifdef LEGITIMATE_PIC_OPERAND_P 3190 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)) 3191#endif 3192 ) 3193 win = 1; 3194 break; 3195 3196 case 'n': 3197 if (GET_CODE (operand) == CONST_INT 3198 || (GET_CODE (operand) == CONST_DOUBLE 3199 && GET_MODE (operand) == VOIDmode)) 3200 win = 1; 3201 break; 3202 3203 case 'I': 3204 case 'J': 3205 case 'K': 3206 case 'L': 3207 case 'M': 3208 case 'N': 3209 case 'O': 3210 case 'P': 3211 if (GET_CODE (operand) == CONST_INT 3212 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c)) 3213 win = 1; 3214 break; 3215 3216 case 'X': 3217 win = 1; 3218 break; 3219 3220 case 'g': 3221 if (! force_reload 3222 /* A PLUS is never a valid operand, but reload can make 3223 it from a register when eliminating registers. */ 3224 && GET_CODE (operand) != PLUS 3225 /* A SCRATCH is not a valid operand. */ 3226 && GET_CODE (operand) != SCRATCH 3227#ifdef LEGITIMATE_PIC_OPERAND_P 3228 && (! CONSTANT_P (operand) 3229 || ! flag_pic 3230 || LEGITIMATE_PIC_OPERAND_P (operand)) 3231#endif 3232 && (GENERAL_REGS == ALL_REGS 3233 || GET_CODE (operand) != REG 3234 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER 3235 && reg_renumber[REGNO (operand)] < 0))) 3236 win = 1; 3237 /* Drop through into 'r' case. */ 3238 3239 case 'r': 3240 this_alternative[i] 3241 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS]; 3242 goto reg; 3243 3244 default: 3245 if (REG_CLASS_FROM_LETTER (c) == NO_REGS) 3246 { 3247#ifdef EXTRA_CONSTRAINT 3248 if (EXTRA_CONSTRAINT (operand, c)) 3249 win = 1; 3250#endif 3251 break; 3252 } 3253 3254 this_alternative[i] 3255 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)]; 3256 reg: 3257 if (GET_MODE (operand) == BLKmode) 3258 break; 3259 winreg = 1; 3260 if (GET_CODE (operand) == REG 3261 && reg_fits_class_p (operand, this_alternative[i], 3262 offset, GET_MODE (recog_data.operand[i]))) 3263 win = 1; 3264 break; 3265 } 3266 3267 constraints[i] = p; 3268 3269 /* If this operand could be handled with a reg, 3270 and some reg is allowed, then this operand can be handled. */ 3271 if (winreg && this_alternative[i] != (int) NO_REGS) 3272 badop = 0; 3273 3274 /* Record which operands fit this alternative. */ 3275 this_alternative_earlyclobber[i] = earlyclobber; 3276 if (win && ! force_reload) 3277 this_alternative_win[i] = 1; 3278 else if (did_match && ! force_reload) 3279 this_alternative_match_win[i] = 1; 3280 else 3281 { 3282 int const_to_mem = 0; 3283 3284 this_alternative_offmemok[i] = offmemok; 3285 losers++; 3286 if (badop) 3287 bad = 1; 3288 /* Alternative loses if it has no regs for a reg operand. */ 3289 if (GET_CODE (operand) == REG 3290 && this_alternative[i] == (int) NO_REGS 3291 && this_alternative_matches[i] < 0) 3292 bad = 1; 3293 3294 /* If this is a constant that is reloaded into the desired 3295 class by copying it to memory first, count that as another 3296 reload. This is consistent with other code and is 3297 required to avoid choosing another alternative when 3298 the constant is moved into memory by this function on 3299 an early reload pass. Note that the test here is 3300 precisely the same as in the code below that calls 3301 force_const_mem. */ 3302 if (CONSTANT_P (operand) 3303 /* force_const_mem does not accept HIGH. */ 3304 && GET_CODE (operand) != HIGH 3305 && ((PREFERRED_RELOAD_CLASS (operand, 3306 (enum reg_class) this_alternative[i]) 3307 == NO_REGS) 3308 || no_input_reloads) 3309 && operand_mode[i] != VOIDmode) 3310 { 3311 const_to_mem = 1; 3312 if (this_alternative[i] != (int) NO_REGS) 3313 losers++; 3314 } 3315 3316 /* If we can't reload this value at all, reject this 3317 alternative. Note that we could also lose due to 3318 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that 3319 here. */ 3320 3321 if (! CONSTANT_P (operand) 3322 && (enum reg_class) this_alternative[i] != NO_REGS 3323 && (PREFERRED_RELOAD_CLASS (operand, 3324 (enum reg_class) this_alternative[i]) 3325 == NO_REGS)) 3326 bad = 1; 3327 3328 /* Alternative loses if it requires a type of reload not 3329 permitted for this insn. We can always reload SCRATCH 3330 and objects with a REG_UNUSED note. */ 3331 else if (GET_CODE (operand) != SCRATCH 3332 && modified[i] != RELOAD_READ && no_output_reloads 3333 && ! find_reg_note (insn, REG_UNUSED, operand)) 3334 bad = 1; 3335 else if (modified[i] != RELOAD_WRITE && no_input_reloads 3336 && ! const_to_mem) 3337 bad = 1; 3338 3339 /* We prefer to reload pseudos over reloading other things, 3340 since such reloads may be able to be eliminated later. 3341 If we are reloading a SCRATCH, we won't be generating any 3342 insns, just using a register, so it is also preferred. 3343 So bump REJECT in other cases. Don't do this in the 3344 case where we are forcing a constant into memory and 3345 it will then win since we don't want to have a different 3346 alternative match then. */ 3347 if (! (GET_CODE (operand) == REG 3348 && REGNO (operand) >= FIRST_PSEUDO_REGISTER) 3349 && GET_CODE (operand) != SCRATCH 3350 && ! (const_to_mem && constmemok)) 3351 reject += 2; 3352 3353 /* Input reloads can be inherited more often than output 3354 reloads can be removed, so penalize output reloads. */ 3355 if (operand_type[i] != RELOAD_FOR_INPUT 3356 && GET_CODE (operand) != SCRATCH) 3357 reject++; 3358 } 3359 3360 /* If this operand is a pseudo register that didn't get a hard 3361 reg and this alternative accepts some register, see if the 3362 class that we want is a subset of the preferred class for this 3363 register. If not, but it intersects that class, use the 3364 preferred class instead. If it does not intersect the preferred 3365 class, show that usage of this alternative should be discouraged; 3366 it will be discouraged more still if the register is `preferred 3367 or nothing'. We do this because it increases the chance of 3368 reusing our spill register in a later insn and avoiding a pair 3369 of memory stores and loads. 3370 3371 Don't bother with this if this alternative will accept this 3372 operand. 3373 3374 Don't do this for a multiword operand, since it is only a 3375 small win and has the risk of requiring more spill registers, 3376 which could cause a large loss. 3377 3378 Don't do this if the preferred class has only one register 3379 because we might otherwise exhaust the class. */ 3380 3381 if (! win && ! did_match 3382 && this_alternative[i] != (int) NO_REGS 3383 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 3384 && reg_class_size[(int) preferred_class[i]] > 1) 3385 { 3386 if (! reg_class_subset_p (this_alternative[i], 3387 preferred_class[i])) 3388 { 3389 /* Since we don't have a way of forming the intersection, 3390 we just do something special if the preferred class 3391 is a subset of the class we have; that's the most 3392 common case anyway. */ 3393 if (reg_class_subset_p (preferred_class[i], 3394 this_alternative[i])) 3395 this_alternative[i] = (int) preferred_class[i]; 3396 else 3397 reject += (2 + 2 * pref_or_nothing[i]); 3398 } 3399 } 3400 } 3401 3402 /* Now see if any output operands that are marked "earlyclobber" 3403 in this alternative conflict with any input operands 3404 or any memory addresses. */ 3405 3406 for (i = 0; i < noperands; i++) 3407 if (this_alternative_earlyclobber[i] 3408 && (this_alternative_win[i] || this_alternative_match_win[i])) 3409 { 3410 struct decomposition early_data; 3411 3412 early_data = decompose (recog_data.operand[i]); 3413 3414 if (modified[i] == RELOAD_READ) 3415 abort (); 3416 3417 if (this_alternative[i] == NO_REGS) 3418 { 3419 this_alternative_earlyclobber[i] = 0; 3420 if (this_insn_is_asm) 3421 error_for_asm (this_insn, 3422 "`&' constraint used with no register class"); 3423 else 3424 abort (); 3425 } 3426 3427 for (j = 0; j < noperands; j++) 3428 /* Is this an input operand or a memory ref? */ 3429 if ((GET_CODE (recog_data.operand[j]) == MEM 3430 || modified[j] != RELOAD_WRITE) 3431 && j != i 3432 /* Ignore things like match_operator operands. */ 3433 && *recog_data.constraints[j] != 0 3434 /* Don't count an input operand that is constrained to match 3435 the early clobber operand. */ 3436 && ! (this_alternative_matches[j] == i 3437 && rtx_equal_p (recog_data.operand[i], 3438 recog_data.operand[j])) 3439 /* Is it altered by storing the earlyclobber operand? */ 3440 && !immune_p (recog_data.operand[j], recog_data.operand[i], 3441 early_data)) 3442 { 3443 /* If the output is in a single-reg class, 3444 it's costly to reload it, so reload the input instead. */ 3445 if (reg_class_size[this_alternative[i]] == 1 3446 && (GET_CODE (recog_data.operand[j]) == REG 3447 || GET_CODE (recog_data.operand[j]) == SUBREG)) 3448 { 3449 losers++; 3450 this_alternative_win[j] = 0; 3451 this_alternative_match_win[j] = 0; 3452 } 3453 else 3454 break; 3455 } 3456 /* If an earlyclobber operand conflicts with something, 3457 it must be reloaded, so request this and count the cost. */ 3458 if (j != noperands) 3459 { 3460 losers++; 3461 this_alternative_win[i] = 0; 3462 this_alternative_match_win[j] = 0; 3463 for (j = 0; j < noperands; j++) 3464 if (this_alternative_matches[j] == i 3465 && this_alternative_match_win[j]) 3466 { 3467 this_alternative_win[j] = 0; 3468 this_alternative_match_win[j] = 0; 3469 losers++; 3470 } 3471 } 3472 } 3473 3474 /* If one alternative accepts all the operands, no reload required, 3475 choose that alternative; don't consider the remaining ones. */ 3476 if (losers == 0) 3477 { 3478 /* Unswap these so that they are never swapped at `finish'. */ 3479 if (commutative >= 0) 3480 { 3481 recog_data.operand[commutative] = substed_operand[commutative]; 3482 recog_data.operand[commutative + 1] 3483 = substed_operand[commutative + 1]; 3484 } 3485 for (i = 0; i < noperands; i++) 3486 { 3487 goal_alternative_win[i] = this_alternative_win[i]; 3488 goal_alternative_match_win[i] = this_alternative_match_win[i]; 3489 goal_alternative[i] = this_alternative[i]; 3490 goal_alternative_offmemok[i] = this_alternative_offmemok[i]; 3491 goal_alternative_matches[i] = this_alternative_matches[i]; 3492 goal_alternative_earlyclobber[i] 3493 = this_alternative_earlyclobber[i]; 3494 } 3495 goal_alternative_number = this_alternative_number; 3496 goal_alternative_swapped = swapped; 3497 goal_earlyclobber = this_earlyclobber; 3498 goto finish; 3499 } 3500 3501 /* REJECT, set by the ! and ? constraint characters and when a register 3502 would be reloaded into a non-preferred class, discourages the use of 3503 this alternative for a reload goal. REJECT is incremented by six 3504 for each ? and two for each non-preferred class. */ 3505 losers = losers * 6 + reject; 3506 3507 /* If this alternative can be made to work by reloading, 3508 and it needs less reloading than the others checked so far, 3509 record it as the chosen goal for reloading. */ 3510 if (! bad && best > losers) 3511 { 3512 for (i = 0; i < noperands; i++) 3513 { 3514 goal_alternative[i] = this_alternative[i]; 3515 goal_alternative_win[i] = this_alternative_win[i]; 3516 goal_alternative_match_win[i] = this_alternative_match_win[i]; 3517 goal_alternative_offmemok[i] = this_alternative_offmemok[i]; 3518 goal_alternative_matches[i] = this_alternative_matches[i]; 3519 goal_alternative_earlyclobber[i] 3520 = this_alternative_earlyclobber[i]; 3521 } 3522 goal_alternative_swapped = swapped; 3523 best = losers; 3524 goal_alternative_number = this_alternative_number; 3525 goal_earlyclobber = this_earlyclobber; 3526 } 3527 } 3528 3529 /* If insn is commutative (it's safe to exchange a certain pair of operands) 3530 then we need to try each alternative twice, 3531 the second time matching those two operands 3532 as if we had exchanged them. 3533 To do this, really exchange them in operands. 3534 3535 If we have just tried the alternatives the second time, 3536 return operands to normal and drop through. */ 3537 3538 if (commutative >= 0) 3539 { 3540 swapped = !swapped; 3541 if (swapped) 3542 { 3543 enum reg_class tclass; 3544 int t; 3545 3546 recog_data.operand[commutative] = substed_operand[commutative + 1]; 3547 recog_data.operand[commutative + 1] = substed_operand[commutative]; 3548 /* Swap the duplicates too. */ 3549 for (i = 0; i < recog_data.n_dups; i++) 3550 if (recog_data.dup_num[i] == commutative 3551 || recog_data.dup_num[i] == commutative + 1) 3552 *recog_data.dup_loc[i] 3553 = recog_data.operand[(int) recog_data.dup_num[i]]; 3554 3555 tclass = preferred_class[commutative]; 3556 preferred_class[commutative] = preferred_class[commutative + 1]; 3557 preferred_class[commutative + 1] = tclass; 3558 3559 t = pref_or_nothing[commutative]; 3560 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1]; 3561 pref_or_nothing[commutative + 1] = t; 3562 3563 memcpy (constraints, recog_data.constraints, 3564 noperands * sizeof (char *)); 3565 goto try_swapped; 3566 } 3567 else 3568 { 3569 recog_data.operand[commutative] = substed_operand[commutative]; 3570 recog_data.operand[commutative + 1] 3571 = substed_operand[commutative + 1]; 3572 /* Unswap the duplicates too. */ 3573 for (i = 0; i < recog_data.n_dups; i++) 3574 if (recog_data.dup_num[i] == commutative 3575 || recog_data.dup_num[i] == commutative + 1) 3576 *recog_data.dup_loc[i] 3577 = recog_data.operand[(int) recog_data.dup_num[i]]; 3578 } 3579 } 3580 3581 /* The operands don't meet the constraints. 3582 goal_alternative describes the alternative 3583 that we could reach by reloading the fewest operands. 3584 Reload so as to fit it. */ 3585 3586 if (best == MAX_RECOG_OPERANDS * 2 + 600) 3587 { 3588 /* No alternative works with reloads?? */ 3589 if (insn_code_number >= 0) 3590 fatal_insn ("unable to generate reloads for:", insn); 3591 error_for_asm (insn, "inconsistent operand constraints in an `asm'"); 3592 /* Avoid further trouble with this insn. */ 3593 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 3594 n_reloads = 0; 3595 return 0; 3596 } 3597 3598 /* Jump to `finish' from above if all operands are valid already. 3599 In that case, goal_alternative_win is all 1. */ 3600 finish: 3601 3602 /* Right now, for any pair of operands I and J that are required to match, 3603 with I < J, 3604 goal_alternative_matches[J] is I. 3605 Set up goal_alternative_matched as the inverse function: 3606 goal_alternative_matched[I] = J. */ 3607 3608 for (i = 0; i < noperands; i++) 3609 goal_alternative_matched[i] = -1; 3610 3611 for (i = 0; i < noperands; i++) 3612 if (! goal_alternative_win[i] 3613 && goal_alternative_matches[i] >= 0) 3614 goal_alternative_matched[goal_alternative_matches[i]] = i; 3615 3616 for (i = 0; i < noperands; i++) 3617 goal_alternative_win[i] |= goal_alternative_match_win[i]; 3618 3619 /* If the best alternative is with operands 1 and 2 swapped, 3620 consider them swapped before reporting the reloads. Update the 3621 operand numbers of any reloads already pushed. */ 3622 3623 if (goal_alternative_swapped) 3624 { 3625 rtx tem; 3626 3627 tem = substed_operand[commutative]; 3628 substed_operand[commutative] = substed_operand[commutative + 1]; 3629 substed_operand[commutative + 1] = tem; 3630 tem = recog_data.operand[commutative]; 3631 recog_data.operand[commutative] = recog_data.operand[commutative + 1]; 3632 recog_data.operand[commutative + 1] = tem; 3633 tem = *recog_data.operand_loc[commutative]; 3634 *recog_data.operand_loc[commutative] 3635 = *recog_data.operand_loc[commutative + 1]; 3636 *recog_data.operand_loc[commutative + 1] = tem; 3637 3638 for (i = 0; i < n_reloads; i++) 3639 { 3640 if (rld[i].opnum == commutative) 3641 rld[i].opnum = commutative + 1; 3642 else if (rld[i].opnum == commutative + 1) 3643 rld[i].opnum = commutative; 3644 } 3645 } 3646 3647 for (i = 0; i < noperands; i++) 3648 { 3649 operand_reloadnum[i] = -1; 3650 3651 /* If this is an earlyclobber operand, we need to widen the scope. 3652 The reload must remain valid from the start of the insn being 3653 reloaded until after the operand is stored into its destination. 3654 We approximate this with RELOAD_OTHER even though we know that we 3655 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads. 3656 3657 One special case that is worth checking is when we have an 3658 output that is earlyclobber but isn't used past the insn (typically 3659 a SCRATCH). In this case, we only need have the reload live 3660 through the insn itself, but not for any of our input or output 3661 reloads. 3662 But we must not accidentally narrow the scope of an existing 3663 RELOAD_OTHER reload - leave these alone. 3664 3665 In any case, anything needed to address this operand can remain 3666 however they were previously categorized. */ 3667 3668 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER) 3669 operand_type[i] 3670 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i]) 3671 ? RELOAD_FOR_INSN : RELOAD_OTHER); 3672 } 3673 3674 /* Any constants that aren't allowed and can't be reloaded 3675 into registers are here changed into memory references. */ 3676 for (i = 0; i < noperands; i++) 3677 if (! goal_alternative_win[i] 3678 && CONSTANT_P (recog_data.operand[i]) 3679 /* force_const_mem does not accept HIGH. */ 3680 && GET_CODE (recog_data.operand[i]) != HIGH 3681 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i], 3682 (enum reg_class) goal_alternative[i]) 3683 == NO_REGS) 3684 || no_input_reloads) 3685 && operand_mode[i] != VOIDmode) 3686 { 3687 substed_operand[i] = recog_data.operand[i] 3688 = find_reloads_toplev (force_const_mem (operand_mode[i], 3689 recog_data.operand[i]), 3690 i, address_type[i], ind_levels, 0, insn, 3691 NULL); 3692 if (alternative_allows_memconst (recog_data.constraints[i], 3693 goal_alternative_number)) 3694 goal_alternative_win[i] = 1; 3695 } 3696 3697 /* Record the values of the earlyclobber operands for the caller. */ 3698 if (goal_earlyclobber) 3699 for (i = 0; i < noperands; i++) 3700 if (goal_alternative_earlyclobber[i]) 3701 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i]; 3702 3703 /* Now record reloads for all the operands that need them. */ 3704 for (i = 0; i < noperands; i++) 3705 if (! goal_alternative_win[i]) 3706 { 3707 /* Operands that match previous ones have already been handled. */ 3708 if (goal_alternative_matches[i] >= 0) 3709 ; 3710 /* Handle an operand with a nonoffsettable address 3711 appearing where an offsettable address will do 3712 by reloading the address into a base register. 3713 3714 ??? We can also do this when the operand is a register and 3715 reg_equiv_mem is not offsettable, but this is a bit tricky, 3716 so we don't bother with it. It may not be worth doing. */ 3717 else if (goal_alternative_matched[i] == -1 3718 && goal_alternative_offmemok[i] 3719 && GET_CODE (recog_data.operand[i]) == MEM) 3720 { 3721 operand_reloadnum[i] 3722 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX, 3723 &XEXP (recog_data.operand[i], 0), (rtx*) 0, 3724 MODE_BASE_REG_CLASS (VOIDmode), 3725 GET_MODE (XEXP (recog_data.operand[i], 0)), 3726 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT); 3727 rld[operand_reloadnum[i]].inc 3728 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i])); 3729 3730 /* If this operand is an output, we will have made any 3731 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but 3732 now we are treating part of the operand as an input, so 3733 we must change these to RELOAD_FOR_INPUT_ADDRESS. */ 3734 3735 if (modified[i] == RELOAD_WRITE) 3736 { 3737 for (j = 0; j < n_reloads; j++) 3738 { 3739 if (rld[j].opnum == i) 3740 { 3741 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS) 3742 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS; 3743 else if (rld[j].when_needed 3744 == RELOAD_FOR_OUTADDR_ADDRESS) 3745 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS; 3746 } 3747 } 3748 } 3749 } 3750 else if (goal_alternative_matched[i] == -1) 3751 { 3752 operand_reloadnum[i] 3753 = push_reload ((modified[i] != RELOAD_WRITE 3754 ? recog_data.operand[i] : 0), 3755 (modified[i] != RELOAD_READ 3756 ? recog_data.operand[i] : 0), 3757 (modified[i] != RELOAD_WRITE 3758 ? recog_data.operand_loc[i] : 0), 3759 (modified[i] != RELOAD_READ 3760 ? recog_data.operand_loc[i] : 0), 3761 (enum reg_class) goal_alternative[i], 3762 (modified[i] == RELOAD_WRITE 3763 ? VOIDmode : operand_mode[i]), 3764 (modified[i] == RELOAD_READ 3765 ? VOIDmode : operand_mode[i]), 3766 (insn_code_number < 0 ? 0 3767 : insn_data[insn_code_number].operand[i].strict_low), 3768 0, i, operand_type[i]); 3769 } 3770 /* In a matching pair of operands, one must be input only 3771 and the other must be output only. 3772 Pass the input operand as IN and the other as OUT. */ 3773 else if (modified[i] == RELOAD_READ 3774 && modified[goal_alternative_matched[i]] == RELOAD_WRITE) 3775 { 3776 operand_reloadnum[i] 3777 = push_reload (recog_data.operand[i], 3778 recog_data.operand[goal_alternative_matched[i]], 3779 recog_data.operand_loc[i], 3780 recog_data.operand_loc[goal_alternative_matched[i]], 3781 (enum reg_class) goal_alternative[i], 3782 operand_mode[i], 3783 operand_mode[goal_alternative_matched[i]], 3784 0, 0, i, RELOAD_OTHER); 3785 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum; 3786 } 3787 else if (modified[i] == RELOAD_WRITE 3788 && modified[goal_alternative_matched[i]] == RELOAD_READ) 3789 { 3790 operand_reloadnum[goal_alternative_matched[i]] 3791 = push_reload (recog_data.operand[goal_alternative_matched[i]], 3792 recog_data.operand[i], 3793 recog_data.operand_loc[goal_alternative_matched[i]], 3794 recog_data.operand_loc[i], 3795 (enum reg_class) goal_alternative[i], 3796 operand_mode[goal_alternative_matched[i]], 3797 operand_mode[i], 3798 0, 0, i, RELOAD_OTHER); 3799 operand_reloadnum[i] = output_reloadnum; 3800 } 3801 else if (insn_code_number >= 0) 3802 abort (); 3803 else 3804 { 3805 error_for_asm (insn, "inconsistent operand constraints in an `asm'"); 3806 /* Avoid further trouble with this insn. */ 3807 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 3808 n_reloads = 0; 3809 return 0; 3810 } 3811 } 3812 else if (goal_alternative_matched[i] < 0 3813 && goal_alternative_matches[i] < 0 3814 && optimize) 3815 { 3816 /* For each non-matching operand that's a MEM or a pseudo-register 3817 that didn't get a hard register, make an optional reload. 3818 This may get done even if the insn needs no reloads otherwise. */ 3819 3820 rtx operand = recog_data.operand[i]; 3821 3822 while (GET_CODE (operand) == SUBREG) 3823 operand = SUBREG_REG (operand); 3824 if ((GET_CODE (operand) == MEM 3825 || (GET_CODE (operand) == REG 3826 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 3827 /* If this is only for an output, the optional reload would not 3828 actually cause us to use a register now, just note that 3829 something is stored here. */ 3830 && ((enum reg_class) goal_alternative[i] != NO_REGS 3831 || modified[i] == RELOAD_WRITE) 3832 && ! no_input_reloads 3833 /* An optional output reload might allow to delete INSN later. 3834 We mustn't make in-out reloads on insns that are not permitted 3835 output reloads. 3836 If this is an asm, we can't delete it; we must not even call 3837 push_reload for an optional output reload in this case, 3838 because we can't be sure that the constraint allows a register, 3839 and push_reload verifies the constraints for asms. */ 3840 && (modified[i] == RELOAD_READ 3841 || (! no_output_reloads && ! this_insn_is_asm))) 3842 operand_reloadnum[i] 3843 = push_reload ((modified[i] != RELOAD_WRITE 3844 ? recog_data.operand[i] : 0), 3845 (modified[i] != RELOAD_READ 3846 ? recog_data.operand[i] : 0), 3847 (modified[i] != RELOAD_WRITE 3848 ? recog_data.operand_loc[i] : 0), 3849 (modified[i] != RELOAD_READ 3850 ? recog_data.operand_loc[i] : 0), 3851 (enum reg_class) goal_alternative[i], 3852 (modified[i] == RELOAD_WRITE 3853 ? VOIDmode : operand_mode[i]), 3854 (modified[i] == RELOAD_READ 3855 ? VOIDmode : operand_mode[i]), 3856 (insn_code_number < 0 ? 0 3857 : insn_data[insn_code_number].operand[i].strict_low), 3858 1, i, operand_type[i]); 3859 /* If a memory reference remains (either as a MEM or a pseudo that 3860 did not get a hard register), yet we can't make an optional 3861 reload, check if this is actually a pseudo register reference; 3862 we then need to emit a USE and/or a CLOBBER so that reload 3863 inheritance will do the right thing. */ 3864 else if (replace 3865 && (GET_CODE (operand) == MEM 3866 || (GET_CODE (operand) == REG 3867 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3868 && reg_renumber [REGNO (operand)] < 0))) 3869 { 3870 operand = *recog_data.operand_loc[i]; 3871 3872 while (GET_CODE (operand) == SUBREG) 3873 operand = SUBREG_REG (operand); 3874 if (GET_CODE (operand) == REG) 3875 { 3876 if (modified[i] != RELOAD_WRITE) 3877 /* We mark the USE with QImode so that we recognize 3878 it as one that can be safely deleted at the end 3879 of reload. */ 3880 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand), 3881 insn), QImode); 3882 if (modified[i] != RELOAD_READ) 3883 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn); 3884 } 3885 } 3886 } 3887 else if (goal_alternative_matches[i] >= 0 3888 && goal_alternative_win[goal_alternative_matches[i]] 3889 && modified[i] == RELOAD_READ 3890 && modified[goal_alternative_matches[i]] == RELOAD_WRITE 3891 && ! no_input_reloads && ! no_output_reloads 3892 && optimize) 3893 { 3894 /* Similarly, make an optional reload for a pair of matching 3895 objects that are in MEM or a pseudo that didn't get a hard reg. */ 3896 3897 rtx operand = recog_data.operand[i]; 3898 3899 while (GET_CODE (operand) == SUBREG) 3900 operand = SUBREG_REG (operand); 3901 if ((GET_CODE (operand) == MEM 3902 || (GET_CODE (operand) == REG 3903 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 3904 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]] 3905 != NO_REGS)) 3906 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]] 3907 = push_reload (recog_data.operand[goal_alternative_matches[i]], 3908 recog_data.operand[i], 3909 recog_data.operand_loc[goal_alternative_matches[i]], 3910 recog_data.operand_loc[i], 3911 (enum reg_class) goal_alternative[goal_alternative_matches[i]], 3912 operand_mode[goal_alternative_matches[i]], 3913 operand_mode[i], 3914 0, 1, goal_alternative_matches[i], RELOAD_OTHER); 3915 } 3916 3917 /* Perform whatever substitutions on the operands we are supposed 3918 to make due to commutativity or replacement of registers 3919 with equivalent constants or memory slots. */ 3920 3921 for (i = 0; i < noperands; i++) 3922 { 3923 /* We only do this on the last pass through reload, because it is 3924 possible for some data (like reg_equiv_address) to be changed during 3925 later passes. Moreover, we loose the opportunity to get a useful 3926 reload_{in,out}_reg when we do these replacements. */ 3927 3928 if (replace) 3929 { 3930 rtx substitution = substed_operand[i]; 3931 3932 *recog_data.operand_loc[i] = substitution; 3933 3934 /* If we're replacing an operand with a LABEL_REF, we need 3935 to make sure that there's a REG_LABEL note attached to 3936 this instruction. */ 3937 if (GET_CODE (insn) != JUMP_INSN 3938 && GET_CODE (substitution) == LABEL_REF 3939 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0))) 3940 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, 3941 XEXP (substitution, 0), 3942 REG_NOTES (insn)); 3943 } 3944 else 3945 retval |= (substed_operand[i] != *recog_data.operand_loc[i]); 3946 } 3947 3948 /* If this insn pattern contains any MATCH_DUP's, make sure that 3949 they will be substituted if the operands they match are substituted. 3950 Also do now any substitutions we already did on the operands. 3951 3952 Don't do this if we aren't making replacements because we might be 3953 propagating things allocated by frame pointer elimination into places 3954 it doesn't expect. */ 3955 3956 if (insn_code_number >= 0 && replace) 3957 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--) 3958 { 3959 int opno = recog_data.dup_num[i]; 3960 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno]; 3961 if (operand_reloadnum[opno] >= 0) 3962 push_replacement (recog_data.dup_loc[i], operand_reloadnum[opno], 3963 insn_data[insn_code_number].operand[opno].mode); 3964 } 3965 3966#if 0 3967 /* This loses because reloading of prior insns can invalidate the equivalence 3968 (or at least find_equiv_reg isn't smart enough to find it any more), 3969 causing this insn to need more reload regs than it needed before. 3970 It may be too late to make the reload regs available. 3971 Now this optimization is done safely in choose_reload_regs. */ 3972 3973 /* For each reload of a reg into some other class of reg, 3974 search for an existing equivalent reg (same value now) in the right class. 3975 We can use it as long as we don't need to change its contents. */ 3976 for (i = 0; i < n_reloads; i++) 3977 if (rld[i].reg_rtx == 0 3978 && rld[i].in != 0 3979 && GET_CODE (rld[i].in) == REG 3980 && rld[i].out == 0) 3981 { 3982 rld[i].reg_rtx 3983 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1, 3984 static_reload_reg_p, 0, rld[i].inmode); 3985 /* Prevent generation of insn to load the value 3986 because the one we found already has the value. */ 3987 if (rld[i].reg_rtx) 3988 rld[i].in = rld[i].reg_rtx; 3989 } 3990#endif 3991 3992 /* Perhaps an output reload can be combined with another 3993 to reduce needs by one. */ 3994 if (!goal_earlyclobber) 3995 combine_reloads (); 3996 3997 /* If we have a pair of reloads for parts of an address, they are reloading 3998 the same object, the operands themselves were not reloaded, and they 3999 are for two operands that are supposed to match, merge the reloads and 4000 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */ 4001 4002 for (i = 0; i < n_reloads; i++) 4003 { 4004 int k; 4005 4006 for (j = i + 1; j < n_reloads; j++) 4007 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS 4008 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 4009 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4010 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4011 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS 4012 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 4013 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4014 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4015 && rtx_equal_p (rld[i].in, rld[j].in) 4016 && (operand_reloadnum[rld[i].opnum] < 0 4017 || rld[operand_reloadnum[rld[i].opnum]].optional) 4018 && (operand_reloadnum[rld[j].opnum] < 0 4019 || rld[operand_reloadnum[rld[j].opnum]].optional) 4020 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum 4021 || (goal_alternative_matches[rld[j].opnum] 4022 == rld[i].opnum))) 4023 { 4024 for (k = 0; k < n_replacements; k++) 4025 if (replacements[k].what == j) 4026 replacements[k].what = i; 4027 4028 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4029 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4030 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR; 4031 else 4032 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS; 4033 rld[j].in = 0; 4034 } 4035 } 4036 4037 /* Scan all the reloads and update their type. 4038 If a reload is for the address of an operand and we didn't reload 4039 that operand, change the type. Similarly, change the operand number 4040 of a reload when two operands match. If a reload is optional, treat it 4041 as though the operand isn't reloaded. 4042 4043 ??? This latter case is somewhat odd because if we do the optional 4044 reload, it means the object is hanging around. Thus we need only 4045 do the address reload if the optional reload was NOT done. 4046 4047 Change secondary reloads to be the address type of their operand, not 4048 the normal type. 4049 4050 If an operand's reload is now RELOAD_OTHER, change any 4051 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to 4052 RELOAD_FOR_OTHER_ADDRESS. */ 4053 4054 for (i = 0; i < n_reloads; i++) 4055 { 4056 if (rld[i].secondary_p 4057 && rld[i].when_needed == operand_type[rld[i].opnum]) 4058 rld[i].when_needed = address_type[rld[i].opnum]; 4059 4060 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS 4061 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 4062 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4063 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4064 && (operand_reloadnum[rld[i].opnum] < 0 4065 || rld[operand_reloadnum[rld[i].opnum]].optional)) 4066 { 4067 /* If we have a secondary reload to go along with this reload, 4068 change its type to RELOAD_FOR_OPADDR_ADDR. */ 4069 4070 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS 4071 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS) 4072 && rld[i].secondary_in_reload != -1) 4073 { 4074 int secondary_in_reload = rld[i].secondary_in_reload; 4075 4076 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR; 4077 4078 /* If there's a tertiary reload we have to change it also. */ 4079 if (secondary_in_reload > 0 4080 && rld[secondary_in_reload].secondary_in_reload != -1) 4081 rld[rld[secondary_in_reload].secondary_in_reload].when_needed 4082 = RELOAD_FOR_OPADDR_ADDR; 4083 } 4084 4085 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS 4086 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4087 && rld[i].secondary_out_reload != -1) 4088 { 4089 int secondary_out_reload = rld[i].secondary_out_reload; 4090 4091 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR; 4092 4093 /* If there's a tertiary reload we have to change it also. */ 4094 if (secondary_out_reload 4095 && rld[secondary_out_reload].secondary_out_reload != -1) 4096 rld[rld[secondary_out_reload].secondary_out_reload].when_needed 4097 = RELOAD_FOR_OPADDR_ADDR; 4098 } 4099 4100 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS 4101 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS) 4102 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR; 4103 else 4104 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS; 4105 } 4106 4107 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS 4108 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS) 4109 && operand_reloadnum[rld[i].opnum] >= 0 4110 && (rld[operand_reloadnum[rld[i].opnum]].when_needed 4111 == RELOAD_OTHER)) 4112 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS; 4113 4114 if (goal_alternative_matches[rld[i].opnum] >= 0) 4115 rld[i].opnum = goal_alternative_matches[rld[i].opnum]; 4116 } 4117 4118 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads. 4119 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR 4120 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads. 4121 4122 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never 4123 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a 4124 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads. 4125 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload, 4126 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all 4127 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it. 4128 This is complicated by the fact that a single operand can have more 4129 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix 4130 choose_reload_regs without affecting code quality, and cases that 4131 actually fail are extremely rare, so it turns out to be better to fix 4132 the problem here by not generating cases that choose_reload_regs will 4133 fail for. */ 4134 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS / 4135 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for 4136 a single operand. 4137 We can reduce the register pressure by exploiting that a 4138 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads 4139 does not conflict with any of them, if it is only used for the first of 4140 the RELOAD_FOR_X_ADDRESS reloads. */ 4141 { 4142 int first_op_addr_num = -2; 4143 int first_inpaddr_num[MAX_RECOG_OPERANDS]; 4144 int first_outpaddr_num[MAX_RECOG_OPERANDS]; 4145 int need_change = 0; 4146 /* We use last_op_addr_reload and the contents of the above arrays 4147 first as flags - -2 means no instance encountered, -1 means exactly 4148 one instance encountered. 4149 If more than one instance has been encountered, we store the reload 4150 number of the first reload of the kind in question; reload numbers 4151 are known to be non-negative. */ 4152 for (i = 0; i < noperands; i++) 4153 first_inpaddr_num[i] = first_outpaddr_num[i] = -2; 4154 for (i = n_reloads - 1; i >= 0; i--) 4155 { 4156 switch (rld[i].when_needed) 4157 { 4158 case RELOAD_FOR_OPERAND_ADDRESS: 4159 if (++first_op_addr_num >= 0) 4160 { 4161 first_op_addr_num = i; 4162 need_change = 1; 4163 } 4164 break; 4165 case RELOAD_FOR_INPUT_ADDRESS: 4166 if (++first_inpaddr_num[rld[i].opnum] >= 0) 4167 { 4168 first_inpaddr_num[rld[i].opnum] = i; 4169 need_change = 1; 4170 } 4171 break; 4172 case RELOAD_FOR_OUTPUT_ADDRESS: 4173 if (++first_outpaddr_num[rld[i].opnum] >= 0) 4174 { 4175 first_outpaddr_num[rld[i].opnum] = i; 4176 need_change = 1; 4177 } 4178 break; 4179 default: 4180 break; 4181 } 4182 } 4183 4184 if (need_change) 4185 { 4186 for (i = 0; i < n_reloads; i++) 4187 { 4188 int first_num; 4189 enum reload_type type; 4190 4191 switch (rld[i].when_needed) 4192 { 4193 case RELOAD_FOR_OPADDR_ADDR: 4194 first_num = first_op_addr_num; 4195 type = RELOAD_FOR_OPERAND_ADDRESS; 4196 break; 4197 case RELOAD_FOR_INPADDR_ADDRESS: 4198 first_num = first_inpaddr_num[rld[i].opnum]; 4199 type = RELOAD_FOR_INPUT_ADDRESS; 4200 break; 4201 case RELOAD_FOR_OUTADDR_ADDRESS: 4202 first_num = first_outpaddr_num[rld[i].opnum]; 4203 type = RELOAD_FOR_OUTPUT_ADDRESS; 4204 break; 4205 default: 4206 continue; 4207 } 4208 if (first_num < 0) 4209 continue; 4210 else if (i > first_num) 4211 rld[i].when_needed = type; 4212 else 4213 { 4214 /* Check if the only TYPE reload that uses reload I is 4215 reload FIRST_NUM. */ 4216 for (j = n_reloads - 1; j > first_num; j--) 4217 { 4218 if (rld[j].when_needed == type 4219 && (rld[i].secondary_p 4220 ? rld[j].secondary_in_reload == i 4221 : reg_mentioned_p (rld[i].in, rld[j].in))) 4222 { 4223 rld[i].when_needed = type; 4224 break; 4225 } 4226 } 4227 } 4228 } 4229 } 4230 } 4231 4232 /* See if we have any reloads that are now allowed to be merged 4233 because we've changed when the reload is needed to 4234 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only 4235 check for the most common cases. */ 4236 4237 for (i = 0; i < n_reloads; i++) 4238 if (rld[i].in != 0 && rld[i].out == 0 4239 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS 4240 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR 4241 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS)) 4242 for (j = 0; j < n_reloads; j++) 4243 if (i != j && rld[j].in != 0 && rld[j].out == 0 4244 && rld[j].when_needed == rld[i].when_needed 4245 && MATCHES (rld[i].in, rld[j].in) 4246 && rld[i].class == rld[j].class 4247 && !rld[i].nocombine && !rld[j].nocombine 4248 && rld[i].reg_rtx == rld[j].reg_rtx) 4249 { 4250 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum); 4251 transfer_replacements (i, j); 4252 rld[j].in = 0; 4253 } 4254 4255#ifdef HAVE_cc0 4256 /* If we made any reloads for addresses, see if they violate a 4257 "no input reloads" requirement for this insn. But loads that we 4258 do after the insn (such as for output addresses) are fine. */ 4259 if (no_input_reloads) 4260 for (i = 0; i < n_reloads; i++) 4261 if (rld[i].in != 0 4262 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS 4263 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS) 4264 abort (); 4265#endif 4266 4267 /* Compute reload_mode and reload_nregs. */ 4268 for (i = 0; i < n_reloads; i++) 4269 { 4270 rld[i].mode 4271 = (rld[i].inmode == VOIDmode 4272 || (GET_MODE_SIZE (rld[i].outmode) 4273 > GET_MODE_SIZE (rld[i].inmode))) 4274 ? rld[i].outmode : rld[i].inmode; 4275 4276 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode); 4277 } 4278 4279 /* Special case a simple move with an input reload and a 4280 destination of a hard reg, if the hard reg is ok, use it. */ 4281 for (i = 0; i < n_reloads; i++) 4282 if (rld[i].when_needed == RELOAD_FOR_INPUT 4283 && GET_CODE (PATTERN (insn)) == SET 4284 && GET_CODE (SET_DEST (PATTERN (insn))) == REG 4285 && SET_SRC (PATTERN (insn)) == rld[i].in) 4286 { 4287 rtx dest = SET_DEST (PATTERN (insn)); 4288 unsigned int regno = REGNO (dest); 4289 4290 if (regno < FIRST_PSEUDO_REGISTER 4291 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno) 4292 && HARD_REGNO_MODE_OK (regno, rld[i].mode)) 4293 rld[i].reg_rtx = dest; 4294 } 4295 4296 return retval; 4297} 4298 4299/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT 4300 accepts a memory operand with constant address. */ 4301 4302static int 4303alternative_allows_memconst (constraint, altnum) 4304 const char *constraint; 4305 int altnum; 4306{ 4307 int c; 4308 /* Skip alternatives before the one requested. */ 4309 while (altnum > 0) 4310 { 4311 while (*constraint++ != ','); 4312 altnum--; 4313 } 4314 /* Scan the requested alternative for 'm' or 'o'. 4315 If one of them is present, this alternative accepts memory constants. */ 4316 while ((c = *constraint++) && c != ',' && c != '#') 4317 if (c == 'm' || c == 'o') 4318 return 1; 4319 return 0; 4320} 4321 4322/* Scan X for memory references and scan the addresses for reloading. 4323 Also checks for references to "constant" regs that we want to eliminate 4324 and replaces them with the values they stand for. 4325 We may alter X destructively if it contains a reference to such. 4326 If X is just a constant reg, we return the equivalent value 4327 instead of X. 4328 4329 IND_LEVELS says how many levels of indirect addressing this machine 4330 supports. 4331 4332 OPNUM and TYPE identify the purpose of the reload. 4333 4334 IS_SET_DEST is true if X is the destination of a SET, which is not 4335 appropriate to be replaced by a constant. 4336 4337 INSN, if nonzero, is the insn in which we do the reload. It is used 4338 to determine if we may generate output reloads, and where to put USEs 4339 for pseudos that we have to replace with stack slots. 4340 4341 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the 4342 result of find_reloads_address. */ 4343 4344static rtx 4345find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn, 4346 address_reloaded) 4347 rtx x; 4348 int opnum; 4349 enum reload_type type; 4350 int ind_levels; 4351 int is_set_dest; 4352 rtx insn; 4353 int *address_reloaded; 4354{ 4355 RTX_CODE code = GET_CODE (x); 4356 4357 const char *fmt = GET_RTX_FORMAT (code); 4358 int i; 4359 int copied; 4360 4361 if (code == REG) 4362 { 4363 /* This code is duplicated for speed in find_reloads. */ 4364 int regno = REGNO (x); 4365 if (reg_equiv_constant[regno] != 0 && !is_set_dest) 4366 x = reg_equiv_constant[regno]; 4367#if 0 4368 /* This creates (subreg (mem...)) which would cause an unnecessary 4369 reload of the mem. */ 4370 else if (reg_equiv_mem[regno] != 0) 4371 x = reg_equiv_mem[regno]; 4372#endif 4373 else if (reg_equiv_memory_loc[regno] 4374 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 4375 { 4376 rtx mem = make_memloc (x, regno); 4377 if (reg_equiv_address[regno] 4378 || ! rtx_equal_p (mem, reg_equiv_mem[regno])) 4379 { 4380 /* If this is not a toplevel operand, find_reloads doesn't see 4381 this substitution. We have to emit a USE of the pseudo so 4382 that delete_output_reload can see it. */ 4383 if (replace_reloads && recog_data.operand[opnum] != x) 4384 /* We mark the USE with QImode so that we recognize it 4385 as one that can be safely deleted at the end of 4386 reload. */ 4387 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn), 4388 QImode); 4389 x = mem; 4390 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0), 4391 opnum, type, ind_levels, insn); 4392 if (address_reloaded) 4393 *address_reloaded = i; 4394 } 4395 } 4396 return x; 4397 } 4398 if (code == MEM) 4399 { 4400 rtx tem = x; 4401 4402 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0), 4403 opnum, type, ind_levels, insn); 4404 if (address_reloaded) 4405 *address_reloaded = i; 4406 4407 return tem; 4408 } 4409 4410 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG) 4411 { 4412 /* Check for SUBREG containing a REG that's equivalent to a constant. 4413 If the constant has a known value, truncate it right now. 4414 Similarly if we are extracting a single-word of a multi-word 4415 constant. If the constant is symbolic, allow it to be substituted 4416 normally. push_reload will strip the subreg later. If the 4417 constant is VOIDmode, abort because we will lose the mode of 4418 the register (this should never happen because one of the cases 4419 above should handle it). */ 4420 4421 int regno = REGNO (SUBREG_REG (x)); 4422 rtx tem; 4423 4424 if (subreg_lowpart_p (x) 4425 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4426 && reg_equiv_constant[regno] != 0 4427 && (tem = gen_lowpart_common (GET_MODE (x), 4428 reg_equiv_constant[regno])) != 0) 4429 return tem; 4430 4431 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD 4432 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4433 && reg_equiv_constant[regno] != 0 4434 && (tem = operand_subword (reg_equiv_constant[regno], 4435 SUBREG_BYTE (x) / UNITS_PER_WORD, 0, 4436 GET_MODE (SUBREG_REG (x)))) != 0) 4437 { 4438 /* TEM is now a word sized constant for the bits from X that 4439 we wanted. However, TEM may be the wrong representation. 4440 4441 Use gen_lowpart_common to convert a CONST_INT into a 4442 CONST_DOUBLE and vice versa as needed according to by the mode 4443 of the SUBREG. */ 4444 tem = gen_lowpart_common (GET_MODE (x), tem); 4445 if (!tem) 4446 abort (); 4447 return tem; 4448 } 4449 4450 /* If the SUBREG is wider than a word, the above test will fail. 4451 For example, we might have a SImode SUBREG of a DImode SUBREG_REG 4452 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for 4453 a 32 bit target. We still can - and have to - handle this 4454 for non-paradoxical subregs of CONST_INTs. */ 4455 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4456 && reg_equiv_constant[regno] != 0 4457 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT 4458 && (GET_MODE_SIZE (GET_MODE (x)) 4459 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))) 4460 { 4461 int shift = SUBREG_BYTE (x) * BITS_PER_UNIT; 4462 if (WORDS_BIG_ENDIAN) 4463 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) 4464 - GET_MODE_BITSIZE (GET_MODE (x)) 4465 - shift); 4466 /* Here we use the knowledge that CONST_INTs have a 4467 HOST_WIDE_INT field. */ 4468 if (shift >= HOST_BITS_PER_WIDE_INT) 4469 shift = HOST_BITS_PER_WIDE_INT - 1; 4470 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift); 4471 } 4472 4473 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4474 && reg_equiv_constant[regno] != 0 4475 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode) 4476 abort (); 4477 4478 /* If the subreg contains a reg that will be converted to a mem, 4479 convert the subreg to a narrower memref now. 4480 Otherwise, we would get (subreg (mem ...) ...), 4481 which would force reload of the mem. 4482 4483 We also need to do this if there is an equivalent MEM that is 4484 not offsettable. In that case, alter_subreg would produce an 4485 invalid address on big-endian machines. 4486 4487 For machines that extend byte loads, we must not reload using 4488 a wider mode if we have a paradoxical SUBREG. find_reloads will 4489 force a reload in that case. So we should not do anything here. */ 4490 4491 else if (regno >= FIRST_PSEUDO_REGISTER 4492#ifdef LOAD_EXTEND_OP 4493 && (GET_MODE_SIZE (GET_MODE (x)) 4494 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) 4495#endif 4496 && (reg_equiv_address[regno] != 0 4497 || (reg_equiv_mem[regno] != 0 4498 && (! strict_memory_address_p (GET_MODE (x), 4499 XEXP (reg_equiv_mem[regno], 0)) 4500 || ! offsettable_memref_p (reg_equiv_mem[regno]) 4501 || num_not_at_initial_offset)))) 4502 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels, 4503 insn); 4504 } 4505 4506 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 4507 { 4508 if (fmt[i] == 'e') 4509 { 4510 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type, 4511 ind_levels, is_set_dest, insn, 4512 address_reloaded); 4513 /* If we have replaced a reg with it's equivalent memory loc - 4514 that can still be handled here e.g. if it's in a paradoxical 4515 subreg - we must make the change in a copy, rather than using 4516 a destructive change. This way, find_reloads can still elect 4517 not to do the change. */ 4518 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied) 4519 { 4520 x = shallow_copy_rtx (x); 4521 copied = 1; 4522 } 4523 XEXP (x, i) = new_part; 4524 } 4525 } 4526 return x; 4527} 4528 4529/* Return a mem ref for the memory equivalent of reg REGNO. 4530 This mem ref is not shared with anything. */ 4531 4532static rtx 4533make_memloc (ad, regno) 4534 rtx ad; 4535 int regno; 4536{ 4537 /* We must rerun eliminate_regs, in case the elimination 4538 offsets have changed. */ 4539 rtx tem 4540 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0); 4541 4542 /* If TEM might contain a pseudo, we must copy it to avoid 4543 modifying it when we do the substitution for the reload. */ 4544 if (rtx_varies_p (tem, 0)) 4545 tem = copy_rtx (tem); 4546 4547 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem); 4548 tem = adjust_address_nv (tem, GET_MODE (ad), 0); 4549 4550 /* Copy the result if it's still the same as the equivalence, to avoid 4551 modifying it when we do the substitution for the reload. */ 4552 if (tem == reg_equiv_memory_loc[regno]) 4553 tem = copy_rtx (tem); 4554 return tem; 4555} 4556 4557/* Record all reloads needed for handling memory address AD 4558 which appears in *LOC in a memory reference to mode MODE 4559 which itself is found in location *MEMREFLOC. 4560 Note that we take shortcuts assuming that no multi-reg machine mode 4561 occurs as part of an address. 4562 4563 OPNUM and TYPE specify the purpose of this reload. 4564 4565 IND_LEVELS says how many levels of indirect addressing this machine 4566 supports. 4567 4568 INSN, if nonzero, is the insn in which we do the reload. It is used 4569 to determine if we may generate output reloads, and where to put USEs 4570 for pseudos that we have to replace with stack slots. 4571 4572 Value is nonzero if this address is reloaded or replaced as a whole. 4573 This is interesting to the caller if the address is an autoincrement. 4574 4575 Note that there is no verification that the address will be valid after 4576 this routine does its work. Instead, we rely on the fact that the address 4577 was valid when reload started. So we need only undo things that reload 4578 could have broken. These are wrong register types, pseudos not allocated 4579 to a hard register, and frame pointer elimination. */ 4580 4581static int 4582find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn) 4583 enum machine_mode mode; 4584 rtx *memrefloc; 4585 rtx ad; 4586 rtx *loc; 4587 int opnum; 4588 enum reload_type type; 4589 int ind_levels; 4590 rtx insn; 4591{ 4592 int regno; 4593 int removed_and = 0; 4594 rtx tem; 4595 4596 /* If the address is a register, see if it is a legitimate address and 4597 reload if not. We first handle the cases where we need not reload 4598 or where we must reload in a non-standard way. */ 4599 4600 if (GET_CODE (ad) == REG) 4601 { 4602 regno = REGNO (ad); 4603 4604 /* If the register is equivalent to an invariant expression, substitute 4605 the invariant, and eliminate any eliminable register references. */ 4606 tem = reg_equiv_constant[regno]; 4607 if (tem != 0 4608 && (tem = eliminate_regs (tem, mode, insn)) 4609 && strict_memory_address_p (mode, tem)) 4610 { 4611 *loc = ad = tem; 4612 return 0; 4613 } 4614 4615 tem = reg_equiv_memory_loc[regno]; 4616 if (tem != 0) 4617 { 4618 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset) 4619 { 4620 tem = make_memloc (ad, regno); 4621 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0))) 4622 { 4623 find_reloads_address (GET_MODE (tem), (rtx*) 0, XEXP (tem, 0), 4624 &XEXP (tem, 0), opnum, ADDR_TYPE (type), 4625 ind_levels, insn); 4626 } 4627 /* We can avoid a reload if the register's equivalent memory 4628 expression is valid as an indirect memory address. 4629 But not all addresses are valid in a mem used as an indirect 4630 address: only reg or reg+constant. */ 4631 4632 if (ind_levels > 0 4633 && strict_memory_address_p (mode, tem) 4634 && (GET_CODE (XEXP (tem, 0)) == REG 4635 || (GET_CODE (XEXP (tem, 0)) == PLUS 4636 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG 4637 && CONSTANT_P (XEXP (XEXP (tem, 0), 1))))) 4638 { 4639 /* TEM is not the same as what we'll be replacing the 4640 pseudo with after reload, put a USE in front of INSN 4641 in the final reload pass. */ 4642 if (replace_reloads 4643 && num_not_at_initial_offset 4644 && ! rtx_equal_p (tem, reg_equiv_mem[regno])) 4645 { 4646 *loc = tem; 4647 /* We mark the USE with QImode so that we 4648 recognize it as one that can be safely 4649 deleted at the end of reload. */ 4650 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), 4651 insn), QImode); 4652 4653 /* This doesn't really count as replacing the address 4654 as a whole, since it is still a memory access. */ 4655 } 4656 return 0; 4657 } 4658 ad = tem; 4659 } 4660 } 4661 4662 /* The only remaining case where we can avoid a reload is if this is a 4663 hard register that is valid as a base register and which is not the 4664 subject of a CLOBBER in this insn. */ 4665 4666 else if (regno < FIRST_PSEUDO_REGISTER 4667 && REGNO_MODE_OK_FOR_BASE_P (regno, mode) 4668 && ! regno_clobbered_p (regno, this_insn, mode, 0)) 4669 return 0; 4670 4671 /* If we do not have one of the cases above, we must do the reload. */ 4672 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode), 4673 GET_MODE (ad), VOIDmode, 0, 0, opnum, type); 4674 return 1; 4675 } 4676 4677 if (strict_memory_address_p (mode, ad)) 4678 { 4679 /* The address appears valid, so reloads are not needed. 4680 But the address may contain an eliminable register. 4681 This can happen because a machine with indirect addressing 4682 may consider a pseudo register by itself a valid address even when 4683 it has failed to get a hard reg. 4684 So do a tree-walk to find and eliminate all such regs. */ 4685 4686 /* But first quickly dispose of a common case. */ 4687 if (GET_CODE (ad) == PLUS 4688 && GET_CODE (XEXP (ad, 1)) == CONST_INT 4689 && GET_CODE (XEXP (ad, 0)) == REG 4690 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0) 4691 return 0; 4692 4693 subst_reg_equivs_changed = 0; 4694 *loc = subst_reg_equivs (ad, insn); 4695 4696 if (! subst_reg_equivs_changed) 4697 return 0; 4698 4699 /* Check result for validity after substitution. */ 4700 if (strict_memory_address_p (mode, ad)) 4701 return 0; 4702 } 4703 4704#ifdef LEGITIMIZE_RELOAD_ADDRESS 4705 do 4706 { 4707 if (memrefloc) 4708 { 4709 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type, 4710 ind_levels, win); 4711 } 4712 break; 4713 win: 4714 *memrefloc = copy_rtx (*memrefloc); 4715 XEXP (*memrefloc, 0) = ad; 4716 move_replacements (&ad, &XEXP (*memrefloc, 0)); 4717 return 1; 4718 } 4719 while (0); 4720#endif 4721 4722 /* The address is not valid. We have to figure out why. First see if 4723 we have an outer AND and remove it if so. Then analyze what's inside. */ 4724 4725 if (GET_CODE (ad) == AND) 4726 { 4727 removed_and = 1; 4728 loc = &XEXP (ad, 0); 4729 ad = *loc; 4730 } 4731 4732 /* One possibility for why the address is invalid is that it is itself 4733 a MEM. This can happen when the frame pointer is being eliminated, a 4734 pseudo is not allocated to a hard register, and the offset between the 4735 frame and stack pointers is not its initial value. In that case the 4736 pseudo will have been replaced by a MEM referring to the 4737 stack pointer. */ 4738 if (GET_CODE (ad) == MEM) 4739 { 4740 /* First ensure that the address in this MEM is valid. Then, unless 4741 indirect addresses are valid, reload the MEM into a register. */ 4742 tem = ad; 4743 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0), 4744 opnum, ADDR_TYPE (type), 4745 ind_levels == 0 ? 0 : ind_levels - 1, insn); 4746 4747 /* If tem was changed, then we must create a new memory reference to 4748 hold it and store it back into memrefloc. */ 4749 if (tem != ad && memrefloc) 4750 { 4751 *memrefloc = copy_rtx (*memrefloc); 4752 copy_replacements (tem, XEXP (*memrefloc, 0)); 4753 loc = &XEXP (*memrefloc, 0); 4754 if (removed_and) 4755 loc = &XEXP (*loc, 0); 4756 } 4757 4758 /* Check similar cases as for indirect addresses as above except 4759 that we can allow pseudos and a MEM since they should have been 4760 taken care of above. */ 4761 4762 if (ind_levels == 0 4763 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok) 4764 || GET_CODE (XEXP (tem, 0)) == MEM 4765 || ! (GET_CODE (XEXP (tem, 0)) == REG 4766 || (GET_CODE (XEXP (tem, 0)) == PLUS 4767 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG 4768 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT))) 4769 { 4770 /* Must use TEM here, not AD, since it is the one that will 4771 have any subexpressions reloaded, if needed. */ 4772 push_reload (tem, NULL_RTX, loc, (rtx*) 0, 4773 MODE_BASE_REG_CLASS (mode), GET_MODE (tem), 4774 VOIDmode, 0, 4775 0, opnum, type); 4776 return ! removed_and; 4777 } 4778 else 4779 return 0; 4780 } 4781 4782 /* If we have address of a stack slot but it's not valid because the 4783 displacement is too large, compute the sum in a register. 4784 Handle all base registers here, not just fp/ap/sp, because on some 4785 targets (namely SH) we can also get too large displacements from 4786 big-endian corrections. */ 4787 else if (GET_CODE (ad) == PLUS 4788 && GET_CODE (XEXP (ad, 0)) == REG 4789 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER 4790 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode) 4791 && GET_CODE (XEXP (ad, 1)) == CONST_INT) 4792 { 4793 /* Unshare the MEM rtx so we can safely alter it. */ 4794 if (memrefloc) 4795 { 4796 *memrefloc = copy_rtx (*memrefloc); 4797 loc = &XEXP (*memrefloc, 0); 4798 if (removed_and) 4799 loc = &XEXP (*loc, 0); 4800 } 4801 4802 if (double_reg_address_ok) 4803 { 4804 /* Unshare the sum as well. */ 4805 *loc = ad = copy_rtx (ad); 4806 4807 /* Reload the displacement into an index reg. 4808 We assume the frame pointer or arg pointer is a base reg. */ 4809 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), 4810 INDEX_REG_CLASS, GET_MODE (ad), opnum, 4811 type, ind_levels); 4812 return 0; 4813 } 4814 else 4815 { 4816 /* If the sum of two regs is not necessarily valid, 4817 reload the sum into a base reg. 4818 That will at least work. */ 4819 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode), 4820 Pmode, opnum, type, ind_levels); 4821 } 4822 return ! removed_and; 4823 } 4824 4825 /* If we have an indexed stack slot, there are three possible reasons why 4826 it might be invalid: The index might need to be reloaded, the address 4827 might have been made by frame pointer elimination and hence have a 4828 constant out of range, or both reasons might apply. 4829 4830 We can easily check for an index needing reload, but even if that is the 4831 case, we might also have an invalid constant. To avoid making the 4832 conservative assumption and requiring two reloads, we see if this address 4833 is valid when not interpreted strictly. If it is, the only problem is 4834 that the index needs a reload and find_reloads_address_1 will take care 4835 of it. 4836 4837 If we decide to do something here, it must be that 4838 `double_reg_address_ok' is true and that this address rtl was made by 4839 eliminate_regs. We generate a reload of the fp/sp/ap + constant and 4840 rework the sum so that the reload register will be added to the index. 4841 This is safe because we know the address isn't shared. 4842 4843 We check for fp/ap/sp as both the first and second operand of the 4844 innermost PLUS. */ 4845 4846 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT 4847 && GET_CODE (XEXP (ad, 0)) == PLUS 4848 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx 4849#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM 4850 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx 4851#endif 4852#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4853 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx 4854#endif 4855 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx) 4856 && ! memory_address_p (mode, ad)) 4857 { 4858 *loc = ad = gen_rtx_PLUS (GET_MODE (ad), 4859 plus_constant (XEXP (XEXP (ad, 0), 0), 4860 INTVAL (XEXP (ad, 1))), 4861 XEXP (XEXP (ad, 0), 1)); 4862 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), 4863 MODE_BASE_REG_CLASS (mode), 4864 GET_MODE (ad), opnum, type, ind_levels); 4865 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, 4866 type, 0, insn); 4867 4868 return 0; 4869 } 4870 4871 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT 4872 && GET_CODE (XEXP (ad, 0)) == PLUS 4873 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx 4874#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM 4875 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx 4876#endif 4877#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4878 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx 4879#endif 4880 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx) 4881 && ! memory_address_p (mode, ad)) 4882 { 4883 *loc = ad = gen_rtx_PLUS (GET_MODE (ad), 4884 XEXP (XEXP (ad, 0), 0), 4885 plus_constant (XEXP (XEXP (ad, 0), 1), 4886 INTVAL (XEXP (ad, 1)))); 4887 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), 4888 MODE_BASE_REG_CLASS (mode), 4889 GET_MODE (ad), opnum, type, ind_levels); 4890 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum, 4891 type, 0, insn); 4892 4893 return 0; 4894 } 4895 4896 /* See if address becomes valid when an eliminable register 4897 in a sum is replaced. */ 4898 4899 tem = ad; 4900 if (GET_CODE (ad) == PLUS) 4901 tem = subst_indexed_address (ad); 4902 if (tem != ad && strict_memory_address_p (mode, tem)) 4903 { 4904 /* Ok, we win that way. Replace any additional eliminable 4905 registers. */ 4906 4907 subst_reg_equivs_changed = 0; 4908 tem = subst_reg_equivs (tem, insn); 4909 4910 /* Make sure that didn't make the address invalid again. */ 4911 4912 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem)) 4913 { 4914 *loc = tem; 4915 return 0; 4916 } 4917 } 4918 4919 /* If constants aren't valid addresses, reload the constant address 4920 into a register. */ 4921 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad)) 4922 { 4923 /* If AD is an address in the constant pool, the MEM rtx may be shared. 4924 Unshare it so we can safely alter it. */ 4925 if (memrefloc && GET_CODE (ad) == SYMBOL_REF 4926 && CONSTANT_POOL_ADDRESS_P (ad)) 4927 { 4928 *memrefloc = copy_rtx (*memrefloc); 4929 loc = &XEXP (*memrefloc, 0); 4930 if (removed_and) 4931 loc = &XEXP (*loc, 0); 4932 } 4933 4934 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode), 4935 Pmode, opnum, type, ind_levels); 4936 return ! removed_and; 4937 } 4938 4939 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels, 4940 insn); 4941} 4942 4943/* Find all pseudo regs appearing in AD 4944 that are eliminable in favor of equivalent values 4945 and do not have hard regs; replace them by their equivalents. 4946 INSN, if nonzero, is the insn in which we do the reload. We put USEs in 4947 front of it for pseudos that we have to replace with stack slots. */ 4948 4949static rtx 4950subst_reg_equivs (ad, insn) 4951 rtx ad; 4952 rtx insn; 4953{ 4954 RTX_CODE code = GET_CODE (ad); 4955 int i; 4956 const char *fmt; 4957 4958 switch (code) 4959 { 4960 case HIGH: 4961 case CONST_INT: 4962 case CONST: 4963 case CONST_DOUBLE: 4964 case CONST_VECTOR: 4965 case SYMBOL_REF: 4966 case LABEL_REF: 4967 case PC: 4968 case CC0: 4969 return ad; 4970 4971 case REG: 4972 { 4973 int regno = REGNO (ad); 4974 4975 if (reg_equiv_constant[regno] != 0) 4976 { 4977 subst_reg_equivs_changed = 1; 4978 return reg_equiv_constant[regno]; 4979 } 4980 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset) 4981 { 4982 rtx mem = make_memloc (ad, regno); 4983 if (! rtx_equal_p (mem, reg_equiv_mem[regno])) 4984 { 4985 subst_reg_equivs_changed = 1; 4986 /* We mark the USE with QImode so that we recognize it 4987 as one that can be safely deleted at the end of 4988 reload. */ 4989 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn), 4990 QImode); 4991 return mem; 4992 } 4993 } 4994 } 4995 return ad; 4996 4997 case PLUS: 4998 /* Quickly dispose of a common case. */ 4999 if (XEXP (ad, 0) == frame_pointer_rtx 5000 && GET_CODE (XEXP (ad, 1)) == CONST_INT) 5001 return ad; 5002 break; 5003 5004 default: 5005 break; 5006 } 5007 5008 fmt = GET_RTX_FORMAT (code); 5009 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5010 if (fmt[i] == 'e') 5011 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn); 5012 return ad; 5013} 5014 5015/* Compute the sum of X and Y, making canonicalizations assumed in an 5016 address, namely: sum constant integers, surround the sum of two 5017 constants with a CONST, put the constant as the second operand, and 5018 group the constant on the outermost sum. 5019 5020 This routine assumes both inputs are already in canonical form. */ 5021 5022rtx 5023form_sum (x, y) 5024 rtx x, y; 5025{ 5026 rtx tem; 5027 enum machine_mode mode = GET_MODE (x); 5028 5029 if (mode == VOIDmode) 5030 mode = GET_MODE (y); 5031 5032 if (mode == VOIDmode) 5033 mode = Pmode; 5034 5035 if (GET_CODE (x) == CONST_INT) 5036 return plus_constant (y, INTVAL (x)); 5037 else if (GET_CODE (y) == CONST_INT) 5038 return plus_constant (x, INTVAL (y)); 5039 else if (CONSTANT_P (x)) 5040 tem = x, x = y, y = tem; 5041 5042 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1))) 5043 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y)); 5044 5045 /* Note that if the operands of Y are specified in the opposite 5046 order in the recursive calls below, infinite recursion will occur. */ 5047 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1))) 5048 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1)); 5049 5050 /* If both constant, encapsulate sum. Otherwise, just form sum. A 5051 constant will have been placed second. */ 5052 if (CONSTANT_P (x) && CONSTANT_P (y)) 5053 { 5054 if (GET_CODE (x) == CONST) 5055 x = XEXP (x, 0); 5056 if (GET_CODE (y) == CONST) 5057 y = XEXP (y, 0); 5058 5059 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y)); 5060 } 5061 5062 return gen_rtx_PLUS (mode, x, y); 5063} 5064 5065/* If ADDR is a sum containing a pseudo register that should be 5066 replaced with a constant (from reg_equiv_constant), 5067 return the result of doing so, and also apply the associative 5068 law so that the result is more likely to be a valid address. 5069 (But it is not guaranteed to be one.) 5070 5071 Note that at most one register is replaced, even if more are 5072 replaceable. Also, we try to put the result into a canonical form 5073 so it is more likely to be a valid address. 5074 5075 In all other cases, return ADDR. */ 5076 5077static rtx 5078subst_indexed_address (addr) 5079 rtx addr; 5080{ 5081 rtx op0 = 0, op1 = 0, op2 = 0; 5082 rtx tem; 5083 int regno; 5084 5085 if (GET_CODE (addr) == PLUS) 5086 { 5087 /* Try to find a register to replace. */ 5088 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0; 5089 if (GET_CODE (op0) == REG 5090 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER 5091 && reg_renumber[regno] < 0 5092 && reg_equiv_constant[regno] != 0) 5093 op0 = reg_equiv_constant[regno]; 5094 else if (GET_CODE (op1) == REG 5095 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER 5096 && reg_renumber[regno] < 0 5097 && reg_equiv_constant[regno] != 0) 5098 op1 = reg_equiv_constant[regno]; 5099 else if (GET_CODE (op0) == PLUS 5100 && (tem = subst_indexed_address (op0)) != op0) 5101 op0 = tem; 5102 else if (GET_CODE (op1) == PLUS 5103 && (tem = subst_indexed_address (op1)) != op1) 5104 op1 = tem; 5105 else 5106 return addr; 5107 5108 /* Pick out up to three things to add. */ 5109 if (GET_CODE (op1) == PLUS) 5110 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0); 5111 else if (GET_CODE (op0) == PLUS) 5112 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0); 5113 5114 /* Compute the sum. */ 5115 if (op2 != 0) 5116 op1 = form_sum (op1, op2); 5117 if (op1 != 0) 5118 op0 = form_sum (op0, op1); 5119 5120 return op0; 5121 } 5122 return addr; 5123} 5124 5125/* Update the REG_INC notes for an insn. It updates all REG_INC 5126 notes for the instruction which refer to REGNO the to refer 5127 to the reload number. 5128 5129 INSN is the insn for which any REG_INC notes need updating. 5130 5131 REGNO is the register number which has been reloaded. 5132 5133 RELOADNUM is the reload number. */ 5134 5135static void 5136update_auto_inc_notes (insn, regno, reloadnum) 5137 rtx insn ATTRIBUTE_UNUSED; 5138 int regno ATTRIBUTE_UNUSED; 5139 int reloadnum ATTRIBUTE_UNUSED; 5140{ 5141#ifdef AUTO_INC_DEC 5142 rtx link; 5143 5144 for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) 5145 if (REG_NOTE_KIND (link) == REG_INC 5146 && REGNO (XEXP (link, 0)) == regno) 5147 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); 5148#endif 5149} 5150 5151/* Record the pseudo registers we must reload into hard registers in a 5152 subexpression of a would-be memory address, X referring to a value 5153 in mode MODE. (This function is not called if the address we find 5154 is strictly valid.) 5155 5156 CONTEXT = 1 means we are considering regs as index regs, 5157 = 0 means we are considering them as base regs. 5158 5159 OPNUM and TYPE specify the purpose of any reloads made. 5160 5161 IND_LEVELS says how many levels of indirect addressing are 5162 supported at this point in the address. 5163 5164 INSN, if nonzero, is the insn in which we do the reload. It is used 5165 to determine if we may generate output reloads. 5166 5167 We return nonzero if X, as a whole, is reloaded or replaced. */ 5168 5169/* Note that we take shortcuts assuming that no multi-reg machine mode 5170 occurs as part of an address. 5171 Also, this is not fully machine-customizable; it works for machines 5172 such as VAXen and 68000's and 32000's, but other possible machines 5173 could have addressing modes that this does not handle right. */ 5174 5175static int 5176find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn) 5177 enum machine_mode mode; 5178 rtx x; 5179 int context; 5180 rtx *loc; 5181 int opnum; 5182 enum reload_type type; 5183 int ind_levels; 5184 rtx insn; 5185{ 5186 RTX_CODE code = GET_CODE (x); 5187 5188 switch (code) 5189 { 5190 case PLUS: 5191 { 5192 rtx orig_op0 = XEXP (x, 0); 5193 rtx orig_op1 = XEXP (x, 1); 5194 RTX_CODE code0 = GET_CODE (orig_op0); 5195 RTX_CODE code1 = GET_CODE (orig_op1); 5196 rtx op0 = orig_op0; 5197 rtx op1 = orig_op1; 5198 5199 if (GET_CODE (op0) == SUBREG) 5200 { 5201 op0 = SUBREG_REG (op0); 5202 code0 = GET_CODE (op0); 5203 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER) 5204 op0 = gen_rtx_REG (word_mode, 5205 (REGNO (op0) + 5206 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)), 5207 GET_MODE (SUBREG_REG (orig_op0)), 5208 SUBREG_BYTE (orig_op0), 5209 GET_MODE (orig_op0)))); 5210 } 5211 5212 if (GET_CODE (op1) == SUBREG) 5213 { 5214 op1 = SUBREG_REG (op1); 5215 code1 = GET_CODE (op1); 5216 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER) 5217 /* ??? Why is this given op1's mode and above for 5218 ??? op0 SUBREGs we use word_mode? */ 5219 op1 = gen_rtx_REG (GET_MODE (op1), 5220 (REGNO (op1) + 5221 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)), 5222 GET_MODE (SUBREG_REG (orig_op1)), 5223 SUBREG_BYTE (orig_op1), 5224 GET_MODE (orig_op1)))); 5225 } 5226 5227 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE 5228 || code0 == ZERO_EXTEND || code1 == MEM) 5229 { 5230 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5231 type, ind_levels, insn); 5232 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5233 type, ind_levels, insn); 5234 } 5235 5236 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE 5237 || code1 == ZERO_EXTEND || code0 == MEM) 5238 { 5239 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5240 type, ind_levels, insn); 5241 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5242 type, ind_levels, insn); 5243 } 5244 5245 else if (code0 == CONST_INT || code0 == CONST 5246 || code0 == SYMBOL_REF || code0 == LABEL_REF) 5247 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5248 type, ind_levels, insn); 5249 5250 else if (code1 == CONST_INT || code1 == CONST 5251 || code1 == SYMBOL_REF || code1 == LABEL_REF) 5252 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5253 type, ind_levels, insn); 5254 5255 else if (code0 == REG && code1 == REG) 5256 { 5257 if (REG_OK_FOR_INDEX_P (op0) 5258 && REG_MODE_OK_FOR_BASE_P (op1, mode)) 5259 return 0; 5260 else if (REG_OK_FOR_INDEX_P (op1) 5261 && REG_MODE_OK_FOR_BASE_P (op0, mode)) 5262 return 0; 5263 else if (REG_MODE_OK_FOR_BASE_P (op1, mode)) 5264 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5265 type, ind_levels, insn); 5266 else if (REG_MODE_OK_FOR_BASE_P (op0, mode)) 5267 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5268 type, ind_levels, insn); 5269 else if (REG_OK_FOR_INDEX_P (op1)) 5270 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5271 type, ind_levels, insn); 5272 else if (REG_OK_FOR_INDEX_P (op0)) 5273 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5274 type, ind_levels, insn); 5275 else 5276 { 5277 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5278 type, ind_levels, insn); 5279 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5280 type, ind_levels, insn); 5281 } 5282 } 5283 5284 else if (code0 == REG) 5285 { 5286 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5287 type, ind_levels, insn); 5288 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5289 type, ind_levels, insn); 5290 } 5291 5292 else if (code1 == REG) 5293 { 5294 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5295 type, ind_levels, insn); 5296 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5297 type, ind_levels, insn); 5298 } 5299 } 5300 5301 return 0; 5302 5303 case POST_MODIFY: 5304 case PRE_MODIFY: 5305 { 5306 rtx op0 = XEXP (x, 0); 5307 rtx op1 = XEXP (x, 1); 5308 5309 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS) 5310 return 0; 5311 5312 /* Currently, we only support {PRE,POST}_MODIFY constructs 5313 where a base register is {inc,dec}remented by the contents 5314 of another register or by a constant value. Thus, these 5315 operands must match. */ 5316 if (op0 != XEXP (op1, 0)) 5317 abort (); 5318 5319 /* Require index register (or constant). Let's just handle the 5320 register case in the meantime... If the target allows 5321 auto-modify by a constant then we could try replacing a pseudo 5322 register with its equivalent constant where applicable. */ 5323 if (REG_P (XEXP (op1, 1))) 5324 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1)))) 5325 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1), 5326 opnum, type, ind_levels, insn); 5327 5328 if (REG_P (XEXP (op1, 0))) 5329 { 5330 int regno = REGNO (XEXP (op1, 0)); 5331 int reloadnum; 5332 5333 /* A register that is incremented cannot be constant! */ 5334 if (regno >= FIRST_PSEUDO_REGISTER 5335 && reg_equiv_constant[regno] != 0) 5336 abort (); 5337 5338 /* Handle a register that is equivalent to a memory location 5339 which cannot be addressed directly. */ 5340 if (reg_equiv_memory_loc[regno] != 0 5341 && (reg_equiv_address[regno] != 0 5342 || num_not_at_initial_offset)) 5343 { 5344 rtx tem = make_memloc (XEXP (x, 0), regno); 5345 5346 if (reg_equiv_address[regno] 5347 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5348 { 5349 /* First reload the memory location's address. 5350 We can't use ADDR_TYPE (type) here, because we need to 5351 write back the value after reading it, hence we actually 5352 need two registers. */ 5353 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0), 5354 &XEXP (tem, 0), opnum, 5355 RELOAD_OTHER, 5356 ind_levels, insn); 5357 5358 /* Then reload the memory location into a base 5359 register. */ 5360 reloadnum = push_reload (tem, tem, &XEXP (x, 0), 5361 &XEXP (op1, 0), 5362 MODE_BASE_REG_CLASS (mode), 5363 GET_MODE (x), GET_MODE (x), 0, 5364 0, opnum, RELOAD_OTHER); 5365 5366 update_auto_inc_notes (this_insn, regno, reloadnum); 5367 return 0; 5368 } 5369 } 5370 5371 if (reg_renumber[regno] >= 0) 5372 regno = reg_renumber[regno]; 5373 5374 /* We require a base register here... */ 5375 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x))) 5376 { 5377 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0), 5378 &XEXP (op1, 0), &XEXP (x, 0), 5379 MODE_BASE_REG_CLASS (mode), 5380 GET_MODE (x), GET_MODE (x), 0, 0, 5381 opnum, RELOAD_OTHER); 5382 5383 update_auto_inc_notes (this_insn, regno, reloadnum); 5384 return 0; 5385 } 5386 } 5387 else 5388 abort (); 5389 } 5390 return 0; 5391 5392 case POST_INC: 5393 case POST_DEC: 5394 case PRE_INC: 5395 case PRE_DEC: 5396 if (GET_CODE (XEXP (x, 0)) == REG) 5397 { 5398 int regno = REGNO (XEXP (x, 0)); 5399 int value = 0; 5400 rtx x_orig = x; 5401 5402 /* A register that is incremented cannot be constant! */ 5403 if (regno >= FIRST_PSEUDO_REGISTER 5404 && reg_equiv_constant[regno] != 0) 5405 abort (); 5406 5407 /* Handle a register that is equivalent to a memory location 5408 which cannot be addressed directly. */ 5409 if (reg_equiv_memory_loc[regno] != 0 5410 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 5411 { 5412 rtx tem = make_memloc (XEXP (x, 0), regno); 5413 if (reg_equiv_address[regno] 5414 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5415 { 5416 /* First reload the memory location's address. 5417 We can't use ADDR_TYPE (type) here, because we need to 5418 write back the value after reading it, hence we actually 5419 need two registers. */ 5420 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), 5421 &XEXP (tem, 0), opnum, type, 5422 ind_levels, insn); 5423 /* Put this inside a new increment-expression. */ 5424 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem); 5425 /* Proceed to reload that, as if it contained a register. */ 5426 } 5427 } 5428 5429 /* If we have a hard register that is ok as an index, 5430 don't make a reload. If an autoincrement of a nice register 5431 isn't "valid", it must be that no autoincrement is "valid". 5432 If that is true and something made an autoincrement anyway, 5433 this must be a special context where one is allowed. 5434 (For example, a "push" instruction.) 5435 We can't improve this address, so leave it alone. */ 5436 5437 /* Otherwise, reload the autoincrement into a suitable hard reg 5438 and record how much to increment by. */ 5439 5440 if (reg_renumber[regno] >= 0) 5441 regno = reg_renumber[regno]; 5442 if ((regno >= FIRST_PSEUDO_REGISTER 5443 || !(context ? REGNO_OK_FOR_INDEX_P (regno) 5444 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))) 5445 { 5446 int reloadnum; 5447 5448 /* If we can output the register afterwards, do so, this 5449 saves the extra update. 5450 We can do so if we have an INSN - i.e. no JUMP_INSN nor 5451 CALL_INSN - and it does not set CC0. 5452 But don't do this if we cannot directly address the 5453 memory location, since this will make it harder to 5454 reuse address reloads, and increases register pressure. 5455 Also don't do this if we can probably update x directly. */ 5456 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM 5457 ? XEXP (x, 0) 5458 : reg_equiv_mem[regno]); 5459 int icode = (int) add_optab->handlers[(int) Pmode].insn_code; 5460 if (insn && GET_CODE (insn) == INSN && equiv 5461 && memory_operand (equiv, GET_MODE (equiv)) 5462#ifdef HAVE_cc0 5463 && ! sets_cc0_p (PATTERN (insn)) 5464#endif 5465 && ! (icode != CODE_FOR_nothing 5466 && ((*insn_data[icode].operand[0].predicate) 5467 (equiv, Pmode)) 5468 && ((*insn_data[icode].operand[1].predicate) 5469 (equiv, Pmode)))) 5470 { 5471 /* We use the original pseudo for loc, so that 5472 emit_reload_insns() knows which pseudo this 5473 reload refers to and updates the pseudo rtx, not 5474 its equivalent memory location, as well as the 5475 corresponding entry in reg_last_reload_reg. */ 5476 loc = &XEXP (x_orig, 0); 5477 x = XEXP (x, 0); 5478 reloadnum 5479 = push_reload (x, x, loc, loc, 5480 (context ? INDEX_REG_CLASS : 5481 MODE_BASE_REG_CLASS (mode)), 5482 GET_MODE (x), GET_MODE (x), 0, 0, 5483 opnum, RELOAD_OTHER); 5484 } 5485 else 5486 { 5487 reloadnum 5488 = push_reload (x, NULL_RTX, loc, (rtx*) 0, 5489 (context ? INDEX_REG_CLASS : 5490 MODE_BASE_REG_CLASS (mode)), 5491 GET_MODE (x), GET_MODE (x), 0, 0, 5492 opnum, type); 5493 rld[reloadnum].inc 5494 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0)); 5495 5496 value = 1; 5497 } 5498 5499 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)), 5500 reloadnum); 5501 } 5502 return value; 5503 } 5504 5505 else if (GET_CODE (XEXP (x, 0)) == MEM) 5506 { 5507 /* This is probably the result of a substitution, by eliminate_regs, 5508 of an equivalent address for a pseudo that was not allocated to a 5509 hard register. Verify that the specified address is valid and 5510 reload it into a register. */ 5511 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */ 5512 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0); 5513 rtx link; 5514 int reloadnum; 5515 5516 /* Since we know we are going to reload this item, don't decrement 5517 for the indirection level. 5518 5519 Note that this is actually conservative: it would be slightly 5520 more efficient to use the value of SPILL_INDIRECT_LEVELS from 5521 reload1.c here. */ 5522 /* We can't use ADDR_TYPE (type) here, because we need to 5523 write back the value after reading it, hence we actually 5524 need two registers. */ 5525 find_reloads_address (GET_MODE (x), &XEXP (x, 0), 5526 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0), 5527 opnum, type, ind_levels, insn); 5528 5529 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0, 5530 (context ? INDEX_REG_CLASS : 5531 MODE_BASE_REG_CLASS (mode)), 5532 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5533 rld[reloadnum].inc 5534 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0)); 5535 5536 link = FIND_REG_INC_NOTE (this_insn, tem); 5537 if (link != 0) 5538 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); 5539 5540 return 1; 5541 } 5542 return 0; 5543 5544 case MEM: 5545 /* This is probably the result of a substitution, by eliminate_regs, of 5546 an equivalent address for a pseudo that was not allocated to a hard 5547 register. Verify that the specified address is valid and reload it 5548 into a register. 5549 5550 Since we know we are going to reload this item, don't decrement for 5551 the indirection level. 5552 5553 Note that this is actually conservative: it would be slightly more 5554 efficient to use the value of SPILL_INDIRECT_LEVELS from 5555 reload1.c here. */ 5556 5557 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0), 5558 opnum, ADDR_TYPE (type), ind_levels, insn); 5559 push_reload (*loc, NULL_RTX, loc, (rtx*) 0, 5560 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)), 5561 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5562 return 1; 5563 5564 case REG: 5565 { 5566 int regno = REGNO (x); 5567 5568 if (reg_equiv_constant[regno] != 0) 5569 { 5570 find_reloads_address_part (reg_equiv_constant[regno], loc, 5571 (context ? INDEX_REG_CLASS : 5572 MODE_BASE_REG_CLASS (mode)), 5573 GET_MODE (x), opnum, type, ind_levels); 5574 return 1; 5575 } 5576 5577#if 0 /* This might screw code in reload1.c to delete prior output-reload 5578 that feeds this insn. */ 5579 if (reg_equiv_mem[regno] != 0) 5580 { 5581 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0, 5582 (context ? INDEX_REG_CLASS : 5583 MODE_BASE_REG_CLASS (mode)), 5584 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5585 return 1; 5586 } 5587#endif 5588 5589 if (reg_equiv_memory_loc[regno] 5590 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 5591 { 5592 rtx tem = make_memloc (x, regno); 5593 if (reg_equiv_address[regno] != 0 5594 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5595 { 5596 x = tem; 5597 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), 5598 &XEXP (x, 0), opnum, ADDR_TYPE (type), 5599 ind_levels, insn); 5600 } 5601 } 5602 5603 if (reg_renumber[regno] >= 0) 5604 regno = reg_renumber[regno]; 5605 5606 if ((regno >= FIRST_PSEUDO_REGISTER 5607 || !(context ? REGNO_OK_FOR_INDEX_P (regno) 5608 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))) 5609 { 5610 push_reload (x, NULL_RTX, loc, (rtx*) 0, 5611 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)), 5612 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5613 return 1; 5614 } 5615 5616 /* If a register appearing in an address is the subject of a CLOBBER 5617 in this insn, reload it into some other register to be safe. 5618 The CLOBBER is supposed to make the register unavailable 5619 from before this insn to after it. */ 5620 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0)) 5621 { 5622 push_reload (x, NULL_RTX, loc, (rtx*) 0, 5623 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)), 5624 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5625 return 1; 5626 } 5627 } 5628 return 0; 5629 5630 case SUBREG: 5631 if (GET_CODE (SUBREG_REG (x)) == REG) 5632 { 5633 /* If this is a SUBREG of a hard register and the resulting register 5634 is of the wrong class, reload the whole SUBREG. This avoids 5635 needless copies if SUBREG_REG is multi-word. */ 5636 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) 5637 { 5638 int regno = subreg_regno (x); 5639 5640 if (! (context ? REGNO_OK_FOR_INDEX_P (regno) 5641 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))) 5642 { 5643 push_reload (x, NULL_RTX, loc, (rtx*) 0, 5644 (context ? INDEX_REG_CLASS : 5645 MODE_BASE_REG_CLASS (mode)), 5646 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5647 return 1; 5648 } 5649 } 5650 /* If this is a SUBREG of a pseudo-register, and the pseudo-register 5651 is larger than the class size, then reload the whole SUBREG. */ 5652 else 5653 { 5654 enum reg_class class = (context ? INDEX_REG_CLASS 5655 : MODE_BASE_REG_CLASS (mode)); 5656 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x))) 5657 > reg_class_size[class]) 5658 { 5659 x = find_reloads_subreg_address (x, 0, opnum, type, 5660 ind_levels, insn); 5661 push_reload (x, NULL_RTX, loc, (rtx*) 0, class, 5662 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5663 return 1; 5664 } 5665 } 5666 } 5667 break; 5668 5669 default: 5670 break; 5671 } 5672 5673 { 5674 const char *fmt = GET_RTX_FORMAT (code); 5675 int i; 5676 5677 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5678 { 5679 if (fmt[i] == 'e') 5680 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i), 5681 opnum, type, ind_levels, insn); 5682 } 5683 } 5684 5685 return 0; 5686} 5687 5688/* X, which is found at *LOC, is a part of an address that needs to be 5689 reloaded into a register of class CLASS. If X is a constant, or if 5690 X is a PLUS that contains a constant, check that the constant is a 5691 legitimate operand and that we are supposed to be able to load 5692 it into the register. 5693 5694 If not, force the constant into memory and reload the MEM instead. 5695 5696 MODE is the mode to use, in case X is an integer constant. 5697 5698 OPNUM and TYPE describe the purpose of any reloads made. 5699 5700 IND_LEVELS says how many levels of indirect addressing this machine 5701 supports. */ 5702 5703static void 5704find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels) 5705 rtx x; 5706 rtx *loc; 5707 enum reg_class class; 5708 enum machine_mode mode; 5709 int opnum; 5710 enum reload_type type; 5711 int ind_levels; 5712{ 5713 if (CONSTANT_P (x) 5714 && (! LEGITIMATE_CONSTANT_P (x) 5715 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS)) 5716 { 5717 rtx tem; 5718 5719 tem = x = force_const_mem (mode, x); 5720 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0), 5721 opnum, type, ind_levels, 0); 5722 } 5723 5724 else if (GET_CODE (x) == PLUS 5725 && CONSTANT_P (XEXP (x, 1)) 5726 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1)) 5727 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS)) 5728 { 5729 rtx tem; 5730 5731 tem = force_const_mem (GET_MODE (x), XEXP (x, 1)); 5732 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem); 5733 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0), 5734 opnum, type, ind_levels, 0); 5735 } 5736 5737 push_reload (x, NULL_RTX, loc, (rtx*) 0, class, 5738 mode, VOIDmode, 0, 0, opnum, type); 5739} 5740 5741/* X, a subreg of a pseudo, is a part of an address that needs to be 5742 reloaded. 5743 5744 If the pseudo is equivalent to a memory location that cannot be directly 5745 addressed, make the necessary address reloads. 5746 5747 If address reloads have been necessary, or if the address is changed 5748 by register elimination, return the rtx of the memory location; 5749 otherwise, return X. 5750 5751 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the 5752 memory location. 5753 5754 OPNUM and TYPE identify the purpose of the reload. 5755 5756 IND_LEVELS says how many levels of indirect addressing are 5757 supported at this point in the address. 5758 5759 INSN, if nonzero, is the insn in which we do the reload. It is used 5760 to determine where to put USEs for pseudos that we have to replace with 5761 stack slots. */ 5762 5763static rtx 5764find_reloads_subreg_address (x, force_replace, opnum, type, 5765 ind_levels, insn) 5766 rtx x; 5767 int force_replace; 5768 int opnum; 5769 enum reload_type type; 5770 int ind_levels; 5771 rtx insn; 5772{ 5773 int regno = REGNO (SUBREG_REG (x)); 5774 5775 if (reg_equiv_memory_loc[regno]) 5776 { 5777 /* If the address is not directly addressable, or if the address is not 5778 offsettable, then it must be replaced. */ 5779 if (! force_replace 5780 && (reg_equiv_address[regno] 5781 || ! offsettable_memref_p (reg_equiv_mem[regno]))) 5782 force_replace = 1; 5783 5784 if (force_replace || num_not_at_initial_offset) 5785 { 5786 rtx tem = make_memloc (SUBREG_REG (x), regno); 5787 5788 /* If the address changes because of register elimination, then 5789 it must be replaced. */ 5790 if (force_replace 5791 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5792 { 5793 int offset = SUBREG_BYTE (x); 5794 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x)); 5795 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))); 5796 5797 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset); 5798 PUT_MODE (tem, GET_MODE (x)); 5799 5800 /* If this was a paradoxical subreg that we replaced, the 5801 resulting memory must be sufficiently aligned to allow 5802 us to widen the mode of the memory. */ 5803 if (outer_size > inner_size && STRICT_ALIGNMENT) 5804 { 5805 rtx base; 5806 5807 base = XEXP (tem, 0); 5808 if (GET_CODE (base) == PLUS) 5809 { 5810 if (GET_CODE (XEXP (base, 1)) == CONST_INT 5811 && INTVAL (XEXP (base, 1)) % outer_size != 0) 5812 return x; 5813 base = XEXP (base, 0); 5814 } 5815 if (GET_CODE (base) != REG 5816 || (REGNO_POINTER_ALIGN (REGNO (base)) 5817 < outer_size * BITS_PER_UNIT)) 5818 return x; 5819 } 5820 5821 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), 5822 &XEXP (tem, 0), opnum, ADDR_TYPE (type), 5823 ind_levels, insn); 5824 5825 /* If this is not a toplevel operand, find_reloads doesn't see 5826 this substitution. We have to emit a USE of the pseudo so 5827 that delete_output_reload can see it. */ 5828 if (replace_reloads && recog_data.operand[opnum] != x) 5829 /* We mark the USE with QImode so that we recognize it 5830 as one that can be safely deleted at the end of 5831 reload. */ 5832 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, 5833 SUBREG_REG (x)), 5834 insn), QImode); 5835 x = tem; 5836 } 5837 } 5838 } 5839 return x; 5840} 5841 5842/* Substitute into the current INSN the registers into which we have reloaded 5843 the things that need reloading. The array `replacements' 5844 contains the locations of all pointers that must be changed 5845 and says what to replace them with. 5846 5847 Return the rtx that X translates into; usually X, but modified. */ 5848 5849void 5850subst_reloads (insn) 5851 rtx insn; 5852{ 5853 int i; 5854 5855 for (i = 0; i < n_replacements; i++) 5856 { 5857 struct replacement *r = &replacements[i]; 5858 rtx reloadreg = rld[r->what].reg_rtx; 5859 if (reloadreg) 5860 { 5861#ifdef ENABLE_CHECKING 5862 /* Internal consistency test. Check that we don't modify 5863 anything in the equivalence arrays. Whenever something from 5864 those arrays needs to be reloaded, it must be unshared before 5865 being substituted into; the equivalence must not be modified. 5866 Otherwise, if the equivalence is used after that, it will 5867 have been modified, and the thing substituted (probably a 5868 register) is likely overwritten and not a usable equivalence. */ 5869 int check_regno; 5870 5871 for (check_regno = 0; check_regno < max_regno; check_regno++) 5872 { 5873#define CHECK_MODF(ARRAY) \ 5874 if (ARRAY[check_regno] \ 5875 && loc_mentioned_in_p (r->where, \ 5876 ARRAY[check_regno])) \ 5877 abort () 5878 5879 CHECK_MODF (reg_equiv_constant); 5880 CHECK_MODF (reg_equiv_memory_loc); 5881 CHECK_MODF (reg_equiv_address); 5882 CHECK_MODF (reg_equiv_mem); 5883#undef CHECK_MODF 5884 } 5885#endif /* ENABLE_CHECKING */ 5886 5887 /* If we're replacing a LABEL_REF with a register, add a 5888 REG_LABEL note to indicate to flow which label this 5889 register refers to. */ 5890 if (GET_CODE (*r->where) == LABEL_REF 5891 && GET_CODE (insn) == JUMP_INSN) 5892 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, 5893 XEXP (*r->where, 0), 5894 REG_NOTES (insn)); 5895 5896 /* Encapsulate RELOADREG so its machine mode matches what 5897 used to be there. Note that gen_lowpart_common will 5898 do the wrong thing if RELOADREG is multi-word. RELOADREG 5899 will always be a REG here. */ 5900 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode) 5901 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg)); 5902 5903 /* If we are putting this into a SUBREG and RELOADREG is a 5904 SUBREG, we would be making nested SUBREGs, so we have to fix 5905 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */ 5906 5907 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG) 5908 { 5909 if (GET_MODE (*r->subreg_loc) 5910 == GET_MODE (SUBREG_REG (reloadreg))) 5911 *r->subreg_loc = SUBREG_REG (reloadreg); 5912 else 5913 { 5914 int final_offset = 5915 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg); 5916 5917 /* When working with SUBREGs the rule is that the byte 5918 offset must be a multiple of the SUBREG's mode. */ 5919 final_offset = (final_offset / 5920 GET_MODE_SIZE (GET_MODE (*r->subreg_loc))); 5921 final_offset = (final_offset * 5922 GET_MODE_SIZE (GET_MODE (*r->subreg_loc))); 5923 5924 *r->where = SUBREG_REG (reloadreg); 5925 SUBREG_BYTE (*r->subreg_loc) = final_offset; 5926 } 5927 } 5928 else 5929 *r->where = reloadreg; 5930 } 5931 /* If reload got no reg and isn't optional, something's wrong. */ 5932 else if (! rld[r->what].optional) 5933 abort (); 5934 } 5935} 5936 5937/* Make a copy of any replacements being done into X and move those 5938 copies to locations in Y, a copy of X. */ 5939 5940void 5941copy_replacements (x, y) 5942 rtx x, y; 5943{ 5944 /* We can't support X being a SUBREG because we might then need to know its 5945 location if something inside it was replaced. */ 5946 if (GET_CODE (x) == SUBREG) 5947 abort (); 5948 5949 copy_replacements_1 (&x, &y, n_replacements); 5950} 5951 5952static void 5953copy_replacements_1 (px, py, orig_replacements) 5954 rtx *px; 5955 rtx *py; 5956 int orig_replacements; 5957{ 5958 int i, j; 5959 rtx x, y; 5960 struct replacement *r; 5961 enum rtx_code code; 5962 const char *fmt; 5963 5964 for (j = 0; j < orig_replacements; j++) 5965 { 5966 if (replacements[j].subreg_loc == px) 5967 { 5968 r = &replacements[n_replacements++]; 5969 r->where = replacements[j].where; 5970 r->subreg_loc = py; 5971 r->what = replacements[j].what; 5972 r->mode = replacements[j].mode; 5973 } 5974 else if (replacements[j].where == px) 5975 { 5976 r = &replacements[n_replacements++]; 5977 r->where = py; 5978 r->subreg_loc = 0; 5979 r->what = replacements[j].what; 5980 r->mode = replacements[j].mode; 5981 } 5982 } 5983 5984 x = *px; 5985 y = *py; 5986 code = GET_CODE (x); 5987 fmt = GET_RTX_FORMAT (code); 5988 5989 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5990 { 5991 if (fmt[i] == 'e') 5992 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements); 5993 else if (fmt[i] == 'E') 5994 for (j = XVECLEN (x, i); --j >= 0; ) 5995 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j), 5996 orig_replacements); 5997 } 5998} 5999 6000/* Change any replacements being done to *X to be done to *Y */ 6001 6002void 6003move_replacements (x, y) 6004 rtx *x; 6005 rtx *y; 6006{ 6007 int i; 6008 6009 for (i = 0; i < n_replacements; i++) 6010 if (replacements[i].subreg_loc == x) 6011 replacements[i].subreg_loc = y; 6012 else if (replacements[i].where == x) 6013 { 6014 replacements[i].where = y; 6015 replacements[i].subreg_loc = 0; 6016 } 6017} 6018 6019/* If LOC was scheduled to be replaced by something, return the replacement. 6020 Otherwise, return *LOC. */ 6021 6022rtx 6023find_replacement (loc) 6024 rtx *loc; 6025{ 6026 struct replacement *r; 6027 6028 for (r = &replacements[0]; r < &replacements[n_replacements]; r++) 6029 { 6030 rtx reloadreg = rld[r->what].reg_rtx; 6031 6032 if (reloadreg && r->where == loc) 6033 { 6034 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode) 6035 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg)); 6036 6037 return reloadreg; 6038 } 6039 else if (reloadreg && r->subreg_loc == loc) 6040 { 6041 /* RELOADREG must be either a REG or a SUBREG. 6042 6043 ??? Is it actually still ever a SUBREG? If so, why? */ 6044 6045 if (GET_CODE (reloadreg) == REG) 6046 return gen_rtx_REG (GET_MODE (*loc), 6047 (REGNO (reloadreg) + 6048 subreg_regno_offset (REGNO (SUBREG_REG (*loc)), 6049 GET_MODE (SUBREG_REG (*loc)), 6050 SUBREG_BYTE (*loc), 6051 GET_MODE (*loc)))); 6052 else if (GET_MODE (reloadreg) == GET_MODE (*loc)) 6053 return reloadreg; 6054 else 6055 { 6056 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc); 6057 6058 /* When working with SUBREGs the rule is that the byte 6059 offset must be a multiple of the SUBREG's mode. */ 6060 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc))); 6061 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc))); 6062 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg), 6063 final_offset); 6064 } 6065 } 6066 } 6067 6068 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for 6069 what's inside and make a new rtl if so. */ 6070 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS 6071 || GET_CODE (*loc) == MULT) 6072 { 6073 rtx x = find_replacement (&XEXP (*loc, 0)); 6074 rtx y = find_replacement (&XEXP (*loc, 1)); 6075 6076 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1)) 6077 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y); 6078 } 6079 6080 return *loc; 6081} 6082 6083/* Return nonzero if register in range [REGNO, ENDREGNO) 6084 appears either explicitly or implicitly in X 6085 other than being stored into (except for earlyclobber operands). 6086 6087 References contained within the substructure at LOC do not count. 6088 LOC may be zero, meaning don't ignore anything. 6089 6090 This is similar to refers_to_regno_p in rtlanal.c except that we 6091 look at equivalences for pseudos that didn't get hard registers. */ 6092 6093int 6094refers_to_regno_for_reload_p (regno, endregno, x, loc) 6095 unsigned int regno, endregno; 6096 rtx x; 6097 rtx *loc; 6098{ 6099 int i; 6100 unsigned int r; 6101 RTX_CODE code; 6102 const char *fmt; 6103 6104 if (x == 0) 6105 return 0; 6106 6107 repeat: 6108 code = GET_CODE (x); 6109 6110 switch (code) 6111 { 6112 case REG: 6113 r = REGNO (x); 6114 6115 /* If this is a pseudo, a hard register must not have been allocated. 6116 X must therefore either be a constant or be in memory. */ 6117 if (r >= FIRST_PSEUDO_REGISTER) 6118 { 6119 if (reg_equiv_memory_loc[r]) 6120 return refers_to_regno_for_reload_p (regno, endregno, 6121 reg_equiv_memory_loc[r], 6122 (rtx*) 0); 6123 6124 if (reg_equiv_constant[r]) 6125 return 0; 6126 6127 abort (); 6128 } 6129 6130 return (endregno > r 6131 && regno < r + (r < FIRST_PSEUDO_REGISTER 6132 ? HARD_REGNO_NREGS (r, GET_MODE (x)) 6133 : 1)); 6134 6135 case SUBREG: 6136 /* If this is a SUBREG of a hard reg, we can see exactly which 6137 registers are being modified. Otherwise, handle normally. */ 6138 if (GET_CODE (SUBREG_REG (x)) == REG 6139 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) 6140 { 6141 unsigned int inner_regno = subreg_regno (x); 6142 unsigned int inner_endregno 6143 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER 6144 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 6145 6146 return endregno > inner_regno && regno < inner_endregno; 6147 } 6148 break; 6149 6150 case CLOBBER: 6151 case SET: 6152 if (&SET_DEST (x) != loc 6153 /* Note setting a SUBREG counts as referring to the REG it is in for 6154 a pseudo but not for hard registers since we can 6155 treat each word individually. */ 6156 && ((GET_CODE (SET_DEST (x)) == SUBREG 6157 && loc != &SUBREG_REG (SET_DEST (x)) 6158 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG 6159 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER 6160 && refers_to_regno_for_reload_p (regno, endregno, 6161 SUBREG_REG (SET_DEST (x)), 6162 loc)) 6163 /* If the output is an earlyclobber operand, this is 6164 a conflict. */ 6165 || ((GET_CODE (SET_DEST (x)) != REG 6166 || earlyclobber_operand_p (SET_DEST (x))) 6167 && refers_to_regno_for_reload_p (regno, endregno, 6168 SET_DEST (x), loc)))) 6169 return 1; 6170 6171 if (code == CLOBBER || loc == &SET_SRC (x)) 6172 return 0; 6173 x = SET_SRC (x); 6174 goto repeat; 6175 6176 default: 6177 break; 6178 } 6179 6180 /* X does not match, so try its subexpressions. */ 6181 6182 fmt = GET_RTX_FORMAT (code); 6183 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 6184 { 6185 if (fmt[i] == 'e' && loc != &XEXP (x, i)) 6186 { 6187 if (i == 0) 6188 { 6189 x = XEXP (x, 0); 6190 goto repeat; 6191 } 6192 else 6193 if (refers_to_regno_for_reload_p (regno, endregno, 6194 XEXP (x, i), loc)) 6195 return 1; 6196 } 6197 else if (fmt[i] == 'E') 6198 { 6199 int j; 6200 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 6201 if (loc != &XVECEXP (x, i, j) 6202 && refers_to_regno_for_reload_p (regno, endregno, 6203 XVECEXP (x, i, j), loc)) 6204 return 1; 6205 } 6206 } 6207 return 0; 6208} 6209 6210/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG, 6211 we check if any register number in X conflicts with the relevant register 6212 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN 6213 contains a MEM (we don't bother checking for memory addresses that can't 6214 conflict because we expect this to be a rare case. 6215 6216 This function is similar to reg_overlap_mentioned_p in rtlanal.c except 6217 that we look at equivalences for pseudos that didn't get hard registers. */ 6218 6219int 6220reg_overlap_mentioned_for_reload_p (x, in) 6221 rtx x, in; 6222{ 6223 int regno, endregno; 6224 6225 /* Overly conservative. */ 6226 if (GET_CODE (x) == STRICT_LOW_PART 6227 || GET_RTX_CLASS (GET_CODE (x)) == 'a') 6228 x = XEXP (x, 0); 6229 6230 /* If either argument is a constant, then modifying X can not affect IN. */ 6231 if (CONSTANT_P (x) || CONSTANT_P (in)) 6232 return 0; 6233 else if (GET_CODE (x) == SUBREG) 6234 { 6235 regno = REGNO (SUBREG_REG (x)); 6236 if (regno < FIRST_PSEUDO_REGISTER) 6237 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)), 6238 GET_MODE (SUBREG_REG (x)), 6239 SUBREG_BYTE (x), 6240 GET_MODE (x)); 6241 } 6242 else if (GET_CODE (x) == REG) 6243 { 6244 regno = REGNO (x); 6245 6246 /* If this is a pseudo, it must not have been assigned a hard register. 6247 Therefore, it must either be in memory or be a constant. */ 6248 6249 if (regno >= FIRST_PSEUDO_REGISTER) 6250 { 6251 if (reg_equiv_memory_loc[regno]) 6252 return refers_to_mem_for_reload_p (in); 6253 else if (reg_equiv_constant[regno]) 6254 return 0; 6255 abort (); 6256 } 6257 } 6258 else if (GET_CODE (x) == MEM) 6259 return refers_to_mem_for_reload_p (in); 6260 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC 6261 || GET_CODE (x) == CC0) 6262 return reg_mentioned_p (x, in); 6263 else if (GET_CODE (x) == PLUS) 6264 return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in) 6265 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in)); 6266 else 6267 abort (); 6268 6269 endregno = regno + (regno < FIRST_PSEUDO_REGISTER 6270 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 6271 6272 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0); 6273} 6274 6275/* Return nonzero if anything in X contains a MEM. Look also for pseudo 6276 registers. */ 6277 6278int 6279refers_to_mem_for_reload_p (x) 6280 rtx x; 6281{ 6282 const char *fmt; 6283 int i; 6284 6285 if (GET_CODE (x) == MEM) 6286 return 1; 6287 6288 if (GET_CODE (x) == REG) 6289 return (REGNO (x) >= FIRST_PSEUDO_REGISTER 6290 && reg_equiv_memory_loc[REGNO (x)]); 6291 6292 fmt = GET_RTX_FORMAT (GET_CODE (x)); 6293 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) 6294 if (fmt[i] == 'e' 6295 && (GET_CODE (XEXP (x, i)) == MEM 6296 || refers_to_mem_for_reload_p (XEXP (x, i)))) 6297 return 1; 6298 6299 return 0; 6300} 6301 6302/* Check the insns before INSN to see if there is a suitable register 6303 containing the same value as GOAL. 6304 If OTHER is -1, look for a register in class CLASS. 6305 Otherwise, just see if register number OTHER shares GOAL's value. 6306 6307 Return an rtx for the register found, or zero if none is found. 6308 6309 If RELOAD_REG_P is (short *)1, 6310 we reject any hard reg that appears in reload_reg_rtx 6311 because such a hard reg is also needed coming into this insn. 6312 6313 If RELOAD_REG_P is any other nonzero value, 6314 it is a vector indexed by hard reg number 6315 and we reject any hard reg whose element in the vector is nonnegative 6316 as well as any that appears in reload_reg_rtx. 6317 6318 If GOAL is zero, then GOALREG is a register number; we look 6319 for an equivalent for that register. 6320 6321 MODE is the machine mode of the value we want an equivalence for. 6322 If GOAL is nonzero and not VOIDmode, then it must have mode MODE. 6323 6324 This function is used by jump.c as well as in the reload pass. 6325 6326 If GOAL is the sum of the stack pointer and a constant, we treat it 6327 as if it were a constant except that sp is required to be unchanging. */ 6328 6329rtx 6330find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode) 6331 rtx goal; 6332 rtx insn; 6333 enum reg_class class; 6334 int other; 6335 short *reload_reg_p; 6336 int goalreg; 6337 enum machine_mode mode; 6338{ 6339 rtx p = insn; 6340 rtx goaltry, valtry, value, where; 6341 rtx pat; 6342 int regno = -1; 6343 int valueno; 6344 int goal_mem = 0; 6345 int goal_const = 0; 6346 int goal_mem_addr_varies = 0; 6347 int need_stable_sp = 0; 6348 int nregs; 6349 int valuenregs; 6350 6351 if (goal == 0) 6352 regno = goalreg; 6353 else if (GET_CODE (goal) == REG) 6354 regno = REGNO (goal); 6355 else if (GET_CODE (goal) == MEM) 6356 { 6357 enum rtx_code code = GET_CODE (XEXP (goal, 0)); 6358 if (MEM_VOLATILE_P (goal)) 6359 return 0; 6360 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT) 6361 return 0; 6362 /* An address with side effects must be reexecuted. */ 6363 switch (code) 6364 { 6365 case POST_INC: 6366 case PRE_INC: 6367 case POST_DEC: 6368 case PRE_DEC: 6369 case POST_MODIFY: 6370 case PRE_MODIFY: 6371 return 0; 6372 default: 6373 break; 6374 } 6375 goal_mem = 1; 6376 } 6377 else if (CONSTANT_P (goal)) 6378 goal_const = 1; 6379 else if (GET_CODE (goal) == PLUS 6380 && XEXP (goal, 0) == stack_pointer_rtx 6381 && CONSTANT_P (XEXP (goal, 1))) 6382 goal_const = need_stable_sp = 1; 6383 else if (GET_CODE (goal) == PLUS 6384 && XEXP (goal, 0) == frame_pointer_rtx 6385 && CONSTANT_P (XEXP (goal, 1))) 6386 goal_const = 1; 6387 else 6388 return 0; 6389 6390 /* Scan insns back from INSN, looking for one that copies 6391 a value into or out of GOAL. 6392 Stop and give up if we reach a label. */ 6393 6394 while (1) 6395 { 6396 p = PREV_INSN (p); 6397 if (p == 0 || GET_CODE (p) == CODE_LABEL) 6398 return 0; 6399 6400 if (GET_CODE (p) == INSN 6401 /* If we don't want spill regs ... */ 6402 && (! (reload_reg_p != 0 6403 && reload_reg_p != (short *) (HOST_WIDE_INT) 1) 6404 /* ... then ignore insns introduced by reload; they aren't 6405 useful and can cause results in reload_as_needed to be 6406 different from what they were when calculating the need for 6407 spills. If we notice an input-reload insn here, we will 6408 reject it below, but it might hide a usable equivalent. 6409 That makes bad code. It may even abort: perhaps no reg was 6410 spilled for this insn because it was assumed we would find 6411 that equivalent. */ 6412 || INSN_UID (p) < reload_first_uid)) 6413 { 6414 rtx tem; 6415 pat = single_set (p); 6416 6417 /* First check for something that sets some reg equal to GOAL. */ 6418 if (pat != 0 6419 && ((regno >= 0 6420 && true_regnum (SET_SRC (pat)) == regno 6421 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 6422 || 6423 (regno >= 0 6424 && true_regnum (SET_DEST (pat)) == regno 6425 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0) 6426 || 6427 (goal_const && rtx_equal_p (SET_SRC (pat), goal) 6428 /* When looking for stack pointer + const, 6429 make sure we don't use a stack adjust. */ 6430 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal) 6431 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 6432 || (goal_mem 6433 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0 6434 && rtx_renumbered_equal_p (goal, SET_SRC (pat))) 6435 || (goal_mem 6436 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0 6437 && rtx_renumbered_equal_p (goal, SET_DEST (pat))) 6438 /* If we are looking for a constant, 6439 and something equivalent to that constant was copied 6440 into a reg, we can use that reg. */ 6441 || (goal_const && REG_NOTES (p) != 0 6442 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX)) 6443 && ((rtx_equal_p (XEXP (tem, 0), goal) 6444 && (valueno 6445 = true_regnum (valtry = SET_DEST (pat))) >= 0) 6446 || (GET_CODE (SET_DEST (pat)) == REG 6447 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE 6448 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) 6449 == MODE_FLOAT) 6450 && GET_CODE (goal) == CONST_INT 6451 && 0 != (goaltry 6452 = operand_subword (XEXP (tem, 0), 0, 0, 6453 VOIDmode)) 6454 && rtx_equal_p (goal, goaltry) 6455 && (valtry 6456 = operand_subword (SET_DEST (pat), 0, 0, 6457 VOIDmode)) 6458 && (valueno = true_regnum (valtry)) >= 0))) 6459 || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 6460 NULL_RTX)) 6461 && GET_CODE (SET_DEST (pat)) == REG 6462 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE 6463 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) 6464 == MODE_FLOAT) 6465 && GET_CODE (goal) == CONST_INT 6466 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0, 6467 VOIDmode)) 6468 && rtx_equal_p (goal, goaltry) 6469 && (valtry 6470 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode)) 6471 && (valueno = true_regnum (valtry)) >= 0))) 6472 { 6473 if (other >= 0) 6474 { 6475 if (valueno != other) 6476 continue; 6477 } 6478 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER) 6479 continue; 6480 else 6481 { 6482 int i; 6483 6484 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--) 6485 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 6486 valueno + i)) 6487 break; 6488 if (i >= 0) 6489 continue; 6490 } 6491 value = valtry; 6492 where = p; 6493 break; 6494 } 6495 } 6496 } 6497 6498 /* We found a previous insn copying GOAL into a suitable other reg VALUE 6499 (or copying VALUE into GOAL, if GOAL is also a register). 6500 Now verify that VALUE is really valid. */ 6501 6502 /* VALUENO is the register number of VALUE; a hard register. */ 6503 6504 /* Don't try to re-use something that is killed in this insn. We want 6505 to be able to trust REG_UNUSED notes. */ 6506 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value)) 6507 return 0; 6508 6509 /* If we propose to get the value from the stack pointer or if GOAL is 6510 a MEM based on the stack pointer, we need a stable SP. */ 6511 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM 6512 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx, 6513 goal))) 6514 need_stable_sp = 1; 6515 6516 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */ 6517 if (GET_MODE (value) != mode) 6518 return 0; 6519 6520 /* Reject VALUE if it was loaded from GOAL 6521 and is also a register that appears in the address of GOAL. */ 6522 6523 if (goal_mem && value == SET_DEST (single_set (where)) 6524 && refers_to_regno_for_reload_p (valueno, 6525 (valueno 6526 + HARD_REGNO_NREGS (valueno, mode)), 6527 goal, (rtx*) 0)) 6528 return 0; 6529 6530 /* Reject registers that overlap GOAL. */ 6531 6532 if (!goal_mem && !goal_const 6533 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno 6534 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode)) 6535 return 0; 6536 6537 nregs = HARD_REGNO_NREGS (regno, mode); 6538 valuenregs = HARD_REGNO_NREGS (valueno, mode); 6539 6540 /* Reject VALUE if it is one of the regs reserved for reloads. 6541 Reload1 knows how to reuse them anyway, and it would get 6542 confused if we allocated one without its knowledge. 6543 (Now that insns introduced by reload are ignored above, 6544 this case shouldn't happen, but I'm not positive.) */ 6545 6546 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1) 6547 { 6548 int i; 6549 for (i = 0; i < valuenregs; ++i) 6550 if (reload_reg_p[valueno + i] >= 0) 6551 return 0; 6552 } 6553 6554 /* Reject VALUE if it is a register being used for an input reload 6555 even if it is not one of those reserved. */ 6556 6557 if (reload_reg_p != 0) 6558 { 6559 int i; 6560 for (i = 0; i < n_reloads; i++) 6561 if (rld[i].reg_rtx != 0 && rld[i].in) 6562 { 6563 int regno1 = REGNO (rld[i].reg_rtx); 6564 int nregs1 = HARD_REGNO_NREGS (regno1, 6565 GET_MODE (rld[i].reg_rtx)); 6566 if (regno1 < valueno + valuenregs 6567 && regno1 + nregs1 > valueno) 6568 return 0; 6569 } 6570 } 6571 6572 if (goal_mem) 6573 /* We must treat frame pointer as varying here, 6574 since it can vary--in a nonlocal goto as generated by expand_goto. */ 6575 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0)); 6576 6577 /* Now verify that the values of GOAL and VALUE remain unaltered 6578 until INSN is reached. */ 6579 6580 p = insn; 6581 while (1) 6582 { 6583 p = PREV_INSN (p); 6584 if (p == where) 6585 return value; 6586 6587 /* Don't trust the conversion past a function call 6588 if either of the two is in a call-clobbered register, or memory. */ 6589 if (GET_CODE (p) == CALL_INSN) 6590 { 6591 int i; 6592 6593 if (goal_mem || need_stable_sp) 6594 return 0; 6595 6596 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER) 6597 for (i = 0; i < nregs; ++i) 6598 if (call_used_regs[regno + i]) 6599 return 0; 6600 6601 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER) 6602 for (i = 0; i < valuenregs; ++i) 6603 if (call_used_regs[valueno + i]) 6604 return 0; 6605#ifdef NON_SAVING_SETJMP 6606 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL)) 6607 return 0; 6608#endif 6609 } 6610 6611 if (INSN_P (p)) 6612 { 6613 pat = PATTERN (p); 6614 6615 /* Watch out for unspec_volatile, and volatile asms. */ 6616 if (volatile_insn_p (pat)) 6617 return 0; 6618 6619 /* If this insn P stores in either GOAL or VALUE, return 0. 6620 If GOAL is a memory ref and this insn writes memory, return 0. 6621 If GOAL is a memory ref and its address is not constant, 6622 and this insn P changes a register used in GOAL, return 0. */ 6623 6624 if (GET_CODE (pat) == COND_EXEC) 6625 pat = COND_EXEC_CODE (pat); 6626 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER) 6627 { 6628 rtx dest = SET_DEST (pat); 6629 while (GET_CODE (dest) == SUBREG 6630 || GET_CODE (dest) == ZERO_EXTRACT 6631 || GET_CODE (dest) == SIGN_EXTRACT 6632 || GET_CODE (dest) == STRICT_LOW_PART) 6633 dest = XEXP (dest, 0); 6634 if (GET_CODE (dest) == REG) 6635 { 6636 int xregno = REGNO (dest); 6637 int xnregs; 6638 if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 6639 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6640 else 6641 xnregs = 1; 6642 if (xregno < regno + nregs && xregno + xnregs > regno) 6643 return 0; 6644 if (xregno < valueno + valuenregs 6645 && xregno + xnregs > valueno) 6646 return 0; 6647 if (goal_mem_addr_varies 6648 && reg_overlap_mentioned_for_reload_p (dest, goal)) 6649 return 0; 6650 if (xregno == STACK_POINTER_REGNUM && need_stable_sp) 6651 return 0; 6652 } 6653 else if (goal_mem && GET_CODE (dest) == MEM 6654 && ! push_operand (dest, GET_MODE (dest))) 6655 return 0; 6656 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER 6657 && reg_equiv_memory_loc[regno] != 0) 6658 return 0; 6659 else if (need_stable_sp && push_operand (dest, GET_MODE (dest))) 6660 return 0; 6661 } 6662 else if (GET_CODE (pat) == PARALLEL) 6663 { 6664 int i; 6665 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--) 6666 { 6667 rtx v1 = XVECEXP (pat, 0, i); 6668 if (GET_CODE (v1) == COND_EXEC) 6669 v1 = COND_EXEC_CODE (v1); 6670 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER) 6671 { 6672 rtx dest = SET_DEST (v1); 6673 while (GET_CODE (dest) == SUBREG 6674 || GET_CODE (dest) == ZERO_EXTRACT 6675 || GET_CODE (dest) == SIGN_EXTRACT 6676 || GET_CODE (dest) == STRICT_LOW_PART) 6677 dest = XEXP (dest, 0); 6678 if (GET_CODE (dest) == REG) 6679 { 6680 int xregno = REGNO (dest); 6681 int xnregs; 6682 if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 6683 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6684 else 6685 xnregs = 1; 6686 if (xregno < regno + nregs 6687 && xregno + xnregs > regno) 6688 return 0; 6689 if (xregno < valueno + valuenregs 6690 && xregno + xnregs > valueno) 6691 return 0; 6692 if (goal_mem_addr_varies 6693 && reg_overlap_mentioned_for_reload_p (dest, 6694 goal)) 6695 return 0; 6696 if (xregno == STACK_POINTER_REGNUM && need_stable_sp) 6697 return 0; 6698 } 6699 else if (goal_mem && GET_CODE (dest) == MEM 6700 && ! push_operand (dest, GET_MODE (dest))) 6701 return 0; 6702 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER 6703 && reg_equiv_memory_loc[regno] != 0) 6704 return 0; 6705 else if (need_stable_sp 6706 && push_operand (dest, GET_MODE (dest))) 6707 return 0; 6708 } 6709 } 6710 } 6711 6712 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p)) 6713 { 6714 rtx link; 6715 6716 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0; 6717 link = XEXP (link, 1)) 6718 { 6719 pat = XEXP (link, 0); 6720 if (GET_CODE (pat) == CLOBBER) 6721 { 6722 rtx dest = SET_DEST (pat); 6723 6724 if (GET_CODE (dest) == REG) 6725 { 6726 int xregno = REGNO (dest); 6727 int xnregs 6728 = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6729 6730 if (xregno < regno + nregs 6731 && xregno + xnregs > regno) 6732 return 0; 6733 else if (xregno < valueno + valuenregs 6734 && xregno + xnregs > valueno) 6735 return 0; 6736 else if (goal_mem_addr_varies 6737 && reg_overlap_mentioned_for_reload_p (dest, 6738 goal)) 6739 return 0; 6740 } 6741 6742 else if (goal_mem && GET_CODE (dest) == MEM 6743 && ! push_operand (dest, GET_MODE (dest))) 6744 return 0; 6745 else if (need_stable_sp 6746 && push_operand (dest, GET_MODE (dest))) 6747 return 0; 6748 } 6749 } 6750 } 6751 6752#ifdef AUTO_INC_DEC 6753 /* If this insn auto-increments or auto-decrements 6754 either regno or valueno, return 0 now. 6755 If GOAL is a memory ref and its address is not constant, 6756 and this insn P increments a register used in GOAL, return 0. */ 6757 { 6758 rtx link; 6759 6760 for (link = REG_NOTES (p); link; link = XEXP (link, 1)) 6761 if (REG_NOTE_KIND (link) == REG_INC 6762 && GET_CODE (XEXP (link, 0)) == REG) 6763 { 6764 int incno = REGNO (XEXP (link, 0)); 6765 if (incno < regno + nregs && incno >= regno) 6766 return 0; 6767 if (incno < valueno + valuenregs && incno >= valueno) 6768 return 0; 6769 if (goal_mem_addr_varies 6770 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0), 6771 goal)) 6772 return 0; 6773 } 6774 } 6775#endif 6776 } 6777 } 6778} 6779 6780/* Find a place where INCED appears in an increment or decrement operator 6781 within X, and return the amount INCED is incremented or decremented by. 6782 The value is always positive. */ 6783 6784static int 6785find_inc_amount (x, inced) 6786 rtx x, inced; 6787{ 6788 enum rtx_code code = GET_CODE (x); 6789 const char *fmt; 6790 int i; 6791 6792 if (code == MEM) 6793 { 6794 rtx addr = XEXP (x, 0); 6795 if ((GET_CODE (addr) == PRE_DEC 6796 || GET_CODE (addr) == POST_DEC 6797 || GET_CODE (addr) == PRE_INC 6798 || GET_CODE (addr) == POST_INC) 6799 && XEXP (addr, 0) == inced) 6800 return GET_MODE_SIZE (GET_MODE (x)); 6801 else if ((GET_CODE (addr) == PRE_MODIFY 6802 || GET_CODE (addr) == POST_MODIFY) 6803 && GET_CODE (XEXP (addr, 1)) == PLUS 6804 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0) 6805 && XEXP (addr, 0) == inced 6806 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT) 6807 { 6808 i = INTVAL (XEXP (XEXP (addr, 1), 1)); 6809 return i < 0 ? -i : i; 6810 } 6811 } 6812 6813 fmt = GET_RTX_FORMAT (code); 6814 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 6815 { 6816 if (fmt[i] == 'e') 6817 { 6818 int tem = find_inc_amount (XEXP (x, i), inced); 6819 if (tem != 0) 6820 return tem; 6821 } 6822 if (fmt[i] == 'E') 6823 { 6824 int j; 6825 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 6826 { 6827 int tem = find_inc_amount (XVECEXP (x, i, j), inced); 6828 if (tem != 0) 6829 return tem; 6830 } 6831 } 6832 } 6833 6834 return 0; 6835} 6836 6837/* Return 1 if register REGNO is the subject of a clobber in insn INSN. 6838 If SETS is nonzero, also consider SETs. */ 6839 6840int 6841regno_clobbered_p (regno, insn, mode, sets) 6842 unsigned int regno; 6843 rtx insn; 6844 enum machine_mode mode; 6845 int sets; 6846{ 6847 unsigned int nregs = HARD_REGNO_NREGS (regno, mode); 6848 unsigned int endregno = regno + nregs; 6849 6850 if ((GET_CODE (PATTERN (insn)) == CLOBBER 6851 || (sets && GET_CODE (PATTERN (insn)) == SET)) 6852 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG) 6853 { 6854 unsigned int test = REGNO (XEXP (PATTERN (insn), 0)); 6855 6856 return test >= regno && test < endregno; 6857 } 6858 6859 if (GET_CODE (PATTERN (insn)) == PARALLEL) 6860 { 6861 int i = XVECLEN (PATTERN (insn), 0) - 1; 6862 6863 for (; i >= 0; i--) 6864 { 6865 rtx elt = XVECEXP (PATTERN (insn), 0, i); 6866 if ((GET_CODE (elt) == CLOBBER 6867 || (sets && GET_CODE (PATTERN (insn)) == SET)) 6868 && GET_CODE (XEXP (elt, 0)) == REG) 6869 { 6870 unsigned int test = REGNO (XEXP (elt, 0)); 6871 6872 if (test >= regno && test < endregno) 6873 return 1; 6874 } 6875 } 6876 } 6877 6878 return 0; 6879} 6880 6881static const char *const reload_when_needed_name[] = 6882{ 6883 "RELOAD_FOR_INPUT", 6884 "RELOAD_FOR_OUTPUT", 6885 "RELOAD_FOR_INSN", 6886 "RELOAD_FOR_INPUT_ADDRESS", 6887 "RELOAD_FOR_INPADDR_ADDRESS", 6888 "RELOAD_FOR_OUTPUT_ADDRESS", 6889 "RELOAD_FOR_OUTADDR_ADDRESS", 6890 "RELOAD_FOR_OPERAND_ADDRESS", 6891 "RELOAD_FOR_OPADDR_ADDR", 6892 "RELOAD_OTHER", 6893 "RELOAD_FOR_OTHER_ADDRESS" 6894}; 6895 6896static const char * const reg_class_names[] = REG_CLASS_NAMES; 6897 6898/* These functions are used to print the variables set by 'find_reloads' */ 6899 6900void 6901debug_reload_to_stream (f) 6902 FILE *f; 6903{ 6904 int r; 6905 const char *prefix; 6906 6907 if (! f) 6908 f = stderr; 6909 for (r = 0; r < n_reloads; r++) 6910 { 6911 fprintf (f, "Reload %d: ", r); 6912 6913 if (rld[r].in != 0) 6914 { 6915 fprintf (f, "reload_in (%s) = ", 6916 GET_MODE_NAME (rld[r].inmode)); 6917 print_inline_rtx (f, rld[r].in, 24); 6918 fprintf (f, "\n\t"); 6919 } 6920 6921 if (rld[r].out != 0) 6922 { 6923 fprintf (f, "reload_out (%s) = ", 6924 GET_MODE_NAME (rld[r].outmode)); 6925 print_inline_rtx (f, rld[r].out, 24); 6926 fprintf (f, "\n\t"); 6927 } 6928 6929 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]); 6930 6931 fprintf (f, "%s (opnum = %d)", 6932 reload_when_needed_name[(int) rld[r].when_needed], 6933 rld[r].opnum); 6934 6935 if (rld[r].optional) 6936 fprintf (f, ", optional"); 6937 6938 if (rld[r].nongroup) 6939 fprintf (f, ", nongroup"); 6940 6941 if (rld[r].inc != 0) 6942 fprintf (f, ", inc by %d", rld[r].inc); 6943 6944 if (rld[r].nocombine) 6945 fprintf (f, ", can't combine"); 6946 6947 if (rld[r].secondary_p) 6948 fprintf (f, ", secondary_reload_p"); 6949 6950 if (rld[r].in_reg != 0) 6951 { 6952 fprintf (f, "\n\treload_in_reg: "); 6953 print_inline_rtx (f, rld[r].in_reg, 24); 6954 } 6955 6956 if (rld[r].out_reg != 0) 6957 { 6958 fprintf (f, "\n\treload_out_reg: "); 6959 print_inline_rtx (f, rld[r].out_reg, 24); 6960 } 6961 6962 if (rld[r].reg_rtx != 0) 6963 { 6964 fprintf (f, "\n\treload_reg_rtx: "); 6965 print_inline_rtx (f, rld[r].reg_rtx, 24); 6966 } 6967 6968 prefix = "\n\t"; 6969 if (rld[r].secondary_in_reload != -1) 6970 { 6971 fprintf (f, "%ssecondary_in_reload = %d", 6972 prefix, rld[r].secondary_in_reload); 6973 prefix = ", "; 6974 } 6975 6976 if (rld[r].secondary_out_reload != -1) 6977 fprintf (f, "%ssecondary_out_reload = %d\n", 6978 prefix, rld[r].secondary_out_reload); 6979 6980 prefix = "\n\t"; 6981 if (rld[r].secondary_in_icode != CODE_FOR_nothing) 6982 { 6983 fprintf (f, "%ssecondary_in_icode = %s", prefix, 6984 insn_data[rld[r].secondary_in_icode].name); 6985 prefix = ", "; 6986 } 6987 6988 if (rld[r].secondary_out_icode != CODE_FOR_nothing) 6989 fprintf (f, "%ssecondary_out_icode = %s", prefix, 6990 insn_data[rld[r].secondary_out_icode].name); 6991 6992 fprintf (f, "\n"); 6993 } 6994} 6995 6996void 6997debug_reload () 6998{ 6999 debug_reload_to_stream (stderr); 7000} 7001