rs6000.h revision 90075
190075Sobrien/* Definitions of target machine for GNU compiler, for IBM RS/6000. 290075Sobrien Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 390075Sobrien 2000, 2001, 2002 Free Software Foundation, Inc. 490075Sobrien Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) 590075Sobrien 690075SobrienThis file is part of GNU CC. 790075Sobrien 890075SobrienGNU CC is free software; you can redistribute it and/or modify 990075Sobrienit under the terms of the GNU General Public License as published by 1090075Sobrienthe Free Software Foundation; either version 2, or (at your option) 1190075Sobrienany later version. 1290075Sobrien 1390075SobrienGNU CC is distributed in the hope that it will be useful, 1490075Sobrienbut WITHOUT ANY WARRANTY; without even the implied warranty of 1590075SobrienMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1690075SobrienGNU General Public License for more details. 1790075Sobrien 1890075SobrienYou should have received a copy of the GNU General Public License 1990075Sobrienalong with GNU CC; see the file COPYING. If not, write to 2090075Sobrienthe Free Software Foundation, 59 Temple Place - Suite 330, 2190075SobrienBoston, MA 02111-1307, USA. */ 2290075Sobrien 2390075Sobrien 2490075Sobrien/* Note that some other tm.h files include this one and then override 2590075Sobrien many of the definitions. */ 2690075Sobrien 2790075Sobrien/* Definitions for the object file format. These are set at 2890075Sobrien compile-time. */ 2990075Sobrien 3090075Sobrien#define OBJECT_XCOFF 1 3190075Sobrien#define OBJECT_ELF 2 3290075Sobrien#define OBJECT_PEF 3 3390075Sobrien#define OBJECT_MACHO 4 3490075Sobrien 3590075Sobrien#define TARGET_ELF (TARGET_OBJECT_FORMAT == OBJECT_ELF) 3690075Sobrien#define TARGET_XCOFF (TARGET_OBJECT_FORMAT == OBJECT_XCOFF) 3790075Sobrien#define TARGET_MACOS (TARGET_OBJECT_FORMAT == OBJECT_PEF) 3890075Sobrien#define TARGET_MACHO (TARGET_OBJECT_FORMAT == OBJECT_MACHO) 3990075Sobrien 4090075Sobrien#ifndef TARGET_AIX 4190075Sobrien#define TARGET_AIX 0 4290075Sobrien#endif 4390075Sobrien 4490075Sobrien/* Default string to use for cpu if not specified. */ 4590075Sobrien#ifndef TARGET_CPU_DEFAULT 4690075Sobrien#define TARGET_CPU_DEFAULT ((char *)0) 4790075Sobrien#endif 4890075Sobrien 4990075Sobrien/* Common CPP definitions used by CPP_SPEC among the various targets 5090075Sobrien for handling -mcpu=xxx switches. */ 5190075Sobrien#define CPP_CPU_SPEC \ 5290075Sobrien"%{!mcpu*: \ 5390075Sobrien %{mpower: %{!mpower2: -D_ARCH_PWR}} \ 5490075Sobrien %{mpower2: -D_ARCH_PWR2} \ 5590075Sobrien %{mpowerpc*: -D_ARCH_PPC} \ 5690075Sobrien %{mno-power: %{!mpowerpc*: -D_ARCH_COM}} \ 5790075Sobrien %{!mno-power: %{!mpower2: %(cpp_default)}}} \ 5890075Sobrien%{mcpu=common: -D_ARCH_COM} \ 5990075Sobrien%{mcpu=power: -D_ARCH_PWR} \ 6090075Sobrien%{mcpu=power2: -D_ARCH_PWR2} \ 6190075Sobrien%{mcpu=powerpc: -D_ARCH_PPC} \ 6290075Sobrien%{mcpu=rios: -D_ARCH_PWR} \ 6390075Sobrien%{mcpu=rios1: -D_ARCH_PWR} \ 6490075Sobrien%{mcpu=rios2: -D_ARCH_PWR2} \ 6590075Sobrien%{mcpu=rsc: -D_ARCH_PWR} \ 6690075Sobrien%{mcpu=rsc1: -D_ARCH_PWR} \ 6790075Sobrien%{mcpu=401: -D_ARCH_PPC} \ 6890075Sobrien%{mcpu=403: -D_ARCH_PPC} \ 6990075Sobrien%{mcpu=405: -D_ARCH_PPC} \ 7090075Sobrien%{mcpu=505: -D_ARCH_PPC} \ 7190075Sobrien%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \ 7290075Sobrien%{mcpu=602: -D_ARCH_PPC} \ 7390075Sobrien%{mcpu=603: -D_ARCH_PPC} \ 7490075Sobrien%{mcpu=603e: -D_ARCH_PPC} \ 7590075Sobrien%{mcpu=ec603e: -D_ARCH_PPC} \ 7690075Sobrien%{mcpu=604: -D_ARCH_PPC} \ 7790075Sobrien%{mcpu=604e: -D_ARCH_PPC} \ 7890075Sobrien%{mcpu=620: -D_ARCH_PPC} \ 7990075Sobrien%{mcpu=740: -D_ARCH_PPC} \ 8090075Sobrien%{mcpu=7400: -D_ARCH_PPC} \ 8190075Sobrien%{mcpu=7450: -D_ARCH_PPC} \ 8290075Sobrien%{mcpu=750: -D_ARCH_PPC} \ 8390075Sobrien%{mcpu=801: -D_ARCH_PPC} \ 8490075Sobrien%{mcpu=821: -D_ARCH_PPC} \ 8590075Sobrien%{mcpu=823: -D_ARCH_PPC} \ 8690075Sobrien%{mcpu=860: -D_ARCH_PPC} \ 8790075Sobrien%{maltivec: -D__ALTIVEC__}" 8890075Sobrien 8990075Sobrien/* Common ASM definitions used by ASM_SPEC among the various targets 9090075Sobrien for handling -mcpu=xxx switches. */ 9190075Sobrien#define ASM_CPU_SPEC \ 9290075Sobrien"%{!mcpu*: \ 9390075Sobrien %{mpower: %{!mpower2: -mpwr}} \ 9490075Sobrien %{mpower2: -mpwrx} \ 9590075Sobrien %{mpowerpc*: -mppc} \ 9690075Sobrien %{mno-power: %{!mpowerpc*: -mcom}} \ 9790075Sobrien %{!mno-power: %{!mpower2: %(asm_default)}}} \ 9890075Sobrien%{mcpu=common: -mcom} \ 9990075Sobrien%{mcpu=power: -mpwr} \ 10090075Sobrien%{mcpu=power2: -mpwrx} \ 10190075Sobrien%{mcpu=powerpc: -mppc} \ 10290075Sobrien%{mcpu=rios: -mpwr} \ 10390075Sobrien%{mcpu=rios1: -mpwr} \ 10490075Sobrien%{mcpu=rios2: -mpwrx} \ 10590075Sobrien%{mcpu=rsc: -mpwr} \ 10690075Sobrien%{mcpu=rsc1: -mpwr} \ 10790075Sobrien%{mcpu=401: -mppc} \ 10890075Sobrien%{mcpu=403: -mppc} \ 10990075Sobrien%{mcpu=405: -mppc} \ 11090075Sobrien%{mcpu=505: -mppc} \ 11190075Sobrien%{mcpu=601: -m601} \ 11290075Sobrien%{mcpu=602: -mppc} \ 11390075Sobrien%{mcpu=603: -mppc} \ 11490075Sobrien%{mcpu=603e: -mppc} \ 11590075Sobrien%{mcpu=ec603e: -mppc} \ 11690075Sobrien%{mcpu=604: -mppc} \ 11790075Sobrien%{mcpu=604e: -mppc} \ 11890075Sobrien%{mcpu=620: -mppc} \ 11990075Sobrien%{mcpu=740: -mppc} \ 12090075Sobrien%{mcpu=7400: -mppc} \ 12190075Sobrien%{mcpu=7450: -mppc} \ 12290075Sobrien%{mcpu=750: -mppc} \ 12390075Sobrien%{mcpu=801: -mppc} \ 12490075Sobrien%{mcpu=821: -mppc} \ 12590075Sobrien%{mcpu=823: -mppc} \ 12690075Sobrien%{mcpu=860: -mppc} \ 12790075Sobrien%{maltivec: -maltivec}" 12890075Sobrien 12990075Sobrien#define CPP_DEFAULT_SPEC "" 13090075Sobrien 13190075Sobrien#define ASM_DEFAULT_SPEC "" 13290075Sobrien 13390075Sobrien/* This macro defines names of additional specifications to put in the specs 13490075Sobrien that can be used in various specifications like CC1_SPEC. Its definition 13590075Sobrien is an initializer with a subgrouping for each command option. 13690075Sobrien 13790075Sobrien Each subgrouping contains a string constant, that defines the 13890075Sobrien specification name, and a string constant that used by the GNU CC driver 13990075Sobrien program. 14090075Sobrien 14190075Sobrien Do not define this macro if it does not need to do anything. */ 14290075Sobrien 14390075Sobrien#define SUBTARGET_EXTRA_SPECS 14490075Sobrien 14590075Sobrien#define EXTRA_SPECS \ 14690075Sobrien { "cpp_cpu", CPP_CPU_SPEC }, \ 14790075Sobrien { "cpp_default", CPP_DEFAULT_SPEC }, \ 14890075Sobrien { "asm_cpu", ASM_CPU_SPEC }, \ 14990075Sobrien { "asm_default", ASM_DEFAULT_SPEC }, \ 15090075Sobrien SUBTARGET_EXTRA_SPECS 15190075Sobrien 15290075Sobrien/* Architecture type. */ 15390075Sobrien 15490075Sobrienextern int target_flags; 15590075Sobrien 15690075Sobrien/* Use POWER architecture instructions and MQ register. */ 15790075Sobrien#define MASK_POWER 0x00000001 15890075Sobrien 15990075Sobrien/* Use POWER2 extensions to POWER architecture. */ 16090075Sobrien#define MASK_POWER2 0x00000002 16190075Sobrien 16290075Sobrien/* Use PowerPC architecture instructions. */ 16390075Sobrien#define MASK_POWERPC 0x00000004 16490075Sobrien 16590075Sobrien/* Use PowerPC General Purpose group optional instructions, e.g. fsqrt. */ 16690075Sobrien#define MASK_PPC_GPOPT 0x00000008 16790075Sobrien 16890075Sobrien/* Use PowerPC Graphics group optional instructions, e.g. fsel. */ 16990075Sobrien#define MASK_PPC_GFXOPT 0x00000010 17090075Sobrien 17190075Sobrien/* Use PowerPC-64 architecture instructions. */ 17290075Sobrien#define MASK_POWERPC64 0x00000020 17390075Sobrien 17490075Sobrien/* Use revised mnemonic names defined for PowerPC architecture. */ 17590075Sobrien#define MASK_NEW_MNEMONICS 0x00000040 17690075Sobrien 17790075Sobrien/* Disable placing fp constants in the TOC; can be turned on when the 17890075Sobrien TOC overflows. */ 17990075Sobrien#define MASK_NO_FP_IN_TOC 0x00000080 18090075Sobrien 18190075Sobrien/* Disable placing symbol+offset constants in the TOC; can be turned on when 18290075Sobrien the TOC overflows. */ 18390075Sobrien#define MASK_NO_SUM_IN_TOC 0x00000100 18490075Sobrien 18590075Sobrien/* Output only one TOC entry per module. Normally linking fails if 18690075Sobrien there are more than 16K unique variables/constants in an executable. With 18790075Sobrien this option, linking fails only if there are more than 16K modules, or 18890075Sobrien if there are more than 16K unique variables/constant in a single module. 18990075Sobrien 19090075Sobrien This is at the cost of having 2 extra loads and one extra store per 19190075Sobrien function, and one less allocable register. */ 19290075Sobrien#define MASK_MINIMAL_TOC 0x00000200 19390075Sobrien 19490075Sobrien/* Nonzero for the 64bit model: ints, longs, and pointers are 64 bits. */ 19590075Sobrien#define MASK_64BIT 0x00000400 19690075Sobrien 19790075Sobrien/* Disable use of FPRs. */ 19890075Sobrien#define MASK_SOFT_FLOAT 0x00000800 19990075Sobrien 20090075Sobrien/* Enable load/store multiple, even on powerpc */ 20190075Sobrien#define MASK_MULTIPLE 0x00001000 20290075Sobrien#define MASK_MULTIPLE_SET 0x00002000 20390075Sobrien 20490075Sobrien/* Use string instructions for block moves */ 20590075Sobrien#define MASK_STRING 0x00004000 20690075Sobrien#define MASK_STRING_SET 0x00008000 20790075Sobrien 20890075Sobrien/* Disable update form of load/store */ 20990075Sobrien#define MASK_NO_UPDATE 0x00010000 21090075Sobrien 21190075Sobrien/* Disable fused multiply/add operations */ 21290075Sobrien#define MASK_NO_FUSED_MADD 0x00020000 21390075Sobrien 21490075Sobrien/* Nonzero if we need to schedule the prolog and epilog. */ 21590075Sobrien#define MASK_SCHED_PROLOG 0x00040000 21690075Sobrien 21790075Sobrien/* Use AltiVec instructions. */ 21890075Sobrien#define MASK_ALTIVEC 0x00080000 21990075Sobrien 22090075Sobrien/* Return small structures in memory (as the AIX ABI requires). */ 22190075Sobrien#define MASK_AIX_STRUCT_RET 0x00100000 22290075Sobrien#define MASK_AIX_STRUCT_RET_SET 0x00200000 22390075Sobrien 22490075Sobrien/* The only remaining free bit is 0x00400000. sysv4.h uses 22590075Sobrien 0x00800000 -> 0x40000000, and 0x80000000 is not available 22690075Sobrien because target_flags is signed. */ 22790075Sobrien 22890075Sobrien#define TARGET_POWER (target_flags & MASK_POWER) 22990075Sobrien#define TARGET_POWER2 (target_flags & MASK_POWER2) 23090075Sobrien#define TARGET_POWERPC (target_flags & MASK_POWERPC) 23190075Sobrien#define TARGET_PPC_GPOPT (target_flags & MASK_PPC_GPOPT) 23290075Sobrien#define TARGET_PPC_GFXOPT (target_flags & MASK_PPC_GFXOPT) 23390075Sobrien#define TARGET_NEW_MNEMONICS (target_flags & MASK_NEW_MNEMONICS) 23490075Sobrien#define TARGET_NO_FP_IN_TOC (target_flags & MASK_NO_FP_IN_TOC) 23590075Sobrien#define TARGET_NO_SUM_IN_TOC (target_flags & MASK_NO_SUM_IN_TOC) 23690075Sobrien#define TARGET_MINIMAL_TOC (target_flags & MASK_MINIMAL_TOC) 23790075Sobrien#define TARGET_64BIT (target_flags & MASK_64BIT) 23890075Sobrien#define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT) 23990075Sobrien#define TARGET_MULTIPLE (target_flags & MASK_MULTIPLE) 24090075Sobrien#define TARGET_MULTIPLE_SET (target_flags & MASK_MULTIPLE_SET) 24190075Sobrien#define TARGET_STRING (target_flags & MASK_STRING) 24290075Sobrien#define TARGET_STRING_SET (target_flags & MASK_STRING_SET) 24390075Sobrien#define TARGET_NO_UPDATE (target_flags & MASK_NO_UPDATE) 24490075Sobrien#define TARGET_NO_FUSED_MADD (target_flags & MASK_NO_FUSED_MADD) 24590075Sobrien#define TARGET_SCHED_PROLOG (target_flags & MASK_SCHED_PROLOG) 24690075Sobrien#define TARGET_ALTIVEC (target_flags & MASK_ALTIVEC) 24790075Sobrien#define TARGET_AIX_STRUCT_RET (target_flags & MASK_AIX_STRUCT_RET) 24890075Sobrien 24990075Sobrien#define TARGET_32BIT (! TARGET_64BIT) 25090075Sobrien#define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT) 25190075Sobrien#define TARGET_UPDATE (! TARGET_NO_UPDATE) 25290075Sobrien#define TARGET_FUSED_MADD (! TARGET_NO_FUSED_MADD) 25390075Sobrien 25490075Sobrien#ifdef IN_LIBGCC2 25590075Sobrien/* For libgcc2 we make sure this is a compile time constant */ 25690075Sobrien#if defined (__64BIT__) || defined (__powerpc64__) 25790075Sobrien#define TARGET_POWERPC64 1 25890075Sobrien#else 25990075Sobrien#define TARGET_POWERPC64 0 26090075Sobrien#endif 26190075Sobrien#else 26290075Sobrien#define TARGET_POWERPC64 (target_flags & MASK_POWERPC64) 26390075Sobrien#endif 26490075Sobrien 26590075Sobrien#define TARGET_XL_CALL 0 26690075Sobrien 26790075Sobrien/* Run-time compilation parameters selecting different hardware subsets. 26890075Sobrien 26990075Sobrien Macro to define tables used to set the flags. 27090075Sobrien This is a list in braces of pairs in braces, 27190075Sobrien each pair being { "NAME", VALUE } 27290075Sobrien where VALUE is the bits to set or minus the bits to clear. 27390075Sobrien An empty string NAME is used to identify the default VALUE. */ 27490075Sobrien 27590075Sobrien#define TARGET_SWITCHES \ 27690075Sobrien {{"power", MASK_POWER | MASK_MULTIPLE | MASK_STRING, \ 27790075Sobrien N_("Use POWER instruction set")}, \ 27890075Sobrien {"power2", (MASK_POWER | MASK_MULTIPLE | MASK_STRING \ 27990075Sobrien | MASK_POWER2), \ 28090075Sobrien N_("Use POWER2 instruction set")}, \ 28190075Sobrien {"no-power2", - MASK_POWER2, \ 28290075Sobrien N_("Do not use POWER2 instruction set")}, \ 28390075Sobrien {"no-power", - (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE \ 28490075Sobrien | MASK_STRING), \ 28590075Sobrien N_("Do not use POWER instruction set")}, \ 28690075Sobrien {"powerpc", MASK_POWERPC, \ 28790075Sobrien N_("Use PowerPC instruction set")}, \ 28890075Sobrien {"no-powerpc", - (MASK_POWERPC | MASK_PPC_GPOPT \ 28990075Sobrien | MASK_PPC_GFXOPT | MASK_POWERPC64), \ 29090075Sobrien N_("Do not use PowerPC instruction set")}, \ 29190075Sobrien {"powerpc-gpopt", MASK_POWERPC | MASK_PPC_GPOPT, \ 29290075Sobrien N_("Use PowerPC General Purpose group optional instructions")},\ 29390075Sobrien {"no-powerpc-gpopt", - MASK_PPC_GPOPT, \ 29490075Sobrien N_("Don't use PowerPC General Purpose group optional instructions")},\ 29590075Sobrien {"powerpc-gfxopt", MASK_POWERPC | MASK_PPC_GFXOPT, \ 29690075Sobrien N_("Use PowerPC Graphics group optional instructions")},\ 29790075Sobrien {"no-powerpc-gfxopt", - MASK_PPC_GFXOPT, \ 29890075Sobrien N_("Don't use PowerPC Graphics group optional instructions")},\ 29990075Sobrien {"powerpc64", MASK_POWERPC64, \ 30090075Sobrien N_("Use PowerPC-64 instruction set")}, \ 30190075Sobrien {"no-powerpc64", - MASK_POWERPC64, \ 30290075Sobrien N_("Don't use PowerPC-64 instruction set")}, \ 30390075Sobrien {"altivec", MASK_ALTIVEC , \ 30490075Sobrien N_("Use AltiVec instructions")}, \ 30590075Sobrien {"no-altivec", - MASK_ALTIVEC , \ 30690075Sobrien N_("Don't use AltiVec instructions")}, \ 30790075Sobrien {"new-mnemonics", MASK_NEW_MNEMONICS, \ 30890075Sobrien N_("Use new mnemonics for PowerPC architecture")},\ 30990075Sobrien {"old-mnemonics", -MASK_NEW_MNEMONICS, \ 31090075Sobrien N_("Use old mnemonics for PowerPC architecture")},\ 31190075Sobrien {"full-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC \ 31290075Sobrien | MASK_MINIMAL_TOC), \ 31390075Sobrien N_("Put everything in the regular TOC")}, \ 31490075Sobrien {"fp-in-toc", - MASK_NO_FP_IN_TOC, \ 31590075Sobrien N_("Place floating point constants in TOC")}, \ 31690075Sobrien {"no-fp-in-toc", MASK_NO_FP_IN_TOC, \ 31790075Sobrien N_("Don't place floating point constants in TOC")},\ 31890075Sobrien {"sum-in-toc", - MASK_NO_SUM_IN_TOC, \ 31990075Sobrien N_("Place symbol+offset constants in TOC")}, \ 32090075Sobrien {"no-sum-in-toc", MASK_NO_SUM_IN_TOC, \ 32190075Sobrien N_("Don't place symbol+offset constants in TOC")},\ 32290075Sobrien {"minimal-toc", MASK_MINIMAL_TOC, \ 32390075Sobrien "Use only one TOC entry per procedure"}, \ 32490075Sobrien {"minimal-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC), \ 32590075Sobrien ""}, \ 32690075Sobrien {"no-minimal-toc", - MASK_MINIMAL_TOC, \ 32790075Sobrien N_("Place variable addresses in the regular TOC")},\ 32890075Sobrien {"hard-float", - MASK_SOFT_FLOAT, \ 32990075Sobrien N_("Use hardware fp")}, \ 33090075Sobrien {"soft-float", MASK_SOFT_FLOAT, \ 33190075Sobrien N_("Do not use hardware fp")}, \ 33290075Sobrien {"multiple", MASK_MULTIPLE | MASK_MULTIPLE_SET, \ 33390075Sobrien N_("Generate load/store multiple instructions")}, \ 33490075Sobrien {"no-multiple", - MASK_MULTIPLE, \ 33590075Sobrien N_("Do not generate load/store multiple instructions")},\ 33690075Sobrien {"no-multiple", MASK_MULTIPLE_SET, \ 33790075Sobrien ""}, \ 33890075Sobrien {"string", MASK_STRING | MASK_STRING_SET, \ 33990075Sobrien N_("Generate string instructions for block moves")},\ 34090075Sobrien {"no-string", - MASK_STRING, \ 34190075Sobrien N_("Do not generate string instructions for block moves")},\ 34290075Sobrien {"no-string", MASK_STRING_SET, \ 34390075Sobrien ""}, \ 34490075Sobrien {"update", - MASK_NO_UPDATE, \ 34590075Sobrien N_("Generate load/store with update instructions")},\ 34690075Sobrien {"no-update", MASK_NO_UPDATE, \ 34790075Sobrien N_("Do not generate load/store with update instructions")},\ 34890075Sobrien {"fused-madd", - MASK_NO_FUSED_MADD, \ 34990075Sobrien N_("Generate fused multiply/add instructions")},\ 35090075Sobrien {"no-fused-madd", MASK_NO_FUSED_MADD, \ 35190075Sobrien N_("Don't generate fused multiply/add instructions")},\ 35290075Sobrien {"sched-prolog", MASK_SCHED_PROLOG, \ 35390075Sobrien ""}, \ 35490075Sobrien {"no-sched-prolog", -MASK_SCHED_PROLOG, \ 35590075Sobrien N_("Don't schedule the start and end of the procedure")},\ 35690075Sobrien {"sched-epilog", MASK_SCHED_PROLOG, \ 35790075Sobrien ""}, \ 35890075Sobrien {"no-sched-epilog", -MASK_SCHED_PROLOG, \ 35990075Sobrien ""}, \ 36090075Sobrien {"aix-struct-return", MASK_AIX_STRUCT_RET | MASK_AIX_STRUCT_RET_SET, \ 36190075Sobrien N_("Return all structures in memory (AIX default)")},\ 36290075Sobrien {"svr4-struct-return", - MASK_AIX_STRUCT_RET,\ 36390075Sobrien N_("Return small structures in registers (SVR4 default)")},\ 36490075Sobrien {"svr4-struct-return",MASK_AIX_STRUCT_RET_SET,\ 36590075Sobrien ""},\ 36690075Sobrien {"no-aix-struct-return", - MASK_AIX_STRUCT_RET,\ 36790075Sobrien ""},\ 36890075Sobrien {"no-aix-struct-return", MASK_AIX_STRUCT_RET_SET,\ 36990075Sobrien ""},\ 37090075Sobrien {"no-svr4-struct-return", MASK_AIX_STRUCT_RET | MASK_AIX_STRUCT_RET_SET,\ 37190075Sobrien ""},\ 37290075Sobrien SUBTARGET_SWITCHES \ 37390075Sobrien {"", TARGET_DEFAULT | MASK_SCHED_PROLOG, \ 37490075Sobrien ""}} 37590075Sobrien 37690075Sobrien#define TARGET_DEFAULT (MASK_POWER | MASK_MULTIPLE | MASK_STRING) 37790075Sobrien 37890075Sobrien/* This is meant to be redefined in the host dependent files */ 37990075Sobrien#define SUBTARGET_SWITCHES 38090075Sobrien 38190075Sobrien/* Processor type. Order must match cpu attribute in MD file. */ 38290075Sobrienenum processor_type 38390075Sobrien { 38490075Sobrien PROCESSOR_RIOS1, 38590075Sobrien PROCESSOR_RIOS2, 38690075Sobrien PROCESSOR_RS64A, 38790075Sobrien PROCESSOR_MPCCORE, 38890075Sobrien PROCESSOR_PPC403, 38990075Sobrien PROCESSOR_PPC405, 39090075Sobrien PROCESSOR_PPC601, 39190075Sobrien PROCESSOR_PPC603, 39290075Sobrien PROCESSOR_PPC604, 39390075Sobrien PROCESSOR_PPC604e, 39490075Sobrien PROCESSOR_PPC620, 39590075Sobrien PROCESSOR_PPC630, 39690075Sobrien PROCESSOR_PPC750, 39790075Sobrien PROCESSOR_PPC7400, 39890075Sobrien PROCESSOR_PPC7450 39990075Sobrien}; 40090075Sobrien 40190075Sobrienextern enum processor_type rs6000_cpu; 40290075Sobrien 40390075Sobrien/* Recast the processor type to the cpu attribute. */ 40490075Sobrien#define rs6000_cpu_attr ((enum attr_cpu)rs6000_cpu) 40590075Sobrien 40690075Sobrien/* Define generic processor types based upon current deployment. */ 40790075Sobrien#define PROCESSOR_COMMON PROCESSOR_PPC601 40890075Sobrien#define PROCESSOR_POWER PROCESSOR_RIOS1 40990075Sobrien#define PROCESSOR_POWERPC PROCESSOR_PPC604 41090075Sobrien#define PROCESSOR_POWERPC64 PROCESSOR_RS64A 41190075Sobrien 41290075Sobrien/* Define the default processor. This is overridden by other tm.h files. */ 41390075Sobrien#define PROCESSOR_DEFAULT PROCESSOR_RIOS1 41490075Sobrien#define PROCESSOR_DEFAULT64 PROCESSOR_RS64A 41590075Sobrien 41690075Sobrien/* Specify the dialect of assembler to use. New mnemonics is dialect one 41790075Sobrien and the old mnemonics are dialect zero. */ 41890075Sobrien#define ASSEMBLER_DIALECT (TARGET_NEW_MNEMONICS ? 1 : 0) 41990075Sobrien 42090075Sobrien/* This is meant to be overridden in target specific files. */ 42190075Sobrien#define SUBTARGET_OPTIONS 42290075Sobrien 42390075Sobrien#define TARGET_OPTIONS \ 42490075Sobrien{ \ 42590075Sobrien {"cpu=", &rs6000_select[1].string, \ 42690075Sobrien N_("Use features of and schedule code for given CPU") }, \ 42790075Sobrien {"tune=", &rs6000_select[2].string, \ 42890075Sobrien N_("Schedule code for given CPU") }, \ 42990075Sobrien {"debug=", &rs6000_debug_name, N_("Enable debug output") }, \ 43090075Sobrien {"abi=", &rs6000_abi_string, N_("Specify ABI to use") }, \ 43190075Sobrien {"long-double-", &rs6000_long_double_size_string, \ 43290075Sobrien N_("Specify size of long double (64 or 128 bits)") }, \ 43390075Sobrien SUBTARGET_OPTIONS \ 43490075Sobrien} 43590075Sobrien 43690075Sobrien/* rs6000_select[0] is reserved for the default cpu defined via --with-cpu */ 43790075Sobrienstruct rs6000_cpu_select 43890075Sobrien{ 43990075Sobrien const char *string; 44090075Sobrien const char *name; 44190075Sobrien int set_tune_p; 44290075Sobrien int set_arch_p; 44390075Sobrien}; 44490075Sobrien 44590075Sobrienextern struct rs6000_cpu_select rs6000_select[]; 44690075Sobrien 44790075Sobrien/* Debug support */ 44890075Sobrienextern const char *rs6000_debug_name; /* Name for -mdebug-xxxx option */ 44990075Sobrienextern const char *rs6000_abi_string; /* for -mabi={sysv,darwin,eabi,aix,altivec} */ 45090075Sobrienextern int rs6000_debug_stack; /* debug stack applications */ 45190075Sobrienextern int rs6000_debug_arg; /* debug argument handling */ 45290075Sobrien 45390075Sobrien#define TARGET_DEBUG_STACK rs6000_debug_stack 45490075Sobrien#define TARGET_DEBUG_ARG rs6000_debug_arg 45590075Sobrien 45690075Sobrien/* These are separate from target_flags because we've run out of bits 45790075Sobrien there. */ 45890075Sobrienextern const char *rs6000_long_double_size_string; 45990075Sobrienextern int rs6000_long_double_type_size; 46090075Sobrienextern int rs6000_altivec_abi; 46190075Sobrien 46290075Sobrien#define TARGET_LONG_DOUBLE_128 (rs6000_long_double_type_size == 128) 46390075Sobrien#define TARGET_ALTIVEC_ABI rs6000_altivec_abi 46490075Sobrien 46590075Sobrien/* Sometimes certain combinations of command options do not make sense 46690075Sobrien on a particular target machine. You can define a macro 46790075Sobrien `OVERRIDE_OPTIONS' to take account of this. This macro, if 46890075Sobrien defined, is executed once just after all the command options have 46990075Sobrien been parsed. 47090075Sobrien 47190075Sobrien Don't use this macro to turn on various extra optimizations for 47290075Sobrien `-O'. That is what `OPTIMIZATION_OPTIONS' is for. 47390075Sobrien 47490075Sobrien On the RS/6000 this is used to define the target cpu type. */ 47590075Sobrien 47690075Sobrien#define OVERRIDE_OPTIONS rs6000_override_options (TARGET_CPU_DEFAULT) 47790075Sobrien 47890075Sobrien/* Define this to change the optimizations performed by default. */ 47990075Sobrien#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE) 48090075Sobrien 48190075Sobrien/* Show we can debug even without a frame pointer. */ 48290075Sobrien#define CAN_DEBUG_WITHOUT_FP 48390075Sobrien 48490075Sobrien/* target machine storage layout */ 48590075Sobrien 48690075Sobrien/* Define to support cross compilation to an RS6000 target. */ 48790075Sobrien#define REAL_ARITHMETIC 48890075Sobrien 48990075Sobrien/* Define this macro if it is advisable to hold scalars in registers 49090075Sobrien in a wider mode than that declared by the program. In such cases, 49190075Sobrien the value is constrained to be within the bounds of the declared 49290075Sobrien type, but kept valid in the wider mode. The signedness of the 49390075Sobrien extension may differ from that of the type. */ 49490075Sobrien 49590075Sobrien#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ 49690075Sobrien if (GET_MODE_CLASS (MODE) == MODE_INT \ 49790075Sobrien && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ 49890075Sobrien (MODE) = word_mode; 49990075Sobrien 50090075Sobrien/* Define this if function arguments should also be promoted using the above 50190075Sobrien procedure. */ 50290075Sobrien 50390075Sobrien#define PROMOTE_FUNCTION_ARGS 50490075Sobrien 50590075Sobrien/* Likewise, if the function return value is promoted. */ 50690075Sobrien 50790075Sobrien#define PROMOTE_FUNCTION_RETURN 50890075Sobrien 50990075Sobrien/* Define this if most significant bit is lowest numbered 51090075Sobrien in instructions that operate on numbered bit-fields. */ 51190075Sobrien/* That is true on RS/6000. */ 51290075Sobrien#define BITS_BIG_ENDIAN 1 51390075Sobrien 51490075Sobrien/* Define this if most significant byte of a word is the lowest numbered. */ 51590075Sobrien/* That is true on RS/6000. */ 51690075Sobrien#define BYTES_BIG_ENDIAN 1 51790075Sobrien 51890075Sobrien/* Define this if most significant word of a multiword number is lowest 51990075Sobrien numbered. 52090075Sobrien 52190075Sobrien For RS/6000 we can decide arbitrarily since there are no machine 52290075Sobrien instructions for them. Might as well be consistent with bits and bytes. */ 52390075Sobrien#define WORDS_BIG_ENDIAN 1 52490075Sobrien 52590075Sobrien/* number of bits in an addressable storage unit */ 52690075Sobrien#define BITS_PER_UNIT 8 52790075Sobrien 52890075Sobrien/* Width in bits of a "word", which is the contents of a machine register. 52990075Sobrien Note that this is not necessarily the width of data type `int'; 53090075Sobrien if using 16-bit ints on a 68000, this would still be 32. 53190075Sobrien But on a machine with 16-bit registers, this would be 16. */ 53290075Sobrien#define BITS_PER_WORD (! TARGET_POWERPC64 ? 32 : 64) 53390075Sobrien#define MAX_BITS_PER_WORD 64 53490075Sobrien 53590075Sobrien/* Width of a word, in units (bytes). */ 53690075Sobrien#define UNITS_PER_WORD (! TARGET_POWERPC64 ? 4 : 8) 53790075Sobrien#define MIN_UNITS_PER_WORD 4 53890075Sobrien#define UNITS_PER_FP_WORD 8 53990075Sobrien#define UNITS_PER_ALTIVEC_WORD 16 54090075Sobrien 54190075Sobrien/* Type used for ptrdiff_t, as a string used in a declaration. */ 54290075Sobrien#define PTRDIFF_TYPE "int" 54390075Sobrien 54490075Sobrien/* Type used for size_t, as a string used in a declaration. */ 54590075Sobrien#define SIZE_TYPE "long unsigned int" 54690075Sobrien 54790075Sobrien/* Type used for wchar_t, as a string used in a declaration. */ 54890075Sobrien#define WCHAR_TYPE "short unsigned int" 54990075Sobrien 55090075Sobrien/* Width of wchar_t in bits. */ 55190075Sobrien#define WCHAR_TYPE_SIZE 16 55290075Sobrien 55390075Sobrien/* A C expression for the size in bits of the type `short' on the 55490075Sobrien target machine. If you don't define this, the default is half a 55590075Sobrien word. (If this would be less than one storage unit, it is 55690075Sobrien rounded up to one unit.) */ 55790075Sobrien#define SHORT_TYPE_SIZE 16 55890075Sobrien 55990075Sobrien/* A C expression for the size in bits of the type `int' on the 56090075Sobrien target machine. If you don't define this, the default is one 56190075Sobrien word. */ 56290075Sobrien#define INT_TYPE_SIZE 32 56390075Sobrien 56490075Sobrien/* A C expression for the size in bits of the type `long' on the 56590075Sobrien target machine. If you don't define this, the default is one 56690075Sobrien word. */ 56790075Sobrien#define LONG_TYPE_SIZE (TARGET_32BIT ? 32 : 64) 56890075Sobrien#define MAX_LONG_TYPE_SIZE 64 56990075Sobrien 57090075Sobrien/* A C expression for the size in bits of the type `long long' on the 57190075Sobrien target machine. If you don't define this, the default is two 57290075Sobrien words. */ 57390075Sobrien#define LONG_LONG_TYPE_SIZE 64 57490075Sobrien 57590075Sobrien/* A C expression for the size in bits of the type `char' on the 57690075Sobrien target machine. If you don't define this, the default is one 57790075Sobrien quarter of a word. (If this would be less than one storage unit, 57890075Sobrien it is rounded up to one unit.) */ 57990075Sobrien#define CHAR_TYPE_SIZE BITS_PER_UNIT 58090075Sobrien 58190075Sobrien/* A C expression for the size in bits of the type `float' on the 58290075Sobrien target machine. If you don't define this, the default is one 58390075Sobrien word. */ 58490075Sobrien#define FLOAT_TYPE_SIZE 32 58590075Sobrien 58690075Sobrien/* A C expression for the size in bits of the type `double' on the 58790075Sobrien target machine. If you don't define this, the default is two 58890075Sobrien words. */ 58990075Sobrien#define DOUBLE_TYPE_SIZE 64 59090075Sobrien 59190075Sobrien/* A C expression for the size in bits of the type `long double' on 59290075Sobrien the target machine. If you don't define this, the default is two 59390075Sobrien words. */ 59490075Sobrien#define LONG_DOUBLE_TYPE_SIZE rs6000_long_double_type_size 59590075Sobrien 59690075Sobrien/* Constant which presents upper bound of the above value. */ 59790075Sobrien#define MAX_LONG_DOUBLE_TYPE_SIZE 128 59890075Sobrien 59990075Sobrien/* Define this to set long double type size to use in libgcc2.c, which can 60090075Sobrien not depend on target_flags. */ 60190075Sobrien#ifdef __LONG_DOUBLE_128__ 60290075Sobrien#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128 60390075Sobrien#else 60490075Sobrien#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64 60590075Sobrien#endif 60690075Sobrien 60790075Sobrien/* Width in bits of a pointer. 60890075Sobrien See also the macro `Pmode' defined below. */ 60990075Sobrien#define POINTER_SIZE (TARGET_32BIT ? 32 : 64) 61090075Sobrien 61190075Sobrien/* Allocation boundary (in *bits*) for storing arguments in argument list. */ 61290075Sobrien#define PARM_BOUNDARY (TARGET_32BIT ? 32 : 64) 61390075Sobrien 61490075Sobrien/* Boundary (in *bits*) on which stack pointer should be aligned. */ 61590075Sobrien#define STACK_BOUNDARY ((TARGET_32BIT && !TARGET_ALTIVEC_ABI) ? 64 : 128) 61690075Sobrien 61790075Sobrien/* Allocation boundary (in *bits*) for the code of a function. */ 61890075Sobrien#define FUNCTION_BOUNDARY 32 61990075Sobrien 62090075Sobrien/* No data type wants to be aligned rounder than this. */ 62190075Sobrien#define BIGGEST_ALIGNMENT 128 62290075Sobrien 62390075Sobrien/* A C expression to compute the alignment for a variables in the 62490075Sobrien local store. TYPE is the data type, and ALIGN is the alignment 62590075Sobrien that the object would ordinarily have. */ 62690075Sobrien#define LOCAL_ALIGNMENT(TYPE, ALIGN) \ 62790075Sobrien ((TARGET_ALTIVEC && TREE_CODE (TYPE) == VECTOR_TYPE) ? 128 : ALIGN) 62890075Sobrien 62990075Sobrien/* Handle #pragma pack. */ 63090075Sobrien#define HANDLE_PRAGMA_PACK 1 63190075Sobrien 63290075Sobrien/* Alignment of field after `int : 0' in a structure. */ 63390075Sobrien#define EMPTY_FIELD_BOUNDARY 32 63490075Sobrien 63590075Sobrien/* Every structure's size must be a multiple of this. */ 63690075Sobrien#define STRUCTURE_SIZE_BOUNDARY 8 63790075Sobrien 63890075Sobrien/* A bitfield declared as `int' forces `int' alignment for the struct. */ 63990075Sobrien#define PCC_BITFIELD_TYPE_MATTERS 1 64090075Sobrien 64190075Sobrien/* Make strings word-aligned so strcpy from constants will be faster. */ 64290075Sobrien#define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 64390075Sobrien (TREE_CODE (EXP) == STRING_CST \ 64490075Sobrien && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 64590075Sobrien 64690075Sobrien/* Make arrays of chars word-aligned for the same reasons. 64790075Sobrien Align vectors to 128 bits. */ 64890075Sobrien#define DATA_ALIGNMENT(TYPE, ALIGN) \ 64990075Sobrien (TREE_CODE (TYPE) == VECTOR_TYPE ? 128 \ 65090075Sobrien : TREE_CODE (TYPE) == ARRAY_TYPE \ 65190075Sobrien && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 65290075Sobrien && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 65390075Sobrien 65490075Sobrien/* Non-zero if move instructions will actually fail to work 65590075Sobrien when given unaligned data. */ 65690075Sobrien#define STRICT_ALIGNMENT 0 65790075Sobrien 65890075Sobrien/* Define this macro to be the value 1 if unaligned accesses have a cost 65990075Sobrien many times greater than aligned accesses, for example if they are 66090075Sobrien emulated in a trap handler. */ 66190075Sobrien#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) \ 66290075Sobrien (STRICT_ALIGNMENT \ 66390075Sobrien || (((MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode) \ 66490075Sobrien && (ALIGN) < 32)) 66590075Sobrien 66690075Sobrien/* Standard register usage. */ 66790075Sobrien 66890075Sobrien/* Number of actual hardware registers. 66990075Sobrien The hardware registers are assigned numbers for the compiler 67090075Sobrien from 0 to just below FIRST_PSEUDO_REGISTER. 67190075Sobrien All registers that the compiler knows about must be given numbers, 67290075Sobrien even those that are not normally considered general registers. 67390075Sobrien 67490075Sobrien RS/6000 has 32 fixed-point registers, 32 floating-point registers, 67590075Sobrien an MQ register, a count register, a link register, and 8 condition 67690075Sobrien register fields, which we view here as separate registers. 67790075Sobrien 67890075Sobrien In addition, the difference between the frame and argument pointers is 67990075Sobrien a function of the number of registers saved, so we need to have a 68090075Sobrien register for AP that will later be eliminated in favor of SP or FP. 68190075Sobrien This is a normal register, but it is fixed. 68290075Sobrien 68390075Sobrien We also create a pseudo register for float/int conversions, that will 68490075Sobrien really represent the memory location used. It is represented here as 68590075Sobrien a register, in order to work around problems in allocating stack storage 68690075Sobrien in inline functions. */ 68790075Sobrien 68890075Sobrien#define FIRST_PSEUDO_REGISTER 110 68990075Sobrien 69090075Sobrien/* This must be included for pre gcc 3.0 glibc compatibility. */ 69190075Sobrien#define PRE_GCC3_DWARF_FRAME_REGISTERS 77 69290075Sobrien 69390075Sobrien/* 1 for registers that have pervasive standard uses 69490075Sobrien and are not available for the register allocator. 69590075Sobrien 69690075Sobrien On RS/6000, r1 is used for the stack. On Darwin, r2 is available 69790075Sobrien as a local register; for all other OS's r2 is the TOC pointer. 69890075Sobrien 69990075Sobrien cr5 is not supposed to be used. 70090075Sobrien 70190075Sobrien On System V implementations, r13 is fixed and not available for use. */ 70290075Sobrien 70390075Sobrien#define FIXED_REGISTERS \ 70490075Sobrien {0, 1, FIXED_R2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, FIXED_R13, 0, 0, \ 70590075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 70690075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 70790075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 70890075Sobrien 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 1, \ 70990075Sobrien /* AltiVec registers. */ \ 71090075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 71190075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 71290075Sobrien 1 \ 71390075Sobrien} 71490075Sobrien 71590075Sobrien/* 1 for registers not available across function calls. 71690075Sobrien These must include the FIXED_REGISTERS and also any 71790075Sobrien registers that can be used without being saved. 71890075Sobrien The latter must include the registers where values are returned 71990075Sobrien and the register where structure-value addresses are passed. 72090075Sobrien Aside from that, you can include as many other registers as you like. */ 72190075Sobrien 72290075Sobrien#define CALL_USED_REGISTERS \ 72390075Sobrien {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, FIXED_R13, 0, 0, \ 72490075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 72590075Sobrien 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \ 72690075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 72790075Sobrien 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, \ 72890075Sobrien /* AltiVec registers. */ \ 72990075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 73090075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 73190075Sobrien 1 \ 73290075Sobrien} 73390075Sobrien 73490075Sobrien/* Like `CALL_USED_REGISTERS' except this macro doesn't require that 73590075Sobrien the entire set of `FIXED_REGISTERS' be included. 73690075Sobrien (`CALL_USED_REGISTERS' must be a superset of `FIXED_REGISTERS'). 73790075Sobrien This macro is optional. If not specified, it defaults to the value 73890075Sobrien of `CALL_USED_REGISTERS'. */ 73990075Sobrien 74090075Sobrien#define CALL_REALLY_USED_REGISTERS \ 74190075Sobrien {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, FIXED_R13, 0, 0, \ 74290075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 74390075Sobrien 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \ 74490075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 74590075Sobrien 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, \ 74690075Sobrien /* AltiVec registers. */ \ 74790075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 74890075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 74990075Sobrien 0 \ 75090075Sobrien} 75190075Sobrien 75290075Sobrien#define MQ_REGNO 64 75390075Sobrien#define CR0_REGNO 68 75490075Sobrien#define CR1_REGNO 69 75590075Sobrien#define CR2_REGNO 70 75690075Sobrien#define CR3_REGNO 71 75790075Sobrien#define CR4_REGNO 72 75890075Sobrien#define MAX_CR_REGNO 75 75990075Sobrien#define XER_REGNO 76 76090075Sobrien#define FIRST_ALTIVEC_REGNO 77 76190075Sobrien#define LAST_ALTIVEC_REGNO 108 76290075Sobrien#define TOTAL_ALTIVEC_REGS (LAST_ALTIVEC_REGNO - FIRST_ALTIVEC_REGNO) 76390075Sobrien#define VRSAVE_REGNO 109 76490075Sobrien 76590075Sobrien/* List the order in which to allocate registers. Each register must be 76690075Sobrien listed once, even those in FIXED_REGISTERS. 76790075Sobrien 76890075Sobrien We allocate in the following order: 76990075Sobrien fp0 (not saved or used for anything) 77090075Sobrien fp13 - fp2 (not saved; incoming fp arg registers) 77190075Sobrien fp1 (not saved; return value) 77290075Sobrien fp31 - fp14 (saved; order given to save least number) 77390075Sobrien cr7, cr6 (not saved or special) 77490075Sobrien cr1 (not saved, but used for FP operations) 77590075Sobrien cr0 (not saved, but used for arithmetic operations) 77690075Sobrien cr4, cr3, cr2 (saved) 77790075Sobrien r0 (not saved; cannot be base reg) 77890075Sobrien r9 (not saved; best for TImode) 77990075Sobrien r11, r10, r8-r4 (not saved; highest used first to make less conflict) 78090075Sobrien r3 (not saved; return value register) 78190075Sobrien r31 - r13 (saved; order given to save least number) 78290075Sobrien r12 (not saved; if used for DImode or DFmode would use r13) 78390075Sobrien mq (not saved; best to use it if we can) 78490075Sobrien ctr (not saved; when we have the choice ctr is better) 78590075Sobrien lr (saved) 78690075Sobrien cr5, r1, r2, ap, xer, vrsave (fixed) 78790075Sobrien 78890075Sobrien AltiVec registers: 78990075Sobrien v0 - v1 (not saved or used for anything) 79090075Sobrien v13 - v3 (not saved; incoming vector arg registers) 79190075Sobrien v2 (not saved; incoming vector arg reg; return value) 79290075Sobrien v19 - v14 (not saved or used for anything) 79390075Sobrien v31 - v20 (saved; order given to save least number) 79490075Sobrien*/ 79590075Sobrien 79690075Sobrien 79790075Sobrien#define REG_ALLOC_ORDER \ 79890075Sobrien {32, \ 79990075Sobrien 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \ 80090075Sobrien 33, \ 80190075Sobrien 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \ 80290075Sobrien 50, 49, 48, 47, 46, \ 80390075Sobrien 75, 74, 69, 68, 72, 71, 70, \ 80490075Sobrien 0, \ 80590075Sobrien 9, 11, 10, 8, 7, 6, 5, 4, \ 80690075Sobrien 3, \ 80790075Sobrien 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, \ 80890075Sobrien 18, 17, 16, 15, 14, 13, 12, \ 80990075Sobrien 64, 66, 65, \ 81090075Sobrien 73, 1, 2, 67, 76, \ 81190075Sobrien /* AltiVec registers. */ \ 81290075Sobrien 77, 78, \ 81390075Sobrien 90, 89, 88, 87, 86, 85, 84, 83, 82, 81, 80, \ 81490075Sobrien 79, \ 81590075Sobrien 96, 95, 94, 93, 92, 91, \ 81690075Sobrien 108, 107, 106, 105, 104, 103, 102, 101, 100, 99, 98, \ 81790075Sobrien 97, 109 \ 81890075Sobrien} 81990075Sobrien 82090075Sobrien/* True if register is floating-point. */ 82190075Sobrien#define FP_REGNO_P(N) ((N) >= 32 && (N) <= 63) 82290075Sobrien 82390075Sobrien/* True if register is a condition register. */ 82490075Sobrien#define CR_REGNO_P(N) ((N) >= 68 && (N) <= 75) 82590075Sobrien 82690075Sobrien/* True if register is a condition register, but not cr0. */ 82790075Sobrien#define CR_REGNO_NOT_CR0_P(N) ((N) >= 69 && (N) <= 75) 82890075Sobrien 82990075Sobrien/* True if register is an integer register. */ 83090075Sobrien#define INT_REGNO_P(N) ((N) <= 31 || (N) == ARG_POINTER_REGNUM) 83190075Sobrien 83290075Sobrien/* True if register is the XER register. */ 83390075Sobrien#define XER_REGNO_P(N) ((N) == XER_REGNO) 83490075Sobrien 83590075Sobrien/* True if register is an AltiVec register. */ 83690075Sobrien#define ALTIVEC_REGNO_P(N) ((N) >= FIRST_ALTIVEC_REGNO && (N) <= LAST_ALTIVEC_REGNO) 83790075Sobrien 83890075Sobrien/* Return number of consecutive hard regs needed starting at reg REGNO 83990075Sobrien to hold something of mode MODE. 84090075Sobrien This is ordinarily the length in words of a value of mode MODE 84190075Sobrien but can be less for certain modes in special long registers. 84290075Sobrien 84390075Sobrien POWER and PowerPC GPRs hold 32 bits worth; 84490075Sobrien PowerPC64 GPRs and FPRs point register holds 64 bits worth. */ 84590075Sobrien 84690075Sobrien#define HARD_REGNO_NREGS(REGNO, MODE) \ 84790075Sobrien (FP_REGNO_P (REGNO) \ 84890075Sobrien ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \ 84990075Sobrien : ALTIVEC_REGNO_P (REGNO) \ 85090075Sobrien ? ((GET_MODE_SIZE (MODE) + UNITS_PER_ALTIVEC_WORD - 1) / UNITS_PER_ALTIVEC_WORD) \ 85190075Sobrien : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 85290075Sobrien 85390075Sobrien#define ALTIVEC_VECTOR_MODE(MODE) \ 85490075Sobrien ((MODE) == V16QImode \ 85590075Sobrien || (MODE) == V8HImode \ 85690075Sobrien || (MODE) == V4SFmode \ 85790075Sobrien || (MODE) == V4SImode) 85890075Sobrien 85990075Sobrien/* Define this macro to be nonzero if the port is prepared to handle 86090075Sobrien insns involving vector mode MODE. At the very least, it must have 86190075Sobrien move patterns for this mode. */ 86290075Sobrien 86390075Sobrien#define VECTOR_MODE_SUPPORTED_P(MODE) \ 86490075Sobrien (TARGET_ALTIVEC && ALTIVEC_VECTOR_MODE (MODE)) 86590075Sobrien 86690075Sobrien/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 86790075Sobrien For POWER and PowerPC, the GPRs can hold any mode, but the float 86890075Sobrien registers only can hold floating modes and DImode, and CR register only 86990075Sobrien can hold CC modes. We cannot put TImode anywhere except general 87090075Sobrien register and it must be able to fit within the register set. */ 87190075Sobrien 87290075Sobrien#define HARD_REGNO_MODE_OK(REGNO, MODE) \ 87390075Sobrien (FP_REGNO_P (REGNO) ? \ 87490075Sobrien (GET_MODE_CLASS (MODE) == MODE_FLOAT \ 87590075Sobrien || (GET_MODE_CLASS (MODE) == MODE_INT \ 87690075Sobrien && GET_MODE_SIZE (MODE) == UNITS_PER_FP_WORD)) \ 87790075Sobrien : ALTIVEC_REGNO_P (REGNO) ? ALTIVEC_VECTOR_MODE (MODE) \ 87890075Sobrien : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \ 87990075Sobrien : XER_REGNO_P (REGNO) ? (MODE) == PSImode \ 88090075Sobrien : ! INT_REGNO_P (REGNO) ? (GET_MODE_CLASS (MODE) == MODE_INT \ 88190075Sobrien && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \ 88290075Sobrien : 1) 88390075Sobrien 88490075Sobrien/* Value is 1 if it is a good idea to tie two pseudo registers 88590075Sobrien when one has mode MODE1 and one has mode MODE2. 88690075Sobrien If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 88790075Sobrien for any hard reg, then this must be 0 for correct output. */ 88890075Sobrien#define MODES_TIEABLE_P(MODE1, MODE2) \ 88990075Sobrien (GET_MODE_CLASS (MODE1) == MODE_FLOAT \ 89090075Sobrien ? GET_MODE_CLASS (MODE2) == MODE_FLOAT \ 89190075Sobrien : GET_MODE_CLASS (MODE2) == MODE_FLOAT \ 89290075Sobrien ? GET_MODE_CLASS (MODE1) == MODE_FLOAT \ 89390075Sobrien : GET_MODE_CLASS (MODE1) == MODE_CC \ 89490075Sobrien ? GET_MODE_CLASS (MODE2) == MODE_CC \ 89590075Sobrien : GET_MODE_CLASS (MODE2) == MODE_CC \ 89690075Sobrien ? GET_MODE_CLASS (MODE1) == MODE_CC \ 89790075Sobrien : ALTIVEC_VECTOR_MODE (MODE1) \ 89890075Sobrien ? ALTIVEC_VECTOR_MODE (MODE2) \ 89990075Sobrien : ALTIVEC_VECTOR_MODE (MODE2) \ 90090075Sobrien ? ALTIVEC_VECTOR_MODE (MODE1) \ 90190075Sobrien : 1) 90290075Sobrien 90390075Sobrien/* A C expression returning the cost of moving data from a register of class 90490075Sobrien CLASS1 to one of CLASS2. 90590075Sobrien 90690075Sobrien On the RS/6000, copying between floating-point and fixed-point 90790075Sobrien registers is expensive. */ 90890075Sobrien 90990075Sobrien#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ 91090075Sobrien ((CLASS1) == FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 2 \ 91190075Sobrien : (CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS ? 10 \ 91290075Sobrien : (CLASS1) != FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 10 \ 91390075Sobrien : (CLASS1) == ALTIVEC_REGS && (CLASS2) != ALTIVEC_REGS ? 20 \ 91490075Sobrien : (CLASS1) != ALTIVEC_REGS && (CLASS2) == ALTIVEC_REGS ? 20 \ 91590075Sobrien : (((CLASS1) == SPECIAL_REGS || (CLASS1) == MQ_REGS \ 91690075Sobrien || (CLASS1) == LINK_REGS || (CLASS1) == CTR_REGS \ 91790075Sobrien || (CLASS1) == LINK_OR_CTR_REGS) \ 91890075Sobrien && ((CLASS2) == SPECIAL_REGS || (CLASS2) == MQ_REGS \ 91990075Sobrien || (CLASS2) == LINK_REGS || (CLASS2) == CTR_REGS \ 92090075Sobrien || (CLASS2) == LINK_OR_CTR_REGS)) ? 10 \ 92190075Sobrien : 2) 92290075Sobrien 92390075Sobrien/* A C expressions returning the cost of moving data of MODE from a register to 92490075Sobrien or from memory. 92590075Sobrien 92690075Sobrien On the RS/6000, bump this up a bit. */ 92790075Sobrien 92890075Sobrien#define MEMORY_MOVE_COST(MODE, CLASS, IN) \ 92990075Sobrien ((GET_MODE_CLASS (MODE) == MODE_FLOAT \ 93090075Sobrien && (rs6000_cpu == PROCESSOR_RIOS1 || rs6000_cpu == PROCESSOR_PPC601) \ 93190075Sobrien ? 3 : 2) \ 93290075Sobrien + 4) 93390075Sobrien 93490075Sobrien/* Specify the cost of a branch insn; roughly the number of extra insns that 93590075Sobrien should be added to avoid a branch. 93690075Sobrien 93790075Sobrien Set this to 3 on the RS/6000 since that is roughly the average cost of an 93890075Sobrien unscheduled conditional branch. */ 93990075Sobrien 94090075Sobrien#define BRANCH_COST 3 94190075Sobrien 94290075Sobrien/* Define this macro to change register usage conditional on target flags. 94390075Sobrien Set MQ register fixed (already call_used) if not POWER architecture 94490075Sobrien (RIOS1, RIOS2, RSC, and PPC601) so that it will not be allocated. 94590075Sobrien 64-bit AIX reserves GPR13 for thread-private data. 94690075Sobrien Conditionally disable FPRs. */ 94790075Sobrien 94890075Sobrien#define CONDITIONAL_REGISTER_USAGE \ 94990075Sobrien{ \ 95090075Sobrien int i; \ 95190075Sobrien if (! TARGET_POWER) \ 95290075Sobrien fixed_regs[64] = 1; \ 95390075Sobrien if (TARGET_64BIT) \ 95490075Sobrien fixed_regs[13] = call_used_regs[13] \ 95590075Sobrien = call_really_used_regs[13] = 1; \ 95690075Sobrien if (TARGET_SOFT_FLOAT) \ 95790075Sobrien for (i = 32; i < 64; i++) \ 95890075Sobrien fixed_regs[i] = call_used_regs[i] \ 95990075Sobrien = call_really_used_regs[i] = 1; \ 96090075Sobrien if (DEFAULT_ABI == ABI_V4 && flag_pic == 1) \ 96190075Sobrien fixed_regs[PIC_OFFSET_TABLE_REGNUM] \ 96290075Sobrien = call_used_regs[PIC_OFFSET_TABLE_REGNUM] \ 96390075Sobrien = call_really_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 96490075Sobrien if (DEFAULT_ABI == ABI_DARWIN && flag_pic) \ 96590075Sobrien global_regs[PIC_OFFSET_TABLE_REGNUM] \ 96690075Sobrien = fixed_regs[PIC_OFFSET_TABLE_REGNUM] \ 96790075Sobrien = call_used_regs[PIC_OFFSET_TABLE_REGNUM] \ 96890075Sobrien = call_really_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 96990075Sobrien if (! TARGET_ALTIVEC) \ 97090075Sobrien for (i = FIRST_ALTIVEC_REGNO; i <= LAST_ALTIVEC_REGNO; ++i) \ 97190075Sobrien fixed_regs[i] = call_used_regs[i] = call_really_used_regs[i] = 1; \ 97290075Sobrien if (TARGET_ALTIVEC_ABI) \ 97390075Sobrien for (i = FIRST_ALTIVEC_REGNO; i < FIRST_ALTIVEC_REGNO + 20; ++i) \ 97490075Sobrien call_used_regs[i] = call_really_used_regs[i] = 1; \ 97590075Sobrien} 97690075Sobrien 97790075Sobrien/* Specify the registers used for certain standard purposes. 97890075Sobrien The values of these macros are register numbers. */ 97990075Sobrien 98090075Sobrien/* RS/6000 pc isn't overloaded on a register that the compiler knows about. */ 98190075Sobrien/* #define PC_REGNUM */ 98290075Sobrien 98390075Sobrien/* Register to use for pushing function arguments. */ 98490075Sobrien#define STACK_POINTER_REGNUM 1 98590075Sobrien 98690075Sobrien/* Base register for access to local variables of the function. */ 98790075Sobrien#define FRAME_POINTER_REGNUM 31 98890075Sobrien 98990075Sobrien/* Value should be nonzero if functions must have frame pointers. 99090075Sobrien Zero means the frame pointer need not be set up (and parms 99190075Sobrien may be accessed via the stack pointer) in functions that seem suitable. 99290075Sobrien This is computed in `reload', in reload1.c. */ 99390075Sobrien#define FRAME_POINTER_REQUIRED 0 99490075Sobrien 99590075Sobrien/* Base register for access to arguments of the function. */ 99690075Sobrien#define ARG_POINTER_REGNUM 67 99790075Sobrien 99890075Sobrien/* Place to put static chain when calling a function that requires it. */ 99990075Sobrien#define STATIC_CHAIN_REGNUM 11 100090075Sobrien 100190075Sobrien/* Link register number. */ 100290075Sobrien#define LINK_REGISTER_REGNUM 65 100390075Sobrien 100490075Sobrien/* Count register number. */ 100590075Sobrien#define COUNT_REGISTER_REGNUM 66 100690075Sobrien 100790075Sobrien/* Place that structure value return address is placed. 100890075Sobrien 100990075Sobrien On the RS/6000, it is passed as an extra parameter. */ 101090075Sobrien#define STRUCT_VALUE 0 101190075Sobrien 101290075Sobrien/* Define the classes of registers for register constraints in the 101390075Sobrien machine description. Also define ranges of constants. 101490075Sobrien 101590075Sobrien One of the classes must always be named ALL_REGS and include all hard regs. 101690075Sobrien If there is more than one class, another class must be named NO_REGS 101790075Sobrien and contain no registers. 101890075Sobrien 101990075Sobrien The name GENERAL_REGS must be the name of a class (or an alias for 102090075Sobrien another name such as ALL_REGS). This is the class of registers 102190075Sobrien that is allowed by "g" or "r" in a register constraint. 102290075Sobrien Also, registers outside this class are allocated only when 102390075Sobrien instructions express preferences for them. 102490075Sobrien 102590075Sobrien The classes must be numbered in nondecreasing order; that is, 102690075Sobrien a larger-numbered class must never be contained completely 102790075Sobrien in a smaller-numbered class. 102890075Sobrien 102990075Sobrien For any two classes, it is very desirable that there be another 103090075Sobrien class that represents their union. */ 103190075Sobrien 103290075Sobrien/* The RS/6000 has three types of registers, fixed-point, floating-point, 103390075Sobrien and condition registers, plus three special registers, MQ, CTR, and the 103490075Sobrien link register. 103590075Sobrien 103690075Sobrien However, r0 is special in that it cannot be used as a base register. 103790075Sobrien So make a class for registers valid as base registers. 103890075Sobrien 103990075Sobrien Also, cr0 is the only condition code register that can be used in 104090075Sobrien arithmetic insns, so make a separate class for it. */ 104190075Sobrien 104290075Sobrienenum reg_class 104390075Sobrien{ 104490075Sobrien NO_REGS, 104590075Sobrien BASE_REGS, 104690075Sobrien GENERAL_REGS, 104790075Sobrien FLOAT_REGS, 104890075Sobrien ALTIVEC_REGS, 104990075Sobrien VRSAVE_REGS, 105090075Sobrien NON_SPECIAL_REGS, 105190075Sobrien MQ_REGS, 105290075Sobrien LINK_REGS, 105390075Sobrien CTR_REGS, 105490075Sobrien LINK_OR_CTR_REGS, 105590075Sobrien SPECIAL_REGS, 105690075Sobrien SPEC_OR_GEN_REGS, 105790075Sobrien CR0_REGS, 105890075Sobrien CR_REGS, 105990075Sobrien NON_FLOAT_REGS, 106090075Sobrien XER_REGS, 106190075Sobrien ALL_REGS, 106290075Sobrien LIM_REG_CLASSES 106390075Sobrien}; 106490075Sobrien 106590075Sobrien#define N_REG_CLASSES (int) LIM_REG_CLASSES 106690075Sobrien 106790075Sobrien/* Give names of register classes as strings for dump file. */ 106890075Sobrien 106990075Sobrien#define REG_CLASS_NAMES \ 107090075Sobrien{ \ 107190075Sobrien "NO_REGS", \ 107290075Sobrien "BASE_REGS", \ 107390075Sobrien "GENERAL_REGS", \ 107490075Sobrien "FLOAT_REGS", \ 107590075Sobrien "ALTIVEC_REGS", \ 107690075Sobrien "VRSAVE_REGS", \ 107790075Sobrien "NON_SPECIAL_REGS", \ 107890075Sobrien "MQ_REGS", \ 107990075Sobrien "LINK_REGS", \ 108090075Sobrien "CTR_REGS", \ 108190075Sobrien "LINK_OR_CTR_REGS", \ 108290075Sobrien "SPECIAL_REGS", \ 108390075Sobrien "SPEC_OR_GEN_REGS", \ 108490075Sobrien "CR0_REGS", \ 108590075Sobrien "CR_REGS", \ 108690075Sobrien "NON_FLOAT_REGS", \ 108790075Sobrien "XER_REGS", \ 108890075Sobrien "ALL_REGS" \ 108990075Sobrien} 109090075Sobrien 109190075Sobrien/* Define which registers fit in which classes. 109290075Sobrien This is an initializer for a vector of HARD_REG_SET 109390075Sobrien of length N_REG_CLASSES. */ 109490075Sobrien 109590075Sobrien#define REG_CLASS_CONTENTS \ 109690075Sobrien{ \ 109790075Sobrien { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \ 109890075Sobrien { 0xfffffffe, 0x00000000, 0x00000008, 0x00000000 }, /* BASE_REGS */ \ 109990075Sobrien { 0xffffffff, 0x00000000, 0x00000008, 0x00000000 }, /* GENERAL_REGS */ \ 110090075Sobrien { 0x00000000, 0xffffffff, 0x00000000, 0x00000000 }, /* FLOAT_REGS */ \ 110190075Sobrien { 0x00000000, 0x00000000, 0xffffe000, 0x00001fff }, /* ALTIVEC_REGS */ \ 110290075Sobrien { 0x00000000, 0x00000000, 0x00000000, 0x00002000 }, /* VRSAVE_REGS */ \ 110390075Sobrien { 0xffffffff, 0xffffffff, 0x00000008, 0x00000000 }, /* NON_SPECIAL_REGS */ \ 110490075Sobrien { 0x00000000, 0x00000000, 0x00000001, 0x00000000 }, /* MQ_REGS */ \ 110590075Sobrien { 0x00000000, 0x00000000, 0x00000002, 0x00000000 }, /* LINK_REGS */ \ 110690075Sobrien { 0x00000000, 0x00000000, 0x00000004, 0x00000000 }, /* CTR_REGS */ \ 110790075Sobrien { 0x00000000, 0x00000000, 0x00000006, 0x00000000 }, /* LINK_OR_CTR_REGS */ \ 110890075Sobrien { 0x00000000, 0x00000000, 0x00000007, 0x00002000 }, /* SPECIAL_REGS */ \ 110990075Sobrien { 0xffffffff, 0x00000000, 0x0000000f, 0x00000000 }, /* SPEC_OR_GEN_REGS */ \ 111090075Sobrien { 0x00000000, 0x00000000, 0x00000010, 0x00000000 }, /* CR0_REGS */ \ 111190075Sobrien { 0x00000000, 0x00000000, 0x00000ff0, 0x00000000 }, /* CR_REGS */ \ 111290075Sobrien { 0xffffffff, 0x00000000, 0x0000efff, 0x00000000 }, /* NON_FLOAT_REGS */ \ 111390075Sobrien { 0x00000000, 0x00000000, 0x00001000, 0x00000000 }, /* XER_REGS */ \ 111490075Sobrien { 0xffffffff, 0xffffffff, 0xffffffff, 0x00003fff } /* ALL_REGS */ \ 111590075Sobrien} 111690075Sobrien 111790075Sobrien/* The same information, inverted: 111890075Sobrien Return the class number of the smallest class containing 111990075Sobrien reg number REGNO. This could be a conditional expression 112090075Sobrien or could index an array. */ 112190075Sobrien 112290075Sobrien#define REGNO_REG_CLASS(REGNO) \ 112390075Sobrien ((REGNO) == 0 ? GENERAL_REGS \ 112490075Sobrien : (REGNO) < 32 ? BASE_REGS \ 112590075Sobrien : FP_REGNO_P (REGNO) ? FLOAT_REGS \ 112690075Sobrien : ALTIVEC_REGNO_P (REGNO) ? ALTIVEC_REGS \ 112790075Sobrien : (REGNO) == CR0_REGNO ? CR0_REGS \ 112890075Sobrien : CR_REGNO_P (REGNO) ? CR_REGS \ 112990075Sobrien : (REGNO) == MQ_REGNO ? MQ_REGS \ 113090075Sobrien : (REGNO) == LINK_REGISTER_REGNUM ? LINK_REGS \ 113190075Sobrien : (REGNO) == COUNT_REGISTER_REGNUM ? CTR_REGS \ 113290075Sobrien : (REGNO) == ARG_POINTER_REGNUM ? BASE_REGS \ 113390075Sobrien : (REGNO) == XER_REGNO ? XER_REGS \ 113490075Sobrien : (REGNO) == VRSAVE_REGNO ? VRSAVE_REGS \ 113590075Sobrien : NO_REGS) 113690075Sobrien 113790075Sobrien/* The class value for index registers, and the one for base regs. */ 113890075Sobrien#define INDEX_REG_CLASS GENERAL_REGS 113990075Sobrien#define BASE_REG_CLASS BASE_REGS 114090075Sobrien 114190075Sobrien/* Get reg_class from a letter such as appears in the machine description. */ 114290075Sobrien 114390075Sobrien#define REG_CLASS_FROM_LETTER(C) \ 114490075Sobrien ((C) == 'f' ? FLOAT_REGS \ 114590075Sobrien : (C) == 'b' ? BASE_REGS \ 114690075Sobrien : (C) == 'h' ? SPECIAL_REGS \ 114790075Sobrien : (C) == 'q' ? MQ_REGS \ 114890075Sobrien : (C) == 'c' ? CTR_REGS \ 114990075Sobrien : (C) == 'l' ? LINK_REGS \ 115090075Sobrien : (C) == 'v' ? ALTIVEC_REGS \ 115190075Sobrien : (C) == 'x' ? CR0_REGS \ 115290075Sobrien : (C) == 'y' ? CR_REGS \ 115390075Sobrien : (C) == 'z' ? XER_REGS \ 115490075Sobrien : NO_REGS) 115590075Sobrien 115690075Sobrien/* The letters I, J, K, L, M, N, and P in a register constraint string 115790075Sobrien can be used to stand for particular ranges of immediate operands. 115890075Sobrien This macro defines what the ranges are. 115990075Sobrien C is the letter, and VALUE is a constant value. 116090075Sobrien Return 1 if VALUE is in the range specified by C. 116190075Sobrien 116290075Sobrien `I' is a signed 16-bit constant 116390075Sobrien `J' is a constant with only the high-order 16 bits non-zero 116490075Sobrien `K' is a constant with only the low-order 16 bits non-zero 116590075Sobrien `L' is a signed 16-bit constant shifted left 16 bits 116690075Sobrien `M' is a constant that is greater than 31 116790075Sobrien `N' is a positive constant that is an exact power of two 116890075Sobrien `O' is the constant zero 116990075Sobrien `P' is a constant whose negation is a signed 16-bit constant */ 117090075Sobrien 117190075Sobrien#define CONST_OK_FOR_LETTER_P(VALUE, C) \ 117290075Sobrien ( (C) == 'I' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \ 117390075Sobrien : (C) == 'J' ? ((VALUE) & (~ (unsigned HOST_WIDE_INT) 0xffff0000)) == 0 \ 117490075Sobrien : (C) == 'K' ? ((VALUE) & (~ (HOST_WIDE_INT) 0xffff)) == 0 \ 117590075Sobrien : (C) == 'L' ? (((VALUE) & 0xffff) == 0 \ 117690075Sobrien && ((VALUE) >> 31 == -1 || (VALUE) >> 31 == 0)) \ 117790075Sobrien : (C) == 'M' ? (VALUE) > 31 \ 117890075Sobrien : (C) == 'N' ? (VALUE) > 0 && exact_log2 (VALUE) >= 0 \ 117990075Sobrien : (C) == 'O' ? (VALUE) == 0 \ 118090075Sobrien : (C) == 'P' ? (unsigned HOST_WIDE_INT) ((- (VALUE)) + 0x8000) < 0x10000 \ 118190075Sobrien : 0) 118290075Sobrien 118390075Sobrien/* Similar, but for floating constants, and defining letters G and H. 118490075Sobrien Here VALUE is the CONST_DOUBLE rtx itself. 118590075Sobrien 118690075Sobrien We flag for special constants when we can copy the constant into 118790075Sobrien a general register in two insns for DF/DI and one insn for SF. 118890075Sobrien 118990075Sobrien 'H' is used for DI/DF constants that take 3 insns. */ 119090075Sobrien 119190075Sobrien#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 119290075Sobrien ( (C) == 'G' ? (num_insns_constant (VALUE, GET_MODE (VALUE)) \ 119390075Sobrien == ((GET_MODE (VALUE) == SFmode) ? 1 : 2)) \ 119490075Sobrien : (C) == 'H' ? (num_insns_constant (VALUE, GET_MODE (VALUE)) == 3) \ 119590075Sobrien : 0) 119690075Sobrien 119790075Sobrien/* Optional extra constraints for this machine. 119890075Sobrien 119990075Sobrien 'Q' means that is a memory operand that is just an offset from a reg. 120090075Sobrien 'R' is for AIX TOC entries. 120190075Sobrien 'S' is a constant that can be placed into a 64-bit mask operand 120290075Sobrien 'T' is a consatnt that can be placed into a 32-bit mask operand 120390075Sobrien 'U' is for V.4 small data references. */ 120490075Sobrien 120590075Sobrien#define EXTRA_CONSTRAINT(OP, C) \ 120690075Sobrien ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \ 120790075Sobrien : (C) == 'R' ? LEGITIMATE_CONSTANT_POOL_ADDRESS_P (OP) \ 120890075Sobrien : (C) == 'S' ? mask64_operand (OP, VOIDmode) \ 120990075Sobrien : (C) == 'T' ? mask_operand (OP, VOIDmode) \ 121090075Sobrien : (C) == 'U' ? (DEFAULT_ABI == ABI_V4 \ 121190075Sobrien && small_data_operand (OP, GET_MODE (OP))) \ 121290075Sobrien : 0) 121390075Sobrien 121490075Sobrien/* Given an rtx X being reloaded into a reg required to be 121590075Sobrien in class CLASS, return the class of reg to actually use. 121690075Sobrien In general this is just CLASS; but on some machines 121790075Sobrien in some cases it is preferable to use a more restrictive class. 121890075Sobrien 121990075Sobrien On the RS/6000, we have to return NO_REGS when we want to reload a 122090075Sobrien floating-point CONST_DOUBLE to force it to be copied to memory. 122190075Sobrien 122290075Sobrien We also don't want to reload integer values into floating-point 122390075Sobrien registers if we can at all help it. In fact, this can 122490075Sobrien cause reload to abort, if it tries to generate a reload of CTR 122590075Sobrien into a FP register and discovers it doesn't have the memory location 122690075Sobrien required. 122790075Sobrien 122890075Sobrien ??? Would it be a good idea to have reload do the converse, that is 122990075Sobrien try to reload floating modes into FP registers if possible? 123090075Sobrien */ 123190075Sobrien 123290075Sobrien#define PREFERRED_RELOAD_CLASS(X,CLASS) \ 123390075Sobrien (((GET_CODE (X) == CONST_DOUBLE \ 123490075Sobrien && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ 123590075Sobrien ? NO_REGS \ 123690075Sobrien : (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \ 123790075Sobrien && (CLASS) == NON_SPECIAL_REGS) \ 123890075Sobrien ? GENERAL_REGS \ 123990075Sobrien : (CLASS))) 124090075Sobrien 124190075Sobrien/* Return the register class of a scratch register needed to copy IN into 124290075Sobrien or out of a register in CLASS in MODE. If it can be done directly, 124390075Sobrien NO_REGS is returned. */ 124490075Sobrien 124590075Sobrien#define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ 124690075Sobrien secondary_reload_class (CLASS, MODE, IN) 124790075Sobrien 124890075Sobrien/* If we are copying between FP or AltiVec registers and anything 124990075Sobrien else, we need a memory location. */ 125090075Sobrien 125190075Sobrien#define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \ 125290075Sobrien ((CLASS1) != (CLASS2) && ((CLASS1) == FLOAT_REGS \ 125390075Sobrien || (CLASS2) == FLOAT_REGS \ 125490075Sobrien || (CLASS1) == ALTIVEC_REGS \ 125590075Sobrien || (CLASS2) == ALTIVEC_REGS)) 125690075Sobrien 125790075Sobrien/* Return the maximum number of consecutive registers 125890075Sobrien needed to represent mode MODE in a register of class CLASS. 125990075Sobrien 126090075Sobrien On RS/6000, this is the size of MODE in words, 126190075Sobrien except in the FP regs, where a single reg is enough for two words. */ 126290075Sobrien#define CLASS_MAX_NREGS(CLASS, MODE) \ 126390075Sobrien (((CLASS) == FLOAT_REGS) \ 126490075Sobrien ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \ 126590075Sobrien : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 126690075Sobrien 126790075Sobrien/* If defined, gives a class of registers that cannot be used as the 126890075Sobrien operand of a SUBREG that changes the mode of the object illegally. */ 126990075Sobrien 127090075Sobrien#define CLASS_CANNOT_CHANGE_MODE FLOAT_REGS 127190075Sobrien 127290075Sobrien/* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE. */ 127390075Sobrien 127490075Sobrien#define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \ 127590075Sobrien (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)) 127690075Sobrien 127790075Sobrien/* Stack layout; function entry, exit and calling. */ 127890075Sobrien 127990075Sobrien/* Enumeration to give which calling sequence to use. */ 128090075Sobrienenum rs6000_abi { 128190075Sobrien ABI_NONE, 128290075Sobrien ABI_AIX, /* IBM's AIX */ 128390075Sobrien ABI_AIX_NODESC, /* AIX calling sequence minus 128490075Sobrien function descriptors */ 128590075Sobrien ABI_V4, /* System V.4/eabi */ 128690075Sobrien ABI_DARWIN /* Apple's Darwin (OS X kernel) */ 128790075Sobrien}; 128890075Sobrien 128990075Sobrienextern enum rs6000_abi rs6000_current_abi; /* available for use by subtarget */ 129090075Sobrien 129190075Sobrien/* Structure used to define the rs6000 stack */ 129290075Sobrientypedef struct rs6000_stack { 129390075Sobrien int first_gp_reg_save; /* first callee saved GP register used */ 129490075Sobrien int first_fp_reg_save; /* first callee saved FP register used */ 129590075Sobrien int first_altivec_reg_save; /* first callee saved AltiVec register used */ 129690075Sobrien int lr_save_p; /* true if the link reg needs to be saved */ 129790075Sobrien int cr_save_p; /* true if the CR reg needs to be saved */ 129890075Sobrien unsigned int vrsave_mask; /* mask of vec registers to save */ 129990075Sobrien int toc_save_p; /* true if the TOC needs to be saved */ 130090075Sobrien int push_p; /* true if we need to allocate stack space */ 130190075Sobrien int calls_p; /* true if the function makes any calls */ 130290075Sobrien enum rs6000_abi abi; /* which ABI to use */ 130390075Sobrien int gp_save_offset; /* offset to save GP regs from initial SP */ 130490075Sobrien int fp_save_offset; /* offset to save FP regs from initial SP */ 130590075Sobrien int altivec_save_offset; /* offset to save AltiVec regs from inital SP */ 130690075Sobrien int lr_save_offset; /* offset to save LR from initial SP */ 130790075Sobrien int cr_save_offset; /* offset to save CR from initial SP */ 130890075Sobrien int vrsave_save_offset; /* offset to save VRSAVE from initial SP */ 130990075Sobrien int toc_save_offset; /* offset to save the TOC pointer */ 131090075Sobrien int varargs_save_offset; /* offset to save the varargs registers */ 131190075Sobrien int ehrd_offset; /* offset to EH return data */ 131290075Sobrien int reg_size; /* register size (4 or 8) */ 131390075Sobrien int varargs_size; /* size to hold V.4 args passed in regs */ 131490075Sobrien int vars_size; /* variable save area size */ 131590075Sobrien int parm_size; /* outgoing parameter size */ 131690075Sobrien int save_size; /* save area size */ 131790075Sobrien int fixed_size; /* fixed size of stack frame */ 131890075Sobrien int gp_size; /* size of saved GP registers */ 131990075Sobrien int fp_size; /* size of saved FP registers */ 132090075Sobrien int altivec_size; /* size of saved AltiVec registers */ 132190075Sobrien int cr_size; /* size to hold CR if not in save_size */ 132290075Sobrien int lr_size; /* size to hold LR if not in save_size */ 132390075Sobrien int vrsave_size; /* size to hold VRSAVE if not in save_size */ 132490075Sobrien int altivec_padding_size; /* size of altivec alignment padding if 132590075Sobrien not in save_size */ 132690075Sobrien int toc_size; /* size to hold TOC if not in save_size */ 132790075Sobrien int total_size; /* total bytes allocated for stack */ 132890075Sobrien} rs6000_stack_t; 132990075Sobrien 133090075Sobrien/* Define this if pushing a word on the stack 133190075Sobrien makes the stack pointer a smaller address. */ 133290075Sobrien#define STACK_GROWS_DOWNWARD 133390075Sobrien 133490075Sobrien/* Define this if the nominal address of the stack frame 133590075Sobrien is at the high-address end of the local variables; 133690075Sobrien that is, each additional local variable allocated 133790075Sobrien goes at a more negative offset in the frame. 133890075Sobrien 133990075Sobrien On the RS/6000, we grow upwards, from the area after the outgoing 134090075Sobrien arguments. */ 134190075Sobrien/* #define FRAME_GROWS_DOWNWARD */ 134290075Sobrien 134390075Sobrien/* Size of the outgoing register save area */ 134490075Sobrien#define RS6000_REG_SAVE ((DEFAULT_ABI == ABI_AIX \ 134590075Sobrien || DEFAULT_ABI == ABI_AIX_NODESC \ 134690075Sobrien || DEFAULT_ABI == ABI_DARWIN) \ 134790075Sobrien ? (TARGET_64BIT ? 64 : 32) \ 134890075Sobrien : 0) 134990075Sobrien 135090075Sobrien/* Size of the fixed area on the stack */ 135190075Sobrien#define RS6000_SAVE_AREA \ 135290075Sobrien (((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_AIX_NODESC || DEFAULT_ABI == ABI_DARWIN) ? 24 : 8) \ 135390075Sobrien << (TARGET_64BIT ? 1 : 0)) 135490075Sobrien 135590075Sobrien/* MEM representing address to save the TOC register */ 135690075Sobrien#define RS6000_SAVE_TOC gen_rtx_MEM (Pmode, \ 135790075Sobrien plus_constant (stack_pointer_rtx, \ 135890075Sobrien (TARGET_32BIT ? 20 : 40))) 135990075Sobrien 136090075Sobrien/* Size of the V.4 varargs area if needed */ 136190075Sobrien#define RS6000_VARARGS_AREA 0 136290075Sobrien 136390075Sobrien/* Align an address */ 136490075Sobrien#define RS6000_ALIGN(n,a) (((n) + (a) - 1) & ~((a) - 1)) 136590075Sobrien 136690075Sobrien/* Size of V.4 varargs area in bytes */ 136790075Sobrien#define RS6000_VARARGS_SIZE \ 136890075Sobrien ((GP_ARG_NUM_REG * (TARGET_32BIT ? 4 : 8)) + (FP_ARG_NUM_REG * 8) + 8) 136990075Sobrien 137090075Sobrien/* Offset within stack frame to start allocating local variables at. 137190075Sobrien If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 137290075Sobrien first local allocated. Otherwise, it is the offset to the BEGINNING 137390075Sobrien of the first local allocated. 137490075Sobrien 137590075Sobrien On the RS/6000, the frame pointer is the same as the stack pointer, 137690075Sobrien except for dynamic allocations. So we start after the fixed area and 137790075Sobrien outgoing parameter area. */ 137890075Sobrien 137990075Sobrien#define STARTING_FRAME_OFFSET \ 138090075Sobrien (RS6000_ALIGN (current_function_outgoing_args_size, \ 138190075Sobrien TARGET_ALTIVEC ? 16 : 8) \ 138290075Sobrien + RS6000_VARARGS_AREA \ 138390075Sobrien + RS6000_SAVE_AREA) 138490075Sobrien 138590075Sobrien/* Offset from the stack pointer register to an item dynamically 138690075Sobrien allocated on the stack, e.g., by `alloca'. 138790075Sobrien 138890075Sobrien The default value for this macro is `STACK_POINTER_OFFSET' plus the 138990075Sobrien length of the outgoing arguments. The default is correct for most 139090075Sobrien machines. See `function.c' for details. */ 139190075Sobrien#define STACK_DYNAMIC_OFFSET(FUNDECL) \ 139290075Sobrien (RS6000_ALIGN (current_function_outgoing_args_size, \ 139390075Sobrien TARGET_ALTIVEC ? 16 : 8) \ 139490075Sobrien + (STACK_POINTER_OFFSET)) 139590075Sobrien 139690075Sobrien/* If we generate an insn to push BYTES bytes, 139790075Sobrien this says how many the stack pointer really advances by. 139890075Sobrien On RS/6000, don't define this because there are no push insns. */ 139990075Sobrien/* #define PUSH_ROUNDING(BYTES) */ 140090075Sobrien 140190075Sobrien/* Offset of first parameter from the argument pointer register value. 140290075Sobrien On the RS/6000, we define the argument pointer to the start of the fixed 140390075Sobrien area. */ 140490075Sobrien#define FIRST_PARM_OFFSET(FNDECL) RS6000_SAVE_AREA 140590075Sobrien 140690075Sobrien/* Offset from the argument pointer register value to the top of 140790075Sobrien stack. This is different from FIRST_PARM_OFFSET because of the 140890075Sobrien register save area. */ 140990075Sobrien#define ARG_POINTER_CFA_OFFSET(FNDECL) 0 141090075Sobrien 141190075Sobrien/* Define this if stack space is still allocated for a parameter passed 141290075Sobrien in a register. The value is the number of bytes allocated to this 141390075Sobrien area. */ 141490075Sobrien#define REG_PARM_STACK_SPACE(FNDECL) RS6000_REG_SAVE 141590075Sobrien 141690075Sobrien/* Define this if the above stack space is to be considered part of the 141790075Sobrien space allocated by the caller. */ 141890075Sobrien#define OUTGOING_REG_PARM_STACK_SPACE 141990075Sobrien 142090075Sobrien/* This is the difference between the logical top of stack and the actual sp. 142190075Sobrien 142290075Sobrien For the RS/6000, sp points past the fixed area. */ 142390075Sobrien#define STACK_POINTER_OFFSET RS6000_SAVE_AREA 142490075Sobrien 142590075Sobrien/* Define this if the maximum size of all the outgoing args is to be 142690075Sobrien accumulated and pushed during the prologue. The amount can be 142790075Sobrien found in the variable current_function_outgoing_args_size. */ 142890075Sobrien#define ACCUMULATE_OUTGOING_ARGS 1 142990075Sobrien 143090075Sobrien/* Value is the number of bytes of arguments automatically 143190075Sobrien popped when returning from a subroutine call. 143290075Sobrien FUNDECL is the declaration node of the function (as a tree), 143390075Sobrien FUNTYPE is the data type of the function (as a tree), 143490075Sobrien or for a library call it is an identifier node for the subroutine name. 143590075Sobrien SIZE is the number of bytes of arguments passed on the stack. */ 143690075Sobrien 143790075Sobrien#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 143890075Sobrien 143990075Sobrien/* Define how to find the value returned by a function. 144090075Sobrien VALTYPE is the data type of the value (as a tree). 144190075Sobrien If the precise function being called is known, FUNC is its FUNCTION_DECL; 144290075Sobrien otherwise, FUNC is 0. 144390075Sobrien 144490075Sobrien On RS/6000 an integer value is in r3 and a floating-point value is in 144590075Sobrien fp1, unless -msoft-float. */ 144690075Sobrien 144790075Sobrien#define FUNCTION_VALUE(VALTYPE, FUNC) \ 144890075Sobrien gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \ 144990075Sobrien && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ 145090075Sobrien || POINTER_TYPE_P (VALTYPE) \ 145190075Sobrien ? word_mode : TYPE_MODE (VALTYPE), \ 145290075Sobrien TREE_CODE (VALTYPE) == VECTOR_TYPE ? ALTIVEC_ARG_RETURN \ 145390075Sobrien : TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT \ 145490075Sobrien ? FP_ARG_RETURN : GP_ARG_RETURN) 145590075Sobrien 145690075Sobrien/* Define how to find the value returned by a library function 145790075Sobrien assuming the value has mode MODE. */ 145890075Sobrien 145990075Sobrien#define LIBCALL_VALUE(MODE) \ 146090075Sobrien gen_rtx_REG (MODE, ALTIVEC_VECTOR_MODE (MODE) ? ALTIVEC_ARG_RETURN \ 146190075Sobrien : GET_MODE_CLASS (MODE) == MODE_FLOAT \ 146290075Sobrien && TARGET_HARD_FLOAT \ 146390075Sobrien ? FP_ARG_RETURN : GP_ARG_RETURN) 146490075Sobrien 146590075Sobrien/* The AIX ABI for the RS/6000 specifies that all structures are 146690075Sobrien returned in memory. The Darwin ABI does the same. The SVR4 ABI 146790075Sobrien specifies that structures <= 8 bytes are returned in r3/r4, but a 146890075Sobrien draft put them in memory, and GCC used to implement the draft 146990075Sobrien instead of the final standard. Therefore, TARGET_AIX_STRUCT_RET 147090075Sobrien controls this instead of DEFAULT_ABI; V.4 targets needing backward 147190075Sobrien compatibility can change DRAFT_V4_STRUCT_RET to override the 147290075Sobrien default, and -m switches get the final word. See 147390075Sobrien rs6000_override_options for more details. 147490075Sobrien 147590075Sobrien int_size_in_bytes returns -1 for variable size objects, which go in 147690075Sobrien memory always. The cast to unsigned makes -1 > 8. */ 147790075Sobrien 147890075Sobrien#define RETURN_IN_MEMORY(TYPE) \ 147990075Sobrien (AGGREGATE_TYPE_P (TYPE) && \ 148090075Sobrien (TARGET_AIX_STRUCT_RET || \ 148190075Sobrien (unsigned HOST_WIDEST_INT) int_size_in_bytes (TYPE) > 8)) 148290075Sobrien 148390075Sobrien/* DRAFT_V4_STRUCT_RET defaults off. */ 148490075Sobrien#define DRAFT_V4_STRUCT_RET 0 148590075Sobrien 148690075Sobrien/* Let RETURN_IN_MEMORY control what happens. */ 148790075Sobrien#define DEFAULT_PCC_STRUCT_RETURN 0 148890075Sobrien 148990075Sobrien/* Mode of stack savearea. 149090075Sobrien FUNCTION is VOIDmode because calling convention maintains SP. 149190075Sobrien BLOCK needs Pmode for SP. 149290075Sobrien NONLOCAL needs twice Pmode to maintain both backchain and SP. */ 149390075Sobrien#define STACK_SAVEAREA_MODE(LEVEL) \ 149490075Sobrien (LEVEL == SAVE_FUNCTION ? VOIDmode \ 149590075Sobrien : LEVEL == SAVE_NONLOCAL ? (TARGET_32BIT ? DImode : TImode) : Pmode) 149690075Sobrien 149790075Sobrien/* Minimum and maximum general purpose registers used to hold arguments. */ 149890075Sobrien#define GP_ARG_MIN_REG 3 149990075Sobrien#define GP_ARG_MAX_REG 10 150090075Sobrien#define GP_ARG_NUM_REG (GP_ARG_MAX_REG - GP_ARG_MIN_REG + 1) 150190075Sobrien 150290075Sobrien/* Minimum and maximum floating point registers used to hold arguments. */ 150390075Sobrien#define FP_ARG_MIN_REG 33 150490075Sobrien#define FP_ARG_AIX_MAX_REG 45 150590075Sobrien#define FP_ARG_V4_MAX_REG 40 150690075Sobrien#define FP_ARG_MAX_REG ((DEFAULT_ABI == ABI_AIX \ 150790075Sobrien || DEFAULT_ABI == ABI_AIX_NODESC \ 150890075Sobrien || DEFAULT_ABI == ABI_DARWIN) \ 150990075Sobrien ? FP_ARG_AIX_MAX_REG : FP_ARG_V4_MAX_REG) 151090075Sobrien#define FP_ARG_NUM_REG (FP_ARG_MAX_REG - FP_ARG_MIN_REG + 1) 151190075Sobrien 151290075Sobrien/* Minimum and maximum AltiVec registers used to hold arguments. */ 151390075Sobrien#define ALTIVEC_ARG_MIN_REG (FIRST_ALTIVEC_REGNO + 2) 151490075Sobrien#define ALTIVEC_ARG_MAX_REG (ALTIVEC_ARG_MIN_REG + 11) 151590075Sobrien#define ALTIVEC_ARG_NUM_REG (ALTIVEC_ARG_MAX_REG - ALTIVEC_ARG_MIN_REG + 1) 151690075Sobrien 151790075Sobrien/* Return registers */ 151890075Sobrien#define GP_ARG_RETURN GP_ARG_MIN_REG 151990075Sobrien#define FP_ARG_RETURN FP_ARG_MIN_REG 152090075Sobrien#define ALTIVEC_ARG_RETURN (FIRST_ALTIVEC_REGNO + 2) 152190075Sobrien 152290075Sobrien/* Flags for the call/call_value rtl operations set up by function_arg */ 152390075Sobrien#define CALL_NORMAL 0x00000000 /* no special processing */ 152490075Sobrien/* Bits in 0x00000001 are unused. */ 152590075Sobrien#define CALL_V4_CLEAR_FP_ARGS 0x00000002 /* V.4, no FP args passed */ 152690075Sobrien#define CALL_V4_SET_FP_ARGS 0x00000004 /* V.4, FP args were passed */ 152790075Sobrien#define CALL_LONG 0x00000008 /* always call indirect */ 152890075Sobrien 152990075Sobrien/* 1 if N is a possible register number for a function value 153090075Sobrien as seen by the caller. 153190075Sobrien 153290075Sobrien On RS/6000, this is r3, fp1, and v2 (for AltiVec). */ 153390075Sobrien#define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_ARG_RETURN \ 153490075Sobrien || ((N) == FP_ARG_RETURN) \ 153590075Sobrien || (TARGET_ALTIVEC && \ 153690075Sobrien (N) == ALTIVEC_ARG_RETURN)) 153790075Sobrien 153890075Sobrien/* 1 if N is a possible register number for function argument passing. 153990075Sobrien On RS/6000, these are r3-r10 and fp1-fp13. 154090075Sobrien On AltiVec, v2 - v13 are used for passing vectors. */ 154190075Sobrien#define FUNCTION_ARG_REGNO_P(N) \ 154290075Sobrien ((unsigned)(((N) - GP_ARG_MIN_REG) < (unsigned)(GP_ARG_NUM_REG)) \ 154390075Sobrien || (TARGET_ALTIVEC && \ 154490075Sobrien (unsigned)((N) - ALTIVEC_ARG_MIN_REG) < (unsigned)(ALTIVEC_ARG_NUM_REG)) \ 154590075Sobrien || ((unsigned)((N) - FP_ARG_MIN_REG) < (unsigned)(FP_ARG_NUM_REG))) 154690075Sobrien 154790075Sobrien 154890075Sobrien/* A C structure for machine-specific, per-function data. 154990075Sobrien This is added to the cfun structure. */ 155090075Sobrientypedef struct machine_function 155190075Sobrien{ 155290075Sobrien /* Whether a System V.4 varargs area was created. */ 155390075Sobrien int sysv_varargs_p; 155490075Sobrien /* Flags if __builtin_return_address (n) with n >= 1 was used. */ 155590075Sobrien int ra_needs_full_frame; 155690075Sobrien} machine_function; 155790075Sobrien 155890075Sobrien/* Define a data type for recording info about an argument list 155990075Sobrien during the scan of that argument list. This data type should 156090075Sobrien hold all necessary information about the function itself 156190075Sobrien and about the args processed so far, enough to enable macros 156290075Sobrien such as FUNCTION_ARG to determine where the next arg should go. 156390075Sobrien 156490075Sobrien On the RS/6000, this is a structure. The first element is the number of 156590075Sobrien total argument words, the second is used to store the next 156690075Sobrien floating-point register number, and the third says how many more args we 156790075Sobrien have prototype types for. 156890075Sobrien 156990075Sobrien For ABI_V4, we treat these slightly differently -- `sysv_gregno' is 157090075Sobrien the next availible GP register, `fregno' is the next available FP 157190075Sobrien register, and `words' is the number of words used on the stack. 157290075Sobrien 157390075Sobrien The varargs/stdarg support requires that this structure's size 157490075Sobrien be a multiple of sizeof(int). */ 157590075Sobrien 157690075Sobrientypedef struct rs6000_args 157790075Sobrien{ 157890075Sobrien int words; /* # words used for passing GP registers */ 157990075Sobrien int fregno; /* next available FP register */ 158090075Sobrien int vregno; /* next available AltiVec register */ 158190075Sobrien int nargs_prototype; /* # args left in the current prototype */ 158290075Sobrien int orig_nargs; /* Original value of nargs_prototype */ 158390075Sobrien int prototype; /* Whether a prototype was defined */ 158490075Sobrien int call_cookie; /* Do special things for this call */ 158590075Sobrien int sysv_gregno; /* next available GP register */ 158690075Sobrien} CUMULATIVE_ARGS; 158790075Sobrien 158890075Sobrien/* Define intermediate macro to compute the size (in registers) of an argument 158990075Sobrien for the RS/6000. */ 159090075Sobrien 159190075Sobrien#define RS6000_ARG_SIZE(MODE, TYPE) \ 159290075Sobrien((MODE) != BLKmode \ 159390075Sobrien ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \ 159490075Sobrien : ((unsigned HOST_WIDE_INT) int_size_in_bytes (TYPE) \ 159590075Sobrien + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) 159690075Sobrien 159790075Sobrien/* Initialize a variable CUM of type CUMULATIVE_ARGS 159890075Sobrien for a call to a function whose data type is FNTYPE. 159990075Sobrien For a library call, FNTYPE is 0. */ 160090075Sobrien 160190075Sobrien#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ 160290075Sobrien init_cumulative_args (&CUM, FNTYPE, LIBNAME, FALSE) 160390075Sobrien 160490075Sobrien/* Similar, but when scanning the definition of a procedure. We always 160590075Sobrien set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */ 160690075Sobrien 160790075Sobrien#define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,LIBNAME) \ 160890075Sobrien init_cumulative_args (&CUM, FNTYPE, LIBNAME, TRUE) 160990075Sobrien 161090075Sobrien/* Update the data in CUM to advance over an argument 161190075Sobrien of mode MODE and data type TYPE. 161290075Sobrien (TYPE is null for libcalls where that information may not be available.) */ 161390075Sobrien 161490075Sobrien#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 161590075Sobrien function_arg_advance (&CUM, MODE, TYPE, NAMED) 161690075Sobrien 161790075Sobrien/* Non-zero if we can use a floating-point register to pass this arg. */ 161890075Sobrien#define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \ 161990075Sobrien (GET_MODE_CLASS (MODE) == MODE_FLOAT \ 162090075Sobrien && (CUM).fregno <= FP_ARG_MAX_REG \ 162190075Sobrien && TARGET_HARD_FLOAT) 162290075Sobrien 162390075Sobrien/* Non-zero if we can use an AltiVec register to pass this arg. */ 162490075Sobrien#define USE_ALTIVEC_FOR_ARG_P(CUM,MODE,TYPE) \ 162590075Sobrien (ALTIVEC_VECTOR_MODE (MODE) \ 162690075Sobrien && (CUM).vregno <= ALTIVEC_ARG_MAX_REG \ 162790075Sobrien && TARGET_ALTIVEC_ABI) 162890075Sobrien 162990075Sobrien/* Determine where to put an argument to a function. 163090075Sobrien Value is zero to push the argument on the stack, 163190075Sobrien or a hard register in which to store the argument. 163290075Sobrien 163390075Sobrien MODE is the argument's machine mode. 163490075Sobrien TYPE is the data type of the argument (as a tree). 163590075Sobrien This is null for libcalls where that information may 163690075Sobrien not be available. 163790075Sobrien CUM is a variable of type CUMULATIVE_ARGS which gives info about 163890075Sobrien the preceding args and about the function being called. 163990075Sobrien NAMED is nonzero if this argument is a named parameter 164090075Sobrien (otherwise it is an extra parameter matching an ellipsis). 164190075Sobrien 164290075Sobrien On RS/6000 the first eight words of non-FP are normally in registers 164390075Sobrien and the rest are pushed. The first 13 FP args are in registers. 164490075Sobrien 164590075Sobrien If this is floating-point and no prototype is specified, we use 164690075Sobrien both an FP and integer register (or possibly FP reg and stack). Library 164790075Sobrien functions (when TYPE is zero) always have the proper types for args, 164890075Sobrien so we can pass the FP value just in one register. emit_library_function 164990075Sobrien doesn't support EXPR_LIST anyway. */ 165090075Sobrien 165190075Sobrien#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 165290075Sobrien function_arg (&CUM, MODE, TYPE, NAMED) 165390075Sobrien 165490075Sobrien/* For an arg passed partly in registers and partly in memory, 165590075Sobrien this is the number of registers used. 165690075Sobrien For args passed entirely in registers or entirely in memory, zero. */ 165790075Sobrien 165890075Sobrien#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ 165990075Sobrien function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) 166090075Sobrien 166190075Sobrien/* A C expression that indicates when an argument must be passed by 166290075Sobrien reference. If nonzero for an argument, a copy of that argument is 166390075Sobrien made in memory and a pointer to the argument is passed instead of 166490075Sobrien the argument itself. The pointer is passed in whatever way is 166590075Sobrien appropriate for passing a pointer to that type. */ 166690075Sobrien 166790075Sobrien#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ 166890075Sobrien function_arg_pass_by_reference(&CUM, MODE, TYPE, NAMED) 166990075Sobrien 167090075Sobrien/* If defined, a C expression which determines whether, and in which 167190075Sobrien direction, to pad out an argument with extra space. The value 167290075Sobrien should be of type `enum direction': either `upward' to pad above 167390075Sobrien the argument, `downward' to pad below, or `none' to inhibit 167490075Sobrien padding. */ 167590075Sobrien 167690075Sobrien#define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding (MODE, TYPE) 167790075Sobrien 167890075Sobrien/* If defined, a C expression that gives the alignment boundary, in bits, 167990075Sobrien of an argument with the specified mode and type. If it is not defined, 168090075Sobrien PARM_BOUNDARY is used for all arguments. */ 168190075Sobrien 168290075Sobrien#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ 168390075Sobrien function_arg_boundary (MODE, TYPE) 168490075Sobrien 168590075Sobrien/* Perform any needed actions needed for a function that is receiving a 168690075Sobrien variable number of arguments. 168790075Sobrien 168890075Sobrien CUM is as above. 168990075Sobrien 169090075Sobrien MODE and TYPE are the mode and type of the current parameter. 169190075Sobrien 169290075Sobrien PRETEND_SIZE is a variable that should be set to the amount of stack 169390075Sobrien that must be pushed by the prolog to pretend that our caller pushed 169490075Sobrien it. 169590075Sobrien 169690075Sobrien Normally, this macro will push all remaining incoming registers on the 169790075Sobrien stack and set PRETEND_SIZE to the length of the registers pushed. */ 169890075Sobrien 169990075Sobrien#define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ 170090075Sobrien setup_incoming_varargs (&CUM, MODE, TYPE, &PRETEND_SIZE, NO_RTL) 170190075Sobrien 170290075Sobrien/* Define the `__builtin_va_list' type for the ABI. */ 170390075Sobrien#define BUILD_VA_LIST_TYPE(VALIST) \ 170490075Sobrien (VALIST) = rs6000_build_va_list () 170590075Sobrien 170690075Sobrien/* Implement `va_start' for varargs and stdarg. */ 170790075Sobrien#define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \ 170890075Sobrien rs6000_va_start (stdarg, valist, nextarg) 170990075Sobrien 171090075Sobrien/* Implement `va_arg'. */ 171190075Sobrien#define EXPAND_BUILTIN_VA_ARG(valist, type) \ 171290075Sobrien rs6000_va_arg (valist, type) 171390075Sobrien 171490075Sobrien/* Define this macro to be a nonzero value if the location where a function 171590075Sobrien argument is passed depends on whether or not it is a named argument. */ 171690075Sobrien#define STRICT_ARGUMENT_NAMING 1 171790075Sobrien 171890075Sobrien/* Output assembler code to FILE to increment profiler label # LABELNO 171990075Sobrien for profiling a function entry. */ 172090075Sobrien 172190075Sobrien#define FUNCTION_PROFILER(FILE, LABELNO) \ 172290075Sobrien output_function_profiler ((FILE), (LABELNO)); 172390075Sobrien 172490075Sobrien/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 172590075Sobrien the stack pointer does not matter. No definition is equivalent to 172690075Sobrien always zero. 172790075Sobrien 172890075Sobrien On the RS/6000, this is non-zero because we can restore the stack from 172990075Sobrien its backpointer, which we maintain. */ 173090075Sobrien#define EXIT_IGNORE_STACK 1 173190075Sobrien 173290075Sobrien/* Define this macro as a C expression that is nonzero for registers 173390075Sobrien that are used by the epilogue or the return' pattern. The stack 173490075Sobrien and frame pointer registers are already be assumed to be used as 173590075Sobrien needed. */ 173690075Sobrien 173790075Sobrien#define EPILOGUE_USES(REGNO) \ 173890075Sobrien ((reload_completed && (REGNO) == LINK_REGISTER_REGNUM) \ 173990075Sobrien || (REGNO) == VRSAVE_REGNO \ 174090075Sobrien || (current_function_calls_eh_return \ 174190075Sobrien && TARGET_AIX \ 174290075Sobrien && (REGNO) == TOC_REGISTER)) 174390075Sobrien 174490075Sobrien 174590075Sobrien/* TRAMPOLINE_TEMPLATE deleted */ 174690075Sobrien 174790075Sobrien/* Length in units of the trampoline for entering a nested function. */ 174890075Sobrien 174990075Sobrien#define TRAMPOLINE_SIZE rs6000_trampoline_size () 175090075Sobrien 175190075Sobrien/* Emit RTL insns to initialize the variable parts of a trampoline. 175290075Sobrien FNADDR is an RTX for the address of the function's pure code. 175390075Sobrien CXT is an RTX for the static chain value for the function. */ 175490075Sobrien 175590075Sobrien#define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \ 175690075Sobrien rs6000_initialize_trampoline (ADDR, FNADDR, CXT) 175790075Sobrien 175890075Sobrien/* Definitions for __builtin_return_address and __builtin_frame_address. 175990075Sobrien __builtin_return_address (0) should give link register (65), enable 176090075Sobrien this. */ 176190075Sobrien/* This should be uncommented, so that the link register is used, but 176290075Sobrien currently this would result in unmatched insns and spilling fixed 176390075Sobrien registers so we'll leave it for another day. When these problems are 176490075Sobrien taken care of one additional fetch will be necessary in RETURN_ADDR_RTX. 176590075Sobrien (mrs) */ 176690075Sobrien/* #define RETURN_ADDR_IN_PREVIOUS_FRAME */ 176790075Sobrien 176890075Sobrien/* Number of bytes into the frame return addresses can be found. See 176990075Sobrien rs6000_stack_info in rs6000.c for more information on how the different 177090075Sobrien abi's store the return address. */ 177190075Sobrien#define RETURN_ADDRESS_OFFSET \ 177290075Sobrien ((DEFAULT_ABI == ABI_AIX \ 177390075Sobrien || DEFAULT_ABI == ABI_DARWIN \ 177490075Sobrien || DEFAULT_ABI == ABI_AIX_NODESC) ? (TARGET_32BIT ? 8 : 16) : \ 177590075Sobrien (DEFAULT_ABI == ABI_V4) ? 4 : \ 177690075Sobrien (internal_error ("RETURN_ADDRESS_OFFSET not supported"), 0)) 177790075Sobrien 177890075Sobrien/* The current return address is in link register (65). The return address 177990075Sobrien of anything farther back is accessed normally at an offset of 8 from the 178090075Sobrien frame pointer. */ 178190075Sobrien#define RETURN_ADDR_RTX(COUNT, FRAME) \ 178290075Sobrien (rs6000_return_addr (COUNT, FRAME)) 178390075Sobrien 178490075Sobrien 178590075Sobrien/* Definitions for register eliminations. 178690075Sobrien 178790075Sobrien We have two registers that can be eliminated on the RS/6000. First, the 178890075Sobrien frame pointer register can often be eliminated in favor of the stack 178990075Sobrien pointer register. Secondly, the argument pointer register can always be 179090075Sobrien eliminated; it is replaced with either the stack or frame pointer. 179190075Sobrien 179290075Sobrien In addition, we use the elimination mechanism to see if r30 is needed 179390075Sobrien Initially we assume that it isn't. If it is, we spill it. This is done 179490075Sobrien by making it an eliminable register. We replace it with itself so that 179590075Sobrien if it isn't needed, then existing uses won't be modified. */ 179690075Sobrien 179790075Sobrien/* This is an array of structures. Each structure initializes one pair 179890075Sobrien of eliminable registers. The "from" register number is given first, 179990075Sobrien followed by "to". Eliminations of the same "from" register are listed 180090075Sobrien in order of preference. */ 180190075Sobrien#define ELIMINABLE_REGS \ 180290075Sobrien{{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 180390075Sobrien { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 180490075Sobrien { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 180590075Sobrien { 30, 30} } 180690075Sobrien 180790075Sobrien/* Given FROM and TO register numbers, say whether this elimination is allowed. 180890075Sobrien Frame pointer elimination is automatically handled. 180990075Sobrien 181090075Sobrien For the RS/6000, if frame pointer elimination is being done, we would like 181190075Sobrien to convert ap into fp, not sp. 181290075Sobrien 181390075Sobrien We need r30 if -mminimal-toc was specified, and there are constant pool 181490075Sobrien references. */ 181590075Sobrien 181690075Sobrien#define CAN_ELIMINATE(FROM, TO) \ 181790075Sobrien ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ 181890075Sobrien ? ! frame_pointer_needed \ 181990075Sobrien : (FROM) == 30 ? ! TARGET_MINIMAL_TOC || TARGET_NO_TOC || get_pool_size () == 0 \ 182090075Sobrien : 1) 182190075Sobrien 182290075Sobrien/* Define the offset between two registers, one to be eliminated, and the other 182390075Sobrien its replacement, at the start of a routine. */ 182490075Sobrien#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 182590075Sobrien{ \ 182690075Sobrien rs6000_stack_t *info = rs6000_stack_info (); \ 182790075Sobrien \ 182890075Sobrien if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ 182990075Sobrien (OFFSET) = (info->push_p) ? 0 : - info->total_size; \ 183090075Sobrien else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ 183190075Sobrien (OFFSET) = info->total_size; \ 183290075Sobrien else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ 183390075Sobrien (OFFSET) = (info->push_p) ? info->total_size : 0; \ 183490075Sobrien else if ((FROM) == 30) \ 183590075Sobrien (OFFSET) = 0; \ 183690075Sobrien else \ 183790075Sobrien abort (); \ 183890075Sobrien} 183990075Sobrien 184090075Sobrien/* Addressing modes, and classification of registers for them. */ 184190075Sobrien 184290075Sobrien/* #define HAVE_POST_INCREMENT 0 */ 184390075Sobrien/* #define HAVE_POST_DECREMENT 0 */ 184490075Sobrien 184590075Sobrien#define HAVE_PRE_DECREMENT 1 184690075Sobrien#define HAVE_PRE_INCREMENT 1 184790075Sobrien 184890075Sobrien/* Macros to check register numbers against specific register classes. */ 184990075Sobrien 185090075Sobrien/* These assume that REGNO is a hard or pseudo reg number. 185190075Sobrien They give nonzero only if REGNO is a hard reg of the suitable class 185290075Sobrien or a pseudo reg currently allocated to a suitable hard reg. 185390075Sobrien Since they use reg_renumber, they are safe only once reg_renumber 185490075Sobrien has been allocated, which happens in local-alloc.c. */ 185590075Sobrien 185690075Sobrien#define REGNO_OK_FOR_INDEX_P(REGNO) \ 185790075Sobrien((REGNO) < FIRST_PSEUDO_REGISTER \ 185890075Sobrien ? (REGNO) <= 31 || (REGNO) == 67 \ 185990075Sobrien : (reg_renumber[REGNO] >= 0 \ 186090075Sobrien && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67))) 186190075Sobrien 186290075Sobrien#define REGNO_OK_FOR_BASE_P(REGNO) \ 186390075Sobrien((REGNO) < FIRST_PSEUDO_REGISTER \ 186490075Sobrien ? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67 \ 186590075Sobrien : (reg_renumber[REGNO] > 0 \ 186690075Sobrien && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67))) 186790075Sobrien 186890075Sobrien/* Maximum number of registers that can appear in a valid memory address. */ 186990075Sobrien 187090075Sobrien#define MAX_REGS_PER_ADDRESS 2 187190075Sobrien 187290075Sobrien/* Recognize any constant value that is a valid address. */ 187390075Sobrien 187490075Sobrien#define CONSTANT_ADDRESS_P(X) \ 187590075Sobrien (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ 187690075Sobrien || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ 187790075Sobrien || GET_CODE (X) == HIGH) 187890075Sobrien 187990075Sobrien/* Nonzero if the constant value X is a legitimate general operand. 188090075Sobrien It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. 188190075Sobrien 188290075Sobrien On the RS/6000, all integer constants are acceptable, most won't be valid 188390075Sobrien for particular insns, though. Only easy FP constants are 188490075Sobrien acceptable. */ 188590075Sobrien 188690075Sobrien#define LEGITIMATE_CONSTANT_P(X) \ 188790075Sobrien (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \ 188890075Sobrien || (TARGET_POWERPC64 && GET_MODE (X) == DImode) \ 188990075Sobrien || easy_fp_constant (X, GET_MODE (X))) 189090075Sobrien 189190075Sobrien/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 189290075Sobrien and check its validity for a certain class. 189390075Sobrien We have two alternate definitions for each of them. 189490075Sobrien The usual definition accepts all pseudo regs; the other rejects 189590075Sobrien them unless they have been allocated suitable hard regs. 189690075Sobrien The symbol REG_OK_STRICT causes the latter definition to be used. 189790075Sobrien 189890075Sobrien Most source files want to accept pseudo regs in the hope that 189990075Sobrien they will get allocated to the class that the insn wants them to be in. 190090075Sobrien Source files for reload pass need to be strict. 190190075Sobrien After reload, it makes no difference, since pseudo regs have 190290075Sobrien been eliminated by then. */ 190390075Sobrien 190490075Sobrien#ifdef REG_OK_STRICT 190590075Sobrien# define REG_OK_STRICT_FLAG 1 190690075Sobrien#else 190790075Sobrien# define REG_OK_STRICT_FLAG 0 190890075Sobrien#endif 190990075Sobrien 191090075Sobrien/* Nonzero if X is a hard reg that can be used as an index 191190075Sobrien or if it is a pseudo reg in the non-strict case. */ 191290075Sobrien#define INT_REG_OK_FOR_INDEX_P(X, STRICT) \ 191390075Sobrien ((! (STRICT) \ 191490075Sobrien && (REGNO (X) <= 31 \ 191590075Sobrien || REGNO (X) == ARG_POINTER_REGNUM \ 191690075Sobrien || REGNO (X) >= FIRST_PSEUDO_REGISTER)) \ 191790075Sobrien || ((STRICT) && REGNO_OK_FOR_INDEX_P (REGNO (X)))) 191890075Sobrien 191990075Sobrien/* Nonzero if X is a hard reg that can be used as a base reg 192090075Sobrien or if it is a pseudo reg in the non-strict case. */ 192190075Sobrien#define INT_REG_OK_FOR_BASE_P(X, STRICT) \ 192290075Sobrien (REGNO (X) > 0 && INT_REG_OK_FOR_INDEX_P (X, (STRICT))) 192390075Sobrien 192490075Sobrien#define REG_OK_FOR_INDEX_P(X) INT_REG_OK_FOR_INDEX_P (X, REG_OK_STRICT_FLAG) 192590075Sobrien#define REG_OK_FOR_BASE_P(X) INT_REG_OK_FOR_BASE_P (X, REG_OK_STRICT_FLAG) 192690075Sobrien 192790075Sobrien/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 192890075Sobrien that is a valid memory address for an instruction. 192990075Sobrien The MODE argument is the machine mode for the MEM expression 193090075Sobrien that wants to use this address. 193190075Sobrien 193290075Sobrien On the RS/6000, there are four valid address: a SYMBOL_REF that 193390075Sobrien refers to a constant pool entry of an address (or the sum of it 193490075Sobrien plus a constant), a short (16-bit signed) constant plus a register, 193590075Sobrien the sum of two registers, or a register indirect, possibly with an 193690075Sobrien auto-increment. For DFmode and DImode with an constant plus register, 193790075Sobrien we must ensure that both words are addressable or PowerPC64 with offset 193890075Sobrien word aligned. 193990075Sobrien 194090075Sobrien For modes spanning multiple registers (DFmode in 32-bit GPRs, 194190075Sobrien 32-bit DImode, TImode), indexed addressing cannot be used because 194290075Sobrien adjacent memory cells are accessed by adding word-sized offsets 194390075Sobrien during assembly output. */ 194490075Sobrien 194590075Sobrien#define CONSTANT_POOL_EXPR_P(X) (constant_pool_expr_p (X)) 194690075Sobrien 194790075Sobrien#define TOC_RELATIVE_EXPR_P(X) (toc_relative_expr_p (X)) 194890075Sobrien 194990075Sobrien#define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X) \ 195090075Sobrien (TARGET_TOC \ 195190075Sobrien && GET_CODE (X) == PLUS \ 195290075Sobrien && GET_CODE (XEXP (X, 0)) == REG \ 195390075Sobrien && (TARGET_MINIMAL_TOC || REGNO (XEXP (X, 0)) == TOC_REGISTER) \ 195490075Sobrien && CONSTANT_POOL_EXPR_P (XEXP (X, 1))) 195590075Sobrien 195690075Sobrien#define LEGITIMATE_SMALL_DATA_P(MODE, X) \ 195790075Sobrien (DEFAULT_ABI == ABI_V4 \ 195890075Sobrien && !flag_pic && !TARGET_TOC \ 195990075Sobrien && (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST) \ 196090075Sobrien && small_data_operand (X, MODE)) 196190075Sobrien 196290075Sobrien#define LEGITIMATE_ADDRESS_INTEGER_P(X, OFFSET) \ 196390075Sobrien (GET_CODE (X) == CONST_INT \ 196490075Sobrien && (unsigned HOST_WIDE_INT) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000) 196590075Sobrien 196690075Sobrien#define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X, STRICT) \ 196790075Sobrien (GET_CODE (X) == PLUS \ 196890075Sobrien && GET_CODE (XEXP (X, 0)) == REG \ 196990075Sobrien && INT_REG_OK_FOR_BASE_P (XEXP (X, 0), (STRICT)) \ 197090075Sobrien && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \ 197190075Sobrien && (! ALTIVEC_VECTOR_MODE (MODE) || INTVAL (X) == 0) \ 197290075Sobrien && (((MODE) != DFmode && (MODE) != DImode) \ 197390075Sobrien || (TARGET_32BIT \ 197490075Sobrien ? LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4) \ 197590075Sobrien : ! (INTVAL (XEXP (X, 1)) & 3))) \ 197690075Sobrien && ((MODE) != TImode \ 197790075Sobrien || (TARGET_32BIT \ 197890075Sobrien ? LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 12) \ 197990075Sobrien : (LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 8) \ 198090075Sobrien && ! (INTVAL (XEXP (X, 1)) & 3))))) 198190075Sobrien 198290075Sobrien#define LEGITIMATE_INDEXED_ADDRESS_P(X, STRICT) \ 198390075Sobrien (GET_CODE (X) == PLUS \ 198490075Sobrien && GET_CODE (XEXP (X, 0)) == REG \ 198590075Sobrien && GET_CODE (XEXP (X, 1)) == REG \ 198690075Sobrien && ((INT_REG_OK_FOR_BASE_P (XEXP (X, 0), (STRICT)) \ 198790075Sobrien && INT_REG_OK_FOR_INDEX_P (XEXP (X, 1), (STRICT))) \ 198890075Sobrien || (INT_REG_OK_FOR_BASE_P (XEXP (X, 1), (STRICT)) \ 198990075Sobrien && INT_REG_OK_FOR_INDEX_P (XEXP (X, 0), (STRICT))))) 199090075Sobrien 199190075Sobrien#define LEGITIMATE_INDIRECT_ADDRESS_P(X, STRICT) \ 199290075Sobrien (GET_CODE (X) == REG && INT_REG_OK_FOR_BASE_P (X, (STRICT))) 199390075Sobrien 199490075Sobrien#define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X, STRICT) \ 199590075Sobrien (TARGET_ELF \ 199690075Sobrien && ! flag_pic && ! TARGET_TOC \ 199790075Sobrien && GET_MODE_NUNITS (MODE) == 1 \ 199890075Sobrien && (GET_MODE_BITSIZE (MODE) <= 32 \ 199990075Sobrien || (TARGET_HARD_FLOAT && (MODE) == DFmode)) \ 200090075Sobrien && GET_CODE (X) == LO_SUM \ 200190075Sobrien && GET_CODE (XEXP (X, 0)) == REG \ 200290075Sobrien && INT_REG_OK_FOR_BASE_P (XEXP (X, 0), (STRICT)) \ 200390075Sobrien && CONSTANT_P (XEXP (X, 1))) 200490075Sobrien 200590075Sobrien#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 200690075Sobrien{ if (rs6000_legitimate_address (MODE, X, REG_OK_STRICT_FLAG)) \ 200790075Sobrien goto ADDR; \ 200890075Sobrien} 200990075Sobrien 201090075Sobrien/* Try machine-dependent ways of modifying an illegitimate address 201190075Sobrien to be legitimate. If we find one, return the new, valid address. 201290075Sobrien This macro is used in only one place: `memory_address' in explow.c. 201390075Sobrien 201490075Sobrien OLDX is the address as it was before break_out_memory_refs was called. 201590075Sobrien In some cases it is useful to look at this to decide what needs to be done. 201690075Sobrien 201790075Sobrien MODE and WIN are passed so that this macro can use 201890075Sobrien GO_IF_LEGITIMATE_ADDRESS. 201990075Sobrien 202090075Sobrien It is always safe for this macro to do nothing. It exists to recognize 202190075Sobrien opportunities to optimize the output. 202290075Sobrien 202390075Sobrien On RS/6000, first check for the sum of a register with a constant 202490075Sobrien integer that is out of range. If so, generate code to add the 202590075Sobrien constant with the low-order 16 bits masked to the register and force 202690075Sobrien this result into another register (this can be done with `cau'). 202790075Sobrien Then generate an address of REG+(CONST&0xffff), allowing for the 202890075Sobrien possibility of bit 16 being a one. 202990075Sobrien 203090075Sobrien Then check for the sum of a register and something not constant, try to 203190075Sobrien load the other things into a register and return the sum. */ 203290075Sobrien 203390075Sobrien#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ 203490075Sobrien{ rtx result = rs6000_legitimize_address (X, OLDX, MODE); \ 203590075Sobrien if (result != NULL_RTX) \ 203690075Sobrien { \ 203790075Sobrien (X) = result; \ 203890075Sobrien goto WIN; \ 203990075Sobrien } \ 204090075Sobrien} 204190075Sobrien 204290075Sobrien/* Try a machine-dependent way of reloading an illegitimate address 204390075Sobrien operand. If we find one, push the reload and jump to WIN. This 204490075Sobrien macro is used in only one place: `find_reloads_address' in reload.c. 204590075Sobrien 204690075Sobrien Implemented on rs6000 by rs6000_legitimize_reload_address. 204790075Sobrien Note that (X) is evaluated twice; this is safe in current usage. */ 204890075Sobrien 204990075Sobrien#define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_LEVELS,WIN) \ 205090075Sobriendo { \ 205190075Sobrien int win; \ 205290075Sobrien (X) = rs6000_legitimize_reload_address ((X), (MODE), (OPNUM), \ 205390075Sobrien (int)(TYPE), (IND_LEVELS), &win); \ 205490075Sobrien if ( win ) \ 205590075Sobrien goto WIN; \ 205690075Sobrien} while (0) 205790075Sobrien 205890075Sobrien/* Go to LABEL if ADDR (a legitimate address expression) 205990075Sobrien has an effect that depends on the machine mode it is used for. 206090075Sobrien 206190075Sobrien On the RS/6000 this is true if the address is valid with a zero offset 206290075Sobrien but not with an offset of four (this means it cannot be used as an 206390075Sobrien address for DImode or DFmode) or is a pre-increment or decrement. Since 206490075Sobrien we know it is valid, we just check for an address that is not valid with 206590075Sobrien an offset of four. */ 206690075Sobrien 206790075Sobrien#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ 206890075Sobrien{ if (GET_CODE (ADDR) == PLUS \ 206990075Sobrien && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 0) \ 207090075Sobrien && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), \ 207190075Sobrien (TARGET_32BIT ? 4 : 8))) \ 207290075Sobrien goto LABEL; \ 207390075Sobrien if (TARGET_UPDATE && GET_CODE (ADDR) == PRE_INC) \ 207490075Sobrien goto LABEL; \ 207590075Sobrien if (TARGET_UPDATE && GET_CODE (ADDR) == PRE_DEC) \ 207690075Sobrien goto LABEL; \ 207790075Sobrien if (GET_CODE (ADDR) == LO_SUM) \ 207890075Sobrien goto LABEL; \ 207990075Sobrien} 208090075Sobrien 208190075Sobrien/* The register number of the register used to address a table of 208290075Sobrien static data addresses in memory. In some cases this register is 208390075Sobrien defined by a processor's "application binary interface" (ABI). 208490075Sobrien When this macro is defined, RTL is generated for this register 208590075Sobrien once, as with the stack pointer and frame pointer registers. If 208690075Sobrien this macro is not defined, it is up to the machine-dependent files 208790075Sobrien to allocate such a register (if necessary). */ 208890075Sobrien 208990075Sobrien#define PIC_OFFSET_TABLE_REGNUM 30 209090075Sobrien 209190075Sobrien#define TOC_REGISTER (TARGET_MINIMAL_TOC ? 30 : 2) 209290075Sobrien 209390075Sobrien/* Define this macro if the register defined by 209490075Sobrien `PIC_OFFSET_TABLE_REGNUM' is clobbered by calls. Do not define 209590075Sobrien this macro if `PIC_OFFSET_TABLE_REGNUM' is not defined. */ 209690075Sobrien 209790075Sobrien/* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */ 209890075Sobrien 209990075Sobrien/* By generating position-independent code, when two different 210090075Sobrien programs (A and B) share a common library (libC.a), the text of 210190075Sobrien the library can be shared whether or not the library is linked at 210290075Sobrien the same address for both programs. In some of these 210390075Sobrien environments, position-independent code requires not only the use 210490075Sobrien of different addressing modes, but also special code to enable the 210590075Sobrien use of these addressing modes. 210690075Sobrien 210790075Sobrien The `FINALIZE_PIC' macro serves as a hook to emit these special 210890075Sobrien codes once the function is being compiled into assembly code, but 210990075Sobrien not before. (It is not done before, because in the case of 211090075Sobrien compiling an inline function, it would lead to multiple PIC 211190075Sobrien prologues being included in functions which used inline functions 211290075Sobrien and were compiled to assembly language.) */ 211390075Sobrien 211490075Sobrien/* #define FINALIZE_PIC */ 211590075Sobrien 211690075Sobrien/* A C expression that is nonzero if X is a legitimate immediate 211790075Sobrien operand on the target machine when generating position independent 211890075Sobrien code. You can assume that X satisfies `CONSTANT_P', so you need 211990075Sobrien not check this. You can also assume FLAG_PIC is true, so you need 212090075Sobrien not check it either. You need not define this macro if all 212190075Sobrien constants (including `SYMBOL_REF') can be immediate operands when 212290075Sobrien generating position independent code. */ 212390075Sobrien 212490075Sobrien/* #define LEGITIMATE_PIC_OPERAND_P (X) */ 212590075Sobrien 212690075Sobrien/* In rare cases, correct code generation requires extra machine 212790075Sobrien dependent processing between the second jump optimization pass and 212890075Sobrien delayed branch scheduling. On those machines, define this macro 212990075Sobrien as a C statement to act on the code starting at INSN. */ 213090075Sobrien 213190075Sobrien/* #define MACHINE_DEPENDENT_REORG(INSN) */ 213290075Sobrien 213390075Sobrien 213490075Sobrien/* Define this if some processing needs to be done immediately before 213590075Sobrien emitting code for an insn. */ 213690075Sobrien 213790075Sobrien/* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */ 213890075Sobrien 213990075Sobrien/* Specify the machine mode that this machine uses 214090075Sobrien for the index in the tablejump instruction. */ 214190075Sobrien#define CASE_VECTOR_MODE SImode 214290075Sobrien 214390075Sobrien/* Define as C expression which evaluates to nonzero if the tablejump 214490075Sobrien instruction expects the table to contain offsets from the address of the 214590075Sobrien table. 214690075Sobrien Do not define this if the table should contain absolute addresses. */ 214790075Sobrien#define CASE_VECTOR_PC_RELATIVE 1 214890075Sobrien 214990075Sobrien/* Define this as 1 if `char' should by default be signed; else as 0. */ 215090075Sobrien#define DEFAULT_SIGNED_CHAR 0 215190075Sobrien 215290075Sobrien/* This flag, if defined, says the same insns that convert to a signed fixnum 215390075Sobrien also convert validly to an unsigned one. */ 215490075Sobrien 215590075Sobrien/* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */ 215690075Sobrien 215790075Sobrien/* Max number of bytes we can move from memory to memory 215890075Sobrien in one reasonably fast instruction. */ 215990075Sobrien#define MOVE_MAX (! TARGET_POWERPC64 ? 4 : 8) 216090075Sobrien#define MAX_MOVE_MAX 8 216190075Sobrien 216290075Sobrien/* Nonzero if access to memory by bytes is no faster than for words. 216390075Sobrien Also non-zero if doing byte operations (specifically shifts) in registers 216490075Sobrien is undesirable. */ 216590075Sobrien#define SLOW_BYTE_ACCESS 1 216690075Sobrien 216790075Sobrien/* Define if operations between registers always perform the operation 216890075Sobrien on the full register even if a narrower mode is specified. */ 216990075Sobrien#define WORD_REGISTER_OPERATIONS 217090075Sobrien 217190075Sobrien/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD 217290075Sobrien will either zero-extend or sign-extend. The value of this macro should 217390075Sobrien be the code that says which one of the two operations is implicitly 217490075Sobrien done, NIL if none. */ 217590075Sobrien#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND 217690075Sobrien 217790075Sobrien/* Define if loading short immediate values into registers sign extends. */ 217890075Sobrien#define SHORT_IMMEDIATES_SIGN_EXTEND 217990075Sobrien 218090075Sobrien/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 218190075Sobrien is done just by pretending it is already truncated. */ 218290075Sobrien#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 218390075Sobrien 218490075Sobrien/* Specify the machine mode that pointers have. 218590075Sobrien After generation of rtl, the compiler makes no further distinction 218690075Sobrien between pointers and any other objects of this machine mode. */ 218790075Sobrien#define Pmode (TARGET_32BIT ? SImode : DImode) 218890075Sobrien 218990075Sobrien/* Mode of a function address in a call instruction (for indexing purposes). 219090075Sobrien Doesn't matter on RS/6000. */ 219190075Sobrien#define FUNCTION_MODE (TARGET_32BIT ? SImode : DImode) 219290075Sobrien 219390075Sobrien/* Define this if addresses of constant functions 219490075Sobrien shouldn't be put through pseudo regs where they can be cse'd. 219590075Sobrien Desirable on machines where ordinary constants are expensive 219690075Sobrien but a CALL with constant address is cheap. */ 219790075Sobrien#define NO_FUNCTION_CSE 219890075Sobrien 219990075Sobrien/* Define this to be nonzero if shift instructions ignore all but the low-order 220090075Sobrien few bits. 220190075Sobrien 220290075Sobrien The sle and sre instructions which allow SHIFT_COUNT_TRUNCATED 220390075Sobrien have been dropped from the PowerPC architecture. */ 220490075Sobrien 220590075Sobrien#define SHIFT_COUNT_TRUNCATED (TARGET_POWER ? 1 : 0) 220690075Sobrien 220790075Sobrien/* Compute the cost of computing a constant rtl expression RTX 220890075Sobrien whose rtx-code is CODE. The body of this macro is a portion 220990075Sobrien of a switch statement. If the code is computed here, 221090075Sobrien return it with a return statement. Otherwise, break from the switch. 221190075Sobrien 221290075Sobrien On the RS/6000, if it is valid in the insn, it is free. So this 221390075Sobrien always returns 0. */ 221490075Sobrien 221590075Sobrien#define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 221690075Sobrien case CONST_INT: \ 221790075Sobrien case CONST: \ 221890075Sobrien case LABEL_REF: \ 221990075Sobrien case SYMBOL_REF: \ 222090075Sobrien case CONST_DOUBLE: \ 222190075Sobrien case HIGH: \ 222290075Sobrien return 0; 222390075Sobrien 222490075Sobrien/* Provide the costs of a rtl expression. This is in the body of a 222590075Sobrien switch on CODE. */ 222690075Sobrien 222790075Sobrien#define RTX_COSTS(X,CODE,OUTER_CODE) \ 222890075Sobrien case PLUS: \ 222990075Sobrien return ((GET_CODE (XEXP (X, 1)) == CONST_INT \ 223090075Sobrien && ((unsigned HOST_WIDE_INT) (INTVAL (XEXP (X, 1)) \ 223190075Sobrien + 0x8000) >= 0x10000) \ 223290075Sobrien && ((INTVAL (XEXP (X, 1)) & 0xffff) != 0)) \ 223390075Sobrien ? COSTS_N_INSNS (2) \ 223490075Sobrien : COSTS_N_INSNS (1)); \ 223590075Sobrien case AND: \ 223690075Sobrien case IOR: \ 223790075Sobrien case XOR: \ 223890075Sobrien return ((GET_CODE (XEXP (X, 1)) == CONST_INT \ 223990075Sobrien && (INTVAL (XEXP (X, 1)) & (~ (HOST_WIDE_INT) 0xffff)) != 0 \ 224090075Sobrien && ((INTVAL (XEXP (X, 1)) & 0xffff) != 0)) \ 224190075Sobrien ? COSTS_N_INSNS (2) \ 224290075Sobrien : COSTS_N_INSNS (1)); \ 224390075Sobrien case MULT: \ 224490075Sobrien switch (rs6000_cpu) \ 224590075Sobrien { \ 224690075Sobrien case PROCESSOR_RIOS1: \ 224790075Sobrien case PROCESSOR_PPC405: \ 224890075Sobrien return (GET_CODE (XEXP (X, 1)) != CONST_INT \ 224990075Sobrien ? COSTS_N_INSNS (5) \ 225090075Sobrien : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \ 225190075Sobrien ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \ 225290075Sobrien case PROCESSOR_RS64A: \ 225390075Sobrien return (GET_CODE (XEXP (X, 1)) != CONST_INT \ 225490075Sobrien ? GET_MODE (XEXP (X, 1)) != DImode \ 225590075Sobrien ? COSTS_N_INSNS (20) : COSTS_N_INSNS (34) \ 225690075Sobrien : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \ 225790075Sobrien ? COSTS_N_INSNS (8) : COSTS_N_INSNS (12)); \ 225890075Sobrien case PROCESSOR_RIOS2: \ 225990075Sobrien case PROCESSOR_MPCCORE: \ 226090075Sobrien case PROCESSOR_PPC604e: \ 226190075Sobrien return COSTS_N_INSNS (2); \ 226290075Sobrien case PROCESSOR_PPC601: \ 226390075Sobrien return COSTS_N_INSNS (5); \ 226490075Sobrien case PROCESSOR_PPC603: \ 226590075Sobrien case PROCESSOR_PPC7400: \ 226690075Sobrien case PROCESSOR_PPC750: \ 226790075Sobrien return (GET_CODE (XEXP (X, 1)) != CONST_INT \ 226890075Sobrien ? COSTS_N_INSNS (5) \ 226990075Sobrien : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \ 227090075Sobrien ? COSTS_N_INSNS (2) : COSTS_N_INSNS (3)); \ 227190075Sobrien case PROCESSOR_PPC7450: \ 227290075Sobrien return (GET_CODE (XEXP (X, 1)) != CONST_INT \ 227390075Sobrien ? COSTS_N_INSNS (4) \ 227490075Sobrien : COSTS_N_INSNS (3)); \ 227590075Sobrien case PROCESSOR_PPC403: \ 227690075Sobrien case PROCESSOR_PPC604: \ 227790075Sobrien return COSTS_N_INSNS (4); \ 227890075Sobrien case PROCESSOR_PPC620: \ 227990075Sobrien case PROCESSOR_PPC630: \ 228090075Sobrien return (GET_CODE (XEXP (X, 1)) != CONST_INT \ 228190075Sobrien ? GET_MODE (XEXP (X, 1)) != DImode \ 228290075Sobrien ? COSTS_N_INSNS (5) : COSTS_N_INSNS (7) \ 228390075Sobrien : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \ 228490075Sobrien ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \ 228590075Sobrien } \ 228690075Sobrien case DIV: \ 228790075Sobrien case MOD: \ 228890075Sobrien if (GET_CODE (XEXP (X, 1)) == CONST_INT \ 228990075Sobrien && exact_log2 (INTVAL (XEXP (X, 1))) >= 0) \ 229090075Sobrien return COSTS_N_INSNS (2); \ 229190075Sobrien /* otherwise fall through to normal divide. */ \ 229290075Sobrien case UDIV: \ 229390075Sobrien case UMOD: \ 229490075Sobrien switch (rs6000_cpu) \ 229590075Sobrien { \ 229690075Sobrien case PROCESSOR_RIOS1: \ 229790075Sobrien return COSTS_N_INSNS (19); \ 229890075Sobrien case PROCESSOR_RIOS2: \ 229990075Sobrien return COSTS_N_INSNS (13); \ 230090075Sobrien case PROCESSOR_RS64A: \ 230190075Sobrien return (GET_MODE (XEXP (X, 1)) != DImode \ 230290075Sobrien ? COSTS_N_INSNS (65) \ 230390075Sobrien : COSTS_N_INSNS (67)); \ 230490075Sobrien case PROCESSOR_MPCCORE: \ 230590075Sobrien return COSTS_N_INSNS (6); \ 230690075Sobrien case PROCESSOR_PPC403: \ 230790075Sobrien return COSTS_N_INSNS (33); \ 230890075Sobrien case PROCESSOR_PPC405: \ 230990075Sobrien return COSTS_N_INSNS (35); \ 231090075Sobrien case PROCESSOR_PPC601: \ 231190075Sobrien return COSTS_N_INSNS (36); \ 231290075Sobrien case PROCESSOR_PPC603: \ 231390075Sobrien return COSTS_N_INSNS (37); \ 231490075Sobrien case PROCESSOR_PPC604: \ 231590075Sobrien case PROCESSOR_PPC604e: \ 231690075Sobrien return COSTS_N_INSNS (20); \ 231790075Sobrien case PROCESSOR_PPC620: \ 231890075Sobrien case PROCESSOR_PPC630: \ 231990075Sobrien return (GET_MODE (XEXP (X, 1)) != DImode \ 232090075Sobrien ? COSTS_N_INSNS (21) \ 232190075Sobrien : COSTS_N_INSNS (37)); \ 232290075Sobrien case PROCESSOR_PPC750: \ 232390075Sobrien case PROCESSOR_PPC7400: \ 232490075Sobrien return COSTS_N_INSNS (19); \ 232590075Sobrien case PROCESSOR_PPC7450: \ 232690075Sobrien return COSTS_N_INSNS (23); \ 232790075Sobrien } \ 232890075Sobrien case FFS: \ 232990075Sobrien return COSTS_N_INSNS (4); \ 233090075Sobrien case MEM: \ 233190075Sobrien /* MEM should be slightly more expensive than (plus (reg) (const)) */ \ 233290075Sobrien return 5; 233390075Sobrien 233490075Sobrien/* Compute the cost of an address. This is meant to approximate the size 233590075Sobrien and/or execution delay of an insn using that address. If the cost is 233690075Sobrien approximated by the RTL complexity, including CONST_COSTS above, as 233790075Sobrien is usually the case for CISC machines, this macro should not be defined. 233890075Sobrien For aggressively RISCy machines, only one insn format is allowed, so 233990075Sobrien this macro should be a constant. The value of this macro only matters 234090075Sobrien for valid addresses. 234190075Sobrien 234290075Sobrien For the RS/6000, everything is cost 0. */ 234390075Sobrien 234490075Sobrien#define ADDRESS_COST(RTX) 0 234590075Sobrien 234690075Sobrien/* Adjust the length of an INSN. LENGTH is the currently-computed length and 234790075Sobrien should be adjusted to reflect any required changes. This macro is used when 234890075Sobrien there is some systematic length adjustment required that would be difficult 234990075Sobrien to express in the length attribute. */ 235090075Sobrien 235190075Sobrien/* #define ADJUST_INSN_LENGTH(X,LENGTH) */ 235290075Sobrien 235390075Sobrien/* Add any extra modes needed to represent the condition code. 235490075Sobrien 235590075Sobrien For the RS/6000, we need separate modes when unsigned (logical) comparisons 235690075Sobrien are being done and we need a separate mode for floating-point. We also 235790075Sobrien use a mode for the case when we are comparing the results of two 235890075Sobrien comparisons, as then only the EQ bit is valid in the register. */ 235990075Sobrien 236090075Sobrien#define EXTRA_CC_MODES \ 236190075Sobrien CC(CCUNSmode, "CCUNS") \ 236290075Sobrien CC(CCFPmode, "CCFP") \ 236390075Sobrien CC(CCEQmode, "CCEQ") 236490075Sobrien 236590075Sobrien/* Given a comparison code (EQ, NE, etc.) and the first operand of a 236690075Sobrien COMPARE, return the mode to be used for the comparison. For 236790075Sobrien floating-point, CCFPmode should be used. CCUNSmode should be used 236890075Sobrien for unsigned comparisons. CCEQmode should be used when we are 236990075Sobrien doing an inequality comparison on the result of a 237090075Sobrien comparison. CCmode should be used in all other cases. */ 237190075Sobrien 237290075Sobrien#define SELECT_CC_MODE(OP,X,Y) \ 237390075Sobrien (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \ 237490075Sobrien : (OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU ? CCUNSmode \ 237590075Sobrien : (((OP) == EQ || (OP) == NE) && GET_RTX_CLASS (GET_CODE (X)) == '<' \ 237690075Sobrien ? CCEQmode : CCmode)) 237790075Sobrien 237890075Sobrien/* Define the information needed to generate branch and scc insns. This is 237990075Sobrien stored from the compare operation. Note that we can't use "rtx" here 238090075Sobrien since it hasn't been defined! */ 238190075Sobrien 238290075Sobrienextern struct rtx_def *rs6000_compare_op0, *rs6000_compare_op1; 238390075Sobrienextern int rs6000_compare_fp_p; 238490075Sobrien 238590075Sobrien/* Control the assembler format that we output. */ 238690075Sobrien 238790075Sobrien/* A C string constant describing how to begin a comment in the target 238890075Sobrien assembler language. The compiler assumes that the comment will end at 238990075Sobrien the end of the line. */ 239090075Sobrien#define ASM_COMMENT_START " #" 239190075Sobrien 239290075Sobrien/* Implicit library calls should use memcpy, not bcopy, etc. */ 239390075Sobrien 239490075Sobrien#define TARGET_MEM_FUNCTIONS 239590075Sobrien 239690075Sobrien/* Flag to say the TOC is initialized */ 239790075Sobrienextern int toc_initialized; 239890075Sobrien 239990075Sobrien/* Macro to output a special constant pool entry. Go to WIN if we output 240090075Sobrien it. Otherwise, it is written the usual way. 240190075Sobrien 240290075Sobrien On the RS/6000, toc entries are handled this way. */ 240390075Sobrien 240490075Sobrien#define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, X, MODE, ALIGN, LABELNO, WIN) \ 240590075Sobrien{ if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X, MODE)) \ 240690075Sobrien { \ 240790075Sobrien output_toc (FILE, X, LABELNO, MODE); \ 240890075Sobrien goto WIN; \ 240990075Sobrien } \ 241090075Sobrien} 241190075Sobrien 241290075Sobrien#ifdef HAVE_GAS_WEAK 241390075Sobrien#define RS6000_WEAK 1 241490075Sobrien#else 241590075Sobrien#define RS6000_WEAK 0 241690075Sobrien#endif 241790075Sobrien 241890075Sobrien/* This implementes the `alias' attribute. */ 241990075Sobrien#define ASM_OUTPUT_DEF_FROM_DECLS(FILE,decl,target) \ 242090075Sobriendo { \ 242190075Sobrien const char * alias = XSTR (XEXP (DECL_RTL (decl), 0), 0); \ 242290075Sobrien char * name = IDENTIFIER_POINTER (target); \ 242390075Sobrien if (TREE_CODE (decl) == FUNCTION_DECL \ 242490075Sobrien && DEFAULT_ABI == ABI_AIX) \ 242590075Sobrien { \ 242690075Sobrien if (TREE_PUBLIC (decl)) \ 242790075Sobrien { \ 242890075Sobrien if (RS6000_WEAK && DECL_WEAK (decl)) \ 242990075Sobrien { \ 243090075Sobrien fputs ("\t.weak .", FILE); \ 243190075Sobrien assemble_name (FILE, alias); \ 243290075Sobrien putc ('\n', FILE); \ 243390075Sobrien } \ 243490075Sobrien else \ 243590075Sobrien { \ 243690075Sobrien fputs ("\t.globl .", FILE); \ 243790075Sobrien assemble_name (FILE, alias); \ 243890075Sobrien putc ('\n', FILE); \ 243990075Sobrien } \ 244090075Sobrien } \ 244190075Sobrien else \ 244290075Sobrien { \ 244390075Sobrien fputs ("\t.lglobl .", FILE); \ 244490075Sobrien assemble_name (FILE, alias); \ 244590075Sobrien putc ('\n', FILE); \ 244690075Sobrien } \ 244790075Sobrien fputs ("\t.set .", FILE); \ 244890075Sobrien assemble_name (FILE, alias); \ 244990075Sobrien fputs (",.", FILE); \ 245090075Sobrien assemble_name (FILE, name); \ 245190075Sobrien fputc ('\n', FILE); \ 245290075Sobrien } \ 245390075Sobrien ASM_OUTPUT_DEF (FILE, alias, name); \ 245490075Sobrien} while (0) 245590075Sobrien 245690075Sobrien/* Output to assembler file text saying following lines 245790075Sobrien may contain character constants, extra white space, comments, etc. */ 245890075Sobrien 245990075Sobrien#define ASM_APP_ON "" 246090075Sobrien 246190075Sobrien/* Output to assembler file text saying following lines 246290075Sobrien no longer contain unusual constructs. */ 246390075Sobrien 246490075Sobrien#define ASM_APP_OFF "" 246590075Sobrien 246690075Sobrien/* How to refer to registers in assembler output. 246790075Sobrien This sequence is indexed by compiler's hard-register-number (see above). */ 246890075Sobrien 246990075Sobrienextern char rs6000_reg_names[][8]; /* register names (0 vs. %r0). */ 247090075Sobrien 247190075Sobrien#define REGISTER_NAMES \ 247290075Sobrien{ \ 247390075Sobrien &rs6000_reg_names[ 0][0], /* r0 */ \ 247490075Sobrien &rs6000_reg_names[ 1][0], /* r1 */ \ 247590075Sobrien &rs6000_reg_names[ 2][0], /* r2 */ \ 247690075Sobrien &rs6000_reg_names[ 3][0], /* r3 */ \ 247790075Sobrien &rs6000_reg_names[ 4][0], /* r4 */ \ 247890075Sobrien &rs6000_reg_names[ 5][0], /* r5 */ \ 247990075Sobrien &rs6000_reg_names[ 6][0], /* r6 */ \ 248090075Sobrien &rs6000_reg_names[ 7][0], /* r7 */ \ 248190075Sobrien &rs6000_reg_names[ 8][0], /* r8 */ \ 248290075Sobrien &rs6000_reg_names[ 9][0], /* r9 */ \ 248390075Sobrien &rs6000_reg_names[10][0], /* r10 */ \ 248490075Sobrien &rs6000_reg_names[11][0], /* r11 */ \ 248590075Sobrien &rs6000_reg_names[12][0], /* r12 */ \ 248690075Sobrien &rs6000_reg_names[13][0], /* r13 */ \ 248790075Sobrien &rs6000_reg_names[14][0], /* r14 */ \ 248890075Sobrien &rs6000_reg_names[15][0], /* r15 */ \ 248990075Sobrien &rs6000_reg_names[16][0], /* r16 */ \ 249090075Sobrien &rs6000_reg_names[17][0], /* r17 */ \ 249190075Sobrien &rs6000_reg_names[18][0], /* r18 */ \ 249290075Sobrien &rs6000_reg_names[19][0], /* r19 */ \ 249390075Sobrien &rs6000_reg_names[20][0], /* r20 */ \ 249490075Sobrien &rs6000_reg_names[21][0], /* r21 */ \ 249590075Sobrien &rs6000_reg_names[22][0], /* r22 */ \ 249690075Sobrien &rs6000_reg_names[23][0], /* r23 */ \ 249790075Sobrien &rs6000_reg_names[24][0], /* r24 */ \ 249890075Sobrien &rs6000_reg_names[25][0], /* r25 */ \ 249990075Sobrien &rs6000_reg_names[26][0], /* r26 */ \ 250090075Sobrien &rs6000_reg_names[27][0], /* r27 */ \ 250190075Sobrien &rs6000_reg_names[28][0], /* r28 */ \ 250290075Sobrien &rs6000_reg_names[29][0], /* r29 */ \ 250390075Sobrien &rs6000_reg_names[30][0], /* r30 */ \ 250490075Sobrien &rs6000_reg_names[31][0], /* r31 */ \ 250590075Sobrien \ 250690075Sobrien &rs6000_reg_names[32][0], /* fr0 */ \ 250790075Sobrien &rs6000_reg_names[33][0], /* fr1 */ \ 250890075Sobrien &rs6000_reg_names[34][0], /* fr2 */ \ 250990075Sobrien &rs6000_reg_names[35][0], /* fr3 */ \ 251090075Sobrien &rs6000_reg_names[36][0], /* fr4 */ \ 251190075Sobrien &rs6000_reg_names[37][0], /* fr5 */ \ 251290075Sobrien &rs6000_reg_names[38][0], /* fr6 */ \ 251390075Sobrien &rs6000_reg_names[39][0], /* fr7 */ \ 251490075Sobrien &rs6000_reg_names[40][0], /* fr8 */ \ 251590075Sobrien &rs6000_reg_names[41][0], /* fr9 */ \ 251690075Sobrien &rs6000_reg_names[42][0], /* fr10 */ \ 251790075Sobrien &rs6000_reg_names[43][0], /* fr11 */ \ 251890075Sobrien &rs6000_reg_names[44][0], /* fr12 */ \ 251990075Sobrien &rs6000_reg_names[45][0], /* fr13 */ \ 252090075Sobrien &rs6000_reg_names[46][0], /* fr14 */ \ 252190075Sobrien &rs6000_reg_names[47][0], /* fr15 */ \ 252290075Sobrien &rs6000_reg_names[48][0], /* fr16 */ \ 252390075Sobrien &rs6000_reg_names[49][0], /* fr17 */ \ 252490075Sobrien &rs6000_reg_names[50][0], /* fr18 */ \ 252590075Sobrien &rs6000_reg_names[51][0], /* fr19 */ \ 252690075Sobrien &rs6000_reg_names[52][0], /* fr20 */ \ 252790075Sobrien &rs6000_reg_names[53][0], /* fr21 */ \ 252890075Sobrien &rs6000_reg_names[54][0], /* fr22 */ \ 252990075Sobrien &rs6000_reg_names[55][0], /* fr23 */ \ 253090075Sobrien &rs6000_reg_names[56][0], /* fr24 */ \ 253190075Sobrien &rs6000_reg_names[57][0], /* fr25 */ \ 253290075Sobrien &rs6000_reg_names[58][0], /* fr26 */ \ 253390075Sobrien &rs6000_reg_names[59][0], /* fr27 */ \ 253490075Sobrien &rs6000_reg_names[60][0], /* fr28 */ \ 253590075Sobrien &rs6000_reg_names[61][0], /* fr29 */ \ 253690075Sobrien &rs6000_reg_names[62][0], /* fr30 */ \ 253790075Sobrien &rs6000_reg_names[63][0], /* fr31 */ \ 253890075Sobrien \ 253990075Sobrien &rs6000_reg_names[64][0], /* mq */ \ 254090075Sobrien &rs6000_reg_names[65][0], /* lr */ \ 254190075Sobrien &rs6000_reg_names[66][0], /* ctr */ \ 254290075Sobrien &rs6000_reg_names[67][0], /* ap */ \ 254390075Sobrien \ 254490075Sobrien &rs6000_reg_names[68][0], /* cr0 */ \ 254590075Sobrien &rs6000_reg_names[69][0], /* cr1 */ \ 254690075Sobrien &rs6000_reg_names[70][0], /* cr2 */ \ 254790075Sobrien &rs6000_reg_names[71][0], /* cr3 */ \ 254890075Sobrien &rs6000_reg_names[72][0], /* cr4 */ \ 254990075Sobrien &rs6000_reg_names[73][0], /* cr5 */ \ 255090075Sobrien &rs6000_reg_names[74][0], /* cr6 */ \ 255190075Sobrien &rs6000_reg_names[75][0], /* cr7 */ \ 255290075Sobrien \ 255390075Sobrien &rs6000_reg_names[76][0], /* xer */ \ 255490075Sobrien \ 255590075Sobrien &rs6000_reg_names[77][0], /* v0 */ \ 255690075Sobrien &rs6000_reg_names[78][0], /* v1 */ \ 255790075Sobrien &rs6000_reg_names[79][0], /* v2 */ \ 255890075Sobrien &rs6000_reg_names[80][0], /* v3 */ \ 255990075Sobrien &rs6000_reg_names[81][0], /* v4 */ \ 256090075Sobrien &rs6000_reg_names[82][0], /* v5 */ \ 256190075Sobrien &rs6000_reg_names[83][0], /* v6 */ \ 256290075Sobrien &rs6000_reg_names[84][0], /* v7 */ \ 256390075Sobrien &rs6000_reg_names[85][0], /* v8 */ \ 256490075Sobrien &rs6000_reg_names[86][0], /* v9 */ \ 256590075Sobrien &rs6000_reg_names[87][0], /* v10 */ \ 256690075Sobrien &rs6000_reg_names[88][0], /* v11 */ \ 256790075Sobrien &rs6000_reg_names[89][0], /* v12 */ \ 256890075Sobrien &rs6000_reg_names[90][0], /* v13 */ \ 256990075Sobrien &rs6000_reg_names[91][0], /* v14 */ \ 257090075Sobrien &rs6000_reg_names[92][0], /* v15 */ \ 257190075Sobrien &rs6000_reg_names[93][0], /* v16 */ \ 257290075Sobrien &rs6000_reg_names[94][0], /* v17 */ \ 257390075Sobrien &rs6000_reg_names[95][0], /* v18 */ \ 257490075Sobrien &rs6000_reg_names[96][0], /* v19 */ \ 257590075Sobrien &rs6000_reg_names[97][0], /* v20 */ \ 257690075Sobrien &rs6000_reg_names[98][0], /* v21 */ \ 257790075Sobrien &rs6000_reg_names[99][0], /* v22 */ \ 257890075Sobrien &rs6000_reg_names[100][0], /* v23 */ \ 257990075Sobrien &rs6000_reg_names[101][0], /* v24 */ \ 258090075Sobrien &rs6000_reg_names[102][0], /* v25 */ \ 258190075Sobrien &rs6000_reg_names[103][0], /* v26 */ \ 258290075Sobrien &rs6000_reg_names[104][0], /* v27 */ \ 258390075Sobrien &rs6000_reg_names[105][0], /* v28 */ \ 258490075Sobrien &rs6000_reg_names[106][0], /* v29 */ \ 258590075Sobrien &rs6000_reg_names[107][0], /* v30 */ \ 258690075Sobrien &rs6000_reg_names[108][0], /* v31 */ \ 258790075Sobrien &rs6000_reg_names[109][0], /* vrsave */ \ 258890075Sobrien} 258990075Sobrien 259090075Sobrien/* print-rtl can't handle the above REGISTER_NAMES, so define the 259190075Sobrien following for it. Switch to use the alternate names since 259290075Sobrien they are more mnemonic. */ 259390075Sobrien 259490075Sobrien#define DEBUG_REGISTER_NAMES \ 259590075Sobrien{ \ 259690075Sobrien "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ 259790075Sobrien "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ 259890075Sobrien "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \ 259990075Sobrien "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \ 260090075Sobrien "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ 260190075Sobrien "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \ 260290075Sobrien "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \ 260390075Sobrien "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \ 260490075Sobrien "mq", "lr", "ctr", "ap", \ 260590075Sobrien "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", \ 260690075Sobrien "xer", \ 260790075Sobrien "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", \ 260890075Sobrien "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", \ 260990075Sobrien "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", \ 261090075Sobrien "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", \ 261190075Sobrien "vrsave" \ 261290075Sobrien} 261390075Sobrien 261490075Sobrien/* Table of additional register names to use in user input. */ 261590075Sobrien 261690075Sobrien#define ADDITIONAL_REGISTER_NAMES \ 261790075Sobrien {{"r0", 0}, {"r1", 1}, {"r2", 2}, {"r3", 3}, \ 261890075Sobrien {"r4", 4}, {"r5", 5}, {"r6", 6}, {"r7", 7}, \ 261990075Sobrien {"r8", 8}, {"r9", 9}, {"r10", 10}, {"r11", 11}, \ 262090075Sobrien {"r12", 12}, {"r13", 13}, {"r14", 14}, {"r15", 15}, \ 262190075Sobrien {"r16", 16}, {"r17", 17}, {"r18", 18}, {"r19", 19}, \ 262290075Sobrien {"r20", 20}, {"r21", 21}, {"r22", 22}, {"r23", 23}, \ 262390075Sobrien {"r24", 24}, {"r25", 25}, {"r26", 26}, {"r27", 27}, \ 262490075Sobrien {"r28", 28}, {"r29", 29}, {"r30", 30}, {"r31", 31}, \ 262590075Sobrien {"fr0", 32}, {"fr1", 33}, {"fr2", 34}, {"fr3", 35}, \ 262690075Sobrien {"fr4", 36}, {"fr5", 37}, {"fr6", 38}, {"fr7", 39}, \ 262790075Sobrien {"fr8", 40}, {"fr9", 41}, {"fr10", 42}, {"fr11", 43}, \ 262890075Sobrien {"fr12", 44}, {"fr13", 45}, {"fr14", 46}, {"fr15", 47}, \ 262990075Sobrien {"fr16", 48}, {"fr17", 49}, {"fr18", 50}, {"fr19", 51}, \ 263090075Sobrien {"fr20", 52}, {"fr21", 53}, {"fr22", 54}, {"fr23", 55}, \ 263190075Sobrien {"fr24", 56}, {"fr25", 57}, {"fr26", 58}, {"fr27", 59}, \ 263290075Sobrien {"fr28", 60}, {"fr29", 61}, {"fr30", 62}, {"fr31", 63}, \ 263390075Sobrien {"v0", 77}, {"v1", 78}, {"v2", 79}, {"v3", 80}, \ 263490075Sobrien {"v4", 81}, {"v5", 82}, {"v6", 83}, {"v7", 84}, \ 263590075Sobrien {"v8", 85}, {"v9", 86}, {"v10", 87}, {"v11", 88}, \ 263690075Sobrien {"v12", 89}, {"v13", 90}, {"v14", 91}, {"v15", 92}, \ 263790075Sobrien {"v16", 93}, {"v17", 94}, {"v18", 95}, {"v19", 96}, \ 263890075Sobrien {"v20", 97}, {"v21", 98}, {"v22", 99}, {"v23", 100}, \ 263990075Sobrien {"v24", 101},{"v25", 102},{"v26", 103},{"v27", 104}, \ 264090075Sobrien {"v28", 105},{"v29", 106},{"v30", 107},{"v31", 108}, \ 264190075Sobrien {"vrsave", 109}, \ 264290075Sobrien /* no additional names for: mq, lr, ctr, ap */ \ 264390075Sobrien {"cr0", 68}, {"cr1", 69}, {"cr2", 70}, {"cr3", 71}, \ 264490075Sobrien {"cr4", 72}, {"cr5", 73}, {"cr6", 74}, {"cr7", 75}, \ 264590075Sobrien {"cc", 68}, {"sp", 1}, {"toc", 2} } 264690075Sobrien 264790075Sobrien/* Text to write out after a CALL that may be replaced by glue code by 264890075Sobrien the loader. This depends on the AIX version. */ 264990075Sobrien#define RS6000_CALL_GLUE "cror 31,31,31" 265090075Sobrien 265190075Sobrien/* This is how to output an element of a case-vector that is relative. */ 265290075Sobrien 265390075Sobrien#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 265490075Sobrien do { char buf[100]; \ 265590075Sobrien fputs ("\t.long ", FILE); \ 265690075Sobrien ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \ 265790075Sobrien assemble_name (FILE, buf); \ 265890075Sobrien putc ('-', FILE); \ 265990075Sobrien ASM_GENERATE_INTERNAL_LABEL (buf, "L", REL); \ 266090075Sobrien assemble_name (FILE, buf); \ 266190075Sobrien putc ('\n', FILE); \ 266290075Sobrien } while (0) 266390075Sobrien 266490075Sobrien/* This is how to output an assembler line 266590075Sobrien that says to advance the location counter 266690075Sobrien to a multiple of 2**LOG bytes. */ 266790075Sobrien 266890075Sobrien#define ASM_OUTPUT_ALIGN(FILE,LOG) \ 266990075Sobrien if ((LOG) != 0) \ 267090075Sobrien fprintf (FILE, "\t.align %d\n", (LOG)) 267190075Sobrien 267290075Sobrien/* Store in OUTPUT a string (made with alloca) containing 267390075Sobrien an assembler-name for a local static variable named NAME. 267490075Sobrien LABELNO is an integer which is different for each call. */ 267590075Sobrien 267690075Sobrien#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 267790075Sobrien( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 267890075Sobrien sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 267990075Sobrien 268090075Sobrien/* Pick up the return address upon entry to a procedure. Used for 268190075Sobrien dwarf2 unwind information. This also enables the table driven 268290075Sobrien mechanism. */ 268390075Sobrien 268490075Sobrien#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM) 268590075Sobrien#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_REGISTER_REGNUM) 268690075Sobrien 268790075Sobrien/* Describe how we implement __builtin_eh_return. */ 268890075Sobrien#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 3 : INVALID_REGNUM) 268990075Sobrien#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 10) 269090075Sobrien 269190075Sobrien/* Print operand X (an rtx) in assembler syntax to file FILE. 269290075Sobrien CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 269390075Sobrien For `%' followed by punctuation, CODE is the punctuation and X is null. */ 269490075Sobrien 269590075Sobrien#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) 269690075Sobrien 269790075Sobrien/* Define which CODE values are valid. */ 269890075Sobrien 269990075Sobrien#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 270090075Sobrien ((CODE) == '.') 270190075Sobrien 270290075Sobrien/* Print a memory address as an operand to reference that memory location. */ 270390075Sobrien 270490075Sobrien#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) 270590075Sobrien 270690075Sobrien/* Define the codes that are matched by predicates in rs6000.c. */ 270790075Sobrien 270890075Sobrien#define PREDICATE_CODES \ 270990075Sobrien {"short_cint_operand", {CONST_INT}}, \ 271090075Sobrien {"u_short_cint_operand", {CONST_INT}}, \ 271190075Sobrien {"non_short_cint_operand", {CONST_INT}}, \ 271290075Sobrien {"exact_log2_cint_operand", {CONST_INT}}, \ 271390075Sobrien {"gpc_reg_operand", {SUBREG, REG}}, \ 271490075Sobrien {"cc_reg_operand", {SUBREG, REG}}, \ 271590075Sobrien {"cc_reg_not_cr0_operand", {SUBREG, REG}}, \ 271690075Sobrien {"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \ 271790075Sobrien {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \ 271890075Sobrien {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \ 271990075Sobrien {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ 272090075Sobrien {"reg_or_arith_cint_operand", {SUBREG, REG, CONST_INT}}, \ 272190075Sobrien {"reg_or_add_cint64_operand", {SUBREG, REG, CONST_INT}}, \ 272290075Sobrien {"reg_or_sub_cint64_operand", {SUBREG, REG, CONST_INT}}, \ 272390075Sobrien {"reg_or_logical_cint_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \ 272490075Sobrien {"got_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \ 272590075Sobrien {"got_no_const_operand", {SYMBOL_REF, LABEL_REF}}, \ 272690075Sobrien {"easy_fp_constant", {CONST_DOUBLE}}, \ 272790075Sobrien {"zero_fp_constant", {CONST_DOUBLE}}, \ 272890075Sobrien {"reg_or_mem_operand", {SUBREG, MEM, REG}}, \ 272990075Sobrien {"lwa_operand", {SUBREG, MEM, REG}}, \ 273090075Sobrien {"volatile_mem_operand", {MEM}}, \ 273190075Sobrien {"offsettable_mem_operand", {MEM}}, \ 273290075Sobrien {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \ 273390075Sobrien {"add_operand", {SUBREG, REG, CONST_INT}}, \ 273490075Sobrien {"non_add_cint_operand", {CONST_INT}}, \ 273590075Sobrien {"and_operand", {SUBREG, REG, CONST_INT}}, \ 273690075Sobrien {"and64_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \ 273790075Sobrien {"logical_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \ 273890075Sobrien {"non_logical_cint_operand", {CONST_INT, CONST_DOUBLE}}, \ 273990075Sobrien {"mask_operand", {CONST_INT}}, \ 274090075Sobrien {"mask64_operand", {CONST_INT, CONST_DOUBLE}}, \ 274190075Sobrien {"count_register_operand", {REG}}, \ 274290075Sobrien {"xer_operand", {REG}}, \ 274390075Sobrien {"call_operand", {SYMBOL_REF, REG}}, \ 274490075Sobrien {"current_file_function_operand", {SYMBOL_REF}}, \ 274590075Sobrien {"input_operand", {SUBREG, MEM, REG, CONST_INT, \ 274690075Sobrien CONST_DOUBLE, SYMBOL_REF}}, \ 274790075Sobrien {"load_multiple_operation", {PARALLEL}}, \ 274890075Sobrien {"store_multiple_operation", {PARALLEL}}, \ 274990075Sobrien {"vrsave_operation", {PARALLEL}}, \ 275090075Sobrien {"branch_comparison_operator", {EQ, NE, LE, LT, GE, \ 275190075Sobrien GT, LEU, LTU, GEU, GTU, \ 275290075Sobrien UNORDERED, ORDERED, \ 275390075Sobrien UNGE, UNLE }}, \ 275490075Sobrien {"branch_positive_comparison_operator", {EQ, LT, GT, LTU, GTU, \ 275590075Sobrien UNORDERED }}, \ 275690075Sobrien {"scc_comparison_operator", {EQ, NE, LE, LT, GE, \ 275790075Sobrien GT, LEU, LTU, GEU, GTU, \ 275890075Sobrien UNORDERED, ORDERED, \ 275990075Sobrien UNGE, UNLE }}, \ 276090075Sobrien {"trap_comparison_operator", {EQ, NE, LE, LT, GE, \ 276190075Sobrien GT, LEU, LTU, GEU, GTU}}, \ 276290075Sobrien {"boolean_operator", {AND, IOR, XOR}}, \ 276390075Sobrien {"boolean_or_operator", {IOR, XOR}}, \ 276490075Sobrien {"min_max_operator", {SMIN, SMAX, UMIN, UMAX}}, 276590075Sobrien 276690075Sobrien/* uncomment for disabling the corresponding default options */ 276790075Sobrien/* #define MACHINE_no_sched_interblock */ 276890075Sobrien/* #define MACHINE_no_sched_speculative */ 276990075Sobrien/* #define MACHINE_no_sched_speculative_load */ 277090075Sobrien 277190075Sobrien/* General flags. */ 277290075Sobrienextern int flag_pic; 277390075Sobrienextern int optimize; 277490075Sobrienextern int flag_expensive_optimizations; 277590075Sobrienextern int frame_pointer_needed; 277690075Sobrien 277790075Sobrienenum rs6000_builtins 277890075Sobrien{ 277990075Sobrien /* AltiVec builtins. */ 278090075Sobrien ALTIVEC_BUILTIN_ST_INTERNAL_4si, 278190075Sobrien ALTIVEC_BUILTIN_LD_INTERNAL_4si, 278290075Sobrien ALTIVEC_BUILTIN_ST_INTERNAL_8hi, 278390075Sobrien ALTIVEC_BUILTIN_LD_INTERNAL_8hi, 278490075Sobrien ALTIVEC_BUILTIN_ST_INTERNAL_16qi, 278590075Sobrien ALTIVEC_BUILTIN_LD_INTERNAL_16qi, 278690075Sobrien ALTIVEC_BUILTIN_ST_INTERNAL_4sf, 278790075Sobrien ALTIVEC_BUILTIN_LD_INTERNAL_4sf, 278890075Sobrien ALTIVEC_BUILTIN_VADDUBM, 278990075Sobrien ALTIVEC_BUILTIN_VADDUHM, 279090075Sobrien ALTIVEC_BUILTIN_VADDUWM, 279190075Sobrien ALTIVEC_BUILTIN_VADDFP, 279290075Sobrien ALTIVEC_BUILTIN_VADDCUW, 279390075Sobrien ALTIVEC_BUILTIN_VADDUBS, 279490075Sobrien ALTIVEC_BUILTIN_VADDSBS, 279590075Sobrien ALTIVEC_BUILTIN_VADDUHS, 279690075Sobrien ALTIVEC_BUILTIN_VADDSHS, 279790075Sobrien ALTIVEC_BUILTIN_VADDUWS, 279890075Sobrien ALTIVEC_BUILTIN_VADDSWS, 279990075Sobrien ALTIVEC_BUILTIN_VAND, 280090075Sobrien ALTIVEC_BUILTIN_VANDC, 280190075Sobrien ALTIVEC_BUILTIN_VAVGUB, 280290075Sobrien ALTIVEC_BUILTIN_VAVGSB, 280390075Sobrien ALTIVEC_BUILTIN_VAVGUH, 280490075Sobrien ALTIVEC_BUILTIN_VAVGSH, 280590075Sobrien ALTIVEC_BUILTIN_VAVGUW, 280690075Sobrien ALTIVEC_BUILTIN_VAVGSW, 280790075Sobrien ALTIVEC_BUILTIN_VCFUX, 280890075Sobrien ALTIVEC_BUILTIN_VCFSX, 280990075Sobrien ALTIVEC_BUILTIN_VCTSXS, 281090075Sobrien ALTIVEC_BUILTIN_VCTUXS, 281190075Sobrien ALTIVEC_BUILTIN_VCMPBFP, 281290075Sobrien ALTIVEC_BUILTIN_VCMPEQUB, 281390075Sobrien ALTIVEC_BUILTIN_VCMPEQUH, 281490075Sobrien ALTIVEC_BUILTIN_VCMPEQUW, 281590075Sobrien ALTIVEC_BUILTIN_VCMPEQFP, 281690075Sobrien ALTIVEC_BUILTIN_VCMPGEFP, 281790075Sobrien ALTIVEC_BUILTIN_VCMPGTUB, 281890075Sobrien ALTIVEC_BUILTIN_VCMPGTSB, 281990075Sobrien ALTIVEC_BUILTIN_VCMPGTUH, 282090075Sobrien ALTIVEC_BUILTIN_VCMPGTSH, 282190075Sobrien ALTIVEC_BUILTIN_VCMPGTUW, 282290075Sobrien ALTIVEC_BUILTIN_VCMPGTSW, 282390075Sobrien ALTIVEC_BUILTIN_VCMPGTFP, 282490075Sobrien ALTIVEC_BUILTIN_VEXPTEFP, 282590075Sobrien ALTIVEC_BUILTIN_VLOGEFP, 282690075Sobrien ALTIVEC_BUILTIN_VMADDFP, 282790075Sobrien ALTIVEC_BUILTIN_VMAXUB, 282890075Sobrien ALTIVEC_BUILTIN_VMAXSB, 282990075Sobrien ALTIVEC_BUILTIN_VMAXUH, 283090075Sobrien ALTIVEC_BUILTIN_VMAXSH, 283190075Sobrien ALTIVEC_BUILTIN_VMAXUW, 283290075Sobrien ALTIVEC_BUILTIN_VMAXSW, 283390075Sobrien ALTIVEC_BUILTIN_VMAXFP, 283490075Sobrien ALTIVEC_BUILTIN_VMHADDSHS, 283590075Sobrien ALTIVEC_BUILTIN_VMHRADDSHS, 283690075Sobrien ALTIVEC_BUILTIN_VMLADDUHM, 283790075Sobrien ALTIVEC_BUILTIN_VMRGHB, 283890075Sobrien ALTIVEC_BUILTIN_VMRGHH, 283990075Sobrien ALTIVEC_BUILTIN_VMRGHW, 284090075Sobrien ALTIVEC_BUILTIN_VMRGLB, 284190075Sobrien ALTIVEC_BUILTIN_VMRGLH, 284290075Sobrien ALTIVEC_BUILTIN_VMRGLW, 284390075Sobrien ALTIVEC_BUILTIN_VMSUMUBM, 284490075Sobrien ALTIVEC_BUILTIN_VMSUMMBM, 284590075Sobrien ALTIVEC_BUILTIN_VMSUMUHM, 284690075Sobrien ALTIVEC_BUILTIN_VMSUMSHM, 284790075Sobrien ALTIVEC_BUILTIN_VMSUMUHS, 284890075Sobrien ALTIVEC_BUILTIN_VMSUMSHS, 284990075Sobrien ALTIVEC_BUILTIN_VMINUB, 285090075Sobrien ALTIVEC_BUILTIN_VMINSB, 285190075Sobrien ALTIVEC_BUILTIN_VMINUH, 285290075Sobrien ALTIVEC_BUILTIN_VMINSH, 285390075Sobrien ALTIVEC_BUILTIN_VMINUW, 285490075Sobrien ALTIVEC_BUILTIN_VMINSW, 285590075Sobrien ALTIVEC_BUILTIN_VMINFP, 285690075Sobrien ALTIVEC_BUILTIN_VMULEUB, 285790075Sobrien ALTIVEC_BUILTIN_VMULESB, 285890075Sobrien ALTIVEC_BUILTIN_VMULEUH, 285990075Sobrien ALTIVEC_BUILTIN_VMULESH, 286090075Sobrien ALTIVEC_BUILTIN_VMULOUB, 286190075Sobrien ALTIVEC_BUILTIN_VMULOSB, 286290075Sobrien ALTIVEC_BUILTIN_VMULOUH, 286390075Sobrien ALTIVEC_BUILTIN_VMULOSH, 286490075Sobrien ALTIVEC_BUILTIN_VNMSUBFP, 286590075Sobrien ALTIVEC_BUILTIN_VNOR, 286690075Sobrien ALTIVEC_BUILTIN_VOR, 286790075Sobrien ALTIVEC_BUILTIN_VSEL_4SI, 286890075Sobrien ALTIVEC_BUILTIN_VSEL_4SF, 286990075Sobrien ALTIVEC_BUILTIN_VSEL_8HI, 287090075Sobrien ALTIVEC_BUILTIN_VSEL_16QI, 287190075Sobrien ALTIVEC_BUILTIN_VPERM_4SI, 287290075Sobrien ALTIVEC_BUILTIN_VPERM_4SF, 287390075Sobrien ALTIVEC_BUILTIN_VPERM_8HI, 287490075Sobrien ALTIVEC_BUILTIN_VPERM_16QI, 287590075Sobrien ALTIVEC_BUILTIN_VPKUHUM, 287690075Sobrien ALTIVEC_BUILTIN_VPKUWUM, 287790075Sobrien ALTIVEC_BUILTIN_VPKPX, 287890075Sobrien ALTIVEC_BUILTIN_VPKUHSS, 287990075Sobrien ALTIVEC_BUILTIN_VPKSHSS, 288090075Sobrien ALTIVEC_BUILTIN_VPKUWSS, 288190075Sobrien ALTIVEC_BUILTIN_VPKSWSS, 288290075Sobrien ALTIVEC_BUILTIN_VPKUHUS, 288390075Sobrien ALTIVEC_BUILTIN_VPKSHUS, 288490075Sobrien ALTIVEC_BUILTIN_VPKUWUS, 288590075Sobrien ALTIVEC_BUILTIN_VPKSWUS, 288690075Sobrien ALTIVEC_BUILTIN_VREFP, 288790075Sobrien ALTIVEC_BUILTIN_VRFIM, 288890075Sobrien ALTIVEC_BUILTIN_VRFIN, 288990075Sobrien ALTIVEC_BUILTIN_VRFIP, 289090075Sobrien ALTIVEC_BUILTIN_VRFIZ, 289190075Sobrien ALTIVEC_BUILTIN_VRLB, 289290075Sobrien ALTIVEC_BUILTIN_VRLH, 289390075Sobrien ALTIVEC_BUILTIN_VRLW, 289490075Sobrien ALTIVEC_BUILTIN_VRSQRTEFP, 289590075Sobrien ALTIVEC_BUILTIN_VSLB, 289690075Sobrien ALTIVEC_BUILTIN_VSLH, 289790075Sobrien ALTIVEC_BUILTIN_VSLW, 289890075Sobrien ALTIVEC_BUILTIN_VSL, 289990075Sobrien ALTIVEC_BUILTIN_VSLO, 290090075Sobrien ALTIVEC_BUILTIN_VSPLTB, 290190075Sobrien ALTIVEC_BUILTIN_VSPLTH, 290290075Sobrien ALTIVEC_BUILTIN_VSPLTW, 290390075Sobrien ALTIVEC_BUILTIN_VSPLTISB, 290490075Sobrien ALTIVEC_BUILTIN_VSPLTISH, 290590075Sobrien ALTIVEC_BUILTIN_VSPLTISW, 290690075Sobrien ALTIVEC_BUILTIN_VSRB, 290790075Sobrien ALTIVEC_BUILTIN_VSRH, 290890075Sobrien ALTIVEC_BUILTIN_VSRW, 290990075Sobrien ALTIVEC_BUILTIN_VSRAB, 291090075Sobrien ALTIVEC_BUILTIN_VSRAH, 291190075Sobrien ALTIVEC_BUILTIN_VSRAW, 291290075Sobrien ALTIVEC_BUILTIN_VSR, 291390075Sobrien ALTIVEC_BUILTIN_VSRO, 291490075Sobrien ALTIVEC_BUILTIN_VSUBUBM, 291590075Sobrien ALTIVEC_BUILTIN_VSUBUHM, 291690075Sobrien ALTIVEC_BUILTIN_VSUBUWM, 291790075Sobrien ALTIVEC_BUILTIN_VSUBFP, 291890075Sobrien ALTIVEC_BUILTIN_VSUBCUW, 291990075Sobrien ALTIVEC_BUILTIN_VSUBUBS, 292090075Sobrien ALTIVEC_BUILTIN_VSUBSBS, 292190075Sobrien ALTIVEC_BUILTIN_VSUBUHS, 292290075Sobrien ALTIVEC_BUILTIN_VSUBSHS, 292390075Sobrien ALTIVEC_BUILTIN_VSUBUWS, 292490075Sobrien ALTIVEC_BUILTIN_VSUBSWS, 292590075Sobrien ALTIVEC_BUILTIN_VSUM4UBS, 292690075Sobrien ALTIVEC_BUILTIN_VSUM4SBS, 292790075Sobrien ALTIVEC_BUILTIN_VSUM4SHS, 292890075Sobrien ALTIVEC_BUILTIN_VSUM2SWS, 292990075Sobrien ALTIVEC_BUILTIN_VSUMSWS, 293090075Sobrien ALTIVEC_BUILTIN_VXOR, 293190075Sobrien ALTIVEC_BUILTIN_VSLDOI_16QI, 293290075Sobrien ALTIVEC_BUILTIN_VSLDOI_8HI, 293390075Sobrien ALTIVEC_BUILTIN_VSLDOI_4SI, 293490075Sobrien ALTIVEC_BUILTIN_VSLDOI_4SF, 293590075Sobrien ALTIVEC_BUILTIN_VUPKHSB, 293690075Sobrien ALTIVEC_BUILTIN_VUPKHPX, 293790075Sobrien ALTIVEC_BUILTIN_VUPKHSH, 293890075Sobrien ALTIVEC_BUILTIN_VUPKLSB, 293990075Sobrien ALTIVEC_BUILTIN_VUPKLPX, 294090075Sobrien ALTIVEC_BUILTIN_VUPKLSH, 294190075Sobrien ALTIVEC_BUILTIN_VCMPBFP_P, 294290075Sobrien ALTIVEC_BUILTIN_VCMPEQFP_P, 294390075Sobrien ALTIVEC_BUILTIN_VCMPEQUB_P, 294490075Sobrien ALTIVEC_BUILTIN_VCMPEQUH_P, 294590075Sobrien ALTIVEC_BUILTIN_VCMPEQUW_P, 294690075Sobrien ALTIVEC_BUILTIN_VCMPGEFP_P, 294790075Sobrien ALTIVEC_BUILTIN_VCMPGTFP_P, 294890075Sobrien ALTIVEC_BUILTIN_VCMPGTSB_P, 294990075Sobrien ALTIVEC_BUILTIN_VCMPGTSH_P, 295090075Sobrien ALTIVEC_BUILTIN_VCMPGTSW_P, 295190075Sobrien ALTIVEC_BUILTIN_VCMPGTUB_P, 295290075Sobrien ALTIVEC_BUILTIN_VCMPGTUH_P, 295390075Sobrien ALTIVEC_BUILTIN_VCMPGTUW_P, 295490075Sobrien ALTIVEC_BUILTIN_MTVSCR, 295590075Sobrien ALTIVEC_BUILTIN_MFVSCR, 295690075Sobrien ALTIVEC_BUILTIN_DSSALL, 295790075Sobrien ALTIVEC_BUILTIN_DSS, 295890075Sobrien ALTIVEC_BUILTIN_LVSL, 295990075Sobrien ALTIVEC_BUILTIN_LVSR, 296090075Sobrien ALTIVEC_BUILTIN_DSTT, 296190075Sobrien ALTIVEC_BUILTIN_DSTST, 296290075Sobrien ALTIVEC_BUILTIN_DSTSTT, 296390075Sobrien ALTIVEC_BUILTIN_DST, 296490075Sobrien ALTIVEC_BUILTIN_LVEBX, 296590075Sobrien ALTIVEC_BUILTIN_LVEHX, 296690075Sobrien ALTIVEC_BUILTIN_LVEWX, 296790075Sobrien ALTIVEC_BUILTIN_LVXL, 296890075Sobrien ALTIVEC_BUILTIN_LVX, 296990075Sobrien ALTIVEC_BUILTIN_STVX, 297090075Sobrien ALTIVEC_BUILTIN_STVEBX, 297190075Sobrien ALTIVEC_BUILTIN_STVEHX, 297290075Sobrien ALTIVEC_BUILTIN_STVEWX, 297390075Sobrien ALTIVEC_BUILTIN_STVXL 297490075Sobrien}; 2975