190075Sobrien/* Definitions of target machine for GNU compiler, for IBM RS/6000. 290075Sobrien Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 3169689Skan 2000, 2001, 2002, 2003, 2004, 2005, 2006 4169689Skan Free Software Foundation, Inc. 590075Sobrien Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) 690075Sobrien 7132718Skan This file is part of GCC. 890075Sobrien 9132718Skan GCC is free software; you can redistribute it and/or modify it 10132718Skan under the terms of the GNU General Public License as published 11132718Skan by the Free Software Foundation; either version 2, or (at your 12132718Skan option) any later version. 1390075Sobrien 14132718Skan GCC is distributed in the hope that it will be useful, but WITHOUT 15132718Skan ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 16132718Skan or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 17132718Skan License for more details. 1890075Sobrien 19132718Skan You should have received a copy of the GNU General Public License 20132718Skan along with GCC; see the file COPYING. If not, write to the 21169689Skan Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, 22169689Skan MA 02110-1301, USA. */ 2390075Sobrien 2490075Sobrien/* Note that some other tm.h files include this one and then override 2590075Sobrien many of the definitions. */ 2690075Sobrien 2790075Sobrien/* Definitions for the object file format. These are set at 2890075Sobrien compile-time. */ 2990075Sobrien 3090075Sobrien#define OBJECT_XCOFF 1 3190075Sobrien#define OBJECT_ELF 2 3290075Sobrien#define OBJECT_PEF 3 3390075Sobrien#define OBJECT_MACHO 4 3490075Sobrien 3590075Sobrien#define TARGET_ELF (TARGET_OBJECT_FORMAT == OBJECT_ELF) 3690075Sobrien#define TARGET_XCOFF (TARGET_OBJECT_FORMAT == OBJECT_XCOFF) 3790075Sobrien#define TARGET_MACOS (TARGET_OBJECT_FORMAT == OBJECT_PEF) 3890075Sobrien#define TARGET_MACHO (TARGET_OBJECT_FORMAT == OBJECT_MACHO) 3990075Sobrien 4090075Sobrien#ifndef TARGET_AIX 4190075Sobrien#define TARGET_AIX 0 4290075Sobrien#endif 4390075Sobrien 44169689Skan/* Control whether function entry points use a "dot" symbol when 45169689Skan ABI_AIX. */ 46169689Skan#define DOT_SYMBOLS 1 47169689Skan 4890075Sobrien/* Default string to use for cpu if not specified. */ 4990075Sobrien#ifndef TARGET_CPU_DEFAULT 5090075Sobrien#define TARGET_CPU_DEFAULT ((char *)0) 5190075Sobrien#endif 5290075Sobrien 53169689Skan/* If configured for PPC405, support PPC405CR Erratum77. */ 54169689Skan#ifdef CONFIG_PPC405CR 55169689Skan#define PPC405_ERRATUM77 (rs6000_cpu == PROCESSOR_PPC405) 56169689Skan#else 57169689Skan#define PPC405_ERRATUM77 0 58169689Skan#endif 59169689Skan 6090075Sobrien/* Common ASM definitions used by ASM_SPEC among the various targets 6190075Sobrien for handling -mcpu=xxx switches. */ 6290075Sobrien#define ASM_CPU_SPEC \ 6390075Sobrien"%{!mcpu*: \ 6490075Sobrien %{mpower: %{!mpower2: -mpwr}} \ 6590075Sobrien %{mpower2: -mpwrx} \ 66132718Skan %{mpowerpc64*: -mppc64} \ 67132718Skan %{!mpowerpc64*: %{mpowerpc*: -mppc}} \ 6890075Sobrien %{mno-power: %{!mpowerpc*: -mcom}} \ 69132718Skan %{!mno-power: %{!mpower*: %(asm_default)}}} \ 7090075Sobrien%{mcpu=common: -mcom} \ 7190075Sobrien%{mcpu=power: -mpwr} \ 7290075Sobrien%{mcpu=power2: -mpwrx} \ 73132718Skan%{mcpu=power3: -mppc64} \ 74117395Skan%{mcpu=power4: -mpower4} \ 75132718Skan%{mcpu=power5: -mpower4} \ 76169689Skan%{mcpu=power5+: -mpower4} \ 77169689Skan%{mcpu=power6: -mpower4 -maltivec} \ 7890075Sobrien%{mcpu=powerpc: -mppc} \ 7990075Sobrien%{mcpu=rios: -mpwr} \ 8090075Sobrien%{mcpu=rios1: -mpwr} \ 8190075Sobrien%{mcpu=rios2: -mpwrx} \ 8290075Sobrien%{mcpu=rsc: -mpwr} \ 8390075Sobrien%{mcpu=rsc1: -mpwr} \ 84132718Skan%{mcpu=rs64a: -mppc64} \ 8590075Sobrien%{mcpu=401: -mppc} \ 86102780Skan%{mcpu=403: -m403} \ 87102780Skan%{mcpu=405: -m405} \ 88132718Skan%{mcpu=405fp: -m405} \ 89132718Skan%{mcpu=440: -m440} \ 90132718Skan%{mcpu=440fp: -m440} \ 9190075Sobrien%{mcpu=505: -mppc} \ 9290075Sobrien%{mcpu=601: -m601} \ 9390075Sobrien%{mcpu=602: -mppc} \ 9490075Sobrien%{mcpu=603: -mppc} \ 9590075Sobrien%{mcpu=603e: -mppc} \ 9690075Sobrien%{mcpu=ec603e: -mppc} \ 9790075Sobrien%{mcpu=604: -mppc} \ 9890075Sobrien%{mcpu=604e: -mppc} \ 99132718Skan%{mcpu=620: -mppc64} \ 100132718Skan%{mcpu=630: -mppc64} \ 10190075Sobrien%{mcpu=740: -mppc} \ 10290075Sobrien%{mcpu=750: -mppc} \ 103132718Skan%{mcpu=G3: -mppc} \ 104132718Skan%{mcpu=7400: -mppc -maltivec} \ 105132718Skan%{mcpu=7450: -mppc -maltivec} \ 106132718Skan%{mcpu=G4: -mppc -maltivec} \ 10790075Sobrien%{mcpu=801: -mppc} \ 10890075Sobrien%{mcpu=821: -mppc} \ 10990075Sobrien%{mcpu=823: -mppc} \ 11090075Sobrien%{mcpu=860: -mppc} \ 111132718Skan%{mcpu=970: -mpower4 -maltivec} \ 112132718Skan%{mcpu=G5: -mpower4 -maltivec} \ 113117395Skan%{mcpu=8540: -me500} \ 114132718Skan%{maltivec: -maltivec} \ 115132718Skan-many" 11690075Sobrien 11790075Sobrien#define CPP_DEFAULT_SPEC "" 11890075Sobrien 11990075Sobrien#define ASM_DEFAULT_SPEC "" 12090075Sobrien 12190075Sobrien/* This macro defines names of additional specifications to put in the specs 12290075Sobrien that can be used in various specifications like CC1_SPEC. Its definition 12390075Sobrien is an initializer with a subgrouping for each command option. 12490075Sobrien 12590075Sobrien Each subgrouping contains a string constant, that defines the 126132718Skan specification name, and a string constant that used by the GCC driver 12790075Sobrien program. 12890075Sobrien 12990075Sobrien Do not define this macro if it does not need to do anything. */ 13090075Sobrien 13190075Sobrien#define SUBTARGET_EXTRA_SPECS 13290075Sobrien 13390075Sobrien#define EXTRA_SPECS \ 13490075Sobrien { "cpp_default", CPP_DEFAULT_SPEC }, \ 13590075Sobrien { "asm_cpu", ASM_CPU_SPEC }, \ 13690075Sobrien { "asm_default", ASM_DEFAULT_SPEC }, \ 13790075Sobrien SUBTARGET_EXTRA_SPECS 13890075Sobrien 13990075Sobrien/* Architecture type. */ 14090075Sobrien 141169689Skan/* Define TARGET_MFCRF if the target assembler does not support the 142169689Skan optional field operand for mfcr. */ 14390075Sobrien 144169689Skan#ifndef HAVE_AS_MFCRF 145169689Skan#undef TARGET_MFCRF 146169689Skan#define TARGET_MFCRF 0 147169689Skan#endif 14890075Sobrien 149169689Skan/* Define TARGET_POPCNTB if the target assembler does not support the 150169689Skan popcount byte instruction. */ 15190075Sobrien 152169689Skan#ifndef HAVE_AS_POPCNTB 153169689Skan#undef TARGET_POPCNTB 154169689Skan#define TARGET_POPCNTB 0 155169689Skan#endif 15690075Sobrien 157169689Skan/* Define TARGET_FPRND if the target assembler does not support the 158169689Skan fp rounding instructions. */ 15990075Sobrien 160169689Skan#ifndef HAVE_AS_FPRND 161169689Skan#undef TARGET_FPRND 162169689Skan#define TARGET_FPRND 0 163169689Skan#endif 16490075Sobrien 165169689Skan#ifndef TARGET_SECURE_PLT 166169689Skan#define TARGET_SECURE_PLT 0 167132718Skan#endif 168132718Skan 16990075Sobrien#define TARGET_32BIT (! TARGET_64BIT) 17090075Sobrien 171132718Skan#ifndef HAVE_AS_TLS 172132718Skan#define HAVE_AS_TLS 0 173132718Skan#endif 174132718Skan 175169689Skan/* Return 1 for a symbol ref for a thread-local storage symbol. */ 176169689Skan#define RS6000_SYMBOL_REF_TLS_P(RTX) \ 177169689Skan (GET_CODE (RTX) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (RTX) != 0) 178169689Skan 17990075Sobrien#ifdef IN_LIBGCC2 18090075Sobrien/* For libgcc2 we make sure this is a compile time constant */ 181169689Skan#if defined (__64BIT__) || defined (__powerpc64__) || defined (__ppc64__) 182169689Skan#undef TARGET_POWERPC64 18390075Sobrien#define TARGET_POWERPC64 1 18490075Sobrien#else 185169689Skan#undef TARGET_POWERPC64 18690075Sobrien#define TARGET_POWERPC64 0 18790075Sobrien#endif 18890075Sobrien#else 189169689Skan /* The option machinery will define this. */ 19090075Sobrien#endif 19190075Sobrien 19290075Sobrien#define TARGET_DEFAULT (MASK_POWER | MASK_MULTIPLE | MASK_STRING) 19390075Sobrien 19490075Sobrien/* Processor type. Order must match cpu attribute in MD file. */ 19590075Sobrienenum processor_type 19690075Sobrien { 19790075Sobrien PROCESSOR_RIOS1, 19890075Sobrien PROCESSOR_RIOS2, 19990075Sobrien PROCESSOR_RS64A, 20090075Sobrien PROCESSOR_MPCCORE, 20190075Sobrien PROCESSOR_PPC403, 20290075Sobrien PROCESSOR_PPC405, 203132718Skan PROCESSOR_PPC440, 20490075Sobrien PROCESSOR_PPC601, 20590075Sobrien PROCESSOR_PPC603, 20690075Sobrien PROCESSOR_PPC604, 20790075Sobrien PROCESSOR_PPC604e, 20890075Sobrien PROCESSOR_PPC620, 20990075Sobrien PROCESSOR_PPC630, 21090075Sobrien PROCESSOR_PPC750, 21190075Sobrien PROCESSOR_PPC7400, 212117395Skan PROCESSOR_PPC7450, 213117395Skan PROCESSOR_PPC8540, 214132718Skan PROCESSOR_POWER4, 215132718Skan PROCESSOR_POWER5 21690075Sobrien}; 21790075Sobrien 21890075Sobrienextern enum processor_type rs6000_cpu; 21990075Sobrien 22090075Sobrien/* Recast the processor type to the cpu attribute. */ 22190075Sobrien#define rs6000_cpu_attr ((enum attr_cpu)rs6000_cpu) 22290075Sobrien 22390075Sobrien/* Define generic processor types based upon current deployment. */ 22490075Sobrien#define PROCESSOR_COMMON PROCESSOR_PPC601 22590075Sobrien#define PROCESSOR_POWER PROCESSOR_RIOS1 22690075Sobrien#define PROCESSOR_POWERPC PROCESSOR_PPC604 22790075Sobrien#define PROCESSOR_POWERPC64 PROCESSOR_RS64A 22890075Sobrien 22990075Sobrien/* Define the default processor. This is overridden by other tm.h files. */ 23090075Sobrien#define PROCESSOR_DEFAULT PROCESSOR_RIOS1 23190075Sobrien#define PROCESSOR_DEFAULT64 PROCESSOR_RS64A 23290075Sobrien 23390075Sobrien/* Specify the dialect of assembler to use. New mnemonics is dialect one 23490075Sobrien and the old mnemonics are dialect zero. */ 23590075Sobrien#define ASSEMBLER_DIALECT (TARGET_NEW_MNEMONICS ? 1 : 0) 23690075Sobrien 237132718Skan/* Types of costly dependences. */ 238132718Skanenum rs6000_dependence_cost 239132718Skan { 240132718Skan max_dep_latency = 1000, 241132718Skan no_dep_costly, 242132718Skan all_deps_costly, 243132718Skan true_store_to_load_dep_costly, 244132718Skan store_to_load_dep_costly 245132718Skan }; 246132718Skan 247132718Skan/* Types of nop insertion schemes in sched target hook sched_finish. */ 248132718Skanenum rs6000_nop_insertion 249132718Skan { 250132718Skan sched_finish_regroup_exact = 1000, 251132718Skan sched_finish_pad_groups, 252132718Skan sched_finish_none 253132718Skan }; 254132718Skan 255132718Skan/* Dispatch group termination caused by an insn. */ 256132718Skanenum group_termination 257132718Skan { 258132718Skan current_group, 259132718Skan previous_group 260132718Skan }; 261132718Skan 262132718Skan/* Support for a compile-time default CPU, et cetera. The rules are: 263132718Skan --with-cpu is ignored if -mcpu is specified. 264132718Skan --with-tune is ignored if -mtune is specified. 265132718Skan --with-float is ignored if -mhard-float or -msoft-float are 266132718Skan specified. */ 267132718Skan#define OPTION_DEFAULT_SPECS \ 268132718Skan {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \ 269132718Skan {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \ 270132718Skan {"float", "%{!msoft-float:%{!mhard-float:-m%(VALUE)-float}}" } 271132718Skan 27290075Sobrien/* rs6000_select[0] is reserved for the default cpu defined via --with-cpu */ 27390075Sobrienstruct rs6000_cpu_select 27490075Sobrien{ 27590075Sobrien const char *string; 27690075Sobrien const char *name; 27790075Sobrien int set_tune_p; 27890075Sobrien int set_arch_p; 27990075Sobrien}; 28090075Sobrien 28190075Sobrienextern struct rs6000_cpu_select rs6000_select[]; 28290075Sobrien 28390075Sobrien/* Debug support */ 28490075Sobrienextern const char *rs6000_debug_name; /* Name for -mdebug-xxxx option */ 28590075Sobrienextern int rs6000_debug_stack; /* debug stack applications */ 28690075Sobrienextern int rs6000_debug_arg; /* debug argument handling */ 28790075Sobrien 28890075Sobrien#define TARGET_DEBUG_STACK rs6000_debug_stack 28990075Sobrien#define TARGET_DEBUG_ARG rs6000_debug_arg 29090075Sobrien 291117395Skanextern const char *rs6000_traceback_name; /* Type of traceback table. */ 292117395Skan 29390075Sobrien/* These are separate from target_flags because we've run out of bits 29490075Sobrien there. */ 29590075Sobrienextern int rs6000_long_double_type_size; 296169689Skanextern int rs6000_ieeequad; 29790075Sobrienextern int rs6000_altivec_abi; 298117395Skanextern int rs6000_spe_abi; 299132718Skanextern int rs6000_float_gprs; 300132718Skanextern int rs6000_alignment_flags; 301132718Skanextern const char *rs6000_sched_insert_nops_str; 302132718Skanextern enum rs6000_nop_insertion rs6000_sched_insert_nops; 30390075Sobrien 304132718Skan/* Alignment options for fields in structures for sub-targets following 305132718Skan AIX-like ABI. 306132718Skan ALIGN_POWER word-aligns FP doubles (default AIX ABI). 307132718Skan ALIGN_NATURAL doubleword-aligns FP doubles (align to object size). 308132718Skan 309132718Skan Override the macro definitions when compiling libobjc to avoid undefined 310132718Skan reference to rs6000_alignment_flags due to library's use of GCC alignment 311132718Skan macros which use the macros below. */ 312169689Skan 313132718Skan#ifndef IN_TARGET_LIBS 314132718Skan#define MASK_ALIGN_POWER 0x00000000 315132718Skan#define MASK_ALIGN_NATURAL 0x00000001 316132718Skan#define TARGET_ALIGN_NATURAL (rs6000_alignment_flags & MASK_ALIGN_NATURAL) 317132718Skan#else 318132718Skan#define TARGET_ALIGN_NATURAL 0 319132718Skan#endif 320132718Skan 32190075Sobrien#define TARGET_LONG_DOUBLE_128 (rs6000_long_double_type_size == 128) 322169689Skan#define TARGET_IEEEQUAD rs6000_ieeequad 32390075Sobrien#define TARGET_ALTIVEC_ABI rs6000_altivec_abi 32490075Sobrien 325117395Skan#define TARGET_SPE_ABI 0 326117395Skan#define TARGET_SPE 0 327132718Skan#define TARGET_E500 0 328117395Skan#define TARGET_ISEL 0 329117395Skan#define TARGET_FPRS 1 330169689Skan#define TARGET_E500_SINGLE 0 331169689Skan#define TARGET_E500_DOUBLE 0 332117395Skan 333169689Skan/* E500 processors only support plain "sync", not lwsync. */ 334169689Skan#define TARGET_NO_LWSYNC TARGET_E500 335169689Skan 33690075Sobrien/* Sometimes certain combinations of command options do not make sense 33790075Sobrien on a particular target machine. You can define a macro 33890075Sobrien `OVERRIDE_OPTIONS' to take account of this. This macro, if 33990075Sobrien defined, is executed once just after all the command options have 34090075Sobrien been parsed. 34190075Sobrien 342132718Skan Do not use this macro to turn on various extra optimizations for 34390075Sobrien `-O'. That is what `OPTIMIZATION_OPTIONS' is for. 34490075Sobrien 34590075Sobrien On the RS/6000 this is used to define the target cpu type. */ 34690075Sobrien 34790075Sobrien#define OVERRIDE_OPTIONS rs6000_override_options (TARGET_CPU_DEFAULT) 34890075Sobrien 34990075Sobrien/* Define this to change the optimizations performed by default. */ 35090075Sobrien#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE) 35190075Sobrien 35290075Sobrien/* Show we can debug even without a frame pointer. */ 35390075Sobrien#define CAN_DEBUG_WITHOUT_FP 354117395Skan 355117395Skan/* Target pragma. */ 356132718Skan#define REGISTER_TARGET_PRAGMAS() do { \ 357132718Skan c_register_pragma (0, "longcall", rs6000_pragma_longcall); \ 358169689Skan targetm.resolve_overloaded_builtin = altivec_resolve_overloaded_builtin; \ 359117395Skan} while (0) 360117395Skan 361117395Skan/* Target #defines. */ 362117395Skan#define TARGET_CPU_CPP_BUILTINS() \ 363117395Skan rs6000_cpu_cpp_builtins (pfile) 364117395Skan 365117395Skan/* This is used by rs6000_cpu_cpp_builtins to indicate the byte order 366117395Skan we're compiling for. Some configurations may need to override it. */ 367117395Skan#define RS6000_CPU_CPP_ENDIAN_BUILTINS() \ 368117395Skan do \ 369117395Skan { \ 370117395Skan if (BYTES_BIG_ENDIAN) \ 371117395Skan { \ 372117395Skan builtin_define ("__BIG_ENDIAN__"); \ 373117395Skan builtin_define ("_BIG_ENDIAN"); \ 374117395Skan builtin_assert ("machine=bigendian"); \ 375117395Skan } \ 376117395Skan else \ 377117395Skan { \ 378117395Skan builtin_define ("__LITTLE_ENDIAN__"); \ 379117395Skan builtin_define ("_LITTLE_ENDIAN"); \ 380117395Skan builtin_assert ("machine=littleendian"); \ 381117395Skan } \ 382117395Skan } \ 383117395Skan while (0) 38490075Sobrien 385117395Skan/* Target machine storage layout. */ 38690075Sobrien 38790075Sobrien/* Define this macro if it is advisable to hold scalars in registers 38890075Sobrien in a wider mode than that declared by the program. In such cases, 38990075Sobrien the value is constrained to be within the bounds of the declared 39090075Sobrien type, but kept valid in the wider mode. The signedness of the 39190075Sobrien extension may differ from that of the type. */ 39290075Sobrien 39390075Sobrien#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ 39490075Sobrien if (GET_MODE_CLASS (MODE) == MODE_INT \ 39590075Sobrien && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ 396132718Skan (MODE) = TARGET_32BIT ? SImode : DImode; 39790075Sobrien 39890075Sobrien/* Define this if most significant bit is lowest numbered 39990075Sobrien in instructions that operate on numbered bit-fields. */ 40090075Sobrien/* That is true on RS/6000. */ 40190075Sobrien#define BITS_BIG_ENDIAN 1 40290075Sobrien 40390075Sobrien/* Define this if most significant byte of a word is the lowest numbered. */ 40490075Sobrien/* That is true on RS/6000. */ 40590075Sobrien#define BYTES_BIG_ENDIAN 1 40690075Sobrien 40790075Sobrien/* Define this if most significant word of a multiword number is lowest 40890075Sobrien numbered. 40990075Sobrien 41090075Sobrien For RS/6000 we can decide arbitrarily since there are no machine 41190075Sobrien instructions for them. Might as well be consistent with bits and bytes. */ 41290075Sobrien#define WORDS_BIG_ENDIAN 1 41390075Sobrien 41490075Sobrien#define MAX_BITS_PER_WORD 64 41590075Sobrien 41690075Sobrien/* Width of a word, in units (bytes). */ 41790075Sobrien#define UNITS_PER_WORD (! TARGET_POWERPC64 ? 4 : 8) 418117395Skan#ifdef IN_LIBGCC2 419117395Skan#define MIN_UNITS_PER_WORD UNITS_PER_WORD 420117395Skan#else 42190075Sobrien#define MIN_UNITS_PER_WORD 4 422117395Skan#endif 42390075Sobrien#define UNITS_PER_FP_WORD 8 42490075Sobrien#define UNITS_PER_ALTIVEC_WORD 16 425117395Skan#define UNITS_PER_SPE_WORD 8 42690075Sobrien 42790075Sobrien/* Type used for ptrdiff_t, as a string used in a declaration. */ 42890075Sobrien#define PTRDIFF_TYPE "int" 42990075Sobrien 43090075Sobrien/* Type used for size_t, as a string used in a declaration. */ 43190075Sobrien#define SIZE_TYPE "long unsigned int" 43290075Sobrien 43390075Sobrien/* Type used for wchar_t, as a string used in a declaration. */ 43490075Sobrien#define WCHAR_TYPE "short unsigned int" 43590075Sobrien 43690075Sobrien/* Width of wchar_t in bits. */ 43790075Sobrien#define WCHAR_TYPE_SIZE 16 43890075Sobrien 43990075Sobrien/* A C expression for the size in bits of the type `short' on the 44090075Sobrien target machine. If you don't define this, the default is half a 44190075Sobrien word. (If this would be less than one storage unit, it is 44290075Sobrien rounded up to one unit.) */ 44390075Sobrien#define SHORT_TYPE_SIZE 16 44490075Sobrien 44590075Sobrien/* A C expression for the size in bits of the type `int' on the 44690075Sobrien target machine. If you don't define this, the default is one 44790075Sobrien word. */ 44890075Sobrien#define INT_TYPE_SIZE 32 44990075Sobrien 45090075Sobrien/* A C expression for the size in bits of the type `long' on the 45190075Sobrien target machine. If you don't define this, the default is one 45290075Sobrien word. */ 45390075Sobrien#define LONG_TYPE_SIZE (TARGET_32BIT ? 32 : 64) 45490075Sobrien 45590075Sobrien/* A C expression for the size in bits of the type `long long' on the 45690075Sobrien target machine. If you don't define this, the default is two 45790075Sobrien words. */ 45890075Sobrien#define LONG_LONG_TYPE_SIZE 64 45990075Sobrien 46090075Sobrien/* A C expression for the size in bits of the type `float' on the 46190075Sobrien target machine. If you don't define this, the default is one 46290075Sobrien word. */ 46390075Sobrien#define FLOAT_TYPE_SIZE 32 46490075Sobrien 46590075Sobrien/* A C expression for the size in bits of the type `double' on the 46690075Sobrien target machine. If you don't define this, the default is two 46790075Sobrien words. */ 46890075Sobrien#define DOUBLE_TYPE_SIZE 64 46990075Sobrien 47090075Sobrien/* A C expression for the size in bits of the type `long double' on 47190075Sobrien the target machine. If you don't define this, the default is two 47290075Sobrien words. */ 47390075Sobrien#define LONG_DOUBLE_TYPE_SIZE rs6000_long_double_type_size 47490075Sobrien 47590075Sobrien/* Define this to set long double type size to use in libgcc2.c, which can 47690075Sobrien not depend on target_flags. */ 47790075Sobrien#ifdef __LONG_DOUBLE_128__ 47890075Sobrien#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128 47990075Sobrien#else 48090075Sobrien#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64 48190075Sobrien#endif 48290075Sobrien 48396263Sobrien/* Work around rs6000_long_double_type_size dependency in ada/targtyps.c. */ 48496263Sobrien#define WIDEST_HARDWARE_FP_SIZE 64 48596263Sobrien 48690075Sobrien/* Width in bits of a pointer. 48790075Sobrien See also the macro `Pmode' defined below. */ 48890075Sobrien#define POINTER_SIZE (TARGET_32BIT ? 32 : 64) 48990075Sobrien 49090075Sobrien/* Allocation boundary (in *bits*) for storing arguments in argument list. */ 49190075Sobrien#define PARM_BOUNDARY (TARGET_32BIT ? 32 : 64) 49290075Sobrien 49390075Sobrien/* Boundary (in *bits*) on which stack pointer should be aligned. */ 494132718Skan#define STACK_BOUNDARY \ 495132718Skan ((TARGET_32BIT && !TARGET_ALTIVEC && !TARGET_ALTIVEC_ABI) ? 64 : 128) 49690075Sobrien 49790075Sobrien/* Allocation boundary (in *bits*) for the code of a function. */ 49890075Sobrien#define FUNCTION_BOUNDARY 32 49990075Sobrien 50090075Sobrien/* No data type wants to be aligned rounder than this. */ 50190075Sobrien#define BIGGEST_ALIGNMENT 128 50290075Sobrien 50390075Sobrien/* A C expression to compute the alignment for a variables in the 50490075Sobrien local store. TYPE is the data type, and ALIGN is the alignment 50590075Sobrien that the object would ordinarily have. */ 50690075Sobrien#define LOCAL_ALIGNMENT(TYPE, ALIGN) \ 507117395Skan ((TARGET_ALTIVEC && TREE_CODE (TYPE) == VECTOR_TYPE) ? 128 : \ 508169689Skan (TARGET_E500_DOUBLE && TYPE_MODE (TYPE) == DFmode) ? 64 : \ 509169689Skan (TARGET_SPE && TREE_CODE (TYPE) == VECTOR_TYPE \ 510169689Skan && SPE_VECTOR_MODE (TYPE_MODE (TYPE))) ? 64 : ALIGN) 51190075Sobrien 51290075Sobrien/* Alignment of field after `int : 0' in a structure. */ 51390075Sobrien#define EMPTY_FIELD_BOUNDARY 32 51490075Sobrien 51590075Sobrien/* Every structure's size must be a multiple of this. */ 51690075Sobrien#define STRUCTURE_SIZE_BOUNDARY 8 51790075Sobrien 518117395Skan/* Return 1 if a structure or array containing FIELD should be 519117395Skan accessed using `BLKMODE'. 520117395Skan 521117395Skan For the SPE, simd types are V2SI, and gcc can be tempted to put the 522117395Skan entire thing in a DI and use subregs to access the internals. 523117395Skan store_bit_field() will force (subreg:DI (reg:V2SI x))'s to the 524117395Skan back-end. Because a single GPR can hold a V2SI, but not a DI, the 525117395Skan best thing to do is set structs to BLKmode and avoid Severe Tire 526169689Skan Damage. 527169689Skan 528169689Skan On e500 v2, DF and DI modes suffer from the same anomaly. DF can 529169689Skan fit into 1, whereas DI still needs two. */ 530117395Skan#define MEMBER_TYPE_FORCES_BLK(FIELD, MODE) \ 531169689Skan ((TARGET_SPE && TREE_CODE (TREE_TYPE (FIELD)) == VECTOR_TYPE) \ 532169689Skan || (TARGET_E500_DOUBLE && (MODE) == DFmode)) 533117395Skan 534117395Skan/* A bit-field declared as `int' forces `int' alignment for the struct. */ 53590075Sobrien#define PCC_BITFIELD_TYPE_MATTERS 1 53690075Sobrien 53796263Sobrien/* Make strings word-aligned so strcpy from constants will be faster. 53896263Sobrien Make vector constants quadword aligned. */ 53996263Sobrien#define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 54096263Sobrien (TREE_CODE (EXP) == STRING_CST \ 54196263Sobrien && (ALIGN) < BITS_PER_WORD \ 54296263Sobrien ? BITS_PER_WORD \ 54396263Sobrien : (ALIGN)) 54490075Sobrien 54590075Sobrien/* Make arrays of chars word-aligned for the same reasons. 546169689Skan Align vectors to 128 bits. Align SPE vectors and E500 v2 doubles to 547169689Skan 64 bits. */ 54890075Sobrien#define DATA_ALIGNMENT(TYPE, ALIGN) \ 549117395Skan (TREE_CODE (TYPE) == VECTOR_TYPE ? (TARGET_SPE_ABI ? 64 : 128) \ 550169689Skan : (TARGET_E500_DOUBLE && TYPE_MODE (TYPE) == DFmode) ? 64 \ 55190075Sobrien : TREE_CODE (TYPE) == ARRAY_TYPE \ 55290075Sobrien && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 55390075Sobrien && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 55490075Sobrien 555117395Skan/* Nonzero if move instructions will actually fail to work 55690075Sobrien when given unaligned data. */ 55790075Sobrien#define STRICT_ALIGNMENT 0 55890075Sobrien 55990075Sobrien/* Define this macro to be the value 1 if unaligned accesses have a cost 56090075Sobrien many times greater than aligned accesses, for example if they are 56190075Sobrien emulated in a trap handler. */ 56290075Sobrien#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) \ 56390075Sobrien (STRICT_ALIGNMENT \ 564117395Skan || (((MODE) == SFmode || (MODE) == DFmode || (MODE) == TFmode \ 565117395Skan || (MODE) == DImode) \ 56690075Sobrien && (ALIGN) < 32)) 56790075Sobrien 56890075Sobrien/* Standard register usage. */ 56990075Sobrien 57090075Sobrien/* Number of actual hardware registers. 57190075Sobrien The hardware registers are assigned numbers for the compiler 57290075Sobrien from 0 to just below FIRST_PSEUDO_REGISTER. 57390075Sobrien All registers that the compiler knows about must be given numbers, 57490075Sobrien even those that are not normally considered general registers. 57590075Sobrien 57690075Sobrien RS/6000 has 32 fixed-point registers, 32 floating-point registers, 57790075Sobrien an MQ register, a count register, a link register, and 8 condition 578132718Skan register fields, which we view here as separate registers. AltiVec 579132718Skan adds 32 vector registers and a VRsave register. 58090075Sobrien 58190075Sobrien In addition, the difference between the frame and argument pointers is 58290075Sobrien a function of the number of registers saved, so we need to have a 58390075Sobrien register for AP that will later be eliminated in favor of SP or FP. 58490075Sobrien This is a normal register, but it is fixed. 58590075Sobrien 58690075Sobrien We also create a pseudo register for float/int conversions, that will 58790075Sobrien really represent the memory location used. It is represented here as 58890075Sobrien a register, in order to work around problems in allocating stack storage 589169689Skan in inline functions. 59090075Sobrien 591169689Skan Another pseudo (not included in DWARF_FRAME_REGISTERS) is soft frame 592169689Skan pointer, which is eventually eliminated in favor of SP or FP. */ 59390075Sobrien 594169689Skan#define FIRST_PSEUDO_REGISTER 114 595169689Skan 59690075Sobrien/* This must be included for pre gcc 3.0 glibc compatibility. */ 59790075Sobrien#define PRE_GCC3_DWARF_FRAME_REGISTERS 77 59890075Sobrien 599132718Skan/* Add 32 dwarf columns for synthetic SPE registers. */ 600169689Skan#define DWARF_FRAME_REGISTERS ((FIRST_PSEUDO_REGISTER - 1) + 32) 601132718Skan 602132718Skan/* The SPE has an additional 32 synthetic registers, with DWARF debug 603132718Skan info numbering for these registers starting at 1200. While eh_frame 604132718Skan register numbering need not be the same as the debug info numbering, 605132718Skan we choose to number these regs for eh_frame at 1200 too. This allows 606132718Skan future versions of the rs6000 backend to add hard registers and 607132718Skan continue to use the gcc hard register numbering for eh_frame. If the 608132718Skan extra SPE registers in eh_frame were numbered starting from the 609132718Skan current value of FIRST_PSEUDO_REGISTER, then if FIRST_PSEUDO_REGISTER 610132718Skan changed we'd need to introduce a mapping in DWARF_FRAME_REGNUM to 611132718Skan avoid invalidating older SPE eh_frame info. 612132718Skan 613132718Skan We must map them here to avoid huge unwinder tables mostly consisting 614169689Skan of unused space. */ 615132718Skan#define DWARF_REG_TO_UNWIND_COLUMN(r) \ 616169689Skan ((r) > 1200 ? ((r) - 1200 + FIRST_PSEUDO_REGISTER - 1) : (r)) 617132718Skan 618169689Skan/* Use standard DWARF numbering for DWARF debugging information. */ 619169689Skan#define DBX_REGISTER_NUMBER(REGNO) rs6000_dbx_register_number (REGNO) 620169689Skan 621132718Skan/* Use gcc hard register numbering for eh_frame. */ 622132718Skan#define DWARF_FRAME_REGNUM(REGNO) (REGNO) 623132718Skan 624169689Skan/* Map register numbers held in the call frame info that gcc has 625169689Skan collected using DWARF_FRAME_REGNUM to those that should be output in 626169689Skan .debug_frame and .eh_frame. We continue to use gcc hard reg numbers 627169689Skan for .eh_frame, but use the numbers mandated by the various ABIs for 628169689Skan .debug_frame. rs6000_emit_prologue has translated any combination of 629169689Skan CR2, CR3, CR4 saves to a save of CR2. The actual code emitted saves 630169689Skan the whole of CR, so we map CR2_REGNO to the DWARF reg for CR. */ 631169689Skan#define DWARF2_FRAME_REG_OUT(REGNO, FOR_EH) \ 632169689Skan ((FOR_EH) ? (REGNO) \ 633169689Skan : (REGNO) == CR2_REGNO ? 64 \ 634169689Skan : DBX_REGISTER_NUMBER (REGNO)) 635169689Skan 63690075Sobrien/* 1 for registers that have pervasive standard uses 63790075Sobrien and are not available for the register allocator. 63890075Sobrien 63990075Sobrien On RS/6000, r1 is used for the stack. On Darwin, r2 is available 64090075Sobrien as a local register; for all other OS's r2 is the TOC pointer. 64190075Sobrien 64290075Sobrien cr5 is not supposed to be used. 64390075Sobrien 64490075Sobrien On System V implementations, r13 is fixed and not available for use. */ 64590075Sobrien 64690075Sobrien#define FIXED_REGISTERS \ 64790075Sobrien {0, 1, FIXED_R2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, FIXED_R13, 0, 0, \ 64890075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 64990075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 65090075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 65190075Sobrien 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 1, \ 65290075Sobrien /* AltiVec registers. */ \ 65390075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 65490075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 655117395Skan 1, 1 \ 656169689Skan , 1, 1, 1 \ 65790075Sobrien} 65890075Sobrien 65990075Sobrien/* 1 for registers not available across function calls. 66090075Sobrien These must include the FIXED_REGISTERS and also any 66190075Sobrien registers that can be used without being saved. 66290075Sobrien The latter must include the registers where values are returned 66390075Sobrien and the register where structure-value addresses are passed. 66490075Sobrien Aside from that, you can include as many other registers as you like. */ 66590075Sobrien 66690075Sobrien#define CALL_USED_REGISTERS \ 66790075Sobrien {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, FIXED_R13, 0, 0, \ 66890075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 66990075Sobrien 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \ 67090075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 67190075Sobrien 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, \ 67290075Sobrien /* AltiVec registers. */ \ 67390075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 67490075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 675117395Skan 1, 1 \ 676169689Skan , 1, 1, 1 \ 67790075Sobrien} 67890075Sobrien 67990075Sobrien/* Like `CALL_USED_REGISTERS' except this macro doesn't require that 68090075Sobrien the entire set of `FIXED_REGISTERS' be included. 68190075Sobrien (`CALL_USED_REGISTERS' must be a superset of `FIXED_REGISTERS'). 68290075Sobrien This macro is optional. If not specified, it defaults to the value 68390075Sobrien of `CALL_USED_REGISTERS'. */ 684169689Skan 68590075Sobrien#define CALL_REALLY_USED_REGISTERS \ 68690075Sobrien {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, FIXED_R13, 0, 0, \ 68790075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 68890075Sobrien 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \ 68990075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 69090075Sobrien 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, \ 69190075Sobrien /* AltiVec registers. */ \ 69290075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 69390075Sobrien 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 694117395Skan 0, 0 \ 695169689Skan , 0, 0, 0 \ 69690075Sobrien} 69790075Sobrien 69890075Sobrien#define MQ_REGNO 64 69990075Sobrien#define CR0_REGNO 68 70090075Sobrien#define CR1_REGNO 69 70190075Sobrien#define CR2_REGNO 70 70290075Sobrien#define CR3_REGNO 71 70390075Sobrien#define CR4_REGNO 72 70490075Sobrien#define MAX_CR_REGNO 75 70590075Sobrien#define XER_REGNO 76 70690075Sobrien#define FIRST_ALTIVEC_REGNO 77 70790075Sobrien#define LAST_ALTIVEC_REGNO 108 70896263Sobrien#define TOTAL_ALTIVEC_REGS (LAST_ALTIVEC_REGNO - FIRST_ALTIVEC_REGNO + 1) 70990075Sobrien#define VRSAVE_REGNO 109 710117395Skan#define VSCR_REGNO 110 711117395Skan#define SPE_ACC_REGNO 111 712117395Skan#define SPEFSCR_REGNO 112 71390075Sobrien 714169689Skan#define FIRST_SAVED_ALTIVEC_REGNO (FIRST_ALTIVEC_REGNO+20) 715169689Skan#define FIRST_SAVED_FP_REGNO (14+32) 716169689Skan#define FIRST_SAVED_GP_REGNO 13 717169689Skan 71890075Sobrien/* List the order in which to allocate registers. Each register must be 71990075Sobrien listed once, even those in FIXED_REGISTERS. 72090075Sobrien 72190075Sobrien We allocate in the following order: 72290075Sobrien fp0 (not saved or used for anything) 72390075Sobrien fp13 - fp2 (not saved; incoming fp arg registers) 72490075Sobrien fp1 (not saved; return value) 725169689Skan fp31 - fp14 (saved; order given to save least number) 72690075Sobrien cr7, cr6 (not saved or special) 72790075Sobrien cr1 (not saved, but used for FP operations) 72890075Sobrien cr0 (not saved, but used for arithmetic operations) 72990075Sobrien cr4, cr3, cr2 (saved) 730169689Skan r0 (not saved; cannot be base reg) 73190075Sobrien r9 (not saved; best for TImode) 73290075Sobrien r11, r10, r8-r4 (not saved; highest used first to make less conflict) 733169689Skan r3 (not saved; return value register) 73490075Sobrien r31 - r13 (saved; order given to save least number) 73590075Sobrien r12 (not saved; if used for DImode or DFmode would use r13) 73690075Sobrien mq (not saved; best to use it if we can) 73790075Sobrien ctr (not saved; when we have the choice ctr is better) 73890075Sobrien lr (saved) 739169689Skan cr5, r1, r2, ap, xer (fixed) 740169689Skan v0 - v1 (not saved or used for anything) 741169689Skan v13 - v3 (not saved; incoming vector arg registers) 742169689Skan v2 (not saved; incoming vector arg reg; return value) 743169689Skan v19 - v14 (not saved or used for anything) 744169689Skan v31 - v20 (saved; order given to save least number) 745169689Skan vrsave, vscr (fixed) 746117395Skan spe_acc, spefscr (fixed) 747169689Skan sfp (fixed) 748169689Skan*/ 74990075Sobrien 750132718Skan#if FIXED_R2 == 1 751132718Skan#define MAYBE_R2_AVAILABLE 752132718Skan#define MAYBE_R2_FIXED 2, 753132718Skan#else 754132718Skan#define MAYBE_R2_AVAILABLE 2, 755132718Skan#define MAYBE_R2_FIXED 756132718Skan#endif 75790075Sobrien 758169689Skan#define REG_ALLOC_ORDER \ 759169689Skan {32, \ 760169689Skan 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \ 761169689Skan 33, \ 762169689Skan 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \ 763169689Skan 50, 49, 48, 47, 46, \ 764169689Skan 75, 74, 69, 68, 72, 71, 70, \ 765169689Skan 0, MAYBE_R2_AVAILABLE \ 766169689Skan 9, 11, 10, 8, 7, 6, 5, 4, \ 767169689Skan 3, \ 768169689Skan 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, \ 769169689Skan 18, 17, 16, 15, 14, 13, 12, \ 770169689Skan 64, 66, 65, \ 771169689Skan 73, 1, MAYBE_R2_FIXED 67, 76, \ 772169689Skan /* AltiVec registers. */ \ 773169689Skan 77, 78, \ 774169689Skan 90, 89, 88, 87, 86, 85, 84, 83, 82, 81, 80, \ 775169689Skan 79, \ 776169689Skan 96, 95, 94, 93, 92, 91, \ 777169689Skan 108, 107, 106, 105, 104, 103, 102, 101, 100, 99, 98, 97, \ 778169689Skan 109, 110, \ 779169689Skan 111, 112, 113 \ 78090075Sobrien} 78190075Sobrien 78290075Sobrien/* True if register is floating-point. */ 78390075Sobrien#define FP_REGNO_P(N) ((N) >= 32 && (N) <= 63) 78490075Sobrien 78590075Sobrien/* True if register is a condition register. */ 78690075Sobrien#define CR_REGNO_P(N) ((N) >= 68 && (N) <= 75) 78790075Sobrien 78890075Sobrien/* True if register is a condition register, but not cr0. */ 78990075Sobrien#define CR_REGNO_NOT_CR0_P(N) ((N) >= 69 && (N) <= 75) 79090075Sobrien 79190075Sobrien/* True if register is an integer register. */ 792169689Skan#define INT_REGNO_P(N) \ 793169689Skan ((N) <= 31 || (N) == ARG_POINTER_REGNUM || (N) == FRAME_POINTER_REGNUM) 79490075Sobrien 795117395Skan/* SPE SIMD registers are just the GPRs. */ 796117395Skan#define SPE_SIMD_REGNO_P(N) ((N) <= 31) 797117395Skan 79890075Sobrien/* True if register is the XER register. */ 79990075Sobrien#define XER_REGNO_P(N) ((N) == XER_REGNO) 80090075Sobrien 80190075Sobrien/* True if register is an AltiVec register. */ 80290075Sobrien#define ALTIVEC_REGNO_P(N) ((N) >= FIRST_ALTIVEC_REGNO && (N) <= LAST_ALTIVEC_REGNO) 80390075Sobrien 80490075Sobrien/* Return number of consecutive hard regs needed starting at reg REGNO 805169689Skan to hold something of mode MODE. */ 80690075Sobrien 807169689Skan#define HARD_REGNO_NREGS(REGNO, MODE) rs6000_hard_regno_nregs ((REGNO), (MODE)) 808117395Skan 809132718Skan#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) \ 810132718Skan ((TARGET_32BIT && TARGET_POWERPC64 \ 811169689Skan && (GET_MODE_SIZE (MODE) > 4) \ 812132718Skan && INT_REGNO_P (REGNO)) ? 1 : 0) 813132718Skan 81490075Sobrien#define ALTIVEC_VECTOR_MODE(MODE) \ 815117395Skan ((MODE) == V16QImode \ 816117395Skan || (MODE) == V8HImode \ 817117395Skan || (MODE) == V4SFmode \ 818117395Skan || (MODE) == V4SImode) 81990075Sobrien 820117395Skan#define SPE_VECTOR_MODE(MODE) \ 821117395Skan ((MODE) == V4HImode \ 822117395Skan || (MODE) == V2SFmode \ 823117395Skan || (MODE) == V1DImode \ 824117395Skan || (MODE) == V2SImode) 825117395Skan 826169689Skan#define UNITS_PER_SIMD_WORD \ 827169689Skan (TARGET_ALTIVEC ? UNITS_PER_ALTIVEC_WORD \ 828169689Skan : (TARGET_SPE ? UNITS_PER_SPE_WORD : UNITS_PER_WORD)) 82990075Sobrien 830169689Skan/* Value is TRUE if hard register REGNO can hold a value of 831169689Skan machine-mode MODE. */ 832169689Skan#define HARD_REGNO_MODE_OK(REGNO, MODE) \ 833169689Skan rs6000_hard_regno_mode_ok_p[(int)(MODE)][REGNO] 83490075Sobrien 83590075Sobrien/* Value is 1 if it is a good idea to tie two pseudo registers 83690075Sobrien when one has mode MODE1 and one has mode MODE2. 83790075Sobrien If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 83890075Sobrien for any hard reg, then this must be 0 for correct output. */ 83990075Sobrien#define MODES_TIEABLE_P(MODE1, MODE2) \ 840169689Skan (SCALAR_FLOAT_MODE_P (MODE1) \ 841169689Skan ? SCALAR_FLOAT_MODE_P (MODE2) \ 842169689Skan : SCALAR_FLOAT_MODE_P (MODE2) \ 843169689Skan ? SCALAR_FLOAT_MODE_P (MODE1) \ 84490075Sobrien : GET_MODE_CLASS (MODE1) == MODE_CC \ 84590075Sobrien ? GET_MODE_CLASS (MODE2) == MODE_CC \ 84690075Sobrien : GET_MODE_CLASS (MODE2) == MODE_CC \ 84790075Sobrien ? GET_MODE_CLASS (MODE1) == MODE_CC \ 848132718Skan : SPE_VECTOR_MODE (MODE1) \ 849132718Skan ? SPE_VECTOR_MODE (MODE2) \ 850132718Skan : SPE_VECTOR_MODE (MODE2) \ 851132718Skan ? SPE_VECTOR_MODE (MODE1) \ 85290075Sobrien : ALTIVEC_VECTOR_MODE (MODE1) \ 85390075Sobrien ? ALTIVEC_VECTOR_MODE (MODE2) \ 85490075Sobrien : ALTIVEC_VECTOR_MODE (MODE2) \ 85590075Sobrien ? ALTIVEC_VECTOR_MODE (MODE1) \ 85690075Sobrien : 1) 85790075Sobrien 858132718Skan/* Post-reload, we can't use any new AltiVec registers, as we already 859132718Skan emitted the vrsave mask. */ 860132718Skan 861132718Skan#define HARD_REGNO_RENAME_OK(SRC, DST) \ 862132718Skan (! ALTIVEC_REGNO_P (DST) || regs_ever_live[DST]) 863132718Skan 86490075Sobrien/* A C expression returning the cost of moving data from a register of class 865117395Skan CLASS1 to one of CLASS2. */ 86690075Sobrien 867117395Skan#define REGISTER_MOVE_COST rs6000_register_move_cost 86890075Sobrien 86990075Sobrien/* A C expressions returning the cost of moving data of MODE from a register to 870117395Skan or from memory. */ 87190075Sobrien 872117395Skan#define MEMORY_MOVE_COST rs6000_memory_move_cost 87390075Sobrien 87490075Sobrien/* Specify the cost of a branch insn; roughly the number of extra insns that 87590075Sobrien should be added to avoid a branch. 87690075Sobrien 87790075Sobrien Set this to 3 on the RS/6000 since that is roughly the average cost of an 87890075Sobrien unscheduled conditional branch. */ 87990075Sobrien 88090075Sobrien#define BRANCH_COST 3 88190075Sobrien 882132718Skan/* Override BRANCH_COST heuristic which empirically produces worse 883169689Skan performance for removing short circuiting from the logical ops. */ 884117395Skan 885169689Skan#define LOGICAL_OP_NON_SHORT_CIRCUIT 0 886132718Skan 887117395Skan/* A fixed register used at prologue and epilogue generation to fix 888117395Skan addressing modes. The SPE needs heavy addressing fixes at the last 889117395Skan minute, and it's best to save a register for it. 890117395Skan 891117395Skan AltiVec also needs fixes, but we've gotten around using r11, which 892117395Skan is actually wrong because when use_backchain_to_restore_sp is true, 893117395Skan we end up clobbering r11. 894117395Skan 895117395Skan The AltiVec case needs to be fixed. Dunno if we should break ABI 896132718Skan compatibility and reserve a register for it as well.. */ 897117395Skan 898117395Skan#define FIXED_SCRATCH (TARGET_SPE ? 14 : 11) 899117395Skan 900169689Skan/* Define this macro to change register usage conditional on target 901169689Skan flags. */ 90290075Sobrien 903169689Skan#define CONDITIONAL_REGISTER_USAGE rs6000_conditional_register_usage () 90490075Sobrien 90590075Sobrien/* Specify the registers used for certain standard purposes. 90690075Sobrien The values of these macros are register numbers. */ 90790075Sobrien 90890075Sobrien/* RS/6000 pc isn't overloaded on a register that the compiler knows about. */ 90990075Sobrien/* #define PC_REGNUM */ 91090075Sobrien 91190075Sobrien/* Register to use for pushing function arguments. */ 91290075Sobrien#define STACK_POINTER_REGNUM 1 91390075Sobrien 91490075Sobrien/* Base register for access to local variables of the function. */ 915169689Skan#define HARD_FRAME_POINTER_REGNUM 31 91690075Sobrien 917169689Skan/* Base register for access to local variables of the function. */ 918169689Skan#define FRAME_POINTER_REGNUM 113 919169689Skan 92090075Sobrien/* Value should be nonzero if functions must have frame pointers. 92190075Sobrien Zero means the frame pointer need not be set up (and parms 92290075Sobrien may be accessed via the stack pointer) in functions that seem suitable. 92390075Sobrien This is computed in `reload', in reload1.c. */ 92490075Sobrien#define FRAME_POINTER_REQUIRED 0 92590075Sobrien 92690075Sobrien/* Base register for access to arguments of the function. */ 92790075Sobrien#define ARG_POINTER_REGNUM 67 92890075Sobrien 92990075Sobrien/* Place to put static chain when calling a function that requires it. */ 93090075Sobrien#define STATIC_CHAIN_REGNUM 11 93190075Sobrien 93290075Sobrien/* Link register number. */ 93390075Sobrien#define LINK_REGISTER_REGNUM 65 93490075Sobrien 93590075Sobrien/* Count register number. */ 93690075Sobrien#define COUNT_REGISTER_REGNUM 66 93790075Sobrien 93890075Sobrien/* Define the classes of registers for register constraints in the 93990075Sobrien machine description. Also define ranges of constants. 94090075Sobrien 94190075Sobrien One of the classes must always be named ALL_REGS and include all hard regs. 94290075Sobrien If there is more than one class, another class must be named NO_REGS 94390075Sobrien and contain no registers. 94490075Sobrien 94590075Sobrien The name GENERAL_REGS must be the name of a class (or an alias for 94690075Sobrien another name such as ALL_REGS). This is the class of registers 94790075Sobrien that is allowed by "g" or "r" in a register constraint. 94890075Sobrien Also, registers outside this class are allocated only when 94990075Sobrien instructions express preferences for them. 95090075Sobrien 95190075Sobrien The classes must be numbered in nondecreasing order; that is, 95290075Sobrien a larger-numbered class must never be contained completely 95390075Sobrien in a smaller-numbered class. 95490075Sobrien 95590075Sobrien For any two classes, it is very desirable that there be another 95690075Sobrien class that represents their union. */ 95790075Sobrien 95890075Sobrien/* The RS/6000 has three types of registers, fixed-point, floating-point, 95990075Sobrien and condition registers, plus three special registers, MQ, CTR, and the 960132718Skan link register. AltiVec adds a vector register class. 96190075Sobrien 96290075Sobrien However, r0 is special in that it cannot be used as a base register. 96390075Sobrien So make a class for registers valid as base registers. 96490075Sobrien 96590075Sobrien Also, cr0 is the only condition code register that can be used in 96690075Sobrien arithmetic insns, so make a separate class for it. */ 96790075Sobrien 96890075Sobrienenum reg_class 96990075Sobrien{ 97090075Sobrien NO_REGS, 97190075Sobrien BASE_REGS, 97290075Sobrien GENERAL_REGS, 97390075Sobrien FLOAT_REGS, 97490075Sobrien ALTIVEC_REGS, 97590075Sobrien VRSAVE_REGS, 976117395Skan VSCR_REGS, 977117395Skan SPE_ACC_REGS, 978117395Skan SPEFSCR_REGS, 97990075Sobrien NON_SPECIAL_REGS, 98090075Sobrien MQ_REGS, 98190075Sobrien LINK_REGS, 98290075Sobrien CTR_REGS, 98390075Sobrien LINK_OR_CTR_REGS, 98490075Sobrien SPECIAL_REGS, 98590075Sobrien SPEC_OR_GEN_REGS, 98690075Sobrien CR0_REGS, 98790075Sobrien CR_REGS, 98890075Sobrien NON_FLOAT_REGS, 98990075Sobrien XER_REGS, 99090075Sobrien ALL_REGS, 99190075Sobrien LIM_REG_CLASSES 99290075Sobrien}; 99390075Sobrien 99490075Sobrien#define N_REG_CLASSES (int) LIM_REG_CLASSES 99590075Sobrien 99690075Sobrien/* Give names of register classes as strings for dump file. */ 99790075Sobrien 99890075Sobrien#define REG_CLASS_NAMES \ 99990075Sobrien{ \ 100090075Sobrien "NO_REGS", \ 100190075Sobrien "BASE_REGS", \ 100290075Sobrien "GENERAL_REGS", \ 100390075Sobrien "FLOAT_REGS", \ 100490075Sobrien "ALTIVEC_REGS", \ 100590075Sobrien "VRSAVE_REGS", \ 1006117395Skan "VSCR_REGS", \ 1007117395Skan "SPE_ACC_REGS", \ 1008117395Skan "SPEFSCR_REGS", \ 100990075Sobrien "NON_SPECIAL_REGS", \ 101090075Sobrien "MQ_REGS", \ 101190075Sobrien "LINK_REGS", \ 101290075Sobrien "CTR_REGS", \ 101390075Sobrien "LINK_OR_CTR_REGS", \ 101490075Sobrien "SPECIAL_REGS", \ 101590075Sobrien "SPEC_OR_GEN_REGS", \ 101690075Sobrien "CR0_REGS", \ 101790075Sobrien "CR_REGS", \ 101890075Sobrien "NON_FLOAT_REGS", \ 101990075Sobrien "XER_REGS", \ 102090075Sobrien "ALL_REGS" \ 102190075Sobrien} 102290075Sobrien 102390075Sobrien/* Define which registers fit in which classes. 102490075Sobrien This is an initializer for a vector of HARD_REG_SET 102590075Sobrien of length N_REG_CLASSES. */ 102690075Sobrien 102790075Sobrien#define REG_CLASS_CONTENTS \ 102890075Sobrien{ \ 102990075Sobrien { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \ 1030169689Skan { 0xfffffffe, 0x00000000, 0x00000008, 0x00020000 }, /* BASE_REGS */ \ 1031169689Skan { 0xffffffff, 0x00000000, 0x00000008, 0x00020000 }, /* GENERAL_REGS */ \ 103290075Sobrien { 0x00000000, 0xffffffff, 0x00000000, 0x00000000 }, /* FLOAT_REGS */ \ 103390075Sobrien { 0x00000000, 0x00000000, 0xffffe000, 0x00001fff }, /* ALTIVEC_REGS */ \ 103490075Sobrien { 0x00000000, 0x00000000, 0x00000000, 0x00002000 }, /* VRSAVE_REGS */ \ 1035117395Skan { 0x00000000, 0x00000000, 0x00000000, 0x00004000 }, /* VSCR_REGS */ \ 1036117395Skan { 0x00000000, 0x00000000, 0x00000000, 0x00008000 }, /* SPE_ACC_REGS */ \ 1037117395Skan { 0x00000000, 0x00000000, 0x00000000, 0x00010000 }, /* SPEFSCR_REGS */ \ 1038169689Skan { 0xffffffff, 0xffffffff, 0x00000008, 0x00020000 }, /* NON_SPECIAL_REGS */ \ 103990075Sobrien { 0x00000000, 0x00000000, 0x00000001, 0x00000000 }, /* MQ_REGS */ \ 104090075Sobrien { 0x00000000, 0x00000000, 0x00000002, 0x00000000 }, /* LINK_REGS */ \ 104190075Sobrien { 0x00000000, 0x00000000, 0x00000004, 0x00000000 }, /* CTR_REGS */ \ 104290075Sobrien { 0x00000000, 0x00000000, 0x00000006, 0x00000000 }, /* LINK_OR_CTR_REGS */ \ 104390075Sobrien { 0x00000000, 0x00000000, 0x00000007, 0x00002000 }, /* SPECIAL_REGS */ \ 1044169689Skan { 0xffffffff, 0x00000000, 0x0000000f, 0x00022000 }, /* SPEC_OR_GEN_REGS */ \ 104590075Sobrien { 0x00000000, 0x00000000, 0x00000010, 0x00000000 }, /* CR0_REGS */ \ 104690075Sobrien { 0x00000000, 0x00000000, 0x00000ff0, 0x00000000 }, /* CR_REGS */ \ 1047169689Skan { 0xffffffff, 0x00000000, 0x0000efff, 0x00020000 }, /* NON_FLOAT_REGS */ \ 104890075Sobrien { 0x00000000, 0x00000000, 0x00001000, 0x00000000 }, /* XER_REGS */ \ 1049169689Skan { 0xffffffff, 0xffffffff, 0xffffffff, 0x0003ffff } /* ALL_REGS */ \ 105090075Sobrien} 105190075Sobrien 105290075Sobrien/* The same information, inverted: 105390075Sobrien Return the class number of the smallest class containing 105490075Sobrien reg number REGNO. This could be a conditional expression 105590075Sobrien or could index an array. */ 105690075Sobrien 105790075Sobrien#define REGNO_REG_CLASS(REGNO) \ 105890075Sobrien ((REGNO) == 0 ? GENERAL_REGS \ 105990075Sobrien : (REGNO) < 32 ? BASE_REGS \ 106090075Sobrien : FP_REGNO_P (REGNO) ? FLOAT_REGS \ 106190075Sobrien : ALTIVEC_REGNO_P (REGNO) ? ALTIVEC_REGS \ 106290075Sobrien : (REGNO) == CR0_REGNO ? CR0_REGS \ 106390075Sobrien : CR_REGNO_P (REGNO) ? CR_REGS \ 106490075Sobrien : (REGNO) == MQ_REGNO ? MQ_REGS \ 106590075Sobrien : (REGNO) == LINK_REGISTER_REGNUM ? LINK_REGS \ 106690075Sobrien : (REGNO) == COUNT_REGISTER_REGNUM ? CTR_REGS \ 106790075Sobrien : (REGNO) == ARG_POINTER_REGNUM ? BASE_REGS \ 106890075Sobrien : (REGNO) == XER_REGNO ? XER_REGS \ 106990075Sobrien : (REGNO) == VRSAVE_REGNO ? VRSAVE_REGS \ 1070169689Skan : (REGNO) == VSCR_REGNO ? VRSAVE_REGS \ 1071117395Skan : (REGNO) == SPE_ACC_REGNO ? SPE_ACC_REGS \ 1072117395Skan : (REGNO) == SPEFSCR_REGNO ? SPEFSCR_REGS \ 1073169689Skan : (REGNO) == FRAME_POINTER_REGNUM ? BASE_REGS \ 107490075Sobrien : NO_REGS) 107590075Sobrien 107690075Sobrien/* The class value for index registers, and the one for base regs. */ 107790075Sobrien#define INDEX_REG_CLASS GENERAL_REGS 107890075Sobrien#define BASE_REG_CLASS BASE_REGS 107990075Sobrien 108090075Sobrien/* Given an rtx X being reloaded into a reg required to be 108190075Sobrien in class CLASS, return the class of reg to actually use. 108290075Sobrien In general this is just CLASS; but on some machines 108390075Sobrien in some cases it is preferable to use a more restrictive class. 108490075Sobrien 108590075Sobrien On the RS/6000, we have to return NO_REGS when we want to reload a 1086169689Skan floating-point CONST_DOUBLE to force it to be copied to memory. 108790075Sobrien 108890075Sobrien We also don't want to reload integer values into floating-point 108990075Sobrien registers if we can at all help it. In fact, this can 1090169689Skan cause reload to die, if it tries to generate a reload of CTR 109190075Sobrien into a FP register and discovers it doesn't have the memory location 109290075Sobrien required. 109390075Sobrien 109490075Sobrien ??? Would it be a good idea to have reload do the converse, that is 109590075Sobrien try to reload floating modes into FP registers if possible? 109690075Sobrien */ 109790075Sobrien 109890075Sobrien#define PREFERRED_RELOAD_CLASS(X,CLASS) \ 1099169689Skan ((CONSTANT_P (X) \ 1100169689Skan && reg_classes_intersect_p ((CLASS), FLOAT_REGS)) \ 1101169689Skan ? NO_REGS \ 1102169689Skan : (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \ 1103169689Skan && (CLASS) == NON_SPECIAL_REGS) \ 1104169689Skan ? GENERAL_REGS \ 1105169689Skan : (CLASS)) 110690075Sobrien 110790075Sobrien/* Return the register class of a scratch register needed to copy IN into 110890075Sobrien or out of a register in CLASS in MODE. If it can be done directly, 110990075Sobrien NO_REGS is returned. */ 111090075Sobrien 1111169689Skan#define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ 1112169689Skan rs6000_secondary_reload_class (CLASS, MODE, IN) 111390075Sobrien 111490075Sobrien/* If we are copying between FP or AltiVec registers and anything 111590075Sobrien else, we need a memory location. */ 111690075Sobrien 111790075Sobrien#define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \ 111890075Sobrien ((CLASS1) != (CLASS2) && ((CLASS1) == FLOAT_REGS \ 111990075Sobrien || (CLASS2) == FLOAT_REGS \ 112090075Sobrien || (CLASS1) == ALTIVEC_REGS \ 112190075Sobrien || (CLASS2) == ALTIVEC_REGS)) 112290075Sobrien 112390075Sobrien/* Return the maximum number of consecutive registers 112490075Sobrien needed to represent mode MODE in a register of class CLASS. 112590075Sobrien 112690075Sobrien On RS/6000, this is the size of MODE in words, 112790075Sobrien except in the FP regs, where a single reg is enough for two words. */ 112890075Sobrien#define CLASS_MAX_NREGS(CLASS, MODE) \ 112990075Sobrien (((CLASS) == FLOAT_REGS) \ 113090075Sobrien ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \ 1131169689Skan : (TARGET_E500_DOUBLE && (CLASS) == GENERAL_REGS && (MODE) == DFmode) \ 1132169689Skan ? 1 \ 113390075Sobrien : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 113490075Sobrien 1135169689Skan/* Return nonzero if for CLASS a mode change from FROM to TO is invalid. */ 113690075Sobrien 1137169689Skan#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ 1138169689Skan (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ 1139169689Skan ? ((GET_MODE_SIZE (FROM) < 8 || GET_MODE_SIZE (TO) < 8 \ 1140169689Skan || TARGET_IEEEQUAD) \ 1141169689Skan && reg_classes_intersect_p (FLOAT_REGS, CLASS)) \ 1142169689Skan : (((TARGET_E500_DOUBLE \ 1143169689Skan && ((((TO) == DFmode) + ((FROM) == DFmode)) == 1 \ 1144169689Skan || (((TO) == DImode) + ((FROM) == DImode)) == 1)) \ 1145169689Skan || (TARGET_SPE \ 1146169689Skan && (SPE_VECTOR_MODE (FROM) + SPE_VECTOR_MODE (TO)) == 1)) \ 1147169689Skan && reg_classes_intersect_p (GENERAL_REGS, CLASS))) 114890075Sobrien 114990075Sobrien/* Stack layout; function entry, exit and calling. */ 115090075Sobrien 115190075Sobrien/* Enumeration to give which calling sequence to use. */ 115290075Sobrienenum rs6000_abi { 115390075Sobrien ABI_NONE, 115490075Sobrien ABI_AIX, /* IBM's AIX */ 115590075Sobrien ABI_V4, /* System V.4/eabi */ 115690075Sobrien ABI_DARWIN /* Apple's Darwin (OS X kernel) */ 115790075Sobrien}; 115890075Sobrien 115990075Sobrienextern enum rs6000_abi rs6000_current_abi; /* available for use by subtarget */ 116090075Sobrien 116190075Sobrien/* Define this if pushing a word on the stack 116290075Sobrien makes the stack pointer a smaller address. */ 116390075Sobrien#define STACK_GROWS_DOWNWARD 116490075Sobrien 1165132718Skan/* Offsets recorded in opcodes are a multiple of this alignment factor. */ 1166132718Skan#define DWARF_CIE_DATA_ALIGNMENT (-((int) (TARGET_32BIT ? 4 : 8))) 1167132718Skan 1168169689Skan/* Define this to nonzero if the nominal address of the stack frame 116990075Sobrien is at the high-address end of the local variables; 117090075Sobrien that is, each additional local variable allocated 117190075Sobrien goes at a more negative offset in the frame. 117290075Sobrien 117390075Sobrien On the RS/6000, we grow upwards, from the area after the outgoing 117490075Sobrien arguments. */ 1175169689Skan#define FRAME_GROWS_DOWNWARD (flag_stack_protect != 0) 117690075Sobrien 117790075Sobrien/* Size of the outgoing register save area */ 117890075Sobrien#define RS6000_REG_SAVE ((DEFAULT_ABI == ABI_AIX \ 117990075Sobrien || DEFAULT_ABI == ABI_DARWIN) \ 118090075Sobrien ? (TARGET_64BIT ? 64 : 32) \ 118190075Sobrien : 0) 118290075Sobrien 118390075Sobrien/* Size of the fixed area on the stack */ 118490075Sobrien#define RS6000_SAVE_AREA \ 1185132718Skan (((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN) ? 24 : 8) \ 118690075Sobrien << (TARGET_64BIT ? 1 : 0)) 118790075Sobrien 118890075Sobrien/* MEM representing address to save the TOC register */ 118990075Sobrien#define RS6000_SAVE_TOC gen_rtx_MEM (Pmode, \ 119090075Sobrien plus_constant (stack_pointer_rtx, \ 119190075Sobrien (TARGET_32BIT ? 20 : 40))) 119290075Sobrien 119390075Sobrien/* Align an address */ 119490075Sobrien#define RS6000_ALIGN(n,a) (((n) + (a) - 1) & ~((a) - 1)) 119590075Sobrien 119690075Sobrien/* Offset within stack frame to start allocating local variables at. 119790075Sobrien If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 119890075Sobrien first local allocated. Otherwise, it is the offset to the BEGINNING 119990075Sobrien of the first local allocated. 120090075Sobrien 120190075Sobrien On the RS/6000, the frame pointer is the same as the stack pointer, 120290075Sobrien except for dynamic allocations. So we start after the fixed area and 120390075Sobrien outgoing parameter area. */ 120490075Sobrien 120590075Sobrien#define STARTING_FRAME_OFFSET \ 1206169689Skan (FRAME_GROWS_DOWNWARD \ 1207169689Skan ? 0 \ 1208169689Skan : (RS6000_ALIGN (current_function_outgoing_args_size, \ 1209169689Skan TARGET_ALTIVEC ? 16 : 8) \ 1210169689Skan + RS6000_SAVE_AREA)) 121190075Sobrien 121290075Sobrien/* Offset from the stack pointer register to an item dynamically 121390075Sobrien allocated on the stack, e.g., by `alloca'. 121490075Sobrien 121590075Sobrien The default value for this macro is `STACK_POINTER_OFFSET' plus the 121690075Sobrien length of the outgoing arguments. The default is correct for most 121790075Sobrien machines. See `function.c' for details. */ 121890075Sobrien#define STACK_DYNAMIC_OFFSET(FUNDECL) \ 121990075Sobrien (RS6000_ALIGN (current_function_outgoing_args_size, \ 122090075Sobrien TARGET_ALTIVEC ? 16 : 8) \ 122190075Sobrien + (STACK_POINTER_OFFSET)) 122290075Sobrien 122390075Sobrien/* If we generate an insn to push BYTES bytes, 122490075Sobrien this says how many the stack pointer really advances by. 122590075Sobrien On RS/6000, don't define this because there are no push insns. */ 122690075Sobrien/* #define PUSH_ROUNDING(BYTES) */ 122790075Sobrien 122890075Sobrien/* Offset of first parameter from the argument pointer register value. 122990075Sobrien On the RS/6000, we define the argument pointer to the start of the fixed 123090075Sobrien area. */ 123190075Sobrien#define FIRST_PARM_OFFSET(FNDECL) RS6000_SAVE_AREA 123290075Sobrien 123390075Sobrien/* Offset from the argument pointer register value to the top of 123490075Sobrien stack. This is different from FIRST_PARM_OFFSET because of the 123590075Sobrien register save area. */ 123690075Sobrien#define ARG_POINTER_CFA_OFFSET(FNDECL) 0 123790075Sobrien 123890075Sobrien/* Define this if stack space is still allocated for a parameter passed 123990075Sobrien in a register. The value is the number of bytes allocated to this 124090075Sobrien area. */ 124190075Sobrien#define REG_PARM_STACK_SPACE(FNDECL) RS6000_REG_SAVE 124290075Sobrien 124390075Sobrien/* Define this if the above stack space is to be considered part of the 124490075Sobrien space allocated by the caller. */ 124590075Sobrien#define OUTGOING_REG_PARM_STACK_SPACE 124690075Sobrien 124790075Sobrien/* This is the difference between the logical top of stack and the actual sp. 124890075Sobrien 124990075Sobrien For the RS/6000, sp points past the fixed area. */ 125090075Sobrien#define STACK_POINTER_OFFSET RS6000_SAVE_AREA 125190075Sobrien 125290075Sobrien/* Define this if the maximum size of all the outgoing args is to be 125390075Sobrien accumulated and pushed during the prologue. The amount can be 125490075Sobrien found in the variable current_function_outgoing_args_size. */ 125590075Sobrien#define ACCUMULATE_OUTGOING_ARGS 1 125690075Sobrien 125790075Sobrien/* Value is the number of bytes of arguments automatically 125890075Sobrien popped when returning from a subroutine call. 125990075Sobrien FUNDECL is the declaration node of the function (as a tree), 126090075Sobrien FUNTYPE is the data type of the function (as a tree), 126190075Sobrien or for a library call it is an identifier node for the subroutine name. 126290075Sobrien SIZE is the number of bytes of arguments passed on the stack. */ 126390075Sobrien 126490075Sobrien#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 126590075Sobrien 126690075Sobrien/* Define how to find the value returned by a function. 126790075Sobrien VALTYPE is the data type of the value (as a tree). 126890075Sobrien If the precise function being called is known, FUNC is its FUNCTION_DECL; 1269132718Skan otherwise, FUNC is 0. */ 127090075Sobrien 1271132718Skan#define FUNCTION_VALUE(VALTYPE, FUNC) rs6000_function_value ((VALTYPE), (FUNC)) 1272117395Skan 127390075Sobrien/* Define how to find the value returned by a library function 127490075Sobrien assuming the value has mode MODE. */ 127590075Sobrien 1276132718Skan#define LIBCALL_VALUE(MODE) rs6000_libcall_value ((MODE)) 127790075Sobrien 127890075Sobrien/* DRAFT_V4_STRUCT_RET defaults off. */ 127990075Sobrien#define DRAFT_V4_STRUCT_RET 0 128090075Sobrien 1281169689Skan/* Let TARGET_RETURN_IN_MEMORY control what happens. */ 128290075Sobrien#define DEFAULT_PCC_STRUCT_RETURN 0 128390075Sobrien 128490075Sobrien/* Mode of stack savearea. 128590075Sobrien FUNCTION is VOIDmode because calling convention maintains SP. 128690075Sobrien BLOCK needs Pmode for SP. 128790075Sobrien NONLOCAL needs twice Pmode to maintain both backchain and SP. */ 128890075Sobrien#define STACK_SAVEAREA_MODE(LEVEL) \ 128990075Sobrien (LEVEL == SAVE_FUNCTION ? VOIDmode \ 129090075Sobrien : LEVEL == SAVE_NONLOCAL ? (TARGET_32BIT ? DImode : TImode) : Pmode) 129190075Sobrien 129290075Sobrien/* Minimum and maximum general purpose registers used to hold arguments. */ 129390075Sobrien#define GP_ARG_MIN_REG 3 129490075Sobrien#define GP_ARG_MAX_REG 10 129590075Sobrien#define GP_ARG_NUM_REG (GP_ARG_MAX_REG - GP_ARG_MIN_REG + 1) 129690075Sobrien 129790075Sobrien/* Minimum and maximum floating point registers used to hold arguments. */ 129890075Sobrien#define FP_ARG_MIN_REG 33 129990075Sobrien#define FP_ARG_AIX_MAX_REG 45 130090075Sobrien#define FP_ARG_V4_MAX_REG 40 130190075Sobrien#define FP_ARG_MAX_REG ((DEFAULT_ABI == ABI_AIX \ 130290075Sobrien || DEFAULT_ABI == ABI_DARWIN) \ 130390075Sobrien ? FP_ARG_AIX_MAX_REG : FP_ARG_V4_MAX_REG) 130490075Sobrien#define FP_ARG_NUM_REG (FP_ARG_MAX_REG - FP_ARG_MIN_REG + 1) 130590075Sobrien 130690075Sobrien/* Minimum and maximum AltiVec registers used to hold arguments. */ 130790075Sobrien#define ALTIVEC_ARG_MIN_REG (FIRST_ALTIVEC_REGNO + 2) 130890075Sobrien#define ALTIVEC_ARG_MAX_REG (ALTIVEC_ARG_MIN_REG + 11) 130990075Sobrien#define ALTIVEC_ARG_NUM_REG (ALTIVEC_ARG_MAX_REG - ALTIVEC_ARG_MIN_REG + 1) 131090075Sobrien 131190075Sobrien/* Return registers */ 131290075Sobrien#define GP_ARG_RETURN GP_ARG_MIN_REG 131390075Sobrien#define FP_ARG_RETURN FP_ARG_MIN_REG 131490075Sobrien#define ALTIVEC_ARG_RETURN (FIRST_ALTIVEC_REGNO + 2) 131590075Sobrien 131690075Sobrien/* Flags for the call/call_value rtl operations set up by function_arg */ 131790075Sobrien#define CALL_NORMAL 0x00000000 /* no special processing */ 131890075Sobrien/* Bits in 0x00000001 are unused. */ 131990075Sobrien#define CALL_V4_CLEAR_FP_ARGS 0x00000002 /* V.4, no FP args passed */ 132090075Sobrien#define CALL_V4_SET_FP_ARGS 0x00000004 /* V.4, FP args were passed */ 132190075Sobrien#define CALL_LONG 0x00000008 /* always call indirect */ 1322117395Skan#define CALL_LIBCALL 0x00000010 /* libcall */ 132390075Sobrien 1324169689Skan/* We don't have prologue and epilogue functions to save/restore 1325169689Skan everything for most ABIs. */ 1326169689Skan#define WORLD_SAVE_P(INFO) 0 1327169689Skan 132890075Sobrien/* 1 if N is a possible register number for a function value 132990075Sobrien as seen by the caller. 133090075Sobrien 133190075Sobrien On RS/6000, this is r3, fp1, and v2 (for AltiVec). */ 1332117395Skan#define FUNCTION_VALUE_REGNO_P(N) \ 1333117395Skan ((N) == GP_ARG_RETURN \ 1334169689Skan || ((N) == FP_ARG_RETURN && TARGET_HARD_FLOAT && TARGET_FPRS) \ 1335132718Skan || ((N) == ALTIVEC_ARG_RETURN && TARGET_ALTIVEC && TARGET_ALTIVEC_ABI)) 133690075Sobrien 133790075Sobrien/* 1 if N is a possible register number for function argument passing. 133890075Sobrien On RS/6000, these are r3-r10 and fp1-fp13. 133990075Sobrien On AltiVec, v2 - v13 are used for passing vectors. */ 134090075Sobrien#define FUNCTION_ARG_REGNO_P(N) \ 1341117395Skan ((unsigned) (N) - GP_ARG_MIN_REG < GP_ARG_NUM_REG \ 1342117395Skan || ((unsigned) (N) - ALTIVEC_ARG_MIN_REG < ALTIVEC_ARG_NUM_REG \ 1343132718Skan && TARGET_ALTIVEC && TARGET_ALTIVEC_ABI) \ 1344117395Skan || ((unsigned) (N) - FP_ARG_MIN_REG < FP_ARG_NUM_REG \ 1345169689Skan && TARGET_HARD_FLOAT && TARGET_FPRS)) 134690075Sobrien 134790075Sobrien/* Define a data type for recording info about an argument list 134890075Sobrien during the scan of that argument list. This data type should 134990075Sobrien hold all necessary information about the function itself 135090075Sobrien and about the args processed so far, enough to enable macros 135190075Sobrien such as FUNCTION_ARG to determine where the next arg should go. 135290075Sobrien 135390075Sobrien On the RS/6000, this is a structure. The first element is the number of 135490075Sobrien total argument words, the second is used to store the next 135590075Sobrien floating-point register number, and the third says how many more args we 135690075Sobrien have prototype types for. 135790075Sobrien 135890075Sobrien For ABI_V4, we treat these slightly differently -- `sysv_gregno' is 1359132718Skan the next available GP register, `fregno' is the next available FP 136090075Sobrien register, and `words' is the number of words used on the stack. 136190075Sobrien 136290075Sobrien The varargs/stdarg support requires that this structure's size 136390075Sobrien be a multiple of sizeof(int). */ 136490075Sobrien 136590075Sobrientypedef struct rs6000_args 136690075Sobrien{ 136790075Sobrien int words; /* # words used for passing GP registers */ 136890075Sobrien int fregno; /* next available FP register */ 136990075Sobrien int vregno; /* next available AltiVec register */ 137090075Sobrien int nargs_prototype; /* # args left in the current prototype */ 137190075Sobrien int prototype; /* Whether a prototype was defined */ 1372132718Skan int stdarg; /* Whether function is a stdarg function. */ 137390075Sobrien int call_cookie; /* Do special things for this call */ 137490075Sobrien int sysv_gregno; /* next available GP register */ 1375169689Skan int intoffset; /* running offset in struct (darwin64) */ 1376169689Skan int use_stack; /* any part of struct on stack (darwin64) */ 1377169689Skan int named; /* false for varargs params */ 137890075Sobrien} CUMULATIVE_ARGS; 137990075Sobrien 138090075Sobrien/* Initialize a variable CUM of type CUMULATIVE_ARGS 138190075Sobrien for a call to a function whose data type is FNTYPE. 138290075Sobrien For a library call, FNTYPE is 0. */ 138390075Sobrien 1384132718Skan#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ 1385132718Skan init_cumulative_args (&CUM, FNTYPE, LIBNAME, FALSE, FALSE, N_NAMED_ARGS) 138690075Sobrien 138790075Sobrien/* Similar, but when scanning the definition of a procedure. We always 138890075Sobrien set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */ 138990075Sobrien 1390132718Skan#define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \ 1391132718Skan init_cumulative_args (&CUM, FNTYPE, LIBNAME, TRUE, FALSE, 1000) 139290075Sobrien 1393117395Skan/* Like INIT_CUMULATIVE_ARGS' but only used for outgoing libcalls. */ 1394117395Skan 1395117395Skan#define INIT_CUMULATIVE_LIBCALL_ARGS(CUM, MODE, LIBNAME) \ 1396132718Skan init_cumulative_args (&CUM, NULL_TREE, LIBNAME, FALSE, TRUE, 0) 1397117395Skan 139890075Sobrien/* Update the data in CUM to advance over an argument 139990075Sobrien of mode MODE and data type TYPE. 140090075Sobrien (TYPE is null for libcalls where that information may not be available.) */ 140190075Sobrien 140290075Sobrien#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 1403169689Skan function_arg_advance (&CUM, MODE, TYPE, NAMED, 0) 140490075Sobrien 140590075Sobrien/* Determine where to put an argument to a function. 140690075Sobrien Value is zero to push the argument on the stack, 140790075Sobrien or a hard register in which to store the argument. 140890075Sobrien 140990075Sobrien MODE is the argument's machine mode. 141090075Sobrien TYPE is the data type of the argument (as a tree). 141190075Sobrien This is null for libcalls where that information may 141290075Sobrien not be available. 141390075Sobrien CUM is a variable of type CUMULATIVE_ARGS which gives info about 141490075Sobrien the preceding args and about the function being called. 141590075Sobrien NAMED is nonzero if this argument is a named parameter 141690075Sobrien (otherwise it is an extra parameter matching an ellipsis). 141790075Sobrien 141890075Sobrien On RS/6000 the first eight words of non-FP are normally in registers 141990075Sobrien and the rest are pushed. The first 13 FP args are in registers. 142090075Sobrien 142190075Sobrien If this is floating-point and no prototype is specified, we use 142290075Sobrien both an FP and integer register (or possibly FP reg and stack). Library 142390075Sobrien functions (when TYPE is zero) always have the proper types for args, 142490075Sobrien so we can pass the FP value just in one register. emit_library_function 142590075Sobrien doesn't support EXPR_LIST anyway. */ 142690075Sobrien 142790075Sobrien#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 142890075Sobrien function_arg (&CUM, MODE, TYPE, NAMED) 142990075Sobrien 143090075Sobrien/* If defined, a C expression which determines whether, and in which 143190075Sobrien direction, to pad out an argument with extra space. The value 143290075Sobrien should be of type `enum direction': either `upward' to pad above 143390075Sobrien the argument, `downward' to pad below, or `none' to inhibit 143490075Sobrien padding. */ 143590075Sobrien 143690075Sobrien#define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding (MODE, TYPE) 143790075Sobrien 143890075Sobrien/* If defined, a C expression that gives the alignment boundary, in bits, 143990075Sobrien of an argument with the specified mode and type. If it is not defined, 144090075Sobrien PARM_BOUNDARY is used for all arguments. */ 144190075Sobrien 144290075Sobrien#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ 144390075Sobrien function_arg_boundary (MODE, TYPE) 144490075Sobrien 144590075Sobrien/* Implement `va_start' for varargs and stdarg. */ 1446117395Skan#define EXPAND_BUILTIN_VA_START(valist, nextarg) \ 1447117395Skan rs6000_va_start (valist, nextarg) 144890075Sobrien 1449132718Skan#define PAD_VARARGS_DOWN \ 1450132718Skan (FUNCTION_ARG_PADDING (TYPE_MODE (type), type) == downward) 145196263Sobrien 145290075Sobrien/* Output assembler code to FILE to increment profiler label # LABELNO 145390075Sobrien for profiling a function entry. */ 145490075Sobrien 145590075Sobrien#define FUNCTION_PROFILER(FILE, LABELNO) \ 145690075Sobrien output_function_profiler ((FILE), (LABELNO)); 145790075Sobrien 145890075Sobrien/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 145990075Sobrien the stack pointer does not matter. No definition is equivalent to 146090075Sobrien always zero. 146190075Sobrien 1462117395Skan On the RS/6000, this is nonzero because we can restore the stack from 146390075Sobrien its backpointer, which we maintain. */ 146490075Sobrien#define EXIT_IGNORE_STACK 1 146590075Sobrien 146690075Sobrien/* Define this macro as a C expression that is nonzero for registers 146790075Sobrien that are used by the epilogue or the return' pattern. The stack 146890075Sobrien and frame pointer registers are already be assumed to be used as 146990075Sobrien needed. */ 147090075Sobrien 147190075Sobrien#define EPILOGUE_USES(REGNO) \ 147290075Sobrien ((reload_completed && (REGNO) == LINK_REGISTER_REGNUM) \ 147396263Sobrien || (TARGET_ALTIVEC && (REGNO) == VRSAVE_REGNO) \ 147490075Sobrien || (current_function_calls_eh_return \ 147590075Sobrien && TARGET_AIX \ 1476117395Skan && (REGNO) == 2)) 147790075Sobrien 147890075Sobrien 147990075Sobrien/* TRAMPOLINE_TEMPLATE deleted */ 148090075Sobrien 148190075Sobrien/* Length in units of the trampoline for entering a nested function. */ 148290075Sobrien 148390075Sobrien#define TRAMPOLINE_SIZE rs6000_trampoline_size () 148490075Sobrien 148590075Sobrien/* Emit RTL insns to initialize the variable parts of a trampoline. 148690075Sobrien FNADDR is an RTX for the address of the function's pure code. 148790075Sobrien CXT is an RTX for the static chain value for the function. */ 148890075Sobrien 148990075Sobrien#define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \ 149090075Sobrien rs6000_initialize_trampoline (ADDR, FNADDR, CXT) 149190075Sobrien 149290075Sobrien/* Definitions for __builtin_return_address and __builtin_frame_address. 149390075Sobrien __builtin_return_address (0) should give link register (65), enable 149490075Sobrien this. */ 149590075Sobrien/* This should be uncommented, so that the link register is used, but 149690075Sobrien currently this would result in unmatched insns and spilling fixed 149790075Sobrien registers so we'll leave it for another day. When these problems are 149890075Sobrien taken care of one additional fetch will be necessary in RETURN_ADDR_RTX. 149990075Sobrien (mrs) */ 150090075Sobrien/* #define RETURN_ADDR_IN_PREVIOUS_FRAME */ 150190075Sobrien 150290075Sobrien/* Number of bytes into the frame return addresses can be found. See 150390075Sobrien rs6000_stack_info in rs6000.c for more information on how the different 150490075Sobrien abi's store the return address. */ 150590075Sobrien#define RETURN_ADDRESS_OFFSET \ 150690075Sobrien ((DEFAULT_ABI == ABI_AIX \ 1507132718Skan || DEFAULT_ABI == ABI_DARWIN) ? (TARGET_32BIT ? 8 : 16) : \ 150890075Sobrien (DEFAULT_ABI == ABI_V4) ? 4 : \ 150990075Sobrien (internal_error ("RETURN_ADDRESS_OFFSET not supported"), 0)) 151090075Sobrien 151190075Sobrien/* The current return address is in link register (65). The return address 151290075Sobrien of anything farther back is accessed normally at an offset of 8 from the 151390075Sobrien frame pointer. */ 151490075Sobrien#define RETURN_ADDR_RTX(COUNT, FRAME) \ 151590075Sobrien (rs6000_return_addr (COUNT, FRAME)) 151690075Sobrien 151790075Sobrien 151890075Sobrien/* Definitions for register eliminations. 151990075Sobrien 152090075Sobrien We have two registers that can be eliminated on the RS/6000. First, the 152190075Sobrien frame pointer register can often be eliminated in favor of the stack 152290075Sobrien pointer register. Secondly, the argument pointer register can always be 152390075Sobrien eliminated; it is replaced with either the stack or frame pointer. 152490075Sobrien 152590075Sobrien In addition, we use the elimination mechanism to see if r30 is needed 152690075Sobrien Initially we assume that it isn't. If it is, we spill it. This is done 152790075Sobrien by making it an eliminable register. We replace it with itself so that 152890075Sobrien if it isn't needed, then existing uses won't be modified. */ 152990075Sobrien 153090075Sobrien/* This is an array of structures. Each structure initializes one pair 153190075Sobrien of eliminable registers. The "from" register number is given first, 153290075Sobrien followed by "to". Eliminations of the same "from" register are listed 153390075Sobrien in order of preference. */ 1534169689Skan#define ELIMINABLE_REGS \ 1535169689Skan{{ HARD_FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 1536169689Skan { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 1537169689Skan { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ 1538169689Skan { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 1539169689Skan { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ 1540117395Skan { RS6000_PIC_OFFSET_TABLE_REGNUM, RS6000_PIC_OFFSET_TABLE_REGNUM } } 154190075Sobrien 154290075Sobrien/* Given FROM and TO register numbers, say whether this elimination is allowed. 154390075Sobrien Frame pointer elimination is automatically handled. 154490075Sobrien 154590075Sobrien For the RS/6000, if frame pointer elimination is being done, we would like 154690075Sobrien to convert ap into fp, not sp. 154790075Sobrien 154890075Sobrien We need r30 if -mminimal-toc was specified, and there are constant pool 154990075Sobrien references. */ 155090075Sobrien 1551117395Skan#define CAN_ELIMINATE(FROM, TO) \ 1552117395Skan ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ 1553117395Skan ? ! frame_pointer_needed \ 1554117395Skan : (FROM) == RS6000_PIC_OFFSET_TABLE_REGNUM \ 1555117395Skan ? ! TARGET_MINIMAL_TOC || TARGET_NO_TOC || get_pool_size () == 0 \ 155690075Sobrien : 1) 155790075Sobrien 155890075Sobrien/* Define the offset between two registers, one to be eliminated, and the other 155990075Sobrien its replacement, at the start of a routine. */ 1560132718Skan#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 1561132718Skan ((OFFSET) = rs6000_initial_elimination_offset(FROM, TO)) 156290075Sobrien 156390075Sobrien/* Addressing modes, and classification of registers for them. */ 156490075Sobrien 156590075Sobrien#define HAVE_PRE_DECREMENT 1 156690075Sobrien#define HAVE_PRE_INCREMENT 1 156790075Sobrien 156890075Sobrien/* Macros to check register numbers against specific register classes. */ 156990075Sobrien 157090075Sobrien/* These assume that REGNO is a hard or pseudo reg number. 157190075Sobrien They give nonzero only if REGNO is a hard reg of the suitable class 157290075Sobrien or a pseudo reg currently allocated to a suitable hard reg. 157390075Sobrien Since they use reg_renumber, they are safe only once reg_renumber 157490075Sobrien has been allocated, which happens in local-alloc.c. */ 157590075Sobrien 157690075Sobrien#define REGNO_OK_FOR_INDEX_P(REGNO) \ 157790075Sobrien((REGNO) < FIRST_PSEUDO_REGISTER \ 157890075Sobrien ? (REGNO) <= 31 || (REGNO) == 67 \ 1579169689Skan || (REGNO) == FRAME_POINTER_REGNUM \ 158090075Sobrien : (reg_renumber[REGNO] >= 0 \ 1581169689Skan && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67 \ 1582169689Skan || reg_renumber[REGNO] == FRAME_POINTER_REGNUM))) 158390075Sobrien 158490075Sobrien#define REGNO_OK_FOR_BASE_P(REGNO) \ 158590075Sobrien((REGNO) < FIRST_PSEUDO_REGISTER \ 158690075Sobrien ? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67 \ 1587169689Skan || (REGNO) == FRAME_POINTER_REGNUM \ 158890075Sobrien : (reg_renumber[REGNO] > 0 \ 1589169689Skan && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67 \ 1590169689Skan || reg_renumber[REGNO] == FRAME_POINTER_REGNUM))) 159190075Sobrien 159290075Sobrien/* Maximum number of registers that can appear in a valid memory address. */ 159390075Sobrien 159490075Sobrien#define MAX_REGS_PER_ADDRESS 2 159590075Sobrien 159690075Sobrien/* Recognize any constant value that is a valid address. */ 159790075Sobrien 159890075Sobrien#define CONSTANT_ADDRESS_P(X) \ 159990075Sobrien (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ 160090075Sobrien || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ 160190075Sobrien || GET_CODE (X) == HIGH) 160290075Sobrien 160390075Sobrien/* Nonzero if the constant value X is a legitimate general operand. 160490075Sobrien It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. 160590075Sobrien 160690075Sobrien On the RS/6000, all integer constants are acceptable, most won't be valid 160790075Sobrien for particular insns, though. Only easy FP constants are 160890075Sobrien acceptable. */ 160990075Sobrien 161090075Sobrien#define LEGITIMATE_CONSTANT_P(X) \ 1611132718Skan (((GET_CODE (X) != CONST_DOUBLE \ 1612132718Skan && GET_CODE (X) != CONST_VECTOR) \ 1613132718Skan || GET_MODE (X) == VOIDmode \ 1614132718Skan || (TARGET_POWERPC64 && GET_MODE (X) == DImode) \ 1615132718Skan || easy_fp_constant (X, GET_MODE (X)) \ 1616132718Skan || easy_vector_constant (X, GET_MODE (X))) \ 1617132718Skan && !rs6000_tls_referenced_p (X)) 161890075Sobrien 1619169689Skan#define EASY_VECTOR_15(n) ((n) >= -16 && (n) <= 15) 1620169689Skan#define EASY_VECTOR_15_ADD_SELF(n) (!EASY_VECTOR_15((n)) \ 1621169689Skan && EASY_VECTOR_15((n) >> 1) \ 1622169689Skan && ((n) & 1) == 0) 1623169689Skan 162490075Sobrien/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 162590075Sobrien and check its validity for a certain class. 162690075Sobrien We have two alternate definitions for each of them. 162790075Sobrien The usual definition accepts all pseudo regs; the other rejects 162890075Sobrien them unless they have been allocated suitable hard regs. 162990075Sobrien The symbol REG_OK_STRICT causes the latter definition to be used. 163090075Sobrien 163190075Sobrien Most source files want to accept pseudo regs in the hope that 163290075Sobrien they will get allocated to the class that the insn wants them to be in. 163390075Sobrien Source files for reload pass need to be strict. 163490075Sobrien After reload, it makes no difference, since pseudo regs have 163590075Sobrien been eliminated by then. */ 163690075Sobrien 163790075Sobrien#ifdef REG_OK_STRICT 163890075Sobrien# define REG_OK_STRICT_FLAG 1 163990075Sobrien#else 164090075Sobrien# define REG_OK_STRICT_FLAG 0 164190075Sobrien#endif 164290075Sobrien 164390075Sobrien/* Nonzero if X is a hard reg that can be used as an index 164490075Sobrien or if it is a pseudo reg in the non-strict case. */ 164590075Sobrien#define INT_REG_OK_FOR_INDEX_P(X, STRICT) \ 1646169689Skan ((!(STRICT) && REGNO (X) >= FIRST_PSEUDO_REGISTER) \ 1647169689Skan || REGNO_OK_FOR_INDEX_P (REGNO (X))) 164890075Sobrien 164990075Sobrien/* Nonzero if X is a hard reg that can be used as a base reg 165090075Sobrien or if it is a pseudo reg in the non-strict case. */ 165190075Sobrien#define INT_REG_OK_FOR_BASE_P(X, STRICT) \ 1652169689Skan ((!(STRICT) && REGNO (X) >= FIRST_PSEUDO_REGISTER) \ 1653169689Skan || REGNO_OK_FOR_BASE_P (REGNO (X))) 165490075Sobrien 165590075Sobrien#define REG_OK_FOR_INDEX_P(X) INT_REG_OK_FOR_INDEX_P (X, REG_OK_STRICT_FLAG) 165690075Sobrien#define REG_OK_FOR_BASE_P(X) INT_REG_OK_FOR_BASE_P (X, REG_OK_STRICT_FLAG) 165790075Sobrien 165890075Sobrien/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 165990075Sobrien that is a valid memory address for an instruction. 166090075Sobrien The MODE argument is the machine mode for the MEM expression 166190075Sobrien that wants to use this address. 166290075Sobrien 1663169689Skan On the RS/6000, there are four valid addresses: a SYMBOL_REF that 166490075Sobrien refers to a constant pool entry of an address (or the sum of it 166590075Sobrien plus a constant), a short (16-bit signed) constant plus a register, 166690075Sobrien the sum of two registers, or a register indirect, possibly with an 1667132718Skan auto-increment. For DFmode and DImode with a constant plus register, 166890075Sobrien we must ensure that both words are addressable or PowerPC64 with offset 166990075Sobrien word aligned. 167090075Sobrien 167190075Sobrien For modes spanning multiple registers (DFmode in 32-bit GPRs, 167290075Sobrien 32-bit DImode, TImode), indexed addressing cannot be used because 167390075Sobrien adjacent memory cells are accessed by adding word-sized offsets 167490075Sobrien during assembly output. */ 167590075Sobrien 167690075Sobrien#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 167790075Sobrien{ if (rs6000_legitimate_address (MODE, X, REG_OK_STRICT_FLAG)) \ 167890075Sobrien goto ADDR; \ 167990075Sobrien} 168090075Sobrien 168190075Sobrien/* Try machine-dependent ways of modifying an illegitimate address 168290075Sobrien to be legitimate. If we find one, return the new, valid address. 168390075Sobrien This macro is used in only one place: `memory_address' in explow.c. 168490075Sobrien 168590075Sobrien OLDX is the address as it was before break_out_memory_refs was called. 168690075Sobrien In some cases it is useful to look at this to decide what needs to be done. 168790075Sobrien 168890075Sobrien MODE and WIN are passed so that this macro can use 168990075Sobrien GO_IF_LEGITIMATE_ADDRESS. 169090075Sobrien 169190075Sobrien It is always safe for this macro to do nothing. It exists to recognize 169290075Sobrien opportunities to optimize the output. 169390075Sobrien 169490075Sobrien On RS/6000, first check for the sum of a register with a constant 169590075Sobrien integer that is out of range. If so, generate code to add the 169690075Sobrien constant with the low-order 16 bits masked to the register and force 169790075Sobrien this result into another register (this can be done with `cau'). 169890075Sobrien Then generate an address of REG+(CONST&0xffff), allowing for the 169990075Sobrien possibility of bit 16 being a one. 170090075Sobrien 170190075Sobrien Then check for the sum of a register and something not constant, try to 170290075Sobrien load the other things into a register and return the sum. */ 170390075Sobrien 170490075Sobrien#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ 170590075Sobrien{ rtx result = rs6000_legitimize_address (X, OLDX, MODE); \ 170690075Sobrien if (result != NULL_RTX) \ 170790075Sobrien { \ 170890075Sobrien (X) = result; \ 170990075Sobrien goto WIN; \ 171090075Sobrien } \ 171190075Sobrien} 171290075Sobrien 171390075Sobrien/* Try a machine-dependent way of reloading an illegitimate address 171490075Sobrien operand. If we find one, push the reload and jump to WIN. This 171590075Sobrien macro is used in only one place: `find_reloads_address' in reload.c. 171690075Sobrien 1717169689Skan Implemented on rs6000 by rs6000_legitimize_reload_address. 171890075Sobrien Note that (X) is evaluated twice; this is safe in current usage. */ 1719169689Skan 172090075Sobrien#define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_LEVELS,WIN) \ 172190075Sobriendo { \ 172290075Sobrien int win; \ 172390075Sobrien (X) = rs6000_legitimize_reload_address ((X), (MODE), (OPNUM), \ 172490075Sobrien (int)(TYPE), (IND_LEVELS), &win); \ 172590075Sobrien if ( win ) \ 172690075Sobrien goto WIN; \ 172790075Sobrien} while (0) 172890075Sobrien 172990075Sobrien/* Go to LABEL if ADDR (a legitimate address expression) 1730132718Skan has an effect that depends on the machine mode it is used for. */ 173190075Sobrien 173290075Sobrien#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ 1733132718Skando { \ 1734132718Skan if (rs6000_mode_dependent_address (ADDR)) \ 173590075Sobrien goto LABEL; \ 1736132718Skan} while (0) 173790075Sobrien 173890075Sobrien/* The register number of the register used to address a table of 173990075Sobrien static data addresses in memory. In some cases this register is 174090075Sobrien defined by a processor's "application binary interface" (ABI). 174190075Sobrien When this macro is defined, RTL is generated for this register 174290075Sobrien once, as with the stack pointer and frame pointer registers. If 174390075Sobrien this macro is not defined, it is up to the machine-dependent files 174490075Sobrien to allocate such a register (if necessary). */ 174590075Sobrien 174696263Sobrien#define RS6000_PIC_OFFSET_TABLE_REGNUM 30 174796263Sobrien#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? RS6000_PIC_OFFSET_TABLE_REGNUM : INVALID_REGNUM) 174890075Sobrien 1749117395Skan#define TOC_REGISTER (TARGET_MINIMAL_TOC ? RS6000_PIC_OFFSET_TABLE_REGNUM : 2) 175090075Sobrien 175190075Sobrien/* Define this macro if the register defined by 175290075Sobrien `PIC_OFFSET_TABLE_REGNUM' is clobbered by calls. Do not define 175390075Sobrien this macro if `PIC_OFFSET_TABLE_REGNUM' is not defined. */ 175490075Sobrien 175590075Sobrien/* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */ 175690075Sobrien 175790075Sobrien/* A C expression that is nonzero if X is a legitimate immediate 175890075Sobrien operand on the target machine when generating position independent 175990075Sobrien code. You can assume that X satisfies `CONSTANT_P', so you need 176090075Sobrien not check this. You can also assume FLAG_PIC is true, so you need 176190075Sobrien not check it either. You need not define this macro if all 176290075Sobrien constants (including `SYMBOL_REF') can be immediate operands when 176390075Sobrien generating position independent code. */ 176490075Sobrien 176590075Sobrien/* #define LEGITIMATE_PIC_OPERAND_P (X) */ 176690075Sobrien 176790075Sobrien/* Define this if some processing needs to be done immediately before 176890075Sobrien emitting code for an insn. */ 176990075Sobrien 177090075Sobrien/* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */ 177190075Sobrien 177290075Sobrien/* Specify the machine mode that this machine uses 177390075Sobrien for the index in the tablejump instruction. */ 177490075Sobrien#define CASE_VECTOR_MODE SImode 177590075Sobrien 177690075Sobrien/* Define as C expression which evaluates to nonzero if the tablejump 177790075Sobrien instruction expects the table to contain offsets from the address of the 177890075Sobrien table. 177990075Sobrien Do not define this if the table should contain absolute addresses. */ 178090075Sobrien#define CASE_VECTOR_PC_RELATIVE 1 178190075Sobrien 178290075Sobrien/* Define this as 1 if `char' should by default be signed; else as 0. */ 178390075Sobrien#define DEFAULT_SIGNED_CHAR 0 178490075Sobrien 178590075Sobrien/* This flag, if defined, says the same insns that convert to a signed fixnum 178690075Sobrien also convert validly to an unsigned one. */ 178790075Sobrien 178890075Sobrien/* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */ 178990075Sobrien 1790169689Skan/* An integer expression for the size in bits of the largest integer machine 1791169689Skan mode that should actually be used. */ 1792169689Skan 1793169689Skan/* Allow pairs of registers to be used, which is the intent of the default. */ 1794169689Skan#define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_POWERPC64 ? TImode : DImode) 1795169689Skan 179690075Sobrien/* Max number of bytes we can move from memory to memory 179790075Sobrien in one reasonably fast instruction. */ 179890075Sobrien#define MOVE_MAX (! TARGET_POWERPC64 ? 4 : 8) 179990075Sobrien#define MAX_MOVE_MAX 8 180090075Sobrien 180190075Sobrien/* Nonzero if access to memory by bytes is no faster than for words. 1802117395Skan Also nonzero if doing byte operations (specifically shifts) in registers 180390075Sobrien is undesirable. */ 180490075Sobrien#define SLOW_BYTE_ACCESS 1 180590075Sobrien 180690075Sobrien/* Define if operations between registers always perform the operation 180790075Sobrien on the full register even if a narrower mode is specified. */ 180890075Sobrien#define WORD_REGISTER_OPERATIONS 180990075Sobrien 181090075Sobrien/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD 181190075Sobrien will either zero-extend or sign-extend. The value of this macro should 181290075Sobrien be the code that says which one of the two operations is implicitly 1813169689Skan done, UNKNOWN if none. */ 181490075Sobrien#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND 181590075Sobrien 181690075Sobrien/* Define if loading short immediate values into registers sign extends. */ 181790075Sobrien#define SHORT_IMMEDIATES_SIGN_EXTEND 181890075Sobrien 181990075Sobrien/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 182090075Sobrien is done just by pretending it is already truncated. */ 182190075Sobrien#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 182290075Sobrien 1823132718Skan/* The cntlzw and cntlzd instructions return 32 and 64 for input of zero. */ 1824132718Skan#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \ 1825132718Skan ((VALUE) = ((MODE) == SImode ? 32 : 64)) 1826132718Skan 1827132718Skan/* The CTZ patterns return -1 for input of zero. */ 1828132718Skan#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = -1) 1829132718Skan 183090075Sobrien/* Specify the machine mode that pointers have. 183190075Sobrien After generation of rtl, the compiler makes no further distinction 183290075Sobrien between pointers and any other objects of this machine mode. */ 183390075Sobrien#define Pmode (TARGET_32BIT ? SImode : DImode) 183490075Sobrien 1835132718Skan/* Supply definition of STACK_SIZE_MODE for allocate_dynamic_stack_space. */ 1836132718Skan#define STACK_SIZE_MODE (TARGET_32BIT ? SImode : DImode) 1837132718Skan 183890075Sobrien/* Mode of a function address in a call instruction (for indexing purposes). 183990075Sobrien Doesn't matter on RS/6000. */ 1840132718Skan#define FUNCTION_MODE SImode 184190075Sobrien 184290075Sobrien/* Define this if addresses of constant functions 184390075Sobrien shouldn't be put through pseudo regs where they can be cse'd. 184490075Sobrien Desirable on machines where ordinary constants are expensive 184590075Sobrien but a CALL with constant address is cheap. */ 184690075Sobrien#define NO_FUNCTION_CSE 184790075Sobrien 184890075Sobrien/* Define this to be nonzero if shift instructions ignore all but the low-order 184990075Sobrien few bits. 185090075Sobrien 185190075Sobrien The sle and sre instructions which allow SHIFT_COUNT_TRUNCATED 185290075Sobrien have been dropped from the PowerPC architecture. */ 185390075Sobrien 185490075Sobrien#define SHIFT_COUNT_TRUNCATED (TARGET_POWER ? 1 : 0) 185590075Sobrien 185690075Sobrien/* Adjust the length of an INSN. LENGTH is the currently-computed length and 185790075Sobrien should be adjusted to reflect any required changes. This macro is used when 185890075Sobrien there is some systematic length adjustment required that would be difficult 185990075Sobrien to express in the length attribute. */ 186090075Sobrien 186190075Sobrien/* #define ADJUST_INSN_LENGTH(X,LENGTH) */ 186290075Sobrien 186390075Sobrien/* Given a comparison code (EQ, NE, etc.) and the first operand of a 186490075Sobrien COMPARE, return the mode to be used for the comparison. For 186590075Sobrien floating-point, CCFPmode should be used. CCUNSmode should be used 186690075Sobrien for unsigned comparisons. CCEQmode should be used when we are 186790075Sobrien doing an inequality comparison on the result of a 186890075Sobrien comparison. CCmode should be used in all other cases. */ 186990075Sobrien 187090075Sobrien#define SELECT_CC_MODE(OP,X,Y) \ 1871169689Skan (SCALAR_FLOAT_MODE_P (GET_MODE (X)) ? CCFPmode \ 187290075Sobrien : (OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU ? CCUNSmode \ 1873169689Skan : (((OP) == EQ || (OP) == NE) && COMPARISON_P (X) \ 187490075Sobrien ? CCEQmode : CCmode)) 187590075Sobrien 1876132718Skan/* Can the condition code MODE be safely reversed? This is safe in 1877132718Skan all cases on this port, because at present it doesn't use the 1878132718Skan trapping FP comparisons (fcmpo). */ 1879132718Skan#define REVERSIBLE_CC_MODE(MODE) 1 1880132718Skan 1881132718Skan/* Given a condition code and a mode, return the inverse condition. */ 1882132718Skan#define REVERSE_CONDITION(CODE, MODE) rs6000_reverse_condition (MODE, CODE) 1883132718Skan 188490075Sobrien/* Define the information needed to generate branch and scc insns. This is 1885132718Skan stored from the compare operation. */ 188690075Sobrien 1887117395Skanextern GTY(()) rtx rs6000_compare_op0; 1888117395Skanextern GTY(()) rtx rs6000_compare_op1; 188990075Sobrienextern int rs6000_compare_fp_p; 189090075Sobrien 189190075Sobrien/* Control the assembler format that we output. */ 189290075Sobrien 189390075Sobrien/* A C string constant describing how to begin a comment in the target 189490075Sobrien assembler language. The compiler assumes that the comment will end at 189590075Sobrien the end of the line. */ 189690075Sobrien#define ASM_COMMENT_START " #" 189790075Sobrien 189890075Sobrien/* Flag to say the TOC is initialized */ 189990075Sobrienextern int toc_initialized; 190090075Sobrien 190190075Sobrien/* Macro to output a special constant pool entry. Go to WIN if we output 190290075Sobrien it. Otherwise, it is written the usual way. 190390075Sobrien 190490075Sobrien On the RS/6000, toc entries are handled this way. */ 190590075Sobrien 190690075Sobrien#define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, X, MODE, ALIGN, LABELNO, WIN) \ 190790075Sobrien{ if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X, MODE)) \ 190890075Sobrien { \ 190990075Sobrien output_toc (FILE, X, LABELNO, MODE); \ 191090075Sobrien goto WIN; \ 191190075Sobrien } \ 191290075Sobrien} 191390075Sobrien 191490075Sobrien#ifdef HAVE_GAS_WEAK 191590075Sobrien#define RS6000_WEAK 1 191690075Sobrien#else 191790075Sobrien#define RS6000_WEAK 0 191890075Sobrien#endif 191990075Sobrien 192096263Sobrien#if RS6000_WEAK 192196263Sobrien/* Used in lieu of ASM_WEAKEN_LABEL. */ 192296263Sobrien#define ASM_WEAKEN_DECL(FILE, DECL, NAME, VAL) \ 192396263Sobrien do \ 192496263Sobrien { \ 192596263Sobrien fputs ("\t.weak\t", (FILE)); \ 1926169689Skan RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ 192796263Sobrien if ((DECL) && TREE_CODE (DECL) == FUNCTION_DECL \ 1928169689Skan && DEFAULT_ABI == ABI_AIX && DOT_SYMBOLS) \ 192996263Sobrien { \ 1930102780Skan if (TARGET_XCOFF) \ 1931102780Skan fputs ("[DS]", (FILE)); \ 193296263Sobrien fputs ("\n\t.weak\t.", (FILE)); \ 1933102780Skan RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ 193496263Sobrien } \ 193596263Sobrien fputc ('\n', (FILE)); \ 193696263Sobrien if (VAL) \ 193796263Sobrien { \ 193896263Sobrien ASM_OUTPUT_DEF ((FILE), (NAME), (VAL)); \ 193996263Sobrien if ((DECL) && TREE_CODE (DECL) == FUNCTION_DECL \ 1940169689Skan && DEFAULT_ABI == ABI_AIX && DOT_SYMBOLS) \ 194196263Sobrien { \ 194296263Sobrien fputs ("\t.set\t.", (FILE)); \ 1943102780Skan RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ 194496263Sobrien fputs (",.", (FILE)); \ 1945102780Skan RS6000_OUTPUT_BASENAME ((FILE), (VAL)); \ 194696263Sobrien fputc ('\n', (FILE)); \ 194796263Sobrien } \ 194896263Sobrien } \ 194996263Sobrien } \ 195096263Sobrien while (0) 195196263Sobrien#endif 195290075Sobrien 1953169689Skan#if HAVE_GAS_WEAKREF 1954169689Skan#define ASM_OUTPUT_WEAKREF(FILE, DECL, NAME, VALUE) \ 1955169689Skan do \ 1956169689Skan { \ 1957169689Skan fputs ("\t.weakref\t", (FILE)); \ 1958169689Skan RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ 1959169689Skan fputs (", ", (FILE)); \ 1960169689Skan RS6000_OUTPUT_BASENAME ((FILE), (VALUE)); \ 1961169689Skan if ((DECL) && TREE_CODE (DECL) == FUNCTION_DECL \ 1962169689Skan && DEFAULT_ABI == ABI_AIX && DOT_SYMBOLS) \ 1963169689Skan { \ 1964169689Skan fputs ("\n\t.weakref\t.", (FILE)); \ 1965169689Skan RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ 1966169689Skan fputs (", .", (FILE)); \ 1967169689Skan RS6000_OUTPUT_BASENAME ((FILE), (VALUE)); \ 1968169689Skan } \ 1969169689Skan fputc ('\n', (FILE)); \ 1970169689Skan } while (0) 1971169689Skan#endif 1972169689Skan 197396263Sobrien/* This implements the `alias' attribute. */ 197496263Sobrien#undef ASM_OUTPUT_DEF_FROM_DECLS 197596263Sobrien#define ASM_OUTPUT_DEF_FROM_DECLS(FILE, DECL, TARGET) \ 197696263Sobrien do \ 197796263Sobrien { \ 197896263Sobrien const char *alias = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \ 197996263Sobrien const char *name = IDENTIFIER_POINTER (TARGET); \ 198096263Sobrien if (TREE_CODE (DECL) == FUNCTION_DECL \ 1981169689Skan && DEFAULT_ABI == ABI_AIX && DOT_SYMBOLS) \ 198296263Sobrien { \ 198396263Sobrien if (TREE_PUBLIC (DECL)) \ 198496263Sobrien { \ 198596263Sobrien if (!RS6000_WEAK || !DECL_WEAK (DECL)) \ 198696263Sobrien { \ 198796263Sobrien fputs ("\t.globl\t.", FILE); \ 1988102780Skan RS6000_OUTPUT_BASENAME (FILE, alias); \ 198996263Sobrien putc ('\n', FILE); \ 199096263Sobrien } \ 199196263Sobrien } \ 199296263Sobrien else if (TARGET_XCOFF) \ 199396263Sobrien { \ 199496263Sobrien fputs ("\t.lglobl\t.", FILE); \ 1995102780Skan RS6000_OUTPUT_BASENAME (FILE, alias); \ 199696263Sobrien putc ('\n', FILE); \ 199796263Sobrien } \ 199896263Sobrien fputs ("\t.set\t.", FILE); \ 1999102780Skan RS6000_OUTPUT_BASENAME (FILE, alias); \ 200096263Sobrien fputs (",.", FILE); \ 2001102780Skan RS6000_OUTPUT_BASENAME (FILE, name); \ 200296263Sobrien fputc ('\n', FILE); \ 200396263Sobrien } \ 200496263Sobrien ASM_OUTPUT_DEF (FILE, alias, name); \ 200596263Sobrien } \ 200696263Sobrien while (0) 200796263Sobrien 2008132718Skan#define TARGET_ASM_FILE_START rs6000_file_start 2009132718Skan 201090075Sobrien/* Output to assembler file text saying following lines 201190075Sobrien may contain character constants, extra white space, comments, etc. */ 201290075Sobrien 201390075Sobrien#define ASM_APP_ON "" 201490075Sobrien 201590075Sobrien/* Output to assembler file text saying following lines 201690075Sobrien no longer contain unusual constructs. */ 201790075Sobrien 201890075Sobrien#define ASM_APP_OFF "" 201990075Sobrien 202090075Sobrien/* How to refer to registers in assembler output. 202190075Sobrien This sequence is indexed by compiler's hard-register-number (see above). */ 202290075Sobrien 202390075Sobrienextern char rs6000_reg_names[][8]; /* register names (0 vs. %r0). */ 202490075Sobrien 202590075Sobrien#define REGISTER_NAMES \ 202690075Sobrien{ \ 202790075Sobrien &rs6000_reg_names[ 0][0], /* r0 */ \ 202890075Sobrien &rs6000_reg_names[ 1][0], /* r1 */ \ 202990075Sobrien &rs6000_reg_names[ 2][0], /* r2 */ \ 203090075Sobrien &rs6000_reg_names[ 3][0], /* r3 */ \ 203190075Sobrien &rs6000_reg_names[ 4][0], /* r4 */ \ 203290075Sobrien &rs6000_reg_names[ 5][0], /* r5 */ \ 203390075Sobrien &rs6000_reg_names[ 6][0], /* r6 */ \ 203490075Sobrien &rs6000_reg_names[ 7][0], /* r7 */ \ 203590075Sobrien &rs6000_reg_names[ 8][0], /* r8 */ \ 203690075Sobrien &rs6000_reg_names[ 9][0], /* r9 */ \ 203790075Sobrien &rs6000_reg_names[10][0], /* r10 */ \ 203890075Sobrien &rs6000_reg_names[11][0], /* r11 */ \ 203990075Sobrien &rs6000_reg_names[12][0], /* r12 */ \ 204090075Sobrien &rs6000_reg_names[13][0], /* r13 */ \ 204190075Sobrien &rs6000_reg_names[14][0], /* r14 */ \ 204290075Sobrien &rs6000_reg_names[15][0], /* r15 */ \ 204390075Sobrien &rs6000_reg_names[16][0], /* r16 */ \ 204490075Sobrien &rs6000_reg_names[17][0], /* r17 */ \ 204590075Sobrien &rs6000_reg_names[18][0], /* r18 */ \ 204690075Sobrien &rs6000_reg_names[19][0], /* r19 */ \ 204790075Sobrien &rs6000_reg_names[20][0], /* r20 */ \ 204890075Sobrien &rs6000_reg_names[21][0], /* r21 */ \ 204990075Sobrien &rs6000_reg_names[22][0], /* r22 */ \ 205090075Sobrien &rs6000_reg_names[23][0], /* r23 */ \ 205190075Sobrien &rs6000_reg_names[24][0], /* r24 */ \ 205290075Sobrien &rs6000_reg_names[25][0], /* r25 */ \ 205390075Sobrien &rs6000_reg_names[26][0], /* r26 */ \ 205490075Sobrien &rs6000_reg_names[27][0], /* r27 */ \ 205590075Sobrien &rs6000_reg_names[28][0], /* r28 */ \ 205690075Sobrien &rs6000_reg_names[29][0], /* r29 */ \ 205790075Sobrien &rs6000_reg_names[30][0], /* r30 */ \ 205890075Sobrien &rs6000_reg_names[31][0], /* r31 */ \ 205990075Sobrien \ 206090075Sobrien &rs6000_reg_names[32][0], /* fr0 */ \ 206190075Sobrien &rs6000_reg_names[33][0], /* fr1 */ \ 206290075Sobrien &rs6000_reg_names[34][0], /* fr2 */ \ 206390075Sobrien &rs6000_reg_names[35][0], /* fr3 */ \ 206490075Sobrien &rs6000_reg_names[36][0], /* fr4 */ \ 206590075Sobrien &rs6000_reg_names[37][0], /* fr5 */ \ 206690075Sobrien &rs6000_reg_names[38][0], /* fr6 */ \ 206790075Sobrien &rs6000_reg_names[39][0], /* fr7 */ \ 206890075Sobrien &rs6000_reg_names[40][0], /* fr8 */ \ 206990075Sobrien &rs6000_reg_names[41][0], /* fr9 */ \ 207090075Sobrien &rs6000_reg_names[42][0], /* fr10 */ \ 207190075Sobrien &rs6000_reg_names[43][0], /* fr11 */ \ 207290075Sobrien &rs6000_reg_names[44][0], /* fr12 */ \ 207390075Sobrien &rs6000_reg_names[45][0], /* fr13 */ \ 207490075Sobrien &rs6000_reg_names[46][0], /* fr14 */ \ 207590075Sobrien &rs6000_reg_names[47][0], /* fr15 */ \ 207690075Sobrien &rs6000_reg_names[48][0], /* fr16 */ \ 207790075Sobrien &rs6000_reg_names[49][0], /* fr17 */ \ 207890075Sobrien &rs6000_reg_names[50][0], /* fr18 */ \ 207990075Sobrien &rs6000_reg_names[51][0], /* fr19 */ \ 208090075Sobrien &rs6000_reg_names[52][0], /* fr20 */ \ 208190075Sobrien &rs6000_reg_names[53][0], /* fr21 */ \ 208290075Sobrien &rs6000_reg_names[54][0], /* fr22 */ \ 208390075Sobrien &rs6000_reg_names[55][0], /* fr23 */ \ 208490075Sobrien &rs6000_reg_names[56][0], /* fr24 */ \ 208590075Sobrien &rs6000_reg_names[57][0], /* fr25 */ \ 208690075Sobrien &rs6000_reg_names[58][0], /* fr26 */ \ 208790075Sobrien &rs6000_reg_names[59][0], /* fr27 */ \ 208890075Sobrien &rs6000_reg_names[60][0], /* fr28 */ \ 208990075Sobrien &rs6000_reg_names[61][0], /* fr29 */ \ 209090075Sobrien &rs6000_reg_names[62][0], /* fr30 */ \ 209190075Sobrien &rs6000_reg_names[63][0], /* fr31 */ \ 209290075Sobrien \ 209390075Sobrien &rs6000_reg_names[64][0], /* mq */ \ 209490075Sobrien &rs6000_reg_names[65][0], /* lr */ \ 209590075Sobrien &rs6000_reg_names[66][0], /* ctr */ \ 209690075Sobrien &rs6000_reg_names[67][0], /* ap */ \ 209790075Sobrien \ 209890075Sobrien &rs6000_reg_names[68][0], /* cr0 */ \ 209990075Sobrien &rs6000_reg_names[69][0], /* cr1 */ \ 210090075Sobrien &rs6000_reg_names[70][0], /* cr2 */ \ 210190075Sobrien &rs6000_reg_names[71][0], /* cr3 */ \ 210290075Sobrien &rs6000_reg_names[72][0], /* cr4 */ \ 210390075Sobrien &rs6000_reg_names[73][0], /* cr5 */ \ 210490075Sobrien &rs6000_reg_names[74][0], /* cr6 */ \ 210590075Sobrien &rs6000_reg_names[75][0], /* cr7 */ \ 210690075Sobrien \ 210790075Sobrien &rs6000_reg_names[76][0], /* xer */ \ 210890075Sobrien \ 210990075Sobrien &rs6000_reg_names[77][0], /* v0 */ \ 211090075Sobrien &rs6000_reg_names[78][0], /* v1 */ \ 211190075Sobrien &rs6000_reg_names[79][0], /* v2 */ \ 211290075Sobrien &rs6000_reg_names[80][0], /* v3 */ \ 211390075Sobrien &rs6000_reg_names[81][0], /* v4 */ \ 211490075Sobrien &rs6000_reg_names[82][0], /* v5 */ \ 211590075Sobrien &rs6000_reg_names[83][0], /* v6 */ \ 211690075Sobrien &rs6000_reg_names[84][0], /* v7 */ \ 211790075Sobrien &rs6000_reg_names[85][0], /* v8 */ \ 211890075Sobrien &rs6000_reg_names[86][0], /* v9 */ \ 211990075Sobrien &rs6000_reg_names[87][0], /* v10 */ \ 212090075Sobrien &rs6000_reg_names[88][0], /* v11 */ \ 212190075Sobrien &rs6000_reg_names[89][0], /* v12 */ \ 212290075Sobrien &rs6000_reg_names[90][0], /* v13 */ \ 212390075Sobrien &rs6000_reg_names[91][0], /* v14 */ \ 212490075Sobrien &rs6000_reg_names[92][0], /* v15 */ \ 212590075Sobrien &rs6000_reg_names[93][0], /* v16 */ \ 212690075Sobrien &rs6000_reg_names[94][0], /* v17 */ \ 212790075Sobrien &rs6000_reg_names[95][0], /* v18 */ \ 212890075Sobrien &rs6000_reg_names[96][0], /* v19 */ \ 212990075Sobrien &rs6000_reg_names[97][0], /* v20 */ \ 213090075Sobrien &rs6000_reg_names[98][0], /* v21 */ \ 213190075Sobrien &rs6000_reg_names[99][0], /* v22 */ \ 213290075Sobrien &rs6000_reg_names[100][0], /* v23 */ \ 213390075Sobrien &rs6000_reg_names[101][0], /* v24 */ \ 213490075Sobrien &rs6000_reg_names[102][0], /* v25 */ \ 213590075Sobrien &rs6000_reg_names[103][0], /* v26 */ \ 213690075Sobrien &rs6000_reg_names[104][0], /* v27 */ \ 213790075Sobrien &rs6000_reg_names[105][0], /* v28 */ \ 213890075Sobrien &rs6000_reg_names[106][0], /* v29 */ \ 213990075Sobrien &rs6000_reg_names[107][0], /* v30 */ \ 214090075Sobrien &rs6000_reg_names[108][0], /* v31 */ \ 214190075Sobrien &rs6000_reg_names[109][0], /* vrsave */ \ 2142117395Skan &rs6000_reg_names[110][0], /* vscr */ \ 2143117395Skan &rs6000_reg_names[111][0], /* spe_acc */ \ 2144117395Skan &rs6000_reg_names[112][0], /* spefscr */ \ 2145169689Skan &rs6000_reg_names[113][0], /* sfp */ \ 214690075Sobrien} 214790075Sobrien 214890075Sobrien/* Table of additional register names to use in user input. */ 214990075Sobrien 215090075Sobrien#define ADDITIONAL_REGISTER_NAMES \ 215190075Sobrien {{"r0", 0}, {"r1", 1}, {"r2", 2}, {"r3", 3}, \ 215290075Sobrien {"r4", 4}, {"r5", 5}, {"r6", 6}, {"r7", 7}, \ 215390075Sobrien {"r8", 8}, {"r9", 9}, {"r10", 10}, {"r11", 11}, \ 215490075Sobrien {"r12", 12}, {"r13", 13}, {"r14", 14}, {"r15", 15}, \ 215590075Sobrien {"r16", 16}, {"r17", 17}, {"r18", 18}, {"r19", 19}, \ 215690075Sobrien {"r20", 20}, {"r21", 21}, {"r22", 22}, {"r23", 23}, \ 215790075Sobrien {"r24", 24}, {"r25", 25}, {"r26", 26}, {"r27", 27}, \ 215890075Sobrien {"r28", 28}, {"r29", 29}, {"r30", 30}, {"r31", 31}, \ 215990075Sobrien {"fr0", 32}, {"fr1", 33}, {"fr2", 34}, {"fr3", 35}, \ 216090075Sobrien {"fr4", 36}, {"fr5", 37}, {"fr6", 38}, {"fr7", 39}, \ 216190075Sobrien {"fr8", 40}, {"fr9", 41}, {"fr10", 42}, {"fr11", 43}, \ 216290075Sobrien {"fr12", 44}, {"fr13", 45}, {"fr14", 46}, {"fr15", 47}, \ 216390075Sobrien {"fr16", 48}, {"fr17", 49}, {"fr18", 50}, {"fr19", 51}, \ 216490075Sobrien {"fr20", 52}, {"fr21", 53}, {"fr22", 54}, {"fr23", 55}, \ 216590075Sobrien {"fr24", 56}, {"fr25", 57}, {"fr26", 58}, {"fr27", 59}, \ 216690075Sobrien {"fr28", 60}, {"fr29", 61}, {"fr30", 62}, {"fr31", 63}, \ 216790075Sobrien {"v0", 77}, {"v1", 78}, {"v2", 79}, {"v3", 80}, \ 216890075Sobrien {"v4", 81}, {"v5", 82}, {"v6", 83}, {"v7", 84}, \ 216990075Sobrien {"v8", 85}, {"v9", 86}, {"v10", 87}, {"v11", 88}, \ 217090075Sobrien {"v12", 89}, {"v13", 90}, {"v14", 91}, {"v15", 92}, \ 217190075Sobrien {"v16", 93}, {"v17", 94}, {"v18", 95}, {"v19", 96}, \ 217290075Sobrien {"v20", 97}, {"v21", 98}, {"v22", 99}, {"v23", 100}, \ 217390075Sobrien {"v24", 101},{"v25", 102},{"v26", 103},{"v27", 104}, \ 217490075Sobrien {"v28", 105},{"v29", 106},{"v30", 107},{"v31", 108}, \ 2175117395Skan {"vrsave", 109}, {"vscr", 110}, \ 2176117395Skan {"spe_acc", 111}, {"spefscr", 112}, \ 217790075Sobrien /* no additional names for: mq, lr, ctr, ap */ \ 217890075Sobrien {"cr0", 68}, {"cr1", 69}, {"cr2", 70}, {"cr3", 71}, \ 217990075Sobrien {"cr4", 72}, {"cr5", 73}, {"cr6", 74}, {"cr7", 75}, \ 218090075Sobrien {"cc", 68}, {"sp", 1}, {"toc", 2} } 218190075Sobrien 218290075Sobrien/* Text to write out after a CALL that may be replaced by glue code by 218390075Sobrien the loader. This depends on the AIX version. */ 218490075Sobrien#define RS6000_CALL_GLUE "cror 31,31,31" 218590075Sobrien 218690075Sobrien/* This is how to output an element of a case-vector that is relative. */ 218790075Sobrien 218890075Sobrien#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 218990075Sobrien do { char buf[100]; \ 219090075Sobrien fputs ("\t.long ", FILE); \ 219190075Sobrien ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \ 219290075Sobrien assemble_name (FILE, buf); \ 219390075Sobrien putc ('-', FILE); \ 219490075Sobrien ASM_GENERATE_INTERNAL_LABEL (buf, "L", REL); \ 219590075Sobrien assemble_name (FILE, buf); \ 219690075Sobrien putc ('\n', FILE); \ 219790075Sobrien } while (0) 219890075Sobrien 219990075Sobrien/* This is how to output an assembler line 220090075Sobrien that says to advance the location counter 220190075Sobrien to a multiple of 2**LOG bytes. */ 220290075Sobrien 220390075Sobrien#define ASM_OUTPUT_ALIGN(FILE,LOG) \ 220490075Sobrien if ((LOG) != 0) \ 220590075Sobrien fprintf (FILE, "\t.align %d\n", (LOG)) 220690075Sobrien 220790075Sobrien/* Pick up the return address upon entry to a procedure. Used for 220890075Sobrien dwarf2 unwind information. This also enables the table driven 220990075Sobrien mechanism. */ 221090075Sobrien 221190075Sobrien#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM) 221290075Sobrien#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_REGISTER_REGNUM) 221390075Sobrien 221490075Sobrien/* Describe how we implement __builtin_eh_return. */ 221590075Sobrien#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 3 : INVALID_REGNUM) 221690075Sobrien#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 10) 221790075Sobrien 221890075Sobrien/* Print operand X (an rtx) in assembler syntax to file FILE. 221990075Sobrien CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 222090075Sobrien For `%' followed by punctuation, CODE is the punctuation and X is null. */ 222190075Sobrien 222290075Sobrien#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) 222390075Sobrien 222490075Sobrien/* Define which CODE values are valid. */ 222590075Sobrien 222690075Sobrien#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 2227132718Skan ((CODE) == '.' || (CODE) == '&') 222890075Sobrien 222990075Sobrien/* Print a memory address as an operand to reference that memory location. */ 223090075Sobrien 223190075Sobrien#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) 223290075Sobrien 223390075Sobrien/* uncomment for disabling the corresponding default options */ 223490075Sobrien/* #define MACHINE_no_sched_interblock */ 223590075Sobrien/* #define MACHINE_no_sched_speculative */ 223690075Sobrien/* #define MACHINE_no_sched_speculative_load */ 223790075Sobrien 223890075Sobrien/* General flags. */ 223990075Sobrienextern int flag_pic; 224090075Sobrienextern int optimize; 224190075Sobrienextern int flag_expensive_optimizations; 224290075Sobrienextern int frame_pointer_needed; 224390075Sobrien 224490075Sobrienenum rs6000_builtins 224590075Sobrien{ 224690075Sobrien /* AltiVec builtins. */ 224790075Sobrien ALTIVEC_BUILTIN_ST_INTERNAL_4si, 224890075Sobrien ALTIVEC_BUILTIN_LD_INTERNAL_4si, 224990075Sobrien ALTIVEC_BUILTIN_ST_INTERNAL_8hi, 225090075Sobrien ALTIVEC_BUILTIN_LD_INTERNAL_8hi, 225190075Sobrien ALTIVEC_BUILTIN_ST_INTERNAL_16qi, 225290075Sobrien ALTIVEC_BUILTIN_LD_INTERNAL_16qi, 225390075Sobrien ALTIVEC_BUILTIN_ST_INTERNAL_4sf, 225490075Sobrien ALTIVEC_BUILTIN_LD_INTERNAL_4sf, 225590075Sobrien ALTIVEC_BUILTIN_VADDUBM, 225690075Sobrien ALTIVEC_BUILTIN_VADDUHM, 225790075Sobrien ALTIVEC_BUILTIN_VADDUWM, 225890075Sobrien ALTIVEC_BUILTIN_VADDFP, 225990075Sobrien ALTIVEC_BUILTIN_VADDCUW, 226090075Sobrien ALTIVEC_BUILTIN_VADDUBS, 226190075Sobrien ALTIVEC_BUILTIN_VADDSBS, 226290075Sobrien ALTIVEC_BUILTIN_VADDUHS, 226390075Sobrien ALTIVEC_BUILTIN_VADDSHS, 226490075Sobrien ALTIVEC_BUILTIN_VADDUWS, 226590075Sobrien ALTIVEC_BUILTIN_VADDSWS, 226690075Sobrien ALTIVEC_BUILTIN_VAND, 226790075Sobrien ALTIVEC_BUILTIN_VANDC, 226890075Sobrien ALTIVEC_BUILTIN_VAVGUB, 226990075Sobrien ALTIVEC_BUILTIN_VAVGSB, 227090075Sobrien ALTIVEC_BUILTIN_VAVGUH, 227190075Sobrien ALTIVEC_BUILTIN_VAVGSH, 227290075Sobrien ALTIVEC_BUILTIN_VAVGUW, 227390075Sobrien ALTIVEC_BUILTIN_VAVGSW, 227490075Sobrien ALTIVEC_BUILTIN_VCFUX, 227590075Sobrien ALTIVEC_BUILTIN_VCFSX, 227690075Sobrien ALTIVEC_BUILTIN_VCTSXS, 227790075Sobrien ALTIVEC_BUILTIN_VCTUXS, 227890075Sobrien ALTIVEC_BUILTIN_VCMPBFP, 227990075Sobrien ALTIVEC_BUILTIN_VCMPEQUB, 228090075Sobrien ALTIVEC_BUILTIN_VCMPEQUH, 228190075Sobrien ALTIVEC_BUILTIN_VCMPEQUW, 228290075Sobrien ALTIVEC_BUILTIN_VCMPEQFP, 228390075Sobrien ALTIVEC_BUILTIN_VCMPGEFP, 228490075Sobrien ALTIVEC_BUILTIN_VCMPGTUB, 228590075Sobrien ALTIVEC_BUILTIN_VCMPGTSB, 228690075Sobrien ALTIVEC_BUILTIN_VCMPGTUH, 228790075Sobrien ALTIVEC_BUILTIN_VCMPGTSH, 228890075Sobrien ALTIVEC_BUILTIN_VCMPGTUW, 228990075Sobrien ALTIVEC_BUILTIN_VCMPGTSW, 229090075Sobrien ALTIVEC_BUILTIN_VCMPGTFP, 229190075Sobrien ALTIVEC_BUILTIN_VEXPTEFP, 229290075Sobrien ALTIVEC_BUILTIN_VLOGEFP, 229390075Sobrien ALTIVEC_BUILTIN_VMADDFP, 229490075Sobrien ALTIVEC_BUILTIN_VMAXUB, 229590075Sobrien ALTIVEC_BUILTIN_VMAXSB, 229690075Sobrien ALTIVEC_BUILTIN_VMAXUH, 229790075Sobrien ALTIVEC_BUILTIN_VMAXSH, 229890075Sobrien ALTIVEC_BUILTIN_VMAXUW, 229990075Sobrien ALTIVEC_BUILTIN_VMAXSW, 230090075Sobrien ALTIVEC_BUILTIN_VMAXFP, 230190075Sobrien ALTIVEC_BUILTIN_VMHADDSHS, 230290075Sobrien ALTIVEC_BUILTIN_VMHRADDSHS, 230390075Sobrien ALTIVEC_BUILTIN_VMLADDUHM, 230490075Sobrien ALTIVEC_BUILTIN_VMRGHB, 230590075Sobrien ALTIVEC_BUILTIN_VMRGHH, 230690075Sobrien ALTIVEC_BUILTIN_VMRGHW, 230790075Sobrien ALTIVEC_BUILTIN_VMRGLB, 230890075Sobrien ALTIVEC_BUILTIN_VMRGLH, 230990075Sobrien ALTIVEC_BUILTIN_VMRGLW, 231090075Sobrien ALTIVEC_BUILTIN_VMSUMUBM, 231190075Sobrien ALTIVEC_BUILTIN_VMSUMMBM, 231290075Sobrien ALTIVEC_BUILTIN_VMSUMUHM, 231390075Sobrien ALTIVEC_BUILTIN_VMSUMSHM, 231490075Sobrien ALTIVEC_BUILTIN_VMSUMUHS, 231590075Sobrien ALTIVEC_BUILTIN_VMSUMSHS, 231690075Sobrien ALTIVEC_BUILTIN_VMINUB, 231790075Sobrien ALTIVEC_BUILTIN_VMINSB, 231890075Sobrien ALTIVEC_BUILTIN_VMINUH, 231990075Sobrien ALTIVEC_BUILTIN_VMINSH, 232090075Sobrien ALTIVEC_BUILTIN_VMINUW, 232190075Sobrien ALTIVEC_BUILTIN_VMINSW, 232290075Sobrien ALTIVEC_BUILTIN_VMINFP, 232390075Sobrien ALTIVEC_BUILTIN_VMULEUB, 232490075Sobrien ALTIVEC_BUILTIN_VMULESB, 232590075Sobrien ALTIVEC_BUILTIN_VMULEUH, 232690075Sobrien ALTIVEC_BUILTIN_VMULESH, 232790075Sobrien ALTIVEC_BUILTIN_VMULOUB, 232890075Sobrien ALTIVEC_BUILTIN_VMULOSB, 232990075Sobrien ALTIVEC_BUILTIN_VMULOUH, 233090075Sobrien ALTIVEC_BUILTIN_VMULOSH, 233190075Sobrien ALTIVEC_BUILTIN_VNMSUBFP, 233290075Sobrien ALTIVEC_BUILTIN_VNOR, 233390075Sobrien ALTIVEC_BUILTIN_VOR, 233490075Sobrien ALTIVEC_BUILTIN_VSEL_4SI, 233590075Sobrien ALTIVEC_BUILTIN_VSEL_4SF, 233690075Sobrien ALTIVEC_BUILTIN_VSEL_8HI, 233790075Sobrien ALTIVEC_BUILTIN_VSEL_16QI, 233890075Sobrien ALTIVEC_BUILTIN_VPERM_4SI, 233990075Sobrien ALTIVEC_BUILTIN_VPERM_4SF, 234090075Sobrien ALTIVEC_BUILTIN_VPERM_8HI, 234190075Sobrien ALTIVEC_BUILTIN_VPERM_16QI, 234290075Sobrien ALTIVEC_BUILTIN_VPKUHUM, 234390075Sobrien ALTIVEC_BUILTIN_VPKUWUM, 234490075Sobrien ALTIVEC_BUILTIN_VPKPX, 234590075Sobrien ALTIVEC_BUILTIN_VPKUHSS, 234690075Sobrien ALTIVEC_BUILTIN_VPKSHSS, 234790075Sobrien ALTIVEC_BUILTIN_VPKUWSS, 234890075Sobrien ALTIVEC_BUILTIN_VPKSWSS, 234990075Sobrien ALTIVEC_BUILTIN_VPKUHUS, 235090075Sobrien ALTIVEC_BUILTIN_VPKSHUS, 235190075Sobrien ALTIVEC_BUILTIN_VPKUWUS, 235290075Sobrien ALTIVEC_BUILTIN_VPKSWUS, 235390075Sobrien ALTIVEC_BUILTIN_VREFP, 235490075Sobrien ALTIVEC_BUILTIN_VRFIM, 235590075Sobrien ALTIVEC_BUILTIN_VRFIN, 235690075Sobrien ALTIVEC_BUILTIN_VRFIP, 235790075Sobrien ALTIVEC_BUILTIN_VRFIZ, 235890075Sobrien ALTIVEC_BUILTIN_VRLB, 235990075Sobrien ALTIVEC_BUILTIN_VRLH, 236090075Sobrien ALTIVEC_BUILTIN_VRLW, 236190075Sobrien ALTIVEC_BUILTIN_VRSQRTEFP, 236290075Sobrien ALTIVEC_BUILTIN_VSLB, 236390075Sobrien ALTIVEC_BUILTIN_VSLH, 236490075Sobrien ALTIVEC_BUILTIN_VSLW, 236590075Sobrien ALTIVEC_BUILTIN_VSL, 236690075Sobrien ALTIVEC_BUILTIN_VSLO, 236790075Sobrien ALTIVEC_BUILTIN_VSPLTB, 236890075Sobrien ALTIVEC_BUILTIN_VSPLTH, 236990075Sobrien ALTIVEC_BUILTIN_VSPLTW, 237090075Sobrien ALTIVEC_BUILTIN_VSPLTISB, 237190075Sobrien ALTIVEC_BUILTIN_VSPLTISH, 237290075Sobrien ALTIVEC_BUILTIN_VSPLTISW, 237390075Sobrien ALTIVEC_BUILTIN_VSRB, 237490075Sobrien ALTIVEC_BUILTIN_VSRH, 237590075Sobrien ALTIVEC_BUILTIN_VSRW, 237690075Sobrien ALTIVEC_BUILTIN_VSRAB, 237790075Sobrien ALTIVEC_BUILTIN_VSRAH, 237890075Sobrien ALTIVEC_BUILTIN_VSRAW, 237990075Sobrien ALTIVEC_BUILTIN_VSR, 238090075Sobrien ALTIVEC_BUILTIN_VSRO, 238190075Sobrien ALTIVEC_BUILTIN_VSUBUBM, 238290075Sobrien ALTIVEC_BUILTIN_VSUBUHM, 238390075Sobrien ALTIVEC_BUILTIN_VSUBUWM, 238490075Sobrien ALTIVEC_BUILTIN_VSUBFP, 238590075Sobrien ALTIVEC_BUILTIN_VSUBCUW, 238690075Sobrien ALTIVEC_BUILTIN_VSUBUBS, 238790075Sobrien ALTIVEC_BUILTIN_VSUBSBS, 238890075Sobrien ALTIVEC_BUILTIN_VSUBUHS, 238990075Sobrien ALTIVEC_BUILTIN_VSUBSHS, 239090075Sobrien ALTIVEC_BUILTIN_VSUBUWS, 239190075Sobrien ALTIVEC_BUILTIN_VSUBSWS, 239290075Sobrien ALTIVEC_BUILTIN_VSUM4UBS, 239390075Sobrien ALTIVEC_BUILTIN_VSUM4SBS, 239490075Sobrien ALTIVEC_BUILTIN_VSUM4SHS, 239590075Sobrien ALTIVEC_BUILTIN_VSUM2SWS, 239690075Sobrien ALTIVEC_BUILTIN_VSUMSWS, 239790075Sobrien ALTIVEC_BUILTIN_VXOR, 239890075Sobrien ALTIVEC_BUILTIN_VSLDOI_16QI, 239990075Sobrien ALTIVEC_BUILTIN_VSLDOI_8HI, 240090075Sobrien ALTIVEC_BUILTIN_VSLDOI_4SI, 240190075Sobrien ALTIVEC_BUILTIN_VSLDOI_4SF, 240290075Sobrien ALTIVEC_BUILTIN_VUPKHSB, 240390075Sobrien ALTIVEC_BUILTIN_VUPKHPX, 240490075Sobrien ALTIVEC_BUILTIN_VUPKHSH, 240590075Sobrien ALTIVEC_BUILTIN_VUPKLSB, 240690075Sobrien ALTIVEC_BUILTIN_VUPKLPX, 240790075Sobrien ALTIVEC_BUILTIN_VUPKLSH, 240890075Sobrien ALTIVEC_BUILTIN_MTVSCR, 240990075Sobrien ALTIVEC_BUILTIN_MFVSCR, 241090075Sobrien ALTIVEC_BUILTIN_DSSALL, 241190075Sobrien ALTIVEC_BUILTIN_DSS, 241290075Sobrien ALTIVEC_BUILTIN_LVSL, 241390075Sobrien ALTIVEC_BUILTIN_LVSR, 241490075Sobrien ALTIVEC_BUILTIN_DSTT, 241590075Sobrien ALTIVEC_BUILTIN_DSTST, 241690075Sobrien ALTIVEC_BUILTIN_DSTSTT, 241790075Sobrien ALTIVEC_BUILTIN_DST, 241890075Sobrien ALTIVEC_BUILTIN_LVEBX, 241990075Sobrien ALTIVEC_BUILTIN_LVEHX, 242090075Sobrien ALTIVEC_BUILTIN_LVEWX, 242190075Sobrien ALTIVEC_BUILTIN_LVXL, 242290075Sobrien ALTIVEC_BUILTIN_LVX, 242390075Sobrien ALTIVEC_BUILTIN_STVX, 242490075Sobrien ALTIVEC_BUILTIN_STVEBX, 242590075Sobrien ALTIVEC_BUILTIN_STVEHX, 242690075Sobrien ALTIVEC_BUILTIN_STVEWX, 242796263Sobrien ALTIVEC_BUILTIN_STVXL, 242896263Sobrien ALTIVEC_BUILTIN_VCMPBFP_P, 242996263Sobrien ALTIVEC_BUILTIN_VCMPEQFP_P, 243096263Sobrien ALTIVEC_BUILTIN_VCMPEQUB_P, 243196263Sobrien ALTIVEC_BUILTIN_VCMPEQUH_P, 243296263Sobrien ALTIVEC_BUILTIN_VCMPEQUW_P, 243396263Sobrien ALTIVEC_BUILTIN_VCMPGEFP_P, 243496263Sobrien ALTIVEC_BUILTIN_VCMPGTFP_P, 243596263Sobrien ALTIVEC_BUILTIN_VCMPGTSB_P, 243696263Sobrien ALTIVEC_BUILTIN_VCMPGTSH_P, 243796263Sobrien ALTIVEC_BUILTIN_VCMPGTSW_P, 243896263Sobrien ALTIVEC_BUILTIN_VCMPGTUB_P, 243996263Sobrien ALTIVEC_BUILTIN_VCMPGTUH_P, 244096263Sobrien ALTIVEC_BUILTIN_VCMPGTUW_P, 244196263Sobrien ALTIVEC_BUILTIN_ABSS_V4SI, 244296263Sobrien ALTIVEC_BUILTIN_ABSS_V8HI, 244396263Sobrien ALTIVEC_BUILTIN_ABSS_V16QI, 244496263Sobrien ALTIVEC_BUILTIN_ABS_V4SI, 244596263Sobrien ALTIVEC_BUILTIN_ABS_V4SF, 244696263Sobrien ALTIVEC_BUILTIN_ABS_V8HI, 2447146895Skan ALTIVEC_BUILTIN_ABS_V16QI, 2448169689Skan ALTIVEC_BUILTIN_MASK_FOR_LOAD, 2449169689Skan ALTIVEC_BUILTIN_MASK_FOR_STORE, 2450169689Skan ALTIVEC_BUILTIN_VEC_INIT_V4SI, 2451169689Skan ALTIVEC_BUILTIN_VEC_INIT_V8HI, 2452169689Skan ALTIVEC_BUILTIN_VEC_INIT_V16QI, 2453169689Skan ALTIVEC_BUILTIN_VEC_INIT_V4SF, 2454169689Skan ALTIVEC_BUILTIN_VEC_SET_V4SI, 2455169689Skan ALTIVEC_BUILTIN_VEC_SET_V8HI, 2456169689Skan ALTIVEC_BUILTIN_VEC_SET_V16QI, 2457169689Skan ALTIVEC_BUILTIN_VEC_SET_V4SF, 2458169689Skan ALTIVEC_BUILTIN_VEC_EXT_V4SI, 2459169689Skan ALTIVEC_BUILTIN_VEC_EXT_V8HI, 2460169689Skan ALTIVEC_BUILTIN_VEC_EXT_V16QI, 2461169689Skan ALTIVEC_BUILTIN_VEC_EXT_V4SF, 2462169689Skan 2463169689Skan /* Altivec overloaded builtins. */ 2464169689Skan ALTIVEC_BUILTIN_VCMPEQ_P, 2465169689Skan ALTIVEC_BUILTIN_OVERLOADED_FIRST = ALTIVEC_BUILTIN_VCMPEQ_P, 2466169689Skan ALTIVEC_BUILTIN_VCMPGT_P, 2467169689Skan ALTIVEC_BUILTIN_VCMPGE_P, 2468169689Skan ALTIVEC_BUILTIN_VEC_ABS, 2469169689Skan ALTIVEC_BUILTIN_VEC_ABSS, 2470169689Skan ALTIVEC_BUILTIN_VEC_ADD, 2471169689Skan ALTIVEC_BUILTIN_VEC_ADDC, 2472169689Skan ALTIVEC_BUILTIN_VEC_ADDS, 2473169689Skan ALTIVEC_BUILTIN_VEC_AND, 2474169689Skan ALTIVEC_BUILTIN_VEC_ANDC, 2475169689Skan ALTIVEC_BUILTIN_VEC_AVG, 2476169689Skan ALTIVEC_BUILTIN_VEC_CEIL, 2477169689Skan ALTIVEC_BUILTIN_VEC_CMPB, 2478169689Skan ALTIVEC_BUILTIN_VEC_CMPEQ, 2479169689Skan ALTIVEC_BUILTIN_VEC_CMPEQUB, 2480169689Skan ALTIVEC_BUILTIN_VEC_CMPEQUH, 2481169689Skan ALTIVEC_BUILTIN_VEC_CMPEQUW, 2482169689Skan ALTIVEC_BUILTIN_VEC_CMPGE, 2483169689Skan ALTIVEC_BUILTIN_VEC_CMPGT, 2484169689Skan ALTIVEC_BUILTIN_VEC_CMPLE, 2485169689Skan ALTIVEC_BUILTIN_VEC_CMPLT, 2486169689Skan ALTIVEC_BUILTIN_VEC_CTF, 2487169689Skan ALTIVEC_BUILTIN_VEC_CTS, 2488169689Skan ALTIVEC_BUILTIN_VEC_CTU, 2489169689Skan ALTIVEC_BUILTIN_VEC_DST, 2490169689Skan ALTIVEC_BUILTIN_VEC_DSTST, 2491169689Skan ALTIVEC_BUILTIN_VEC_DSTSTT, 2492169689Skan ALTIVEC_BUILTIN_VEC_DSTT, 2493169689Skan ALTIVEC_BUILTIN_VEC_EXPTE, 2494169689Skan ALTIVEC_BUILTIN_VEC_FLOOR, 2495169689Skan ALTIVEC_BUILTIN_VEC_LD, 2496169689Skan ALTIVEC_BUILTIN_VEC_LDE, 2497169689Skan ALTIVEC_BUILTIN_VEC_LDL, 2498169689Skan ALTIVEC_BUILTIN_VEC_LOGE, 2499169689Skan ALTIVEC_BUILTIN_VEC_LVEBX, 2500169689Skan ALTIVEC_BUILTIN_VEC_LVEHX, 2501169689Skan ALTIVEC_BUILTIN_VEC_LVEWX, 2502169689Skan ALTIVEC_BUILTIN_VEC_LVSL, 2503169689Skan ALTIVEC_BUILTIN_VEC_LVSR, 2504169689Skan ALTIVEC_BUILTIN_VEC_MADD, 2505169689Skan ALTIVEC_BUILTIN_VEC_MADDS, 2506169689Skan ALTIVEC_BUILTIN_VEC_MAX, 2507169689Skan ALTIVEC_BUILTIN_VEC_MERGEH, 2508169689Skan ALTIVEC_BUILTIN_VEC_MERGEL, 2509169689Skan ALTIVEC_BUILTIN_VEC_MIN, 2510169689Skan ALTIVEC_BUILTIN_VEC_MLADD, 2511169689Skan ALTIVEC_BUILTIN_VEC_MPERM, 2512169689Skan ALTIVEC_BUILTIN_VEC_MRADDS, 2513169689Skan ALTIVEC_BUILTIN_VEC_MRGHB, 2514169689Skan ALTIVEC_BUILTIN_VEC_MRGHH, 2515169689Skan ALTIVEC_BUILTIN_VEC_MRGHW, 2516169689Skan ALTIVEC_BUILTIN_VEC_MRGLB, 2517169689Skan ALTIVEC_BUILTIN_VEC_MRGLH, 2518169689Skan ALTIVEC_BUILTIN_VEC_MRGLW, 2519169689Skan ALTIVEC_BUILTIN_VEC_MSUM, 2520169689Skan ALTIVEC_BUILTIN_VEC_MSUMS, 2521169689Skan ALTIVEC_BUILTIN_VEC_MTVSCR, 2522169689Skan ALTIVEC_BUILTIN_VEC_MULE, 2523169689Skan ALTIVEC_BUILTIN_VEC_MULO, 2524169689Skan ALTIVEC_BUILTIN_VEC_NMSUB, 2525169689Skan ALTIVEC_BUILTIN_VEC_NOR, 2526169689Skan ALTIVEC_BUILTIN_VEC_OR, 2527169689Skan ALTIVEC_BUILTIN_VEC_PACK, 2528169689Skan ALTIVEC_BUILTIN_VEC_PACKPX, 2529169689Skan ALTIVEC_BUILTIN_VEC_PACKS, 2530169689Skan ALTIVEC_BUILTIN_VEC_PACKSU, 2531169689Skan ALTIVEC_BUILTIN_VEC_PERM, 2532169689Skan ALTIVEC_BUILTIN_VEC_RE, 2533169689Skan ALTIVEC_BUILTIN_VEC_RL, 2534169689Skan ALTIVEC_BUILTIN_VEC_ROUND, 2535169689Skan ALTIVEC_BUILTIN_VEC_RSQRTE, 2536169689Skan ALTIVEC_BUILTIN_VEC_SEL, 2537169689Skan ALTIVEC_BUILTIN_VEC_SL, 2538169689Skan ALTIVEC_BUILTIN_VEC_SLD, 2539169689Skan ALTIVEC_BUILTIN_VEC_SLL, 2540169689Skan ALTIVEC_BUILTIN_VEC_SLO, 2541169689Skan ALTIVEC_BUILTIN_VEC_SPLAT, 2542169689Skan ALTIVEC_BUILTIN_VEC_SPLAT_S16, 2543169689Skan ALTIVEC_BUILTIN_VEC_SPLAT_S32, 2544169689Skan ALTIVEC_BUILTIN_VEC_SPLAT_S8, 2545169689Skan ALTIVEC_BUILTIN_VEC_SPLAT_U16, 2546169689Skan ALTIVEC_BUILTIN_VEC_SPLAT_U32, 2547169689Skan ALTIVEC_BUILTIN_VEC_SPLAT_U8, 2548169689Skan ALTIVEC_BUILTIN_VEC_SPLTB, 2549169689Skan ALTIVEC_BUILTIN_VEC_SPLTH, 2550169689Skan ALTIVEC_BUILTIN_VEC_SPLTW, 2551169689Skan ALTIVEC_BUILTIN_VEC_SR, 2552169689Skan ALTIVEC_BUILTIN_VEC_SRA, 2553169689Skan ALTIVEC_BUILTIN_VEC_SRL, 2554169689Skan ALTIVEC_BUILTIN_VEC_SRO, 2555169689Skan ALTIVEC_BUILTIN_VEC_ST, 2556169689Skan ALTIVEC_BUILTIN_VEC_STE, 2557169689Skan ALTIVEC_BUILTIN_VEC_STL, 2558169689Skan ALTIVEC_BUILTIN_VEC_STVEBX, 2559169689Skan ALTIVEC_BUILTIN_VEC_STVEHX, 2560169689Skan ALTIVEC_BUILTIN_VEC_STVEWX, 2561169689Skan ALTIVEC_BUILTIN_VEC_SUB, 2562169689Skan ALTIVEC_BUILTIN_VEC_SUBC, 2563169689Skan ALTIVEC_BUILTIN_VEC_SUBS, 2564169689Skan ALTIVEC_BUILTIN_VEC_SUM2S, 2565169689Skan ALTIVEC_BUILTIN_VEC_SUM4S, 2566169689Skan ALTIVEC_BUILTIN_VEC_SUMS, 2567169689Skan ALTIVEC_BUILTIN_VEC_TRUNC, 2568169689Skan ALTIVEC_BUILTIN_VEC_UNPACKH, 2569169689Skan ALTIVEC_BUILTIN_VEC_UNPACKL, 2570169689Skan ALTIVEC_BUILTIN_VEC_VADDFP, 2571169689Skan ALTIVEC_BUILTIN_VEC_VADDSBS, 2572169689Skan ALTIVEC_BUILTIN_VEC_VADDSHS, 2573169689Skan ALTIVEC_BUILTIN_VEC_VADDSWS, 2574169689Skan ALTIVEC_BUILTIN_VEC_VADDUBM, 2575169689Skan ALTIVEC_BUILTIN_VEC_VADDUBS, 2576169689Skan ALTIVEC_BUILTIN_VEC_VADDUHM, 2577169689Skan ALTIVEC_BUILTIN_VEC_VADDUHS, 2578169689Skan ALTIVEC_BUILTIN_VEC_VADDUWM, 2579169689Skan ALTIVEC_BUILTIN_VEC_VADDUWS, 2580169689Skan ALTIVEC_BUILTIN_VEC_VAVGSB, 2581169689Skan ALTIVEC_BUILTIN_VEC_VAVGSH, 2582169689Skan ALTIVEC_BUILTIN_VEC_VAVGSW, 2583169689Skan ALTIVEC_BUILTIN_VEC_VAVGUB, 2584169689Skan ALTIVEC_BUILTIN_VEC_VAVGUH, 2585169689Skan ALTIVEC_BUILTIN_VEC_VAVGUW, 2586169689Skan ALTIVEC_BUILTIN_VEC_VCFSX, 2587169689Skan ALTIVEC_BUILTIN_VEC_VCFUX, 2588169689Skan ALTIVEC_BUILTIN_VEC_VCMPEQFP, 2589169689Skan ALTIVEC_BUILTIN_VEC_VCMPEQUB, 2590169689Skan ALTIVEC_BUILTIN_VEC_VCMPEQUH, 2591169689Skan ALTIVEC_BUILTIN_VEC_VCMPEQUW, 2592169689Skan ALTIVEC_BUILTIN_VEC_VCMPGTFP, 2593169689Skan ALTIVEC_BUILTIN_VEC_VCMPGTSB, 2594169689Skan ALTIVEC_BUILTIN_VEC_VCMPGTSH, 2595169689Skan ALTIVEC_BUILTIN_VEC_VCMPGTSW, 2596169689Skan ALTIVEC_BUILTIN_VEC_VCMPGTUB, 2597169689Skan ALTIVEC_BUILTIN_VEC_VCMPGTUH, 2598169689Skan ALTIVEC_BUILTIN_VEC_VCMPGTUW, 2599169689Skan ALTIVEC_BUILTIN_VEC_VMAXFP, 2600169689Skan ALTIVEC_BUILTIN_VEC_VMAXSB, 2601169689Skan ALTIVEC_BUILTIN_VEC_VMAXSH, 2602169689Skan ALTIVEC_BUILTIN_VEC_VMAXSW, 2603169689Skan ALTIVEC_BUILTIN_VEC_VMAXUB, 2604169689Skan ALTIVEC_BUILTIN_VEC_VMAXUH, 2605169689Skan ALTIVEC_BUILTIN_VEC_VMAXUW, 2606169689Skan ALTIVEC_BUILTIN_VEC_VMINFP, 2607169689Skan ALTIVEC_BUILTIN_VEC_VMINSB, 2608169689Skan ALTIVEC_BUILTIN_VEC_VMINSH, 2609169689Skan ALTIVEC_BUILTIN_VEC_VMINSW, 2610169689Skan ALTIVEC_BUILTIN_VEC_VMINUB, 2611169689Skan ALTIVEC_BUILTIN_VEC_VMINUH, 2612169689Skan ALTIVEC_BUILTIN_VEC_VMINUW, 2613169689Skan ALTIVEC_BUILTIN_VEC_VMRGHB, 2614169689Skan ALTIVEC_BUILTIN_VEC_VMRGHH, 2615169689Skan ALTIVEC_BUILTIN_VEC_VMRGHW, 2616169689Skan ALTIVEC_BUILTIN_VEC_VMRGLB, 2617169689Skan ALTIVEC_BUILTIN_VEC_VMRGLH, 2618169689Skan ALTIVEC_BUILTIN_VEC_VMRGLW, 2619169689Skan ALTIVEC_BUILTIN_VEC_VMSUMMBM, 2620169689Skan ALTIVEC_BUILTIN_VEC_VMSUMSHM, 2621169689Skan ALTIVEC_BUILTIN_VEC_VMSUMSHS, 2622169689Skan ALTIVEC_BUILTIN_VEC_VMSUMUBM, 2623169689Skan ALTIVEC_BUILTIN_VEC_VMSUMUHM, 2624169689Skan ALTIVEC_BUILTIN_VEC_VMSUMUHS, 2625169689Skan ALTIVEC_BUILTIN_VEC_VMULESB, 2626169689Skan ALTIVEC_BUILTIN_VEC_VMULESH, 2627169689Skan ALTIVEC_BUILTIN_VEC_VMULEUB, 2628169689Skan ALTIVEC_BUILTIN_VEC_VMULEUH, 2629169689Skan ALTIVEC_BUILTIN_VEC_VMULOSB, 2630169689Skan ALTIVEC_BUILTIN_VEC_VMULOSH, 2631169689Skan ALTIVEC_BUILTIN_VEC_VMULOUB, 2632169689Skan ALTIVEC_BUILTIN_VEC_VMULOUH, 2633169689Skan ALTIVEC_BUILTIN_VEC_VPKSHSS, 2634169689Skan ALTIVEC_BUILTIN_VEC_VPKSHUS, 2635169689Skan ALTIVEC_BUILTIN_VEC_VPKSWSS, 2636169689Skan ALTIVEC_BUILTIN_VEC_VPKSWUS, 2637169689Skan ALTIVEC_BUILTIN_VEC_VPKUHUM, 2638169689Skan ALTIVEC_BUILTIN_VEC_VPKUHUS, 2639169689Skan ALTIVEC_BUILTIN_VEC_VPKUWUM, 2640169689Skan ALTIVEC_BUILTIN_VEC_VPKUWUS, 2641169689Skan ALTIVEC_BUILTIN_VEC_VRLB, 2642169689Skan ALTIVEC_BUILTIN_VEC_VRLH, 2643169689Skan ALTIVEC_BUILTIN_VEC_VRLW, 2644169689Skan ALTIVEC_BUILTIN_VEC_VSLB, 2645169689Skan ALTIVEC_BUILTIN_VEC_VSLH, 2646169689Skan ALTIVEC_BUILTIN_VEC_VSLW, 2647169689Skan ALTIVEC_BUILTIN_VEC_VSPLTB, 2648169689Skan ALTIVEC_BUILTIN_VEC_VSPLTH, 2649169689Skan ALTIVEC_BUILTIN_VEC_VSPLTW, 2650169689Skan ALTIVEC_BUILTIN_VEC_VSRAB, 2651169689Skan ALTIVEC_BUILTIN_VEC_VSRAH, 2652169689Skan ALTIVEC_BUILTIN_VEC_VSRAW, 2653169689Skan ALTIVEC_BUILTIN_VEC_VSRB, 2654169689Skan ALTIVEC_BUILTIN_VEC_VSRH, 2655169689Skan ALTIVEC_BUILTIN_VEC_VSRW, 2656169689Skan ALTIVEC_BUILTIN_VEC_VSUBFP, 2657169689Skan ALTIVEC_BUILTIN_VEC_VSUBSBS, 2658169689Skan ALTIVEC_BUILTIN_VEC_VSUBSHS, 2659169689Skan ALTIVEC_BUILTIN_VEC_VSUBSWS, 2660169689Skan ALTIVEC_BUILTIN_VEC_VSUBUBM, 2661169689Skan ALTIVEC_BUILTIN_VEC_VSUBUBS, 2662169689Skan ALTIVEC_BUILTIN_VEC_VSUBUHM, 2663169689Skan ALTIVEC_BUILTIN_VEC_VSUBUHS, 2664169689Skan ALTIVEC_BUILTIN_VEC_VSUBUWM, 2665169689Skan ALTIVEC_BUILTIN_VEC_VSUBUWS, 2666169689Skan ALTIVEC_BUILTIN_VEC_VSUM4SBS, 2667169689Skan ALTIVEC_BUILTIN_VEC_VSUM4SHS, 2668169689Skan ALTIVEC_BUILTIN_VEC_VSUM4UBS, 2669169689Skan ALTIVEC_BUILTIN_VEC_VUPKHPX, 2670169689Skan ALTIVEC_BUILTIN_VEC_VUPKHSB, 2671169689Skan ALTIVEC_BUILTIN_VEC_VUPKHSH, 2672169689Skan ALTIVEC_BUILTIN_VEC_VUPKLPX, 2673169689Skan ALTIVEC_BUILTIN_VEC_VUPKLSB, 2674169689Skan ALTIVEC_BUILTIN_VEC_VUPKLSH, 2675169689Skan ALTIVEC_BUILTIN_VEC_XOR, 2676169689Skan ALTIVEC_BUILTIN_VEC_STEP, 2677169689Skan ALTIVEC_BUILTIN_OVERLOADED_LAST = ALTIVEC_BUILTIN_VEC_STEP, 2678169689Skan 2679117395Skan /* SPE builtins. */ 2680146895Skan SPE_BUILTIN_EVADDW, 2681117395Skan SPE_BUILTIN_EVAND, 2682117395Skan SPE_BUILTIN_EVANDC, 2683117395Skan SPE_BUILTIN_EVDIVWS, 2684117395Skan SPE_BUILTIN_EVDIVWU, 2685117395Skan SPE_BUILTIN_EVEQV, 2686117395Skan SPE_BUILTIN_EVFSADD, 2687117395Skan SPE_BUILTIN_EVFSDIV, 2688117395Skan SPE_BUILTIN_EVFSMUL, 2689117395Skan SPE_BUILTIN_EVFSSUB, 2690117395Skan SPE_BUILTIN_EVLDDX, 2691117395Skan SPE_BUILTIN_EVLDHX, 2692117395Skan SPE_BUILTIN_EVLDWX, 2693117395Skan SPE_BUILTIN_EVLHHESPLATX, 2694117395Skan SPE_BUILTIN_EVLHHOSSPLATX, 2695117395Skan SPE_BUILTIN_EVLHHOUSPLATX, 2696117395Skan SPE_BUILTIN_EVLWHEX, 2697117395Skan SPE_BUILTIN_EVLWHOSX, 2698117395Skan SPE_BUILTIN_EVLWHOUX, 2699117395Skan SPE_BUILTIN_EVLWHSPLATX, 2700117395Skan SPE_BUILTIN_EVLWWSPLATX, 2701117395Skan SPE_BUILTIN_EVMERGEHI, 2702117395Skan SPE_BUILTIN_EVMERGEHILO, 2703117395Skan SPE_BUILTIN_EVMERGELO, 2704117395Skan SPE_BUILTIN_EVMERGELOHI, 2705117395Skan SPE_BUILTIN_EVMHEGSMFAA, 2706117395Skan SPE_BUILTIN_EVMHEGSMFAN, 2707117395Skan SPE_BUILTIN_EVMHEGSMIAA, 2708117395Skan SPE_BUILTIN_EVMHEGSMIAN, 2709117395Skan SPE_BUILTIN_EVMHEGUMIAA, 2710117395Skan SPE_BUILTIN_EVMHEGUMIAN, 2711117395Skan SPE_BUILTIN_EVMHESMF, 2712117395Skan SPE_BUILTIN_EVMHESMFA, 2713117395Skan SPE_BUILTIN_EVMHESMFAAW, 2714117395Skan SPE_BUILTIN_EVMHESMFANW, 2715117395Skan SPE_BUILTIN_EVMHESMI, 2716117395Skan SPE_BUILTIN_EVMHESMIA, 2717117395Skan SPE_BUILTIN_EVMHESMIAAW, 2718117395Skan SPE_BUILTIN_EVMHESMIANW, 2719117395Skan SPE_BUILTIN_EVMHESSF, 2720117395Skan SPE_BUILTIN_EVMHESSFA, 2721117395Skan SPE_BUILTIN_EVMHESSFAAW, 2722117395Skan SPE_BUILTIN_EVMHESSFANW, 2723117395Skan SPE_BUILTIN_EVMHESSIAAW, 2724117395Skan SPE_BUILTIN_EVMHESSIANW, 2725117395Skan SPE_BUILTIN_EVMHEUMI, 2726117395Skan SPE_BUILTIN_EVMHEUMIA, 2727117395Skan SPE_BUILTIN_EVMHEUMIAAW, 2728117395Skan SPE_BUILTIN_EVMHEUMIANW, 2729117395Skan SPE_BUILTIN_EVMHEUSIAAW, 2730117395Skan SPE_BUILTIN_EVMHEUSIANW, 2731117395Skan SPE_BUILTIN_EVMHOGSMFAA, 2732117395Skan SPE_BUILTIN_EVMHOGSMFAN, 2733117395Skan SPE_BUILTIN_EVMHOGSMIAA, 2734117395Skan SPE_BUILTIN_EVMHOGSMIAN, 2735117395Skan SPE_BUILTIN_EVMHOGUMIAA, 2736117395Skan SPE_BUILTIN_EVMHOGUMIAN, 2737117395Skan SPE_BUILTIN_EVMHOSMF, 2738117395Skan SPE_BUILTIN_EVMHOSMFA, 2739117395Skan SPE_BUILTIN_EVMHOSMFAAW, 2740117395Skan SPE_BUILTIN_EVMHOSMFANW, 2741117395Skan SPE_BUILTIN_EVMHOSMI, 2742117395Skan SPE_BUILTIN_EVMHOSMIA, 2743117395Skan SPE_BUILTIN_EVMHOSMIAAW, 2744117395Skan SPE_BUILTIN_EVMHOSMIANW, 2745117395Skan SPE_BUILTIN_EVMHOSSF, 2746117395Skan SPE_BUILTIN_EVMHOSSFA, 2747117395Skan SPE_BUILTIN_EVMHOSSFAAW, 2748117395Skan SPE_BUILTIN_EVMHOSSFANW, 2749117395Skan SPE_BUILTIN_EVMHOSSIAAW, 2750117395Skan SPE_BUILTIN_EVMHOSSIANW, 2751117395Skan SPE_BUILTIN_EVMHOUMI, 2752117395Skan SPE_BUILTIN_EVMHOUMIA, 2753117395Skan SPE_BUILTIN_EVMHOUMIAAW, 2754117395Skan SPE_BUILTIN_EVMHOUMIANW, 2755117395Skan SPE_BUILTIN_EVMHOUSIAAW, 2756117395Skan SPE_BUILTIN_EVMHOUSIANW, 2757117395Skan SPE_BUILTIN_EVMWHSMF, 2758117395Skan SPE_BUILTIN_EVMWHSMFA, 2759117395Skan SPE_BUILTIN_EVMWHSMI, 2760117395Skan SPE_BUILTIN_EVMWHSMIA, 2761117395Skan SPE_BUILTIN_EVMWHSSF, 2762117395Skan SPE_BUILTIN_EVMWHSSFA, 2763117395Skan SPE_BUILTIN_EVMWHUMI, 2764117395Skan SPE_BUILTIN_EVMWHUMIA, 2765117395Skan SPE_BUILTIN_EVMWLSMIAAW, 2766117395Skan SPE_BUILTIN_EVMWLSMIANW, 2767117395Skan SPE_BUILTIN_EVMWLSSIAAW, 2768117395Skan SPE_BUILTIN_EVMWLSSIANW, 2769117395Skan SPE_BUILTIN_EVMWLUMI, 2770117395Skan SPE_BUILTIN_EVMWLUMIA, 2771117395Skan SPE_BUILTIN_EVMWLUMIAAW, 2772117395Skan SPE_BUILTIN_EVMWLUMIANW, 2773117395Skan SPE_BUILTIN_EVMWLUSIAAW, 2774117395Skan SPE_BUILTIN_EVMWLUSIANW, 2775117395Skan SPE_BUILTIN_EVMWSMF, 2776117395Skan SPE_BUILTIN_EVMWSMFA, 2777117395Skan SPE_BUILTIN_EVMWSMFAA, 2778117395Skan SPE_BUILTIN_EVMWSMFAN, 2779117395Skan SPE_BUILTIN_EVMWSMI, 2780117395Skan SPE_BUILTIN_EVMWSMIA, 2781117395Skan SPE_BUILTIN_EVMWSMIAA, 2782117395Skan SPE_BUILTIN_EVMWSMIAN, 2783117395Skan SPE_BUILTIN_EVMWHSSFAA, 2784117395Skan SPE_BUILTIN_EVMWSSF, 2785117395Skan SPE_BUILTIN_EVMWSSFA, 2786117395Skan SPE_BUILTIN_EVMWSSFAA, 2787117395Skan SPE_BUILTIN_EVMWSSFAN, 2788117395Skan SPE_BUILTIN_EVMWUMI, 2789117395Skan SPE_BUILTIN_EVMWUMIA, 2790117395Skan SPE_BUILTIN_EVMWUMIAA, 2791117395Skan SPE_BUILTIN_EVMWUMIAN, 2792117395Skan SPE_BUILTIN_EVNAND, 2793117395Skan SPE_BUILTIN_EVNOR, 2794117395Skan SPE_BUILTIN_EVOR, 2795117395Skan SPE_BUILTIN_EVORC, 2796117395Skan SPE_BUILTIN_EVRLW, 2797117395Skan SPE_BUILTIN_EVSLW, 2798117395Skan SPE_BUILTIN_EVSRWS, 2799117395Skan SPE_BUILTIN_EVSRWU, 2800117395Skan SPE_BUILTIN_EVSTDDX, 2801117395Skan SPE_BUILTIN_EVSTDHX, 2802117395Skan SPE_BUILTIN_EVSTDWX, 2803117395Skan SPE_BUILTIN_EVSTWHEX, 2804117395Skan SPE_BUILTIN_EVSTWHOX, 2805117395Skan SPE_BUILTIN_EVSTWWEX, 2806117395Skan SPE_BUILTIN_EVSTWWOX, 2807117395Skan SPE_BUILTIN_EVSUBFW, 2808117395Skan SPE_BUILTIN_EVXOR, 2809117395Skan SPE_BUILTIN_EVABS, 2810117395Skan SPE_BUILTIN_EVADDSMIAAW, 2811117395Skan SPE_BUILTIN_EVADDSSIAAW, 2812117395Skan SPE_BUILTIN_EVADDUMIAAW, 2813117395Skan SPE_BUILTIN_EVADDUSIAAW, 2814117395Skan SPE_BUILTIN_EVCNTLSW, 2815117395Skan SPE_BUILTIN_EVCNTLZW, 2816117395Skan SPE_BUILTIN_EVEXTSB, 2817117395Skan SPE_BUILTIN_EVEXTSH, 2818117395Skan SPE_BUILTIN_EVFSABS, 2819117395Skan SPE_BUILTIN_EVFSCFSF, 2820117395Skan SPE_BUILTIN_EVFSCFSI, 2821117395Skan SPE_BUILTIN_EVFSCFUF, 2822117395Skan SPE_BUILTIN_EVFSCFUI, 2823117395Skan SPE_BUILTIN_EVFSCTSF, 2824117395Skan SPE_BUILTIN_EVFSCTSI, 2825117395Skan SPE_BUILTIN_EVFSCTSIZ, 2826117395Skan SPE_BUILTIN_EVFSCTUF, 2827117395Skan SPE_BUILTIN_EVFSCTUI, 2828117395Skan SPE_BUILTIN_EVFSCTUIZ, 2829117395Skan SPE_BUILTIN_EVFSNABS, 2830117395Skan SPE_BUILTIN_EVFSNEG, 2831117395Skan SPE_BUILTIN_EVMRA, 2832117395Skan SPE_BUILTIN_EVNEG, 2833117395Skan SPE_BUILTIN_EVRNDW, 2834117395Skan SPE_BUILTIN_EVSUBFSMIAAW, 2835117395Skan SPE_BUILTIN_EVSUBFSSIAAW, 2836117395Skan SPE_BUILTIN_EVSUBFUMIAAW, 2837117395Skan SPE_BUILTIN_EVSUBFUSIAAW, 2838117395Skan SPE_BUILTIN_EVADDIW, 2839117395Skan SPE_BUILTIN_EVLDD, 2840117395Skan SPE_BUILTIN_EVLDH, 2841117395Skan SPE_BUILTIN_EVLDW, 2842117395Skan SPE_BUILTIN_EVLHHESPLAT, 2843117395Skan SPE_BUILTIN_EVLHHOSSPLAT, 2844117395Skan SPE_BUILTIN_EVLHHOUSPLAT, 2845117395Skan SPE_BUILTIN_EVLWHE, 2846117395Skan SPE_BUILTIN_EVLWHOS, 2847117395Skan SPE_BUILTIN_EVLWHOU, 2848117395Skan SPE_BUILTIN_EVLWHSPLAT, 2849117395Skan SPE_BUILTIN_EVLWWSPLAT, 2850117395Skan SPE_BUILTIN_EVRLWI, 2851117395Skan SPE_BUILTIN_EVSLWI, 2852117395Skan SPE_BUILTIN_EVSRWIS, 2853117395Skan SPE_BUILTIN_EVSRWIU, 2854117395Skan SPE_BUILTIN_EVSTDD, 2855117395Skan SPE_BUILTIN_EVSTDH, 2856117395Skan SPE_BUILTIN_EVSTDW, 2857117395Skan SPE_BUILTIN_EVSTWHE, 2858117395Skan SPE_BUILTIN_EVSTWHO, 2859117395Skan SPE_BUILTIN_EVSTWWE, 2860117395Skan SPE_BUILTIN_EVSTWWO, 2861117395Skan SPE_BUILTIN_EVSUBIFW, 2862117395Skan 2863117395Skan /* Compares. */ 2864117395Skan SPE_BUILTIN_EVCMPEQ, 2865117395Skan SPE_BUILTIN_EVCMPGTS, 2866117395Skan SPE_BUILTIN_EVCMPGTU, 2867117395Skan SPE_BUILTIN_EVCMPLTS, 2868117395Skan SPE_BUILTIN_EVCMPLTU, 2869117395Skan SPE_BUILTIN_EVFSCMPEQ, 2870117395Skan SPE_BUILTIN_EVFSCMPGT, 2871117395Skan SPE_BUILTIN_EVFSCMPLT, 2872117395Skan SPE_BUILTIN_EVFSTSTEQ, 2873117395Skan SPE_BUILTIN_EVFSTSTGT, 2874117395Skan SPE_BUILTIN_EVFSTSTLT, 2875117395Skan 2876117395Skan /* EVSEL compares. */ 2877117395Skan SPE_BUILTIN_EVSEL_CMPEQ, 2878117395Skan SPE_BUILTIN_EVSEL_CMPGTS, 2879117395Skan SPE_BUILTIN_EVSEL_CMPGTU, 2880117395Skan SPE_BUILTIN_EVSEL_CMPLTS, 2881117395Skan SPE_BUILTIN_EVSEL_CMPLTU, 2882117395Skan SPE_BUILTIN_EVSEL_FSCMPEQ, 2883117395Skan SPE_BUILTIN_EVSEL_FSCMPGT, 2884117395Skan SPE_BUILTIN_EVSEL_FSCMPLT, 2885117395Skan SPE_BUILTIN_EVSEL_FSTSTEQ, 2886117395Skan SPE_BUILTIN_EVSEL_FSTSTGT, 2887117395Skan SPE_BUILTIN_EVSEL_FSTSTLT, 2888117395Skan 2889117395Skan SPE_BUILTIN_EVSPLATFI, 2890117395Skan SPE_BUILTIN_EVSPLATI, 2891117395Skan SPE_BUILTIN_EVMWHSSMAA, 2892117395Skan SPE_BUILTIN_EVMWHSMFAA, 2893117395Skan SPE_BUILTIN_EVMWHSMIAA, 2894117395Skan SPE_BUILTIN_EVMWHUSIAA, 2895117395Skan SPE_BUILTIN_EVMWHUMIAA, 2896117395Skan SPE_BUILTIN_EVMWHSSFAN, 2897117395Skan SPE_BUILTIN_EVMWHSSIAN, 2898117395Skan SPE_BUILTIN_EVMWHSMFAN, 2899117395Skan SPE_BUILTIN_EVMWHSMIAN, 2900117395Skan SPE_BUILTIN_EVMWHUSIAN, 2901117395Skan SPE_BUILTIN_EVMWHUMIAN, 2902117395Skan SPE_BUILTIN_EVMWHGSSFAA, 2903117395Skan SPE_BUILTIN_EVMWHGSMFAA, 2904117395Skan SPE_BUILTIN_EVMWHGSMIAA, 2905117395Skan SPE_BUILTIN_EVMWHGUMIAA, 2906117395Skan SPE_BUILTIN_EVMWHGSSFAN, 2907117395Skan SPE_BUILTIN_EVMWHGSMFAN, 2908117395Skan SPE_BUILTIN_EVMWHGSMIAN, 2909117395Skan SPE_BUILTIN_EVMWHGUMIAN, 2910117395Skan SPE_BUILTIN_MTSPEFSCR, 2911117395Skan SPE_BUILTIN_MFSPEFSCR, 2912169689Skan SPE_BUILTIN_BRINC, 2913169689Skan 2914169689Skan RS6000_BUILTIN_COUNT 291590075Sobrien}; 2916169689Skan 2917169689Skanenum rs6000_builtin_type_index 2918169689Skan{ 2919169689Skan RS6000_BTI_NOT_OPAQUE, 2920169689Skan RS6000_BTI_opaque_V2SI, 2921169689Skan RS6000_BTI_opaque_V2SF, 2922169689Skan RS6000_BTI_opaque_p_V2SI, 2923169689Skan RS6000_BTI_opaque_V4SI, 2924169689Skan RS6000_BTI_V16QI, 2925169689Skan RS6000_BTI_V2SI, 2926169689Skan RS6000_BTI_V2SF, 2927169689Skan RS6000_BTI_V4HI, 2928169689Skan RS6000_BTI_V4SI, 2929169689Skan RS6000_BTI_V4SF, 2930169689Skan RS6000_BTI_V8HI, 2931169689Skan RS6000_BTI_unsigned_V16QI, 2932169689Skan RS6000_BTI_unsigned_V8HI, 2933169689Skan RS6000_BTI_unsigned_V4SI, 2934169689Skan RS6000_BTI_bool_char, /* __bool char */ 2935169689Skan RS6000_BTI_bool_short, /* __bool short */ 2936169689Skan RS6000_BTI_bool_int, /* __bool int */ 2937169689Skan RS6000_BTI_pixel, /* __pixel */ 2938169689Skan RS6000_BTI_bool_V16QI, /* __vector __bool char */ 2939169689Skan RS6000_BTI_bool_V8HI, /* __vector __bool short */ 2940169689Skan RS6000_BTI_bool_V4SI, /* __vector __bool int */ 2941169689Skan RS6000_BTI_pixel_V8HI, /* __vector __pixel */ 2942169689Skan RS6000_BTI_long, /* long_integer_type_node */ 2943169689Skan RS6000_BTI_unsigned_long, /* long_unsigned_type_node */ 2944169689Skan RS6000_BTI_INTQI, /* intQI_type_node */ 2945169689Skan RS6000_BTI_UINTQI, /* unsigned_intQI_type_node */ 2946169689Skan RS6000_BTI_INTHI, /* intHI_type_node */ 2947169689Skan RS6000_BTI_UINTHI, /* unsigned_intHI_type_node */ 2948169689Skan RS6000_BTI_INTSI, /* intSI_type_node */ 2949169689Skan RS6000_BTI_UINTSI, /* unsigned_intSI_type_node */ 2950169689Skan RS6000_BTI_float, /* float_type_node */ 2951169689Skan RS6000_BTI_void, /* void_type_node */ 2952169689Skan RS6000_BTI_MAX 2953169689Skan}; 2954169689Skan 2955169689Skan 2956169689Skan#define opaque_V2SI_type_node (rs6000_builtin_types[RS6000_BTI_opaque_V2SI]) 2957169689Skan#define opaque_V2SF_type_node (rs6000_builtin_types[RS6000_BTI_opaque_V2SF]) 2958169689Skan#define opaque_p_V2SI_type_node (rs6000_builtin_types[RS6000_BTI_opaque_p_V2SI]) 2959169689Skan#define opaque_V4SI_type_node (rs6000_builtin_types[RS6000_BTI_opaque_V4SI]) 2960169689Skan#define V16QI_type_node (rs6000_builtin_types[RS6000_BTI_V16QI]) 2961169689Skan#define V2SI_type_node (rs6000_builtin_types[RS6000_BTI_V2SI]) 2962169689Skan#define V2SF_type_node (rs6000_builtin_types[RS6000_BTI_V2SF]) 2963169689Skan#define V4HI_type_node (rs6000_builtin_types[RS6000_BTI_V4HI]) 2964169689Skan#define V4SI_type_node (rs6000_builtin_types[RS6000_BTI_V4SI]) 2965169689Skan#define V4SF_type_node (rs6000_builtin_types[RS6000_BTI_V4SF]) 2966169689Skan#define V8HI_type_node (rs6000_builtin_types[RS6000_BTI_V8HI]) 2967169689Skan#define unsigned_V16QI_type_node (rs6000_builtin_types[RS6000_BTI_unsigned_V16QI]) 2968169689Skan#define unsigned_V8HI_type_node (rs6000_builtin_types[RS6000_BTI_unsigned_V8HI]) 2969169689Skan#define unsigned_V4SI_type_node (rs6000_builtin_types[RS6000_BTI_unsigned_V4SI]) 2970169689Skan#define bool_char_type_node (rs6000_builtin_types[RS6000_BTI_bool_char]) 2971169689Skan#define bool_short_type_node (rs6000_builtin_types[RS6000_BTI_bool_short]) 2972169689Skan#define bool_int_type_node (rs6000_builtin_types[RS6000_BTI_bool_int]) 2973169689Skan#define pixel_type_node (rs6000_builtin_types[RS6000_BTI_pixel]) 2974169689Skan#define bool_V16QI_type_node (rs6000_builtin_types[RS6000_BTI_bool_V16QI]) 2975169689Skan#define bool_V8HI_type_node (rs6000_builtin_types[RS6000_BTI_bool_V8HI]) 2976169689Skan#define bool_V4SI_type_node (rs6000_builtin_types[RS6000_BTI_bool_V4SI]) 2977169689Skan#define pixel_V8HI_type_node (rs6000_builtin_types[RS6000_BTI_pixel_V8HI]) 2978169689Skan 2979169689Skan#define long_integer_type_internal_node (rs6000_builtin_types[RS6000_BTI_long]) 2980169689Skan#define long_unsigned_type_internal_node (rs6000_builtin_types[RS6000_BTI_unsigned_long]) 2981169689Skan#define intQI_type_internal_node (rs6000_builtin_types[RS6000_BTI_INTQI]) 2982169689Skan#define uintQI_type_internal_node (rs6000_builtin_types[RS6000_BTI_UINTQI]) 2983169689Skan#define intHI_type_internal_node (rs6000_builtin_types[RS6000_BTI_INTHI]) 2984169689Skan#define uintHI_type_internal_node (rs6000_builtin_types[RS6000_BTI_UINTHI]) 2985169689Skan#define intSI_type_internal_node (rs6000_builtin_types[RS6000_BTI_INTSI]) 2986169689Skan#define uintSI_type_internal_node (rs6000_builtin_types[RS6000_BTI_UINTSI]) 2987169689Skan#define float_type_internal_node (rs6000_builtin_types[RS6000_BTI_float]) 2988169689Skan#define void_type_internal_node (rs6000_builtin_types[RS6000_BTI_void]) 2989169689Skan 2990169689Skanextern GTY(()) tree rs6000_builtin_types[RS6000_BTI_MAX]; 2991169689Skanextern GTY(()) tree rs6000_builtin_decls[RS6000_BUILTIN_COUNT]; 2992169689Skan 2993