rios2.md revision 132718 
1;; Scheduling description for IBM Power2 processor.
2;;   Copyright (C) 2003 Free Software Foundation, Inc.
3;;
4;; This file is part of GCC.
5
6;; GCC is free software; you can redistribute it and/or modify it
7;; under the terms of the GNU General Public License as published
8;; by the Free Software Foundation; either version 2, or (at your
9;; option) any later version.
10
11;; GCC is distributed in the hope that it will be useful, but WITHOUT
12;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
14;; License for more details.
15
16;; You should have received a copy of the GNU General Public License
17;; along with GCC; see the file COPYING.  If not, write to the
18;; Free Software Foundation, 59 Temple Place - Suite 330, Boston,
19;; MA 02111-1307, USA.
20
21(define_automaton "rios2,rios2fp")
22(define_cpu_unit "iu1_rios2,iu2_rios2" "rios2")
23(define_cpu_unit "fpu1_rios2,fpu2_rios2" "rios2fp")
24(define_cpu_unit "bpu_rios2" "rios2")
25
26;; RIOS2 32-bit 2xIU, 2xFPU, BPU
27;; IU1 can perform all integer operations
28;; IU2 can perform all integer operations except imul and idiv
29
30(define_insn_reservation "rios2-load" 2
31  (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,\
32		        load_ux,load_u,fpload,fpload_ux,fpload_u")
33       (eq_attr "cpu" "rios2"))
34  "iu1_rios2|iu2_rios2")
35
36(define_insn_reservation "rios2-store" 1
37  (and (eq_attr "type" "store,store_ux,store_u,fpstore,fpstore_ux,fpstore_u")
38       (eq_attr "cpu" "rios2"))
39  "iu1_rios2|iu2_rios2")
40
41(define_insn_reservation "rios2-integer" 1
42  (and (eq_attr "type" "integer,insert_word")
43       (eq_attr "cpu" "rios2"))
44  "iu1_rios2|iu2_rios2")
45
46(define_insn_reservation "rios2-imul" 2
47  (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
48       (eq_attr "cpu" "rios2"))
49  "iu1_rios2*2")
50
51(define_insn_reservation "rios2-idiv" 13
52  (and (eq_attr "type" "idiv")
53       (eq_attr "cpu" "rios2"))
54  "iu1_rios2*13")
55
56; compare executes on integer unit, but feeds insns which
57; execute on the branch unit.
58(define_insn_reservation "rios2-compare" 3
59  (and (eq_attr "type" "cmp,fast_compare,compare,delayed_compare")
60       (eq_attr "cpu" "rios2"))
61  "(iu1_rios2|iu2_rios2),nothing,bpu_rios2")
62
63(define_insn_reservation "rios2-fp" 2
64  (and (eq_attr "type" "fp")
65       (eq_attr "cpu" "rios2"))
66  "fpu1_rios2|fpu2_rios2")
67
68(define_insn_reservation "rios2-fpcompare" 5
69  (and (eq_attr "type" "fpcompare")
70       (eq_attr "cpu" "rios2"))
71  "(fpu1_rios2|fpu2_rios2),nothing*3,bpu_rios2")
72
73(define_insn_reservation "rios2-dmul" 2
74  (and (eq_attr "type" "dmul")
75       (eq_attr "cpu" "rios2"))
76  "fpu1_rios2|fpu2_rios2")
77
78(define_insn_reservation "rios2-sdiv" 17
79  (and (eq_attr "type" "sdiv,ddiv")
80       (eq_attr "cpu" "rios2"))
81  "(fpu1_rios2*17)|(fpu2_rios2*17)")
82
83(define_insn_reservation "rios2-ssqrt" 26
84  (and (eq_attr "type" "ssqrt,dsqrt")
85       (eq_attr "cpu" "rios2"))
86  "(fpu1_rios2*26)|(fpu2_rios2*26)")
87
88(define_insn_reservation "rios2-mfcr" 2
89  (and (eq_attr "type" "mfcr")
90       (eq_attr "cpu" "rios2"))
91  "iu1_rios2,bpu_rios2")
92
93(define_insn_reservation "rios2-mtcr" 3
94  (and (eq_attr "type" "mtcr")
95       (eq_attr "cpu" "rios2"))
96  "iu1_rios2,bpu_rios2")
97
98(define_insn_reservation "rios2-crlogical" 3
99  (and (eq_attr "type" "cr_logical,delayed_cr")
100       (eq_attr "cpu" "rios2"))
101  "bpu_rios2")
102
103(define_insn_reservation "rios2-mtjmpr" 5
104  (and (eq_attr "type" "mtjmpr")
105       (eq_attr "cpu" "rios2"))
106  "iu1_rios2,bpu_rios2")
107
108(define_insn_reservation "rios2-mfjmpr" 2
109  (and (eq_attr "type" "mfjmpr")
110       (eq_attr "cpu" "rios2"))
111  "iu1_rios2,bpu_rios2")
112
113(define_insn_reservation "rios2-branch" 1
114  (and (eq_attr "type" "jmpreg,branch")
115       (eq_attr "cpu" "rios2"))
116  "bpu_rios2")
117
118