k6.md revision 117395 
1;; AMD K6/K6-2 Scheduling
2;; Copyright (C) 2002 ;; Free Software Foundation, Inc.
3;;
4;; This file is part of GNU CC.
5;;
6;; GNU CC is free software; you can redistribute it and/or modify
7;; it under the terms of the GNU General Public License as published by
8;; the Free Software Foundation; either version 2, or (at your option)
9;; any later version.
10;;
11;; GNU CC is distributed in the hope that it will be useful,
12;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14;; GNU General Public License for more details.
15;;
16;; You should have received a copy of the GNU General Public License
17;; along with GNU CC; see the file COPYING.  If not, write to
18;; the Free Software Foundation, 59 Temple Place - Suite 330,
19;; Boston, MA 02111-1307, USA.  */
20;;
21;; The K6 has similar architecture to PPro.  Important difference is, that
22;; there are only two decoders and they seems to be much slower than execution
23;; units.  So we have to pay much more attention to proper decoding for
24;; schedulers.  We share most of scheduler code for PPro in i386.c
25;;
26;; The fp unit is not pipelined and do one operation per two cycles including
27;; the FXCH.
28;;
29;; alu	  describes both ALU units (ALU-X and ALU-Y).
30;; alux   describes X alu unit
31;; fpu    describes FPU unit
32;; load   describes load unit.
33;; branch describes branch unit.
34;; store  decsribes store unit.  This unit is not modelled completely and only
35;;        used to model lea operation.  Otherwise it lie outside of the critical
36;;        path.
37;;
38;; ??? fxch isn't handled; not an issue until sched3 after reg-stack is real.
39
40;; The decoder specification is in the PPro section above!
41
42;; Shift instructions and certain arithmetic are issued only to X pipe.
43(define_function_unit "k6_alux" 1 0
44  (and (eq_attr "cpu" "k6")
45       (eq_attr "type" "ishift,ishift1,rotate,rotate1,alu1,negnot,cld"))
46  1 1)
47
48;; The QI mode arithmetic is issued to X pipe only.
49(define_function_unit "k6_alux" 1 0
50  (and (eq_attr "cpu" "k6")
51       (and (eq_attr "type" "alu,alu1,negnot,icmp,test,imovx,incdec")
52	    (match_operand:QI 0 "general_operand" "")))
53  1 1)
54
55(define_function_unit "k6_alu" 2 0
56  (and (eq_attr "cpu" "k6")
57       (eq_attr "type" "ishift,ishift1,rotate,rotate1,alu1,negnot,alu,icmp,test,imovx,incdec,setcc,lea"))
58  1 1)
59
60(define_function_unit "k6_alu" 2 0
61  (and (eq_attr "cpu" "k6")
62       (and (eq_attr "type" "imov")
63       	    (eq_attr "memory" "none")))
64  1 1)
65
66(define_function_unit "k6_branch" 1 0
67  (and (eq_attr "cpu" "k6")
68       (eq_attr "type" "call,callv,ibr"))
69  1 1)
70
71;; Load unit have two cycle latency, but we take care for it in adjust_cost
72(define_function_unit "k6_load" 1 0
73  (and (eq_attr "cpu" "k6")
74       (ior (eq_attr "type" "pop")
75	    (eq_attr "memory" "load,both")))
76  1 1)
77
78(define_function_unit "k6_load" 1 0
79  (and (eq_attr "cpu" "k6")
80       (and (eq_attr "type" "str")
81	    (eq_attr "memory" "load,both")))
82  10 10)
83
84;; Lea have two instructions, so latency is probably 2
85(define_function_unit "k6_store" 1 0
86  (and (eq_attr "cpu" "k6")
87       (eq_attr "type" "lea"))
88  2 1)
89
90(define_function_unit "k6_store" 1 0
91  (and (eq_attr "cpu" "k6")
92       (eq_attr "type" "str"))
93  10 10)
94
95(define_function_unit "k6_store" 1 0
96  (and (eq_attr "cpu" "k6")
97       (ior (eq_attr "type" "push")
98	    (eq_attr "memory" "store,both")))
99  1 1)
100
101(define_function_unit "k6_fpu" 1 1
102  (and (eq_attr "cpu" "k6")
103       (eq_attr "type" "fop,fmov,fcmp,fistp"))
104  2 2)
105
106(define_function_unit "k6_fpu" 1 1
107  (and (eq_attr "cpu" "k6")
108       (eq_attr "type" "fmul"))
109  2 2)
110
111;; ??? Guess
112(define_function_unit "k6_fpu" 1 1
113  (and (eq_attr "cpu" "k6")
114       (eq_attr "type" "fdiv,fpspc"))
115  56 56)
116
117(define_function_unit "k6_alu" 2 0
118  (and (eq_attr "cpu" "k6")
119       (eq_attr "type" "imul"))
120  2 2)
121
122(define_function_unit "k6_alux" 1 0
123  (and (eq_attr "cpu" "k6")
124       (eq_attr "type" "imul"))
125  2 2)
126
127;; ??? Guess
128(define_function_unit "k6_alu" 2 0
129  (and (eq_attr "cpu" "k6")
130       (eq_attr "type" "idiv"))
131  17 17)
132
133(define_function_unit "k6_alux" 1 0
134  (and (eq_attr "cpu" "k6")
135       (eq_attr "type" "idiv"))
136  17 17)
137