i386.h revision 90285
190285Sobrien/* Definitions of target machine for GNU compiler for IA-32. 290285Sobrien Copyright (C) 1988, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 390285Sobrien 2001, 2002 Free Software Foundation, Inc. 418334Speter 518334SpeterThis file is part of GNU CC. 618334Speter 718334SpeterGNU CC is free software; you can redistribute it and/or modify 818334Speterit under the terms of the GNU General Public License as published by 918334Speterthe Free Software Foundation; either version 2, or (at your option) 1018334Speterany later version. 1118334Speter 1218334SpeterGNU CC is distributed in the hope that it will be useful, 1318334Speterbut WITHOUT ANY WARRANTY; without even the implied warranty of 1418334SpeterMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1518334SpeterGNU General Public License for more details. 1618334Speter 1718334SpeterYou should have received a copy of the GNU General Public License 1818334Speteralong with GNU CC; see the file COPYING. If not, write to 1918334Speterthe Free Software Foundation, 59 Temple Place - Suite 330, 2090285SobrienBoston, MA 02111-1307, USA. */ 2118334Speter 2218334Speter/* The purpose of this file is to define the characteristics of the i386, 2318334Speter independent of assembler syntax or operating system. 2418334Speter 2518334Speter Three other files build on this one to describe a specific assembler syntax: 2618334Speter bsd386.h, att386.h, and sun386.h. 2718334Speter 2818334Speter The actual tm.h file for a particular system should include 2918334Speter this file, and then the file for the appropriate assembler syntax. 3018334Speter 3118334Speter Many macros that specify assembler syntax are omitted entirely from 3218334Speter this file because they really belong in the files for particular 3390285Sobrien assemblers. These include RP, IP, LPREFIX, PUT_OP_SIZE, USE_STAR, 3490285Sobrien ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE, PRINT_B_I_S, and many 3590285Sobrien that start with ASM_ or end in ASM_OP. */ 3618334Speter 3790285Sobrien 3852295Sobrien/* $FreeBSD: head/contrib/gcc/config/i386/i386.h 90285 2002-02-06 05:01:51Z obrien $ */ 3952295Sobrien 4018334Speter 4118334Speter/* Stubs for half-pic support if not OSF/1 reference platform. */ 4218334Speter 4318334Speter#ifndef HALF_PIC_P 4418334Speter#define HALF_PIC_P() 0 4518334Speter#define HALF_PIC_NUMBER_PTRS 0 4618334Speter#define HALF_PIC_NUMBER_REFS 0 4718334Speter#define HALF_PIC_ENCODE(DECL) 4818334Speter#define HALF_PIC_DECLARE(NAME) 4990285Sobrien#define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it") 5018334Speter#define HALF_PIC_ADDRESS_P(X) 0 5190285Sobrien#define HALF_PIC_PTR(X) (X) 5218334Speter#define HALF_PIC_FINISH(STREAM) 5318334Speter#endif 5418334Speter 5550654Sobrien/* Define the specific costs for a given cpu */ 5650654Sobrien 5750654Sobrienstruct processor_costs { 5890285Sobrien const int add; /* cost of an add instruction */ 5990285Sobrien const int lea; /* cost of a lea instruction */ 6090285Sobrien const int shift_var; /* variable shift costs */ 6190285Sobrien const int shift_const; /* constant shift costs */ 6290285Sobrien const int mult_init; /* cost of starting a multiply */ 6390285Sobrien const int mult_bit; /* cost of multiply per each bit set */ 6490285Sobrien const int divide; /* cost of a divide/mod */ 6590285Sobrien int movsx; /* The cost of movsx operation. */ 6690285Sobrien int movzx; /* The cost of movzx operation. */ 6790285Sobrien const int large_insn; /* insns larger than this cost more */ 6890285Sobrien const int move_ratio; /* The threshold of number of scalar 6990285Sobrien memory-to-memory move insns. */ 7090285Sobrien const int movzbl_load; /* cost of loading using movzbl */ 7190285Sobrien const int int_load[3]; /* cost of loading integer registers 7290285Sobrien in QImode, HImode and SImode relative 7390285Sobrien to reg-reg move (2). */ 7490285Sobrien const int int_store[3]; /* cost of storing integer register 7590285Sobrien in QImode, HImode and SImode */ 7690285Sobrien const int fp_move; /* cost of reg,reg fld/fst */ 7790285Sobrien const int fp_load[3]; /* cost of loading FP register 7890285Sobrien in SFmode, DFmode and XFmode */ 7990285Sobrien const int fp_store[3]; /* cost of storing FP register 8090285Sobrien in SFmode, DFmode and XFmode */ 8190285Sobrien const int mmx_move; /* cost of moving MMX register. */ 8290285Sobrien const int mmx_load[2]; /* cost of loading MMX register 8390285Sobrien in SImode and DImode */ 8490285Sobrien const int mmx_store[2]; /* cost of storing MMX register 8590285Sobrien in SImode and DImode */ 8690285Sobrien const int sse_move; /* cost of moving SSE register. */ 8790285Sobrien const int sse_load[3]; /* cost of loading SSE register 8890285Sobrien in SImode, DImode and TImode*/ 8990285Sobrien const int sse_store[3]; /* cost of storing SSE register 9090285Sobrien in SImode, DImode and TImode*/ 9190285Sobrien const int mmxsse_to_integer; /* cost of moving mmxsse register to 9290285Sobrien integer and vice versa. */ 9390285Sobrien const int prefetch_block; /* bytes moved to cache for prefetch. */ 9490285Sobrien const int simultaneous_prefetches; /* number of parallel prefetch 9590285Sobrien operations. */ 9650654Sobrien}; 9750654Sobrien 9890285Sobrienextern const struct processor_costs *ix86_cost; 9950654Sobrien 10018334Speter/* Run-time compilation parameters selecting different hardware subsets. */ 10118334Speter 10218334Speterextern int target_flags; 10318334Speter 10418334Speter/* Macros used in the machine description to test the flags. */ 10518334Speter 10618334Speter/* configure can arrange to make this 2, to force a 486. */ 10790285Sobrien 10818334Speter#ifndef TARGET_CPU_DEFAULT 10918334Speter#define TARGET_CPU_DEFAULT 0 11018334Speter#endif 11118334Speter 11218334Speter/* Masks for the -m switches */ 11390285Sobrien#define MASK_80387 0x00000001 /* Hardware floating point */ 11490285Sobrien#define MASK_RTD 0x00000002 /* Use ret that pops args */ 11590285Sobrien#define MASK_ALIGN_DOUBLE 0x00000004 /* align doubles to 2 word boundary */ 11690285Sobrien#define MASK_SVR3_SHLIB 0x00000008 /* Uninit locals into bss */ 11790285Sobrien#define MASK_IEEE_FP 0x00000010 /* IEEE fp comparisons */ 11890285Sobrien#define MASK_FLOAT_RETURNS 0x00000020 /* Return float in st(0) */ 11990285Sobrien#define MASK_NO_FANCY_MATH_387 0x00000040 /* Disable sin, cos, sqrt */ 12090285Sobrien#define MASK_OMIT_LEAF_FRAME_POINTER 0x080 /* omit leaf frame pointers */ 12190285Sobrien#define MASK_STACK_PROBE 0x00000100 /* Enable stack probing */ 12290285Sobrien#define MASK_NO_ALIGN_STROPS 0x00000200 /* Enable aligning of string ops. */ 12390285Sobrien#define MASK_INLINE_ALL_STROPS 0x00000400 /* Inline stringops in all cases */ 12490285Sobrien#define MASK_NO_PUSH_ARGS 0x00000800 /* Use push instructions */ 12590285Sobrien#define MASK_ACCUMULATE_OUTGOING_ARGS 0x00001000/* Accumulate outgoing args */ 12690285Sobrien#define MASK_ACCUMULATE_OUTGOING_ARGS_SET 0x00002000 12790285Sobrien#define MASK_MMX 0x00004000 /* Support MMX regs/builtins */ 12890285Sobrien#define MASK_MMX_SET 0x00008000 12990285Sobrien#define MASK_SSE 0x00010000 /* Support SSE regs/builtins */ 13090285Sobrien#define MASK_SSE_SET 0x00020000 13190285Sobrien#define MASK_SSE2 0x00040000 /* Support SSE2 regs/builtins */ 13290285Sobrien#define MASK_SSE2_SET 0x00080000 13390285Sobrien#define MASK_3DNOW 0x00100000 /* Support 3Dnow builtins */ 13490285Sobrien#define MASK_3DNOW_SET 0x00200000 13590285Sobrien#define MASK_3DNOW_A 0x00400000 /* Support Athlon 3Dnow builtins */ 13690285Sobrien#define MASK_3DNOW_A_SET 0x00800000 13790285Sobrien#define MASK_128BIT_LONG_DOUBLE 0x01000000 /* long double size is 128bit */ 13890285Sobrien#define MASK_64BIT 0x02000000 /* Produce 64bit code */ 13990285Sobrien/* ... overlap with subtarget options starts by 0x04000000. */ 14090285Sobrien#define MASK_NO_RED_ZONE 0x04000000 /* Do not use red zone */ 14118334Speter 14218334Speter/* Use the floating point instructions */ 14318334Speter#define TARGET_80387 (target_flags & MASK_80387) 14418334Speter 14518334Speter/* Compile using ret insn that pops args. 14618334Speter This will not work unless you use prototypes at least 14718334Speter for all functions that can take varying numbers of args. */ 14818334Speter#define TARGET_RTD (target_flags & MASK_RTD) 14918334Speter 15018334Speter/* Align doubles to a two word boundary. This breaks compatibility with 15118334Speter the published ABI's for structures containing doubles, but produces 15218334Speter faster code on the pentium. */ 15318334Speter#define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE) 15418334Speter 15590285Sobrien/* Use push instructions to save outgoing args. */ 15690285Sobrien#define TARGET_PUSH_ARGS (!(target_flags & MASK_NO_PUSH_ARGS)) 15790285Sobrien 15890285Sobrien/* Accumulate stack adjustments to prologue/epilogue. */ 15990285Sobrien#define TARGET_ACCUMULATE_OUTGOING_ARGS \ 16090285Sobrien (target_flags & MASK_ACCUMULATE_OUTGOING_ARGS) 16190285Sobrien 16218334Speter/* Put uninitialized locals into bss, not data. 16318334Speter Meaningful only on svr3. */ 16418334Speter#define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB) 16518334Speter 16618334Speter/* Use IEEE floating point comparisons. These handle correctly the cases 16718334Speter where the result of a comparison is unordered. Normally SIGFPE is 16818334Speter generated in such cases, in which case this isn't needed. */ 16918334Speter#define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP) 17018334Speter 17118334Speter/* Functions that return a floating point value may return that value 17218334Speter in the 387 FPU or in 386 integer registers. If set, this flag causes 17390285Sobrien the 387 to be used, which is compatible with most calling conventions. */ 17418334Speter#define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS) 17518334Speter 17690285Sobrien/* Long double is 128bit instead of 96bit, even when only 80bits are used. 17790285Sobrien This mode wastes cache, but avoid misaligned data accesses and simplifies 17890285Sobrien address calculations. */ 17990285Sobrien#define TARGET_128BIT_LONG_DOUBLE (target_flags & MASK_128BIT_LONG_DOUBLE) 18090285Sobrien 18118334Speter/* Disable generation of FP sin, cos and sqrt operations for 387. 18218334Speter This is because FreeBSD lacks these in the math-emulator-code */ 18318334Speter#define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387) 18418334Speter 18550654Sobrien/* Don't create frame pointers for leaf functions */ 18690285Sobrien#define TARGET_OMIT_LEAF_FRAME_POINTER \ 18790285Sobrien (target_flags & MASK_OMIT_LEAF_FRAME_POINTER) 18850654Sobrien 18918334Speter/* Debug GO_IF_LEGITIMATE_ADDRESS */ 19090285Sobrien#define TARGET_DEBUG_ADDR (ix86_debug_addr_string != 0) 19118334Speter 19218334Speter/* Debug FUNCTION_ARG macros */ 19390285Sobrien#define TARGET_DEBUG_ARG (ix86_debug_arg_string != 0) 19418334Speter 19590285Sobrien/* 64bit Sledgehammer mode */ 19690285Sobrien#ifdef TARGET_BI_ARCH 19790285Sobrien#define TARGET_64BIT (target_flags & MASK_64BIT) 19890285Sobrien#else 19990285Sobrien#ifdef TARGET_64BIT_DEFAULT 20090285Sobrien#define TARGET_64BIT 1 20190285Sobrien#else 20290285Sobrien#define TARGET_64BIT 0 20390285Sobrien#endif 20490285Sobrien#endif 20518334Speter 20650654Sobrien#define TARGET_386 (ix86_cpu == PROCESSOR_I386) 20750654Sobrien#define TARGET_486 (ix86_cpu == PROCESSOR_I486) 20850654Sobrien#define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM) 20950654Sobrien#define TARGET_PENTIUMPRO (ix86_cpu == PROCESSOR_PENTIUMPRO) 21052295Sobrien#define TARGET_K6 (ix86_cpu == PROCESSOR_K6) 21190285Sobrien#define TARGET_ATHLON (ix86_cpu == PROCESSOR_ATHLON) 21290285Sobrien#define TARGET_PENTIUM4 (ix86_cpu == PROCESSOR_PENTIUM4) 21352295Sobrien 21452295Sobrien#define CPUMASK (1 << ix86_cpu) 21552295Sobrienextern const int x86_use_leave, x86_push_memory, x86_zero_extend_with_and; 21652295Sobrienextern const int x86_use_bit_test, x86_cmove, x86_deep_branch; 21790285Sobrienextern const int x86_branch_hints, x86_unroll_strlen; 21890285Sobrienextern const int x86_double_with_add, x86_partial_reg_stall, x86_movx; 21990285Sobrienextern const int x86_use_loop, x86_use_fiop, x86_use_mov0; 22090285Sobrienextern const int x86_use_cltd, x86_read_modify_write; 22190285Sobrienextern const int x86_read_modify, x86_split_long_moves; 22290285Sobrienextern const int x86_promote_QImode, x86_single_stringop; 22390285Sobrienextern const int x86_himode_math, x86_qimode_math, x86_promote_qi_regs; 22490285Sobrienextern const int x86_promote_hi_regs, x86_integer_DFmode_moves; 22590285Sobrienextern const int x86_add_esp_4, x86_add_esp_8, x86_sub_esp_4, x86_sub_esp_8; 22690285Sobrienextern const int x86_partial_reg_dependency, x86_memory_mismatch_stall; 22790285Sobrienextern const int x86_accumulate_outgoing_args, x86_prologue_using_move; 22890285Sobrienextern const int x86_epilogue_using_move, x86_decompose_lea; 22990285Sobrienextern int x86_prefetch_sse; 23052295Sobrien 23152295Sobrien#define TARGET_USE_LEAVE (x86_use_leave & CPUMASK) 23252295Sobrien#define TARGET_PUSH_MEMORY (x86_push_memory & CPUMASK) 23352295Sobrien#define TARGET_ZERO_EXTEND_WITH_AND (x86_zero_extend_with_and & CPUMASK) 23452295Sobrien#define TARGET_USE_BIT_TEST (x86_use_bit_test & CPUMASK) 23552295Sobrien#define TARGET_UNROLL_STRLEN (x86_unroll_strlen & CPUMASK) 23690285Sobrien/* For sane SSE instruction set generation we need fcomi instruction. It is 23790285Sobrien safe to enable all CMOVE instructions. */ 23890285Sobrien#define TARGET_CMOVE ((x86_cmove & (1 << ix86_arch)) || TARGET_SSE) 23952295Sobrien#define TARGET_DEEP_BRANCH_PREDICTION (x86_deep_branch & CPUMASK) 24090285Sobrien#define TARGET_BRANCH_PREDICTION_HINTS (x86_branch_hints & CPUMASK) 24152295Sobrien#define TARGET_DOUBLE_WITH_ADD (x86_double_with_add & CPUMASK) 24290285Sobrien#define TARGET_USE_SAHF ((x86_use_sahf & CPUMASK) && !TARGET_64BIT) 24390285Sobrien#define TARGET_MOVX (x86_movx & CPUMASK) 24490285Sobrien#define TARGET_PARTIAL_REG_STALL (x86_partial_reg_stall & CPUMASK) 24590285Sobrien#define TARGET_USE_LOOP (x86_use_loop & CPUMASK) 24690285Sobrien#define TARGET_USE_FIOP (x86_use_fiop & CPUMASK) 24790285Sobrien#define TARGET_USE_MOV0 (x86_use_mov0 & CPUMASK) 24890285Sobrien#define TARGET_USE_CLTD (x86_use_cltd & CPUMASK) 24990285Sobrien#define TARGET_SPLIT_LONG_MOVES (x86_split_long_moves & CPUMASK) 25090285Sobrien#define TARGET_READ_MODIFY_WRITE (x86_read_modify_write & CPUMASK) 25190285Sobrien#define TARGET_READ_MODIFY (x86_read_modify & CPUMASK) 25290285Sobrien#define TARGET_PROMOTE_QImode (x86_promote_QImode & CPUMASK) 25390285Sobrien#define TARGET_SINGLE_STRINGOP (x86_single_stringop & CPUMASK) 25490285Sobrien#define TARGET_QIMODE_MATH (x86_qimode_math & CPUMASK) 25590285Sobrien#define TARGET_HIMODE_MATH (x86_himode_math & CPUMASK) 25690285Sobrien#define TARGET_PROMOTE_QI_REGS (x86_promote_qi_regs & CPUMASK) 25790285Sobrien#define TARGET_PROMOTE_HI_REGS (x86_promote_hi_regs & CPUMASK) 25890285Sobrien#define TARGET_ADD_ESP_4 (x86_add_esp_4 & CPUMASK) 25990285Sobrien#define TARGET_ADD_ESP_8 (x86_add_esp_8 & CPUMASK) 26090285Sobrien#define TARGET_SUB_ESP_4 (x86_sub_esp_4 & CPUMASK) 26190285Sobrien#define TARGET_SUB_ESP_8 (x86_sub_esp_8 & CPUMASK) 26290285Sobrien#define TARGET_INTEGER_DFMODE_MOVES (x86_integer_DFmode_moves & CPUMASK) 26390285Sobrien#define TARGET_PARTIAL_REG_DEPENDENCY (x86_partial_reg_dependency & CPUMASK) 26490285Sobrien#define TARGET_MEMORY_MISMATCH_STALL (x86_memory_mismatch_stall & CPUMASK) 26590285Sobrien#define TARGET_PROLOGUE_USING_MOVE (x86_prologue_using_move & CPUMASK) 26690285Sobrien#define TARGET_EPILOGUE_USING_MOVE (x86_epilogue_using_move & CPUMASK) 26790285Sobrien#define TARGET_DECOMPOSE_LEA (x86_decompose_lea & CPUMASK) 26890285Sobrien#define TARGET_PREFETCH_SSE (x86_prefetch_sse) 26952295Sobrien 27050654Sobrien#define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE) 27118334Speter 27290285Sobrien#define TARGET_ALIGN_STRINGOPS (!(target_flags & MASK_NO_ALIGN_STROPS)) 27390285Sobrien#define TARGET_INLINE_ALL_STRINGOPS (target_flags & MASK_INLINE_ALL_STROPS) 27418334Speter 27590285Sobrien#define ASSEMBLER_DIALECT (ix86_asm_dialect) 27690285Sobrien 27790285Sobrien#define TARGET_SSE ((target_flags & (MASK_SSE | MASK_SSE2)) != 0) 27890285Sobrien#define TARGET_SSE2 ((target_flags & MASK_SSE2) != 0) 27990285Sobrien#define TARGET_SSE_MATH ((ix86_fpmath & FPMATH_SSE) != 0) 28090285Sobrien#define TARGET_MIX_SSE_I387 ((ix86_fpmath & FPMATH_SSE) \ 28190285Sobrien && (ix86_fpmath & FPMATH_387)) 28290285Sobrien#define TARGET_MMX ((target_flags & MASK_MMX) != 0) 28390285Sobrien#define TARGET_3DNOW ((target_flags & MASK_3DNOW) != 0) 28490285Sobrien#define TARGET_3DNOW_A ((target_flags & MASK_3DNOW_A) != 0) 28590285Sobrien 28690285Sobrien#define TARGET_RED_ZONE (!(target_flags & MASK_NO_RED_ZONE)) 28790285Sobrien 28890285Sobrien#define TARGET_SWITCHES \ 28990285Sobrien{ { "80387", MASK_80387, N_("Use hardware fp") }, \ 29090285Sobrien { "no-80387", -MASK_80387, N_("Do not use hardware fp") }, \ 29190285Sobrien { "hard-float", MASK_80387, N_("Use hardware fp") }, \ 29290285Sobrien { "soft-float", -MASK_80387, N_("Do not use hardware fp") }, \ 29390285Sobrien { "no-soft-float", MASK_80387, N_("Use hardware fp") }, \ 29490285Sobrien { "386", 0, N_("") /*Deprecated.*/}, \ 29590285Sobrien { "486", 0, N_("") /*Deprecated.*/}, \ 29690285Sobrien { "pentium", 0, N_("") /*Deprecated.*/}, \ 29790285Sobrien { "pentiumpro", 0, N_("") /*Deprecated.*/}, \ 29890285Sobrien { "intel-syntax", 0, N_("") /*Deprecated.*/}, \ 29990285Sobrien { "no-intel-syntax", 0, N_("") /*Deprecated.*/}, \ 30090285Sobrien { "rtd", MASK_RTD, \ 30190285Sobrien N_("Alternate calling convention") }, \ 30290285Sobrien { "no-rtd", -MASK_RTD, \ 30390285Sobrien N_("Use normal calling convention") }, \ 30490285Sobrien { "align-double", MASK_ALIGN_DOUBLE, \ 30590285Sobrien N_("Align some doubles on dword boundary") }, \ 30690285Sobrien { "no-align-double", -MASK_ALIGN_DOUBLE, \ 30790285Sobrien N_("Align doubles on word boundary") }, \ 30890285Sobrien { "svr3-shlib", MASK_SVR3_SHLIB, \ 30990285Sobrien N_("Uninitialized locals in .bss") }, \ 31090285Sobrien { "no-svr3-shlib", -MASK_SVR3_SHLIB, \ 31190285Sobrien N_("Uninitialized locals in .data") }, \ 31290285Sobrien { "ieee-fp", MASK_IEEE_FP, \ 31390285Sobrien N_("Use IEEE math for fp comparisons") }, \ 31490285Sobrien { "no-ieee-fp", -MASK_IEEE_FP, \ 31590285Sobrien N_("Do not use IEEE math for fp comparisons") }, \ 31690285Sobrien { "fp-ret-in-387", MASK_FLOAT_RETURNS, \ 31790285Sobrien N_("Return values of functions in FPU registers") }, \ 31890285Sobrien { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS , \ 31990285Sobrien N_("Do not return values of functions in FPU registers")}, \ 32090285Sobrien { "no-fancy-math-387", MASK_NO_FANCY_MATH_387, \ 32190285Sobrien N_("Do not generate sin, cos, sqrt for FPU") }, \ 32290285Sobrien { "fancy-math-387", -MASK_NO_FANCY_MATH_387, \ 32390285Sobrien N_("Generate sin, cos, sqrt for FPU")}, \ 32490285Sobrien { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER, \ 32590285Sobrien N_("Omit the frame pointer in leaf functions") }, \ 32690285Sobrien { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER, "" }, \ 32790285Sobrien { "stack-arg-probe", MASK_STACK_PROBE, \ 32890285Sobrien N_("Enable stack probing") }, \ 32990285Sobrien { "no-stack-arg-probe", -MASK_STACK_PROBE, "" }, \ 33090285Sobrien { "windows", 0, 0 /* undocumented */ }, \ 33190285Sobrien { "dll", 0, 0 /* undocumented */ }, \ 33290285Sobrien { "align-stringops", -MASK_NO_ALIGN_STROPS, \ 33390285Sobrien N_("Align destination of the string operations") }, \ 33490285Sobrien { "no-align-stringops", MASK_NO_ALIGN_STROPS, \ 33590285Sobrien N_("Do not align destination of the string operations") }, \ 33690285Sobrien { "inline-all-stringops", MASK_INLINE_ALL_STROPS, \ 33790285Sobrien N_("Inline all known string operations") }, \ 33890285Sobrien { "no-inline-all-stringops", -MASK_INLINE_ALL_STROPS, \ 33990285Sobrien N_("Do not inline all known string operations") }, \ 34090285Sobrien { "push-args", -MASK_NO_PUSH_ARGS, \ 34190285Sobrien N_("Use push instructions to save outgoing arguments") }, \ 34290285Sobrien { "no-push-args", MASK_NO_PUSH_ARGS, \ 34390285Sobrien N_("Do not use push instructions to save outgoing arguments") }, \ 34490285Sobrien { "accumulate-outgoing-args", (MASK_ACCUMULATE_OUTGOING_ARGS \ 34590285Sobrien | MASK_ACCUMULATE_OUTGOING_ARGS_SET), \ 34690285Sobrien N_("Use push instructions to save outgoing arguments") }, \ 34790285Sobrien { "no-accumulate-outgoing-args",MASK_ACCUMULATE_OUTGOING_ARGS_SET, \ 34890285Sobrien N_("Do not use push instructions to save outgoing arguments") }, \ 34990285Sobrien { "mmx", MASK_MMX | MASK_MMX_SET, \ 35090285Sobrien N_("Support MMX built-in functions") }, \ 35190285Sobrien { "no-mmx", -MASK_MMX, \ 35290285Sobrien N_("Do not support MMX built-in functions") }, \ 35390285Sobrien { "no-mmx", MASK_MMX_SET, N_("") }, \ 35490285Sobrien { "3dnow", MASK_3DNOW | MASK_3DNOW_SET, \ 35590285Sobrien N_("Support 3DNow! built-in functions") }, \ 35690285Sobrien { "no-3dnow", -MASK_3DNOW, N_("") }, \ 35790285Sobrien { "no-3dnow", MASK_3DNOW_SET, \ 35890285Sobrien N_("Do not support 3DNow! built-in functions") }, \ 35990285Sobrien { "sse", MASK_SSE | MASK_SSE_SET, \ 36090285Sobrien N_("Support MMX and SSE built-in functions and code generation") }, \ 36190285Sobrien { "no-sse", -MASK_SSE, N_("") }, \ 36290285Sobrien { "no-sse", MASK_SSE_SET, \ 36390285Sobrien N_("Do not support MMX and SSE built-in functions and code generation") },\ 36490285Sobrien { "sse2", MASK_SSE2 | MASK_SSE2_SET, \ 36590285Sobrien N_("Support MMX, SSE and SSE2 built-in functions and code generation") }, \ 36690285Sobrien { "no-sse2", -MASK_SSE2, N_("") }, \ 36790285Sobrien { "no-sse2", MASK_SSE2_SET, \ 36890285Sobrien N_("Do not support MMX, SSE and SSE2 built-in functions and code generation") }, \ 36990285Sobrien { "128bit-long-double", MASK_128BIT_LONG_DOUBLE, \ 37090285Sobrien N_("sizeof(long double) is 16") }, \ 37190285Sobrien { "96bit-long-double", -MASK_128BIT_LONG_DOUBLE, \ 37290285Sobrien N_("sizeof(long double) is 12") }, \ 37390285Sobrien { "64", MASK_64BIT, \ 37490285Sobrien N_("Generate 64bit x86-64 code") }, \ 37590285Sobrien { "32", -MASK_64BIT, \ 37690285Sobrien N_("Generate 32bit i386 code") }, \ 37790285Sobrien { "red-zone", -MASK_NO_RED_ZONE, \ 37890285Sobrien N_("Use red-zone in the x86-64 code") }, \ 37990285Sobrien { "no-red-zone", MASK_NO_RED_ZONE, \ 38090285Sobrien N_("Do not use red-zone in the x86-64 code") }, \ 38190285Sobrien SUBTARGET_SWITCHES \ 38290285Sobrien { "", TARGET_DEFAULT, 0 }} 38390285Sobrien 38490285Sobrien#ifdef TARGET_64BIT_DEFAULT 38590285Sobrien#define TARGET_DEFAULT (MASK_64BIT | TARGET_SUBTARGET_DEFAULT) 38690285Sobrien#else 38790285Sobrien#define TARGET_DEFAULT TARGET_SUBTARGET_DEFAULT 38890285Sobrien#endif 38990285Sobrien 39050654Sobrien/* Which processor to schedule for. The cpu attribute defines a list that 39150654Sobrien mirrors this list, so changes to i386.md must be made at the same time. */ 39250654Sobrien 39350654Sobrienenum processor_type 39490285Sobrien{ 39590285Sobrien PROCESSOR_I386, /* 80386 */ 39650654Sobrien PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */ 39750654Sobrien PROCESSOR_PENTIUM, 39852295Sobrien PROCESSOR_PENTIUMPRO, 39990285Sobrien PROCESSOR_K6, 40090285Sobrien PROCESSOR_ATHLON, 40190285Sobrien PROCESSOR_PENTIUM4, 40290285Sobrien PROCESSOR_max 40390285Sobrien}; 40490285Sobrienenum fpmath_unit 40590285Sobrien{ 40690285Sobrien FPMATH_387 = 1, 40790285Sobrien FPMATH_SSE = 2 40890285Sobrien}; 40950654Sobrien 41050654Sobrienextern enum processor_type ix86_cpu; 41190285Sobrienextern enum fpmath_unit ix86_fpmath; 41250654Sobrien 41350654Sobrienextern int ix86_arch; 41450654Sobrien 41518334Speter/* This macro is similar to `TARGET_SWITCHES' but defines names of 41618334Speter command options that have values. Its definition is an 41718334Speter initializer with a subgrouping for each command option. 41818334Speter 41918334Speter Each subgrouping contains a string constant, that defines the 42018334Speter fixed part of the option name, and the address of a variable. The 42118334Speter variable, type `char *', is set to the variable part of the given 42218334Speter option if the fixed part matches. The actual option name is made 42318334Speter by appending `-m' to the specified name. */ 42490285Sobrien#define TARGET_OPTIONS \ 42590285Sobrien{ { "cpu=", &ix86_cpu_string, \ 42690285Sobrien N_("Schedule code for given CPU")}, \ 42790285Sobrien { "fpmath=", &ix86_fpmath_string, \ 42890285Sobrien N_("Generate floating point mathematics using given instruction set")},\ 42990285Sobrien { "arch=", &ix86_arch_string, \ 43090285Sobrien N_("Generate code for given CPU")}, \ 43190285Sobrien { "regparm=", &ix86_regparm_string, \ 43290285Sobrien N_("Number of registers used to pass integer arguments") }, \ 43390285Sobrien { "align-loops=", &ix86_align_loops_string, \ 43490285Sobrien N_("Loop code aligned to this power of 2") }, \ 43590285Sobrien { "align-jumps=", &ix86_align_jumps_string, \ 43690285Sobrien N_("Jump targets are aligned to this power of 2") }, \ 43790285Sobrien { "align-functions=", &ix86_align_funcs_string, \ 43890285Sobrien N_("Function starts are aligned to this power of 2") }, \ 43990285Sobrien { "preferred-stack-boundary=", \ 44090285Sobrien &ix86_preferred_stack_boundary_string, \ 44190285Sobrien N_("Attempt to keep stack aligned to this power of 2") }, \ 44290285Sobrien { "branch-cost=", &ix86_branch_cost_string, \ 44390285Sobrien N_("Branches are this expensive (1-5, arbitrary units)") }, \ 44490285Sobrien { "cmodel=", &ix86_cmodel_string, \ 44590285Sobrien N_("Use given x86-64 code model") }, \ 44690285Sobrien { "debug-arg", &ix86_debug_arg_string, \ 44790285Sobrien N_("" /* Undocumented. */) }, \ 44890285Sobrien { "debug-addr", &ix86_debug_addr_string, \ 44990285Sobrien N_("" /* Undocumented. */) }, \ 45090285Sobrien { "asm=", &ix86_asm_string, \ 45190285Sobrien N_("Use given assembler dialect") }, \ 45290285Sobrien SUBTARGET_OPTIONS \ 45318334Speter} 45418334Speter 45518334Speter/* Sometimes certain combinations of command options do not make 45618334Speter sense on a particular target machine. You can define a macro 45718334Speter `OVERRIDE_OPTIONS' to take account of this. This macro, if 45818334Speter defined, is executed once just after all the command options have 45918334Speter been parsed. 46018334Speter 46118334Speter Don't use this macro to turn on various extra optimizations for 46218334Speter `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */ 46318334Speter 46418334Speter#define OVERRIDE_OPTIONS override_options () 46518334Speter 46618334Speter/* These are meant to be redefined in the host dependent files */ 46718334Speter#define SUBTARGET_SWITCHES 46818334Speter#define SUBTARGET_OPTIONS 46918334Speter 47050654Sobrien/* Define this to change the optimizations performed by default. */ 47190285Sobrien#define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \ 47290285Sobrien optimization_options ((LEVEL), (SIZE)) 47350654Sobrien 47450654Sobrien/* Specs for the compiler proper */ 47550654Sobrien 47650654Sobrien#ifndef CC1_CPU_SPEC 47750654Sobrien#define CC1_CPU_SPEC "\ 47850654Sobrien%{!mcpu*: \ 47990285Sobrien%{m386:-mcpu=i386 \ 48090285Sobrien%n`-m386' is deprecated. Use `-march=i386' or `-mcpu=i386' instead.\n} \ 48190285Sobrien%{m486:-mcpu=i486 \ 48290285Sobrien%n`-m486' is deprecated. Use `-march=i486' or `-mcpu=i486' instead.\n} \ 48390285Sobrien%{mpentium:-mcpu=pentium \ 48490285Sobrien%n`-mpentium' is deprecated. Use `-march=pentium' or `-mcpu=pentium' instead.\n} \ 48590285Sobrien%{mpentiumpro:-mcpu=pentiumpro \ 48690285Sobrien%n`-mpentiumpro' is deprecated. Use `-march=pentiumpro' or `-mcpu=pentiumpro' instead.\n}} \ 48790285Sobrien%{mintel-syntax:-masm=intel \ 48890285Sobrien%n`-mintel-syntax' is deprecated. Use `-masm=intel' instead.\n} \ 48990285Sobrien%{mno-intel-syntax:-masm=att \ 49090285Sobrien%n`-mno-intel-syntax' is deprecated. Use `-masm=att' instead.\n}" 49150654Sobrien#endif 49218334Speter 49390285Sobrien#define TARGET_CPU_DEFAULT_i386 0 49490285Sobrien#define TARGET_CPU_DEFAULT_i486 1 49590285Sobrien#define TARGET_CPU_DEFAULT_pentium 2 49690285Sobrien#define TARGET_CPU_DEFAULT_pentium_mmx 3 49790285Sobrien#define TARGET_CPU_DEFAULT_pentiumpro 4 49890285Sobrien#define TARGET_CPU_DEFAULT_pentium2 5 49990285Sobrien#define TARGET_CPU_DEFAULT_pentium3 6 50090285Sobrien#define TARGET_CPU_DEFAULT_pentium4 7 50190285Sobrien#define TARGET_CPU_DEFAULT_k6 8 50290285Sobrien#define TARGET_CPU_DEFAULT_k6_2 9 50390285Sobrien#define TARGET_CPU_DEFAULT_k6_3 10 50490285Sobrien#define TARGET_CPU_DEFAULT_athlon 11 50590285Sobrien#define TARGET_CPU_DEFAULT_athlon_sse 12 50650654Sobrien 50790285Sobrien#define TARGET_CPU_DEFAULT_NAMES {"i386", "i486", "pentium", "pentium-mmx",\ 50890285Sobrien "pentiumpro", "pentium2", "pentium3", \ 50990285Sobrien "pentium4", "k6", "k6-2", "k6-3",\ 51090285Sobrien "athlon", "athlon-4"} 51150654Sobrien#ifndef CPP_CPU_DEFAULT_SPEC 51290285Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_i486 51390285Sobrien#define CPP_CPU_DEFAULT_SPEC "-D__tune_i486__" 51452295Sobrien#endif 51590285Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_pentium 51690285Sobrien#define CPP_CPU_DEFAULT_SPEC "-D__tune_i586__ -D__tune_pentium__" 51752295Sobrien#endif 51890285Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_pentium_mmx 51990285Sobrien#define CPP_CPU_DEFAULT_SPEC "-D__tune_i586__ -D__tune_pentium__ -D__tune_pentium_mmx__" 52050654Sobrien#endif 52190285Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_pentiumpro 52290285Sobrien#define CPP_CPU_DEFAULT_SPEC "-D__tune_i686__ -D__tune_pentiumpro__" 52350654Sobrien#endif 52490285Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_pentium2 52590285Sobrien#define CPP_CPU_DEFAULT_SPEC "-D__tune_i686__ -D__tune_pentiumpro__\ 52690285Sobrien-D__tune_pentium2__" 52790285Sobrien#endif 52890285Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_pentium3 52990285Sobrien#define CPP_CPU_DEFAULT_SPEC "-D__tune_i686__ -D__tune_pentiumpro__\ 53090285Sobrien-D__tune_pentium2__ -D__tune_pentium3__" 53190285Sobrien#endif 53290285Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_pentium4 53390285Sobrien#define CPP_CPU_DEFAULT_SPEC "-D__tune_pentium4__" 53490285Sobrien#endif 53590285Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_k6 53690285Sobrien#define CPP_CPU_DEFAULT_SPEC "-D__tune_k6__" 53790285Sobrien#endif 53890285Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_k6_2 53990285Sobrien#define CPP_CPU_DEFAULT_SPEC "-D__tune_k6__ -D__tune_k6_2__" 54090285Sobrien#endif 54190285Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_k6_3 54290285Sobrien#define CPP_CPU_DEFAULT_SPEC "-D__tune_k6__ -D__tune_k6_3__" 54390285Sobrien#endif 54490285Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_athlon 54590285Sobrien#define CPP_CPU_DEFAULT_SPEC "-D__tune_athlon__" 54690285Sobrien#endif 54790285Sobrien#if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_athlon_sse 54890285Sobrien#define CPP_CPU_DEFAULT_SPEC "-D__tune_athlon__ -D__tune_athlon_sse__" 54990285Sobrien#endif 55052295Sobrien#ifndef CPP_CPU_DEFAULT_SPEC 55190285Sobrien#define CPP_CPU_DEFAULT_SPEC "-D__tune_i386__" 55250654Sobrien#endif 55350654Sobrien#endif /* CPP_CPU_DEFAULT_SPEC */ 55450654Sobrien 55590285Sobrien#ifdef TARGET_BI_ARCH 55690285Sobrien#define NO_BUILTIN_SIZE_TYPE 55790285Sobrien#define NO_BUILTIN_PTRDIFF_TYPE 55890285Sobrien#endif 55990285Sobrien 56090285Sobrien#ifdef NO_BUILTIN_SIZE_TYPE 56190285Sobrien#define CPP_CPU32_SIZE_TYPE_SPEC \ 56290285Sobrien " -D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int" 56390285Sobrien#define CPP_CPU64_SIZE_TYPE_SPEC \ 56490285Sobrien " -D__SIZE_TYPE__=unsigned\\ long\\ int -D__PTRDIFF_TYPE__=long\\ int" 56590285Sobrien#else 56690285Sobrien#define CPP_CPU32_SIZE_TYPE_SPEC "" 56790285Sobrien#define CPP_CPU64_SIZE_TYPE_SPEC "" 56890285Sobrien#endif 56990285Sobrien 57090285Sobrien#define CPP_CPU32_SPEC \ 57190285Sobrien "-Acpu=i386 -Amachine=i386 %{!ansi:%{!std=c*:%{!std=i*:-Di386}}} -D__i386 \ 57290285Sobrien-D__i386__ %(cpp_cpu32sizet)" 57390285Sobrien 57490285Sobrien#define CPP_CPU64_SPEC \ 57590285Sobrien "-Acpu=x86_64 -Amachine=x86_64 -D__x86_64 -D__x86_64__ %(cpp_cpu64sizet)" 57690285Sobrien 57790285Sobrien#define CPP_CPUCOMMON_SPEC "\ 57890285Sobrien%{march=i386:%{!mcpu*:-D__tune_i386__ }}\ 57990285Sobrien%{march=i486:-D__i486 -D__i486__ %{!mcpu*:-D__tune_i486__ }}\ 58090285Sobrien%{march=pentium|march=i586:-D__i586 -D__i586__ -D__pentium -D__pentium__ \ 58190285Sobrien %{!mcpu*:-D__tune_i586__ -D__tune_pentium__ }}\ 58290285Sobrien%{march=pentium-mmx:-D__i586 -D__i586__ -D__pentium -D__pentium__ \ 58390285Sobrien -D__pentium__mmx__ \ 58490285Sobrien %{!mcpu*:-D__tune_i586__ -D__tune_pentium__ -D__tune_pentium_mmx__}}\ 58590285Sobrien%{march=pentiumpro|march=i686:-D__i686 -D__i686__ \ 58690285Sobrien -D__pentiumpro -D__pentiumpro__ \ 58790285Sobrien %{!mcpu*:-D__tune_i686__ -D__tune_pentiumpro__ }}\ 58890285Sobrien%{march=k6:-D__k6 -D__k6__ %{!mcpu*:-D__tune_k6__ }}\ 58990285Sobrien%{march=k6-2:-D__k6 -D__k6__ -D__k6_2__ \ 59090285Sobrien %{!mcpu*:-D__tune_k6__ -D__tune_k6_2__ }}\ 59190285Sobrien%{march=k6-3:-D__k6 -D__k6__ -D__k6_3__ \ 59290285Sobrien %{!mcpu*:-D__tune_k6__ -D__tune_k6_3__ }}\ 59390285Sobrien%{march=athlon|march=athlon-tbird:-D__athlon -D__athlon__ \ 59490285Sobrien %{!mcpu*:-D__tune_athlon__ }}\ 59590285Sobrien%{march=athlon-4|march=athlon-xp|march=athlon-mp:-D__athlon -D__athlon__ \ 59690285Sobrien -D__athlon_sse__ \ 59790285Sobrien %{!mcpu*:-D__tune_athlon__ -D__tune_athlon_sse__ }}\ 59890285Sobrien%{march=pentium4:-D__pentium4 -D__pentium4__ %{!mcpu*:-D__tune_pentium4__ }}\ 59990285Sobrien%{m386|mcpu=i386:-D__tune_i386__ }\ 60090285Sobrien%{m486|mcpu=i486:-D__tune_i486__ }\ 60190285Sobrien%{mpentium|mcpu=pentium|mcpu=i586|mcpu=pentium-mmx:-D__tune_i586__ -D__tune_pentium__ }\ 60290285Sobrien%{mpentiumpro|mcpu=pentiumpro|mcpu=i686|cpu=pentium2|cpu=pentium3:-D__tune_i686__ \ 60390285Sobrien-D__tune_pentiumpro__ }\ 60490285Sobrien%{mcpu=k6|mcpu=k6-2|mcpu=k6-3:-D__tune_k6__ }\ 60590285Sobrien%{mcpu=athlon|mcpu=athlon-tbird|mcpu=athlon-4|mcpu=athlon-xp|mcpu=athlon-mp:\ 60690285Sobrien-D__tune_athlon__ }\ 60790285Sobrien%{mcpu=athlon-4|mcpu=athlon-xp|mcpu=athlon-mp:\ 60890285Sobrien-D__tune_athlon_sse__ }\ 60990285Sobrien%{mcpu=pentium4:-D__tune_pentium4__ }\ 61090285Sobrien%{march=athlon-tbird|march=athlon-xp|march=athlon-mp|march=pentium3|march=pentium4:\ 61190285Sobrien-D__SSE__ }\ 61290285Sobrien%{march=pentium-mmx|march=k6|march=k6-2|march=k6-3\ 61390285Sobrienmarch=athlon|march=athlon-tbird|march=athlon-4|march=athlon-xp\ 61490285Sobrien|march=athlon-mp|march=pentium2|march=pentium3|march=pentium4: -D__MMX__ }\ 61590285Sobrien%{march=k6-2|march=k6-3\ 61690285Sobrienmarch=athlon|march=athlon-tbird|march=athlon-4|march=athlon-xp\ 61790285Sobrien|march=athlon-mp: -D__3dNOW__ }\ 61890285Sobrien%{march=athlon|march=athlon-tbird|march=athlon-4|march=athlon-xp\ 61990285Sobrien|march=athlon-mp: -D__3dNOW_A__ }\ 62090285Sobrien%{march=pentium4: -D__SSE2__ }\ 62190285Sobrien%{!march*:%{!mcpu*:%{!m386:%{!m486:%{!mpentium*:%(cpp_cpu_default)}}}}}" 62290285Sobrien 62350654Sobrien#ifndef CPP_CPU_SPEC 62490285Sobrien#ifdef TARGET_BI_ARCH 62590285Sobrien#ifdef TARGET_64BIT_DEFAULT 62690285Sobrien#define CPP_CPU_SPEC "%{m32:%(cpp_cpu32)}%{!m32:%(cpp_cpu64)} %(cpp_cpucommon)" 62790285Sobrien#else 62890285Sobrien#define CPP_CPU_SPEC "%{m64:%(cpp_cpu64)}%{!m64:%(cpp_cpu32)} %(cpp_cpucommon)" 62950654Sobrien#endif 63090285Sobrien#else 63190285Sobrien#ifdef TARGET_64BIT_DEFAULT 63290285Sobrien#define CPP_CPU_SPEC "%(cpp_cpu64) %(cpp_cpucommon)" 63390285Sobrien#else 63490285Sobrien#define CPP_CPU_SPEC "%(cpp_cpu32) %(cpp_cpucommon)" 63590285Sobrien#endif 63690285Sobrien#endif 63790285Sobrien#endif 63850654Sobrien 63950654Sobrien#ifndef CC1_SPEC 64090285Sobrien#define CC1_SPEC "%(cc1_cpu) " 64150654Sobrien#endif 64250654Sobrien 64350654Sobrien/* This macro defines names of additional specifications to put in the 64450654Sobrien specs that can be used in various specifications like CC1_SPEC. Its 64550654Sobrien definition is an initializer with a subgrouping for each command option. 64650654Sobrien 64750654Sobrien Each subgrouping contains a string constant, that defines the 64850654Sobrien specification name, and a string constant that used by the GNU CC driver 64950654Sobrien program. 65050654Sobrien 65150654Sobrien Do not define this macro if it does not need to do anything. */ 65250654Sobrien 65350654Sobrien#ifndef SUBTARGET_EXTRA_SPECS 65450654Sobrien#define SUBTARGET_EXTRA_SPECS 65550654Sobrien#endif 65650654Sobrien 65750654Sobrien#define EXTRA_SPECS \ 65850654Sobrien { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \ 65950654Sobrien { "cpp_cpu", CPP_CPU_SPEC }, \ 66090285Sobrien { "cpp_cpu32", CPP_CPU32_SPEC }, \ 66190285Sobrien { "cpp_cpu64", CPP_CPU64_SPEC }, \ 66290285Sobrien { "cpp_cpu32sizet", CPP_CPU32_SIZE_TYPE_SPEC }, \ 66390285Sobrien { "cpp_cpu64sizet", CPP_CPU64_SIZE_TYPE_SPEC }, \ 66490285Sobrien { "cpp_cpucommon", CPP_CPUCOMMON_SPEC }, \ 66550654Sobrien { "cc1_cpu", CC1_CPU_SPEC }, \ 66650654Sobrien SUBTARGET_EXTRA_SPECS 66750654Sobrien 66818334Speter/* target machine storage layout */ 66918334Speter 67090285Sobrien/* Define for XFmode or TFmode extended real floating point support. 67190285Sobrien This will automatically cause REAL_ARITHMETIC to be defined. 67290285Sobrien 67390285Sobrien The XFmode is specified by i386 ABI, while TFmode may be faster 67490285Sobrien due to alignment and simplifications in the address calculations. 67590285Sobrien */ 67690285Sobrien#define LONG_DOUBLE_TYPE_SIZE (TARGET_128BIT_LONG_DOUBLE ? 128 : 96) 67790285Sobrien#define MAX_LONG_DOUBLE_TYPE_SIZE 128 67890285Sobrien#ifdef __x86_64__ 67990285Sobrien#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128 68090285Sobrien#else 68190285Sobrien#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 96 68290285Sobrien#endif 68390285Sobrien/* Tell real.c that this is the 80-bit Intel extended float format 68490285Sobrien packaged in a 128-bit or 96bit entity. */ 68590285Sobrien#define INTEL_EXTENDED_IEEE_FORMAT 1 68618334Speter 68790285Sobrien 68890285Sobrien#define SHORT_TYPE_SIZE 16 68990285Sobrien#define INT_TYPE_SIZE 32 69090285Sobrien#define FLOAT_TYPE_SIZE 32 69190285Sobrien#define LONG_TYPE_SIZE BITS_PER_WORD 69290285Sobrien#define MAX_WCHAR_TYPE_SIZE 32 69390285Sobrien#define DOUBLE_TYPE_SIZE 64 69490285Sobrien#define LONG_LONG_TYPE_SIZE 64 69590285Sobrien 69690285Sobrien#if defined (TARGET_BI_ARCH) || defined (TARGET_64BIT_DEFAULT) 69790285Sobrien#define MAX_BITS_PER_WORD 64 69890285Sobrien#define MAX_LONG_TYPE_SIZE 64 69990285Sobrien#else 70090285Sobrien#define MAX_BITS_PER_WORD 32 70190285Sobrien#define MAX_LONG_TYPE_SIZE 32 70290285Sobrien#endif 70390285Sobrien 70418334Speter/* Define if you don't want extended real, but do want to use the 70518334Speter software floating point emulator for REAL_ARITHMETIC and 70690285Sobrien decimal <-> binary conversion. */ 70718334Speter/* #define REAL_ARITHMETIC */ 70818334Speter 70918334Speter/* Define this if most significant byte of a word is the lowest numbered. */ 71018334Speter/* That is true on the 80386. */ 71118334Speter 71218334Speter#define BITS_BIG_ENDIAN 0 71318334Speter 71418334Speter/* Define this if most significant byte of a word is the lowest numbered. */ 71518334Speter/* That is not true on the 80386. */ 71618334Speter#define BYTES_BIG_ENDIAN 0 71718334Speter 71818334Speter/* Define this if most significant word of a multiword number is the lowest 71918334Speter numbered. */ 72018334Speter/* Not true for 80386 */ 72118334Speter#define WORDS_BIG_ENDIAN 0 72218334Speter 72318334Speter/* number of bits in an addressable storage unit */ 72418334Speter#define BITS_PER_UNIT 8 72518334Speter 72618334Speter/* Width in bits of a "word", which is the contents of a machine register. 72718334Speter Note that this is not necessarily the width of data type `int'; 72818334Speter if using 16-bit ints on a 80386, this would still be 32. 72918334Speter But on a machine with 16-bit registers, this would be 16. */ 73090285Sobrien#define BITS_PER_WORD (TARGET_64BIT ? 64 : 32) 73118334Speter 73218334Speter/* Width of a word, in units (bytes). */ 73390285Sobrien#define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) 73490285Sobrien#define MIN_UNITS_PER_WORD 4 73518334Speter 73618334Speter/* Width in bits of a pointer. 73718334Speter See also the macro `Pmode' defined below. */ 73890285Sobrien#define POINTER_SIZE BITS_PER_WORD 73918334Speter 74018334Speter/* Allocation boundary (in *bits*) for storing arguments in argument list. */ 74190285Sobrien#define PARM_BOUNDARY BITS_PER_WORD 74218334Speter 74390285Sobrien/* Boundary (in *bits*) on which stack pointer should be aligned. */ 74490285Sobrien#define STACK_BOUNDARY BITS_PER_WORD 74518334Speter 74652295Sobrien/* Boundary (in *bits*) on which the stack pointer preferrs to be 74752295Sobrien aligned; the compiler cannot rely on having this alignment. */ 74890285Sobrien#define PREFERRED_STACK_BOUNDARY ix86_preferred_stack_boundary 74952295Sobrien 75090285Sobrien/* As of July 2001, many runtimes to not align the stack properly when 75190285Sobrien entering main. This causes expand_main_function to forcably align 75290285Sobrien the stack, which results in aligned frames for functions called from 75390285Sobrien main, though it does nothing for the alignment of main itself. */ 75490285Sobrien#define FORCE_PREFERRED_STACK_BOUNDARY_IN_MAIN \ 75590285Sobrien (ix86_preferred_stack_boundary > STACK_BOUNDARY && !TARGET_64BIT) 75618334Speter 75790285Sobrien/* Allocation boundary for the code of a function. */ 75890285Sobrien#define FUNCTION_BOUNDARY 16 75918334Speter 76090285Sobrien/* Alignment of field after `int : 0' in a structure. */ 76118334Speter 76290285Sobrien#define EMPTY_FIELD_BOUNDARY BITS_PER_WORD 76390285Sobrien 76418334Speter/* Minimum size in bits of the largest boundary to which any 76518334Speter and all fundamental data types supported by the hardware 76618334Speter might need to be aligned. No data type wants to be aligned 76790285Sobrien rounder than this. 76890285Sobrien 76990285Sobrien Pentium+ preferrs DFmode values to be aligned to 64 bit boundary 77090285Sobrien and Pentium Pro XFmode values at 128 bit boundaries. */ 77118334Speter 77290285Sobrien#define BIGGEST_ALIGNMENT 128 77390285Sobrien 77490285Sobrien/* Decide whether a variable of mode MODE must be 128 bit aligned. */ 77590285Sobrien#define ALIGN_MODE_128(MODE) \ 77690285Sobrien ((MODE) == XFmode || (MODE) == TFmode || ((MODE) == TImode) \ 77790285Sobrien || (MODE) == V4SFmode || (MODE) == V4SImode) 77890285Sobrien 77990285Sobrien/* The published ABIs say that doubles should be aligned on word 78090285Sobrien boundaries, so lower the aligment for structure fields unless 78190285Sobrien -malign-double is set. */ 78290285Sobrien/* BIGGEST_FIELD_ALIGNMENT is also used in libobjc, where it must be 78390285Sobrien constant. Use the smaller value in that context. */ 78490285Sobrien#ifndef IN_TARGET_LIBS 78590285Sobrien#define BIGGEST_FIELD_ALIGNMENT (TARGET_64BIT ? 128 : (TARGET_ALIGN_DOUBLE ? 64 : 32)) 78690285Sobrien#else 78790285Sobrien#define BIGGEST_FIELD_ALIGNMENT 32 78890285Sobrien#endif 78990285Sobrien 79050654Sobrien/* If defined, a C expression to compute the alignment given to a 79190285Sobrien constant that is being placed in memory. EXP is the constant 79250654Sobrien and ALIGN is the alignment that the object would ordinarily have. 79350654Sobrien The value of this macro is used instead of that alignment to align 79450654Sobrien the object. 79550654Sobrien 79650654Sobrien If this macro is not defined, then ALIGN is used. 79750654Sobrien 79850654Sobrien The typical use of this macro is to increase alignment for string 79950654Sobrien constants to be word aligned so that `strcpy' calls that copy 80050654Sobrien constants can be done inline. */ 80150654Sobrien 80290285Sobrien#define CONSTANT_ALIGNMENT(EXP, ALIGN) ix86_constant_alignment ((EXP), (ALIGN)) 80350654Sobrien 80450654Sobrien/* If defined, a C expression to compute the alignment for a static 80550654Sobrien variable. TYPE is the data type, and ALIGN is the alignment that 80650654Sobrien the object would ordinarily have. The value of this macro is used 80750654Sobrien instead of that alignment to align the object. 80850654Sobrien 80950654Sobrien If this macro is not defined, then ALIGN is used. 81050654Sobrien 81150654Sobrien One use of this macro is to increase alignment of medium-size 81250654Sobrien data to make it all fit in fewer cache lines. Another is to 81350654Sobrien cause character arrays to be word-aligned so that `strcpy' calls 81450654Sobrien that copy constants to character arrays can be done inline. */ 81550654Sobrien 81690285Sobrien#define DATA_ALIGNMENT(TYPE, ALIGN) ix86_data_alignment ((TYPE), (ALIGN)) 81750654Sobrien 81852295Sobrien/* If defined, a C expression to compute the alignment for a local 81952295Sobrien variable. TYPE is the data type, and ALIGN is the alignment that 82052295Sobrien the object would ordinarily have. The value of this macro is used 82152295Sobrien instead of that alignment to align the object. 82252295Sobrien 82352295Sobrien If this macro is not defined, then ALIGN is used. 82452295Sobrien 82552295Sobrien One use of this macro is to increase alignment of medium-size 82652295Sobrien data to make it all fit in fewer cache lines. */ 82752295Sobrien 82890285Sobrien#define LOCAL_ALIGNMENT(TYPE, ALIGN) ix86_local_alignment ((TYPE), (ALIGN)) 82952295Sobrien 83090285Sobrien/* If defined, a C expression that gives the alignment boundary, in 83190285Sobrien bits, of an argument with the specified mode and type. If it is 83290285Sobrien not defined, `PARM_BOUNDARY' is used for all arguments. */ 83390285Sobrien 83490285Sobrien#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ 83590285Sobrien ix86_function_arg_boundary ((MODE), (TYPE)) 83690285Sobrien 83718334Speter/* Set this non-zero if move instructions will actually fail to work 83818334Speter when given unaligned data. */ 83918334Speter#define STRICT_ALIGNMENT 0 84018334Speter 84118334Speter/* If bit field type is int, don't let it cross an int, 84218334Speter and give entire struct the alignment of an int. */ 84318334Speter/* Required on the 386 since it doesn't have bitfield insns. */ 84418334Speter#define PCC_BITFIELD_TYPE_MATTERS 1 84518334Speter 84618334Speter/* Standard register usage. */ 84718334Speter 84818334Speter/* This processor has special stack-like registers. See reg-stack.c 84990285Sobrien for details. */ 85018334Speter 85118334Speter#define STACK_REGS 85290285Sobrien#define IS_STACK_MODE(MODE) \ 85390285Sobrien ((MODE) == DFmode || (MODE) == SFmode || (MODE) == XFmode \ 85490285Sobrien || (MODE) == TFmode) 85518334Speter 85618334Speter/* Number of actual hardware registers. 85718334Speter The hardware registers are assigned numbers for the compiler 85818334Speter from 0 to just below FIRST_PSEUDO_REGISTER. 85918334Speter All registers that the compiler knows about must be given numbers, 86018334Speter even those that are not normally considered general registers. 86118334Speter 86218334Speter In the 80386 we give the 8 general purpose registers the numbers 0-7. 86318334Speter We number the floating point registers 8-15. 86418334Speter Note that registers 0-7 can be accessed as a short or int, 86518334Speter while only 0-3 may be used with byte `mov' instructions. 86618334Speter 86718334Speter Reg 16 does not correspond to any hardware register, but instead 86818334Speter appears in the RTL as an argument pointer prior to reload, and is 86918334Speter eliminated during reloading in favor of either the stack or frame 87090285Sobrien pointer. */ 87118334Speter 87290285Sobrien#define FIRST_PSEUDO_REGISTER 53 87318334Speter 87490285Sobrien/* Number of hardware registers that go into the DWARF-2 unwind info. 87590285Sobrien If not defined, equals FIRST_PSEUDO_REGISTER. */ 87690285Sobrien 87790285Sobrien#define DWARF_FRAME_REGISTERS 17 87890285Sobrien 87918334Speter/* 1 for registers that have pervasive standard uses 88018334Speter and are not available for the register allocator. 88190285Sobrien On the 80386, the stack pointer is such, as is the arg pointer. 88290285Sobrien 88390285Sobrien The value is an mask - bit 1 is set for fixed registers 88490285Sobrien for 32bit target, while 2 is set for fixed registers for 64bit. 88590285Sobrien Proper value is computed in the CONDITIONAL_REGISTER_USAGE. 88690285Sobrien */ 88790285Sobrien#define FIXED_REGISTERS \ 88890285Sobrien/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/ \ 88990285Sobrien{ 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, \ 89090285Sobrien/*arg,flags,fpsr,dir,frame*/ \ 89190285Sobrien 3, 3, 3, 3, 3, \ 89290285Sobrien/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \ 89390285Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 89490285Sobrien/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/ \ 89590285Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 89690285Sobrien/* r8, r9, r10, r11, r12, r13, r14, r15*/ \ 89790285Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 89890285Sobrien/*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/ \ 89990285Sobrien 1, 1, 1, 1, 1, 1, 1, 1} 90090285Sobrien 90118334Speter 90218334Speter/* 1 for registers not available across function calls. 90318334Speter These must include the FIXED_REGISTERS and also any 90418334Speter registers that can be used without being saved. 90518334Speter The latter must include the registers where values are returned 90618334Speter and the register where structure-value addresses are passed. 90790285Sobrien Aside from that, you can include as many other registers as you like. 90890285Sobrien 90990285Sobrien The value is an mask - bit 1 is set for call used 91090285Sobrien for 32bit target, while 2 is set for call used for 64bit. 91190285Sobrien Proper value is computed in the CONDITIONAL_REGISTER_USAGE. 91290285Sobrien*/ 91390285Sobrien#define CALL_USED_REGISTERS \ 91490285Sobrien/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/ \ 91590285Sobrien{ 3, 3, 3, 0, 2, 2, 0, 3, 3, 3, 3, 3, 3, 3, 3, 3, \ 91690285Sobrien/*arg,flags,fpsr,dir,frame*/ \ 91790285Sobrien 3, 3, 3, 3, 3, \ 91890285Sobrien/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \ 91990285Sobrien 3, 3, 3, 3, 3, 3, 3, 3, \ 92090285Sobrien/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/ \ 92190285Sobrien 3, 3, 3, 3, 3, 3, 3, 3, \ 92290285Sobrien/* r8, r9, r10, r11, r12, r13, r14, r15*/ \ 92390285Sobrien 3, 3, 3, 3, 1, 1, 1, 1, \ 92490285Sobrien/*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/ \ 92590285Sobrien 3, 3, 3, 3, 3, 3, 3, 3} \ 92618334Speter 92718334Speter/* Order in which to allocate registers. Each register must be 92818334Speter listed once, even those in FIXED_REGISTERS. List frame pointer 92918334Speter late and fixed registers last. Note that, in general, we prefer 93018334Speter registers listed in CALL_USED_REGISTERS, keeping the others 93118334Speter available for storage of persistent values. 93218334Speter 93318334Speter Three different versions of REG_ALLOC_ORDER have been tried: 93418334Speter 93518334Speter If the order is edx, ecx, eax, ... it produces a slightly faster compiler, 93618334Speter but slower code on simple functions returning values in eax. 93718334Speter 93818334Speter If the order is eax, ecx, edx, ... it causes reload to abort when compiling 93918334Speter perl 4.036 due to not being able to create a DImode register (to hold a 2 94018334Speter word union). 94118334Speter 94218334Speter If the order is eax, edx, ecx, ... it produces better code for simple 94318334Speter functions, and a slightly slower compiler. Users complained about the code 94490285Sobrien generated by allocating edx first, so restore the 'natural' order of things. */ 94518334Speter 94690285Sobrien#define REG_ALLOC_ORDER \ 94790285Sobrien/*ax,dx,cx,*/ \ 94890285Sobrien{ 0, 1, 2, \ 94990285Sobrien/* bx,si,di,bp,sp,*/ \ 95090285Sobrien 3, 4, 5, 6, 7, \ 95190285Sobrien/*r8,r9,r10,r11,*/ \ 95290285Sobrien 37,38, 39, 40, \ 95390285Sobrien/*r12,r15,r14,r13*/ \ 95490285Sobrien 41, 44, 43, 42, \ 95590285Sobrien/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \ 95690285Sobrien 21, 22, 23, 24, 25, 26, 27, 28, \ 95790285Sobrien/*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/ \ 95890285Sobrien 45, 46, 47, 48, 49, 50, 51, 52, \ 95990285Sobrien/*st,st1,st2,st3,st4,st5,st6,st7*/ \ 96090285Sobrien 8, 9, 10, 11, 12, 13, 14, 15, \ 96190285Sobrien/*,arg,cc,fpsr,dir,frame*/ \ 96290285Sobrien 16,17, 18, 19, 20, \ 96390285Sobrien/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/ \ 96490285Sobrien 29, 30, 31, 32, 33, 34, 35, 36 } 96518334Speter 96618334Speter/* Macro to conditionally modify fixed_regs/call_used_regs. */ 96790285Sobrien#define CONDITIONAL_REGISTER_USAGE \ 96890285Sobriendo { \ 96990285Sobrien int i; \ 97090285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 97190285Sobrien { \ 97290285Sobrien fixed_regs[i] = (fixed_regs[i] & (TARGET_64BIT ? 2 : 1)) != 0; \ 97390285Sobrien call_used_regs[i] = (call_used_regs[i] \ 97490285Sobrien & (TARGET_64BIT ? 2 : 1)) != 0; \ 97590285Sobrien } \ 97690285Sobrien if (flag_pic) \ 97790285Sobrien { \ 97890285Sobrien fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 97990285Sobrien call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 98090285Sobrien } \ 98190285Sobrien if (! TARGET_MMX) \ 98290285Sobrien { \ 98390285Sobrien int i; \ 98490285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 98590285Sobrien if (TEST_HARD_REG_BIT (reg_class_contents[(int)MMX_REGS], i)) \ 98690285Sobrien fixed_regs[i] = call_used_regs[i] = 1; \ 98790285Sobrien } \ 98890285Sobrien if (! TARGET_SSE) \ 98990285Sobrien { \ 99090285Sobrien int i; \ 99190285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 99290285Sobrien if (TEST_HARD_REG_BIT (reg_class_contents[(int)SSE_REGS], i)) \ 99390285Sobrien fixed_regs[i] = call_used_regs[i] = 1; \ 99490285Sobrien } \ 99590285Sobrien if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \ 99690285Sobrien { \ 99790285Sobrien int i; \ 99890285Sobrien HARD_REG_SET x; \ 99990285Sobrien COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \ 100090285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 100190285Sobrien if (TEST_HARD_REG_BIT (x, i)) \ 100290285Sobrien fixed_regs[i] = call_used_regs[i] = 1; \ 100390285Sobrien } \ 100490285Sobrien } while (0) 100518334Speter 100618334Speter/* Return number of consecutive hard regs needed starting at reg REGNO 100718334Speter to hold something of mode MODE. 100818334Speter This is ordinarily the length in words of a value of mode MODE 100918334Speter but can be less for certain modes in special long registers. 101018334Speter 101118334Speter Actually there are no two word move instructions for consecutive 101218334Speter registers. And only registers 0-3 may have mov byte instructions 101318334Speter applied to them. 101418334Speter */ 101518334Speter 101618334Speter#define HARD_REGNO_NREGS(REGNO, MODE) \ 101790285Sobrien (FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO) \ 101890285Sobrien ? (COMPLEX_MODE_P (MODE) ? 2 : 1) \ 101990285Sobrien : ((MODE) == TFmode \ 102090285Sobrien ? (TARGET_64BIT ? 2 : 3) \ 102190285Sobrien : (MODE) == TCmode \ 102290285Sobrien ? (TARGET_64BIT ? 4 : 6) \ 102390285Sobrien : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) 102418334Speter 102590285Sobrien#define VALID_SSE_REG_MODE(MODE) \ 102690285Sobrien ((MODE) == TImode || (MODE) == V4SFmode || (MODE) == V4SImode \ 102790285Sobrien || (MODE) == SFmode \ 102890285Sobrien || (TARGET_SSE2 && ((MODE) == DFmode || VALID_MMX_REG_MODE (MODE)))) 102918334Speter 103090285Sobrien#define VALID_MMX_REG_MODE_3DNOW(MODE) \ 103190285Sobrien ((MODE) == V2SFmode || (MODE) == SFmode) 103218334Speter 103390285Sobrien#define VALID_MMX_REG_MODE(MODE) \ 103490285Sobrien ((MODE) == DImode || (MODE) == V8QImode || (MODE) == V4HImode \ 103590285Sobrien || (MODE) == V2SImode || (MODE) == SImode) 103618334Speter 103790285Sobrien#define VECTOR_MODE_SUPPORTED_P(MODE) \ 103890285Sobrien (VALID_SSE_REG_MODE (MODE) && TARGET_SSE ? 1 \ 103990285Sobrien : VALID_MMX_REG_MODE (MODE) && TARGET_MMX ? 1 \ 104090285Sobrien : VALID_MMX_REG_MODE_3DNOW (MODE) && TARGET_3DNOW ? 1 : 0) 104190285Sobrien 104290285Sobrien#define VALID_FP_MODE_P(MODE) \ 104390285Sobrien ((MODE) == SFmode || (MODE) == DFmode || (MODE) == TFmode \ 104490285Sobrien || (!TARGET_64BIT && (MODE) == XFmode) \ 104590285Sobrien || (MODE) == SCmode || (MODE) == DCmode || (MODE) == TCmode \ 104690285Sobrien || (!TARGET_64BIT && (MODE) == XCmode)) 104790285Sobrien 104890285Sobrien#define VALID_INT_MODE_P(MODE) \ 104990285Sobrien ((MODE) == QImode || (MODE) == HImode || (MODE) == SImode \ 105090285Sobrien || (MODE) == DImode \ 105190285Sobrien || (MODE) == CQImode || (MODE) == CHImode || (MODE) == CSImode \ 105290285Sobrien || (MODE) == CDImode \ 105390285Sobrien || (TARGET_64BIT && ((MODE) == TImode || (MODE) == CTImode))) 105490285Sobrien 105590285Sobrien/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */ 105690285Sobrien 105790285Sobrien#define HARD_REGNO_MODE_OK(REGNO, MODE) \ 105890285Sobrien ix86_hard_regno_mode_ok ((REGNO), (MODE)) 105990285Sobrien 106018334Speter/* Value is 1 if it is a good idea to tie two pseudo registers 106118334Speter when one has mode MODE1 and one has mode MODE2. 106218334Speter If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 106318334Speter for any hard reg, then this must be 0 for correct output. */ 106418334Speter 106550654Sobrien#define MODES_TIEABLE_P(MODE1, MODE2) \ 106650654Sobrien ((MODE1) == (MODE2) \ 106790285Sobrien || (((MODE1) == HImode || (MODE1) == SImode \ 106890285Sobrien || ((MODE1) == QImode \ 106990285Sobrien && (TARGET_64BIT || !TARGET_PARTIAL_REG_STALL)) \ 107090285Sobrien || ((MODE1) == DImode && TARGET_64BIT)) \ 107190285Sobrien && ((MODE2) == HImode || (MODE2) == SImode \ 107290285Sobrien || ((MODE1) == QImode \ 107390285Sobrien && (TARGET_64BIT || !TARGET_PARTIAL_REG_STALL)) \ 107490285Sobrien || ((MODE2) == DImode && TARGET_64BIT)))) 107518334Speter 107690285Sobrien 107790285Sobrien/* Specify the modes required to caller save a given hard regno. 107890285Sobrien We do this on i386 to prevent flags from being saved at all. 107990285Sobrien 108090285Sobrien Kill any attempts to combine saving of modes. */ 108190285Sobrien 108290285Sobrien#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ 108390285Sobrien (CC_REGNO_P (REGNO) ? VOIDmode \ 108490285Sobrien : (MODE) == VOIDmode && (NREGS) != 1 ? VOIDmode \ 108590285Sobrien : (MODE) == VOIDmode ? choose_hard_reg_mode ((REGNO), (NREGS)) \ 108690285Sobrien : (MODE) == HImode && !TARGET_PARTIAL_REG_STALL ? SImode \ 108790285Sobrien : (MODE) == QImode && (REGNO) >= 4 && !TARGET_64BIT ? SImode \ 108890285Sobrien : (MODE)) 108918334Speter/* Specify the registers used for certain standard purposes. 109018334Speter The values of these macros are register numbers. */ 109118334Speter 109218334Speter/* on the 386 the pc register is %eip, and is not usable as a general 109318334Speter register. The ordinary mov instructions won't work */ 109418334Speter/* #define PC_REGNUM */ 109518334Speter 109618334Speter/* Register to use for pushing function arguments. */ 109718334Speter#define STACK_POINTER_REGNUM 7 109818334Speter 109918334Speter/* Base register for access to local variables of the function. */ 110090285Sobrien#define HARD_FRAME_POINTER_REGNUM 6 110118334Speter 110290285Sobrien/* Base register for access to local variables of the function. */ 110390285Sobrien#define FRAME_POINTER_REGNUM 20 110490285Sobrien 110518334Speter/* First floating point reg */ 110618334Speter#define FIRST_FLOAT_REG 8 110718334Speter 110818334Speter/* First & last stack-like regs */ 110918334Speter#define FIRST_STACK_REG FIRST_FLOAT_REG 111018334Speter#define LAST_STACK_REG (FIRST_FLOAT_REG + 7) 111118334Speter 111290285Sobrien#define FLAGS_REG 17 111390285Sobrien#define FPSR_REG 18 111490285Sobrien#define DIRFLAG_REG 19 111590285Sobrien 111690285Sobrien#define FIRST_SSE_REG (FRAME_POINTER_REGNUM + 1) 111790285Sobrien#define LAST_SSE_REG (FIRST_SSE_REG + 7) 111890285Sobrien 111990285Sobrien#define FIRST_MMX_REG (LAST_SSE_REG + 1) 112090285Sobrien#define LAST_MMX_REG (FIRST_MMX_REG + 7) 112190285Sobrien 112290285Sobrien#define FIRST_REX_INT_REG (LAST_MMX_REG + 1) 112390285Sobrien#define LAST_REX_INT_REG (FIRST_REX_INT_REG + 7) 112490285Sobrien 112590285Sobrien#define FIRST_REX_SSE_REG (LAST_REX_INT_REG + 1) 112690285Sobrien#define LAST_REX_SSE_REG (FIRST_REX_SSE_REG + 7) 112790285Sobrien 112818334Speter/* Value should be nonzero if functions must have frame pointers. 112918334Speter Zero means the frame pointer need not be set up (and parms 113018334Speter may be accessed via the stack pointer) in functions that seem suitable. 113118334Speter This is computed in `reload', in reload1.c. */ 113290285Sobrien#define FRAME_POINTER_REQUIRED ix86_frame_pointer_required () 113318334Speter 113490285Sobrien/* Override this in other tm.h files to cope with various OS losage 113590285Sobrien requiring a frame pointer. */ 113690285Sobrien#ifndef SUBTARGET_FRAME_POINTER_REQUIRED 113790285Sobrien#define SUBTARGET_FRAME_POINTER_REQUIRED 0 113890285Sobrien#endif 113990285Sobrien 114090285Sobrien/* Make sure we can access arbitrary call frames. */ 114190285Sobrien#define SETUP_FRAME_ADDRESSES() ix86_setup_frame_addresses () 114290285Sobrien 114318334Speter/* Base register for access to arguments of the function. */ 114418334Speter#define ARG_POINTER_REGNUM 16 114518334Speter 114690285Sobrien/* Register in which static-chain is passed to a function. 114790285Sobrien We do use ECX as static chain register for 32 bit ABI. On the 114890285Sobrien 64bit ABI, ECX is an argument register, so we use R10 instead. */ 114990285Sobrien#define STATIC_CHAIN_REGNUM (TARGET_64BIT ? FIRST_REX_INT_REG + 10 - 8 : 2) 115018334Speter 115118334Speter/* Register to hold the addressing base for position independent 115290285Sobrien code access to data items. 115390285Sobrien We don't use PIC pointer for 64bit mode. Define the regnum to 115490285Sobrien dummy value to prevent gcc from pessimizing code dealing with EBX. 115590285Sobrien */ 115690285Sobrien#define PIC_OFFSET_TABLE_REGNUM (TARGET_64BIT ? INVALID_REGNUM : 3) 115718334Speter 115818334Speter/* Register in which address to store a structure value 115918334Speter arrives in the function. On the 386, the prologue 116018334Speter copies this from the stack to register %eax. */ 116118334Speter#define STRUCT_VALUE_INCOMING 0 116218334Speter 116318334Speter/* Place in which caller passes the structure value address. 116418334Speter 0 means push the value on the stack like an argument. */ 116518334Speter#define STRUCT_VALUE 0 116618334Speter 116718334Speter/* A C expression which can inhibit the returning of certain function 116818334Speter values in registers, based on the type of value. A nonzero value 116918334Speter says to return the function value in memory, just as large 117018334Speter structures are always returned. Here TYPE will be a C expression 117118334Speter of type `tree', representing the data type of the value. 117218334Speter 117318334Speter Note that values of mode `BLKmode' must be explicitly handled by 117418334Speter this macro. Also, the option `-fpcc-struct-return' takes effect 117518334Speter regardless of this macro. On most systems, it is possible to 117618334Speter leave the macro undefined; this causes a default definition to be 117718334Speter used, whose value is the constant 1 for `BLKmode' values, and 0 117818334Speter otherwise. 117918334Speter 118018334Speter Do not use this macro to indicate that structures and unions 118118334Speter should always be returned in memory. You should instead use 118218334Speter `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */ 118318334Speter 118418334Speter#define RETURN_IN_MEMORY(TYPE) \ 118590285Sobrien ix86_return_in_memory (TYPE) 118618334Speter 118718334Speter 118818334Speter/* Define the classes of registers for register constraints in the 118918334Speter machine description. Also define ranges of constants. 119018334Speter 119118334Speter One of the classes must always be named ALL_REGS and include all hard regs. 119218334Speter If there is more than one class, another class must be named NO_REGS 119318334Speter and contain no registers. 119418334Speter 119518334Speter The name GENERAL_REGS must be the name of a class (or an alias for 119618334Speter another name such as ALL_REGS). This is the class of registers 119718334Speter that is allowed by "g" or "r" in a register constraint. 119818334Speter Also, registers outside this class are allocated only when 119918334Speter instructions express preferences for them. 120018334Speter 120118334Speter The classes must be numbered in nondecreasing order; that is, 120218334Speter a larger-numbered class must never be contained completely 120318334Speter in a smaller-numbered class. 120418334Speter 120518334Speter For any two classes, it is very desirable that there be another 120618334Speter class that represents their union. 120718334Speter 120818334Speter It might seem that class BREG is unnecessary, since no useful 386 120918334Speter opcode needs reg %ebx. But some systems pass args to the OS in ebx, 121090285Sobrien and the "b" register constraint is useful in asms for syscalls. 121118334Speter 121290285Sobrien The flags and fpsr registers are in no class. */ 121390285Sobrien 121418334Speterenum reg_class 121518334Speter{ 121618334Speter NO_REGS, 121790285Sobrien AREG, DREG, CREG, BREG, SIREG, DIREG, 121818334Speter AD_REGS, /* %eax/%edx for DImode */ 121918334Speter Q_REGS, /* %eax %ebx %ecx %edx */ 122090285Sobrien NON_Q_REGS, /* %esi %edi %ebp %esp */ 122118334Speter INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */ 122290285Sobrien LEGACY_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */ 122390285Sobrien GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp %r8 - %r15*/ 122418334Speter FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */ 122518334Speter FLOAT_REGS, 122690285Sobrien SSE_REGS, 122790285Sobrien MMX_REGS, 122890285Sobrien FP_TOP_SSE_REGS, 122990285Sobrien FP_SECOND_SSE_REGS, 123090285Sobrien FLOAT_SSE_REGS, 123190285Sobrien FLOAT_INT_REGS, 123290285Sobrien INT_SSE_REGS, 123390285Sobrien FLOAT_INT_SSE_REGS, 123418334Speter ALL_REGS, LIM_REG_CLASSES 123518334Speter}; 123618334Speter 123790285Sobrien#define N_REG_CLASSES ((int) LIM_REG_CLASSES) 123818334Speter 123990285Sobrien#define INTEGER_CLASS_P(CLASS) \ 124090285Sobrien reg_class_subset_p ((CLASS), GENERAL_REGS) 124190285Sobrien#define FLOAT_CLASS_P(CLASS) \ 124290285Sobrien reg_class_subset_p ((CLASS), FLOAT_REGS) 124390285Sobrien#define SSE_CLASS_P(CLASS) \ 124490285Sobrien reg_class_subset_p ((CLASS), SSE_REGS) 124590285Sobrien#define MMX_CLASS_P(CLASS) \ 124690285Sobrien reg_class_subset_p ((CLASS), MMX_REGS) 124790285Sobrien#define MAYBE_INTEGER_CLASS_P(CLASS) \ 124890285Sobrien reg_classes_intersect_p ((CLASS), GENERAL_REGS) 124990285Sobrien#define MAYBE_FLOAT_CLASS_P(CLASS) \ 125090285Sobrien reg_classes_intersect_p ((CLASS), FLOAT_REGS) 125190285Sobrien#define MAYBE_SSE_CLASS_P(CLASS) \ 125290285Sobrien reg_classes_intersect_p (SSE_REGS, (CLASS)) 125390285Sobrien#define MAYBE_MMX_CLASS_P(CLASS) \ 125490285Sobrien reg_classes_intersect_p (MMX_REGS, (CLASS)) 125518334Speter 125690285Sobrien#define Q_CLASS_P(CLASS) \ 125790285Sobrien reg_class_subset_p ((CLASS), Q_REGS) 125890285Sobrien 125918334Speter/* Give names of register classes as strings for dump file. */ 126018334Speter 126118334Speter#define REG_CLASS_NAMES \ 126218334Speter{ "NO_REGS", \ 126318334Speter "AREG", "DREG", "CREG", "BREG", \ 126490285Sobrien "SIREG", "DIREG", \ 126518334Speter "AD_REGS", \ 126690285Sobrien "Q_REGS", "NON_Q_REGS", \ 126718334Speter "INDEX_REGS", \ 126890285Sobrien "LEGACY_REGS", \ 126918334Speter "GENERAL_REGS", \ 127018334Speter "FP_TOP_REG", "FP_SECOND_REG", \ 127118334Speter "FLOAT_REGS", \ 127290285Sobrien "SSE_REGS", \ 127390285Sobrien "MMX_REGS", \ 127490285Sobrien "FP_TOP_SSE_REGS", \ 127590285Sobrien "FP_SECOND_SSE_REGS", \ 127690285Sobrien "FLOAT_SSE_REGS", \ 127790285Sobrien "FLOAT_INT_REGS", \ 127890285Sobrien "INT_SSE_REGS", \ 127990285Sobrien "FLOAT_INT_SSE_REGS", \ 128018334Speter "ALL_REGS" } 128118334Speter 128218334Speter/* Define which registers fit in which classes. 128318334Speter This is an initializer for a vector of HARD_REG_SET 128418334Speter of length N_REG_CLASSES. */ 128518334Speter 128690285Sobrien#define REG_CLASS_CONTENTS \ 128790285Sobrien{ { 0x00, 0x0 }, \ 128890285Sobrien { 0x01, 0x0 }, { 0x02, 0x0 }, /* AREG, DREG */ \ 128990285Sobrien { 0x04, 0x0 }, { 0x08, 0x0 }, /* CREG, BREG */ \ 129090285Sobrien { 0x10, 0x0 }, { 0x20, 0x0 }, /* SIREG, DIREG */ \ 129190285Sobrien { 0x03, 0x0 }, /* AD_REGS */ \ 129290285Sobrien { 0x0f, 0x0 }, /* Q_REGS */ \ 129390285Sobrien { 0x1100f0, 0x1fe0 }, /* NON_Q_REGS */ \ 129490285Sobrien { 0x7f, 0x1fe0 }, /* INDEX_REGS */ \ 129590285Sobrien { 0x1100ff, 0x0 }, /* LEGACY_REGS */ \ 129690285Sobrien { 0x1100ff, 0x1fe0 }, /* GENERAL_REGS */ \ 129790285Sobrien { 0x100, 0x0 }, { 0x0200, 0x0 },/* FP_TOP_REG, FP_SECOND_REG */\ 129890285Sobrien { 0xff00, 0x0 }, /* FLOAT_REGS */ \ 129990285Sobrien{ 0x1fe00000,0x1fe000 }, /* SSE_REGS */ \ 130090285Sobrien{ 0xe0000000, 0x1f }, /* MMX_REGS */ \ 130190285Sobrien{ 0x1fe00100,0x1fe000 }, /* FP_TOP_SSE_REG */ \ 130290285Sobrien{ 0x1fe00200,0x1fe000 }, /* FP_SECOND_SSE_REG */ \ 130390285Sobrien{ 0x1fe0ff00,0x1fe000 }, /* FLOAT_SSE_REGS */ \ 130490285Sobrien { 0x1ffff, 0x1fe0 }, /* FLOAT_INT_REGS */ \ 130590285Sobrien{ 0x1fe100ff,0x1fffe0 }, /* INT_SSE_REGS */ \ 130690285Sobrien{ 0x1fe1ffff,0x1fffe0 }, /* FLOAT_INT_SSE_REGS */ \ 130790285Sobrien{ 0xffffffff,0x1fffff } \ 130890285Sobrien} 130918334Speter 131018334Speter/* The same information, inverted: 131118334Speter Return the class number of the smallest class containing 131218334Speter reg number REGNO. This could be a conditional expression 131318334Speter or could index an array. */ 131418334Speter 131518334Speter#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO]) 131618334Speter 131718334Speter/* When defined, the compiler allows registers explicitly used in the 131818334Speter rtl to be used as spill registers but prevents the compiler from 131990285Sobrien extending the lifetime of these registers. */ 132018334Speter 132150654Sobrien#define SMALL_REGISTER_CLASSES 1 132218334Speter 132318334Speter#define QI_REG_P(X) \ 132418334Speter (REG_P (X) && REGNO (X) < 4) 132590285Sobrien 132690285Sobrien#define GENERAL_REGNO_P(N) \ 132790285Sobrien ((N) < 8 || REX_INT_REGNO_P (N)) 132890285Sobrien 132990285Sobrien#define GENERAL_REG_P(X) \ 133090285Sobrien (REG_P (X) && GENERAL_REGNO_P (REGNO (X))) 133190285Sobrien 133290285Sobrien#define ANY_QI_REG_P(X) (TARGET_64BIT ? GENERAL_REG_P(X) : QI_REG_P (X)) 133390285Sobrien 133418334Speter#define NON_QI_REG_P(X) \ 133518334Speter (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER) 133618334Speter 133790285Sobrien#define REX_INT_REGNO_P(N) ((N) >= FIRST_REX_INT_REG && (N) <= LAST_REX_INT_REG) 133890285Sobrien#define REX_INT_REG_P(X) (REG_P (X) && REX_INT_REGNO_P (REGNO (X))) 133990285Sobrien 134018334Speter#define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X))) 134190285Sobrien#define FP_REGNO_P(N) ((N) >= FIRST_STACK_REG && (N) <= LAST_STACK_REG) 134290285Sobrien#define ANY_FP_REG_P(X) (REG_P (X) && ANY_FP_REGNO_P (REGNO (X))) 134390285Sobrien#define ANY_FP_REGNO_P(N) (FP_REGNO_P (N) || SSE_REGNO_P (N)) 134490285Sobrien 134590285Sobrien#define SSE_REGNO_P(N) \ 134690285Sobrien (((N) >= FIRST_SSE_REG && (N) <= LAST_SSE_REG) \ 134790285Sobrien || ((N) >= FIRST_REX_SSE_REG && (N) <= LAST_REX_SSE_REG)) 134890285Sobrien 134990285Sobrien#define SSE_REGNO(N) \ 135090285Sobrien ((N) < 8 ? FIRST_SSE_REG + (N) : FIRST_REX_SSE_REG + (N) - 8) 135190285Sobrien#define SSE_REG_P(N) (REG_P (N) && SSE_REGNO_P (REGNO (N))) 135290285Sobrien 135390285Sobrien#define SSE_FLOAT_MODE_P(MODE) \ 135490285Sobrien ((TARGET_SSE_MATH && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode)) 135590285Sobrien 135690285Sobrien#define MMX_REGNO_P(N) ((N) >= FIRST_MMX_REG && (N) <= LAST_MMX_REG) 135790285Sobrien#define MMX_REG_P(XOP) (REG_P (XOP) && MMX_REGNO_P (REGNO (XOP))) 135818334Speter 135990285Sobrien#define STACK_REG_P(XOP) \ 136090285Sobrien (REG_P (XOP) && \ 136190285Sobrien REGNO (XOP) >= FIRST_STACK_REG && \ 136290285Sobrien REGNO (XOP) <= LAST_STACK_REG) 136318334Speter 136490285Sobrien#define NON_STACK_REG_P(XOP) (REG_P (XOP) && ! STACK_REG_P (XOP)) 136518334Speter 136690285Sobrien#define STACK_TOP_P(XOP) (REG_P (XOP) && REGNO (XOP) == FIRST_STACK_REG) 136718334Speter 136890285Sobrien#define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X))) 136990285Sobrien#define CC_REGNO_P(X) ((X) == FLAGS_REG || (X) == FPSR_REG) 137018334Speter 137190285Sobrien/* Indicate whether hard register numbered REG_NO should be converted 137290285Sobrien to SSA form. */ 137390285Sobrien#define CONVERT_HARD_REGISTER_TO_SSA_P(REG_NO) \ 137490285Sobrien ((REG_NO) == FLAGS_REG || (REG_NO) == ARG_POINTER_REGNUM) 137518334Speter 137618334Speter/* The class value for index registers, and the one for base regs. */ 137718334Speter 137818334Speter#define INDEX_REG_CLASS INDEX_REGS 137918334Speter#define BASE_REG_CLASS GENERAL_REGS 138018334Speter 138118334Speter/* Get reg_class from a letter such as appears in the machine description. */ 138218334Speter 138318334Speter#define REG_CLASS_FROM_LETTER(C) \ 138418334Speter ((C) == 'r' ? GENERAL_REGS : \ 138590285Sobrien (C) == 'R' ? LEGACY_REGS : \ 138690285Sobrien (C) == 'q' ? TARGET_64BIT ? GENERAL_REGS : Q_REGS : \ 138790285Sobrien (C) == 'Q' ? Q_REGS : \ 138818334Speter (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \ 138918334Speter ? FLOAT_REGS \ 139018334Speter : NO_REGS) : \ 139118334Speter (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \ 139218334Speter ? FP_TOP_REG \ 139318334Speter : NO_REGS) : \ 139418334Speter (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \ 139518334Speter ? FP_SECOND_REG \ 139618334Speter : NO_REGS) : \ 139718334Speter (C) == 'a' ? AREG : \ 139818334Speter (C) == 'b' ? BREG : \ 139918334Speter (C) == 'c' ? CREG : \ 140018334Speter (C) == 'd' ? DREG : \ 140190285Sobrien (C) == 'x' ? TARGET_SSE ? SSE_REGS : NO_REGS : \ 140290285Sobrien (C) == 'Y' ? TARGET_SSE2? SSE_REGS : NO_REGS : \ 140390285Sobrien (C) == 'y' ? TARGET_MMX ? MMX_REGS : NO_REGS : \ 140418334Speter (C) == 'A' ? AD_REGS : \ 140518334Speter (C) == 'D' ? DIREG : \ 140618334Speter (C) == 'S' ? SIREG : NO_REGS) 140718334Speter 140818334Speter/* The letters I, J, K, L and M in a register constraint string 140918334Speter can be used to stand for particular ranges of immediate operands. 141018334Speter This macro defines what the ranges are. 141118334Speter C is the letter, and VALUE is a constant value. 141218334Speter Return 1 if VALUE is in the range specified by C. 141318334Speter 141418334Speter I is for non-DImode shifts. 141518334Speter J is for DImode shifts. 141690285Sobrien K is for signed imm8 operands. 141790285Sobrien L is for andsi as zero-extending move. 141818334Speter M is for shifts that can be executed by the "lea" opcode. 141990285Sobrien N is for immedaite operands for out/in instructions (0-255) 142018334Speter */ 142118334Speter 142290285Sobrien#define CONST_OK_FOR_LETTER_P(VALUE, C) \ 142390285Sobrien ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 \ 142490285Sobrien : (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 \ 142590285Sobrien : (C) == 'K' ? (VALUE) >= -128 && (VALUE) <= 127 \ 142690285Sobrien : (C) == 'L' ? (VALUE) == 0xff || (VALUE) == 0xffff \ 142790285Sobrien : (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 \ 142890285Sobrien : (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 \ 142990285Sobrien : 0) 143018334Speter 143118334Speter/* Similar, but for floating constants, and defining letters G and H. 143218334Speter Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if 143318334Speter TARGET_387 isn't set, because the stack register converter may need to 143452295Sobrien load 0.0 into the function value register. */ 143518334Speter 143618334Speter#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 143790285Sobrien ((C) == 'G' ? standard_80387_constant_p (VALUE) \ 143890285Sobrien : ((C) == 'H' ? standard_sse_constant_p (VALUE) : 0)) 143918334Speter 144090285Sobrien/* A C expression that defines the optional machine-dependent 144190285Sobrien constraint letters that can be used to segregate specific types of 144290285Sobrien operands, usually memory references, for the target machine. Any 144390285Sobrien letter that is not elsewhere defined and not matched by 144490285Sobrien `REG_CLASS_FROM_LETTER' may be used. Normally this macro will not 144590285Sobrien be defined. 144690285Sobrien 144790285Sobrien If it is required for a particular target machine, it should 144890285Sobrien return 1 if VALUE corresponds to the operand type represented by 144990285Sobrien the constraint letter C. If C is not defined as an extra 145090285Sobrien constraint, the value returned should be 0 regardless of VALUE. */ 145190285Sobrien 145290285Sobrien#define EXTRA_CONSTRAINT(VALUE, C) \ 145390285Sobrien ((C) == 'e' ? x86_64_sign_extended_value (VALUE) \ 145490285Sobrien : (C) == 'Z' ? x86_64_zero_extended_value (VALUE) \ 145590285Sobrien : 0) 145690285Sobrien 145718334Speter/* Place additional restrictions on the register class to use when it 145818334Speter is necessary to be able to hold a value of mode MODE in a reload 145990285Sobrien register for which class CLASS would ordinarily be used. */ 146018334Speter 146190285Sobrien#define LIMIT_RELOAD_CLASS(MODE, CLASS) \ 146290285Sobrien ((MODE) == QImode && !TARGET_64BIT \ 146390285Sobrien && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS \ 146490285Sobrien || (CLASS) == LEGACY_REGS || (CLASS) == INDEX_REGS) \ 146518334Speter ? Q_REGS : (CLASS)) 146618334Speter 146718334Speter/* Given an rtx X being reloaded into a reg required to be 146818334Speter in class CLASS, return the class of reg to actually use. 146918334Speter In general this is just CLASS; but on some machines 147018334Speter in some cases it is preferable to use a more restrictive class. 147118334Speter On the 80386 series, we prevent floating constants from being 147218334Speter reloaded into floating registers (since no move-insn can do that) 147318334Speter and we ensure that QImodes aren't reloaded into the esi or edi reg. */ 147418334Speter 147518334Speter/* Put float CONST_DOUBLE in the constant pool instead of fp regs. 147618334Speter QImode must go into class Q_REGS. 147718334Speter Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and 147890285Sobrien movdf to do mem-to-mem moves through integer regs. */ 147918334Speter 148090285Sobrien#define PREFERRED_RELOAD_CLASS(X, CLASS) \ 148190285Sobrien ix86_preferred_reload_class ((X), (CLASS)) 148218334Speter 148318334Speter/* If we are copying between general and FP registers, we need a memory 148490285Sobrien location. The same is true for SSE and MMX registers. */ 148590285Sobrien#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ 148690285Sobrien ix86_secondary_memory_needed ((CLASS1), (CLASS2), (MODE), 1) 148718334Speter 148890285Sobrien/* QImode spills from non-QI registers need a scratch. This does not 148990285Sobrien happen often -- the only example so far requires an uninitialized 149090285Sobrien pseudo. */ 149118334Speter 149290285Sobrien#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \ 149390285Sobrien (((CLASS) == GENERAL_REGS || (CLASS) == LEGACY_REGS \ 149490285Sobrien || (CLASS) == INDEX_REGS) && !TARGET_64BIT && (MODE) == QImode \ 149590285Sobrien ? Q_REGS : NO_REGS) 149690285Sobrien 149718334Speter/* Return the maximum number of consecutive registers 149818334Speter needed to represent mode MODE in a register of class CLASS. */ 149918334Speter/* On the 80386, this is the size of MODE in words, 150090285Sobrien except in the FP regs, where a single reg is always enough. 150190285Sobrien The TFmodes are really just 80bit values, so we use only 3 registers 150290285Sobrien to hold them, instead of 4, as the size would suggest. 150390285Sobrien */ 150490285Sobrien#define CLASS_MAX_NREGS(CLASS, MODE) \ 150590285Sobrien (!MAYBE_INTEGER_CLASS_P (CLASS) \ 150690285Sobrien ? (COMPLEX_MODE_P (MODE) ? 2 : 1) \ 150790285Sobrien : ((GET_MODE_SIZE ((MODE) == TFmode ? XFmode : (MODE)) \ 150890285Sobrien + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 150918334Speter 151018334Speter/* A C expression whose value is nonzero if pseudos that have been 151118334Speter assigned to registers of class CLASS would likely be spilled 151218334Speter because registers of CLASS are needed for spill registers. 151318334Speter 151418334Speter The default value of this macro returns 1 if CLASS has exactly one 151518334Speter register and zero otherwise. On most machines, this default 151618334Speter should be used. Only define this macro to some other expression 151718334Speter if pseudo allocated by `local-alloc.c' end up in memory because 151818334Speter their hard registers were needed for spill registers. If this 151918334Speter macro returns nonzero for those classes, those pseudos will only 152018334Speter be allocated by `global.c', which knows how to reallocate the 152118334Speter pseudo to another register. If there would not be another 152218334Speter register available for reallocation, you should not change the 152318334Speter definition of this macro since the only effect of such a 152418334Speter definition would be to slow down register allocation. */ 152518334Speter 152618334Speter#define CLASS_LIKELY_SPILLED_P(CLASS) \ 152718334Speter (((CLASS) == AREG) \ 152818334Speter || ((CLASS) == DREG) \ 152918334Speter || ((CLASS) == CREG) \ 153018334Speter || ((CLASS) == BREG) \ 153118334Speter || ((CLASS) == AD_REGS) \ 153218334Speter || ((CLASS) == SIREG) \ 153318334Speter || ((CLASS) == DIREG)) 153418334Speter 153590285Sobrien/* A C statement that adds to CLOBBERS any hard regs the port wishes 153690285Sobrien to automatically clobber for all asms. 153790285Sobrien 153890285Sobrien We do this in the new i386 backend to maintain source compatibility 153990285Sobrien with the old cc0-based compiler. */ 154090285Sobrien 154190285Sobrien#define MD_ASM_CLOBBERS(CLOBBERS) \ 154290285Sobrien do { \ 154390285Sobrien (CLOBBERS) = tree_cons (NULL_TREE, build_string (5, "flags"), \ 154490285Sobrien (CLOBBERS)); \ 154590285Sobrien (CLOBBERS) = tree_cons (NULL_TREE, build_string (4, "fpsr"), \ 154690285Sobrien (CLOBBERS)); \ 154790285Sobrien (CLOBBERS) = tree_cons (NULL_TREE, build_string (7, "dirflag"), \ 154890285Sobrien (CLOBBERS)); \ 154990285Sobrien } while (0) 155018334Speter 155118334Speter/* Stack layout; function entry, exit and calling. */ 155218334Speter 155318334Speter/* Define this if pushing a word on the stack 155418334Speter makes the stack pointer a smaller address. */ 155518334Speter#define STACK_GROWS_DOWNWARD 155618334Speter 155718334Speter/* Define this if the nominal address of the stack frame 155818334Speter is at the high-address end of the local variables; 155918334Speter that is, each additional local variable allocated 156018334Speter goes at a more negative offset in the frame. */ 156118334Speter#define FRAME_GROWS_DOWNWARD 156218334Speter 156318334Speter/* Offset within stack frame to start allocating local variables at. 156418334Speter If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 156518334Speter first local allocated. Otherwise, it is the offset to the BEGINNING 156618334Speter of the first local allocated. */ 156718334Speter#define STARTING_FRAME_OFFSET 0 156818334Speter 156918334Speter/* If we generate an insn to push BYTES bytes, 157018334Speter this says how many the stack pointer really advances by. 157118334Speter On 386 pushw decrements by exactly 2 no matter what the position was. 157218334Speter On the 386 there is no pushb; we use pushw instead, and this 157390285Sobrien has the effect of rounding up to 2. 157490285Sobrien 157590285Sobrien For 64bit ABI we round up to 8 bytes. 157690285Sobrien */ 157718334Speter 157890285Sobrien#define PUSH_ROUNDING(BYTES) \ 157990285Sobrien (TARGET_64BIT \ 158090285Sobrien ? (((BYTES) + 7) & (-8)) \ 158190285Sobrien : (((BYTES) + 1) & (-2))) 158218334Speter 158390285Sobrien/* If defined, the maximum amount of space required for outgoing arguments will 158490285Sobrien be computed and placed into the variable 158590285Sobrien `current_function_outgoing_args_size'. No space will be pushed onto the 158690285Sobrien stack for each call; instead, the function prologue should increase the stack 158790285Sobrien frame size by this amount. */ 158890285Sobrien 158990285Sobrien#define ACCUMULATE_OUTGOING_ARGS TARGET_ACCUMULATE_OUTGOING_ARGS 159090285Sobrien 159190285Sobrien/* If defined, a C expression whose value is nonzero when we want to use PUSH 159290285Sobrien instructions to pass outgoing arguments. */ 159390285Sobrien 159490285Sobrien#define PUSH_ARGS (TARGET_PUSH_ARGS && !ACCUMULATE_OUTGOING_ARGS) 159590285Sobrien 159618334Speter/* Offset of first parameter from the argument pointer register value. */ 159718334Speter#define FIRST_PARM_OFFSET(FNDECL) 0 159818334Speter 159990285Sobrien/* Define this macro if functions should assume that stack space has been 160090285Sobrien allocated for arguments even when their values are passed in registers. 160190285Sobrien 160290285Sobrien The value of this macro is the size, in bytes, of the area reserved for 160390285Sobrien arguments passed in registers for the function represented by FNDECL. 160490285Sobrien 160590285Sobrien This space can be allocated by the caller, or be a part of the 160690285Sobrien machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE' says 160790285Sobrien which. */ 160890285Sobrien#define REG_PARM_STACK_SPACE(FNDECL) 0 160990285Sobrien 161090285Sobrien/* Define as a C expression that evaluates to nonzero if we do not know how 161190285Sobrien to pass TYPE solely in registers. The file expr.h defines a 161290285Sobrien definition that is usually appropriate, refer to expr.h for additional 161390285Sobrien documentation. If `REG_PARM_STACK_SPACE' is defined, the argument will be 161490285Sobrien computed in the stack and then loaded into a register. */ 161590285Sobrien#define MUST_PASS_IN_STACK(MODE, TYPE) \ 161690285Sobrien ((TYPE) != 0 \ 161790285Sobrien && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \ 161890285Sobrien || TREE_ADDRESSABLE (TYPE) \ 161990285Sobrien || ((MODE) == TImode) \ 162090285Sobrien || ((MODE) == BLKmode \ 162190285Sobrien && ! ((TYPE) != 0 \ 162290285Sobrien && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \ 162390285Sobrien && 0 == (int_size_in_bytes (TYPE) \ 162490285Sobrien % (PARM_BOUNDARY / BITS_PER_UNIT))) \ 162590285Sobrien && (FUNCTION_ARG_PADDING (MODE, TYPE) \ 162690285Sobrien == (BYTES_BIG_ENDIAN ? upward : downward))))) 162790285Sobrien 162818334Speter/* Value is the number of bytes of arguments automatically 162918334Speter popped when returning from a subroutine call. 163018334Speter FUNDECL is the declaration node of the function (as a tree), 163118334Speter FUNTYPE is the data type of the function (as a tree), 163218334Speter or for a library call it is an identifier node for the subroutine name. 163318334Speter SIZE is the number of bytes of arguments passed on the stack. 163418334Speter 163518334Speter On the 80386, the RTD insn may be used to pop them if the number 163618334Speter of args is fixed, but if the number is variable then the caller 163718334Speter must pop them all. RTD can't be used for library calls now 163818334Speter because the library is compiled with the Unix compiler. 163918334Speter Use of RTD is a selectable option, since it is incompatible with 164018334Speter standard Unix calling sequences. If the option is not selected, 164118334Speter the caller must always pop the args. 164218334Speter 164318334Speter The attribute stdcall is equivalent to RTD on a per module basis. */ 164418334Speter 164590285Sobrien#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) \ 164690285Sobrien ix86_return_pops_args ((FUNDECL), (FUNTYPE), (SIZE)) 164718334Speter 164818334Speter/* Define how to find the value returned by a function. 164918334Speter VALTYPE is the data type of the value (as a tree). 165018334Speter If the precise function being called is known, FUNC is its FUNCTION_DECL; 165118334Speter otherwise, FUNC is 0. */ 165218334Speter#define FUNCTION_VALUE(VALTYPE, FUNC) \ 165390285Sobrien ix86_function_value (VALTYPE) 165418334Speter 165590285Sobrien#define FUNCTION_VALUE_REGNO_P(N) \ 165690285Sobrien ix86_function_value_regno_p (N) 165790285Sobrien 165818334Speter/* Define how to find the value returned by a library function 165918334Speter assuming the value has mode MODE. */ 166018334Speter 166118334Speter#define LIBCALL_VALUE(MODE) \ 166290285Sobrien ix86_libcall_value (MODE) 166318334Speter 166418334Speter/* Define the size of the result block used for communication between 166518334Speter untyped_call and untyped_return. The block contains a DImode value 166618334Speter followed by the block used by fnsave and frstor. */ 166718334Speter 166818334Speter#define APPLY_RESULT_SIZE (8+108) 166918334Speter 167018334Speter/* 1 if N is a possible register number for function argument passing. */ 167190285Sobrien#define FUNCTION_ARG_REGNO_P(N) ix86_function_arg_regno_p (N) 167218334Speter 167318334Speter/* Define a data type for recording info about an argument list 167418334Speter during the scan of that argument list. This data type should 167518334Speter hold all necessary information about the function itself 167618334Speter and about the args processed so far, enough to enable macros 167718334Speter such as FUNCTION_ARG to determine where the next arg should go. */ 167818334Speter 167990285Sobrientypedef struct ix86_args { 168018334Speter int words; /* # words passed so far */ 168118334Speter int nregs; /* # registers available for passing */ 168218334Speter int regno; /* next available register number */ 168390285Sobrien int sse_words; /* # sse words passed so far */ 168490285Sobrien int sse_nregs; /* # sse registers available for passing */ 168590285Sobrien int sse_regno; /* next available sse register number */ 168690285Sobrien int maybe_vaarg; /* true for calls to possibly vardic fncts. */ 168718334Speter} CUMULATIVE_ARGS; 168818334Speter 168918334Speter/* Initialize a variable CUM of type CUMULATIVE_ARGS 169018334Speter for a call to a function whose data type is FNTYPE. 169118334Speter For a library call, FNTYPE is 0. */ 169218334Speter 169390285Sobrien#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \ 169490285Sobrien init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME)) 169518334Speter 169618334Speter/* Update the data in CUM to advance over an argument 169718334Speter of mode MODE and data type TYPE. 169818334Speter (TYPE is null for libcalls where that information may not be available.) */ 169918334Speter 170090285Sobrien#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 170190285Sobrien function_arg_advance (&(CUM), (MODE), (TYPE), (NAMED)) 170218334Speter 170318334Speter/* Define where to put the arguments to a function. 170418334Speter Value is zero to push the argument on the stack, 170518334Speter or a hard register in which to store the argument. 170618334Speter 170718334Speter MODE is the argument's machine mode. 170818334Speter TYPE is the data type of the argument (as a tree). 170918334Speter This is null for libcalls where that information may 171018334Speter not be available. 171118334Speter CUM is a variable of type CUMULATIVE_ARGS which gives info about 171218334Speter the preceding args and about the function being called. 171318334Speter NAMED is nonzero if this argument is a named parameter 171418334Speter (otherwise it is an extra parameter matching an ellipsis). */ 171518334Speter 171618334Speter#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 171790285Sobrien function_arg (&(CUM), (MODE), (TYPE), (NAMED)) 171818334Speter 171918334Speter/* For an arg passed partly in registers and partly in memory, 172018334Speter this is the number of registers used. 172118334Speter For args passed entirely in registers or entirely in memory, zero. */ 172218334Speter 172390285Sobrien#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0 172418334Speter 172590285Sobrien/* If PIC, we cannot make sibling calls to global functions 172690285Sobrien because the PLT requires %ebx live. 172790285Sobrien If we are returning floats on the register stack, we cannot make 172890285Sobrien sibling calls to functions that return floats. (The stack adjust 172990285Sobrien instruction will wind up after the sibcall jump, and not be executed.) */ 173090285Sobrien#define FUNCTION_OK_FOR_SIBCALL(DECL) \ 173190285Sobrien ((DECL) \ 173290285Sobrien && (! flag_pic || ! TREE_PUBLIC (DECL)) \ 173390285Sobrien && (! TARGET_FLOAT_RETURNS_IN_80387 \ 173490285Sobrien || ! FLOAT_MODE_P (TYPE_MODE (TREE_TYPE (TREE_TYPE (DECL)))) \ 173590285Sobrien || FLOAT_MODE_P (TYPE_MODE (TREE_TYPE (TREE_TYPE (cfun->decl)))))) 173650654Sobrien 173790285Sobrien/* Perform any needed actions needed for a function that is receiving a 173890285Sobrien variable number of arguments. 173950654Sobrien 174090285Sobrien CUM is as above. 174118334Speter 174290285Sobrien MODE and TYPE are the mode and type of the current parameter. 174318334Speter 174490285Sobrien PRETEND_SIZE is a variable that should be set to the amount of stack 174590285Sobrien that must be pushed by the prolog to pretend that our caller pushed 174690285Sobrien it. 174718334Speter 174890285Sobrien Normally, this macro will push all remaining incoming registers on the 174990285Sobrien stack and set PRETEND_SIZE to the length of the registers pushed. */ 175018334Speter 175190285Sobrien#define SETUP_INCOMING_VARARGS(CUM, MODE, TYPE, PRETEND_SIZE, NO_RTL) \ 175290285Sobrien ix86_setup_incoming_varargs (&(CUM), (MODE), (TYPE), &(PRETEND_SIZE), \ 175390285Sobrien (NO_RTL)) 175418334Speter 175590285Sobrien/* Define the `__builtin_va_list' type for the ABI. */ 175690285Sobrien#define BUILD_VA_LIST_TYPE(VALIST) \ 175790285Sobrien ((VALIST) = ix86_build_va_list ()) 175818334Speter 175990285Sobrien/* Implement `va_start' for varargs and stdarg. */ 176090285Sobrien#define EXPAND_BUILTIN_VA_START(STDARG, VALIST, NEXTARG) \ 176190285Sobrien ix86_va_start ((STDARG), (VALIST), (NEXTARG)) 176218334Speter 176390285Sobrien/* Implement `va_arg'. */ 176490285Sobrien#define EXPAND_BUILTIN_VA_ARG(VALIST, TYPE) \ 176590285Sobrien ix86_va_arg ((VALIST), (TYPE)) 176618334Speter 176790285Sobrien/* This macro is invoked at the end of compilation. It is used here to 176890285Sobrien output code for -fpic that will load the return address into %ebx. */ 176918334Speter 177090285Sobrien#undef ASM_FILE_END 177190285Sobrien#define ASM_FILE_END(FILE) ix86_asm_file_end (FILE) 177250654Sobrien 177390285Sobrien/* Output assembler code to FILE to increment profiler label # LABELNO 177490285Sobrien for profiling a function entry. */ 177550654Sobrien 177690285Sobrien#define FUNCTION_PROFILER(FILE, LABELNO) \ 177790285Sobriendo { \ 177890285Sobrien if (flag_pic) \ 177990285Sobrien { \ 178090285Sobrien fprintf ((FILE), "\tleal\t%sP%d@GOTOFF(%%ebx),%%edx\n", \ 178190285Sobrien LPREFIX, (LABELNO)); \ 178290285Sobrien fprintf ((FILE), "\tcall\t*_mcount@GOT(%%ebx)\n"); \ 178350654Sobrien } \ 178490285Sobrien else \ 178590285Sobrien { \ 178690285Sobrien fprintf ((FILE), "\tmovl\t$%sP%d,%%edx\n", LPREFIX, (LABELNO)); \ 178790285Sobrien fprintf ((FILE), "\tcall\t_mcount\n"); \ 178850654Sobrien } \ 178990285Sobrien} while (0) 179018334Speter 179118334Speter/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 179218334Speter the stack pointer does not matter. The value is tested only in 179318334Speter functions that have frame pointers. 179418334Speter No definition is equivalent to always zero. */ 179518334Speter/* Note on the 386 it might be more efficient not to define this since 179618334Speter we have to restore it ourselves from the frame pointer, in order to 179718334Speter use pop */ 179818334Speter 179918334Speter#define EXIT_IGNORE_STACK 1 180018334Speter 180118334Speter/* Output assembler code for a block containing the constant parts 180218334Speter of a trampoline, leaving space for the variable parts. */ 180318334Speter 180452295Sobrien/* On the 386, the trampoline contains two instructions: 180518334Speter mov #STATIC,ecx 180652295Sobrien jmp FUNCTION 180752295Sobrien The trampoline is generated entirely at runtime. The operand of JMP 180852295Sobrien is the address of FUNCTION relative to the instruction following the 180952295Sobrien JMP (which is 5 bytes long). */ 181018334Speter 181118334Speter/* Length in units of the trampoline for entering a nested function. */ 181218334Speter 181390285Sobrien#define TRAMPOLINE_SIZE (TARGET_64BIT ? 23 : 10) 181418334Speter 181518334Speter/* Emit RTL insns to initialize the variable parts of a trampoline. 181618334Speter FNADDR is an RTX for the address of the function's pure code. 181718334Speter CXT is an RTX for the static chain value for the function. */ 181818334Speter 181990285Sobrien#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 182090285Sobrien x86_initialize_trampoline ((TRAMP), (FNADDR), (CXT)) 182118334Speter 182218334Speter/* Definitions for register eliminations. 182318334Speter 182418334Speter This is an array of structures. Each structure initializes one pair 182518334Speter of eliminable registers. The "from" register number is given first, 182618334Speter followed by "to". Eliminations of the same "from" register are listed 182718334Speter in order of preference. 182818334Speter 182990285Sobrien There are two registers that can always be eliminated on the i386. 183090285Sobrien The frame pointer and the arg pointer can be replaced by either the 183190285Sobrien hard frame pointer or to the stack pointer, depending upon the 183290285Sobrien circumstances. The hard frame pointer is not used before reload and 183390285Sobrien so it is not eligible for elimination. */ 183418334Speter 183590285Sobrien#define ELIMINABLE_REGS \ 183690285Sobrien{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 183790285Sobrien { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ 183890285Sobrien { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 183990285Sobrien { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} \ 184018334Speter 184190285Sobrien/* Given FROM and TO register numbers, say whether this elimination is 184290285Sobrien allowed. Frame pointer elimination is automatically handled. 184318334Speter 184418334Speter All other eliminations are valid. */ 184518334Speter 184690285Sobrien#define CAN_ELIMINATE(FROM, TO) \ 184790285Sobrien ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1) 184818334Speter 184918334Speter/* Define the offset between two registers, one to be eliminated, and the other 185018334Speter its replacement, at the start of a routine. */ 185118334Speter 185290285Sobrien#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 185390285Sobrien ((OFFSET) = ix86_initial_elimination_offset ((FROM), (TO))) 185418334Speter 185518334Speter/* Addressing modes, and classification of registers for them. */ 185618334Speter 185752295Sobrien/* #define HAVE_POST_INCREMENT 0 */ 185852295Sobrien/* #define HAVE_POST_DECREMENT 0 */ 185918334Speter 186052295Sobrien/* #define HAVE_PRE_DECREMENT 0 */ 186152295Sobrien/* #define HAVE_PRE_INCREMENT 0 */ 186218334Speter 186318334Speter/* Macros to check register numbers against specific register classes. */ 186418334Speter 186518334Speter/* These assume that REGNO is a hard or pseudo reg number. 186618334Speter They give nonzero only if REGNO is a hard reg of the suitable class 186718334Speter or a pseudo reg currently allocated to a suitable hard reg. 186818334Speter Since they use reg_renumber, they are safe only once reg_renumber 186918334Speter has been allocated, which happens in local-alloc.c. */ 187018334Speter 187190285Sobrien#define REGNO_OK_FOR_INDEX_P(REGNO) \ 187290285Sobrien ((REGNO) < STACK_POINTER_REGNUM \ 187390285Sobrien || (REGNO >= FIRST_REX_INT_REG \ 187490285Sobrien && (REGNO) <= LAST_REX_INT_REG) \ 187590285Sobrien || ((unsigned) reg_renumber[(REGNO)] >= FIRST_REX_INT_REG \ 187690285Sobrien && (unsigned) reg_renumber[(REGNO)] <= LAST_REX_INT_REG) \ 187790285Sobrien || (unsigned) reg_renumber[(REGNO)] < STACK_POINTER_REGNUM) 187818334Speter 187990285Sobrien#define REGNO_OK_FOR_BASE_P(REGNO) \ 188090285Sobrien ((REGNO) <= STACK_POINTER_REGNUM \ 188190285Sobrien || (REGNO) == ARG_POINTER_REGNUM \ 188290285Sobrien || (REGNO) == FRAME_POINTER_REGNUM \ 188390285Sobrien || (REGNO >= FIRST_REX_INT_REG \ 188490285Sobrien && (REGNO) <= LAST_REX_INT_REG) \ 188590285Sobrien || ((unsigned) reg_renumber[(REGNO)] >= FIRST_REX_INT_REG \ 188690285Sobrien && (unsigned) reg_renumber[(REGNO)] <= LAST_REX_INT_REG) \ 188790285Sobrien || (unsigned) reg_renumber[(REGNO)] <= STACK_POINTER_REGNUM) 188818334Speter 188990285Sobrien#define REGNO_OK_FOR_SIREG_P(REGNO) \ 189090285Sobrien ((REGNO) == 4 || reg_renumber[(REGNO)] == 4) 189190285Sobrien#define REGNO_OK_FOR_DIREG_P(REGNO) \ 189290285Sobrien ((REGNO) == 5 || reg_renumber[(REGNO)] == 5) 189318334Speter 189418334Speter/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 189518334Speter and check its validity for a certain class. 189618334Speter We have two alternate definitions for each of them. 189718334Speter The usual definition accepts all pseudo regs; the other rejects 189818334Speter them unless they have been allocated suitable hard regs. 189918334Speter The symbol REG_OK_STRICT causes the latter definition to be used. 190018334Speter 190118334Speter Most source files want to accept pseudo regs in the hope that 190218334Speter they will get allocated to the class that the insn wants them to be in. 190318334Speter Source files for reload pass need to be strict. 190418334Speter After reload, it makes no difference, since pseudo regs have 190518334Speter been eliminated by then. */ 190618334Speter 190718334Speter 190818334Speter/* Non strict versions, pseudos are ok */ 190918334Speter#define REG_OK_FOR_INDEX_NONSTRICT_P(X) \ 191018334Speter (REGNO (X) < STACK_POINTER_REGNUM \ 191190285Sobrien || (REGNO (X) >= FIRST_REX_INT_REG \ 191290285Sobrien && REGNO (X) <= LAST_REX_INT_REG) \ 191318334Speter || REGNO (X) >= FIRST_PSEUDO_REGISTER) 191418334Speter 191518334Speter#define REG_OK_FOR_BASE_NONSTRICT_P(X) \ 191618334Speter (REGNO (X) <= STACK_POINTER_REGNUM \ 191718334Speter || REGNO (X) == ARG_POINTER_REGNUM \ 191890285Sobrien || REGNO (X) == FRAME_POINTER_REGNUM \ 191990285Sobrien || (REGNO (X) >= FIRST_REX_INT_REG \ 192090285Sobrien && REGNO (X) <= LAST_REX_INT_REG) \ 192118334Speter || REGNO (X) >= FIRST_PSEUDO_REGISTER) 192218334Speter 192318334Speter/* Strict versions, hard registers only */ 192418334Speter#define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 192518334Speter#define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 192618334Speter 192718334Speter#ifndef REG_OK_STRICT 192890285Sobrien#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X) 192990285Sobrien#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P (X) 193018334Speter 193118334Speter#else 193290285Sobrien#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P (X) 193390285Sobrien#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X) 193418334Speter#endif 193518334Speter 193618334Speter/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 193718334Speter that is a valid memory address for an instruction. 193818334Speter The MODE argument is the machine mode for the MEM expression 193918334Speter that wants to use this address. 194018334Speter 194118334Speter The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, 194218334Speter except for CONSTANT_ADDRESS_P which is usually machine-independent. 194318334Speter 194418334Speter See legitimize_pic_address in i386.c for details as to what 194518334Speter constitutes a legitimate address when -fpic is used. */ 194618334Speter 194718334Speter#define MAX_REGS_PER_ADDRESS 2 194818334Speter 194952295Sobrien#define CONSTANT_ADDRESS_P(X) \ 195052295Sobrien (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ 195190285Sobrien || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ 195290285Sobrien || GET_CODE (X) == CONST_DOUBLE) 195318334Speter 195418334Speter/* Nonzero if the constant value X is a legitimate general operand. 195518334Speter It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 195618334Speter 195790285Sobrien#define LEGITIMATE_CONSTANT_P(X) 1 195818334Speter 195918334Speter#ifdef REG_OK_STRICT 196018334Speter#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 196190285Sobriendo { \ 196290285Sobrien if (legitimate_address_p ((MODE), (X), 1)) \ 196318334Speter goto ADDR; \ 196490285Sobrien} while (0) 196518334Speter 196618334Speter#else 196718334Speter#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 196890285Sobriendo { \ 196990285Sobrien if (legitimate_address_p ((MODE), (X), 0)) \ 197018334Speter goto ADDR; \ 197190285Sobrien} while (0) 197218334Speter 197318334Speter#endif 197418334Speter 197590285Sobrien/* If defined, a C expression to determine the base term of address X. 197690285Sobrien This macro is used in only one place: `find_base_term' in alias.c. 197790285Sobrien 197890285Sobrien It is always safe for this macro to not be defined. It exists so 197990285Sobrien that alias analysis can understand machine-dependent addresses. 198090285Sobrien 198190285Sobrien The typical use of this macro is to handle addresses containing 198290285Sobrien a label_ref or symbol_ref within an UNSPEC. */ 198390285Sobrien 198490285Sobrien#define FIND_BASE_TERM(X) ix86_find_base_term (X) 198590285Sobrien 198618334Speter/* Try machine-dependent ways of modifying an illegitimate address 198718334Speter to be legitimate. If we find one, return the new, valid address. 198818334Speter This macro is used in only one place: `memory_address' in explow.c. 198918334Speter 199018334Speter OLDX is the address as it was before break_out_memory_refs was called. 199118334Speter In some cases it is useful to look at this to decide what needs to be done. 199218334Speter 199318334Speter MODE and WIN are passed so that this macro can use 199418334Speter GO_IF_LEGITIMATE_ADDRESS. 199518334Speter 199618334Speter It is always safe for this macro to do nothing. It exists to recognize 199718334Speter opportunities to optimize the output. 199818334Speter 199918334Speter For the 80386, we handle X+REG by loading X into a register R and 200018334Speter using R+REG. R will go in a general reg and indexing will be used. 200118334Speter However, if REG is a broken-out memory address or multiplication, 200218334Speter nothing needs to be done because REG can certainly go in a general reg. 200318334Speter 200418334Speter When -fpic is used, special handling is needed for symbolic references. 200518334Speter See comments by legitimize_pic_address in i386.c for details. */ 200618334Speter 200718334Speter#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ 200890285Sobriendo { \ 200990285Sobrien (X) = legitimize_address ((X), (OLDX), (MODE)); \ 201090285Sobrien if (memory_address_p ((MODE), (X))) \ 201118334Speter goto WIN; \ 201290285Sobrien} while (0) 201318334Speter 201490285Sobrien#define REWRITE_ADDRESS(X) rewrite_address (X) 201550654Sobrien 201618334Speter/* Nonzero if the constant value X is a legitimate general operand 201718334Speter when generating PIC code. It is given that flag_pic is on and 201818334Speter that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 201918334Speter 202090285Sobrien#define LEGITIMATE_PIC_OPERAND_P(X) \ 202190285Sobrien (! SYMBOLIC_CONST (X) \ 202290285Sobrien || legitimate_pic_address_disp_p (X)) 202318334Speter 202418334Speter#define SYMBOLIC_CONST(X) \ 202590285Sobrien (GET_CODE (X) == SYMBOL_REF \ 202690285Sobrien || GET_CODE (X) == LABEL_REF \ 202790285Sobrien || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X))) 202818334Speter 202918334Speter/* Go to LABEL if ADDR (a legitimate address expression) 203018334Speter has an effect that depends on the machine mode it is used for. 203118334Speter On the 80386, only postdecrement and postincrement address depend thus 203218334Speter (the amount of decrement or increment being the length of the operand). */ 203390285Sobrien#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ 203490285Sobriendo { \ 203590285Sobrien if (GET_CODE (ADDR) == POST_INC \ 203690285Sobrien || GET_CODE (ADDR) == POST_DEC) \ 203790285Sobrien goto LABEL; \ 203890285Sobrien} while (0) 203918334Speter 204090285Sobrien/* Codes for all the SSE/MMX builtins. */ 204190285Sobrienenum ix86_builtins 204290285Sobrien{ 204390285Sobrien IX86_BUILTIN_ADDPS, 204490285Sobrien IX86_BUILTIN_ADDSS, 204590285Sobrien IX86_BUILTIN_DIVPS, 204690285Sobrien IX86_BUILTIN_DIVSS, 204790285Sobrien IX86_BUILTIN_MULPS, 204890285Sobrien IX86_BUILTIN_MULSS, 204990285Sobrien IX86_BUILTIN_SUBPS, 205090285Sobrien IX86_BUILTIN_SUBSS, 205190285Sobrien 205290285Sobrien IX86_BUILTIN_CMPEQPS, 205390285Sobrien IX86_BUILTIN_CMPLTPS, 205490285Sobrien IX86_BUILTIN_CMPLEPS, 205590285Sobrien IX86_BUILTIN_CMPGTPS, 205690285Sobrien IX86_BUILTIN_CMPGEPS, 205790285Sobrien IX86_BUILTIN_CMPNEQPS, 205890285Sobrien IX86_BUILTIN_CMPNLTPS, 205990285Sobrien IX86_BUILTIN_CMPNLEPS, 206090285Sobrien IX86_BUILTIN_CMPNGTPS, 206190285Sobrien IX86_BUILTIN_CMPNGEPS, 206290285Sobrien IX86_BUILTIN_CMPORDPS, 206390285Sobrien IX86_BUILTIN_CMPUNORDPS, 206490285Sobrien IX86_BUILTIN_CMPNEPS, 206590285Sobrien IX86_BUILTIN_CMPEQSS, 206690285Sobrien IX86_BUILTIN_CMPLTSS, 206790285Sobrien IX86_BUILTIN_CMPLESS, 206890285Sobrien IX86_BUILTIN_CMPGTSS, 206990285Sobrien IX86_BUILTIN_CMPGESS, 207090285Sobrien IX86_BUILTIN_CMPNEQSS, 207190285Sobrien IX86_BUILTIN_CMPNLTSS, 207290285Sobrien IX86_BUILTIN_CMPNLESS, 207390285Sobrien IX86_BUILTIN_CMPNGTSS, 207490285Sobrien IX86_BUILTIN_CMPNGESS, 207590285Sobrien IX86_BUILTIN_CMPORDSS, 207690285Sobrien IX86_BUILTIN_CMPUNORDSS, 207790285Sobrien IX86_BUILTIN_CMPNESS, 207890285Sobrien 207990285Sobrien IX86_BUILTIN_COMIEQSS, 208090285Sobrien IX86_BUILTIN_COMILTSS, 208190285Sobrien IX86_BUILTIN_COMILESS, 208290285Sobrien IX86_BUILTIN_COMIGTSS, 208390285Sobrien IX86_BUILTIN_COMIGESS, 208490285Sobrien IX86_BUILTIN_COMINEQSS, 208590285Sobrien IX86_BUILTIN_UCOMIEQSS, 208690285Sobrien IX86_BUILTIN_UCOMILTSS, 208790285Sobrien IX86_BUILTIN_UCOMILESS, 208890285Sobrien IX86_BUILTIN_UCOMIGTSS, 208990285Sobrien IX86_BUILTIN_UCOMIGESS, 209090285Sobrien IX86_BUILTIN_UCOMINEQSS, 209190285Sobrien 209290285Sobrien IX86_BUILTIN_CVTPI2PS, 209390285Sobrien IX86_BUILTIN_CVTPS2PI, 209490285Sobrien IX86_BUILTIN_CVTSI2SS, 209590285Sobrien IX86_BUILTIN_CVTSS2SI, 209690285Sobrien IX86_BUILTIN_CVTTPS2PI, 209790285Sobrien IX86_BUILTIN_CVTTSS2SI, 209890285Sobrien 209990285Sobrien IX86_BUILTIN_MAXPS, 210090285Sobrien IX86_BUILTIN_MAXSS, 210190285Sobrien IX86_BUILTIN_MINPS, 210290285Sobrien IX86_BUILTIN_MINSS, 210390285Sobrien 210490285Sobrien IX86_BUILTIN_LOADAPS, 210590285Sobrien IX86_BUILTIN_LOADUPS, 210690285Sobrien IX86_BUILTIN_STOREAPS, 210790285Sobrien IX86_BUILTIN_STOREUPS, 210890285Sobrien IX86_BUILTIN_LOADSS, 210990285Sobrien IX86_BUILTIN_STORESS, 211090285Sobrien IX86_BUILTIN_MOVSS, 211190285Sobrien 211290285Sobrien IX86_BUILTIN_MOVHLPS, 211390285Sobrien IX86_BUILTIN_MOVLHPS, 211490285Sobrien IX86_BUILTIN_LOADHPS, 211590285Sobrien IX86_BUILTIN_LOADLPS, 211690285Sobrien IX86_BUILTIN_STOREHPS, 211790285Sobrien IX86_BUILTIN_STORELPS, 211890285Sobrien 211990285Sobrien IX86_BUILTIN_MASKMOVQ, 212090285Sobrien IX86_BUILTIN_MOVMSKPS, 212190285Sobrien IX86_BUILTIN_PMOVMSKB, 212290285Sobrien 212390285Sobrien IX86_BUILTIN_MOVNTPS, 212490285Sobrien IX86_BUILTIN_MOVNTQ, 212590285Sobrien 212690285Sobrien IX86_BUILTIN_PACKSSWB, 212790285Sobrien IX86_BUILTIN_PACKSSDW, 212890285Sobrien IX86_BUILTIN_PACKUSWB, 212990285Sobrien 213090285Sobrien IX86_BUILTIN_PADDB, 213190285Sobrien IX86_BUILTIN_PADDW, 213290285Sobrien IX86_BUILTIN_PADDD, 213390285Sobrien IX86_BUILTIN_PADDSB, 213490285Sobrien IX86_BUILTIN_PADDSW, 213590285Sobrien IX86_BUILTIN_PADDUSB, 213690285Sobrien IX86_BUILTIN_PADDUSW, 213790285Sobrien IX86_BUILTIN_PSUBB, 213890285Sobrien IX86_BUILTIN_PSUBW, 213990285Sobrien IX86_BUILTIN_PSUBD, 214090285Sobrien IX86_BUILTIN_PSUBSB, 214190285Sobrien IX86_BUILTIN_PSUBSW, 214290285Sobrien IX86_BUILTIN_PSUBUSB, 214390285Sobrien IX86_BUILTIN_PSUBUSW, 214490285Sobrien 214590285Sobrien IX86_BUILTIN_PAND, 214690285Sobrien IX86_BUILTIN_PANDN, 214790285Sobrien IX86_BUILTIN_POR, 214890285Sobrien IX86_BUILTIN_PXOR, 214990285Sobrien 215090285Sobrien IX86_BUILTIN_PAVGB, 215190285Sobrien IX86_BUILTIN_PAVGW, 215290285Sobrien 215390285Sobrien IX86_BUILTIN_PCMPEQB, 215490285Sobrien IX86_BUILTIN_PCMPEQW, 215590285Sobrien IX86_BUILTIN_PCMPEQD, 215690285Sobrien IX86_BUILTIN_PCMPGTB, 215790285Sobrien IX86_BUILTIN_PCMPGTW, 215890285Sobrien IX86_BUILTIN_PCMPGTD, 215990285Sobrien 216090285Sobrien IX86_BUILTIN_PEXTRW, 216190285Sobrien IX86_BUILTIN_PINSRW, 216290285Sobrien 216390285Sobrien IX86_BUILTIN_PMADDWD, 216490285Sobrien 216590285Sobrien IX86_BUILTIN_PMAXSW, 216690285Sobrien IX86_BUILTIN_PMAXUB, 216790285Sobrien IX86_BUILTIN_PMINSW, 216890285Sobrien IX86_BUILTIN_PMINUB, 216990285Sobrien 217090285Sobrien IX86_BUILTIN_PMULHUW, 217190285Sobrien IX86_BUILTIN_PMULHW, 217290285Sobrien IX86_BUILTIN_PMULLW, 217390285Sobrien 217490285Sobrien IX86_BUILTIN_PSADBW, 217590285Sobrien IX86_BUILTIN_PSHUFW, 217690285Sobrien 217790285Sobrien IX86_BUILTIN_PSLLW, 217890285Sobrien IX86_BUILTIN_PSLLD, 217990285Sobrien IX86_BUILTIN_PSLLQ, 218090285Sobrien IX86_BUILTIN_PSRAW, 218190285Sobrien IX86_BUILTIN_PSRAD, 218290285Sobrien IX86_BUILTIN_PSRLW, 218390285Sobrien IX86_BUILTIN_PSRLD, 218490285Sobrien IX86_BUILTIN_PSRLQ, 218590285Sobrien IX86_BUILTIN_PSLLWI, 218690285Sobrien IX86_BUILTIN_PSLLDI, 218790285Sobrien IX86_BUILTIN_PSLLQI, 218890285Sobrien IX86_BUILTIN_PSRAWI, 218990285Sobrien IX86_BUILTIN_PSRADI, 219090285Sobrien IX86_BUILTIN_PSRLWI, 219190285Sobrien IX86_BUILTIN_PSRLDI, 219290285Sobrien IX86_BUILTIN_PSRLQI, 219390285Sobrien 219490285Sobrien IX86_BUILTIN_PUNPCKHBW, 219590285Sobrien IX86_BUILTIN_PUNPCKHWD, 219690285Sobrien IX86_BUILTIN_PUNPCKHDQ, 219790285Sobrien IX86_BUILTIN_PUNPCKLBW, 219890285Sobrien IX86_BUILTIN_PUNPCKLWD, 219990285Sobrien IX86_BUILTIN_PUNPCKLDQ, 220090285Sobrien 220190285Sobrien IX86_BUILTIN_SHUFPS, 220290285Sobrien 220390285Sobrien IX86_BUILTIN_RCPPS, 220490285Sobrien IX86_BUILTIN_RCPSS, 220590285Sobrien IX86_BUILTIN_RSQRTPS, 220690285Sobrien IX86_BUILTIN_RSQRTSS, 220790285Sobrien IX86_BUILTIN_SQRTPS, 220890285Sobrien IX86_BUILTIN_SQRTSS, 220990285Sobrien 221090285Sobrien IX86_BUILTIN_UNPCKHPS, 221190285Sobrien IX86_BUILTIN_UNPCKLPS, 221290285Sobrien 221390285Sobrien IX86_BUILTIN_ANDPS, 221490285Sobrien IX86_BUILTIN_ANDNPS, 221590285Sobrien IX86_BUILTIN_ORPS, 221690285Sobrien IX86_BUILTIN_XORPS, 221790285Sobrien 221890285Sobrien IX86_BUILTIN_EMMS, 221990285Sobrien IX86_BUILTIN_LDMXCSR, 222090285Sobrien IX86_BUILTIN_STMXCSR, 222190285Sobrien IX86_BUILTIN_SFENCE, 222290285Sobrien 222390285Sobrien /* 3DNow! Original */ 222490285Sobrien IX86_BUILTIN_FEMMS, 222590285Sobrien IX86_BUILTIN_PAVGUSB, 222690285Sobrien IX86_BUILTIN_PF2ID, 222790285Sobrien IX86_BUILTIN_PFACC, 222890285Sobrien IX86_BUILTIN_PFADD, 222990285Sobrien IX86_BUILTIN_PFCMPEQ, 223090285Sobrien IX86_BUILTIN_PFCMPGE, 223190285Sobrien IX86_BUILTIN_PFCMPGT, 223290285Sobrien IX86_BUILTIN_PFMAX, 223390285Sobrien IX86_BUILTIN_PFMIN, 223490285Sobrien IX86_BUILTIN_PFMUL, 223590285Sobrien IX86_BUILTIN_PFRCP, 223690285Sobrien IX86_BUILTIN_PFRCPIT1, 223790285Sobrien IX86_BUILTIN_PFRCPIT2, 223890285Sobrien IX86_BUILTIN_PFRSQIT1, 223990285Sobrien IX86_BUILTIN_PFRSQRT, 224090285Sobrien IX86_BUILTIN_PFSUB, 224190285Sobrien IX86_BUILTIN_PFSUBR, 224290285Sobrien IX86_BUILTIN_PI2FD, 224390285Sobrien IX86_BUILTIN_PMULHRW, 224490285Sobrien 224590285Sobrien /* 3DNow! Athlon Extensions */ 224690285Sobrien IX86_BUILTIN_PF2IW, 224790285Sobrien IX86_BUILTIN_PFNACC, 224890285Sobrien IX86_BUILTIN_PFPNACC, 224990285Sobrien IX86_BUILTIN_PI2FW, 225090285Sobrien IX86_BUILTIN_PSWAPDSI, 225190285Sobrien IX86_BUILTIN_PSWAPDSF, 225290285Sobrien 225390285Sobrien IX86_BUILTIN_SSE_ZERO, 225490285Sobrien IX86_BUILTIN_MMX_ZERO, 225590285Sobrien 225690285Sobrien IX86_BUILTIN_MAX 225790285Sobrien}; 225890285Sobrien 225918334Speter/* Define this macro if references to a symbol must be treated 226018334Speter differently depending on something about the variable or 226118334Speter function named by the symbol (such as what section it is in). 226218334Speter 226318334Speter On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol 226418334Speter so that we may access it directly in the GOT. */ 226518334Speter 226690285Sobrien#define ENCODE_SECTION_INFO(DECL) \ 226790285Sobriendo { \ 226890285Sobrien if (flag_pic) \ 226990285Sobrien { \ 227090285Sobrien rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \ 227190285Sobrien ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \ 227290285Sobrien \ 227390285Sobrien if (GET_CODE (rtl) == MEM) \ 227490285Sobrien { \ 227590285Sobrien if (TARGET_DEBUG_ADDR \ 227690285Sobrien && TREE_CODE_CLASS (TREE_CODE (DECL)) == 'd') \ 227790285Sobrien { \ 227890285Sobrien fprintf (stderr, "Encode %s, public = %d\n", \ 227990285Sobrien IDENTIFIER_POINTER (DECL_NAME (DECL)), \ 228090285Sobrien TREE_PUBLIC (DECL)); \ 228190285Sobrien } \ 228290285Sobrien \ 228390285Sobrien SYMBOL_REF_FLAG (XEXP (rtl, 0)) \ 228490285Sobrien = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \ 228590285Sobrien || ! TREE_PUBLIC (DECL)); \ 228690285Sobrien } \ 228790285Sobrien } \ 228890285Sobrien} while (0) 228918334Speter 229018334Speter/* The `FINALIZE_PIC' macro serves as a hook to emit these special 229118334Speter codes once the function is being compiled into assembly code, but 229218334Speter not before. (It is not done before, because in the case of 229318334Speter compiling an inline function, it would lead to multiple PIC 229418334Speter prologues being included in functions which used inline functions 229518334Speter and were compiled to assembly language.) */ 229618334Speter 229790285Sobrien#define FINALIZE_PIC \ 229890285Sobrien (current_function_uses_pic_offset_table |= current_function_profile) 229918334Speter 230018334Speter 230118334Speter/* Max number of args passed in registers. If this is more than 3, we will 230218334Speter have problems with ebx (register #4), since it is a caller save register and 230318334Speter is also used as the pic register in ELF. So for now, don't allow more than 230418334Speter 3 registers to be passed in registers. */ 230518334Speter 230690285Sobrien#define REGPARM_MAX (TARGET_64BIT ? 6 : 3) 230718334Speter 230890285Sobrien#define SSE_REGPARM_MAX (TARGET_64BIT ? 8 : 0) 230990285Sobrien 231018334Speter 231118334Speter/* Specify the machine mode that this machine uses 231218334Speter for the index in the tablejump instruction. */ 231390285Sobrien#define CASE_VECTOR_MODE (!TARGET_64BIT || flag_pic ? SImode : DImode) 231418334Speter 231550654Sobrien/* Define as C expression which evaluates to nonzero if the tablejump 231650654Sobrien instruction expects the table to contain offsets from the address of the 231750654Sobrien table. 231890285Sobrien Do not define this if the table should contain absolute addresses. */ 231950654Sobrien/* #define CASE_VECTOR_PC_RELATIVE 1 */ 232018334Speter 232118334Speter/* Define this as 1 if `char' should by default be signed; else as 0. */ 232218334Speter#define DEFAULT_SIGNED_CHAR 1 232318334Speter 232490285Sobrien/* Number of bytes moved into a data cache for a single prefetch operation. */ 232590285Sobrien#define PREFETCH_BLOCK ix86_cost->prefetch_block 232690285Sobrien 232790285Sobrien/* Number of prefetch operations that can be done in parallel. */ 232890285Sobrien#define SIMULTANEOUS_PREFETCHES ix86_cost->simultaneous_prefetches 232990285Sobrien 233018334Speter/* Max number of bytes we can move from memory to memory 233118334Speter in one reasonably fast instruction. */ 233290285Sobrien#define MOVE_MAX 16 233318334Speter 233490285Sobrien/* MOVE_MAX_PIECES is the number of bytes at a time which we can 233590285Sobrien move efficiently, as opposed to MOVE_MAX which is the maximum 233690285Sobrien number of bytes we can move with a single instruction. */ 233790285Sobrien#define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4) 233890285Sobrien 233952295Sobrien/* If a memory-to-memory move would take MOVE_RATIO or more simple 234052295Sobrien move-instruction pairs, we will do a movstr or libcall instead. 234152295Sobrien Increasing the value will always make code faster, but eventually 234252295Sobrien incurs high cost in increased code size. 234318334Speter 234490285Sobrien If you don't define this, a reasonable default is used. */ 234518334Speter 234690285Sobrien#define MOVE_RATIO (optimize_size ? 3 : ix86_cost->move_ratio) 234718334Speter 234818334Speter/* Define if shifts truncate the shift count 234918334Speter which implies one can omit a sign-extension or zero-extension 235018334Speter of a shift count. */ 235190285Sobrien/* On i386, shifts do truncate the count. But bit opcodes don't. */ 235218334Speter 235318334Speter/* #define SHIFT_COUNT_TRUNCATED */ 235418334Speter 235518334Speter/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 235618334Speter is done just by pretending it is already truncated. */ 235718334Speter#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 235818334Speter 235918334Speter/* We assume that the store-condition-codes instructions store 0 for false 236018334Speter and some other value for true. This is the value stored for true. */ 236118334Speter 236218334Speter#define STORE_FLAG_VALUE 1 236318334Speter 236418334Speter/* When a prototype says `char' or `short', really pass an `int'. 236518334Speter (The 386 can't easily push less than an int.) */ 236618334Speter 236790285Sobrien#define PROMOTE_PROTOTYPES 1 236818334Speter 236990285Sobrien/* A macro to update M and UNSIGNEDP when an object whose type is 237090285Sobrien TYPE and which has the specified mode and signedness is to be 237190285Sobrien stored in a register. This macro is only called when TYPE is a 237290285Sobrien scalar type. 237390285Sobrien 237490285Sobrien On i386 it is sometimes useful to promote HImode and QImode 237590285Sobrien quantities to SImode. The choice depends on target type. */ 237690285Sobrien 237790285Sobrien#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ 237890285Sobriendo { \ 237990285Sobrien if (((MODE) == HImode && TARGET_PROMOTE_HI_REGS) \ 238090285Sobrien || ((MODE) == QImode && TARGET_PROMOTE_QI_REGS)) \ 238190285Sobrien (MODE) = SImode; \ 238290285Sobrien} while (0) 238390285Sobrien 238418334Speter/* Specify the machine mode that pointers have. 238518334Speter After generation of rtl, the compiler makes no further distinction 238618334Speter between pointers and any other objects of this machine mode. */ 238790285Sobrien#define Pmode (TARGET_64BIT ? DImode : SImode) 238818334Speter 238918334Speter/* A function address in a call instruction 239018334Speter is a byte address (for indexing purposes) 239118334Speter so give the MEM rtx a byte's mode. */ 239218334Speter#define FUNCTION_MODE QImode 239350654Sobrien 239450654Sobrien/* A part of a C `switch' statement that describes the relative costs 239550654Sobrien of constant RTL expressions. It must contain `case' labels for 239650654Sobrien expression codes `const_int', `const', `symbol_ref', `label_ref' 239750654Sobrien and `const_double'. Each case must ultimately reach a `return' 239850654Sobrien statement to return the relative cost of the use of that kind of 239950654Sobrien constant value in an expression. The cost may depend on the 240050654Sobrien precise value of the constant, which is available for examination 240150654Sobrien in X, and the rtx code of the expression in which it is contained, 240250654Sobrien found in OUTER_CODE. 240350654Sobrien 240450654Sobrien CODE is the expression code--redundant, since it can be obtained 240550654Sobrien with `GET_CODE (X)'. */ 240618334Speter 240790285Sobrien#define CONST_COSTS(RTX, CODE, OUTER_CODE) \ 240818334Speter case CONST_INT: \ 240918334Speter case CONST: \ 241018334Speter case LABEL_REF: \ 241118334Speter case SYMBOL_REF: \ 241290285Sobrien if (TARGET_64BIT && !x86_64_sign_extended_value (RTX)) \ 241390285Sobrien return 3; \ 241490285Sobrien if (TARGET_64BIT && !x86_64_zero_extended_value (RTX)) \ 241590285Sobrien return 2; \ 241690285Sobrien return flag_pic && SYMBOLIC_CONST (RTX) ? 1 : 0; \ 241750654Sobrien \ 241818334Speter case CONST_DOUBLE: \ 241918334Speter { \ 242018334Speter int code; \ 242118334Speter if (GET_MODE (RTX) == VOIDmode) \ 242290285Sobrien return 0; \ 242350654Sobrien \ 242418334Speter code = standard_80387_constant_p (RTX); \ 242590285Sobrien return code == 1 ? 1 : \ 242690285Sobrien code == 2 ? 2 : \ 242790285Sobrien 3; \ 242818334Speter } 242918334Speter 243050654Sobrien/* Delete the definition here when TOPLEVEL_COSTS_N_INSNS gets added to cse.c */ 243190285Sobrien#define TOPLEVEL_COSTS_N_INSNS(N) \ 243290285Sobrien do { total = COSTS_N_INSNS (N); goto egress_rtx_costs; } while (0) 243318334Speter 243450654Sobrien/* Like `CONST_COSTS' but applies to nonconstant RTL expressions. 243550654Sobrien This can be used, for example, to indicate how costly a multiply 243650654Sobrien instruction is. In writing this macro, you can use the construct 243750654Sobrien `COSTS_N_INSNS (N)' to specify a cost equal to N fast 243850654Sobrien instructions. OUTER_CODE is the code of the expression in which X 243950654Sobrien is contained. 244050654Sobrien 244150654Sobrien This macro is optional; do not define it if the default cost 244250654Sobrien assumptions are adequate for the target machine. */ 244350654Sobrien 244490285Sobrien#define RTX_COSTS(X, CODE, OUTER_CODE) \ 244590285Sobrien case ZERO_EXTEND: \ 244690285Sobrien /* The zero extensions is often completely free on x86_64, so make \ 244790285Sobrien it as cheap as possible. */ \ 244890285Sobrien if (TARGET_64BIT && GET_MODE (X) == DImode \ 244990285Sobrien && GET_MODE (XEXP (X, 0)) == SImode) \ 245090285Sobrien { \ 245190285Sobrien total = 1; goto egress_rtx_costs; \ 245290285Sobrien } \ 245390285Sobrien else \ 245490285Sobrien TOPLEVEL_COSTS_N_INSNS (TARGET_ZERO_EXTEND_WITH_AND ? \ 245590285Sobrien ix86_cost->add : ix86_cost->movzx); \ 245690285Sobrien break; \ 245790285Sobrien case SIGN_EXTEND: \ 245890285Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->movsx); \ 245990285Sobrien break; \ 246050654Sobrien case ASHIFT: \ 246150654Sobrien if (GET_CODE (XEXP (X, 1)) == CONST_INT \ 246290285Sobrien && (GET_MODE (XEXP (X, 0)) != DImode || TARGET_64BIT)) \ 246350654Sobrien { \ 246450654Sobrien HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \ 246550654Sobrien if (value == 1) \ 246690285Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->add); \ 246790285Sobrien if ((value == 2 || value == 3) \ 246890285Sobrien && !TARGET_DECOMPOSE_LEA \ 246990285Sobrien && ix86_cost->lea <= ix86_cost->shift_const) \ 247090285Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->lea); \ 247150654Sobrien } \ 247250654Sobrien /* fall through */ \ 247350654Sobrien \ 247450654Sobrien case ROTATE: \ 247550654Sobrien case ASHIFTRT: \ 247650654Sobrien case LSHIFTRT: \ 247750654Sobrien case ROTATERT: \ 247890285Sobrien if (!TARGET_64BIT && GET_MODE (XEXP (X, 0)) == DImode) \ 247950654Sobrien { \ 248050654Sobrien if (GET_CODE (XEXP (X, 1)) == CONST_INT) \ 248150654Sobrien { \ 248250654Sobrien if (INTVAL (XEXP (X, 1)) > 32) \ 248390285Sobrien TOPLEVEL_COSTS_N_INSNS(ix86_cost->shift_const + 2); \ 248490285Sobrien else \ 248590285Sobrien TOPLEVEL_COSTS_N_INSNS(ix86_cost->shift_const * 2); \ 248650654Sobrien } \ 248790285Sobrien else \ 248890285Sobrien { \ 248990285Sobrien if (GET_CODE (XEXP (X, 1)) == AND) \ 249090285Sobrien TOPLEVEL_COSTS_N_INSNS(ix86_cost->shift_var * 2); \ 249190285Sobrien else \ 249290285Sobrien TOPLEVEL_COSTS_N_INSNS(ix86_cost->shift_var * 6 + 2); \ 249390285Sobrien } \ 249450654Sobrien } \ 249590285Sobrien else \ 249690285Sobrien { \ 249790285Sobrien if (GET_CODE (XEXP (X, 1)) == CONST_INT) \ 249890285Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->shift_const); \ 249990285Sobrien else \ 250090285Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->shift_var); \ 250190285Sobrien } \ 250290285Sobrien break; \ 250350654Sobrien \ 250450654Sobrien case MULT: \ 250550654Sobrien if (GET_CODE (XEXP (X, 1)) == CONST_INT) \ 250650654Sobrien { \ 250750654Sobrien unsigned HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \ 250850654Sobrien int nbits = 0; \ 250950654Sobrien \ 251050654Sobrien while (value != 0) \ 251150654Sobrien { \ 251250654Sobrien nbits++; \ 251350654Sobrien value >>= 1; \ 251450654Sobrien } \ 251550654Sobrien \ 251690285Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \ 251790285Sobrien + nbits * ix86_cost->mult_bit); \ 251850654Sobrien } \ 251950654Sobrien else /* This is arbitrary */ \ 252050654Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \ 252150654Sobrien + 7 * ix86_cost->mult_bit); \ 252250654Sobrien \ 252350654Sobrien case DIV: \ 252450654Sobrien case UDIV: \ 252550654Sobrien case MOD: \ 252650654Sobrien case UMOD: \ 252750654Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide); \ 252850654Sobrien \ 252950654Sobrien case PLUS: \ 253090285Sobrien if (!TARGET_DECOMPOSE_LEA \ 253190285Sobrien && INTEGRAL_MODE_P (GET_MODE (X)) \ 253290285Sobrien && GET_MODE_BITSIZE (GET_MODE (X)) <= GET_MODE_BITSIZE (Pmode)) \ 253390285Sobrien { \ 253490285Sobrien if (GET_CODE (XEXP (X, 0)) == PLUS \ 253590285Sobrien && GET_CODE (XEXP (XEXP (X, 0), 0)) == MULT \ 253690285Sobrien && GET_CODE (XEXP (XEXP (XEXP (X, 0), 0), 1)) == CONST_INT \ 253790285Sobrien && CONSTANT_P (XEXP (X, 1))) \ 253890285Sobrien { \ 253990285Sobrien HOST_WIDE_INT val = INTVAL (XEXP (XEXP (XEXP (X, 0), 0), 1));\ 254090285Sobrien if (val == 2 || val == 4 || val == 8) \ 254190285Sobrien { \ 254290285Sobrien return (COSTS_N_INSNS (ix86_cost->lea) \ 254390285Sobrien + rtx_cost (XEXP (XEXP (X, 0), 1), \ 254490285Sobrien (OUTER_CODE)) \ 254590285Sobrien + rtx_cost (XEXP (XEXP (XEXP (X, 0), 0), 0), \ 254690285Sobrien (OUTER_CODE)) \ 254790285Sobrien + rtx_cost (XEXP (X, 1), (OUTER_CODE))); \ 254890285Sobrien } \ 254990285Sobrien } \ 255090285Sobrien else if (GET_CODE (XEXP (X, 0)) == MULT \ 255190285Sobrien && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT) \ 255290285Sobrien { \ 255390285Sobrien HOST_WIDE_INT val = INTVAL (XEXP (XEXP (X, 0), 1)); \ 255490285Sobrien if (val == 2 || val == 4 || val == 8) \ 255590285Sobrien { \ 255690285Sobrien return (COSTS_N_INSNS (ix86_cost->lea) \ 255790285Sobrien + rtx_cost (XEXP (XEXP (X, 0), 0), \ 255890285Sobrien (OUTER_CODE)) \ 255990285Sobrien + rtx_cost (XEXP (X, 1), (OUTER_CODE))); \ 256090285Sobrien } \ 256190285Sobrien } \ 256290285Sobrien else if (GET_CODE (XEXP (X, 0)) == PLUS) \ 256390285Sobrien { \ 256490285Sobrien return (COSTS_N_INSNS (ix86_cost->lea) \ 256590285Sobrien + rtx_cost (XEXP (XEXP (X, 0), 0), (OUTER_CODE)) \ 256690285Sobrien + rtx_cost (XEXP (XEXP (X, 0), 1), (OUTER_CODE)) \ 256790285Sobrien + rtx_cost (XEXP (X, 1), (OUTER_CODE))); \ 256890285Sobrien } \ 256990285Sobrien } \ 257050654Sobrien \ 257150654Sobrien /* fall through */ \ 257250654Sobrien case AND: \ 257350654Sobrien case IOR: \ 257450654Sobrien case XOR: \ 257550654Sobrien case MINUS: \ 257690285Sobrien if (!TARGET_64BIT && GET_MODE (X) == DImode) \ 257790285Sobrien return (COSTS_N_INSNS (ix86_cost->add) * 2 \ 257890285Sobrien + (rtx_cost (XEXP (X, 0), (OUTER_CODE)) \ 257990285Sobrien << (GET_MODE (XEXP (X, 0)) != DImode)) \ 258090285Sobrien + (rtx_cost (XEXP (X, 1), (OUTER_CODE)) \ 258190285Sobrien << (GET_MODE (XEXP (X, 1)) != DImode))); \ 258290285Sobrien \ 258390285Sobrien /* fall through */ \ 258450654Sobrien case NEG: \ 258550654Sobrien case NOT: \ 258690285Sobrien if (!TARGET_64BIT && GET_MODE (X) == DImode) \ 258790285Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->add * 2); \ 258890285Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->add); \ 258990285Sobrien \ 259090285Sobrien egress_rtx_costs: \ 259190285Sobrien break; 259250654Sobrien 259350654Sobrien 259450654Sobrien/* An expression giving the cost of an addressing mode that contains 259550654Sobrien ADDRESS. If not defined, the cost is computed from the ADDRESS 259650654Sobrien expression and the `CONST_COSTS' values. 259750654Sobrien 259850654Sobrien For most CISC machines, the default cost is a good approximation 259950654Sobrien of the true cost of the addressing mode. However, on RISC 260050654Sobrien machines, all instructions normally have the same length and 260150654Sobrien execution time. Hence all addresses will have equal costs. 260250654Sobrien 260350654Sobrien In cases where more than one form of an address is known, the form 260450654Sobrien with the lowest cost will be used. If multiple forms have the 260550654Sobrien same, lowest, cost, the one that is the most complex will be used. 260650654Sobrien 260750654Sobrien For example, suppose an address that is equal to the sum of a 260850654Sobrien register and a constant is used twice in the same basic block. 260950654Sobrien When this macro is not defined, the address will be computed in a 261050654Sobrien register and memory references will be indirect through that 261150654Sobrien register. On machines where the cost of the addressing mode 261250654Sobrien containing the sum is no higher than that of a simple indirect 261350654Sobrien reference, this will produce an additional instruction and 261450654Sobrien possibly require an additional register. Proper specification of 261550654Sobrien this macro eliminates this overhead for such machines. 261650654Sobrien 261750654Sobrien Similar use of this macro is made in strength reduction of loops. 261850654Sobrien 261950654Sobrien ADDRESS need not be valid as an address. In such a case, the cost 262050654Sobrien is not relevant and can be any value; invalid addresses need not be 262150654Sobrien assigned a different cost. 262250654Sobrien 262350654Sobrien On machines where an address involving more than one register is as 262450654Sobrien cheap as an address computation involving only one register, 262550654Sobrien defining `ADDRESS_COST' to reflect this can cause two registers to 262650654Sobrien be live over a region of code where only one would have been if 262750654Sobrien `ADDRESS_COST' were not defined in that manner. This effect should 262850654Sobrien be considered in the definition of this macro. Equivalent costs 262950654Sobrien should probably only be given to addresses with different numbers 263050654Sobrien of registers on machines with lots of registers. 263150654Sobrien 263250654Sobrien This macro will normally either not be defined or be defined as a 263350654Sobrien constant. 263450654Sobrien 263518334Speter For i386, it is better to use a complex address than let gcc copy 263618334Speter the address into a reg and make a new pseudo. But not if the address 263718334Speter requires to two regs - that would mean more pseudos with longer 263818334Speter lifetimes. */ 263918334Speter 264018334Speter#define ADDRESS_COST(RTX) \ 264190285Sobrien ix86_address_cost (RTX) 264250654Sobrien 264390285Sobrien/* A C expression for the cost of moving data from a register in class FROM to 264490285Sobrien one in class TO. The classes are expressed using the enumeration values 264590285Sobrien such as `GENERAL_REGS'. A value of 2 is the default; other values are 264690285Sobrien interpreted relative to that. 264750654Sobrien 264890285Sobrien It is not required that the cost always equal 2 when FROM is the same as TO; 264990285Sobrien on some machines it is expensive to move between registers if they are not 265090285Sobrien general registers. */ 265150654Sobrien 265290285Sobrien#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ 265390285Sobrien ix86_register_move_cost ((MODE), (CLASS1), (CLASS2)) 265450654Sobrien 265550654Sobrien/* A C expression for the cost of moving data of mode M between a 265650654Sobrien register and memory. A value of 2 is the default; this cost is 265750654Sobrien relative to those in `REGISTER_MOVE_COST'. 265850654Sobrien 265950654Sobrien If moving between registers and memory is more expensive than 266050654Sobrien between two registers, you should define this macro to express the 266150654Sobrien relative cost. */ 266250654Sobrien 266390285Sobrien#define MEMORY_MOVE_COST(MODE, CLASS, IN) \ 266490285Sobrien ix86_memory_move_cost ((MODE), (CLASS), (IN)) 266550654Sobrien 266650654Sobrien/* A C expression for the cost of a branch instruction. A value of 1 266750654Sobrien is the default; other values are interpreted relative to that. */ 266850654Sobrien 266990285Sobrien#define BRANCH_COST ix86_branch_cost 267050654Sobrien 267150654Sobrien/* Define this macro as a C expression which is nonzero if accessing 267250654Sobrien less than a word of memory (i.e. a `char' or a `short') is no 267350654Sobrien faster than accessing a word of memory, i.e., if such access 267450654Sobrien require more than one instruction or if there is no difference in 267550654Sobrien cost between byte and (aligned) word loads. 267650654Sobrien 267750654Sobrien When this macro is not defined, the compiler will access a field by 267850654Sobrien finding the smallest containing object; when it is defined, a 267950654Sobrien fullword load will be used if alignment permits. Unless bytes 268050654Sobrien accesses are faster than word accesses, using word accesses is 268150654Sobrien preferable since it may eliminate subsequent memory access if 268250654Sobrien subsequent accesses occur to other fields in the same word of the 268350654Sobrien structure, but to different bytes. */ 268450654Sobrien 268550654Sobrien#define SLOW_BYTE_ACCESS 0 268650654Sobrien 268750654Sobrien/* Nonzero if access to memory by shorts is slow and undesirable. */ 268850654Sobrien#define SLOW_SHORT_ACCESS 0 268950654Sobrien 269050654Sobrien/* Define this macro to be the value 1 if unaligned accesses have a 269150654Sobrien cost many times greater than aligned accesses, for example if they 269250654Sobrien are emulated in a trap handler. 269350654Sobrien 269450654Sobrien When this macro is non-zero, the compiler will act as if 269550654Sobrien `STRICT_ALIGNMENT' were non-zero when generating code for block 269650654Sobrien moves. This can cause significantly more instructions to be 269750654Sobrien produced. Therefore, do not set this macro non-zero if unaligned 269850654Sobrien accesses only add a cycle or two to the time for a memory access. 269950654Sobrien 270050654Sobrien If the value of this macro is always zero, it need not be defined. */ 270150654Sobrien 270290285Sobrien/* #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 0 */ 270350654Sobrien 270450654Sobrien/* Define this macro to inhibit strength reduction of memory 270550654Sobrien addresses. (On some machines, such strength reduction seems to do 270650654Sobrien harm rather than good.) */ 270750654Sobrien 270850654Sobrien/* #define DONT_REDUCE_ADDR */ 270950654Sobrien 271050654Sobrien/* Define this macro if it is as good or better to call a constant 271150654Sobrien function address than to call an address kept in a register. 271250654Sobrien 271350654Sobrien Desirable on the 386 because a CALL with a constant address is 271450654Sobrien faster than one with a register address. */ 271550654Sobrien 271650654Sobrien#define NO_FUNCTION_CSE 271750654Sobrien 271850654Sobrien/* Define this macro if it is as good or better for a function to call 271950654Sobrien itself with an explicit address than to call an address kept in a 272050654Sobrien register. */ 272150654Sobrien 272250654Sobrien#define NO_RECURSIVE_FUNCTION_CSE 272390285Sobrien 272490285Sobrien/* Add any extra modes needed to represent the condition code. 272550654Sobrien 272690285Sobrien For the i386, we need separate modes when floating-point 272790285Sobrien equality comparisons are being done. 272890285Sobrien 272990285Sobrien Add CCNO to indicate comparisons against zero that requires 273090285Sobrien Overflow flag to be unset. Sign bit test is used instead and 273190285Sobrien thus can be used to form "a&b>0" type of tests. 273250654Sobrien 273390285Sobrien Add CCGC to indicate comparisons agains zero that allows 273490285Sobrien unspecified garbage in the Carry flag. This mode is used 273590285Sobrien by inc/dec instructions. 273650654Sobrien 273790285Sobrien Add CCGOC to indicate comparisons agains zero that allows 273890285Sobrien unspecified garbage in the Carry and Overflow flag. This 273990285Sobrien mode is used to simulate comparisons of (a-b) and (a+b) 274090285Sobrien against zero using sub/cmp/add operations. 274150654Sobrien 274290285Sobrien Add CCZ to indicate that only the Zero flag is valid. */ 274352295Sobrien 274490285Sobrien#define EXTRA_CC_MODES \ 274590285Sobrien CC (CCGCmode, "CCGC") \ 274690285Sobrien CC (CCGOCmode, "CCGOC") \ 274790285Sobrien CC (CCNOmode, "CCNO") \ 274890285Sobrien CC (CCZmode, "CCZ") \ 274990285Sobrien CC (CCFPmode, "CCFP") \ 275090285Sobrien CC (CCFPUmode, "CCFPU") 275118334Speter 275218334Speter/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, 275318334Speter return the mode to be used for the comparison. 275418334Speter 275518334Speter For floating-point equality comparisons, CCFPEQmode should be used. 275690285Sobrien VOIDmode should be used in all other cases. 275718334Speter 275890285Sobrien For integer comparisons against zero, reduce to CCNOmode or CCZmode if 275990285Sobrien possible, to allow for more combinations. */ 276018334Speter 276190285Sobrien#define SELECT_CC_MODE(OP, X, Y) ix86_cc_mode ((OP), (X), (Y)) 276218334Speter 276390285Sobrien/* Return non-zero if MODE implies a floating point inequality can be 276490285Sobrien reversed. */ 276518334Speter 276690285Sobrien#define REVERSIBLE_CC_MODE(MODE) 1 276718334Speter 276890285Sobrien/* A C expression whose value is reversed condition code of the CODE for 276990285Sobrien comparison done in CC_MODE mode. */ 277090285Sobrien#define REVERSE_CONDITION(CODE, MODE) \ 277190285Sobrien ((MODE) != CCFPmode && (MODE) != CCFPUmode ? reverse_condition (CODE) \ 277290285Sobrien : reverse_condition_maybe_unordered (CODE)) 277318334Speter 277418334Speter 277518334Speter/* Control the assembler format that we output, to the extent 277618334Speter this does not vary between assemblers. */ 277718334Speter 277818334Speter/* How to refer to registers in assembler output. 277990285Sobrien This sequence is indexed by compiler's hard-register-number (see above). */ 278018334Speter 278118334Speter/* In order to refer to the first 8 regs as 32 bit regs prefix an "e" 278218334Speter For non floating point regs, the following are the HImode names. 278318334Speter 278418334Speter For float regs, the stack top is sometimes referred to as "%st(0)" 278518334Speter instead of just "%st". PRINT_REG handles this with the "y" code. */ 278618334Speter 278790285Sobrien#undef HI_REGISTER_NAMES 278890285Sobrien#define HI_REGISTER_NAMES \ 278990285Sobrien{"ax","dx","cx","bx","si","di","bp","sp", \ 279090285Sobrien "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","", \ 279190285Sobrien "flags","fpsr", "dirflag", "frame", \ 279290285Sobrien "xmm0","xmm1","xmm2","xmm3","xmm4","xmm5","xmm6","xmm7", \ 279390285Sobrien "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7" , \ 279490285Sobrien "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ 279590285Sobrien "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"} 279618334Speter 279718334Speter#define REGISTER_NAMES HI_REGISTER_NAMES 279818334Speter 279918334Speter/* Table of additional register names to use in user input. */ 280018334Speter 280118334Speter#define ADDITIONAL_REGISTER_NAMES \ 280250654Sobrien{ { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \ 280350654Sobrien { "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \ 280490285Sobrien { "rax", 0 }, { "rdx", 1 }, { "rcx", 2 }, { "rbx", 3 }, \ 280590285Sobrien { "rsi", 4 }, { "rdi", 5 }, { "rbp", 6 }, { "rsp", 7 }, \ 280650654Sobrien { "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 }, \ 280790285Sobrien { "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 }, \ 280890285Sobrien { "mm0", 8}, { "mm1", 9}, { "mm2", 10}, { "mm3", 11}, \ 280990285Sobrien { "mm4", 12}, { "mm5", 13}, { "mm6", 14}, { "mm7", 15} } 281018334Speter 281118334Speter/* Note we are omitting these since currently I don't know how 281218334Speterto get gcc to use these, since they want the same but different 281318334Speternumber as al, and ax. 281418334Speter*/ 281518334Speter 281618334Speter#define QI_REGISTER_NAMES \ 281790285Sobrien{"al", "dl", "cl", "bl", "sil", "dil", "bpl", "spl",} 281818334Speter 281918334Speter/* These parallel the array above, and can be used to access bits 8:15 282090285Sobrien of regs 0 through 3. */ 282118334Speter 282218334Speter#define QI_HIGH_REGISTER_NAMES \ 282318334Speter{"ah", "dh", "ch", "bh", } 282418334Speter 282518334Speter/* How to renumber registers for dbx and gdb. */ 282618334Speter 282790285Sobrien#define DBX_REGISTER_NUMBER(N) \ 282890285Sobrien (TARGET_64BIT ? dbx64_register_map[(N)] : dbx_register_map[(N)]) 282918334Speter 283090285Sobrienextern int const dbx_register_map[FIRST_PSEUDO_REGISTER]; 283190285Sobrienextern int const dbx64_register_map[FIRST_PSEUDO_REGISTER]; 283290285Sobrienextern int const svr4_dbx_register_map[FIRST_PSEUDO_REGISTER]; 283390285Sobrien 283450654Sobrien/* Before the prologue, RA is at 0(%esp). */ 283550654Sobrien#define INCOMING_RETURN_ADDR_RTX \ 283650654Sobrien gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM)) 283790285Sobrien 283850654Sobrien/* After the prologue, RA is at -4(AP) in the current frame. */ 283990285Sobrien#define RETURN_ADDR_RTX(COUNT, FRAME) \ 284090285Sobrien ((COUNT) == 0 \ 284190285Sobrien ? gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -UNITS_PER_WORD)) \ 284290285Sobrien : gen_rtx_MEM (Pmode, plus_constant (FRAME, UNITS_PER_WORD))) 284350654Sobrien 284490285Sobrien/* PC is dbx register 8; let's use that column for RA. */ 284590285Sobrien#define DWARF_FRAME_RETURN_COLUMN (TARGET_64BIT ? 16 : 8) 284650654Sobrien 284750654Sobrien/* Before the prologue, the top of the frame is at 4(%esp). */ 284890285Sobrien#define INCOMING_FRAME_SP_OFFSET UNITS_PER_WORD 284950654Sobrien 285090285Sobrien/* Describe how we implement __builtin_eh_return. */ 285190285Sobrien#define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? (N) : INVALID_REGNUM) 285290285Sobrien#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 2) 285318334Speter 285418334Speter 285590285Sobrien/* Select a format to encode pointers in exception handling data. CODE 285690285Sobrien is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is 285790285Sobrien true if the symbol may be affected by dynamic relocations. 285818334Speter 285990285Sobrien ??? All x86 object file formats are capable of representing this. 286090285Sobrien After all, the relocation needed is the same as for the call insn. 286190285Sobrien Whether or not a particular assembler allows us to enter such, I 286290285Sobrien guess we'll have to see. */ 286390285Sobrien#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \ 286490285Sobrien (flag_pic \ 286590285Sobrien ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4\ 286690285Sobrien : DW_EH_PE_absptr) 286718334Speter 286890285Sobrien/* This is how to output the definition of a user-level label named NAME, 286990285Sobrien such as the label on a static function or variable NAME. */ 287018334Speter 287190285Sobrien#define ASM_OUTPUT_LABEL(FILE, NAME) \ 287290285Sobrien (assemble_name ((FILE), (NAME)), fputs (":\n", (FILE))) 287318334Speter 287418334Speter/* Store in OUTPUT a string (made with alloca) containing 287518334Speter an assembler-name for a local static variable named NAME. 287618334Speter LABELNO is an integer which is different for each call. */ 287718334Speter 287818334Speter#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 287918334Speter( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 288018334Speter sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 288118334Speter 288218334Speter/* This is how to output an insn to push a register on the stack. 288318334Speter It need not be very fast code. */ 288418334Speter 288590285Sobrien#define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \ 288690285Sobrien asm_fprintf ((FILE), "\tpush{l}\t%%e%s\n", reg_names[(REGNO)]) 288718334Speter 288818334Speter/* This is how to output an insn to pop a register from the stack. 288918334Speter It need not be very fast code. */ 289018334Speter 289190285Sobrien#define ASM_OUTPUT_REG_POP(FILE, REGNO) \ 289290285Sobrien asm_fprintf ((FILE), "\tpop{l}\t%%e%s\n", reg_names[(REGNO)]) 289318334Speter 289490285Sobrien/* This is how to output an element of a case-vector that is absolute. */ 289518334Speter 289618334Speter#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 289790285Sobrien ix86_output_addr_vec_elt ((FILE), (VALUE)) 289818334Speter 289990285Sobrien/* This is how to output an element of a case-vector that is relative. */ 290018334Speter 290150654Sobrien#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 290290285Sobrien ix86_output_addr_diff_elt ((FILE), (VALUE), (REL)) 290318334Speter 290490285Sobrien/* Under some conditions we need jump tables in the text section, because 290590285Sobrien the assembler cannot handle label differences between sections. */ 290618334Speter 290790285Sobrien#define JUMP_TABLES_IN_TEXT_SECTION \ 290890285Sobrien (!TARGET_64BIT && flag_pic && !HAVE_AS_GOTOFF_IN_DATA) 290918334Speter 291090285Sobrien/* A C statement that outputs an address constant appropriate to 291190285Sobrien for DWARF debugging. */ 291290285Sobrien 291390285Sobrien#define ASM_OUTPUT_DWARF_ADDR_CONST(FILE, X) \ 291490285Sobrien i386_dwarf_output_addr_const ((FILE), (X)) 291590285Sobrien 291690285Sobrien/* Either simplify a location expression, or return the original. */ 291790285Sobrien 291890285Sobrien#define ASM_SIMPLIFY_DWARF_ADDR(X) \ 291990285Sobrien i386_simplify_dwarf_addr (X) 292090285Sobrien 292190285Sobrien/* Switch to init or fini section via SECTION_OP, emit a call to FUNC, 292290285Sobrien and switch back. For x86 we do this only to save a few bytes that 292390285Sobrien would otherwise be unused in the text section. */ 292490285Sobrien#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \ 292590285Sobrien asm (SECTION_OP "\n\t" \ 292690285Sobrien "call " USER_LABEL_PREFIX #FUNC "\n" \ 292790285Sobrien TEXT_SECTION_ASM_OP); 292818334Speter 292918334Speter/* Print operand X (an rtx) in assembler syntax to file FILE. 293018334Speter CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 293190285Sobrien Effect of various CODE letters is described in i386.c near 293290285Sobrien print_operand function. */ 293318334Speter 293490285Sobrien#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 293590285Sobrien ((CODE) == '*' || (CODE) == '+') 293618334Speter 293718334Speter/* Print the name of a register based on its machine mode and number. 293818334Speter If CODE is 'w', pretend the mode is HImode. 293918334Speter If CODE is 'b', pretend the mode is QImode. 294018334Speter If CODE is 'k', pretend the mode is SImode. 294190285Sobrien If CODE is 'q', pretend the mode is DImode. 294218334Speter If CODE is 'h', pretend the reg is the `high' byte register. 294390285Sobrien If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */ 294418334Speter 294590285Sobrien#define PRINT_REG(X, CODE, FILE) \ 294690285Sobrien print_reg ((X), (CODE), (FILE)) 294718334Speter 294818334Speter#define PRINT_OPERAND(FILE, X, CODE) \ 294990285Sobrien print_operand ((FILE), (X), (CODE)) 295018334Speter 295118334Speter#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 295290285Sobrien print_operand_address ((FILE), (ADDR)) 295318334Speter 295418334Speter/* Print the name of a register for based on its machine mode and number. 295518334Speter This macro is used to print debugging output. 295618334Speter This macro is different from PRINT_REG in that it may be used in 295718334Speter programs that are not linked with aux-output.o. */ 295818334Speter 295990285Sobrien#define DEBUG_PRINT_REG(X, CODE, FILE) \ 296090285Sobrien do { static const char * const hi_name[] = HI_REGISTER_NAMES; \ 296190285Sobrien static const char * const qi_name[] = QI_REGISTER_NAMES; \ 296290285Sobrien fprintf ((FILE), "%d ", REGNO (X)); \ 296390285Sobrien if (REGNO (X) == FLAGS_REG) \ 296490285Sobrien { fputs ("flags", (FILE)); break; } \ 296590285Sobrien if (REGNO (X) == DIRFLAG_REG) \ 296690285Sobrien { fputs ("dirflag", (FILE)); break; } \ 296790285Sobrien if (REGNO (X) == FPSR_REG) \ 296890285Sobrien { fputs ("fpsr", (FILE)); break; } \ 296918334Speter if (REGNO (X) == ARG_POINTER_REGNUM) \ 297090285Sobrien { fputs ("argp", (FILE)); break; } \ 297190285Sobrien if (REGNO (X) == FRAME_POINTER_REGNUM) \ 297290285Sobrien { fputs ("frame", (FILE)); break; } \ 297318334Speter if (STACK_TOP_P (X)) \ 297490285Sobrien { fputs ("st(0)", (FILE)); break; } \ 297518334Speter if (FP_REG_P (X)) \ 297690285Sobrien { fputs (hi_name[REGNO(X)], (FILE)); break; } \ 297790285Sobrien if (REX_INT_REG_P (X)) \ 297890285Sobrien { \ 297990285Sobrien switch (GET_MODE_SIZE (GET_MODE (X))) \ 298090285Sobrien { \ 298190285Sobrien default: \ 298290285Sobrien case 8: \ 298390285Sobrien fprintf ((FILE), "r%i", REGNO (X) \ 298490285Sobrien - FIRST_REX_INT_REG + 8); \ 298590285Sobrien break; \ 298690285Sobrien case 4: \ 298790285Sobrien fprintf ((FILE), "r%id", REGNO (X) \ 298890285Sobrien - FIRST_REX_INT_REG + 8); \ 298990285Sobrien break; \ 299090285Sobrien case 2: \ 299190285Sobrien fprintf ((FILE), "r%iw", REGNO (X) \ 299290285Sobrien - FIRST_REX_INT_REG + 8); \ 299390285Sobrien break; \ 299490285Sobrien case 1: \ 299590285Sobrien fprintf ((FILE), "r%ib", REGNO (X) \ 299690285Sobrien - FIRST_REX_INT_REG + 8); \ 299790285Sobrien break; \ 299890285Sobrien } \ 299990285Sobrien break; \ 300090285Sobrien } \ 300118334Speter switch (GET_MODE_SIZE (GET_MODE (X))) \ 300218334Speter { \ 300390285Sobrien case 8: \ 300490285Sobrien fputs ("r", (FILE)); \ 300590285Sobrien fputs (hi_name[REGNO (X)], (FILE)); \ 300690285Sobrien break; \ 300718334Speter default: \ 300890285Sobrien fputs ("e", (FILE)); \ 300918334Speter case 2: \ 301090285Sobrien fputs (hi_name[REGNO (X)], (FILE)); \ 301118334Speter break; \ 301218334Speter case 1: \ 301390285Sobrien fputs (qi_name[REGNO (X)], (FILE)); \ 301418334Speter break; \ 301518334Speter } \ 301618334Speter } while (0) 301718334Speter 301818334Speter/* a letter which is not needed by the normal asm syntax, which 301918334Speter we can use for operand syntax in the extended asm */ 302018334Speter 302118334Speter#define ASM_OPERAND_LETTER '#' 302218334Speter#define RET return "" 302390285Sobrien#define AT_SP(MODE) (gen_rtx_MEM ((MODE), stack_pointer_rtx)) 302418334Speter 302590285Sobrien/* Define the codes that are matched by predicates in i386.c. */ 302650654Sobrien 302790285Sobrien#define PREDICATE_CODES \ 302890285Sobrien {"x86_64_immediate_operand", {CONST_INT, SUBREG, REG, \ 302990285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 303090285Sobrien {"x86_64_nonmemory_operand", {CONST_INT, SUBREG, REG, \ 303190285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 303290285Sobrien {"x86_64_movabs_operand", {CONST_INT, SUBREG, REG, \ 303390285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 303490285Sobrien {"x86_64_szext_nonmemory_operand", {CONST_INT, SUBREG, REG, \ 303590285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 303690285Sobrien {"x86_64_general_operand", {CONST_INT, SUBREG, REG, MEM, \ 303790285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 303890285Sobrien {"x86_64_szext_general_operand", {CONST_INT, SUBREG, REG, MEM, \ 303990285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 304090285Sobrien {"x86_64_zext_immediate_operand", {CONST_INT, CONST_DOUBLE, CONST, \ 304190285Sobrien SYMBOL_REF, LABEL_REF}}, \ 304290285Sobrien {"shiftdi_operand", {SUBREG, REG, MEM}}, \ 304390285Sobrien {"const_int_1_operand", {CONST_INT}}, \ 304490285Sobrien {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \ 304590285Sobrien {"aligned_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \ 304690285Sobrien LABEL_REF, SUBREG, REG, MEM}}, \ 304790285Sobrien {"pic_symbolic_operand", {CONST}}, \ 304890285Sobrien {"call_insn_operand", {REG, SUBREG, MEM, SYMBOL_REF}}, \ 304990285Sobrien {"constant_call_address_operand", {SYMBOL_REF, CONST}}, \ 305090285Sobrien {"const0_operand", {CONST_INT, CONST_DOUBLE}}, \ 305190285Sobrien {"const1_operand", {CONST_INT}}, \ 305290285Sobrien {"const248_operand", {CONST_INT}}, \ 305390285Sobrien {"incdec_operand", {CONST_INT}}, \ 305490285Sobrien {"mmx_reg_operand", {REG}}, \ 305590285Sobrien {"reg_no_sp_operand", {SUBREG, REG}}, \ 305690285Sobrien {"general_no_elim_operand", {CONST_INT, CONST_DOUBLE, CONST, \ 305790285Sobrien SYMBOL_REF, LABEL_REF, SUBREG, REG, MEM}}, \ 305890285Sobrien {"nonmemory_no_elim_operand", {CONST_INT, REG, SUBREG}}, \ 305990285Sobrien {"q_regs_operand", {SUBREG, REG}}, \ 306090285Sobrien {"non_q_regs_operand", {SUBREG, REG}}, \ 306190285Sobrien {"fcmov_comparison_operator", {EQ, NE, LTU, GTU, LEU, GEU, UNORDERED, \ 306290285Sobrien ORDERED, LT, UNLT, GT, UNGT, LE, UNLE, \ 306390285Sobrien GE, UNGE, LTGT, UNEQ}}, \ 306490285Sobrien {"sse_comparison_operator", {EQ, LT, LE, UNORDERED, NE, UNGE, UNGT, \ 306590285Sobrien ORDERED, UNEQ, UNLT, UNLE, LTGT, GE, GT \ 306690285Sobrien }}, \ 306790285Sobrien {"ix86_comparison_operator", {EQ, NE, LE, LT, GE, GT, LEU, LTU, GEU, \ 306890285Sobrien GTU, UNORDERED, ORDERED, UNLE, UNLT, \ 306990285Sobrien UNGE, UNGT, LTGT, UNEQ }}, \ 307090285Sobrien {"cmp_fp_expander_operand", {CONST_DOUBLE, SUBREG, REG, MEM}}, \ 307190285Sobrien {"ext_register_operand", {SUBREG, REG}}, \ 307290285Sobrien {"binary_fp_operator", {PLUS, MINUS, MULT, DIV}}, \ 307390285Sobrien {"mult_operator", {MULT}}, \ 307490285Sobrien {"div_operator", {DIV}}, \ 307590285Sobrien {"arith_or_logical_operator", {PLUS, MULT, AND, IOR, XOR, SMIN, SMAX, \ 307690285Sobrien UMIN, UMAX, COMPARE, MINUS, DIV, MOD, \ 307790285Sobrien UDIV, UMOD, ASHIFT, ROTATE, ASHIFTRT, \ 307890285Sobrien LSHIFTRT, ROTATERT}}, \ 307990285Sobrien {"promotable_binary_operator", {PLUS, MULT, AND, IOR, XOR, ASHIFT}}, \ 308090285Sobrien {"memory_displacement_operand", {MEM}}, \ 308190285Sobrien {"cmpsi_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \ 308290285Sobrien LABEL_REF, SUBREG, REG, MEM, AND}}, \ 308390285Sobrien {"long_memory_operand", {MEM}}, 308450654Sobrien 308590285Sobrien/* A list of predicates that do special things with modes, and so 308690285Sobrien should not elicit warnings for VOIDmode match_operand. */ 308790285Sobrien 308890285Sobrien#define SPECIAL_MODE_PREDICATES \ 308990285Sobrien "ext_register_operand", 309050654Sobrien 309190285Sobrien/* CM_32 is used by 32bit ABI 309290285Sobrien CM_SMALL is small model assuming that all code and data fits in the first 309390285Sobrien 31bits of address space. 309490285Sobrien CM_KERNEL is model assuming that all code and data fits in the negative 309590285Sobrien 31bits of address space. 309690285Sobrien CM_MEDIUM is model assuming that code fits in the first 31bits of address 309790285Sobrien space. Size of data is unlimited. 309890285Sobrien CM_LARGE is model making no assumptions about size of particular sections. 309990285Sobrien 310090285Sobrien CM_SMALL_PIC is model for PIC libraries assuming that code+data+got/plt 310190285Sobrien tables first in 31bits of address space. 310290285Sobrien */ 310390285Sobrienenum cmodel { 310490285Sobrien CM_32, 310590285Sobrien CM_SMALL, 310690285Sobrien CM_KERNEL, 310790285Sobrien CM_MEDIUM, 310890285Sobrien CM_LARGE, 310990285Sobrien CM_SMALL_PIC 311090285Sobrien}; 311118334Speter 311290285Sobrien/* Size of the RED_ZONE area. */ 311390285Sobrien#define RED_ZONE_SIZE 128 311490285Sobrien/* Reserved area of the red zone for temporaries. */ 311590285Sobrien#define RED_ZONE_RESERVE 8 311690285Sobrienextern const char *ix86_debug_arg_string, *ix86_debug_addr_string; 311750654Sobrien 311890285Sobrienenum asm_dialect { 311990285Sobrien ASM_ATT, 312090285Sobrien ASM_INTEL 312190285Sobrien}; 312290285Sobrienextern const char *ix86_asm_string; 312390285Sobrienextern enum asm_dialect ix86_asm_dialect; 312490285Sobrien/* Value of -mcmodel specified by user. */ 312590285Sobrienextern const char *ix86_cmodel_string; 312690285Sobrienextern enum cmodel ix86_cmodel; 312790285Sobrien 312818334Speter/* Variables in i386.c */ 312990285Sobrienextern const char *ix86_cpu_string; /* for -mcpu=<xxx> */ 313090285Sobrienextern const char *ix86_arch_string; /* for -march=<xxx> */ 313190285Sobrienextern const char *ix86_fpmath_string; /* for -mfpmath=<xxx> */ 313290285Sobrienextern const char *ix86_regparm_string; /* # registers to use to pass args */ 313390285Sobrienextern const char *ix86_align_loops_string; /* power of two alignment for loops */ 313490285Sobrienextern const char *ix86_align_jumps_string; /* power of two alignment for non-loop jumps */ 313590285Sobrienextern const char *ix86_align_funcs_string; /* power of two alignment for functions */ 313690285Sobrienextern const char *ix86_preferred_stack_boundary_string;/* power of two alignment for stack boundary */ 313790285Sobrienextern const char *ix86_branch_cost_string; /* values 1-5: see jump.c */ 313890285Sobrienextern int ix86_regparm; /* ix86_regparm_string as a number */ 313990285Sobrienextern int ix86_preferred_stack_boundary; /* preferred stack boundary alignment in bits */ 314090285Sobrienextern int ix86_branch_cost; /* values 1-5: see jump.c */ 314190285Sobrienextern enum reg_class const regclass_map[FIRST_PSEUDO_REGISTER]; /* smalled class containing REGNO */ 314290285Sobrienextern rtx ix86_compare_op0; /* operand 0 for comparisons */ 314390285Sobrienextern rtx ix86_compare_op1; /* operand 1 for comparisons */ 314490285Sobrien 314590285Sobrien/* To properly truncate FP values into integers, we need to set i387 control 314690285Sobrien word. We can't emit proper mode switching code before reload, as spills 314790285Sobrien generated by reload may truncate values incorrectly, but we still can avoid 314890285Sobrien redundant computation of new control word by the mode switching pass. 314990285Sobrien The fldcw instructions are still emitted redundantly, but this is probably 315090285Sobrien not going to be noticeable problem, as most CPUs do have fast path for 315190285Sobrien the sequence. 315218334Speter 315390285Sobrien The machinery is to emit simple truncation instructions and split them 315490285Sobrien before reload to instructions having USEs of two memory locations that 315590285Sobrien are filled by this code to old and new control word. 315690285Sobrien 315790285Sobrien Post-reload pass may be later used to eliminate the redundant fildcw if 315890285Sobrien needed. */ 315918334Speter 316090285Sobrienenum fp_cw_mode {FP_CW_STORED, FP_CW_UNINITIALIZED, FP_CW_ANY}; 316150654Sobrien 316290285Sobrien/* Define this macro if the port needs extra instructions inserted 316390285Sobrien for mode switching in an optimizing compilation. */ 316490285Sobrien 316590285Sobrien#define OPTIMIZE_MODE_SWITCHING(ENTITY) 1 316690285Sobrien 316790285Sobrien/* If you define `OPTIMIZE_MODE_SWITCHING', you have to define this as 316890285Sobrien initializer for an array of integers. Each initializer element N 316990285Sobrien refers to an entity that needs mode switching, and specifies the 317090285Sobrien number of different modes that might need to be set for this 317190285Sobrien entity. The position of the initializer in the initializer - 317290285Sobrien starting counting at zero - determines the integer that is used to 317390285Sobrien refer to the mode-switched entity in question. */ 317490285Sobrien 317590285Sobrien#define NUM_MODES_FOR_MODE_SWITCHING { FP_CW_ANY } 317690285Sobrien 317790285Sobrien/* ENTITY is an integer specifying a mode-switched entity. If 317890285Sobrien `OPTIMIZE_MODE_SWITCHING' is defined, you must define this macro to 317990285Sobrien return an integer value not larger than the corresponding element 318090285Sobrien in `NUM_MODES_FOR_MODE_SWITCHING', to denote the mode that ENTITY 318190285Sobrien must be switched into prior to the execution of INSN. */ 318290285Sobrien 318390285Sobrien#define MODE_NEEDED(ENTITY, I) \ 318490285Sobrien (GET_CODE (I) == CALL_INSN \ 318590285Sobrien || (GET_CODE (I) == INSN && (asm_noperands (PATTERN (I)) >= 0 \ 318690285Sobrien || GET_CODE (PATTERN (I)) == ASM_INPUT))\ 318790285Sobrien ? FP_CW_UNINITIALIZED \ 318890285Sobrien : recog_memoized (I) < 0 || get_attr_type (I) != TYPE_FISTP \ 318990285Sobrien ? FP_CW_ANY \ 319090285Sobrien : FP_CW_STORED) 319190285Sobrien 319290285Sobrien/* This macro specifies the order in which modes for ENTITY are 319390285Sobrien processed. 0 is the highest priority. */ 319490285Sobrien 319590285Sobrien#define MODE_PRIORITY_TO_MODE(ENTITY, N) (N) 319690285Sobrien 319790285Sobrien/* Generate one or more insns to set ENTITY to MODE. HARD_REG_LIVE 319890285Sobrien is the set of hard registers live at the point where the insn(s) 319990285Sobrien are to be inserted. */ 320090285Sobrien 320190285Sobrien#define EMIT_MODE_SET(ENTITY, MODE, HARD_REGS_LIVE) \ 320290285Sobrien ((MODE) == FP_CW_STORED \ 320390285Sobrien ? emit_i387_cw_initialization (assign_386_stack_local (HImode, 1), \ 320490285Sobrien assign_386_stack_local (HImode, 2)), 0\ 320590285Sobrien : 0) 320618334Speter 320790285Sobrien/* Avoid renaming of stack registers, as doing so in combination with 320890285Sobrien scheduling just increases amount of live registers at time and in 320990285Sobrien the turn amount of fxch instructions needed. 321090285Sobrien 321190285Sobrien ??? Maybe Pentium chips benefits from renaming, someone can try... */ 321290285Sobrien 321390285Sobrien#define HARD_REGNO_RENAME_OK(SRC, TARGET) \ 321490285Sobrien ((SRC) < FIRST_STACK_REG || (SRC) > LAST_STACK_REG) 321590285Sobrien 321690285Sobrien 321718334Speter/* 321818334SpeterLocal variables: 321918334Speterversion-control: t 322018334SpeterEnd: 322118334Speter*/ 3222