i386.h revision 251212
1132744Skan/* Definitions of target machine for GCC for IA-32. 290285Sobrien Copyright (C) 1988, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 3169706Skan 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. 418334Speter 5132744SkanThis file is part of GCC. 618334Speter 7132744SkanGCC is free software; you can redistribute it and/or modify 818334Speterit under the terms of the GNU General Public License as published by 918334Speterthe Free Software Foundation; either version 2, or (at your option) 1018334Speterany later version. 1118334Speter 12132744SkanGCC is distributed in the hope that it will be useful, 1318334Speterbut WITHOUT ANY WARRANTY; without even the implied warranty of 1418334SpeterMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1518334SpeterGNU General Public License for more details. 1618334Speter 1718334SpeterYou should have received a copy of the GNU General Public License 18132744Skanalong with GCC; see the file COPYING. If not, write to 19169706Skanthe Free Software Foundation, 51 Franklin Street, Fifth Floor, 20169706SkanBoston, MA 02110-1301, USA. */ 2118334Speter 2218334Speter/* The purpose of this file is to define the characteristics of the i386, 2318334Speter independent of assembler syntax or operating system. 2418334Speter 2518334Speter Three other files build on this one to describe a specific assembler syntax: 2618334Speter bsd386.h, att386.h, and sun386.h. 2718334Speter 2818334Speter The actual tm.h file for a particular system should include 2918334Speter this file, and then the file for the appropriate assembler syntax. 3018334Speter 3118334Speter Many macros that specify assembler syntax are omitted entirely from 3218334Speter this file because they really belong in the files for particular 3390285Sobrien assemblers. These include RP, IP, LPREFIX, PUT_OP_SIZE, USE_STAR, 3490285Sobrien ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE, PRINT_B_I_S, and many 3590285Sobrien that start with ASM_ or end in ASM_OP. */ 3618334Speter 3750654Sobrien/* Define the specific costs for a given cpu */ 3850654Sobrien 3950654Sobrienstruct processor_costs { 4090285Sobrien const int add; /* cost of an add instruction */ 4190285Sobrien const int lea; /* cost of a lea instruction */ 4290285Sobrien const int shift_var; /* variable shift costs */ 4390285Sobrien const int shift_const; /* constant shift costs */ 44169706Skan const int mult_init[5]; /* cost of starting a multiply 45132744Skan in QImode, HImode, SImode, DImode, TImode*/ 4690285Sobrien const int mult_bit; /* cost of multiply per each bit set */ 47169706Skan const int divide[5]; /* cost of a divide/mod 48132744Skan in QImode, HImode, SImode, DImode, TImode*/ 4990285Sobrien int movsx; /* The cost of movsx operation. */ 5090285Sobrien int movzx; /* The cost of movzx operation. */ 5190285Sobrien const int large_insn; /* insns larger than this cost more */ 5290285Sobrien const int move_ratio; /* The threshold of number of scalar 5390285Sobrien memory-to-memory move insns. */ 5490285Sobrien const int movzbl_load; /* cost of loading using movzbl */ 5590285Sobrien const int int_load[3]; /* cost of loading integer registers 5690285Sobrien in QImode, HImode and SImode relative 5790285Sobrien to reg-reg move (2). */ 5890285Sobrien const int int_store[3]; /* cost of storing integer register 5990285Sobrien in QImode, HImode and SImode */ 6090285Sobrien const int fp_move; /* cost of reg,reg fld/fst */ 6190285Sobrien const int fp_load[3]; /* cost of loading FP register 6290285Sobrien in SFmode, DFmode and XFmode */ 6390285Sobrien const int fp_store[3]; /* cost of storing FP register 6490285Sobrien in SFmode, DFmode and XFmode */ 6590285Sobrien const int mmx_move; /* cost of moving MMX register. */ 6690285Sobrien const int mmx_load[2]; /* cost of loading MMX register 6790285Sobrien in SImode and DImode */ 6890285Sobrien const int mmx_store[2]; /* cost of storing MMX register 6990285Sobrien in SImode and DImode */ 7090285Sobrien const int sse_move; /* cost of moving SSE register. */ 7190285Sobrien const int sse_load[3]; /* cost of loading SSE register 7290285Sobrien in SImode, DImode and TImode*/ 7390285Sobrien const int sse_store[3]; /* cost of storing SSE register 7490285Sobrien in SImode, DImode and TImode*/ 7590285Sobrien const int mmxsse_to_integer; /* cost of moving mmxsse register to 7690285Sobrien integer and vice versa. */ 7790285Sobrien const int prefetch_block; /* bytes moved to cache for prefetch. */ 7890285Sobrien const int simultaneous_prefetches; /* number of parallel prefetch 7990285Sobrien operations. */ 80132744Skan const int branch_cost; /* Default value for BRANCH_COST. */ 81117407Skan const int fadd; /* cost of FADD and FSUB instructions. */ 82117407Skan const int fmul; /* cost of FMUL instruction. */ 83117407Skan const int fdiv; /* cost of FDIV instruction. */ 84117407Skan const int fabs; /* cost of FABS instruction. */ 85117407Skan const int fchs; /* cost of FCHS instruction. */ 86117407Skan const int fsqrt; /* cost of FSQRT instruction. */ 8750654Sobrien}; 8850654Sobrien 8990285Sobrienextern const struct processor_costs *ix86_cost; 9050654Sobrien 9118334Speter/* Macros used in the machine description to test the flags. */ 9218334Speter 9318334Speter/* configure can arrange to make this 2, to force a 486. */ 9490285Sobrien 9518334Speter#ifndef TARGET_CPU_DEFAULT 96169706Skan#define TARGET_CPU_DEFAULT TARGET_CPU_DEFAULT_generic 9718334Speter#endif 98169706Skan 99169706Skan#ifndef TARGET_FPMATH_DEFAULT 100169706Skan#define TARGET_FPMATH_DEFAULT \ 101169706Skan (TARGET_64BIT && TARGET_SSE ? FPMATH_SSE : FPMATH_387) 102132744Skan#endif 10318334Speter 104169706Skan#define TARGET_FLOAT_RETURNS_IN_80387 TARGET_FLOAT_RETURNS 105117407Skan 106117407Skan/* 64bit Sledgehammer mode. For libgcc2 we make sure this is a 107117407Skan compile-time constant. */ 108117407Skan#ifdef IN_LIBGCC2 109169706Skan#undef TARGET_64BIT 110117407Skan#ifdef __x86_64__ 111117407Skan#define TARGET_64BIT 1 112117407Skan#else 113117407Skan#define TARGET_64BIT 0 114117407Skan#endif 115117407Skan#else 116169706Skan#ifndef TARGET_BI_ARCH 117169706Skan#undef TARGET_64BIT 118117407Skan#if TARGET_64BIT_DEFAULT 11990285Sobrien#define TARGET_64BIT 1 12090285Sobrien#else 12190285Sobrien#define TARGET_64BIT 0 12290285Sobrien#endif 12390285Sobrien#endif 124117407Skan#endif 12518334Speter 126169706Skan#define HAS_LONG_COND_BRANCH 1 127169706Skan#define HAS_LONG_UNCOND_BRANCH 1 12852295Sobrien 129132744Skan#define TARGET_386 (ix86_tune == PROCESSOR_I386) 130132744Skan#define TARGET_486 (ix86_tune == PROCESSOR_I486) 131132744Skan#define TARGET_PENTIUM (ix86_tune == PROCESSOR_PENTIUM) 132132744Skan#define TARGET_PENTIUMPRO (ix86_tune == PROCESSOR_PENTIUMPRO) 133219374Smm#define TARGET_GEODE (ix86_tune == PROCESSOR_GEODE) 134132744Skan#define TARGET_K6 (ix86_tune == PROCESSOR_K6) 135132744Skan#define TARGET_ATHLON (ix86_tune == PROCESSOR_ATHLON) 136132744Skan#define TARGET_PENTIUM4 (ix86_tune == PROCESSOR_PENTIUM4) 137132744Skan#define TARGET_K8 (ix86_tune == PROCESSOR_K8) 138132744Skan#define TARGET_ATHLON_K8 (TARGET_K8 || TARGET_ATHLON) 139169706Skan#define TARGET_NOCONA (ix86_tune == PROCESSOR_NOCONA) 140219374Smm#define TARGET_CORE2 (ix86_tune == PROCESSOR_CORE2) 141169706Skan#define TARGET_GENERIC32 (ix86_tune == PROCESSOR_GENERIC32) 142169706Skan#define TARGET_GENERIC64 (ix86_tune == PROCESSOR_GENERIC64) 143169706Skan#define TARGET_GENERIC (TARGET_GENERIC32 || TARGET_GENERIC64) 144251212Spfg#define TARGET_AMDFAM10 (ix86_tune == PROCESSOR_AMDFAM10) 145132744Skan 146132744Skan#define TUNEMASK (1 << ix86_tune) 14752295Sobrienextern const int x86_use_leave, x86_push_memory, x86_zero_extend_with_and; 14852295Sobrienextern const int x86_use_bit_test, x86_cmove, x86_deep_branch; 14990285Sobrienextern const int x86_branch_hints, x86_unroll_strlen; 15090285Sobrienextern const int x86_double_with_add, x86_partial_reg_stall, x86_movx; 151169706Skanextern const int x86_use_himode_fiop, x86_use_simode_fiop; 152169706Skanextern const int x86_use_mov0, x86_use_cltd, x86_read_modify_write; 15390285Sobrienextern const int x86_read_modify, x86_split_long_moves; 154117407Skanextern const int x86_promote_QImode, x86_single_stringop, x86_fast_prefix; 15590285Sobrienextern const int x86_himode_math, x86_qimode_math, x86_promote_qi_regs; 15690285Sobrienextern const int x86_promote_hi_regs, x86_integer_DFmode_moves; 15790285Sobrienextern const int x86_add_esp_4, x86_add_esp_8, x86_sub_esp_4, x86_sub_esp_8; 15890285Sobrienextern const int x86_partial_reg_dependency, x86_memory_mismatch_stall; 15990285Sobrienextern const int x86_accumulate_outgoing_args, x86_prologue_using_move; 16090285Sobrienextern const int x86_epilogue_using_move, x86_decompose_lea; 161117407Skanextern const int x86_arch_always_fancy_math_387, x86_shift1; 162169706Skanextern const int x86_sse_partial_reg_dependency, x86_sse_split_regs; 163251212Spfgextern const int x86_sse_unaligned_move_optimal; 164132744Skanextern const int x86_sse_typeless_stores, x86_sse_load0_by_pxor; 165169706Skanextern const int x86_use_ffreep; 166169706Skanextern const int x86_inter_unit_moves, x86_schedule; 167169706Skanextern const int x86_use_bt; 168251212Spfgextern const int x86_cmpxchg, x86_cmpxchg8b, x86_xadd; 169169706Skanextern const int x86_use_incdec; 170169706Skanextern const int x86_pad_returns; 171169706Skanextern const int x86_partial_flag_reg_stall; 172251212Spfgextern int x86_prefetch_sse, x86_cmpxchg16b; 17352295Sobrien 174132744Skan#define TARGET_USE_LEAVE (x86_use_leave & TUNEMASK) 175132744Skan#define TARGET_PUSH_MEMORY (x86_push_memory & TUNEMASK) 176132744Skan#define TARGET_ZERO_EXTEND_WITH_AND (x86_zero_extend_with_and & TUNEMASK) 177132744Skan#define TARGET_USE_BIT_TEST (x86_use_bit_test & TUNEMASK) 178132744Skan#define TARGET_UNROLL_STRLEN (x86_unroll_strlen & TUNEMASK) 17990285Sobrien/* For sane SSE instruction set generation we need fcomi instruction. It is 18090285Sobrien safe to enable all CMOVE instructions. */ 18190285Sobrien#define TARGET_CMOVE ((x86_cmove & (1 << ix86_arch)) || TARGET_SSE) 182169706Skan#define TARGET_FISTTP (TARGET_SSE3 && TARGET_80387) 183132744Skan#define TARGET_DEEP_BRANCH_PREDICTION (x86_deep_branch & TUNEMASK) 184132744Skan#define TARGET_BRANCH_PREDICTION_HINTS (x86_branch_hints & TUNEMASK) 185132744Skan#define TARGET_DOUBLE_WITH_ADD (x86_double_with_add & TUNEMASK) 186132744Skan#define TARGET_USE_SAHF ((x86_use_sahf & TUNEMASK) && !TARGET_64BIT) 187132744Skan#define TARGET_MOVX (x86_movx & TUNEMASK) 188132744Skan#define TARGET_PARTIAL_REG_STALL (x86_partial_reg_stall & TUNEMASK) 189169706Skan#define TARGET_PARTIAL_FLAG_REG_STALL (x86_partial_flag_reg_stall & TUNEMASK) 190169706Skan#define TARGET_USE_HIMODE_FIOP (x86_use_himode_fiop & TUNEMASK) 191169706Skan#define TARGET_USE_SIMODE_FIOP (x86_use_simode_fiop & TUNEMASK) 192132744Skan#define TARGET_USE_MOV0 (x86_use_mov0 & TUNEMASK) 193132744Skan#define TARGET_USE_CLTD (x86_use_cltd & TUNEMASK) 194132744Skan#define TARGET_SPLIT_LONG_MOVES (x86_split_long_moves & TUNEMASK) 195132744Skan#define TARGET_READ_MODIFY_WRITE (x86_read_modify_write & TUNEMASK) 196132744Skan#define TARGET_READ_MODIFY (x86_read_modify & TUNEMASK) 197132744Skan#define TARGET_PROMOTE_QImode (x86_promote_QImode & TUNEMASK) 198132744Skan#define TARGET_FAST_PREFIX (x86_fast_prefix & TUNEMASK) 199132744Skan#define TARGET_SINGLE_STRINGOP (x86_single_stringop & TUNEMASK) 200132744Skan#define TARGET_QIMODE_MATH (x86_qimode_math & TUNEMASK) 201132744Skan#define TARGET_HIMODE_MATH (x86_himode_math & TUNEMASK) 202132744Skan#define TARGET_PROMOTE_QI_REGS (x86_promote_qi_regs & TUNEMASK) 203132744Skan#define TARGET_PROMOTE_HI_REGS (x86_promote_hi_regs & TUNEMASK) 204132744Skan#define TARGET_ADD_ESP_4 (x86_add_esp_4 & TUNEMASK) 205132744Skan#define TARGET_ADD_ESP_8 (x86_add_esp_8 & TUNEMASK) 206132744Skan#define TARGET_SUB_ESP_4 (x86_sub_esp_4 & TUNEMASK) 207132744Skan#define TARGET_SUB_ESP_8 (x86_sub_esp_8 & TUNEMASK) 208132744Skan#define TARGET_INTEGER_DFMODE_MOVES (x86_integer_DFmode_moves & TUNEMASK) 209132744Skan#define TARGET_PARTIAL_REG_DEPENDENCY (x86_partial_reg_dependency & TUNEMASK) 210132744Skan#define TARGET_SSE_PARTIAL_REG_DEPENDENCY \ 211132744Skan (x86_sse_partial_reg_dependency & TUNEMASK) 212251212Spfg#define TARGET_SSE_UNALIGNED_MOVE_OPTIMAL \ 213251212Spfg (x86_sse_unaligned_move_optimal & TUNEMASK) 214169706Skan#define TARGET_SSE_SPLIT_REGS (x86_sse_split_regs & TUNEMASK) 215132744Skan#define TARGET_SSE_TYPELESS_STORES (x86_sse_typeless_stores & TUNEMASK) 216132744Skan#define TARGET_SSE_LOAD0_BY_PXOR (x86_sse_load0_by_pxor & TUNEMASK) 217132744Skan#define TARGET_MEMORY_MISMATCH_STALL (x86_memory_mismatch_stall & TUNEMASK) 218132744Skan#define TARGET_PROLOGUE_USING_MOVE (x86_prologue_using_move & TUNEMASK) 219132744Skan#define TARGET_EPILOGUE_USING_MOVE (x86_epilogue_using_move & TUNEMASK) 22090285Sobrien#define TARGET_PREFETCH_SSE (x86_prefetch_sse) 221132744Skan#define TARGET_SHIFT1 (x86_shift1 & TUNEMASK) 222132744Skan#define TARGET_USE_FFREEP (x86_use_ffreep & TUNEMASK) 223132744Skan#define TARGET_REP_MOVL_OPTIMAL (x86_rep_movl_optimal & TUNEMASK) 224132744Skan#define TARGET_INTER_UNIT_MOVES (x86_inter_unit_moves & TUNEMASK) 225169706Skan#define TARGET_FOUR_JUMP_LIMIT (x86_four_jump_limit & TUNEMASK) 226169706Skan#define TARGET_SCHEDULE (x86_schedule & TUNEMASK) 227169706Skan#define TARGET_USE_BT (x86_use_bt & TUNEMASK) 228169706Skan#define TARGET_USE_INCDEC (x86_use_incdec & TUNEMASK) 229169706Skan#define TARGET_PAD_RETURNS (x86_pad_returns & TUNEMASK) 23052295Sobrien 23190285Sobrien#define ASSEMBLER_DIALECT (ix86_asm_dialect) 23290285Sobrien 23390285Sobrien#define TARGET_SSE_MATH ((ix86_fpmath & FPMATH_SSE) != 0) 23490285Sobrien#define TARGET_MIX_SSE_I387 ((ix86_fpmath & FPMATH_SSE) \ 23590285Sobrien && (ix86_fpmath & FPMATH_387)) 23690285Sobrien 237117407Skan#define TARGET_GNU_TLS (ix86_tls_dialect == TLS_DIALECT_GNU) 238169706Skan#define TARGET_GNU2_TLS (ix86_tls_dialect == TLS_DIALECT_GNU2) 239169706Skan#define TARGET_ANY_GNU_TLS (TARGET_GNU_TLS || TARGET_GNU2_TLS) 240117407Skan#define TARGET_SUN_TLS (ix86_tls_dialect == TLS_DIALECT_SUN) 241117407Skan 242169706Skan#define TARGET_CMPXCHG (x86_cmpxchg & (1 << ix86_arch)) 243169706Skan#define TARGET_CMPXCHG8B (x86_cmpxchg8b & (1 << ix86_arch)) 244251212Spfg#define TARGET_CMPXCHG16B (x86_cmpxchg16b) 245169706Skan#define TARGET_XADD (x86_xadd & (1 << ix86_arch)) 24696294Sobrien 247117407Skan#ifndef TARGET_64BIT_DEFAULT 248117407Skan#define TARGET_64BIT_DEFAULT 0 24990285Sobrien#endif 250132744Skan#ifndef TARGET_TLS_DIRECT_SEG_REFS_DEFAULT 251132744Skan#define TARGET_TLS_DIRECT_SEG_REFS_DEFAULT 0 252132744Skan#endif 25390285Sobrien 254117407Skan/* Once GDB has been enhanced to deal with functions without frame 255117407Skan pointers, we can change this to allow for elimination of 256117407Skan the frame pointer in leaf functions. */ 257117407Skan#define TARGET_DEFAULT 0 25850654Sobrien 259117407Skan/* This is not really a target flag, but is done this way so that 260117407Skan it's analogous to similar code for Mach-O on PowerPC. darwin.h 261117407Skan redefines this to 1. */ 262117407Skan#define TARGET_MACHO 0 26350654Sobrien 264146908Skan/* Subtargets may reset this to 1 in order to enable 96-bit long double 265146908Skan with the rounding mode forced to 53 bits. */ 266146908Skan#define TARGET_96_ROUND_53_LONG_DOUBLE 0 267146908Skan 26818334Speter/* Sometimes certain combinations of command options do not make 26918334Speter sense on a particular target machine. You can define a macro 27018334Speter `OVERRIDE_OPTIONS' to take account of this. This macro, if 27118334Speter defined, is executed once just after all the command options have 27218334Speter been parsed. 27318334Speter 27418334Speter Don't use this macro to turn on various extra optimizations for 27518334Speter `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */ 27618334Speter 27718334Speter#define OVERRIDE_OPTIONS override_options () 27818334Speter 27950654Sobrien/* Define this to change the optimizations performed by default. */ 28090285Sobrien#define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \ 28190285Sobrien optimization_options ((LEVEL), (SIZE)) 28250654Sobrien 283169706Skan/* -march=native handling only makes sense with compiler running on 284169706Skan an x86 or x86_64 chip. If changing this condition, also change 285169706Skan the condition in driver-i386.c. */ 286169706Skan#if defined(__i386__) || defined(__x86_64__) 287169706Skan/* In driver-i386.c. */ 288169706Skanextern const char *host_detect_local_cpu (int argc, const char **argv); 289169706Skan#define EXTRA_SPEC_FUNCTIONS \ 290169706Skan { "local_cpu_detect", host_detect_local_cpu }, 291169706Skan#define HAVE_LOCAL_CPU_DETECT 292169706Skan#endif 293169706Skan 294169706Skan/* Support for configure-time defaults of some command line options. 295169706Skan The order here is important so that -march doesn't squash the 296169706Skan tune or cpu values. */ 297132744Skan#define OPTION_DEFAULT_SPECS \ 298132744Skan {"tune", "%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}" }, \ 299169706Skan {"cpu", "%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}" }, \ 300169706Skan {"arch", "%{!march=*:-march=%(VALUE)}"} 301132744Skan 30250654Sobrien/* Specs for the compiler proper */ 30350654Sobrien 30450654Sobrien#ifndef CC1_CPU_SPEC 305169706Skan#define CC1_CPU_SPEC_1 "\ 306132744Skan%{!mtune*: \ 307132744Skan%{m386:mtune=i386 \ 308132744Skan%n`-m386' is deprecated. Use `-march=i386' or `-mtune=i386' instead.\n} \ 309132744Skan%{m486:-mtune=i486 \ 310132744Skan%n`-m486' is deprecated. Use `-march=i486' or `-mtune=i486' instead.\n} \ 311132744Skan%{mpentium:-mtune=pentium \ 312132744Skan%n`-mpentium' is deprecated. Use `-march=pentium' or `-mtune=pentium' instead.\n} \ 313132744Skan%{mpentiumpro:-mtune=pentiumpro \ 314132744Skan%n`-mpentiumpro' is deprecated. Use `-march=pentiumpro' or `-mtune=pentiumpro' instead.\n} \ 315132744Skan%{mcpu=*:-mtune=%* \ 316132744Skan%n`-mcpu=' is deprecated. Use `-mtune=' or '-march=' instead.\n}} \ 317132744Skan%<mcpu=* \ 31890285Sobrien%{mintel-syntax:-masm=intel \ 31990285Sobrien%n`-mintel-syntax' is deprecated. Use `-masm=intel' instead.\n} \ 32090285Sobrien%{mno-intel-syntax:-masm=att \ 32190285Sobrien%n`-mno-intel-syntax' is deprecated. Use `-masm=att' instead.\n}" 322169706Skan 323169706Skan#ifndef HAVE_LOCAL_CPU_DETECT 324169706Skan#define CC1_CPU_SPEC CC1_CPU_SPEC_1 325169706Skan#else 326169706Skan#define CC1_CPU_SPEC CC1_CPU_SPEC_1 \ 327169706Skan"%{march=native:%<march=native %:local_cpu_detect(arch) \ 328169706Skan %{!mtune=*:%<mtune=native %:local_cpu_detect(tune)}} \ 329169706Skan%{mtune=native:%<mtune=native %:local_cpu_detect(tune)}" 33050654Sobrien#endif 331169706Skan#endif 33218334Speter 333117407Skan/* Target CPU builtins. */ 334117407Skan#define TARGET_CPU_CPP_BUILTINS() \ 335117407Skan do \ 336117407Skan { \ 337117407Skan size_t arch_len = strlen (ix86_arch_string); \ 338132744Skan size_t tune_len = strlen (ix86_tune_string); \ 339117407Skan int last_arch_char = ix86_arch_string[arch_len - 1]; \ 340132744Skan int last_tune_char = ix86_tune_string[tune_len - 1]; \ 341117407Skan \ 342117407Skan if (TARGET_64BIT) \ 343117407Skan { \ 344117407Skan builtin_assert ("cpu=x86_64"); \ 345132744Skan builtin_assert ("machine=x86_64"); \ 346132744Skan builtin_define ("__amd64"); \ 347132744Skan builtin_define ("__amd64__"); \ 348117407Skan builtin_define ("__x86_64"); \ 349117407Skan builtin_define ("__x86_64__"); \ 350117407Skan } \ 351117407Skan else \ 352117407Skan { \ 353117407Skan builtin_assert ("cpu=i386"); \ 354117407Skan builtin_assert ("machine=i386"); \ 355117407Skan builtin_define_std ("i386"); \ 356117407Skan } \ 357117407Skan \ 358132744Skan /* Built-ins based on -mtune= (or -march= if no \ 359132744Skan -mtune= given). */ \ 360117407Skan if (TARGET_386) \ 361117407Skan builtin_define ("__tune_i386__"); \ 362117407Skan else if (TARGET_486) \ 363117407Skan builtin_define ("__tune_i486__"); \ 364117407Skan else if (TARGET_PENTIUM) \ 365117407Skan { \ 366117407Skan builtin_define ("__tune_i586__"); \ 367117407Skan builtin_define ("__tune_pentium__"); \ 368132744Skan if (last_tune_char == 'x') \ 369117407Skan builtin_define ("__tune_pentium_mmx__"); \ 370117407Skan } \ 371117407Skan else if (TARGET_PENTIUMPRO) \ 372117407Skan { \ 373117407Skan builtin_define ("__tune_i686__"); \ 374117407Skan builtin_define ("__tune_pentiumpro__"); \ 375132744Skan switch (last_tune_char) \ 376117407Skan { \ 377117407Skan case '3': \ 378117407Skan builtin_define ("__tune_pentium3__"); \ 379117407Skan /* FALLTHRU */ \ 380117407Skan case '2': \ 381117407Skan builtin_define ("__tune_pentium2__"); \ 382117407Skan break; \ 383117407Skan } \ 384117407Skan } \ 385219374Smm else if (TARGET_GEODE) \ 386219374Smm { \ 387219374Smm builtin_define ("__tune_geode__"); \ 388219374Smm } \ 389117407Skan else if (TARGET_K6) \ 390117407Skan { \ 391117407Skan builtin_define ("__tune_k6__"); \ 392132744Skan if (last_tune_char == '2') \ 393117407Skan builtin_define ("__tune_k6_2__"); \ 394132744Skan else if (last_tune_char == '3') \ 395117407Skan builtin_define ("__tune_k6_3__"); \ 396117407Skan } \ 397117407Skan else if (TARGET_ATHLON) \ 398117407Skan { \ 399117407Skan builtin_define ("__tune_athlon__"); \ 400148163Sobrien /* Plain "athlon" & "athlon-tbird" lacks SSE. */ \ 401148163Sobrien if (last_tune_char != 'n' && last_tune_char != 'd') \ 402117407Skan builtin_define ("__tune_athlon_sse__"); \ 403117407Skan } \ 404132744Skan else if (TARGET_K8) \ 405132744Skan builtin_define ("__tune_k8__"); \ 406251212Spfg else if (TARGET_AMDFAM10) \ 407251212Spfg builtin_define ("__tune_amdfam10__"); \ 408117407Skan else if (TARGET_PENTIUM4) \ 409117407Skan builtin_define ("__tune_pentium4__"); \ 410169706Skan else if (TARGET_NOCONA) \ 411169706Skan builtin_define ("__tune_nocona__"); \ 412219374Smm else if (TARGET_CORE2) \ 413219374Smm builtin_define ("__tune_core2__"); \ 414117407Skan \ 415117407Skan if (TARGET_MMX) \ 416117407Skan builtin_define ("__MMX__"); \ 417117407Skan if (TARGET_3DNOW) \ 418117407Skan builtin_define ("__3dNOW__"); \ 419117407Skan if (TARGET_3DNOW_A) \ 420117407Skan builtin_define ("__3dNOW_A__"); \ 421117407Skan if (TARGET_SSE) \ 422117407Skan builtin_define ("__SSE__"); \ 423117407Skan if (TARGET_SSE2) \ 424117407Skan builtin_define ("__SSE2__"); \ 425132744Skan if (TARGET_SSE3) \ 426169706Skan builtin_define ("__SSE3__"); \ 427219639Smm if (TARGET_SSSE3) \ 428219639Smm builtin_define ("__SSSE3__"); \ 429251212Spfg if (TARGET_SSE4A) \ 430251212Spfg builtin_define ("__SSE4A__"); \ 431117407Skan if (TARGET_SSE_MATH && TARGET_SSE) \ 432117407Skan builtin_define ("__SSE_MATH__"); \ 433117407Skan if (TARGET_SSE_MATH && TARGET_SSE2) \ 434117407Skan builtin_define ("__SSE2_MATH__"); \ 435117407Skan \ 436117407Skan /* Built-ins based on -march=. */ \ 437117407Skan if (ix86_arch == PROCESSOR_I486) \ 438117407Skan { \ 439117407Skan builtin_define ("__i486"); \ 440117407Skan builtin_define ("__i486__"); \ 441117407Skan } \ 442117407Skan else if (ix86_arch == PROCESSOR_PENTIUM) \ 443117407Skan { \ 444117407Skan builtin_define ("__i586"); \ 445117407Skan builtin_define ("__i586__"); \ 446117407Skan builtin_define ("__pentium"); \ 447117407Skan builtin_define ("__pentium__"); \ 448117407Skan if (last_arch_char == 'x') \ 449117407Skan builtin_define ("__pentium_mmx__"); \ 450117407Skan } \ 451117407Skan else if (ix86_arch == PROCESSOR_PENTIUMPRO) \ 452117407Skan { \ 453117407Skan builtin_define ("__i686"); \ 454117407Skan builtin_define ("__i686__"); \ 455117407Skan builtin_define ("__pentiumpro"); \ 456117407Skan builtin_define ("__pentiumpro__"); \ 457117407Skan } \ 458219374Smm else if (ix86_arch == PROCESSOR_GEODE) \ 459219374Smm { \ 460219374Smm builtin_define ("__geode"); \ 461219374Smm builtin_define ("__geode__"); \ 462219374Smm } \ 463117407Skan else if (ix86_arch == PROCESSOR_K6) \ 464117407Skan { \ 465117407Skan \ 466117407Skan builtin_define ("__k6"); \ 467117407Skan builtin_define ("__k6__"); \ 468117407Skan if (last_arch_char == '2') \ 469117407Skan builtin_define ("__k6_2__"); \ 470117407Skan else if (last_arch_char == '3') \ 471117407Skan builtin_define ("__k6_3__"); \ 472117407Skan } \ 473117407Skan else if (ix86_arch == PROCESSOR_ATHLON) \ 474117407Skan { \ 475117407Skan builtin_define ("__athlon"); \ 476117407Skan builtin_define ("__athlon__"); \ 477148163Sobrien /* Plain "athlon" & "athlon-tbird" lacks SSE. */ \ 478148163Sobrien if (last_tune_char != 'n' && last_tune_char != 'd') \ 479117407Skan builtin_define ("__athlon_sse__"); \ 480117407Skan } \ 481132744Skan else if (ix86_arch == PROCESSOR_K8) \ 482132744Skan { \ 483132744Skan builtin_define ("__k8"); \ 484132744Skan builtin_define ("__k8__"); \ 485132744Skan } \ 486251212Spfg else if (ix86_arch == PROCESSOR_AMDFAM10) \ 487251212Spfg { \ 488251212Spfg builtin_define ("__amdfam10"); \ 489251212Spfg builtin_define ("__amdfam10__"); \ 490251212Spfg } \ 491117407Skan else if (ix86_arch == PROCESSOR_PENTIUM4) \ 492117407Skan { \ 493117407Skan builtin_define ("__pentium4"); \ 494117407Skan builtin_define ("__pentium4__"); \ 495117407Skan } \ 496169706Skan else if (ix86_arch == PROCESSOR_NOCONA) \ 497169706Skan { \ 498169706Skan builtin_define ("__nocona"); \ 499169706Skan builtin_define ("__nocona__"); \ 500169706Skan } \ 501219374Smm else if (ix86_arch == PROCESSOR_CORE2) \ 502219374Smm { \ 503219374Smm builtin_define ("__core2"); \ 504219374Smm builtin_define ("__core2__"); \ 505219374Smm } \ 506117407Skan } \ 507117407Skan while (0) 508117407Skan 50990285Sobrien#define TARGET_CPU_DEFAULT_i386 0 51090285Sobrien#define TARGET_CPU_DEFAULT_i486 1 51190285Sobrien#define TARGET_CPU_DEFAULT_pentium 2 51290285Sobrien#define TARGET_CPU_DEFAULT_pentium_mmx 3 51390285Sobrien#define TARGET_CPU_DEFAULT_pentiumpro 4 51490285Sobrien#define TARGET_CPU_DEFAULT_pentium2 5 51590285Sobrien#define TARGET_CPU_DEFAULT_pentium3 6 51690285Sobrien#define TARGET_CPU_DEFAULT_pentium4 7 517219374Smm#define TARGET_CPU_DEFAULT_geode 8 518219374Smm#define TARGET_CPU_DEFAULT_k6 9 519219374Smm#define TARGET_CPU_DEFAULT_k6_2 10 520219374Smm#define TARGET_CPU_DEFAULT_k6_3 11 521219374Smm#define TARGET_CPU_DEFAULT_athlon 12 522219374Smm#define TARGET_CPU_DEFAULT_athlon_sse 13 523219374Smm#define TARGET_CPU_DEFAULT_k8 14 524219374Smm#define TARGET_CPU_DEFAULT_pentium_m 15 525219374Smm#define TARGET_CPU_DEFAULT_prescott 16 526219374Smm#define TARGET_CPU_DEFAULT_nocona 17 527219374Smm#define TARGET_CPU_DEFAULT_core2 18 528219374Smm#define TARGET_CPU_DEFAULT_generic 19 529251212Spfg#define TARGET_CPU_DEFAULT_amdfam10 20 53050654Sobrien 53190285Sobrien#define TARGET_CPU_DEFAULT_NAMES {"i386", "i486", "pentium", "pentium-mmx",\ 53290285Sobrien "pentiumpro", "pentium2", "pentium3", \ 533219374Smm "pentium4", "geode", "k6", "k6-2", "k6-3", \ 534132744Skan "athlon", "athlon-4", "k8", \ 535169706Skan "pentium-m", "prescott", "nocona", \ 536251212Spfg "core2", "generic", "amdfam10"} 53750654Sobrien 53850654Sobrien#ifndef CC1_SPEC 53990285Sobrien#define CC1_SPEC "%(cc1_cpu) " 54050654Sobrien#endif 54150654Sobrien 54250654Sobrien/* This macro defines names of additional specifications to put in the 54350654Sobrien specs that can be used in various specifications like CC1_SPEC. Its 54450654Sobrien definition is an initializer with a subgrouping for each command option. 54550654Sobrien 54650654Sobrien Each subgrouping contains a string constant, that defines the 547132744Skan specification name, and a string constant that used by the GCC driver 54850654Sobrien program. 54950654Sobrien 55050654Sobrien Do not define this macro if it does not need to do anything. */ 55150654Sobrien 55250654Sobrien#ifndef SUBTARGET_EXTRA_SPECS 55350654Sobrien#define SUBTARGET_EXTRA_SPECS 55450654Sobrien#endif 55550654Sobrien 55650654Sobrien#define EXTRA_SPECS \ 55750654Sobrien { "cc1_cpu", CC1_CPU_SPEC }, \ 55850654Sobrien SUBTARGET_EXTRA_SPECS 55950654Sobrien 56018334Speter/* target machine storage layout */ 56118334Speter 562169706Skan#define LONG_DOUBLE_TYPE_SIZE 80 56318334Speter 564117407Skan/* Set the value of FLT_EVAL_METHOD in float.h. When using only the 565117407Skan FPU, assume that the fpcw is set to extended precision; when using 566117407Skan only SSE, rounding is correct; when using both SSE and the FPU, 567117407Skan the rounding precision is indeterminate, since either may be chosen 568117407Skan apparently at random. */ 569117407Skan#define TARGET_FLT_EVAL_METHOD \ 570132744Skan (TARGET_MIX_SSE_I387 ? -1 : TARGET_SSE_MATH ? 0 : 2) 57190285Sobrien 57290285Sobrien#define SHORT_TYPE_SIZE 16 57390285Sobrien#define INT_TYPE_SIZE 32 57490285Sobrien#define FLOAT_TYPE_SIZE 32 57597912Sobrien#ifndef LONG_TYPE_SIZE 57690285Sobrien#define LONG_TYPE_SIZE BITS_PER_WORD 57797912Sobrien#endif 57890285Sobrien#define DOUBLE_TYPE_SIZE 64 57990285Sobrien#define LONG_LONG_TYPE_SIZE 64 58090285Sobrien 581117407Skan#if defined (TARGET_BI_ARCH) || TARGET_64BIT_DEFAULT 58290285Sobrien#define MAX_BITS_PER_WORD 64 58390285Sobrien#else 58490285Sobrien#define MAX_BITS_PER_WORD 32 58590285Sobrien#endif 58690285Sobrien 58718334Speter/* Define this if most significant byte of a word is the lowest numbered. */ 58818334Speter/* That is true on the 80386. */ 58918334Speter 59018334Speter#define BITS_BIG_ENDIAN 0 59118334Speter 59218334Speter/* Define this if most significant byte of a word is the lowest numbered. */ 59318334Speter/* That is not true on the 80386. */ 59418334Speter#define BYTES_BIG_ENDIAN 0 59518334Speter 59618334Speter/* Define this if most significant word of a multiword number is the lowest 59718334Speter numbered. */ 59818334Speter/* Not true for 80386 */ 59918334Speter#define WORDS_BIG_ENDIAN 0 60018334Speter 60118334Speter/* Width of a word, in units (bytes). */ 60290285Sobrien#define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) 603117407Skan#ifdef IN_LIBGCC2 604117407Skan#define MIN_UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) 605117407Skan#else 606117407Skan#define MIN_UNITS_PER_WORD 4 607117407Skan#endif 60818334Speter 60918334Speter/* Allocation boundary (in *bits*) for storing arguments in argument list. */ 61090285Sobrien#define PARM_BOUNDARY BITS_PER_WORD 61118334Speter 61290285Sobrien/* Boundary (in *bits*) on which stack pointer should be aligned. */ 61390285Sobrien#define STACK_BOUNDARY BITS_PER_WORD 61418334Speter 615132744Skan/* Boundary (in *bits*) on which the stack pointer prefers to be 61652295Sobrien aligned; the compiler cannot rely on having this alignment. */ 61790285Sobrien#define PREFERRED_STACK_BOUNDARY ix86_preferred_stack_boundary 61852295Sobrien 619169706Skan/* As of July 2001, many runtimes do not align the stack properly when 620132744Skan entering main. This causes expand_main_function to forcibly align 62190285Sobrien the stack, which results in aligned frames for functions called from 62290285Sobrien main, though it does nothing for the alignment of main itself. */ 62390285Sobrien#define FORCE_PREFERRED_STACK_BOUNDARY_IN_MAIN \ 62490285Sobrien (ix86_preferred_stack_boundary > STACK_BOUNDARY && !TARGET_64BIT) 62518334Speter 626104768Skan/* Minimum allocation boundary for the code of a function. */ 627104768Skan#define FUNCTION_BOUNDARY 8 62818334Speter 629104768Skan/* C++ stores the virtual bit in the lowest bit of function pointers. */ 630104768Skan#define TARGET_PTRMEMFUNC_VBIT_LOCATION ptrmemfunc_vbit_in_pfn 631104768Skan 63290285Sobrien/* Alignment of field after `int : 0' in a structure. */ 63318334Speter 63490285Sobrien#define EMPTY_FIELD_BOUNDARY BITS_PER_WORD 63590285Sobrien 63618334Speter/* Minimum size in bits of the largest boundary to which any 63718334Speter and all fundamental data types supported by the hardware 63818334Speter might need to be aligned. No data type wants to be aligned 63990285Sobrien rounder than this. 640117407Skan 641132744Skan Pentium+ prefers DFmode values to be aligned to 64 bit boundary 64290285Sobrien and Pentium Pro XFmode values at 128 bit boundaries. */ 64318334Speter 64490285Sobrien#define BIGGEST_ALIGNMENT 128 64590285Sobrien 646117407Skan/* Decide whether a variable of mode MODE should be 128 bit aligned. */ 64790285Sobrien#define ALIGN_MODE_128(MODE) \ 648169706Skan ((MODE) == XFmode || SSE_REG_MODE_P (MODE)) 64990285Sobrien 65090285Sobrien/* The published ABIs say that doubles should be aligned on word 651132744Skan boundaries, so lower the alignment for structure fields unless 65290285Sobrien -malign-double is set. */ 653102801Skan 654102801Skan/* ??? Blah -- this macro is used directly by libobjc. Since it 655102801Skan supports no vector modes, cut out the complexity and fall back 656102801Skan on BIGGEST_FIELD_ALIGNMENT. */ 657102801Skan#ifdef IN_TARGET_LIBS 658117407Skan#ifdef __x86_64__ 659117407Skan#define BIGGEST_FIELD_ALIGNMENT 128 660117407Skan#else 661102801Skan#define BIGGEST_FIELD_ALIGNMENT 32 662117407Skan#endif 66390285Sobrien#else 664102801Skan#define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \ 665102801Skan x86_field_alignment (FIELD, COMPUTED) 66690285Sobrien#endif 66790285Sobrien 66850654Sobrien/* If defined, a C expression to compute the alignment given to a 66990285Sobrien constant that is being placed in memory. EXP is the constant 67050654Sobrien and ALIGN is the alignment that the object would ordinarily have. 67150654Sobrien The value of this macro is used instead of that alignment to align 67250654Sobrien the object. 67350654Sobrien 67450654Sobrien If this macro is not defined, then ALIGN is used. 67550654Sobrien 67650654Sobrien The typical use of this macro is to increase alignment for string 67750654Sobrien constants to be word aligned so that `strcpy' calls that copy 67850654Sobrien constants can be done inline. */ 67950654Sobrien 68090285Sobrien#define CONSTANT_ALIGNMENT(EXP, ALIGN) ix86_constant_alignment ((EXP), (ALIGN)) 68150654Sobrien 68250654Sobrien/* If defined, a C expression to compute the alignment for a static 68350654Sobrien variable. TYPE is the data type, and ALIGN is the alignment that 68450654Sobrien the object would ordinarily have. The value of this macro is used 68550654Sobrien instead of that alignment to align the object. 68650654Sobrien 68750654Sobrien If this macro is not defined, then ALIGN is used. 68850654Sobrien 68950654Sobrien One use of this macro is to increase alignment of medium-size 69050654Sobrien data to make it all fit in fewer cache lines. Another is to 69150654Sobrien cause character arrays to be word-aligned so that `strcpy' calls 69250654Sobrien that copy constants to character arrays can be done inline. */ 69350654Sobrien 69490285Sobrien#define DATA_ALIGNMENT(TYPE, ALIGN) ix86_data_alignment ((TYPE), (ALIGN)) 69550654Sobrien 69652295Sobrien/* If defined, a C expression to compute the alignment for a local 69752295Sobrien variable. TYPE is the data type, and ALIGN is the alignment that 69852295Sobrien the object would ordinarily have. The value of this macro is used 69952295Sobrien instead of that alignment to align the object. 70052295Sobrien 70152295Sobrien If this macro is not defined, then ALIGN is used. 70252295Sobrien 70352295Sobrien One use of this macro is to increase alignment of medium-size 70452295Sobrien data to make it all fit in fewer cache lines. */ 70552295Sobrien 70690285Sobrien#define LOCAL_ALIGNMENT(TYPE, ALIGN) ix86_local_alignment ((TYPE), (ALIGN)) 70752295Sobrien 70890285Sobrien/* If defined, a C expression that gives the alignment boundary, in 70990285Sobrien bits, of an argument with the specified mode and type. If it is 71090285Sobrien not defined, `PARM_BOUNDARY' is used for all arguments. */ 71190285Sobrien 71290285Sobrien#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ 71390285Sobrien ix86_function_arg_boundary ((MODE), (TYPE)) 71490285Sobrien 715117407Skan/* Set this nonzero if move instructions will actually fail to work 71618334Speter when given unaligned data. */ 71718334Speter#define STRICT_ALIGNMENT 0 71818334Speter 71918334Speter/* If bit field type is int, don't let it cross an int, 72018334Speter and give entire struct the alignment of an int. */ 721117407Skan/* Required on the 386 since it doesn't have bit-field insns. */ 72218334Speter#define PCC_BITFIELD_TYPE_MATTERS 1 72318334Speter 72418334Speter/* Standard register usage. */ 72518334Speter 72618334Speter/* This processor has special stack-like registers. See reg-stack.c 72790285Sobrien for details. */ 72818334Speter 72918334Speter#define STACK_REGS 73090285Sobrien#define IS_STACK_MODE(MODE) \ 731169706Skan (((MODE) == SFmode && (!TARGET_SSE || !TARGET_SSE_MATH)) \ 732169706Skan || ((MODE) == DFmode && (!TARGET_SSE2 || !TARGET_SSE_MATH)) \ 733169706Skan || (MODE) == XFmode) 73418334Speter 73518334Speter/* Number of actual hardware registers. 73618334Speter The hardware registers are assigned numbers for the compiler 73718334Speter from 0 to just below FIRST_PSEUDO_REGISTER. 73818334Speter All registers that the compiler knows about must be given numbers, 73918334Speter even those that are not normally considered general registers. 74018334Speter 74118334Speter In the 80386 we give the 8 general purpose registers the numbers 0-7. 74218334Speter We number the floating point registers 8-15. 74318334Speter Note that registers 0-7 can be accessed as a short or int, 74418334Speter while only 0-3 may be used with byte `mov' instructions. 74518334Speter 74618334Speter Reg 16 does not correspond to any hardware register, but instead 74718334Speter appears in the RTL as an argument pointer prior to reload, and is 74818334Speter eliminated during reloading in favor of either the stack or frame 74990285Sobrien pointer. */ 75018334Speter 751237021Spfg#define FIRST_PSEUDO_REGISTER 53 75218334Speter 75390285Sobrien/* Number of hardware registers that go into the DWARF-2 unwind info. 75490285Sobrien If not defined, equals FIRST_PSEUDO_REGISTER. */ 75590285Sobrien 75690285Sobrien#define DWARF_FRAME_REGISTERS 17 75790285Sobrien 75818334Speter/* 1 for registers that have pervasive standard uses 75918334Speter and are not available for the register allocator. 76090285Sobrien On the 80386, the stack pointer is such, as is the arg pointer. 761117407Skan 762169706Skan The value is zero if the register is not fixed on either 32 or 763169706Skan 64 bit targets, one if the register if fixed on both 32 and 64 764169706Skan bit targets, two if it is only fixed on 32bit targets and three 765169706Skan if its only fixed on 64bit targets. 766169706Skan Proper values are computed in the CONDITIONAL_REGISTER_USAGE. 76790285Sobrien */ 76890285Sobrien#define FIXED_REGISTERS \ 76990285Sobrien/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/ \ 770169706Skan{ 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ 771237021Spfg/*arg,flags,fpsr,dir,frame*/ \ 772237021Spfg 1, 1, 1, 1, 1, \ 77390285Sobrien/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \ 77490285Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 77590285Sobrien/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/ \ 77690285Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 77790285Sobrien/* r8, r9, r10, r11, r12, r13, r14, r15*/ \ 778169706Skan 2, 2, 2, 2, 2, 2, 2, 2, \ 77990285Sobrien/*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/ \ 780169706Skan 2, 2, 2, 2, 2, 2, 2, 2} 78118334Speter 782117407Skan 78318334Speter/* 1 for registers not available across function calls. 78418334Speter These must include the FIXED_REGISTERS and also any 78518334Speter registers that can be used without being saved. 78618334Speter The latter must include the registers where values are returned 78718334Speter and the register where structure-value addresses are passed. 788117407Skan Aside from that, you can include as many other registers as you like. 789117407Skan 790169706Skan The value is zero if the register is not call used on either 32 or 791169706Skan 64 bit targets, one if the register if call used on both 32 and 64 792169706Skan bit targets, two if it is only call used on 32bit targets and three 793169706Skan if its only call used on 64bit targets. 794169706Skan Proper values are computed in the CONDITIONAL_REGISTER_USAGE. 79590285Sobrien*/ 79690285Sobrien#define CALL_USED_REGISTERS \ 79790285Sobrien/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/ \ 798169706Skan{ 1, 1, 1, 0, 3, 3, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 799237021Spfg/*arg,flags,fpsr,dir,frame*/ \ 800237021Spfg 1, 1, 1, 1, 1, \ 80190285Sobrien/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \ 802237021Spfg 1, 1, 1, 1, 1, 1, 1, 1, \ 80390285Sobrien/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/ \ 804169706Skan 1, 1, 1, 1, 1, 1, 1, 1, \ 80590285Sobrien/* r8, r9, r10, r11, r12, r13, r14, r15*/ \ 806169706Skan 1, 1, 1, 1, 2, 2, 2, 2, \ 80790285Sobrien/*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/ \ 808169706Skan 1, 1, 1, 1, 1, 1, 1, 1} \ 80918334Speter 81018334Speter/* Order in which to allocate registers. Each register must be 81118334Speter listed once, even those in FIXED_REGISTERS. List frame pointer 81218334Speter late and fixed registers last. Note that, in general, we prefer 81318334Speter registers listed in CALL_USED_REGISTERS, keeping the others 81418334Speter available for storage of persistent values. 81518334Speter 81696294Sobrien The ORDER_REGS_FOR_LOCAL_ALLOC actually overwrite the order, 81796294Sobrien so this is just empty initializer for array. */ 81818334Speter 81996294Sobrien#define REG_ALLOC_ORDER \ 82096294Sobrien{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,\ 82196294Sobrien 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, \ 82296294Sobrien 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \ 823237021Spfg 48, 49, 50, 51, 52 } 82418334Speter 82596294Sobrien/* ORDER_REGS_FOR_LOCAL_ALLOC is a macro which permits reg_alloc_order 82696294Sobrien to be rearranged based on a particular function. When using sse math, 827237021Spfg we want to allocate SSE before x87 registers and vice vera. */ 82818334Speter 82996294Sobrien#define ORDER_REGS_FOR_LOCAL_ALLOC x86_order_regs_for_local_alloc () 83018334Speter 83118334Speter 83218334Speter/* Macro to conditionally modify fixed_regs/call_used_regs. */ 83390285Sobrien#define CONDITIONAL_REGISTER_USAGE \ 83490285Sobriendo { \ 83590285Sobrien int i; \ 83690285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 83790285Sobrien { \ 838169706Skan if (fixed_regs[i] > 1) \ 839169706Skan fixed_regs[i] = (fixed_regs[i] == (TARGET_64BIT ? 3 : 2)); \ 840169706Skan if (call_used_regs[i] > 1) \ 841169706Skan call_used_regs[i] = (call_used_regs[i] \ 842169706Skan == (TARGET_64BIT ? 3 : 2)); \ 84390285Sobrien } \ 84496294Sobrien if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \ 84590285Sobrien { \ 84690285Sobrien fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 84790285Sobrien call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 84890285Sobrien } \ 84990285Sobrien if (! TARGET_MMX) \ 85090285Sobrien { \ 85190285Sobrien int i; \ 85290285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 85390285Sobrien if (TEST_HARD_REG_BIT (reg_class_contents[(int)MMX_REGS], i)) \ 854169706Skan fixed_regs[i] = call_used_regs[i] = 1, reg_names[i] = ""; \ 85590285Sobrien } \ 85690285Sobrien if (! TARGET_SSE) \ 85790285Sobrien { \ 85890285Sobrien int i; \ 85990285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 86090285Sobrien if (TEST_HARD_REG_BIT (reg_class_contents[(int)SSE_REGS], i)) \ 861169706Skan fixed_regs[i] = call_used_regs[i] = 1, reg_names[i] = ""; \ 86290285Sobrien } \ 86390285Sobrien if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \ 86490285Sobrien { \ 86590285Sobrien int i; \ 86690285Sobrien HARD_REG_SET x; \ 86790285Sobrien COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \ 86890285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 86990285Sobrien if (TEST_HARD_REG_BIT (x, i)) \ 870169706Skan fixed_regs[i] = call_used_regs[i] = 1, reg_names[i] = ""; \ 87190285Sobrien } \ 872169706Skan if (! TARGET_64BIT) \ 873169706Skan { \ 874169706Skan int i; \ 875169706Skan for (i = FIRST_REX_INT_REG; i <= LAST_REX_INT_REG; i++) \ 876169706Skan reg_names[i] = ""; \ 877169706Skan for (i = FIRST_REX_SSE_REG; i <= LAST_REX_SSE_REG; i++) \ 878169706Skan reg_names[i] = ""; \ 879169706Skan } \ 88090285Sobrien } while (0) 88118334Speter 88218334Speter/* Return number of consecutive hard regs needed starting at reg REGNO 88318334Speter to hold something of mode MODE. 88418334Speter This is ordinarily the length in words of a value of mode MODE 88518334Speter but can be less for certain modes in special long registers. 88618334Speter 887117407Skan Actually there are no two word move instructions for consecutive 88818334Speter registers. And only registers 0-3 may have mov byte instructions 88918334Speter applied to them. 89018334Speter */ 89118334Speter 89218334Speter#define HARD_REGNO_NREGS(REGNO, MODE) \ 89390285Sobrien (FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO) \ 89490285Sobrien ? (COMPLEX_MODE_P (MODE) ? 2 : 1) \ 895132744Skan : ((MODE) == XFmode \ 89690285Sobrien ? (TARGET_64BIT ? 2 : 3) \ 897132744Skan : (MODE) == XCmode \ 89890285Sobrien ? (TARGET_64BIT ? 4 : 6) \ 89990285Sobrien : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) 90018334Speter 901169706Skan#define HARD_REGNO_NREGS_HAS_PADDING(REGNO, MODE) \ 902169706Skan ((TARGET_128BIT_LONG_DOUBLE && !TARGET_64BIT) \ 903169706Skan ? (FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO) \ 904169706Skan ? 0 \ 905169706Skan : ((MODE) == XFmode || (MODE) == XCmode)) \ 906169706Skan : 0) 907169706Skan 908169706Skan#define HARD_REGNO_NREGS_WITH_PADDING(REGNO, MODE) ((MODE) == XFmode ? 4 : 8) 909169706Skan 910117407Skan#define VALID_SSE2_REG_MODE(MODE) \ 911117407Skan ((MODE) == V16QImode || (MODE) == V8HImode || (MODE) == V2DFmode \ 912146908Skan || (MODE) == V2DImode || (MODE) == DFmode) 913117407Skan 91490285Sobrien#define VALID_SSE_REG_MODE(MODE) \ 91590285Sobrien ((MODE) == TImode || (MODE) == V4SFmode || (MODE) == V4SImode \ 916146908Skan || (MODE) == SFmode || (MODE) == TFmode) 91718334Speter 91890285Sobrien#define VALID_MMX_REG_MODE_3DNOW(MODE) \ 91990285Sobrien ((MODE) == V2SFmode || (MODE) == SFmode) 92018334Speter 92190285Sobrien#define VALID_MMX_REG_MODE(MODE) \ 92290285Sobrien ((MODE) == DImode || (MODE) == V8QImode || (MODE) == V4HImode \ 92390285Sobrien || (MODE) == V2SImode || (MODE) == SImode) 92418334Speter 925169706Skan/* ??? No autovectorization into MMX or 3DNOW until we can reliably 926169706Skan place emms and femms instructions. */ 927169706Skan#define UNITS_PER_SIMD_WORD (TARGET_SSE ? 16 : UNITS_PER_WORD) 92890285Sobrien 92990285Sobrien#define VALID_FP_MODE_P(MODE) \ 930132744Skan ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode \ 931132744Skan || (MODE) == SCmode || (MODE) == DCmode || (MODE) == XCmode) \ 93290285Sobrien 93390285Sobrien#define VALID_INT_MODE_P(MODE) \ 93490285Sobrien ((MODE) == QImode || (MODE) == HImode || (MODE) == SImode \ 93590285Sobrien || (MODE) == DImode \ 93690285Sobrien || (MODE) == CQImode || (MODE) == CHImode || (MODE) == CSImode \ 93790285Sobrien || (MODE) == CDImode \ 938132744Skan || (TARGET_64BIT && ((MODE) == TImode || (MODE) == CTImode \ 939132744Skan || (MODE) == TFmode || (MODE) == TCmode))) 94090285Sobrien 941117407Skan/* Return true for modes passed in SSE registers. */ 942117407Skan#define SSE_REG_MODE_P(MODE) \ 943132744Skan ((MODE) == TImode || (MODE) == V16QImode || (MODE) == TFmode \ 944117407Skan || (MODE) == V8HImode || (MODE) == V2DFmode || (MODE) == V2DImode \ 945117407Skan || (MODE) == V4SFmode || (MODE) == V4SImode) 946117407Skan 94790285Sobrien/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */ 94890285Sobrien 94990285Sobrien#define HARD_REGNO_MODE_OK(REGNO, MODE) \ 95090285Sobrien ix86_hard_regno_mode_ok ((REGNO), (MODE)) 95190285Sobrien 95218334Speter/* Value is 1 if it is a good idea to tie two pseudo registers 95318334Speter when one has mode MODE1 and one has mode MODE2. 95418334Speter If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 95518334Speter for any hard reg, then this must be 0 for correct output. */ 95618334Speter 957169706Skan#define MODES_TIEABLE_P(MODE1, MODE2) ix86_modes_tieable_p (MODE1, MODE2) 95818334Speter 959132744Skan/* It is possible to write patterns to move flags; but until someone 960132744Skan does it, */ 961132744Skan#define AVOID_CCMODE_COPIES 96290285Sobrien 96390285Sobrien/* Specify the modes required to caller save a given hard regno. 96490285Sobrien We do this on i386 to prevent flags from being saved at all. 96590285Sobrien 96690285Sobrien Kill any attempts to combine saving of modes. */ 96790285Sobrien 96890285Sobrien#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ 96990285Sobrien (CC_REGNO_P (REGNO) ? VOIDmode \ 97090285Sobrien : (MODE) == VOIDmode && (NREGS) != 1 ? VOIDmode \ 971132744Skan : (MODE) == VOIDmode ? choose_hard_reg_mode ((REGNO), (NREGS), false)\ 97290285Sobrien : (MODE) == HImode && !TARGET_PARTIAL_REG_STALL ? SImode \ 97390285Sobrien : (MODE) == QImode && (REGNO) >= 4 && !TARGET_64BIT ? SImode \ 97490285Sobrien : (MODE)) 97518334Speter/* Specify the registers used for certain standard purposes. 97618334Speter The values of these macros are register numbers. */ 97718334Speter 97818334Speter/* on the 386 the pc register is %eip, and is not usable as a general 97918334Speter register. The ordinary mov instructions won't work */ 98018334Speter/* #define PC_REGNUM */ 98118334Speter 98218334Speter/* Register to use for pushing function arguments. */ 98318334Speter#define STACK_POINTER_REGNUM 7 98418334Speter 98518334Speter/* Base register for access to local variables of the function. */ 98690285Sobrien#define HARD_FRAME_POINTER_REGNUM 6 98718334Speter 98890285Sobrien/* Base register for access to local variables of the function. */ 989237021Spfg#define FRAME_POINTER_REGNUM 20 99090285Sobrien 99118334Speter/* First floating point reg */ 99218334Speter#define FIRST_FLOAT_REG 8 99318334Speter 99418334Speter/* First & last stack-like regs */ 99518334Speter#define FIRST_STACK_REG FIRST_FLOAT_REG 99618334Speter#define LAST_STACK_REG (FIRST_FLOAT_REG + 7) 99718334Speter 99890285Sobrien#define FIRST_SSE_REG (FRAME_POINTER_REGNUM + 1) 99990285Sobrien#define LAST_SSE_REG (FIRST_SSE_REG + 7) 1000117407Skan 100190285Sobrien#define FIRST_MMX_REG (LAST_SSE_REG + 1) 100290285Sobrien#define LAST_MMX_REG (FIRST_MMX_REG + 7) 100390285Sobrien 100490285Sobrien#define FIRST_REX_INT_REG (LAST_MMX_REG + 1) 100590285Sobrien#define LAST_REX_INT_REG (FIRST_REX_INT_REG + 7) 100690285Sobrien 100790285Sobrien#define FIRST_REX_SSE_REG (LAST_REX_INT_REG + 1) 100890285Sobrien#define LAST_REX_SSE_REG (FIRST_REX_SSE_REG + 7) 100990285Sobrien 101018334Speter/* Value should be nonzero if functions must have frame pointers. 101118334Speter Zero means the frame pointer need not be set up (and parms 101218334Speter may be accessed via the stack pointer) in functions that seem suitable. 101318334Speter This is computed in `reload', in reload1.c. */ 101490285Sobrien#define FRAME_POINTER_REQUIRED ix86_frame_pointer_required () 101518334Speter 1016169706Skan/* Override this in other tm.h files to cope with various OS lossage 101790285Sobrien requiring a frame pointer. */ 101890285Sobrien#ifndef SUBTARGET_FRAME_POINTER_REQUIRED 101990285Sobrien#define SUBTARGET_FRAME_POINTER_REQUIRED 0 102090285Sobrien#endif 102190285Sobrien 102290285Sobrien/* Make sure we can access arbitrary call frames. */ 102390285Sobrien#define SETUP_FRAME_ADDRESSES() ix86_setup_frame_addresses () 102490285Sobrien 102518334Speter/* Base register for access to arguments of the function. */ 102618334Speter#define ARG_POINTER_REGNUM 16 102718334Speter 102890285Sobrien/* Register in which static-chain is passed to a function. 102990285Sobrien We do use ECX as static chain register for 32 bit ABI. On the 103090285Sobrien 64bit ABI, ECX is an argument register, so we use R10 instead. */ 103190285Sobrien#define STATIC_CHAIN_REGNUM (TARGET_64BIT ? FIRST_REX_INT_REG + 10 - 8 : 2) 103218334Speter 103318334Speter/* Register to hold the addressing base for position independent 103496294Sobrien code access to data items. We don't use PIC pointer for 64bit 103596294Sobrien mode. Define the regnum to dummy value to prevent gcc from 1036117407Skan pessimizing code dealing with EBX. 103718334Speter 1038117407Skan To avoid clobbering a call-saved register unnecessarily, we renumber 1039117407Skan the pic register when possible. The change is visible after the 1040117407Skan prologue has been emitted. */ 1041117407Skan 1042117407Skan#define REAL_PIC_OFFSET_TABLE_REGNUM 3 1043117407Skan 1044117407Skan#define PIC_OFFSET_TABLE_REGNUM \ 1045169706Skan ((TARGET_64BIT && ix86_cmodel == CM_SMALL_PIC) \ 1046169706Skan || !flag_pic ? INVALID_REGNUM \ 1047117407Skan : reload_completed ? REGNO (pic_offset_table_rtx) \ 1048117407Skan : REAL_PIC_OFFSET_TABLE_REGNUM) 1049117407Skan 1050117407Skan#define GOT_SYMBOL_NAME "_GLOBAL_OFFSET_TABLE_" 1051117407Skan 105218334Speter/* A C expression which can inhibit the returning of certain function 105318334Speter values in registers, based on the type of value. A nonzero value 105418334Speter says to return the function value in memory, just as large 105518334Speter structures are always returned. Here TYPE will be a C expression 105618334Speter of type `tree', representing the data type of the value. 105718334Speter 105818334Speter Note that values of mode `BLKmode' must be explicitly handled by 105918334Speter this macro. Also, the option `-fpcc-struct-return' takes effect 106018334Speter regardless of this macro. On most systems, it is possible to 106118334Speter leave the macro undefined; this causes a default definition to be 106218334Speter used, whose value is the constant 1 for `BLKmode' values, and 0 106318334Speter otherwise. 106418334Speter 106518334Speter Do not use this macro to indicate that structures and unions 106618334Speter should always be returned in memory. You should instead use 106718334Speter `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */ 106818334Speter 106918334Speter#define RETURN_IN_MEMORY(TYPE) \ 107090285Sobrien ix86_return_in_memory (TYPE) 107118334Speter 1072132744Skan/* This is overridden by <cygwin.h>. */ 1073132744Skan#define MS_AGGREGATE_RETURN 0 1074132744Skan 1075169706Skan/* This is overridden by <netware.h>. */ 1076169706Skan#define KEEP_AGGREGATE_RETURN_POINTER 0 107718334Speter 107818334Speter/* Define the classes of registers for register constraints in the 107918334Speter machine description. Also define ranges of constants. 108018334Speter 108118334Speter One of the classes must always be named ALL_REGS and include all hard regs. 108218334Speter If there is more than one class, another class must be named NO_REGS 108318334Speter and contain no registers. 108418334Speter 108518334Speter The name GENERAL_REGS must be the name of a class (or an alias for 108618334Speter another name such as ALL_REGS). This is the class of registers 108718334Speter that is allowed by "g" or "r" in a register constraint. 108818334Speter Also, registers outside this class are allocated only when 108918334Speter instructions express preferences for them. 109018334Speter 109118334Speter The classes must be numbered in nondecreasing order; that is, 109218334Speter a larger-numbered class must never be contained completely 109318334Speter in a smaller-numbered class. 109418334Speter 109518334Speter For any two classes, it is very desirable that there be another 109618334Speter class that represents their union. 109718334Speter 109818334Speter It might seem that class BREG is unnecessary, since no useful 386 109918334Speter opcode needs reg %ebx. But some systems pass args to the OS in ebx, 110090285Sobrien and the "b" register constraint is useful in asms for syscalls. 110118334Speter 1102237021Spfg The flags and fpsr registers are in no class. */ 110390285Sobrien 110418334Speterenum reg_class 110518334Speter{ 110618334Speter NO_REGS, 110790285Sobrien AREG, DREG, CREG, BREG, SIREG, DIREG, 110818334Speter AD_REGS, /* %eax/%edx for DImode */ 110918334Speter Q_REGS, /* %eax %ebx %ecx %edx */ 111090285Sobrien NON_Q_REGS, /* %esi %edi %ebp %esp */ 111118334Speter INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */ 111290285Sobrien LEGACY_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */ 111390285Sobrien GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp %r8 - %r15*/ 111418334Speter FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */ 111518334Speter FLOAT_REGS, 111690285Sobrien SSE_REGS, 111790285Sobrien MMX_REGS, 111890285Sobrien FP_TOP_SSE_REGS, 111990285Sobrien FP_SECOND_SSE_REGS, 112090285Sobrien FLOAT_SSE_REGS, 112190285Sobrien FLOAT_INT_REGS, 112290285Sobrien INT_SSE_REGS, 112390285Sobrien FLOAT_INT_SSE_REGS, 112418334Speter ALL_REGS, LIM_REG_CLASSES 112518334Speter}; 112618334Speter 112790285Sobrien#define N_REG_CLASSES ((int) LIM_REG_CLASSES) 112818334Speter 112990285Sobrien#define INTEGER_CLASS_P(CLASS) \ 113090285Sobrien reg_class_subset_p ((CLASS), GENERAL_REGS) 113190285Sobrien#define FLOAT_CLASS_P(CLASS) \ 113290285Sobrien reg_class_subset_p ((CLASS), FLOAT_REGS) 113390285Sobrien#define SSE_CLASS_P(CLASS) \ 1134169706Skan ((CLASS) == SSE_REGS) 113590285Sobrien#define MMX_CLASS_P(CLASS) \ 1136169706Skan ((CLASS) == MMX_REGS) 113790285Sobrien#define MAYBE_INTEGER_CLASS_P(CLASS) \ 113890285Sobrien reg_classes_intersect_p ((CLASS), GENERAL_REGS) 113990285Sobrien#define MAYBE_FLOAT_CLASS_P(CLASS) \ 114090285Sobrien reg_classes_intersect_p ((CLASS), FLOAT_REGS) 114190285Sobrien#define MAYBE_SSE_CLASS_P(CLASS) \ 114290285Sobrien reg_classes_intersect_p (SSE_REGS, (CLASS)) 114390285Sobrien#define MAYBE_MMX_CLASS_P(CLASS) \ 114490285Sobrien reg_classes_intersect_p (MMX_REGS, (CLASS)) 114518334Speter 114690285Sobrien#define Q_CLASS_P(CLASS) \ 114790285Sobrien reg_class_subset_p ((CLASS), Q_REGS) 114890285Sobrien 1149132744Skan/* Give names of register classes as strings for dump file. */ 115018334Speter 115118334Speter#define REG_CLASS_NAMES \ 115218334Speter{ "NO_REGS", \ 115318334Speter "AREG", "DREG", "CREG", "BREG", \ 115490285Sobrien "SIREG", "DIREG", \ 115518334Speter "AD_REGS", \ 115690285Sobrien "Q_REGS", "NON_Q_REGS", \ 115718334Speter "INDEX_REGS", \ 115890285Sobrien "LEGACY_REGS", \ 115918334Speter "GENERAL_REGS", \ 116018334Speter "FP_TOP_REG", "FP_SECOND_REG", \ 116118334Speter "FLOAT_REGS", \ 116290285Sobrien "SSE_REGS", \ 116390285Sobrien "MMX_REGS", \ 116490285Sobrien "FP_TOP_SSE_REGS", \ 116590285Sobrien "FP_SECOND_SSE_REGS", \ 116690285Sobrien "FLOAT_SSE_REGS", \ 116790285Sobrien "FLOAT_INT_REGS", \ 116890285Sobrien "INT_SSE_REGS", \ 116990285Sobrien "FLOAT_INT_SSE_REGS", \ 117018334Speter "ALL_REGS" } 117118334Speter 117218334Speter/* Define which registers fit in which classes. 117318334Speter This is an initializer for a vector of HARD_REG_SET 117418334Speter of length N_REG_CLASSES. */ 117518334Speter 117690285Sobrien#define REG_CLASS_CONTENTS \ 117790285Sobrien{ { 0x00, 0x0 }, \ 117890285Sobrien { 0x01, 0x0 }, { 0x02, 0x0 }, /* AREG, DREG */ \ 117990285Sobrien { 0x04, 0x0 }, { 0x08, 0x0 }, /* CREG, BREG */ \ 118090285Sobrien { 0x10, 0x0 }, { 0x20, 0x0 }, /* SIREG, DIREG */ \ 118190285Sobrien { 0x03, 0x0 }, /* AD_REGS */ \ 118290285Sobrien { 0x0f, 0x0 }, /* Q_REGS */ \ 1183237021Spfg { 0x1100f0, 0x1fe0 }, /* NON_Q_REGS */ \ 1184237021Spfg { 0x7f, 0x1fe0 }, /* INDEX_REGS */ \ 1185237021Spfg { 0x1100ff, 0x0 }, /* LEGACY_REGS */ \ 1186237021Spfg { 0x1100ff, 0x1fe0 }, /* GENERAL_REGS */ \ 118790285Sobrien { 0x100, 0x0 }, { 0x0200, 0x0 },/* FP_TOP_REG, FP_SECOND_REG */\ 118890285Sobrien { 0xff00, 0x0 }, /* FLOAT_REGS */ \ 1189237021Spfg{ 0x1fe00000,0x1fe000 }, /* SSE_REGS */ \ 1190237021Spfg{ 0xe0000000, 0x1f }, /* MMX_REGS */ \ 1191237021Spfg{ 0x1fe00100,0x1fe000 }, /* FP_TOP_SSE_REG */ \ 1192237021Spfg{ 0x1fe00200,0x1fe000 }, /* FP_SECOND_SSE_REG */ \ 1193237021Spfg{ 0x1fe0ff00,0x1fe000 }, /* FLOAT_SSE_REGS */ \ 1194237021Spfg { 0x1ffff, 0x1fe0 }, /* FLOAT_INT_REGS */ \ 1195237021Spfg{ 0x1fe100ff,0x1fffe0 }, /* INT_SSE_REGS */ \ 1196237021Spfg{ 0x1fe1ffff,0x1fffe0 }, /* FLOAT_INT_SSE_REGS */ \ 1197237021Spfg{ 0xffffffff,0x1fffff } \ 119890285Sobrien} 119918334Speter 120018334Speter/* The same information, inverted: 120118334Speter Return the class number of the smallest class containing 120218334Speter reg number REGNO. This could be a conditional expression 120318334Speter or could index an array. */ 120418334Speter 120518334Speter#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO]) 120618334Speter 120718334Speter/* When defined, the compiler allows registers explicitly used in the 120818334Speter rtl to be used as spill registers but prevents the compiler from 120990285Sobrien extending the lifetime of these registers. */ 121018334Speter 121150654Sobrien#define SMALL_REGISTER_CLASSES 1 121218334Speter 1213237021Spfg#define QI_REG_P(X) \ 1214237021Spfg (REG_P (X) && REGNO (X) < 4) 121590285Sobrien 121690285Sobrien#define GENERAL_REGNO_P(N) \ 1217237021Spfg ((N) < 8 || REX_INT_REGNO_P (N)) 121890285Sobrien 121990285Sobrien#define GENERAL_REG_P(X) \ 122090285Sobrien (REG_P (X) && GENERAL_REGNO_P (REGNO (X))) 122190285Sobrien 122290285Sobrien#define ANY_QI_REG_P(X) (TARGET_64BIT ? GENERAL_REG_P(X) : QI_REG_P (X)) 122390285Sobrien 122418334Speter#define NON_QI_REG_P(X) \ 1225237021Spfg (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER) 122618334Speter 1227237021Spfg#define REX_INT_REGNO_P(N) ((N) >= FIRST_REX_INT_REG && (N) <= LAST_REX_INT_REG) 122890285Sobrien#define REX_INT_REG_P(X) (REG_P (X) && REX_INT_REGNO_P (REGNO (X))) 122990285Sobrien 123018334Speter#define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X))) 1231237021Spfg#define FP_REGNO_P(N) ((N) >= FIRST_STACK_REG && (N) <= LAST_STACK_REG) 123290285Sobrien#define ANY_FP_REG_P(X) (REG_P (X) && ANY_FP_REGNO_P (REGNO (X))) 123390285Sobrien#define ANY_FP_REGNO_P(N) (FP_REGNO_P (N) || SSE_REGNO_P (N)) 123490285Sobrien 1235237021Spfg#define SSE_REGNO_P(N) \ 1236237021Spfg (((N) >= FIRST_SSE_REG && (N) <= LAST_SSE_REG) \ 1237237021Spfg || ((N) >= FIRST_REX_SSE_REG && (N) <= LAST_REX_SSE_REG)) 123890285Sobrien 1239132744Skan#define REX_SSE_REGNO_P(N) \ 1240237021Spfg ((N) >= FIRST_REX_SSE_REG && (N) <= LAST_REX_SSE_REG) 1241132744Skan 124290285Sobrien#define SSE_REGNO(N) \ 124390285Sobrien ((N) < 8 ? FIRST_SSE_REG + (N) : FIRST_REX_SSE_REG + (N) - 8) 1244237021Spfg#define SSE_REG_P(N) (REG_P (N) && SSE_REGNO_P (REGNO (N))) 124590285Sobrien 124690285Sobrien#define SSE_FLOAT_MODE_P(MODE) \ 124796294Sobrien ((TARGET_SSE && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode)) 124890285Sobrien 1249237021Spfg#define MMX_REGNO_P(N) ((N) >= FIRST_MMX_REG && (N) <= LAST_MMX_REG) 125090285Sobrien#define MMX_REG_P(XOP) (REG_P (XOP) && MMX_REGNO_P (REGNO (XOP))) 1251117407Skan 1252237021Spfg#define STACK_REG_P(XOP) \ 1253237021Spfg (REG_P (XOP) && \ 1254237021Spfg REGNO (XOP) >= FIRST_STACK_REG && \ 1255237021Spfg REGNO (XOP) <= LAST_STACK_REG) 125618334Speter 1257237021Spfg#define NON_STACK_REG_P(XOP) (REG_P (XOP) && ! STACK_REG_P (XOP)) 1258237021Spfg 125990285Sobrien#define STACK_TOP_P(XOP) (REG_P (XOP) && REGNO (XOP) == FIRST_STACK_REG) 126018334Speter 126190285Sobrien#define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X))) 126290285Sobrien#define CC_REGNO_P(X) ((X) == FLAGS_REG || (X) == FPSR_REG) 126318334Speter 126418334Speter/* The class value for index registers, and the one for base regs. */ 126518334Speter 126618334Speter#define INDEX_REG_CLASS INDEX_REGS 126718334Speter#define BASE_REG_CLASS GENERAL_REGS 126818334Speter 126918334Speter/* Place additional restrictions on the register class to use when it 127018334Speter is necessary to be able to hold a value of mode MODE in a reload 127190285Sobrien register for which class CLASS would ordinarily be used. */ 127218334Speter 127390285Sobrien#define LIMIT_RELOAD_CLASS(MODE, CLASS) \ 127490285Sobrien ((MODE) == QImode && !TARGET_64BIT \ 127590285Sobrien && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS \ 127690285Sobrien || (CLASS) == LEGACY_REGS || (CLASS) == INDEX_REGS) \ 127718334Speter ? Q_REGS : (CLASS)) 127818334Speter 127918334Speter/* Given an rtx X being reloaded into a reg required to be 128018334Speter in class CLASS, return the class of reg to actually use. 128118334Speter In general this is just CLASS; but on some machines 128218334Speter in some cases it is preferable to use a more restrictive class. 128318334Speter On the 80386 series, we prevent floating constants from being 128418334Speter reloaded into floating registers (since no move-insn can do that) 128518334Speter and we ensure that QImodes aren't reloaded into the esi or edi reg. */ 128618334Speter 128718334Speter/* Put float CONST_DOUBLE in the constant pool instead of fp regs. 128818334Speter QImode must go into class Q_REGS. 128918334Speter Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and 129090285Sobrien movdf to do mem-to-mem moves through integer regs. */ 129118334Speter 129290285Sobrien#define PREFERRED_RELOAD_CLASS(X, CLASS) \ 129390285Sobrien ix86_preferred_reload_class ((X), (CLASS)) 129418334Speter 1295169706Skan/* Discourage putting floating-point values in SSE registers unless 1296169706Skan SSE math is being used, and likewise for the 387 registers. */ 1297169706Skan 1298169706Skan#define PREFERRED_OUTPUT_RELOAD_CLASS(X, CLASS) \ 1299169706Skan ix86_preferred_output_reload_class ((X), (CLASS)) 1300169706Skan 130118334Speter/* If we are copying between general and FP registers, we need a memory 130290285Sobrien location. The same is true for SSE and MMX registers. */ 130390285Sobrien#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ 130490285Sobrien ix86_secondary_memory_needed ((CLASS1), (CLASS2), (MODE), 1) 130518334Speter 130690285Sobrien/* QImode spills from non-QI registers need a scratch. This does not 1307117407Skan happen often -- the only example so far requires an uninitialized 130890285Sobrien pseudo. */ 130918334Speter 131090285Sobrien#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \ 131190285Sobrien (((CLASS) == GENERAL_REGS || (CLASS) == LEGACY_REGS \ 131290285Sobrien || (CLASS) == INDEX_REGS) && !TARGET_64BIT && (MODE) == QImode \ 131390285Sobrien ? Q_REGS : NO_REGS) 131490285Sobrien 131518334Speter/* Return the maximum number of consecutive registers 131618334Speter needed to represent mode MODE in a register of class CLASS. */ 131718334Speter/* On the 80386, this is the size of MODE in words, 1318132744Skan except in the FP regs, where a single reg is always enough. */ 131990285Sobrien#define CLASS_MAX_NREGS(CLASS, MODE) \ 132090285Sobrien (!MAYBE_INTEGER_CLASS_P (CLASS) \ 132190285Sobrien ? (COMPLEX_MODE_P (MODE) ? 2 : 1) \ 1322132744Skan : (((((MODE) == XFmode ? 12 : GET_MODE_SIZE (MODE))) \ 1323132744Skan + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 132418334Speter 132518334Speter/* A C expression whose value is nonzero if pseudos that have been 132618334Speter assigned to registers of class CLASS would likely be spilled 132718334Speter because registers of CLASS are needed for spill registers. 132818334Speter 132918334Speter The default value of this macro returns 1 if CLASS has exactly one 133018334Speter register and zero otherwise. On most machines, this default 133118334Speter should be used. Only define this macro to some other expression 133218334Speter if pseudo allocated by `local-alloc.c' end up in memory because 133318334Speter their hard registers were needed for spill registers. If this 133418334Speter macro returns nonzero for those classes, those pseudos will only 133518334Speter be allocated by `global.c', which knows how to reallocate the 133618334Speter pseudo to another register. If there would not be another 133718334Speter register available for reallocation, you should not change the 133818334Speter definition of this macro since the only effect of such a 133918334Speter definition would be to slow down register allocation. */ 134018334Speter 134118334Speter#define CLASS_LIKELY_SPILLED_P(CLASS) \ 134218334Speter (((CLASS) == AREG) \ 134318334Speter || ((CLASS) == DREG) \ 134418334Speter || ((CLASS) == CREG) \ 134518334Speter || ((CLASS) == BREG) \ 134618334Speter || ((CLASS) == AD_REGS) \ 134718334Speter || ((CLASS) == SIREG) \ 1348132744Skan || ((CLASS) == DIREG) \ 1349132744Skan || ((CLASS) == FP_TOP_REG) \ 1350132744Skan || ((CLASS) == FP_SECOND_REG)) 135118334Speter 1352169706Skan/* Return a class of registers that cannot change FROM mode to TO mode. */ 1353117407Skan 1354169706Skan#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ 1355169706Skan ix86_cannot_change_mode_class (FROM, TO, CLASS) 135618334Speter 135718334Speter/* Stack layout; function entry, exit and calling. */ 135818334Speter 135918334Speter/* Define this if pushing a word on the stack 136018334Speter makes the stack pointer a smaller address. */ 136118334Speter#define STACK_GROWS_DOWNWARD 136218334Speter 1363169706Skan/* Define this to nonzero if the nominal address of the stack frame 136418334Speter is at the high-address end of the local variables; 136518334Speter that is, each additional local variable allocated 136618334Speter goes at a more negative offset in the frame. */ 1367169706Skan#define FRAME_GROWS_DOWNWARD 1 136818334Speter 136918334Speter/* Offset within stack frame to start allocating local variables at. 137018334Speter If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 137118334Speter first local allocated. Otherwise, it is the offset to the BEGINNING 137218334Speter of the first local allocated. */ 137318334Speter#define STARTING_FRAME_OFFSET 0 137418334Speter 137518334Speter/* If we generate an insn to push BYTES bytes, 137618334Speter this says how many the stack pointer really advances by. 1377169706Skan On 386, we have pushw instruction that decrements by exactly 2 no 1378169706Skan matter what the position was, there is no pushb. 1379169706Skan But as CIE data alignment factor on this arch is -4, we need to make 1380169706Skan sure all stack pointer adjustments are in multiple of 4. 1381117407Skan 138290285Sobrien For 64bit ABI we round up to 8 bytes. 138390285Sobrien */ 138418334Speter 138590285Sobrien#define PUSH_ROUNDING(BYTES) \ 138690285Sobrien (TARGET_64BIT \ 138790285Sobrien ? (((BYTES) + 7) & (-8)) \ 1388169706Skan : (((BYTES) + 3) & (-4))) 138918334Speter 139090285Sobrien/* If defined, the maximum amount of space required for outgoing arguments will 139190285Sobrien be computed and placed into the variable 139290285Sobrien `current_function_outgoing_args_size'. No space will be pushed onto the 139390285Sobrien stack for each call; instead, the function prologue should increase the stack 139490285Sobrien frame size by this amount. */ 139590285Sobrien 139690285Sobrien#define ACCUMULATE_OUTGOING_ARGS TARGET_ACCUMULATE_OUTGOING_ARGS 139790285Sobrien 139890285Sobrien/* If defined, a C expression whose value is nonzero when we want to use PUSH 139990285Sobrien instructions to pass outgoing arguments. */ 140090285Sobrien 140190285Sobrien#define PUSH_ARGS (TARGET_PUSH_ARGS && !ACCUMULATE_OUTGOING_ARGS) 140290285Sobrien 1403107598Sobrien/* We want the stack and args grow in opposite directions, even if 1404107598Sobrien PUSH_ARGS is 0. */ 1405107598Sobrien#define PUSH_ARGS_REVERSED 1 1406107598Sobrien 140718334Speter/* Offset of first parameter from the argument pointer register value. */ 140818334Speter#define FIRST_PARM_OFFSET(FNDECL) 0 140918334Speter 141090285Sobrien/* Define this macro if functions should assume that stack space has been 141190285Sobrien allocated for arguments even when their values are passed in registers. 141290285Sobrien 141390285Sobrien The value of this macro is the size, in bytes, of the area reserved for 141490285Sobrien arguments passed in registers for the function represented by FNDECL. 141590285Sobrien 141690285Sobrien This space can be allocated by the caller, or be a part of the 141790285Sobrien machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE' says 141890285Sobrien which. */ 141990285Sobrien#define REG_PARM_STACK_SPACE(FNDECL) 0 142090285Sobrien 142118334Speter/* Value is the number of bytes of arguments automatically 142218334Speter popped when returning from a subroutine call. 142318334Speter FUNDECL is the declaration node of the function (as a tree), 142418334Speter FUNTYPE is the data type of the function (as a tree), 142518334Speter or for a library call it is an identifier node for the subroutine name. 142618334Speter SIZE is the number of bytes of arguments passed on the stack. 142718334Speter 142818334Speter On the 80386, the RTD insn may be used to pop them if the number 142918334Speter of args is fixed, but if the number is variable then the caller 143018334Speter must pop them all. RTD can't be used for library calls now 143118334Speter because the library is compiled with the Unix compiler. 143218334Speter Use of RTD is a selectable option, since it is incompatible with 143318334Speter standard Unix calling sequences. If the option is not selected, 143418334Speter the caller must always pop the args. 143518334Speter 143618334Speter The attribute stdcall is equivalent to RTD on a per module basis. */ 143718334Speter 143890285Sobrien#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) \ 143990285Sobrien ix86_return_pops_args ((FUNDECL), (FUNTYPE), (SIZE)) 144018334Speter 144190285Sobrien#define FUNCTION_VALUE_REGNO_P(N) \ 144290285Sobrien ix86_function_value_regno_p (N) 144390285Sobrien 144418334Speter/* Define how to find the value returned by a library function 144518334Speter assuming the value has mode MODE. */ 144618334Speter 144718334Speter#define LIBCALL_VALUE(MODE) \ 144890285Sobrien ix86_libcall_value (MODE) 144918334Speter 145018334Speter/* Define the size of the result block used for communication between 145118334Speter untyped_call and untyped_return. The block contains a DImode value 145218334Speter followed by the block used by fnsave and frstor. */ 145318334Speter 145418334Speter#define APPLY_RESULT_SIZE (8+108) 145518334Speter 145618334Speter/* 1 if N is a possible register number for function argument passing. */ 145790285Sobrien#define FUNCTION_ARG_REGNO_P(N) ix86_function_arg_regno_p (N) 145818334Speter 145918334Speter/* Define a data type for recording info about an argument list 146018334Speter during the scan of that argument list. This data type should 146118334Speter hold all necessary information about the function itself 146218334Speter and about the args processed so far, enough to enable macros 146318334Speter such as FUNCTION_ARG to determine where the next arg should go. */ 146418334Speter 146590285Sobrientypedef struct ix86_args { 146618334Speter int words; /* # words passed so far */ 146718334Speter int nregs; /* # registers available for passing */ 146818334Speter int regno; /* next available register number */ 1469169706Skan int fastcall; /* fastcall calling convention is used */ 147090285Sobrien int sse_words; /* # sse words passed so far */ 147190285Sobrien int sse_nregs; /* # sse registers available for passing */ 1472132744Skan int warn_sse; /* True when we want to warn about SSE ABI. */ 1473132744Skan int warn_mmx; /* True when we want to warn about MMX ABI. */ 147490285Sobrien int sse_regno; /* next available sse register number */ 1475132744Skan int mmx_words; /* # mmx words passed so far */ 1476132744Skan int mmx_nregs; /* # mmx registers available for passing */ 1477132744Skan int mmx_regno; /* next available mmx register number */ 147890285Sobrien int maybe_vaarg; /* true for calls to possibly vardic fncts. */ 1479169706Skan int float_in_sse; /* 1 if in 32-bit mode SFmode (2 for DFmode) should 1480169706Skan be passed in SSE registers. Otherwise 0. */ 148118334Speter} CUMULATIVE_ARGS; 148218334Speter 148318334Speter/* Initialize a variable CUM of type CUMULATIVE_ARGS 148418334Speter for a call to a function whose data type is FNTYPE. 148518334Speter For a library call, FNTYPE is 0. */ 148618334Speter 1487132744Skan#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ 1488132744Skan init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME), (FNDECL)) 148918334Speter 149018334Speter/* Update the data in CUM to advance over an argument 149118334Speter of mode MODE and data type TYPE. 149218334Speter (TYPE is null for libcalls where that information may not be available.) */ 149318334Speter 149490285Sobrien#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 149590285Sobrien function_arg_advance (&(CUM), (MODE), (TYPE), (NAMED)) 149618334Speter 149718334Speter/* Define where to put the arguments to a function. 149818334Speter Value is zero to push the argument on the stack, 149918334Speter or a hard register in which to store the argument. 150018334Speter 150118334Speter MODE is the argument's machine mode. 150218334Speter TYPE is the data type of the argument (as a tree). 150318334Speter This is null for libcalls where that information may 150418334Speter not be available. 150518334Speter CUM is a variable of type CUMULATIVE_ARGS which gives info about 150618334Speter the preceding args and about the function being called. 150718334Speter NAMED is nonzero if this argument is a named parameter 150818334Speter (otherwise it is an extra parameter matching an ellipsis). */ 150918334Speter 151018334Speter#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 151190285Sobrien function_arg (&(CUM), (MODE), (TYPE), (NAMED)) 151218334Speter 151390285Sobrien/* Implement `va_start' for varargs and stdarg. */ 1514117407Skan#define EXPAND_BUILTIN_VA_START(VALIST, NEXTARG) \ 1515117407Skan ix86_va_start (VALIST, NEXTARG) 151618334Speter 1517132744Skan#define TARGET_ASM_FILE_END ix86_file_end 1518132744Skan#define NEED_INDICATE_EXEC_STACK 0 151918334Speter 152090285Sobrien/* Output assembler code to FILE to increment profiler label # LABELNO 152190285Sobrien for profiling a function entry. */ 152250654Sobrien 1523117407Skan#define FUNCTION_PROFILER(FILE, LABELNO) x86_function_profiler (FILE, LABELNO) 152418334Speter 1525117407Skan#define MCOUNT_NAME "_mcount" 1526117407Skan 1527117407Skan#define PROFILE_COUNT_REGISTER "edx" 1528117407Skan 152918334Speter/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 153018334Speter the stack pointer does not matter. The value is tested only in 153118334Speter functions that have frame pointers. 153218334Speter No definition is equivalent to always zero. */ 1533117407Skan/* Note on the 386 it might be more efficient not to define this since 153418334Speter we have to restore it ourselves from the frame pointer, in order to 153518334Speter use pop */ 153618334Speter 153718334Speter#define EXIT_IGNORE_STACK 1 153818334Speter 153918334Speter/* Output assembler code for a block containing the constant parts 154018334Speter of a trampoline, leaving space for the variable parts. */ 154118334Speter 154252295Sobrien/* On the 386, the trampoline contains two instructions: 154318334Speter mov #STATIC,ecx 154452295Sobrien jmp FUNCTION 154552295Sobrien The trampoline is generated entirely at runtime. The operand of JMP 154652295Sobrien is the address of FUNCTION relative to the instruction following the 154752295Sobrien JMP (which is 5 bytes long). */ 154818334Speter 154918334Speter/* Length in units of the trampoline for entering a nested function. */ 155018334Speter 155190285Sobrien#define TRAMPOLINE_SIZE (TARGET_64BIT ? 23 : 10) 155218334Speter 155318334Speter/* Emit RTL insns to initialize the variable parts of a trampoline. 155418334Speter FNADDR is an RTX for the address of the function's pure code. 155518334Speter CXT is an RTX for the static chain value for the function. */ 155618334Speter 155790285Sobrien#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 155890285Sobrien x86_initialize_trampoline ((TRAMP), (FNADDR), (CXT)) 155918334Speter 156018334Speter/* Definitions for register eliminations. 156118334Speter 156218334Speter This is an array of structures. Each structure initializes one pair 156318334Speter of eliminable registers. The "from" register number is given first, 156418334Speter followed by "to". Eliminations of the same "from" register are listed 156518334Speter in order of preference. 156618334Speter 156790285Sobrien There are two registers that can always be eliminated on the i386. 156890285Sobrien The frame pointer and the arg pointer can be replaced by either the 156990285Sobrien hard frame pointer or to the stack pointer, depending upon the 157090285Sobrien circumstances. The hard frame pointer is not used before reload and 157190285Sobrien so it is not eligible for elimination. */ 157218334Speter 157390285Sobrien#define ELIMINABLE_REGS \ 157490285Sobrien{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 157590285Sobrien { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ 157690285Sobrien { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 157790285Sobrien { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} \ 157818334Speter 157990285Sobrien/* Given FROM and TO register numbers, say whether this elimination is 158090285Sobrien allowed. Frame pointer elimination is automatically handled. 158118334Speter 158218334Speter All other eliminations are valid. */ 158318334Speter 158490285Sobrien#define CAN_ELIMINATE(FROM, TO) \ 158590285Sobrien ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1) 158618334Speter 158718334Speter/* Define the offset between two registers, one to be eliminated, and the other 158818334Speter its replacement, at the start of a routine. */ 158918334Speter 159090285Sobrien#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 159190285Sobrien ((OFFSET) = ix86_initial_elimination_offset ((FROM), (TO))) 159218334Speter 159318334Speter/* Addressing modes, and classification of registers for them. */ 159418334Speter 159518334Speter/* Macros to check register numbers against specific register classes. */ 159618334Speter 159718334Speter/* These assume that REGNO is a hard or pseudo reg number. 159818334Speter They give nonzero only if REGNO is a hard reg of the suitable class 159918334Speter or a pseudo reg currently allocated to a suitable hard reg. 160018334Speter Since they use reg_renumber, they are safe only once reg_renumber 160118334Speter has been allocated, which happens in local-alloc.c. */ 160218334Speter 160390285Sobrien#define REGNO_OK_FOR_INDEX_P(REGNO) \ 160490285Sobrien ((REGNO) < STACK_POINTER_REGNUM \ 1605237021Spfg || (REGNO >= FIRST_REX_INT_REG \ 1606237021Spfg && (REGNO) <= LAST_REX_INT_REG) \ 1607237021Spfg || ((unsigned) reg_renumber[(REGNO)] >= FIRST_REX_INT_REG \ 1608237021Spfg && (unsigned) reg_renumber[(REGNO)] <= LAST_REX_INT_REG) \ 1609237021Spfg || (unsigned) reg_renumber[(REGNO)] < STACK_POINTER_REGNUM) 161018334Speter 161190285Sobrien#define REGNO_OK_FOR_BASE_P(REGNO) \ 1612237021Spfg ((REGNO) <= STACK_POINTER_REGNUM \ 161390285Sobrien || (REGNO) == ARG_POINTER_REGNUM \ 161490285Sobrien || (REGNO) == FRAME_POINTER_REGNUM \ 1615237021Spfg || (REGNO >= FIRST_REX_INT_REG \ 1616237021Spfg && (REGNO) <= LAST_REX_INT_REG) \ 1617237021Spfg || ((unsigned) reg_renumber[(REGNO)] >= FIRST_REX_INT_REG \ 1618237021Spfg && (unsigned) reg_renumber[(REGNO)] <= LAST_REX_INT_REG) \ 1619237021Spfg || (unsigned) reg_renumber[(REGNO)] <= STACK_POINTER_REGNUM) 162018334Speter 162190285Sobrien#define REGNO_OK_FOR_SIREG_P(REGNO) \ 162290285Sobrien ((REGNO) == 4 || reg_renumber[(REGNO)] == 4) 162390285Sobrien#define REGNO_OK_FOR_DIREG_P(REGNO) \ 162490285Sobrien ((REGNO) == 5 || reg_renumber[(REGNO)] == 5) 162518334Speter 162618334Speter/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 162718334Speter and check its validity for a certain class. 162818334Speter We have two alternate definitions for each of them. 162918334Speter The usual definition accepts all pseudo regs; the other rejects 163018334Speter them unless they have been allocated suitable hard regs. 163118334Speter The symbol REG_OK_STRICT causes the latter definition to be used. 163218334Speter 163318334Speter Most source files want to accept pseudo regs in the hope that 163418334Speter they will get allocated to the class that the insn wants them to be in. 163518334Speter Source files for reload pass need to be strict. 163618334Speter After reload, it makes no difference, since pseudo regs have 163718334Speter been eliminated by then. */ 163818334Speter 163918334Speter 1640169706Skan/* Non strict versions, pseudos are ok. */ 164118334Speter#define REG_OK_FOR_INDEX_NONSTRICT_P(X) \ 164218334Speter (REGNO (X) < STACK_POINTER_REGNUM \ 1643237021Spfg || (REGNO (X) >= FIRST_REX_INT_REG \ 1644237021Spfg && REGNO (X) <= LAST_REX_INT_REG) \ 164518334Speter || REGNO (X) >= FIRST_PSEUDO_REGISTER) 164618334Speter 164718334Speter#define REG_OK_FOR_BASE_NONSTRICT_P(X) \ 1648237021Spfg (REGNO (X) <= STACK_POINTER_REGNUM \ 164918334Speter || REGNO (X) == ARG_POINTER_REGNUM \ 165090285Sobrien || REGNO (X) == FRAME_POINTER_REGNUM \ 1651237021Spfg || (REGNO (X) >= FIRST_REX_INT_REG \ 1652237021Spfg && REGNO (X) <= LAST_REX_INT_REG) \ 165318334Speter || REGNO (X) >= FIRST_PSEUDO_REGISTER) 165418334Speter 165518334Speter/* Strict versions, hard registers only */ 165618334Speter#define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 165718334Speter#define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 165818334Speter 165918334Speter#ifndef REG_OK_STRICT 166090285Sobrien#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X) 166190285Sobrien#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P (X) 166218334Speter 166318334Speter#else 166490285Sobrien#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P (X) 166590285Sobrien#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X) 166618334Speter#endif 166718334Speter 166818334Speter/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 166918334Speter that is a valid memory address for an instruction. 167018334Speter The MODE argument is the machine mode for the MEM expression 167118334Speter that wants to use this address. 167218334Speter 167318334Speter The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, 167418334Speter except for CONSTANT_ADDRESS_P which is usually machine-independent. 167518334Speter 167618334Speter See legitimize_pic_address in i386.c for details as to what 167718334Speter constitutes a legitimate address when -fpic is used. */ 167818334Speter 167918334Speter#define MAX_REGS_PER_ADDRESS 2 168018334Speter 1681117407Skan#define CONSTANT_ADDRESS_P(X) constant_address_p (X) 168218334Speter 168318334Speter/* Nonzero if the constant value X is a legitimate general operand. 168418334Speter It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 168518334Speter 1686117407Skan#define LEGITIMATE_CONSTANT_P(X) legitimate_constant_p (X) 168718334Speter 168818334Speter#ifdef REG_OK_STRICT 168918334Speter#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 169090285Sobriendo { \ 169190285Sobrien if (legitimate_address_p ((MODE), (X), 1)) \ 169218334Speter goto ADDR; \ 169390285Sobrien} while (0) 169418334Speter 169518334Speter#else 169618334Speter#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 169790285Sobriendo { \ 169890285Sobrien if (legitimate_address_p ((MODE), (X), 0)) \ 169918334Speter goto ADDR; \ 170090285Sobrien} while (0) 170118334Speter 170218334Speter#endif 170318334Speter 170490285Sobrien/* If defined, a C expression to determine the base term of address X. 170590285Sobrien This macro is used in only one place: `find_base_term' in alias.c. 170690285Sobrien 170790285Sobrien It is always safe for this macro to not be defined. It exists so 170890285Sobrien that alias analysis can understand machine-dependent addresses. 170990285Sobrien 171090285Sobrien The typical use of this macro is to handle addresses containing 171190285Sobrien a label_ref or symbol_ref within an UNSPEC. */ 171290285Sobrien 171390285Sobrien#define FIND_BASE_TERM(X) ix86_find_base_term (X) 171490285Sobrien 171518334Speter/* Try machine-dependent ways of modifying an illegitimate address 171618334Speter to be legitimate. If we find one, return the new, valid address. 171718334Speter This macro is used in only one place: `memory_address' in explow.c. 171818334Speter 171918334Speter OLDX is the address as it was before break_out_memory_refs was called. 172018334Speter In some cases it is useful to look at this to decide what needs to be done. 172118334Speter 172218334Speter MODE and WIN are passed so that this macro can use 172318334Speter GO_IF_LEGITIMATE_ADDRESS. 172418334Speter 172518334Speter It is always safe for this macro to do nothing. It exists to recognize 172618334Speter opportunities to optimize the output. 172718334Speter 172818334Speter For the 80386, we handle X+REG by loading X into a register R and 172918334Speter using R+REG. R will go in a general reg and indexing will be used. 173018334Speter However, if REG is a broken-out memory address or multiplication, 173118334Speter nothing needs to be done because REG can certainly go in a general reg. 173218334Speter 173318334Speter When -fpic is used, special handling is needed for symbolic references. 173418334Speter See comments by legitimize_pic_address in i386.c for details. */ 173518334Speter 173618334Speter#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ 173790285Sobriendo { \ 173890285Sobrien (X) = legitimize_address ((X), (OLDX), (MODE)); \ 173990285Sobrien if (memory_address_p ((MODE), (X))) \ 174018334Speter goto WIN; \ 174190285Sobrien} while (0) 174218334Speter 174390285Sobrien#define REWRITE_ADDRESS(X) rewrite_address (X) 174450654Sobrien 174518334Speter/* Nonzero if the constant value X is a legitimate general operand 1746117407Skan when generating PIC code. It is given that flag_pic is on and 174718334Speter that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 174818334Speter 1749117407Skan#define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X) 175018334Speter 175118334Speter#define SYMBOLIC_CONST(X) \ 175290285Sobrien (GET_CODE (X) == SYMBOL_REF \ 175390285Sobrien || GET_CODE (X) == LABEL_REF \ 175490285Sobrien || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X))) 175518334Speter 175618334Speter/* Go to LABEL if ADDR (a legitimate address expression) 175718334Speter has an effect that depends on the machine mode it is used for. 175818334Speter On the 80386, only postdecrement and postincrement address depend thus 175918334Speter (the amount of decrement or increment being the length of the operand). */ 176090285Sobrien#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ 176190285Sobriendo { \ 176290285Sobrien if (GET_CODE (ADDR) == POST_INC \ 176390285Sobrien || GET_CODE (ADDR) == POST_DEC) \ 176490285Sobrien goto LABEL; \ 176590285Sobrien} while (0) 176618334Speter 176718334Speter/* Max number of args passed in registers. If this is more than 3, we will 176818334Speter have problems with ebx (register #4), since it is a caller save register and 176918334Speter is also used as the pic register in ELF. So for now, don't allow more than 177018334Speter 3 registers to be passed in registers. */ 177118334Speter 177290285Sobrien#define REGPARM_MAX (TARGET_64BIT ? 6 : 3) 177318334Speter 1774132744Skan#define SSE_REGPARM_MAX (TARGET_64BIT ? 8 : (TARGET_SSE ? 3 : 0)) 177590285Sobrien 1776132744Skan#define MMX_REGPARM_MAX (TARGET_64BIT ? 0 : (TARGET_MMX ? 3 : 0)) 1777132744Skan 177818334Speter 177918334Speter/* Specify the machine mode that this machine uses 178018334Speter for the index in the tablejump instruction. */ 178190285Sobrien#define CASE_VECTOR_MODE (!TARGET_64BIT || flag_pic ? SImode : DImode) 178218334Speter 178318334Speter/* Define this as 1 if `char' should by default be signed; else as 0. */ 178418334Speter#define DEFAULT_SIGNED_CHAR 1 178518334Speter 178690285Sobrien/* Number of bytes moved into a data cache for a single prefetch operation. */ 178790285Sobrien#define PREFETCH_BLOCK ix86_cost->prefetch_block 178890285Sobrien 178990285Sobrien/* Number of prefetch operations that can be done in parallel. */ 179090285Sobrien#define SIMULTANEOUS_PREFETCHES ix86_cost->simultaneous_prefetches 179190285Sobrien 179218334Speter/* Max number of bytes we can move from memory to memory 179318334Speter in one reasonably fast instruction. */ 179490285Sobrien#define MOVE_MAX 16 179518334Speter 179690285Sobrien/* MOVE_MAX_PIECES is the number of bytes at a time which we can 179790285Sobrien move efficiently, as opposed to MOVE_MAX which is the maximum 179890285Sobrien number of bytes we can move with a single instruction. */ 179990285Sobrien#define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4) 180090285Sobrien 180152295Sobrien/* If a memory-to-memory move would take MOVE_RATIO or more simple 1802169706Skan move-instruction pairs, we will do a movmem or libcall instead. 180352295Sobrien Increasing the value will always make code faster, but eventually 180452295Sobrien incurs high cost in increased code size. 180518334Speter 180690285Sobrien If you don't define this, a reasonable default is used. */ 180718334Speter 180890285Sobrien#define MOVE_RATIO (optimize_size ? 3 : ix86_cost->move_ratio) 180918334Speter 1810169706Skan/* If a clear memory operation would take CLEAR_RATIO or more simple 1811169706Skan move-instruction sequences, we will do a clrmem or libcall instead. */ 1812169706Skan 1813169706Skan#define CLEAR_RATIO (optimize_size ? 2 \ 1814169706Skan : ix86_cost->move_ratio > 6 ? 6 : ix86_cost->move_ratio) 1815169706Skan 181618334Speter/* Define if shifts truncate the shift count 181718334Speter which implies one can omit a sign-extension or zero-extension 181818334Speter of a shift count. */ 181990285Sobrien/* On i386, shifts do truncate the count. But bit opcodes don't. */ 182018334Speter 182118334Speter/* #define SHIFT_COUNT_TRUNCATED */ 182218334Speter 182318334Speter/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 182418334Speter is done just by pretending it is already truncated. */ 182518334Speter#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 182618334Speter 182790285Sobrien/* A macro to update M and UNSIGNEDP when an object whose type is 182890285Sobrien TYPE and which has the specified mode and signedness is to be 182990285Sobrien stored in a register. This macro is only called when TYPE is a 183090285Sobrien scalar type. 183190285Sobrien 183290285Sobrien On i386 it is sometimes useful to promote HImode and QImode 183390285Sobrien quantities to SImode. The choice depends on target type. */ 183490285Sobrien 183590285Sobrien#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ 183690285Sobriendo { \ 183790285Sobrien if (((MODE) == HImode && TARGET_PROMOTE_HI_REGS) \ 183890285Sobrien || ((MODE) == QImode && TARGET_PROMOTE_QI_REGS)) \ 183990285Sobrien (MODE) = SImode; \ 184090285Sobrien} while (0) 184190285Sobrien 184218334Speter/* Specify the machine mode that pointers have. 184318334Speter After generation of rtl, the compiler makes no further distinction 184418334Speter between pointers and any other objects of this machine mode. */ 184590285Sobrien#define Pmode (TARGET_64BIT ? DImode : SImode) 184618334Speter 184718334Speter/* A function address in a call instruction 184818334Speter is a byte address (for indexing purposes) 184918334Speter so give the MEM rtx a byte's mode. */ 185018334Speter#define FUNCTION_MODE QImode 185150654Sobrien 185290285Sobrien/* A C expression for the cost of moving data from a register in class FROM to 185390285Sobrien one in class TO. The classes are expressed using the enumeration values 185490285Sobrien such as `GENERAL_REGS'. A value of 2 is the default; other values are 185590285Sobrien interpreted relative to that. 185650654Sobrien 185790285Sobrien It is not required that the cost always equal 2 when FROM is the same as TO; 185890285Sobrien on some machines it is expensive to move between registers if they are not 185990285Sobrien general registers. */ 186050654Sobrien 186190285Sobrien#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ 186290285Sobrien ix86_register_move_cost ((MODE), (CLASS1), (CLASS2)) 186350654Sobrien 186450654Sobrien/* A C expression for the cost of moving data of mode M between a 186550654Sobrien register and memory. A value of 2 is the default; this cost is 186650654Sobrien relative to those in `REGISTER_MOVE_COST'. 186750654Sobrien 186850654Sobrien If moving between registers and memory is more expensive than 186950654Sobrien between two registers, you should define this macro to express the 187050654Sobrien relative cost. */ 187150654Sobrien 187290285Sobrien#define MEMORY_MOVE_COST(MODE, CLASS, IN) \ 187390285Sobrien ix86_memory_move_cost ((MODE), (CLASS), (IN)) 187450654Sobrien 187550654Sobrien/* A C expression for the cost of a branch instruction. A value of 1 187650654Sobrien is the default; other values are interpreted relative to that. */ 187750654Sobrien 187890285Sobrien#define BRANCH_COST ix86_branch_cost 187950654Sobrien 188050654Sobrien/* Define this macro as a C expression which is nonzero if accessing 188150654Sobrien less than a word of memory (i.e. a `char' or a `short') is no 188250654Sobrien faster than accessing a word of memory, i.e., if such access 188350654Sobrien require more than one instruction or if there is no difference in 188450654Sobrien cost between byte and (aligned) word loads. 188550654Sobrien 188650654Sobrien When this macro is not defined, the compiler will access a field by 188750654Sobrien finding the smallest containing object; when it is defined, a 188850654Sobrien fullword load will be used if alignment permits. Unless bytes 188950654Sobrien accesses are faster than word accesses, using word accesses is 189050654Sobrien preferable since it may eliminate subsequent memory access if 189150654Sobrien subsequent accesses occur to other fields in the same word of the 189250654Sobrien structure, but to different bytes. */ 189350654Sobrien 189450654Sobrien#define SLOW_BYTE_ACCESS 0 189550654Sobrien 189650654Sobrien/* Nonzero if access to memory by shorts is slow and undesirable. */ 189750654Sobrien#define SLOW_SHORT_ACCESS 0 189850654Sobrien 189950654Sobrien/* Define this macro to be the value 1 if unaligned accesses have a 190050654Sobrien cost many times greater than aligned accesses, for example if they 190150654Sobrien are emulated in a trap handler. 190250654Sobrien 1903117407Skan When this macro is nonzero, the compiler will act as if 1904117407Skan `STRICT_ALIGNMENT' were nonzero when generating code for block 190550654Sobrien moves. This can cause significantly more instructions to be 1906117407Skan produced. Therefore, do not set this macro nonzero if unaligned 190750654Sobrien accesses only add a cycle or two to the time for a memory access. 190850654Sobrien 190950654Sobrien If the value of this macro is always zero, it need not be defined. */ 191050654Sobrien 191190285Sobrien/* #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 0 */ 191250654Sobrien 191350654Sobrien/* Define this macro if it is as good or better to call a constant 191450654Sobrien function address than to call an address kept in a register. 191550654Sobrien 191650654Sobrien Desirable on the 386 because a CALL with a constant address is 191750654Sobrien faster than one with a register address. */ 191850654Sobrien 191950654Sobrien#define NO_FUNCTION_CSE 192090285Sobrien 192118334Speter/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, 192218334Speter return the mode to be used for the comparison. 192318334Speter 192418334Speter For floating-point equality comparisons, CCFPEQmode should be used. 192590285Sobrien VOIDmode should be used in all other cases. 192618334Speter 192790285Sobrien For integer comparisons against zero, reduce to CCNOmode or CCZmode if 192890285Sobrien possible, to allow for more combinations. */ 192918334Speter 193090285Sobrien#define SELECT_CC_MODE(OP, X, Y) ix86_cc_mode ((OP), (X), (Y)) 193118334Speter 1932117407Skan/* Return nonzero if MODE implies a floating point inequality can be 193390285Sobrien reversed. */ 193418334Speter 193590285Sobrien#define REVERSIBLE_CC_MODE(MODE) 1 193618334Speter 193790285Sobrien/* A C expression whose value is reversed condition code of the CODE for 193890285Sobrien comparison done in CC_MODE mode. */ 1939169706Skan#define REVERSE_CONDITION(CODE, MODE) ix86_reverse_condition ((CODE), (MODE)) 194018334Speter 194118334Speter 194218334Speter/* Control the assembler format that we output, to the extent 194318334Speter this does not vary between assemblers. */ 194418334Speter 194518334Speter/* How to refer to registers in assembler output. 194690285Sobrien This sequence is indexed by compiler's hard-register-number (see above). */ 194718334Speter 1948169706Skan/* In order to refer to the first 8 regs as 32 bit regs, prefix an "e". 194918334Speter For non floating point regs, the following are the HImode names. 195018334Speter 195118334Speter For float regs, the stack top is sometimes referred to as "%st(0)" 1952132744Skan instead of just "%st". PRINT_OPERAND handles this with the "y" code. */ 195318334Speter 195490285Sobrien#define HI_REGISTER_NAMES \ 195590285Sobrien{"ax","dx","cx","bx","si","di","bp","sp", \ 1956132744Skan "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)", \ 1957237021Spfg "argp", "flags", "fpsr", "dirflag", "frame", \ 195890285Sobrien "xmm0","xmm1","xmm2","xmm3","xmm4","xmm5","xmm6","xmm7", \ 1959237021Spfg "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7" , \ 196090285Sobrien "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ 196190285Sobrien "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"} 196218334Speter 196318334Speter#define REGISTER_NAMES HI_REGISTER_NAMES 196418334Speter 196518334Speter/* Table of additional register names to use in user input. */ 196618334Speter 196718334Speter#define ADDITIONAL_REGISTER_NAMES \ 196850654Sobrien{ { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \ 196950654Sobrien { "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \ 197090285Sobrien { "rax", 0 }, { "rdx", 1 }, { "rcx", 2 }, { "rbx", 3 }, \ 197190285Sobrien { "rsi", 4 }, { "rdi", 5 }, { "rbp", 6 }, { "rsp", 7 }, \ 197250654Sobrien { "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 }, \ 1973169706Skan { "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 } } 197418334Speter 197518334Speter/* Note we are omitting these since currently I don't know how 197618334Speterto get gcc to use these, since they want the same but different 197718334Speternumber as al, and ax. 197818334Speter*/ 197918334Speter 198018334Speter#define QI_REGISTER_NAMES \ 198190285Sobrien{"al", "dl", "cl", "bl", "sil", "dil", "bpl", "spl",} 198218334Speter 198318334Speter/* These parallel the array above, and can be used to access bits 8:15 198490285Sobrien of regs 0 through 3. */ 198518334Speter 198618334Speter#define QI_HIGH_REGISTER_NAMES \ 198718334Speter{"ah", "dh", "ch", "bh", } 198818334Speter 198918334Speter/* How to renumber registers for dbx and gdb. */ 199018334Speter 199190285Sobrien#define DBX_REGISTER_NUMBER(N) \ 199290285Sobrien (TARGET_64BIT ? dbx64_register_map[(N)] : dbx_register_map[(N)]) 199318334Speter 199490285Sobrienextern int const dbx_register_map[FIRST_PSEUDO_REGISTER]; 199590285Sobrienextern int const dbx64_register_map[FIRST_PSEUDO_REGISTER]; 199690285Sobrienextern int const svr4_dbx_register_map[FIRST_PSEUDO_REGISTER]; 199790285Sobrien 199850654Sobrien/* Before the prologue, RA is at 0(%esp). */ 199950654Sobrien#define INCOMING_RETURN_ADDR_RTX \ 200050654Sobrien gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM)) 2001117407Skan 200250654Sobrien/* After the prologue, RA is at -4(AP) in the current frame. */ 200390285Sobrien#define RETURN_ADDR_RTX(COUNT, FRAME) \ 200490285Sobrien ((COUNT) == 0 \ 200590285Sobrien ? gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -UNITS_PER_WORD)) \ 200690285Sobrien : gen_rtx_MEM (Pmode, plus_constant (FRAME, UNITS_PER_WORD))) 200750654Sobrien 200890285Sobrien/* PC is dbx register 8; let's use that column for RA. */ 200990285Sobrien#define DWARF_FRAME_RETURN_COLUMN (TARGET_64BIT ? 16 : 8) 201050654Sobrien 201150654Sobrien/* Before the prologue, the top of the frame is at 4(%esp). */ 201290285Sobrien#define INCOMING_FRAME_SP_OFFSET UNITS_PER_WORD 201350654Sobrien 201490285Sobrien/* Describe how we implement __builtin_eh_return. */ 201590285Sobrien#define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? (N) : INVALID_REGNUM) 201690285Sobrien#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 2) 201718334Speter 201818334Speter 201990285Sobrien/* Select a format to encode pointers in exception handling data. CODE 202090285Sobrien is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is 202190285Sobrien true if the symbol may be affected by dynamic relocations. 202218334Speter 202390285Sobrien ??? All x86 object file formats are capable of representing this. 202490285Sobrien After all, the relocation needed is the same as for the call insn. 202590285Sobrien Whether or not a particular assembler allows us to enter such, I 202690285Sobrien guess we'll have to see. */ 202790285Sobrien#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \ 2028169706Skan asm_preferred_eh_data_format ((CODE), (GLOBAL)) 202918334Speter 203018334Speter/* This is how to output an insn to push a register on the stack. 203118334Speter It need not be very fast code. */ 203218334Speter 203390285Sobrien#define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \ 2034107598Sobriendo { \ 2035107598Sobrien if (TARGET_64BIT) \ 2036107598Sobrien asm_fprintf ((FILE), "\tpush{q}\t%%r%s\n", \ 2037107598Sobrien reg_names[(REGNO)] + (REX_INT_REGNO_P (REGNO) != 0)); \ 2038107598Sobrien else \ 2039107598Sobrien asm_fprintf ((FILE), "\tpush{l}\t%%e%s\n", reg_names[(REGNO)]); \ 2040107598Sobrien} while (0) 204118334Speter 204218334Speter/* This is how to output an insn to pop a register from the stack. 204318334Speter It need not be very fast code. */ 204418334Speter 204590285Sobrien#define ASM_OUTPUT_REG_POP(FILE, REGNO) \ 2046107598Sobriendo { \ 2047107598Sobrien if (TARGET_64BIT) \ 2048107598Sobrien asm_fprintf ((FILE), "\tpop{q}\t%%r%s\n", \ 2049107598Sobrien reg_names[(REGNO)] + (REX_INT_REGNO_P (REGNO) != 0)); \ 2050107598Sobrien else \ 2051107598Sobrien asm_fprintf ((FILE), "\tpop{l}\t%%e%s\n", reg_names[(REGNO)]); \ 2052107598Sobrien} while (0) 205318334Speter 205490285Sobrien/* This is how to output an element of a case-vector that is absolute. */ 205518334Speter 205618334Speter#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 205790285Sobrien ix86_output_addr_vec_elt ((FILE), (VALUE)) 205818334Speter 205990285Sobrien/* This is how to output an element of a case-vector that is relative. */ 206018334Speter 206150654Sobrien#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 206290285Sobrien ix86_output_addr_diff_elt ((FILE), (VALUE), (REL)) 206318334Speter 2064169706Skan/* Under some conditions we need jump tables in the text section, 2065169706Skan because the assembler cannot handle label differences between 2066169706Skan sections. This is the case for x86_64 on Mach-O for example. */ 206718334Speter 206890285Sobrien#define JUMP_TABLES_IN_TEXT_SECTION \ 2069169706Skan (flag_pic && ((TARGET_MACHO && TARGET_64BIT) \ 2070169706Skan || (!TARGET_64BIT && !HAVE_AS_GOTOFF_IN_DATA))) 207118334Speter 207290285Sobrien/* Switch to init or fini section via SECTION_OP, emit a call to FUNC, 207390285Sobrien and switch back. For x86 we do this only to save a few bytes that 207490285Sobrien would otherwise be unused in the text section. */ 207590285Sobrien#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \ 207690285Sobrien asm (SECTION_OP "\n\t" \ 207790285Sobrien "call " USER_LABEL_PREFIX #FUNC "\n" \ 207890285Sobrien TEXT_SECTION_ASM_OP); 207918334Speter 208018334Speter/* Print operand X (an rtx) in assembler syntax to file FILE. 208118334Speter CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 208290285Sobrien Effect of various CODE letters is described in i386.c near 208390285Sobrien print_operand function. */ 208418334Speter 208590285Sobrien#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 2086117407Skan ((CODE) == '*' || (CODE) == '+' || (CODE) == '&') 208718334Speter 208818334Speter#define PRINT_OPERAND(FILE, X, CODE) \ 208990285Sobrien print_operand ((FILE), (X), (CODE)) 209018334Speter 209118334Speter#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 209290285Sobrien print_operand_address ((FILE), (ADDR)) 209318334Speter 2094117407Skan#define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL) \ 2095117407Skando { \ 2096117407Skan if (! output_addr_const_extra (FILE, (X))) \ 2097117407Skan goto FAIL; \ 2098117407Skan} while (0); 2099117407Skan 210018334Speter/* a letter which is not needed by the normal asm syntax, which 210118334Speter we can use for operand syntax in the extended asm */ 210218334Speter 210318334Speter#define ASM_OPERAND_LETTER '#' 210418334Speter#define RET return "" 210590285Sobrien#define AT_SP(MODE) (gen_rtx_MEM ((MODE), stack_pointer_rtx)) 210618334Speter 2107117407Skan/* Which processor to schedule for. The cpu attribute defines a list that 2108117407Skan mirrors this list, so changes to i386.md must be made at the same time. */ 2109117407Skan 2110117407Skanenum processor_type 2111117407Skan{ 2112117407Skan PROCESSOR_I386, /* 80386 */ 2113117407Skan PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */ 2114117407Skan PROCESSOR_PENTIUM, 2115117407Skan PROCESSOR_PENTIUMPRO, 2116219374Smm PROCESSOR_GEODE, 2117117407Skan PROCESSOR_K6, 2118117407Skan PROCESSOR_ATHLON, 2119117407Skan PROCESSOR_PENTIUM4, 2120132744Skan PROCESSOR_K8, 2121169706Skan PROCESSOR_NOCONA, 2122219374Smm PROCESSOR_CORE2, 2123169706Skan PROCESSOR_GENERIC32, 2124169706Skan PROCESSOR_GENERIC64, 2125251212Spfg PROCESSOR_AMDFAM10, 2126117407Skan PROCESSOR_max 2127117407Skan}; 2128117407Skan 2129132744Skanextern enum processor_type ix86_tune; 2130117407Skanextern enum processor_type ix86_arch; 2131117407Skan 2132117407Skanenum fpmath_unit 2133117407Skan{ 2134117407Skan FPMATH_387 = 1, 2135117407Skan FPMATH_SSE = 2 2136117407Skan}; 2137117407Skan 2138117407Skanextern enum fpmath_unit ix86_fpmath; 2139117407Skan 2140117407Skanenum tls_dialect 2141117407Skan{ 2142117407Skan TLS_DIALECT_GNU, 2143169706Skan TLS_DIALECT_GNU2, 2144117407Skan TLS_DIALECT_SUN 2145117407Skan}; 2146117407Skan 2147117407Skanextern enum tls_dialect ix86_tls_dialect; 2148117407Skan 214990285Sobrienenum cmodel { 2150117407Skan CM_32, /* The traditional 32-bit ABI. */ 2151117407Skan CM_SMALL, /* Assumes all code and data fits in the low 31 bits. */ 2152117407Skan CM_KERNEL, /* Assumes all code and data fits in the high 31 bits. */ 2153117407Skan CM_MEDIUM, /* Assumes code fits in the low 31 bits; data unlimited. */ 2154117407Skan CM_LARGE, /* No assumptions. */ 2155169706Skan CM_SMALL_PIC, /* Assumes code+data+got/plt fits in a 31 bit region. */ 2156169706Skan CM_MEDIUM_PIC /* Assumes code+got/plt fits in a 31 bit region. */ 215790285Sobrien}; 215818334Speter 2159117407Skanextern enum cmodel ix86_cmodel; 2160117407Skan 216190285Sobrien/* Size of the RED_ZONE area. */ 216290285Sobrien#define RED_ZONE_SIZE 128 216390285Sobrien/* Reserved area of the red zone for temporaries. */ 216490285Sobrien#define RED_ZONE_RESERVE 8 216550654Sobrien 216690285Sobrienenum asm_dialect { 216790285Sobrien ASM_ATT, 216890285Sobrien ASM_INTEL 216990285Sobrien}; 2170117407Skan 217190285Sobrienextern enum asm_dialect ix86_asm_dialect; 2172169706Skanextern unsigned int ix86_preferred_stack_boundary; 2173169706Skanextern int ix86_branch_cost, ix86_section_threshold; 2174117407Skan 2175117407Skan/* Smallest class containing REGNO. */ 2176117407Skanextern enum reg_class const regclass_map[FIRST_PSEUDO_REGISTER]; 2177117407Skan 217890285Sobrienextern rtx ix86_compare_op0; /* operand 0 for comparisons */ 217990285Sobrienextern rtx ix86_compare_op1; /* operand 1 for comparisons */ 2180169706Skanextern rtx ix86_compare_emitted; 218190285Sobrien 218290285Sobrien/* To properly truncate FP values into integers, we need to set i387 control 218390285Sobrien word. We can't emit proper mode switching code before reload, as spills 218490285Sobrien generated by reload may truncate values incorrectly, but we still can avoid 218590285Sobrien redundant computation of new control word by the mode switching pass. 218690285Sobrien The fldcw instructions are still emitted redundantly, but this is probably 218790285Sobrien not going to be noticeable problem, as most CPUs do have fast path for 2188117407Skan the sequence. 218918334Speter 219090285Sobrien The machinery is to emit simple truncation instructions and split them 219190285Sobrien before reload to instructions having USEs of two memory locations that 219290285Sobrien are filled by this code to old and new control word. 2193117407Skan 219490285Sobrien Post-reload pass may be later used to eliminate the redundant fildcw if 219590285Sobrien needed. */ 219618334Speter 2197169706Skanenum ix86_entity 2198169706Skan{ 2199169706Skan I387_TRUNC = 0, 2200169706Skan I387_FLOOR, 2201169706Skan I387_CEIL, 2202169706Skan I387_MASK_PM, 2203169706Skan MAX_386_ENTITIES 2204169706Skan}; 220550654Sobrien 2206169706Skanenum ix86_stack_slot 2207169706Skan{ 2208171836Skan SLOT_VIRTUAL = 0, 2209171836Skan SLOT_TEMP, 2210169706Skan SLOT_CW_STORED, 2211169706Skan SLOT_CW_TRUNC, 2212169706Skan SLOT_CW_FLOOR, 2213169706Skan SLOT_CW_CEIL, 2214169706Skan SLOT_CW_MASK_PM, 2215169706Skan MAX_386_STACK_LOCALS 2216169706Skan}; 2217169706Skan 221890285Sobrien/* Define this macro if the port needs extra instructions inserted 221990285Sobrien for mode switching in an optimizing compilation. */ 222090285Sobrien 2221169706Skan#define OPTIMIZE_MODE_SWITCHING(ENTITY) \ 2222169706Skan ix86_optimize_mode_switching[(ENTITY)] 222390285Sobrien 222490285Sobrien/* If you define `OPTIMIZE_MODE_SWITCHING', you have to define this as 222590285Sobrien initializer for an array of integers. Each initializer element N 222690285Sobrien refers to an entity that needs mode switching, and specifies the 222790285Sobrien number of different modes that might need to be set for this 222890285Sobrien entity. The position of the initializer in the initializer - 222990285Sobrien starting counting at zero - determines the integer that is used to 223090285Sobrien refer to the mode-switched entity in question. */ 223190285Sobrien 2232169706Skan#define NUM_MODES_FOR_MODE_SWITCHING \ 2233169706Skan { I387_CW_ANY, I387_CW_ANY, I387_CW_ANY, I387_CW_ANY } 223490285Sobrien 223590285Sobrien/* ENTITY is an integer specifying a mode-switched entity. If 223690285Sobrien `OPTIMIZE_MODE_SWITCHING' is defined, you must define this macro to 223790285Sobrien return an integer value not larger than the corresponding element 223890285Sobrien in `NUM_MODES_FOR_MODE_SWITCHING', to denote the mode that ENTITY 2239169706Skan must be switched into prior to the execution of INSN. */ 224090285Sobrien 2241169706Skan#define MODE_NEEDED(ENTITY, I) ix86_mode_needed ((ENTITY), (I)) 224290285Sobrien 224390285Sobrien/* This macro specifies the order in which modes for ENTITY are 224490285Sobrien processed. 0 is the highest priority. */ 224590285Sobrien 224690285Sobrien#define MODE_PRIORITY_TO_MODE(ENTITY, N) (N) 224790285Sobrien 224890285Sobrien/* Generate one or more insns to set ENTITY to MODE. HARD_REG_LIVE 224990285Sobrien is the set of hard registers live at the point where the insn(s) 225090285Sobrien are to be inserted. */ 225190285Sobrien 225290285Sobrien#define EMIT_MODE_SET(ENTITY, MODE, HARD_REGS_LIVE) \ 2253169706Skan ((MODE) != I387_CW_ANY && (MODE) != I387_CW_UNINITIALIZED \ 2254169706Skan ? emit_i387_cw_initialization (MODE), 0 \ 225590285Sobrien : 0) 2256169706Skan 225718334Speter 225890285Sobrien/* Avoid renaming of stack registers, as doing so in combination with 225990285Sobrien scheduling just increases amount of live registers at time and in 226090285Sobrien the turn amount of fxch instructions needed. 226190285Sobrien 2262132744Skan ??? Maybe Pentium chips benefits from renaming, someone can try.... */ 226390285Sobrien 226490285Sobrien#define HARD_REGNO_RENAME_OK(SRC, TARGET) \ 2265237021Spfg ((SRC) < FIRST_STACK_REG || (SRC) > LAST_STACK_REG) 226690285Sobrien 226790285Sobrien 2268132744Skan#define DLL_IMPORT_EXPORT_PREFIX '#' 2269117407Skan 2270132744Skan#define FASTCALL_PREFIX '@' 2271132744Skan 2272132744Skanstruct machine_function GTY(()) 2273132744Skan{ 2274132744Skan struct stack_local_entry *stack_locals; 2275132744Skan const char *some_ld_name; 2276169706Skan rtx force_align_arg_pointer; 2277132744Skan int save_varrargs_registers; 2278132744Skan int accesses_prev_frame; 2279169706Skan int optimize_mode_switching[MAX_386_ENTITIES]; 2280132744Skan /* Set by ix86_compute_frame_layout and used by prologue/epilogue expander to 2281132744Skan determine the style used. */ 2282132744Skan int use_fast_prologue_epilogue; 2283132744Skan /* Number of saved registers USE_FAST_PROLOGUE_EPILOGUE has been computed 2284132744Skan for. */ 2285132744Skan int use_fast_prologue_epilogue_nregs; 2286169706Skan /* If true, the current function needs the default PIC register, not 2287169706Skan an alternate register (on x86) and must not use the red zone (on 2288169706Skan x86_64), even if it's a leaf function. We don't want the 2289169706Skan function to be regarded as non-leaf because TLS calls need not 2290169706Skan affect register allocation. This flag is set when a TLS call 2291169706Skan instruction is expanded within a function, and never reset, even 2292169706Skan if all such instructions are optimized away. Use the 2293169706Skan ix86_current_function_calls_tls_descriptor macro for a better 2294169706Skan approximation. */ 2295169706Skan int tls_descriptor_call_expanded_p; 2296132744Skan}; 2297117407Skan 2298132744Skan#define ix86_stack_locals (cfun->machine->stack_locals) 2299132744Skan#define ix86_save_varrargs_registers (cfun->machine->save_varrargs_registers) 2300132744Skan#define ix86_optimize_mode_switching (cfun->machine->optimize_mode_switching) 2301169706Skan#define ix86_tls_descriptor_calls_expanded_in_cfun \ 2302169706Skan (cfun->machine->tls_descriptor_call_expanded_p) 2303169706Skan/* Since tls_descriptor_call_expanded is not cleared, even if all TLS 2304169706Skan calls are optimized away, we try to detect cases in which it was 2305169706Skan optimized away. Since such instructions (use (reg REG_SP)), we can 2306169706Skan verify whether there's any such instruction live by testing that 2307169706Skan REG_SP is live. */ 2308169706Skan#define ix86_current_function_calls_tls_descriptor \ 2309169706Skan (ix86_tls_descriptor_calls_expanded_in_cfun && regs_ever_live[SP_REG]) 2310132744Skan 2311132744Skan/* Control behavior of x86_file_start. */ 2312132744Skan#define X86_FILE_START_VERSION_DIRECTIVE false 2313132744Skan#define X86_FILE_START_FLTUSED false 2314132744Skan 2315169706Skan/* Flag to mark data that is in the large address area. */ 2316169706Skan#define SYMBOL_FLAG_FAR_ADDR (SYMBOL_FLAG_MACH_DEP << 0) 2317169706Skan#define SYMBOL_REF_FAR_ADDR_P(X) \ 2318169706Skan ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_FAR_ADDR) != 0) 231918334Speter/* 232018334SpeterLocal variables: 232118334Speterversion-control: t 232218334SpeterEnd: 232318334Speter*/ 2324