i386.h revision 146908
1132744Skan/* Definitions of target machine for GCC for IA-32. 290285Sobrien Copyright (C) 1988, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 3132744Skan 2001, 2002, 2003, 2004 Free Software Foundation, Inc. 418334Speter 5132744SkanThis file is part of GCC. 618334Speter 7132744SkanGCC is free software; you can redistribute it and/or modify 818334Speterit under the terms of the GNU General Public License as published by 918334Speterthe Free Software Foundation; either version 2, or (at your option) 1018334Speterany later version. 1118334Speter 12132744SkanGCC is distributed in the hope that it will be useful, 1318334Speterbut WITHOUT ANY WARRANTY; without even the implied warranty of 1418334SpeterMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1518334SpeterGNU General Public License for more details. 1618334Speter 1718334SpeterYou should have received a copy of the GNU General Public License 18132744Skanalong with GCC; see the file COPYING. If not, write to 1918334Speterthe Free Software Foundation, 59 Temple Place - Suite 330, 2090285SobrienBoston, MA 02111-1307, USA. */ 2118334Speter 2218334Speter/* The purpose of this file is to define the characteristics of the i386, 2318334Speter independent of assembler syntax or operating system. 2418334Speter 2518334Speter Three other files build on this one to describe a specific assembler syntax: 2618334Speter bsd386.h, att386.h, and sun386.h. 2718334Speter 2818334Speter The actual tm.h file for a particular system should include 2918334Speter this file, and then the file for the appropriate assembler syntax. 3018334Speter 3118334Speter Many macros that specify assembler syntax are omitted entirely from 3218334Speter this file because they really belong in the files for particular 3390285Sobrien assemblers. These include RP, IP, LPREFIX, PUT_OP_SIZE, USE_STAR, 3490285Sobrien ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE, PRINT_B_I_S, and many 3590285Sobrien that start with ASM_ or end in ASM_OP. */ 3618334Speter 3750654Sobrien/* Define the specific costs for a given cpu */ 3850654Sobrien 3950654Sobrienstruct processor_costs { 4090285Sobrien const int add; /* cost of an add instruction */ 4190285Sobrien const int lea; /* cost of a lea instruction */ 4290285Sobrien const int shift_var; /* variable shift costs */ 4390285Sobrien const int shift_const; /* constant shift costs */ 44132744Skan const int mult_init[5]; /* cost of starting a multiply 45132744Skan in QImode, HImode, SImode, DImode, TImode*/ 4690285Sobrien const int mult_bit; /* cost of multiply per each bit set */ 47132744Skan const int divide[5]; /* cost of a divide/mod 48132744Skan in QImode, HImode, SImode, DImode, TImode*/ 4990285Sobrien int movsx; /* The cost of movsx operation. */ 5090285Sobrien int movzx; /* The cost of movzx operation. */ 5190285Sobrien const int large_insn; /* insns larger than this cost more */ 5290285Sobrien const int move_ratio; /* The threshold of number of scalar 5390285Sobrien memory-to-memory move insns. */ 5490285Sobrien const int movzbl_load; /* cost of loading using movzbl */ 5590285Sobrien const int int_load[3]; /* cost of loading integer registers 5690285Sobrien in QImode, HImode and SImode relative 5790285Sobrien to reg-reg move (2). */ 5890285Sobrien const int int_store[3]; /* cost of storing integer register 5990285Sobrien in QImode, HImode and SImode */ 6090285Sobrien const int fp_move; /* cost of reg,reg fld/fst */ 6190285Sobrien const int fp_load[3]; /* cost of loading FP register 6290285Sobrien in SFmode, DFmode and XFmode */ 6390285Sobrien const int fp_store[3]; /* cost of storing FP register 6490285Sobrien in SFmode, DFmode and XFmode */ 6590285Sobrien const int mmx_move; /* cost of moving MMX register. */ 6690285Sobrien const int mmx_load[2]; /* cost of loading MMX register 6790285Sobrien in SImode and DImode */ 6890285Sobrien const int mmx_store[2]; /* cost of storing MMX register 6990285Sobrien in SImode and DImode */ 7090285Sobrien const int sse_move; /* cost of moving SSE register. */ 7190285Sobrien const int sse_load[3]; /* cost of loading SSE register 7290285Sobrien in SImode, DImode and TImode*/ 7390285Sobrien const int sse_store[3]; /* cost of storing SSE register 7490285Sobrien in SImode, DImode and TImode*/ 7590285Sobrien const int mmxsse_to_integer; /* cost of moving mmxsse register to 7690285Sobrien integer and vice versa. */ 7790285Sobrien const int prefetch_block; /* bytes moved to cache for prefetch. */ 7890285Sobrien const int simultaneous_prefetches; /* number of parallel prefetch 7990285Sobrien operations. */ 80132744Skan const int branch_cost; /* Default value for BRANCH_COST. */ 81117407Skan const int fadd; /* cost of FADD and FSUB instructions. */ 82117407Skan const int fmul; /* cost of FMUL instruction. */ 83117407Skan const int fdiv; /* cost of FDIV instruction. */ 84117407Skan const int fabs; /* cost of FABS instruction. */ 85117407Skan const int fchs; /* cost of FCHS instruction. */ 86117407Skan const int fsqrt; /* cost of FSQRT instruction. */ 8750654Sobrien}; 8850654Sobrien 8990285Sobrienextern const struct processor_costs *ix86_cost; 9050654Sobrien 9118334Speter/* Run-time compilation parameters selecting different hardware subsets. */ 9218334Speter 9318334Speterextern int target_flags; 9418334Speter 9518334Speter/* Macros used in the machine description to test the flags. */ 9618334Speter 9718334Speter/* configure can arrange to make this 2, to force a 486. */ 9890285Sobrien 9918334Speter#ifndef TARGET_CPU_DEFAULT 100132744Skan#ifdef TARGET_64BIT_DEFAULT 101132744Skan#define TARGET_CPU_DEFAULT TARGET_CPU_DEFAULT_k8 102132744Skan#else 10318334Speter#define TARGET_CPU_DEFAULT 0 10418334Speter#endif 105132744Skan#endif 10618334Speter 10718334Speter/* Masks for the -m switches */ 10890285Sobrien#define MASK_80387 0x00000001 /* Hardware floating point */ 10990285Sobrien#define MASK_RTD 0x00000002 /* Use ret that pops args */ 11090285Sobrien#define MASK_ALIGN_DOUBLE 0x00000004 /* align doubles to 2 word boundary */ 11190285Sobrien#define MASK_SVR3_SHLIB 0x00000008 /* Uninit locals into bss */ 11290285Sobrien#define MASK_IEEE_FP 0x00000010 /* IEEE fp comparisons */ 11390285Sobrien#define MASK_FLOAT_RETURNS 0x00000020 /* Return float in st(0) */ 11490285Sobrien#define MASK_NO_FANCY_MATH_387 0x00000040 /* Disable sin, cos, sqrt */ 11590285Sobrien#define MASK_OMIT_LEAF_FRAME_POINTER 0x080 /* omit leaf frame pointers */ 11690285Sobrien#define MASK_STACK_PROBE 0x00000100 /* Enable stack probing */ 11790285Sobrien#define MASK_NO_ALIGN_STROPS 0x00000200 /* Enable aligning of string ops. */ 11890285Sobrien#define MASK_INLINE_ALL_STROPS 0x00000400 /* Inline stringops in all cases */ 11990285Sobrien#define MASK_NO_PUSH_ARGS 0x00000800 /* Use push instructions */ 12090285Sobrien#define MASK_ACCUMULATE_OUTGOING_ARGS 0x00001000/* Accumulate outgoing args */ 121117407Skan#define MASK_MMX 0x00002000 /* Support MMX regs/builtins */ 122117407Skan#define MASK_SSE 0x00004000 /* Support SSE regs/builtins */ 123117407Skan#define MASK_SSE2 0x00008000 /* Support SSE2 regs/builtins */ 124132744Skan#define MASK_SSE3 0x00010000 /* Support SSE3 regs/builtins */ 125122193Skan#define MASK_3DNOW 0x00020000 /* Support 3Dnow builtins */ 126122193Skan#define MASK_3DNOW_A 0x00040000 /* Support Athlon 3Dnow builtins */ 127122193Skan#define MASK_128BIT_LONG_DOUBLE 0x00080000 /* long double size is 128bit */ 128122193Skan#define MASK_64BIT 0x00100000 /* Produce 64bit code */ 129132744Skan#define MASK_MS_BITFIELD_LAYOUT 0x00200000 /* Use native (MS) bitfield layout */ 130132744Skan#define MASK_TLS_DIRECT_SEG_REFS 0x00400000 /* Avoid adding %gs:0 */ 131117407Skan 132132744Skan/* Unused: 0x03e0000 */ 133117407Skan 13490285Sobrien/* ... overlap with subtarget options starts by 0x04000000. */ 13590285Sobrien#define MASK_NO_RED_ZONE 0x04000000 /* Do not use red zone */ 13697911Sobrien#define MASK_NO_ALIGN_LONG_STRINGS 0x08000000 /* Do not align long strings specially */ 13718334Speter 13818334Speter/* Use the floating point instructions */ 13918334Speter#define TARGET_80387 (target_flags & MASK_80387) 14018334Speter 14118334Speter/* Compile using ret insn that pops args. 14218334Speter This will not work unless you use prototypes at least 143117407Skan for all functions that can take varying numbers of args. */ 14418334Speter#define TARGET_RTD (target_flags & MASK_RTD) 14518334Speter 14618334Speter/* Align doubles to a two word boundary. This breaks compatibility with 14718334Speter the published ABI's for structures containing doubles, but produces 14818334Speter faster code on the pentium. */ 14918334Speter#define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE) 15018334Speter 15190285Sobrien/* Use push instructions to save outgoing args. */ 15290285Sobrien#define TARGET_PUSH_ARGS (!(target_flags & MASK_NO_PUSH_ARGS)) 15390285Sobrien 15490285Sobrien/* Accumulate stack adjustments to prologue/epilogue. */ 15590285Sobrien#define TARGET_ACCUMULATE_OUTGOING_ARGS \ 15690285Sobrien (target_flags & MASK_ACCUMULATE_OUTGOING_ARGS) 15790285Sobrien 15818334Speter/* Put uninitialized locals into bss, not data. 15918334Speter Meaningful only on svr3. */ 16018334Speter#define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB) 16118334Speter 16218334Speter/* Use IEEE floating point comparisons. These handle correctly the cases 16318334Speter where the result of a comparison is unordered. Normally SIGFPE is 16418334Speter generated in such cases, in which case this isn't needed. */ 16518334Speter#define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP) 16618334Speter 16718334Speter/* Functions that return a floating point value may return that value 16818334Speter in the 387 FPU or in 386 integer registers. If set, this flag causes 16990285Sobrien the 387 to be used, which is compatible with most calling conventions. */ 17018334Speter#define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS) 17118334Speter 17290285Sobrien/* Long double is 128bit instead of 96bit, even when only 80bits are used. 17390285Sobrien This mode wastes cache, but avoid misaligned data accesses and simplifies 17490285Sobrien address calculations. */ 17590285Sobrien#define TARGET_128BIT_LONG_DOUBLE (target_flags & MASK_128BIT_LONG_DOUBLE) 17690285Sobrien 17718334Speter/* Disable generation of FP sin, cos and sqrt operations for 387. 17818334Speter This is because FreeBSD lacks these in the math-emulator-code */ 17918334Speter#define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387) 18018334Speter 18150654Sobrien/* Don't create frame pointers for leaf functions */ 18290285Sobrien#define TARGET_OMIT_LEAF_FRAME_POINTER \ 18390285Sobrien (target_flags & MASK_OMIT_LEAF_FRAME_POINTER) 18450654Sobrien 18518334Speter/* Debug GO_IF_LEGITIMATE_ADDRESS */ 18690285Sobrien#define TARGET_DEBUG_ADDR (ix86_debug_addr_string != 0) 18718334Speter 18818334Speter/* Debug FUNCTION_ARG macros */ 18990285Sobrien#define TARGET_DEBUG_ARG (ix86_debug_arg_string != 0) 19018334Speter 191117407Skan/* 64bit Sledgehammer mode. For libgcc2 we make sure this is a 192117407Skan compile-time constant. */ 193117407Skan#ifdef IN_LIBGCC2 194117407Skan#ifdef __x86_64__ 195117407Skan#define TARGET_64BIT 1 196117407Skan#else 197117407Skan#define TARGET_64BIT 0 198117407Skan#endif 199117407Skan#else 20090285Sobrien#ifdef TARGET_BI_ARCH 20190285Sobrien#define TARGET_64BIT (target_flags & MASK_64BIT) 20290285Sobrien#else 203117407Skan#if TARGET_64BIT_DEFAULT 20490285Sobrien#define TARGET_64BIT 1 20590285Sobrien#else 20690285Sobrien#define TARGET_64BIT 0 20790285Sobrien#endif 20890285Sobrien#endif 209117407Skan#endif 21018334Speter 211132744Skan/* Avoid adding %gs:0 in TLS references; use %gs:address directly. */ 212132744Skan#define TARGET_TLS_DIRECT_SEG_REFS (target_flags & MASK_TLS_DIRECT_SEG_REFS) 21352295Sobrien 214132744Skan#define TARGET_386 (ix86_tune == PROCESSOR_I386) 215132744Skan#define TARGET_486 (ix86_tune == PROCESSOR_I486) 216132744Skan#define TARGET_PENTIUM (ix86_tune == PROCESSOR_PENTIUM) 217132744Skan#define TARGET_PENTIUMPRO (ix86_tune == PROCESSOR_PENTIUMPRO) 218132744Skan#define TARGET_K6 (ix86_tune == PROCESSOR_K6) 219132744Skan#define TARGET_ATHLON (ix86_tune == PROCESSOR_ATHLON) 220132744Skan#define TARGET_PENTIUM4 (ix86_tune == PROCESSOR_PENTIUM4) 221132744Skan#define TARGET_K8 (ix86_tune == PROCESSOR_K8) 222132744Skan#define TARGET_ATHLON_K8 (TARGET_K8 || TARGET_ATHLON) 223132744Skan 224132744Skan#define TUNEMASK (1 << ix86_tune) 22552295Sobrienextern const int x86_use_leave, x86_push_memory, x86_zero_extend_with_and; 22652295Sobrienextern const int x86_use_bit_test, x86_cmove, x86_deep_branch; 22790285Sobrienextern const int x86_branch_hints, x86_unroll_strlen; 22890285Sobrienextern const int x86_double_with_add, x86_partial_reg_stall, x86_movx; 22990285Sobrienextern const int x86_use_loop, x86_use_fiop, x86_use_mov0; 23090285Sobrienextern const int x86_use_cltd, x86_read_modify_write; 23190285Sobrienextern const int x86_read_modify, x86_split_long_moves; 232117407Skanextern const int x86_promote_QImode, x86_single_stringop, x86_fast_prefix; 23390285Sobrienextern const int x86_himode_math, x86_qimode_math, x86_promote_qi_regs; 23490285Sobrienextern const int x86_promote_hi_regs, x86_integer_DFmode_moves; 23590285Sobrienextern const int x86_add_esp_4, x86_add_esp_8, x86_sub_esp_4, x86_sub_esp_8; 23690285Sobrienextern const int x86_partial_reg_dependency, x86_memory_mismatch_stall; 23790285Sobrienextern const int x86_accumulate_outgoing_args, x86_prologue_using_move; 23890285Sobrienextern const int x86_epilogue_using_move, x86_decompose_lea; 239117407Skanextern const int x86_arch_always_fancy_math_387, x86_shift1; 240132744Skanextern const int x86_sse_partial_reg_dependency, x86_sse_partial_regs; 241132744Skanextern const int x86_sse_typeless_stores, x86_sse_load0_by_pxor; 242132744Skanextern const int x86_use_ffreep, x86_sse_partial_regs_for_cvtsd2ss; 243132744Skanextern const int x86_inter_unit_moves; 24490285Sobrienextern int x86_prefetch_sse; 24552295Sobrien 246132744Skan#define TARGET_USE_LEAVE (x86_use_leave & TUNEMASK) 247132744Skan#define TARGET_PUSH_MEMORY (x86_push_memory & TUNEMASK) 248132744Skan#define TARGET_ZERO_EXTEND_WITH_AND (x86_zero_extend_with_and & TUNEMASK) 249132744Skan#define TARGET_USE_BIT_TEST (x86_use_bit_test & TUNEMASK) 250132744Skan#define TARGET_UNROLL_STRLEN (x86_unroll_strlen & TUNEMASK) 25190285Sobrien/* For sane SSE instruction set generation we need fcomi instruction. It is 25290285Sobrien safe to enable all CMOVE instructions. */ 25390285Sobrien#define TARGET_CMOVE ((x86_cmove & (1 << ix86_arch)) || TARGET_SSE) 254132744Skan#define TARGET_DEEP_BRANCH_PREDICTION (x86_deep_branch & TUNEMASK) 255132744Skan#define TARGET_BRANCH_PREDICTION_HINTS (x86_branch_hints & TUNEMASK) 256132744Skan#define TARGET_DOUBLE_WITH_ADD (x86_double_with_add & TUNEMASK) 257132744Skan#define TARGET_USE_SAHF ((x86_use_sahf & TUNEMASK) && !TARGET_64BIT) 258132744Skan#define TARGET_MOVX (x86_movx & TUNEMASK) 259132744Skan#define TARGET_PARTIAL_REG_STALL (x86_partial_reg_stall & TUNEMASK) 260132744Skan#define TARGET_USE_LOOP (x86_use_loop & TUNEMASK) 261132744Skan#define TARGET_USE_FIOP (x86_use_fiop & TUNEMASK) 262132744Skan#define TARGET_USE_MOV0 (x86_use_mov0 & TUNEMASK) 263132744Skan#define TARGET_USE_CLTD (x86_use_cltd & TUNEMASK) 264132744Skan#define TARGET_SPLIT_LONG_MOVES (x86_split_long_moves & TUNEMASK) 265132744Skan#define TARGET_READ_MODIFY_WRITE (x86_read_modify_write & TUNEMASK) 266132744Skan#define TARGET_READ_MODIFY (x86_read_modify & TUNEMASK) 267132744Skan#define TARGET_PROMOTE_QImode (x86_promote_QImode & TUNEMASK) 268132744Skan#define TARGET_FAST_PREFIX (x86_fast_prefix & TUNEMASK) 269132744Skan#define TARGET_SINGLE_STRINGOP (x86_single_stringop & TUNEMASK) 270132744Skan#define TARGET_QIMODE_MATH (x86_qimode_math & TUNEMASK) 271132744Skan#define TARGET_HIMODE_MATH (x86_himode_math & TUNEMASK) 272132744Skan#define TARGET_PROMOTE_QI_REGS (x86_promote_qi_regs & TUNEMASK) 273132744Skan#define TARGET_PROMOTE_HI_REGS (x86_promote_hi_regs & TUNEMASK) 274132744Skan#define TARGET_ADD_ESP_4 (x86_add_esp_4 & TUNEMASK) 275132744Skan#define TARGET_ADD_ESP_8 (x86_add_esp_8 & TUNEMASK) 276132744Skan#define TARGET_SUB_ESP_4 (x86_sub_esp_4 & TUNEMASK) 277132744Skan#define TARGET_SUB_ESP_8 (x86_sub_esp_8 & TUNEMASK) 278132744Skan#define TARGET_INTEGER_DFMODE_MOVES (x86_integer_DFmode_moves & TUNEMASK) 279132744Skan#define TARGET_PARTIAL_REG_DEPENDENCY (x86_partial_reg_dependency & TUNEMASK) 280132744Skan#define TARGET_SSE_PARTIAL_REG_DEPENDENCY \ 281132744Skan (x86_sse_partial_reg_dependency & TUNEMASK) 282132744Skan#define TARGET_SSE_PARTIAL_REGS (x86_sse_partial_regs & TUNEMASK) 283132744Skan#define TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS \ 284132744Skan (x86_sse_partial_regs_for_cvtsd2ss & TUNEMASK) 285132744Skan#define TARGET_SSE_TYPELESS_STORES (x86_sse_typeless_stores & TUNEMASK) 286132744Skan#define TARGET_SSE_TYPELESS_LOAD0 (x86_sse_typeless_load0 & TUNEMASK) 287132744Skan#define TARGET_SSE_LOAD0_BY_PXOR (x86_sse_load0_by_pxor & TUNEMASK) 288132744Skan#define TARGET_MEMORY_MISMATCH_STALL (x86_memory_mismatch_stall & TUNEMASK) 289132744Skan#define TARGET_PROLOGUE_USING_MOVE (x86_prologue_using_move & TUNEMASK) 290132744Skan#define TARGET_EPILOGUE_USING_MOVE (x86_epilogue_using_move & TUNEMASK) 291132744Skan#define TARGET_DECOMPOSE_LEA (x86_decompose_lea & TUNEMASK) 29290285Sobrien#define TARGET_PREFETCH_SSE (x86_prefetch_sse) 293132744Skan#define TARGET_SHIFT1 (x86_shift1 & TUNEMASK) 294132744Skan#define TARGET_USE_FFREEP (x86_use_ffreep & TUNEMASK) 295132744Skan#define TARGET_REP_MOVL_OPTIMAL (x86_rep_movl_optimal & TUNEMASK) 296132744Skan#define TARGET_INTER_UNIT_MOVES (x86_inter_unit_moves & TUNEMASK) 29752295Sobrien 29850654Sobrien#define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE) 29918334Speter 30090285Sobrien#define TARGET_ALIGN_STRINGOPS (!(target_flags & MASK_NO_ALIGN_STROPS)) 30190285Sobrien#define TARGET_INLINE_ALL_STRINGOPS (target_flags & MASK_INLINE_ALL_STROPS) 30218334Speter 30390285Sobrien#define ASSEMBLER_DIALECT (ix86_asm_dialect) 30490285Sobrien 305122193Skan#define TARGET_SSE ((target_flags & MASK_SSE) != 0) 30690285Sobrien#define TARGET_SSE2 ((target_flags & MASK_SSE2) != 0) 307132744Skan#define TARGET_SSE3 ((target_flags & MASK_SSE3) != 0) 30890285Sobrien#define TARGET_SSE_MATH ((ix86_fpmath & FPMATH_SSE) != 0) 30990285Sobrien#define TARGET_MIX_SSE_I387 ((ix86_fpmath & FPMATH_SSE) \ 31090285Sobrien && (ix86_fpmath & FPMATH_387)) 31190285Sobrien#define TARGET_MMX ((target_flags & MASK_MMX) != 0) 31290285Sobrien#define TARGET_3DNOW ((target_flags & MASK_3DNOW) != 0) 31390285Sobrien#define TARGET_3DNOW_A ((target_flags & MASK_3DNOW_A) != 0) 31490285Sobrien 31590285Sobrien#define TARGET_RED_ZONE (!(target_flags & MASK_NO_RED_ZONE)) 31690285Sobrien 31797911Sobrien#define TARGET_NO_ALIGN_LONG_STRINGS (target_flags & MASK_NO_ALIGN_LONG_STRINGS) 31897911Sobrien 319132744Skan#define TARGET_USE_MS_BITFIELD_LAYOUT (target_flags & MASK_MS_BITFIELD_LAYOUT) 320132744Skan 321117407Skan#define TARGET_GNU_TLS (ix86_tls_dialect == TLS_DIALECT_GNU) 322117407Skan#define TARGET_SUN_TLS (ix86_tls_dialect == TLS_DIALECT_SUN) 323117407Skan 32496294Sobrien/* WARNING: Do not mark empty strings for translation, as calling 32596294Sobrien gettext on an empty string does NOT return an empty 326132744Skan string. */ 32796294Sobrien 32896294Sobrien 32990285Sobrien#define TARGET_SWITCHES \ 33090285Sobrien{ { "80387", MASK_80387, N_("Use hardware fp") }, \ 33190285Sobrien { "no-80387", -MASK_80387, N_("Do not use hardware fp") }, \ 33290285Sobrien { "hard-float", MASK_80387, N_("Use hardware fp") }, \ 33390285Sobrien { "soft-float", -MASK_80387, N_("Do not use hardware fp") }, \ 33490285Sobrien { "no-soft-float", MASK_80387, N_("Use hardware fp") }, \ 33596294Sobrien { "386", 0, "" /*Deprecated.*/}, \ 33696294Sobrien { "486", 0, "" /*Deprecated.*/}, \ 33796294Sobrien { "pentium", 0, "" /*Deprecated.*/}, \ 33896294Sobrien { "pentiumpro", 0, "" /*Deprecated.*/}, \ 339132744Skan { "pni", 0, "" /*Deprecated.*/}, \ 340132744Skan { "no-pni", 0, "" /*Deprecated.*/}, \ 34196294Sobrien { "intel-syntax", 0, "" /*Deprecated.*/}, \ 34296294Sobrien { "no-intel-syntax", 0, "" /*Deprecated.*/}, \ 34390285Sobrien { "rtd", MASK_RTD, \ 34490285Sobrien N_("Alternate calling convention") }, \ 34590285Sobrien { "no-rtd", -MASK_RTD, \ 34690285Sobrien N_("Use normal calling convention") }, \ 34790285Sobrien { "align-double", MASK_ALIGN_DOUBLE, \ 34890285Sobrien N_("Align some doubles on dword boundary") }, \ 34990285Sobrien { "no-align-double", -MASK_ALIGN_DOUBLE, \ 35090285Sobrien N_("Align doubles on word boundary") }, \ 35190285Sobrien { "svr3-shlib", MASK_SVR3_SHLIB, \ 35290285Sobrien N_("Uninitialized locals in .bss") }, \ 35390285Sobrien { "no-svr3-shlib", -MASK_SVR3_SHLIB, \ 35490285Sobrien N_("Uninitialized locals in .data") }, \ 35590285Sobrien { "ieee-fp", MASK_IEEE_FP, \ 35690285Sobrien N_("Use IEEE math for fp comparisons") }, \ 35790285Sobrien { "no-ieee-fp", -MASK_IEEE_FP, \ 35890285Sobrien N_("Do not use IEEE math for fp comparisons") }, \ 35990285Sobrien { "fp-ret-in-387", MASK_FLOAT_RETURNS, \ 36090285Sobrien N_("Return values of functions in FPU registers") }, \ 36190285Sobrien { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS , \ 36290285Sobrien N_("Do not return values of functions in FPU registers")}, \ 36390285Sobrien { "no-fancy-math-387", MASK_NO_FANCY_MATH_387, \ 36490285Sobrien N_("Do not generate sin, cos, sqrt for FPU") }, \ 36590285Sobrien { "fancy-math-387", -MASK_NO_FANCY_MATH_387, \ 36690285Sobrien N_("Generate sin, cos, sqrt for FPU")}, \ 36790285Sobrien { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER, \ 36890285Sobrien N_("Omit the frame pointer in leaf functions") }, \ 36990285Sobrien { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER, "" }, \ 37090285Sobrien { "stack-arg-probe", MASK_STACK_PROBE, \ 37190285Sobrien N_("Enable stack probing") }, \ 37290285Sobrien { "no-stack-arg-probe", -MASK_STACK_PROBE, "" }, \ 37390285Sobrien { "windows", 0, 0 /* undocumented */ }, \ 37490285Sobrien { "dll", 0, 0 /* undocumented */ }, \ 37590285Sobrien { "align-stringops", -MASK_NO_ALIGN_STROPS, \ 37690285Sobrien N_("Align destination of the string operations") }, \ 37790285Sobrien { "no-align-stringops", MASK_NO_ALIGN_STROPS, \ 37890285Sobrien N_("Do not align destination of the string operations") }, \ 37990285Sobrien { "inline-all-stringops", MASK_INLINE_ALL_STROPS, \ 38090285Sobrien N_("Inline all known string operations") }, \ 38190285Sobrien { "no-inline-all-stringops", -MASK_INLINE_ALL_STROPS, \ 38290285Sobrien N_("Do not inline all known string operations") }, \ 38390285Sobrien { "push-args", -MASK_NO_PUSH_ARGS, \ 38490285Sobrien N_("Use push instructions to save outgoing arguments") }, \ 38590285Sobrien { "no-push-args", MASK_NO_PUSH_ARGS, \ 38690285Sobrien N_("Do not use push instructions to save outgoing arguments") }, \ 387117407Skan { "accumulate-outgoing-args", MASK_ACCUMULATE_OUTGOING_ARGS, \ 38890285Sobrien N_("Use push instructions to save outgoing arguments") }, \ 389117407Skan { "no-accumulate-outgoing-args",-MASK_ACCUMULATE_OUTGOING_ARGS, \ 39090285Sobrien N_("Do not use push instructions to save outgoing arguments") }, \ 391117407Skan { "mmx", MASK_MMX, \ 39290285Sobrien N_("Support MMX built-in functions") }, \ 39390285Sobrien { "no-mmx", -MASK_MMX, \ 39490285Sobrien N_("Do not support MMX built-in functions") }, \ 395117407Skan { "3dnow", MASK_3DNOW, \ 39690285Sobrien N_("Support 3DNow! built-in functions") }, \ 397117407Skan { "no-3dnow", -MASK_3DNOW, \ 39890285Sobrien N_("Do not support 3DNow! built-in functions") }, \ 399117407Skan { "sse", MASK_SSE, \ 40090285Sobrien N_("Support MMX and SSE built-in functions and code generation") }, \ 401117407Skan { "no-sse", -MASK_SSE, \ 40290285Sobrien N_("Do not support MMX and SSE built-in functions and code generation") },\ 403117407Skan { "sse2", MASK_SSE2, \ 40490285Sobrien N_("Support MMX, SSE and SSE2 built-in functions and code generation") }, \ 405117407Skan { "no-sse2", -MASK_SSE2, \ 40690285Sobrien N_("Do not support MMX, SSE and SSE2 built-in functions and code generation") }, \ 407132744Skan { "sse3", MASK_SSE3, \ 408132744Skan N_("Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation") },\ 409132744Skan { "no-sse3", -MASK_SSE3, \ 410132744Skan N_("Do not support MMX, SSE, SSE2 and SSE3 built-in functions and code generation") },\ 41190285Sobrien { "128bit-long-double", MASK_128BIT_LONG_DOUBLE, \ 41290285Sobrien N_("sizeof(long double) is 16") }, \ 41390285Sobrien { "96bit-long-double", -MASK_128BIT_LONG_DOUBLE, \ 41490285Sobrien N_("sizeof(long double) is 12") }, \ 41590285Sobrien { "64", MASK_64BIT, \ 41690285Sobrien N_("Generate 64bit x86-64 code") }, \ 41790285Sobrien { "32", -MASK_64BIT, \ 41890285Sobrien N_("Generate 32bit i386 code") }, \ 419132744Skan { "ms-bitfields", MASK_MS_BITFIELD_LAYOUT, \ 420132744Skan N_("Use native (MS) bitfield layout") }, \ 421132744Skan { "no-ms-bitfields", -MASK_MS_BITFIELD_LAYOUT, \ 422132744Skan N_("Use gcc default bitfield layout") }, \ 42390285Sobrien { "red-zone", -MASK_NO_RED_ZONE, \ 42490285Sobrien N_("Use red-zone in the x86-64 code") }, \ 42590285Sobrien { "no-red-zone", MASK_NO_RED_ZONE, \ 42690285Sobrien N_("Do not use red-zone in the x86-64 code") }, \ 42797911Sobrien { "no-align-long-strings", MASK_NO_ALIGN_LONG_STRINGS, \ 42897911Sobrien N_("Do not align long strings specially") }, \ 42997911Sobrien { "align-long-strings", -MASK_NO_ALIGN_LONG_STRINGS, \ 43097911Sobrien N_("Align strings longer than 30 on a 32-byte boundary") }, \ 431132744Skan { "tls-direct-seg-refs", MASK_TLS_DIRECT_SEG_REFS, \ 432132744Skan N_("Use direct references against %gs when accessing tls data") }, \ 433132744Skan { "no-tls-direct-seg-refs", -MASK_TLS_DIRECT_SEG_REFS, \ 434132744Skan N_("Do not use direct references against %gs when accessing tls data") }, \ 43590285Sobrien SUBTARGET_SWITCHES \ 436132744Skan { "", \ 437132744Skan TARGET_DEFAULT | TARGET_64BIT_DEFAULT | TARGET_SUBTARGET_DEFAULT \ 438132744Skan | TARGET_TLS_DIRECT_SEG_REFS_DEFAULT, 0 }} 43990285Sobrien 440117407Skan#ifndef TARGET_64BIT_DEFAULT 441117407Skan#define TARGET_64BIT_DEFAULT 0 44290285Sobrien#endif 443132744Skan#ifndef TARGET_TLS_DIRECT_SEG_REFS_DEFAULT 444132744Skan#define TARGET_TLS_DIRECT_SEG_REFS_DEFAULT 0 445132744Skan#endif 44690285Sobrien 447117407Skan/* Once GDB has been enhanced to deal with functions without frame 448117407Skan pointers, we can change this to allow for elimination of 449117407Skan the frame pointer in leaf functions. */ 450117407Skan#define TARGET_DEFAULT 0 45150654Sobrien 452117407Skan/* This is not really a target flag, but is done this way so that 453117407Skan it's analogous to similar code for Mach-O on PowerPC. darwin.h 454117407Skan redefines this to 1. */ 455117407Skan#define TARGET_MACHO 0 45650654Sobrien 457146908Skan/* Subtargets may reset this to 1 in order to enable 96-bit long double 458146908Skan with the rounding mode forced to 53 bits. */ 459146908Skan#define TARGET_96_ROUND_53_LONG_DOUBLE 0 460146908Skan 46118334Speter/* This macro is similar to `TARGET_SWITCHES' but defines names of 46218334Speter command options that have values. Its definition is an 46318334Speter initializer with a subgrouping for each command option. 46418334Speter 46518334Speter Each subgrouping contains a string constant, that defines the 46618334Speter fixed part of the option name, and the address of a variable. The 46718334Speter variable, type `char *', is set to the variable part of the given 46818334Speter option if the fixed part matches. The actual option name is made 46918334Speter by appending `-m' to the specified name. */ 47090285Sobrien#define TARGET_OPTIONS \ 471132744Skan{ { "tune=", &ix86_tune_string, \ 472132744Skan N_("Schedule code for given CPU"), 0}, \ 47390285Sobrien { "fpmath=", &ix86_fpmath_string, \ 474132744Skan N_("Generate floating point mathematics using given instruction set"), 0},\ 47590285Sobrien { "arch=", &ix86_arch_string, \ 476132744Skan N_("Generate code for given CPU"), 0}, \ 47790285Sobrien { "regparm=", &ix86_regparm_string, \ 478132744Skan N_("Number of registers used to pass integer arguments"), 0},\ 47990285Sobrien { "align-loops=", &ix86_align_loops_string, \ 480132744Skan N_("Loop code aligned to this power of 2"), 0}, \ 48190285Sobrien { "align-jumps=", &ix86_align_jumps_string, \ 482132744Skan N_("Jump targets are aligned to this power of 2"), 0}, \ 48390285Sobrien { "align-functions=", &ix86_align_funcs_string, \ 484132744Skan N_("Function starts are aligned to this power of 2"), 0}, \ 48590285Sobrien { "preferred-stack-boundary=", \ 48690285Sobrien &ix86_preferred_stack_boundary_string, \ 487132744Skan N_("Attempt to keep stack aligned to this power of 2"), 0}, \ 48890285Sobrien { "branch-cost=", &ix86_branch_cost_string, \ 489132744Skan N_("Branches are this expensive (1-5, arbitrary units)"), 0},\ 49090285Sobrien { "cmodel=", &ix86_cmodel_string, \ 491132744Skan N_("Use given x86-64 code model"), 0}, \ 49290285Sobrien { "debug-arg", &ix86_debug_arg_string, \ 493132744Skan "" /* Undocumented. */, 0}, \ 49490285Sobrien { "debug-addr", &ix86_debug_addr_string, \ 495132744Skan "" /* Undocumented. */, 0}, \ 49690285Sobrien { "asm=", &ix86_asm_string, \ 497132744Skan N_("Use given assembler dialect"), 0}, \ 498117407Skan { "tls-dialect=", &ix86_tls_dialect_string, \ 499132744Skan N_("Use given thread-local storage dialect"), 0}, \ 50090285Sobrien SUBTARGET_OPTIONS \ 50118334Speter} 50218334Speter 50318334Speter/* Sometimes certain combinations of command options do not make 50418334Speter sense on a particular target machine. You can define a macro 50518334Speter `OVERRIDE_OPTIONS' to take account of this. This macro, if 50618334Speter defined, is executed once just after all the command options have 50718334Speter been parsed. 50818334Speter 50918334Speter Don't use this macro to turn on various extra optimizations for 51018334Speter `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */ 51118334Speter 51218334Speter#define OVERRIDE_OPTIONS override_options () 51318334Speter 51418334Speter/* These are meant to be redefined in the host dependent files */ 51518334Speter#define SUBTARGET_SWITCHES 51618334Speter#define SUBTARGET_OPTIONS 51718334Speter 51850654Sobrien/* Define this to change the optimizations performed by default. */ 51990285Sobrien#define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \ 52090285Sobrien optimization_options ((LEVEL), (SIZE)) 52150654Sobrien 522132744Skan/* Support for configure-time defaults of some command line options. */ 523132744Skan#define OPTION_DEFAULT_SPECS \ 524132744Skan {"arch", "%{!march=*:-march=%(VALUE)}"}, \ 525132744Skan {"tune", "%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}" }, \ 526132744Skan {"cpu", "%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}" } 527132744Skan 52850654Sobrien/* Specs for the compiler proper */ 52950654Sobrien 53050654Sobrien#ifndef CC1_CPU_SPEC 53150654Sobrien#define CC1_CPU_SPEC "\ 532132744Skan%{!mtune*: \ 533132744Skan%{m386:mtune=i386 \ 534132744Skan%n`-m386' is deprecated. Use `-march=i386' or `-mtune=i386' instead.\n} \ 535132744Skan%{m486:-mtune=i486 \ 536132744Skan%n`-m486' is deprecated. Use `-march=i486' or `-mtune=i486' instead.\n} \ 537132744Skan%{mpentium:-mtune=pentium \ 538132744Skan%n`-mpentium' is deprecated. Use `-march=pentium' or `-mtune=pentium' instead.\n} \ 539132744Skan%{mpentiumpro:-mtune=pentiumpro \ 540132744Skan%n`-mpentiumpro' is deprecated. Use `-march=pentiumpro' or `-mtune=pentiumpro' instead.\n} \ 541132744Skan%{mcpu=*:-mtune=%* \ 542132744Skan%n`-mcpu=' is deprecated. Use `-mtune=' or '-march=' instead.\n}} \ 543132744Skan%<mcpu=* \ 544132744Skan%{mpni:-msse3 \ 545132744Skan%n`-mpni' is deprecated. Use `-msse3' instead.\n} \ 546132744Skan%{mno-pni:-mno-sse3 \ 547132744Skan%n`-mno-pni' is deprecated. Use `-mno-sse3' instead.\n} \ 54890285Sobrien%{mintel-syntax:-masm=intel \ 54990285Sobrien%n`-mintel-syntax' is deprecated. Use `-masm=intel' instead.\n} \ 55090285Sobrien%{mno-intel-syntax:-masm=att \ 55190285Sobrien%n`-mno-intel-syntax' is deprecated. Use `-masm=att' instead.\n}" 55250654Sobrien#endif 55318334Speter 554117407Skan/* Target CPU builtins. */ 555117407Skan#define TARGET_CPU_CPP_BUILTINS() \ 556117407Skan do \ 557117407Skan { \ 558117407Skan size_t arch_len = strlen (ix86_arch_string); \ 559132744Skan size_t tune_len = strlen (ix86_tune_string); \ 560117407Skan int last_arch_char = ix86_arch_string[arch_len - 1]; \ 561132744Skan int last_tune_char = ix86_tune_string[tune_len - 1]; \ 562117407Skan \ 563117407Skan if (TARGET_64BIT) \ 564117407Skan { \ 565117407Skan builtin_assert ("cpu=x86_64"); \ 566132744Skan builtin_assert ("machine=x86_64"); \ 567132744Skan builtin_define ("__amd64"); \ 568132744Skan builtin_define ("__amd64__"); \ 569117407Skan builtin_define ("__x86_64"); \ 570117407Skan builtin_define ("__x86_64__"); \ 571117407Skan } \ 572117407Skan else \ 573117407Skan { \ 574117407Skan builtin_assert ("cpu=i386"); \ 575117407Skan builtin_assert ("machine=i386"); \ 576117407Skan builtin_define_std ("i386"); \ 577117407Skan } \ 578117407Skan \ 579132744Skan /* Built-ins based on -mtune= (or -march= if no \ 580132744Skan -mtune= given). */ \ 581117407Skan if (TARGET_386) \ 582117407Skan builtin_define ("__tune_i386__"); \ 583117407Skan else if (TARGET_486) \ 584117407Skan builtin_define ("__tune_i486__"); \ 585117407Skan else if (TARGET_PENTIUM) \ 586117407Skan { \ 587117407Skan builtin_define ("__tune_i586__"); \ 588117407Skan builtin_define ("__tune_pentium__"); \ 589132744Skan if (last_tune_char == 'x') \ 590117407Skan builtin_define ("__tune_pentium_mmx__"); \ 591117407Skan } \ 592117407Skan else if (TARGET_PENTIUMPRO) \ 593117407Skan { \ 594117407Skan builtin_define ("__tune_i686__"); \ 595117407Skan builtin_define ("__tune_pentiumpro__"); \ 596132744Skan switch (last_tune_char) \ 597117407Skan { \ 598117407Skan case '3': \ 599117407Skan builtin_define ("__tune_pentium3__"); \ 600117407Skan /* FALLTHRU */ \ 601117407Skan case '2': \ 602117407Skan builtin_define ("__tune_pentium2__"); \ 603117407Skan break; \ 604117407Skan } \ 605117407Skan } \ 606117407Skan else if (TARGET_K6) \ 607117407Skan { \ 608117407Skan builtin_define ("__tune_k6__"); \ 609132744Skan if (last_tune_char == '2') \ 610117407Skan builtin_define ("__tune_k6_2__"); \ 611132744Skan else if (last_tune_char == '3') \ 612117407Skan builtin_define ("__tune_k6_3__"); \ 613117407Skan } \ 614117407Skan else if (TARGET_ATHLON) \ 615117407Skan { \ 616117407Skan builtin_define ("__tune_athlon__"); \ 617117407Skan /* Only plain "athlon" lacks SSE. */ \ 618132744Skan if (last_tune_char != 'n') \ 619117407Skan builtin_define ("__tune_athlon_sse__"); \ 620117407Skan } \ 621132744Skan else if (TARGET_K8) \ 622132744Skan builtin_define ("__tune_k8__"); \ 623117407Skan else if (TARGET_PENTIUM4) \ 624117407Skan builtin_define ("__tune_pentium4__"); \ 625117407Skan \ 626117407Skan if (TARGET_MMX) \ 627117407Skan builtin_define ("__MMX__"); \ 628117407Skan if (TARGET_3DNOW) \ 629117407Skan builtin_define ("__3dNOW__"); \ 630117407Skan if (TARGET_3DNOW_A) \ 631117407Skan builtin_define ("__3dNOW_A__"); \ 632117407Skan if (TARGET_SSE) \ 633117407Skan builtin_define ("__SSE__"); \ 634117407Skan if (TARGET_SSE2) \ 635117407Skan builtin_define ("__SSE2__"); \ 636132744Skan if (TARGET_SSE3) \ 637132744Skan { \ 638132744Skan builtin_define ("__SSE3__"); \ 639132744Skan builtin_define ("__PNI__"); \ 640132744Skan } \ 641117407Skan if (TARGET_SSE_MATH && TARGET_SSE) \ 642117407Skan builtin_define ("__SSE_MATH__"); \ 643117407Skan if (TARGET_SSE_MATH && TARGET_SSE2) \ 644117407Skan builtin_define ("__SSE2_MATH__"); \ 645117407Skan \ 646117407Skan /* Built-ins based on -march=. */ \ 647117407Skan if (ix86_arch == PROCESSOR_I486) \ 648117407Skan { \ 649117407Skan builtin_define ("__i486"); \ 650117407Skan builtin_define ("__i486__"); \ 651117407Skan } \ 652117407Skan else if (ix86_arch == PROCESSOR_PENTIUM) \ 653117407Skan { \ 654117407Skan builtin_define ("__i586"); \ 655117407Skan builtin_define ("__i586__"); \ 656117407Skan builtin_define ("__pentium"); \ 657117407Skan builtin_define ("__pentium__"); \ 658117407Skan if (last_arch_char == 'x') \ 659117407Skan builtin_define ("__pentium_mmx__"); \ 660117407Skan } \ 661117407Skan else if (ix86_arch == PROCESSOR_PENTIUMPRO) \ 662117407Skan { \ 663117407Skan builtin_define ("__i686"); \ 664117407Skan builtin_define ("__i686__"); \ 665117407Skan builtin_define ("__pentiumpro"); \ 666117407Skan builtin_define ("__pentiumpro__"); \ 667117407Skan } \ 668117407Skan else if (ix86_arch == PROCESSOR_K6) \ 669117407Skan { \ 670117407Skan \ 671117407Skan builtin_define ("__k6"); \ 672117407Skan builtin_define ("__k6__"); \ 673117407Skan if (last_arch_char == '2') \ 674117407Skan builtin_define ("__k6_2__"); \ 675117407Skan else if (last_arch_char == '3') \ 676117407Skan builtin_define ("__k6_3__"); \ 677117407Skan } \ 678117407Skan else if (ix86_arch == PROCESSOR_ATHLON) \ 679117407Skan { \ 680117407Skan builtin_define ("__athlon"); \ 681117407Skan builtin_define ("__athlon__"); \ 682117407Skan /* Only plain "athlon" lacks SSE. */ \ 683117407Skan if (last_arch_char != 'n') \ 684117407Skan builtin_define ("__athlon_sse__"); \ 685117407Skan } \ 686132744Skan else if (ix86_arch == PROCESSOR_K8) \ 687132744Skan { \ 688132744Skan builtin_define ("__k8"); \ 689132744Skan builtin_define ("__k8__"); \ 690132744Skan } \ 691117407Skan else if (ix86_arch == PROCESSOR_PENTIUM4) \ 692117407Skan { \ 693117407Skan builtin_define ("__pentium4"); \ 694117407Skan builtin_define ("__pentium4__"); \ 695117407Skan } \ 696117407Skan } \ 697117407Skan while (0) 698117407Skan 69990285Sobrien#define TARGET_CPU_DEFAULT_i386 0 70090285Sobrien#define TARGET_CPU_DEFAULT_i486 1 70190285Sobrien#define TARGET_CPU_DEFAULT_pentium 2 70290285Sobrien#define TARGET_CPU_DEFAULT_pentium_mmx 3 70390285Sobrien#define TARGET_CPU_DEFAULT_pentiumpro 4 70490285Sobrien#define TARGET_CPU_DEFAULT_pentium2 5 70590285Sobrien#define TARGET_CPU_DEFAULT_pentium3 6 70690285Sobrien#define TARGET_CPU_DEFAULT_pentium4 7 70790285Sobrien#define TARGET_CPU_DEFAULT_k6 8 70890285Sobrien#define TARGET_CPU_DEFAULT_k6_2 9 70990285Sobrien#define TARGET_CPU_DEFAULT_k6_3 10 71090285Sobrien#define TARGET_CPU_DEFAULT_athlon 11 71190285Sobrien#define TARGET_CPU_DEFAULT_athlon_sse 12 712132744Skan#define TARGET_CPU_DEFAULT_k8 13 713132744Skan#define TARGET_CPU_DEFAULT_pentium_m 14 714132744Skan#define TARGET_CPU_DEFAULT_prescott 15 715132744Skan#define TARGET_CPU_DEFAULT_nocona 16 71650654Sobrien 71790285Sobrien#define TARGET_CPU_DEFAULT_NAMES {"i386", "i486", "pentium", "pentium-mmx",\ 71890285Sobrien "pentiumpro", "pentium2", "pentium3", \ 71990285Sobrien "pentium4", "k6", "k6-2", "k6-3",\ 720132744Skan "athlon", "athlon-4", "k8", \ 721132744Skan "pentium-m", "prescott", "nocona"} 72250654Sobrien 72350654Sobrien#ifndef CC1_SPEC 72490285Sobrien#define CC1_SPEC "%(cc1_cpu) " 72550654Sobrien#endif 72650654Sobrien 72750654Sobrien/* This macro defines names of additional specifications to put in the 72850654Sobrien specs that can be used in various specifications like CC1_SPEC. Its 72950654Sobrien definition is an initializer with a subgrouping for each command option. 73050654Sobrien 73150654Sobrien Each subgrouping contains a string constant, that defines the 732132744Skan specification name, and a string constant that used by the GCC driver 73350654Sobrien program. 73450654Sobrien 73550654Sobrien Do not define this macro if it does not need to do anything. */ 73650654Sobrien 73750654Sobrien#ifndef SUBTARGET_EXTRA_SPECS 73850654Sobrien#define SUBTARGET_EXTRA_SPECS 73950654Sobrien#endif 74050654Sobrien 74150654Sobrien#define EXTRA_SPECS \ 74250654Sobrien { "cc1_cpu", CC1_CPU_SPEC }, \ 74350654Sobrien SUBTARGET_EXTRA_SPECS 74450654Sobrien 74518334Speter/* target machine storage layout */ 74618334Speter 747132744Skan#define LONG_DOUBLE_TYPE_SIZE 96 74818334Speter 749117407Skan/* Set the value of FLT_EVAL_METHOD in float.h. When using only the 750117407Skan FPU, assume that the fpcw is set to extended precision; when using 751117407Skan only SSE, rounding is correct; when using both SSE and the FPU, 752117407Skan the rounding precision is indeterminate, since either may be chosen 753117407Skan apparently at random. */ 754117407Skan#define TARGET_FLT_EVAL_METHOD \ 755132744Skan (TARGET_MIX_SSE_I387 ? -1 : TARGET_SSE_MATH ? 0 : 2) 75690285Sobrien 75790285Sobrien#define SHORT_TYPE_SIZE 16 75890285Sobrien#define INT_TYPE_SIZE 32 75990285Sobrien#define FLOAT_TYPE_SIZE 32 76097912Sobrien#ifndef LONG_TYPE_SIZE 76190285Sobrien#define LONG_TYPE_SIZE BITS_PER_WORD 76297912Sobrien#endif 76390285Sobrien#define MAX_WCHAR_TYPE_SIZE 32 76490285Sobrien#define DOUBLE_TYPE_SIZE 64 76590285Sobrien#define LONG_LONG_TYPE_SIZE 64 76690285Sobrien 767117407Skan#if defined (TARGET_BI_ARCH) || TARGET_64BIT_DEFAULT 76890285Sobrien#define MAX_BITS_PER_WORD 64 76990285Sobrien#define MAX_LONG_TYPE_SIZE 64 77090285Sobrien#else 77190285Sobrien#define MAX_BITS_PER_WORD 32 77290285Sobrien#define MAX_LONG_TYPE_SIZE 32 77390285Sobrien#endif 77490285Sobrien 77518334Speter/* Define this if most significant byte of a word is the lowest numbered. */ 77618334Speter/* That is true on the 80386. */ 77718334Speter 77818334Speter#define BITS_BIG_ENDIAN 0 77918334Speter 78018334Speter/* Define this if most significant byte of a word is the lowest numbered. */ 78118334Speter/* That is not true on the 80386. */ 78218334Speter#define BYTES_BIG_ENDIAN 0 78318334Speter 78418334Speter/* Define this if most significant word of a multiword number is the lowest 78518334Speter numbered. */ 78618334Speter/* Not true for 80386 */ 78718334Speter#define WORDS_BIG_ENDIAN 0 78818334Speter 78918334Speter/* Width of a word, in units (bytes). */ 79090285Sobrien#define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) 791117407Skan#ifdef IN_LIBGCC2 792117407Skan#define MIN_UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) 793117407Skan#else 794117407Skan#define MIN_UNITS_PER_WORD 4 795117407Skan#endif 79618334Speter 79718334Speter/* Allocation boundary (in *bits*) for storing arguments in argument list. */ 79890285Sobrien#define PARM_BOUNDARY BITS_PER_WORD 79918334Speter 80090285Sobrien/* Boundary (in *bits*) on which stack pointer should be aligned. */ 80190285Sobrien#define STACK_BOUNDARY BITS_PER_WORD 80218334Speter 803132744Skan/* Boundary (in *bits*) on which the stack pointer prefers to be 80452295Sobrien aligned; the compiler cannot rely on having this alignment. */ 80590285Sobrien#define PREFERRED_STACK_BOUNDARY ix86_preferred_stack_boundary 80652295Sobrien 80790285Sobrien/* As of July 2001, many runtimes to not align the stack properly when 808132744Skan entering main. This causes expand_main_function to forcibly align 80990285Sobrien the stack, which results in aligned frames for functions called from 81090285Sobrien main, though it does nothing for the alignment of main itself. */ 81190285Sobrien#define FORCE_PREFERRED_STACK_BOUNDARY_IN_MAIN \ 81290285Sobrien (ix86_preferred_stack_boundary > STACK_BOUNDARY && !TARGET_64BIT) 81318334Speter 814104768Skan/* Minimum allocation boundary for the code of a function. */ 815104768Skan#define FUNCTION_BOUNDARY 8 81618334Speter 817104768Skan/* C++ stores the virtual bit in the lowest bit of function pointers. */ 818104768Skan#define TARGET_PTRMEMFUNC_VBIT_LOCATION ptrmemfunc_vbit_in_pfn 819104768Skan 82090285Sobrien/* Alignment of field after `int : 0' in a structure. */ 82118334Speter 82290285Sobrien#define EMPTY_FIELD_BOUNDARY BITS_PER_WORD 82390285Sobrien 82418334Speter/* Minimum size in bits of the largest boundary to which any 82518334Speter and all fundamental data types supported by the hardware 82618334Speter might need to be aligned. No data type wants to be aligned 82790285Sobrien rounder than this. 828117407Skan 829132744Skan Pentium+ prefers DFmode values to be aligned to 64 bit boundary 83090285Sobrien and Pentium Pro XFmode values at 128 bit boundaries. */ 83118334Speter 83290285Sobrien#define BIGGEST_ALIGNMENT 128 83390285Sobrien 834117407Skan/* Decide whether a variable of mode MODE should be 128 bit aligned. */ 83590285Sobrien#define ALIGN_MODE_128(MODE) \ 836117407Skan ((MODE) == XFmode || (MODE) == TFmode || SSE_REG_MODE_P (MODE)) 83790285Sobrien 83890285Sobrien/* The published ABIs say that doubles should be aligned on word 839132744Skan boundaries, so lower the alignment for structure fields unless 84090285Sobrien -malign-double is set. */ 841102801Skan 842102801Skan/* ??? Blah -- this macro is used directly by libobjc. Since it 843102801Skan supports no vector modes, cut out the complexity and fall back 844102801Skan on BIGGEST_FIELD_ALIGNMENT. */ 845102801Skan#ifdef IN_TARGET_LIBS 846117407Skan#ifdef __x86_64__ 847117407Skan#define BIGGEST_FIELD_ALIGNMENT 128 848117407Skan#else 849102801Skan#define BIGGEST_FIELD_ALIGNMENT 32 850117407Skan#endif 85190285Sobrien#else 852102801Skan#define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \ 853102801Skan x86_field_alignment (FIELD, COMPUTED) 85490285Sobrien#endif 85590285Sobrien 85650654Sobrien/* If defined, a C expression to compute the alignment given to a 85790285Sobrien constant that is being placed in memory. EXP is the constant 85850654Sobrien and ALIGN is the alignment that the object would ordinarily have. 85950654Sobrien The value of this macro is used instead of that alignment to align 86050654Sobrien the object. 86150654Sobrien 86250654Sobrien If this macro is not defined, then ALIGN is used. 86350654Sobrien 86450654Sobrien The typical use of this macro is to increase alignment for string 86550654Sobrien constants to be word aligned so that `strcpy' calls that copy 86650654Sobrien constants can be done inline. */ 86750654Sobrien 86890285Sobrien#define CONSTANT_ALIGNMENT(EXP, ALIGN) ix86_constant_alignment ((EXP), (ALIGN)) 86950654Sobrien 87050654Sobrien/* If defined, a C expression to compute the alignment for a static 87150654Sobrien variable. TYPE is the data type, and ALIGN is the alignment that 87250654Sobrien the object would ordinarily have. The value of this macro is used 87350654Sobrien instead of that alignment to align the object. 87450654Sobrien 87550654Sobrien If this macro is not defined, then ALIGN is used. 87650654Sobrien 87750654Sobrien One use of this macro is to increase alignment of medium-size 87850654Sobrien data to make it all fit in fewer cache lines. Another is to 87950654Sobrien cause character arrays to be word-aligned so that `strcpy' calls 88050654Sobrien that copy constants to character arrays can be done inline. */ 88150654Sobrien 88290285Sobrien#define DATA_ALIGNMENT(TYPE, ALIGN) ix86_data_alignment ((TYPE), (ALIGN)) 88350654Sobrien 88452295Sobrien/* If defined, a C expression to compute the alignment for a local 88552295Sobrien variable. TYPE is the data type, and ALIGN is the alignment that 88652295Sobrien the object would ordinarily have. The value of this macro is used 88752295Sobrien instead of that alignment to align the object. 88852295Sobrien 88952295Sobrien If this macro is not defined, then ALIGN is used. 89052295Sobrien 89152295Sobrien One use of this macro is to increase alignment of medium-size 89252295Sobrien data to make it all fit in fewer cache lines. */ 89352295Sobrien 89490285Sobrien#define LOCAL_ALIGNMENT(TYPE, ALIGN) ix86_local_alignment ((TYPE), (ALIGN)) 89552295Sobrien 89690285Sobrien/* If defined, a C expression that gives the alignment boundary, in 89790285Sobrien bits, of an argument with the specified mode and type. If it is 89890285Sobrien not defined, `PARM_BOUNDARY' is used for all arguments. */ 89990285Sobrien 90090285Sobrien#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ 90190285Sobrien ix86_function_arg_boundary ((MODE), (TYPE)) 90290285Sobrien 903117407Skan/* Set this nonzero if move instructions will actually fail to work 90418334Speter when given unaligned data. */ 90518334Speter#define STRICT_ALIGNMENT 0 90618334Speter 90718334Speter/* If bit field type is int, don't let it cross an int, 90818334Speter and give entire struct the alignment of an int. */ 909117407Skan/* Required on the 386 since it doesn't have bit-field insns. */ 91018334Speter#define PCC_BITFIELD_TYPE_MATTERS 1 91118334Speter 91218334Speter/* Standard register usage. */ 91318334Speter 91418334Speter/* This processor has special stack-like registers. See reg-stack.c 91590285Sobrien for details. */ 91618334Speter 91718334Speter#define STACK_REGS 91890285Sobrien#define IS_STACK_MODE(MODE) \ 919132744Skan ((MODE) == DFmode || (MODE) == SFmode || (MODE) == XFmode) \ 92018334Speter 92118334Speter/* Number of actual hardware registers. 92218334Speter The hardware registers are assigned numbers for the compiler 92318334Speter from 0 to just below FIRST_PSEUDO_REGISTER. 92418334Speter All registers that the compiler knows about must be given numbers, 92518334Speter even those that are not normally considered general registers. 92618334Speter 92718334Speter In the 80386 we give the 8 general purpose registers the numbers 0-7. 92818334Speter We number the floating point registers 8-15. 92918334Speter Note that registers 0-7 can be accessed as a short or int, 93018334Speter while only 0-3 may be used with byte `mov' instructions. 93118334Speter 93218334Speter Reg 16 does not correspond to any hardware register, but instead 93318334Speter appears in the RTL as an argument pointer prior to reload, and is 93418334Speter eliminated during reloading in favor of either the stack or frame 93590285Sobrien pointer. */ 93618334Speter 93790285Sobrien#define FIRST_PSEUDO_REGISTER 53 93818334Speter 93990285Sobrien/* Number of hardware registers that go into the DWARF-2 unwind info. 94090285Sobrien If not defined, equals FIRST_PSEUDO_REGISTER. */ 94190285Sobrien 94290285Sobrien#define DWARF_FRAME_REGISTERS 17 94390285Sobrien 94418334Speter/* 1 for registers that have pervasive standard uses 94518334Speter and are not available for the register allocator. 94690285Sobrien On the 80386, the stack pointer is such, as is the arg pointer. 947117407Skan 948132744Skan The value is a mask - bit 1 is set for fixed registers 94990285Sobrien for 32bit target, while 2 is set for fixed registers for 64bit. 95090285Sobrien Proper value is computed in the CONDITIONAL_REGISTER_USAGE. 95190285Sobrien */ 95290285Sobrien#define FIXED_REGISTERS \ 95390285Sobrien/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/ \ 95490285Sobrien{ 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, \ 95590285Sobrien/*arg,flags,fpsr,dir,frame*/ \ 95690285Sobrien 3, 3, 3, 3, 3, \ 95790285Sobrien/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \ 95890285Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 95990285Sobrien/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/ \ 96090285Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 96190285Sobrien/* r8, r9, r10, r11, r12, r13, r14, r15*/ \ 96290285Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 96390285Sobrien/*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/ \ 96490285Sobrien 1, 1, 1, 1, 1, 1, 1, 1} 96518334Speter 966117407Skan 96718334Speter/* 1 for registers not available across function calls. 96818334Speter These must include the FIXED_REGISTERS and also any 96918334Speter registers that can be used without being saved. 97018334Speter The latter must include the registers where values are returned 97118334Speter and the register where structure-value addresses are passed. 972117407Skan Aside from that, you can include as many other registers as you like. 973117407Skan 974132744Skan The value is a mask - bit 1 is set for call used 97590285Sobrien for 32bit target, while 2 is set for call used for 64bit. 97690285Sobrien Proper value is computed in the CONDITIONAL_REGISTER_USAGE. 97790285Sobrien*/ 97890285Sobrien#define CALL_USED_REGISTERS \ 97990285Sobrien/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/ \ 98090285Sobrien{ 3, 3, 3, 0, 2, 2, 0, 3, 3, 3, 3, 3, 3, 3, 3, 3, \ 98190285Sobrien/*arg,flags,fpsr,dir,frame*/ \ 98290285Sobrien 3, 3, 3, 3, 3, \ 98390285Sobrien/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \ 98490285Sobrien 3, 3, 3, 3, 3, 3, 3, 3, \ 98590285Sobrien/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/ \ 98690285Sobrien 3, 3, 3, 3, 3, 3, 3, 3, \ 98790285Sobrien/* r8, r9, r10, r11, r12, r13, r14, r15*/ \ 98890285Sobrien 3, 3, 3, 3, 1, 1, 1, 1, \ 98990285Sobrien/*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/ \ 99090285Sobrien 3, 3, 3, 3, 3, 3, 3, 3} \ 99118334Speter 99218334Speter/* Order in which to allocate registers. Each register must be 99318334Speter listed once, even those in FIXED_REGISTERS. List frame pointer 99418334Speter late and fixed registers last. Note that, in general, we prefer 99518334Speter registers listed in CALL_USED_REGISTERS, keeping the others 99618334Speter available for storage of persistent values. 99718334Speter 99896294Sobrien The ORDER_REGS_FOR_LOCAL_ALLOC actually overwrite the order, 99996294Sobrien so this is just empty initializer for array. */ 100018334Speter 100196294Sobrien#define REG_ALLOC_ORDER \ 100296294Sobrien{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,\ 100396294Sobrien 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, \ 100496294Sobrien 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \ 100596294Sobrien 48, 49, 50, 51, 52 } 100618334Speter 100796294Sobrien/* ORDER_REGS_FOR_LOCAL_ALLOC is a macro which permits reg_alloc_order 100896294Sobrien to be rearranged based on a particular function. When using sse math, 1009132744Skan we want to allocate SSE before x87 registers and vice vera. */ 101018334Speter 101196294Sobrien#define ORDER_REGS_FOR_LOCAL_ALLOC x86_order_regs_for_local_alloc () 101218334Speter 101318334Speter 101418334Speter/* Macro to conditionally modify fixed_regs/call_used_regs. */ 101590285Sobrien#define CONDITIONAL_REGISTER_USAGE \ 101690285Sobriendo { \ 101790285Sobrien int i; \ 101890285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 101990285Sobrien { \ 102090285Sobrien fixed_regs[i] = (fixed_regs[i] & (TARGET_64BIT ? 2 : 1)) != 0; \ 102190285Sobrien call_used_regs[i] = (call_used_regs[i] \ 102290285Sobrien & (TARGET_64BIT ? 2 : 1)) != 0; \ 102390285Sobrien } \ 102496294Sobrien if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \ 102590285Sobrien { \ 102690285Sobrien fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 102790285Sobrien call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 102890285Sobrien } \ 102990285Sobrien if (! TARGET_MMX) \ 103090285Sobrien { \ 103190285Sobrien int i; \ 103290285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 103390285Sobrien if (TEST_HARD_REG_BIT (reg_class_contents[(int)MMX_REGS], i)) \ 103490285Sobrien fixed_regs[i] = call_used_regs[i] = 1; \ 103590285Sobrien } \ 103690285Sobrien if (! TARGET_SSE) \ 103790285Sobrien { \ 103890285Sobrien int i; \ 103990285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 104090285Sobrien if (TEST_HARD_REG_BIT (reg_class_contents[(int)SSE_REGS], i)) \ 104190285Sobrien fixed_regs[i] = call_used_regs[i] = 1; \ 104290285Sobrien } \ 104390285Sobrien if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \ 104490285Sobrien { \ 104590285Sobrien int i; \ 104690285Sobrien HARD_REG_SET x; \ 104790285Sobrien COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \ 104890285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 104990285Sobrien if (TEST_HARD_REG_BIT (x, i)) \ 105090285Sobrien fixed_regs[i] = call_used_regs[i] = 1; \ 105190285Sobrien } \ 105290285Sobrien } while (0) 105318334Speter 105418334Speter/* Return number of consecutive hard regs needed starting at reg REGNO 105518334Speter to hold something of mode MODE. 105618334Speter This is ordinarily the length in words of a value of mode MODE 105718334Speter but can be less for certain modes in special long registers. 105818334Speter 1059117407Skan Actually there are no two word move instructions for consecutive 106018334Speter registers. And only registers 0-3 may have mov byte instructions 106118334Speter applied to them. 106218334Speter */ 106318334Speter 106418334Speter#define HARD_REGNO_NREGS(REGNO, MODE) \ 106590285Sobrien (FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO) \ 106690285Sobrien ? (COMPLEX_MODE_P (MODE) ? 2 : 1) \ 1067132744Skan : ((MODE) == XFmode \ 106890285Sobrien ? (TARGET_64BIT ? 2 : 3) \ 1069132744Skan : (MODE) == XCmode \ 107090285Sobrien ? (TARGET_64BIT ? 4 : 6) \ 107190285Sobrien : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) 107218334Speter 1073117407Skan#define VALID_SSE2_REG_MODE(MODE) \ 1074117407Skan ((MODE) == V16QImode || (MODE) == V8HImode || (MODE) == V2DFmode \ 1075146908Skan || (MODE) == V2DImode || (MODE) == DFmode) 1076117407Skan 107790285Sobrien#define VALID_SSE_REG_MODE(MODE) \ 107890285Sobrien ((MODE) == TImode || (MODE) == V4SFmode || (MODE) == V4SImode \ 1079146908Skan || (MODE) == SFmode || (MODE) == TFmode) 108018334Speter 108190285Sobrien#define VALID_MMX_REG_MODE_3DNOW(MODE) \ 108290285Sobrien ((MODE) == V2SFmode || (MODE) == SFmode) 108318334Speter 108490285Sobrien#define VALID_MMX_REG_MODE(MODE) \ 108590285Sobrien ((MODE) == DImode || (MODE) == V8QImode || (MODE) == V4HImode \ 108690285Sobrien || (MODE) == V2SImode || (MODE) == SImode) 108718334Speter 108890285Sobrien#define VECTOR_MODE_SUPPORTED_P(MODE) \ 108990285Sobrien (VALID_SSE_REG_MODE (MODE) && TARGET_SSE ? 1 \ 109090285Sobrien : VALID_MMX_REG_MODE (MODE) && TARGET_MMX ? 1 \ 109190285Sobrien : VALID_MMX_REG_MODE_3DNOW (MODE) && TARGET_3DNOW ? 1 : 0) 109290285Sobrien 109390285Sobrien#define VALID_FP_MODE_P(MODE) \ 1094132744Skan ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode \ 1095132744Skan || (MODE) == SCmode || (MODE) == DCmode || (MODE) == XCmode) \ 109690285Sobrien 109790285Sobrien#define VALID_INT_MODE_P(MODE) \ 109890285Sobrien ((MODE) == QImode || (MODE) == HImode || (MODE) == SImode \ 109990285Sobrien || (MODE) == DImode \ 110090285Sobrien || (MODE) == CQImode || (MODE) == CHImode || (MODE) == CSImode \ 110190285Sobrien || (MODE) == CDImode \ 1102132744Skan || (TARGET_64BIT && ((MODE) == TImode || (MODE) == CTImode \ 1103132744Skan || (MODE) == TFmode || (MODE) == TCmode))) 110490285Sobrien 1105117407Skan/* Return true for modes passed in SSE registers. */ 1106117407Skan#define SSE_REG_MODE_P(MODE) \ 1107132744Skan ((MODE) == TImode || (MODE) == V16QImode || (MODE) == TFmode \ 1108117407Skan || (MODE) == V8HImode || (MODE) == V2DFmode || (MODE) == V2DImode \ 1109117407Skan || (MODE) == V4SFmode || (MODE) == V4SImode) 1110117407Skan 1111117407Skan/* Return true for modes passed in MMX registers. */ 1112117407Skan#define MMX_REG_MODE_P(MODE) \ 1113117407Skan ((MODE) == V8QImode || (MODE) == V4HImode || (MODE) == V2SImode \ 1114117407Skan || (MODE) == V2SFmode) 1115117407Skan 111690285Sobrien/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */ 111790285Sobrien 111890285Sobrien#define HARD_REGNO_MODE_OK(REGNO, MODE) \ 111990285Sobrien ix86_hard_regno_mode_ok ((REGNO), (MODE)) 112090285Sobrien 112118334Speter/* Value is 1 if it is a good idea to tie two pseudo registers 112218334Speter when one has mode MODE1 and one has mode MODE2. 112318334Speter If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 112418334Speter for any hard reg, then this must be 0 for correct output. */ 112518334Speter 112650654Sobrien#define MODES_TIEABLE_P(MODE1, MODE2) \ 112750654Sobrien ((MODE1) == (MODE2) \ 112890285Sobrien || (((MODE1) == HImode || (MODE1) == SImode \ 112990285Sobrien || ((MODE1) == QImode \ 113090285Sobrien && (TARGET_64BIT || !TARGET_PARTIAL_REG_STALL)) \ 113190285Sobrien || ((MODE1) == DImode && TARGET_64BIT)) \ 113290285Sobrien && ((MODE2) == HImode || (MODE2) == SImode \ 1133117407Skan || ((MODE2) == QImode \ 113490285Sobrien && (TARGET_64BIT || !TARGET_PARTIAL_REG_STALL)) \ 113590285Sobrien || ((MODE2) == DImode && TARGET_64BIT)))) 113618334Speter 1137132744Skan/* It is possible to write patterns to move flags; but until someone 1138132744Skan does it, */ 1139132744Skan#define AVOID_CCMODE_COPIES 114090285Sobrien 114190285Sobrien/* Specify the modes required to caller save a given hard regno. 114290285Sobrien We do this on i386 to prevent flags from being saved at all. 114390285Sobrien 114490285Sobrien Kill any attempts to combine saving of modes. */ 114590285Sobrien 114690285Sobrien#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ 114790285Sobrien (CC_REGNO_P (REGNO) ? VOIDmode \ 114890285Sobrien : (MODE) == VOIDmode && (NREGS) != 1 ? VOIDmode \ 1149132744Skan : (MODE) == VOIDmode ? choose_hard_reg_mode ((REGNO), (NREGS), false)\ 115090285Sobrien : (MODE) == HImode && !TARGET_PARTIAL_REG_STALL ? SImode \ 115190285Sobrien : (MODE) == QImode && (REGNO) >= 4 && !TARGET_64BIT ? SImode \ 115290285Sobrien : (MODE)) 115318334Speter/* Specify the registers used for certain standard purposes. 115418334Speter The values of these macros are register numbers. */ 115518334Speter 115618334Speter/* on the 386 the pc register is %eip, and is not usable as a general 115718334Speter register. The ordinary mov instructions won't work */ 115818334Speter/* #define PC_REGNUM */ 115918334Speter 116018334Speter/* Register to use for pushing function arguments. */ 116118334Speter#define STACK_POINTER_REGNUM 7 116218334Speter 116318334Speter/* Base register for access to local variables of the function. */ 116490285Sobrien#define HARD_FRAME_POINTER_REGNUM 6 116518334Speter 116690285Sobrien/* Base register for access to local variables of the function. */ 116790285Sobrien#define FRAME_POINTER_REGNUM 20 116890285Sobrien 116918334Speter/* First floating point reg */ 117018334Speter#define FIRST_FLOAT_REG 8 117118334Speter 117218334Speter/* First & last stack-like regs */ 117318334Speter#define FIRST_STACK_REG FIRST_FLOAT_REG 117418334Speter#define LAST_STACK_REG (FIRST_FLOAT_REG + 7) 117518334Speter 117690285Sobrien#define FLAGS_REG 17 117790285Sobrien#define FPSR_REG 18 117890285Sobrien#define DIRFLAG_REG 19 117990285Sobrien 118090285Sobrien#define FIRST_SSE_REG (FRAME_POINTER_REGNUM + 1) 118190285Sobrien#define LAST_SSE_REG (FIRST_SSE_REG + 7) 1182117407Skan 118390285Sobrien#define FIRST_MMX_REG (LAST_SSE_REG + 1) 118490285Sobrien#define LAST_MMX_REG (FIRST_MMX_REG + 7) 118590285Sobrien 118690285Sobrien#define FIRST_REX_INT_REG (LAST_MMX_REG + 1) 118790285Sobrien#define LAST_REX_INT_REG (FIRST_REX_INT_REG + 7) 118890285Sobrien 118990285Sobrien#define FIRST_REX_SSE_REG (LAST_REX_INT_REG + 1) 119090285Sobrien#define LAST_REX_SSE_REG (FIRST_REX_SSE_REG + 7) 119190285Sobrien 119218334Speter/* Value should be nonzero if functions must have frame pointers. 119318334Speter Zero means the frame pointer need not be set up (and parms 119418334Speter may be accessed via the stack pointer) in functions that seem suitable. 119518334Speter This is computed in `reload', in reload1.c. */ 119690285Sobrien#define FRAME_POINTER_REQUIRED ix86_frame_pointer_required () 119718334Speter 119890285Sobrien/* Override this in other tm.h files to cope with various OS losage 119990285Sobrien requiring a frame pointer. */ 120090285Sobrien#ifndef SUBTARGET_FRAME_POINTER_REQUIRED 120190285Sobrien#define SUBTARGET_FRAME_POINTER_REQUIRED 0 120290285Sobrien#endif 120390285Sobrien 120490285Sobrien/* Make sure we can access arbitrary call frames. */ 120590285Sobrien#define SETUP_FRAME_ADDRESSES() ix86_setup_frame_addresses () 120690285Sobrien 120718334Speter/* Base register for access to arguments of the function. */ 120818334Speter#define ARG_POINTER_REGNUM 16 120918334Speter 121090285Sobrien/* Register in which static-chain is passed to a function. 121190285Sobrien We do use ECX as static chain register for 32 bit ABI. On the 121290285Sobrien 64bit ABI, ECX is an argument register, so we use R10 instead. */ 121390285Sobrien#define STATIC_CHAIN_REGNUM (TARGET_64BIT ? FIRST_REX_INT_REG + 10 - 8 : 2) 121418334Speter 121518334Speter/* Register to hold the addressing base for position independent 121696294Sobrien code access to data items. We don't use PIC pointer for 64bit 121796294Sobrien mode. Define the regnum to dummy value to prevent gcc from 1218117407Skan pessimizing code dealing with EBX. 121918334Speter 1220117407Skan To avoid clobbering a call-saved register unnecessarily, we renumber 1221117407Skan the pic register when possible. The change is visible after the 1222117407Skan prologue has been emitted. */ 1223117407Skan 1224117407Skan#define REAL_PIC_OFFSET_TABLE_REGNUM 3 1225117407Skan 1226117407Skan#define PIC_OFFSET_TABLE_REGNUM \ 1227117407Skan (TARGET_64BIT || !flag_pic ? INVALID_REGNUM \ 1228117407Skan : reload_completed ? REGNO (pic_offset_table_rtx) \ 1229117407Skan : REAL_PIC_OFFSET_TABLE_REGNUM) 1230117407Skan 1231117407Skan#define GOT_SYMBOL_NAME "_GLOBAL_OFFSET_TABLE_" 1232117407Skan 123318334Speter/* Register in which address to store a structure value 123418334Speter arrives in the function. On the 386, the prologue 123518334Speter copies this from the stack to register %eax. */ 123618334Speter#define STRUCT_VALUE_INCOMING 0 123718334Speter 123818334Speter/* Place in which caller passes the structure value address. 123918334Speter 0 means push the value on the stack like an argument. */ 124018334Speter#define STRUCT_VALUE 0 124118334Speter 124218334Speter/* A C expression which can inhibit the returning of certain function 124318334Speter values in registers, based on the type of value. A nonzero value 124418334Speter says to return the function value in memory, just as large 124518334Speter structures are always returned. Here TYPE will be a C expression 124618334Speter of type `tree', representing the data type of the value. 124718334Speter 124818334Speter Note that values of mode `BLKmode' must be explicitly handled by 124918334Speter this macro. Also, the option `-fpcc-struct-return' takes effect 125018334Speter regardless of this macro. On most systems, it is possible to 125118334Speter leave the macro undefined; this causes a default definition to be 125218334Speter used, whose value is the constant 1 for `BLKmode' values, and 0 125318334Speter otherwise. 125418334Speter 125518334Speter Do not use this macro to indicate that structures and unions 125618334Speter should always be returned in memory. You should instead use 125718334Speter `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */ 125818334Speter 125918334Speter#define RETURN_IN_MEMORY(TYPE) \ 126090285Sobrien ix86_return_in_memory (TYPE) 126118334Speter 1262132744Skan/* This is overridden by <cygwin.h>. */ 1263132744Skan#define MS_AGGREGATE_RETURN 0 1264132744Skan 126518334Speter 126618334Speter/* Define the classes of registers for register constraints in the 126718334Speter machine description. Also define ranges of constants. 126818334Speter 126918334Speter One of the classes must always be named ALL_REGS and include all hard regs. 127018334Speter If there is more than one class, another class must be named NO_REGS 127118334Speter and contain no registers. 127218334Speter 127318334Speter The name GENERAL_REGS must be the name of a class (or an alias for 127418334Speter another name such as ALL_REGS). This is the class of registers 127518334Speter that is allowed by "g" or "r" in a register constraint. 127618334Speter Also, registers outside this class are allocated only when 127718334Speter instructions express preferences for them. 127818334Speter 127918334Speter The classes must be numbered in nondecreasing order; that is, 128018334Speter a larger-numbered class must never be contained completely 128118334Speter in a smaller-numbered class. 128218334Speter 128318334Speter For any two classes, it is very desirable that there be another 128418334Speter class that represents their union. 128518334Speter 128618334Speter It might seem that class BREG is unnecessary, since no useful 386 128718334Speter opcode needs reg %ebx. But some systems pass args to the OS in ebx, 128890285Sobrien and the "b" register constraint is useful in asms for syscalls. 128918334Speter 129090285Sobrien The flags and fpsr registers are in no class. */ 129190285Sobrien 129218334Speterenum reg_class 129318334Speter{ 129418334Speter NO_REGS, 129590285Sobrien AREG, DREG, CREG, BREG, SIREG, DIREG, 129618334Speter AD_REGS, /* %eax/%edx for DImode */ 129718334Speter Q_REGS, /* %eax %ebx %ecx %edx */ 129890285Sobrien NON_Q_REGS, /* %esi %edi %ebp %esp */ 129918334Speter INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */ 130090285Sobrien LEGACY_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */ 130190285Sobrien GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp %r8 - %r15*/ 130218334Speter FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */ 130318334Speter FLOAT_REGS, 130490285Sobrien SSE_REGS, 130590285Sobrien MMX_REGS, 130690285Sobrien FP_TOP_SSE_REGS, 130790285Sobrien FP_SECOND_SSE_REGS, 130890285Sobrien FLOAT_SSE_REGS, 130990285Sobrien FLOAT_INT_REGS, 131090285Sobrien INT_SSE_REGS, 131190285Sobrien FLOAT_INT_SSE_REGS, 131218334Speter ALL_REGS, LIM_REG_CLASSES 131318334Speter}; 131418334Speter 131590285Sobrien#define N_REG_CLASSES ((int) LIM_REG_CLASSES) 131618334Speter 131790285Sobrien#define INTEGER_CLASS_P(CLASS) \ 131890285Sobrien reg_class_subset_p ((CLASS), GENERAL_REGS) 131990285Sobrien#define FLOAT_CLASS_P(CLASS) \ 132090285Sobrien reg_class_subset_p ((CLASS), FLOAT_REGS) 132190285Sobrien#define SSE_CLASS_P(CLASS) \ 132290285Sobrien reg_class_subset_p ((CLASS), SSE_REGS) 132390285Sobrien#define MMX_CLASS_P(CLASS) \ 132490285Sobrien reg_class_subset_p ((CLASS), MMX_REGS) 132590285Sobrien#define MAYBE_INTEGER_CLASS_P(CLASS) \ 132690285Sobrien reg_classes_intersect_p ((CLASS), GENERAL_REGS) 132790285Sobrien#define MAYBE_FLOAT_CLASS_P(CLASS) \ 132890285Sobrien reg_classes_intersect_p ((CLASS), FLOAT_REGS) 132990285Sobrien#define MAYBE_SSE_CLASS_P(CLASS) \ 133090285Sobrien reg_classes_intersect_p (SSE_REGS, (CLASS)) 133190285Sobrien#define MAYBE_MMX_CLASS_P(CLASS) \ 133290285Sobrien reg_classes_intersect_p (MMX_REGS, (CLASS)) 133318334Speter 133490285Sobrien#define Q_CLASS_P(CLASS) \ 133590285Sobrien reg_class_subset_p ((CLASS), Q_REGS) 133690285Sobrien 1337132744Skan/* Give names of register classes as strings for dump file. */ 133818334Speter 133918334Speter#define REG_CLASS_NAMES \ 134018334Speter{ "NO_REGS", \ 134118334Speter "AREG", "DREG", "CREG", "BREG", \ 134290285Sobrien "SIREG", "DIREG", \ 134318334Speter "AD_REGS", \ 134490285Sobrien "Q_REGS", "NON_Q_REGS", \ 134518334Speter "INDEX_REGS", \ 134690285Sobrien "LEGACY_REGS", \ 134718334Speter "GENERAL_REGS", \ 134818334Speter "FP_TOP_REG", "FP_SECOND_REG", \ 134918334Speter "FLOAT_REGS", \ 135090285Sobrien "SSE_REGS", \ 135190285Sobrien "MMX_REGS", \ 135290285Sobrien "FP_TOP_SSE_REGS", \ 135390285Sobrien "FP_SECOND_SSE_REGS", \ 135490285Sobrien "FLOAT_SSE_REGS", \ 135590285Sobrien "FLOAT_INT_REGS", \ 135690285Sobrien "INT_SSE_REGS", \ 135790285Sobrien "FLOAT_INT_SSE_REGS", \ 135818334Speter "ALL_REGS" } 135918334Speter 136018334Speter/* Define which registers fit in which classes. 136118334Speter This is an initializer for a vector of HARD_REG_SET 136218334Speter of length N_REG_CLASSES. */ 136318334Speter 136490285Sobrien#define REG_CLASS_CONTENTS \ 136590285Sobrien{ { 0x00, 0x0 }, \ 136690285Sobrien { 0x01, 0x0 }, { 0x02, 0x0 }, /* AREG, DREG */ \ 136790285Sobrien { 0x04, 0x0 }, { 0x08, 0x0 }, /* CREG, BREG */ \ 136890285Sobrien { 0x10, 0x0 }, { 0x20, 0x0 }, /* SIREG, DIREG */ \ 136990285Sobrien { 0x03, 0x0 }, /* AD_REGS */ \ 137090285Sobrien { 0x0f, 0x0 }, /* Q_REGS */ \ 137190285Sobrien { 0x1100f0, 0x1fe0 }, /* NON_Q_REGS */ \ 137290285Sobrien { 0x7f, 0x1fe0 }, /* INDEX_REGS */ \ 137390285Sobrien { 0x1100ff, 0x0 }, /* LEGACY_REGS */ \ 137490285Sobrien { 0x1100ff, 0x1fe0 }, /* GENERAL_REGS */ \ 137590285Sobrien { 0x100, 0x0 }, { 0x0200, 0x0 },/* FP_TOP_REG, FP_SECOND_REG */\ 137690285Sobrien { 0xff00, 0x0 }, /* FLOAT_REGS */ \ 137790285Sobrien{ 0x1fe00000,0x1fe000 }, /* SSE_REGS */ \ 137890285Sobrien{ 0xe0000000, 0x1f }, /* MMX_REGS */ \ 137990285Sobrien{ 0x1fe00100,0x1fe000 }, /* FP_TOP_SSE_REG */ \ 138090285Sobrien{ 0x1fe00200,0x1fe000 }, /* FP_SECOND_SSE_REG */ \ 138190285Sobrien{ 0x1fe0ff00,0x1fe000 }, /* FLOAT_SSE_REGS */ \ 138290285Sobrien { 0x1ffff, 0x1fe0 }, /* FLOAT_INT_REGS */ \ 138390285Sobrien{ 0x1fe100ff,0x1fffe0 }, /* INT_SSE_REGS */ \ 138490285Sobrien{ 0x1fe1ffff,0x1fffe0 }, /* FLOAT_INT_SSE_REGS */ \ 138590285Sobrien{ 0xffffffff,0x1fffff } \ 138690285Sobrien} 138718334Speter 138818334Speter/* The same information, inverted: 138918334Speter Return the class number of the smallest class containing 139018334Speter reg number REGNO. This could be a conditional expression 139118334Speter or could index an array. */ 139218334Speter 139318334Speter#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO]) 139418334Speter 139518334Speter/* When defined, the compiler allows registers explicitly used in the 139618334Speter rtl to be used as spill registers but prevents the compiler from 139790285Sobrien extending the lifetime of these registers. */ 139818334Speter 139950654Sobrien#define SMALL_REGISTER_CLASSES 1 140018334Speter 140118334Speter#define QI_REG_P(X) \ 140218334Speter (REG_P (X) && REGNO (X) < 4) 140390285Sobrien 140490285Sobrien#define GENERAL_REGNO_P(N) \ 140590285Sobrien ((N) < 8 || REX_INT_REGNO_P (N)) 140690285Sobrien 140790285Sobrien#define GENERAL_REG_P(X) \ 140890285Sobrien (REG_P (X) && GENERAL_REGNO_P (REGNO (X))) 140990285Sobrien 141090285Sobrien#define ANY_QI_REG_P(X) (TARGET_64BIT ? GENERAL_REG_P(X) : QI_REG_P (X)) 141190285Sobrien 141218334Speter#define NON_QI_REG_P(X) \ 141318334Speter (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER) 141418334Speter 141590285Sobrien#define REX_INT_REGNO_P(N) ((N) >= FIRST_REX_INT_REG && (N) <= LAST_REX_INT_REG) 141690285Sobrien#define REX_INT_REG_P(X) (REG_P (X) && REX_INT_REGNO_P (REGNO (X))) 141790285Sobrien 141818334Speter#define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X))) 141990285Sobrien#define FP_REGNO_P(N) ((N) >= FIRST_STACK_REG && (N) <= LAST_STACK_REG) 142090285Sobrien#define ANY_FP_REG_P(X) (REG_P (X) && ANY_FP_REGNO_P (REGNO (X))) 142190285Sobrien#define ANY_FP_REGNO_P(N) (FP_REGNO_P (N) || SSE_REGNO_P (N)) 142290285Sobrien 142390285Sobrien#define SSE_REGNO_P(N) \ 142490285Sobrien (((N) >= FIRST_SSE_REG && (N) <= LAST_SSE_REG) \ 142590285Sobrien || ((N) >= FIRST_REX_SSE_REG && (N) <= LAST_REX_SSE_REG)) 142690285Sobrien 1427132744Skan#define REX_SSE_REGNO_P(N) \ 1428132744Skan ((N) >= FIRST_REX_SSE_REG && (N) <= LAST_REX_SSE_REG) 1429132744Skan 143090285Sobrien#define SSE_REGNO(N) \ 143190285Sobrien ((N) < 8 ? FIRST_SSE_REG + (N) : FIRST_REX_SSE_REG + (N) - 8) 143290285Sobrien#define SSE_REG_P(N) (REG_P (N) && SSE_REGNO_P (REGNO (N))) 143390285Sobrien 143490285Sobrien#define SSE_FLOAT_MODE_P(MODE) \ 143596294Sobrien ((TARGET_SSE && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode)) 143690285Sobrien 143790285Sobrien#define MMX_REGNO_P(N) ((N) >= FIRST_MMX_REG && (N) <= LAST_MMX_REG) 143890285Sobrien#define MMX_REG_P(XOP) (REG_P (XOP) && MMX_REGNO_P (REGNO (XOP))) 1439117407Skan 144090285Sobrien#define STACK_REG_P(XOP) \ 144190285Sobrien (REG_P (XOP) && \ 144290285Sobrien REGNO (XOP) >= FIRST_STACK_REG && \ 144390285Sobrien REGNO (XOP) <= LAST_STACK_REG) 144418334Speter 144590285Sobrien#define NON_STACK_REG_P(XOP) (REG_P (XOP) && ! STACK_REG_P (XOP)) 144618334Speter 144790285Sobrien#define STACK_TOP_P(XOP) (REG_P (XOP) && REGNO (XOP) == FIRST_STACK_REG) 144818334Speter 144990285Sobrien#define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X))) 145090285Sobrien#define CC_REGNO_P(X) ((X) == FLAGS_REG || (X) == FPSR_REG) 145118334Speter 145218334Speter/* The class value for index registers, and the one for base regs. */ 145318334Speter 145418334Speter#define INDEX_REG_CLASS INDEX_REGS 145518334Speter#define BASE_REG_CLASS GENERAL_REGS 145618334Speter 145718334Speter/* Get reg_class from a letter such as appears in the machine description. */ 145818334Speter 145918334Speter#define REG_CLASS_FROM_LETTER(C) \ 146018334Speter ((C) == 'r' ? GENERAL_REGS : \ 146190285Sobrien (C) == 'R' ? LEGACY_REGS : \ 146290285Sobrien (C) == 'q' ? TARGET_64BIT ? GENERAL_REGS : Q_REGS : \ 146390285Sobrien (C) == 'Q' ? Q_REGS : \ 146418334Speter (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \ 146518334Speter ? FLOAT_REGS \ 146618334Speter : NO_REGS) : \ 146718334Speter (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \ 146818334Speter ? FP_TOP_REG \ 146918334Speter : NO_REGS) : \ 147018334Speter (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \ 147118334Speter ? FP_SECOND_REG \ 147218334Speter : NO_REGS) : \ 147318334Speter (C) == 'a' ? AREG : \ 147418334Speter (C) == 'b' ? BREG : \ 147518334Speter (C) == 'c' ? CREG : \ 147618334Speter (C) == 'd' ? DREG : \ 147790285Sobrien (C) == 'x' ? TARGET_SSE ? SSE_REGS : NO_REGS : \ 147890285Sobrien (C) == 'Y' ? TARGET_SSE2? SSE_REGS : NO_REGS : \ 147990285Sobrien (C) == 'y' ? TARGET_MMX ? MMX_REGS : NO_REGS : \ 148018334Speter (C) == 'A' ? AD_REGS : \ 148118334Speter (C) == 'D' ? DIREG : \ 148218334Speter (C) == 'S' ? SIREG : NO_REGS) 148318334Speter 148418334Speter/* The letters I, J, K, L and M in a register constraint string 148518334Speter can be used to stand for particular ranges of immediate operands. 148618334Speter This macro defines what the ranges are. 148718334Speter C is the letter, and VALUE is a constant value. 148818334Speter Return 1 if VALUE is in the range specified by C. 148918334Speter 149018334Speter I is for non-DImode shifts. 149118334Speter J is for DImode shifts. 149290285Sobrien K is for signed imm8 operands. 149390285Sobrien L is for andsi as zero-extending move. 149418334Speter M is for shifts that can be executed by the "lea" opcode. 1495132744Skan N is for immediate operands for out/in instructions (0-255) 149618334Speter */ 149718334Speter 149890285Sobrien#define CONST_OK_FOR_LETTER_P(VALUE, C) \ 149990285Sobrien ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 \ 150090285Sobrien : (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 \ 150190285Sobrien : (C) == 'K' ? (VALUE) >= -128 && (VALUE) <= 127 \ 150290285Sobrien : (C) == 'L' ? (VALUE) == 0xff || (VALUE) == 0xffff \ 150390285Sobrien : (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 \ 150490285Sobrien : (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 \ 150590285Sobrien : 0) 150618334Speter 150718334Speter/* Similar, but for floating constants, and defining letters G and H. 150818334Speter Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if 150918334Speter TARGET_387 isn't set, because the stack register converter may need to 151052295Sobrien load 0.0 into the function value register. */ 151118334Speter 151218334Speter#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 151390285Sobrien ((C) == 'G' ? standard_80387_constant_p (VALUE) \ 1514117407Skan : 0) 151518334Speter 151690285Sobrien/* A C expression that defines the optional machine-dependent 151790285Sobrien constraint letters that can be used to segregate specific types of 151890285Sobrien operands, usually memory references, for the target machine. Any 151990285Sobrien letter that is not elsewhere defined and not matched by 152090285Sobrien `REG_CLASS_FROM_LETTER' may be used. Normally this macro will not 152190285Sobrien be defined. 152290285Sobrien 152390285Sobrien If it is required for a particular target machine, it should 152490285Sobrien return 1 if VALUE corresponds to the operand type represented by 152590285Sobrien the constraint letter C. If C is not defined as an extra 152690285Sobrien constraint, the value returned should be 0 regardless of VALUE. */ 152790285Sobrien 1528117407Skan#define EXTRA_CONSTRAINT(VALUE, D) \ 1529117407Skan ((D) == 'e' ? x86_64_sign_extended_value (VALUE) \ 1530117407Skan : (D) == 'Z' ? x86_64_zero_extended_value (VALUE) \ 1531117407Skan : (D) == 'C' ? standard_sse_constant_p (VALUE) \ 153290285Sobrien : 0) 153390285Sobrien 153418334Speter/* Place additional restrictions on the register class to use when it 153518334Speter is necessary to be able to hold a value of mode MODE in a reload 153690285Sobrien register for which class CLASS would ordinarily be used. */ 153718334Speter 153890285Sobrien#define LIMIT_RELOAD_CLASS(MODE, CLASS) \ 153990285Sobrien ((MODE) == QImode && !TARGET_64BIT \ 154090285Sobrien && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS \ 154190285Sobrien || (CLASS) == LEGACY_REGS || (CLASS) == INDEX_REGS) \ 154218334Speter ? Q_REGS : (CLASS)) 154318334Speter 154418334Speter/* Given an rtx X being reloaded into a reg required to be 154518334Speter in class CLASS, return the class of reg to actually use. 154618334Speter In general this is just CLASS; but on some machines 154718334Speter in some cases it is preferable to use a more restrictive class. 154818334Speter On the 80386 series, we prevent floating constants from being 154918334Speter reloaded into floating registers (since no move-insn can do that) 155018334Speter and we ensure that QImodes aren't reloaded into the esi or edi reg. */ 155118334Speter 155218334Speter/* Put float CONST_DOUBLE in the constant pool instead of fp regs. 155318334Speter QImode must go into class Q_REGS. 155418334Speter Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and 155590285Sobrien movdf to do mem-to-mem moves through integer regs. */ 155618334Speter 155790285Sobrien#define PREFERRED_RELOAD_CLASS(X, CLASS) \ 155890285Sobrien ix86_preferred_reload_class ((X), (CLASS)) 155918334Speter 156018334Speter/* If we are copying between general and FP registers, we need a memory 156190285Sobrien location. The same is true for SSE and MMX registers. */ 156290285Sobrien#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ 156390285Sobrien ix86_secondary_memory_needed ((CLASS1), (CLASS2), (MODE), 1) 156418334Speter 156590285Sobrien/* QImode spills from non-QI registers need a scratch. This does not 1566117407Skan happen often -- the only example so far requires an uninitialized 156790285Sobrien pseudo. */ 156818334Speter 156990285Sobrien#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \ 157090285Sobrien (((CLASS) == GENERAL_REGS || (CLASS) == LEGACY_REGS \ 157190285Sobrien || (CLASS) == INDEX_REGS) && !TARGET_64BIT && (MODE) == QImode \ 157290285Sobrien ? Q_REGS : NO_REGS) 157390285Sobrien 157418334Speter/* Return the maximum number of consecutive registers 157518334Speter needed to represent mode MODE in a register of class CLASS. */ 157618334Speter/* On the 80386, this is the size of MODE in words, 1577132744Skan except in the FP regs, where a single reg is always enough. */ 157890285Sobrien#define CLASS_MAX_NREGS(CLASS, MODE) \ 157990285Sobrien (!MAYBE_INTEGER_CLASS_P (CLASS) \ 158090285Sobrien ? (COMPLEX_MODE_P (MODE) ? 2 : 1) \ 1581132744Skan : (((((MODE) == XFmode ? 12 : GET_MODE_SIZE (MODE))) \ 1582132744Skan + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 158318334Speter 158418334Speter/* A C expression whose value is nonzero if pseudos that have been 158518334Speter assigned to registers of class CLASS would likely be spilled 158618334Speter because registers of CLASS are needed for spill registers. 158718334Speter 158818334Speter The default value of this macro returns 1 if CLASS has exactly one 158918334Speter register and zero otherwise. On most machines, this default 159018334Speter should be used. Only define this macro to some other expression 159118334Speter if pseudo allocated by `local-alloc.c' end up in memory because 159218334Speter their hard registers were needed for spill registers. If this 159318334Speter macro returns nonzero for those classes, those pseudos will only 159418334Speter be allocated by `global.c', which knows how to reallocate the 159518334Speter pseudo to another register. If there would not be another 159618334Speter register available for reallocation, you should not change the 159718334Speter definition of this macro since the only effect of such a 159818334Speter definition would be to slow down register allocation. */ 159918334Speter 160018334Speter#define CLASS_LIKELY_SPILLED_P(CLASS) \ 160118334Speter (((CLASS) == AREG) \ 160218334Speter || ((CLASS) == DREG) \ 160318334Speter || ((CLASS) == CREG) \ 160418334Speter || ((CLASS) == BREG) \ 160518334Speter || ((CLASS) == AD_REGS) \ 160618334Speter || ((CLASS) == SIREG) \ 1607132744Skan || ((CLASS) == DIREG) \ 1608132744Skan || ((CLASS) == FP_TOP_REG) \ 1609132744Skan || ((CLASS) == FP_SECOND_REG)) 161018334Speter 1611117407Skan/* Return a class of registers that cannot change FROM mode to TO mode. 1612117407Skan 1613117407Skan x87 registers can't do subreg as all values are reformated to extended 1614117407Skan precision. XMM registers does not support with nonzero offsets equal 1615117407Skan to 4, 8 and 12 otherwise valid for integer registers. Since we can't 1616117407Skan determine these, prohibit all nonparadoxical subregs changing size. */ 1617117407Skan 1618117407Skan#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ 1619117407Skan (GET_MODE_SIZE (TO) < GET_MODE_SIZE (FROM) \ 1620117407Skan ? reg_classes_intersect_p (FLOAT_SSE_REGS, (CLASS)) \ 1621117407Skan || MAYBE_MMX_CLASS_P (CLASS) \ 1622117407Skan : GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ 1623117407Skan ? reg_classes_intersect_p (FLOAT_REGS, (CLASS)) : 0) 1624117407Skan 162590285Sobrien/* A C statement that adds to CLOBBERS any hard regs the port wishes 1626117407Skan to automatically clobber for all asms. 162790285Sobrien 162890285Sobrien We do this in the new i386 backend to maintain source compatibility 162990285Sobrien with the old cc0-based compiler. */ 163090285Sobrien 163190285Sobrien#define MD_ASM_CLOBBERS(CLOBBERS) \ 163290285Sobrien do { \ 163390285Sobrien (CLOBBERS) = tree_cons (NULL_TREE, build_string (5, "flags"), \ 163490285Sobrien (CLOBBERS)); \ 163590285Sobrien (CLOBBERS) = tree_cons (NULL_TREE, build_string (4, "fpsr"), \ 163690285Sobrien (CLOBBERS)); \ 163790285Sobrien (CLOBBERS) = tree_cons (NULL_TREE, build_string (7, "dirflag"), \ 163890285Sobrien (CLOBBERS)); \ 163990285Sobrien } while (0) 164018334Speter 164118334Speter/* Stack layout; function entry, exit and calling. */ 164218334Speter 164318334Speter/* Define this if pushing a word on the stack 164418334Speter makes the stack pointer a smaller address. */ 164518334Speter#define STACK_GROWS_DOWNWARD 164618334Speter 164718334Speter/* Define this if the nominal address of the stack frame 164818334Speter is at the high-address end of the local variables; 164918334Speter that is, each additional local variable allocated 165018334Speter goes at a more negative offset in the frame. */ 165118334Speter#define FRAME_GROWS_DOWNWARD 165218334Speter 165318334Speter/* Offset within stack frame to start allocating local variables at. 165418334Speter If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 165518334Speter first local allocated. Otherwise, it is the offset to the BEGINNING 165618334Speter of the first local allocated. */ 165718334Speter#define STARTING_FRAME_OFFSET 0 165818334Speter 165918334Speter/* If we generate an insn to push BYTES bytes, 166018334Speter this says how many the stack pointer really advances by. 166118334Speter On 386 pushw decrements by exactly 2 no matter what the position was. 166218334Speter On the 386 there is no pushb; we use pushw instead, and this 166390285Sobrien has the effect of rounding up to 2. 1664117407Skan 166590285Sobrien For 64bit ABI we round up to 8 bytes. 166690285Sobrien */ 166718334Speter 166890285Sobrien#define PUSH_ROUNDING(BYTES) \ 166990285Sobrien (TARGET_64BIT \ 167090285Sobrien ? (((BYTES) + 7) & (-8)) \ 167190285Sobrien : (((BYTES) + 1) & (-2))) 167218334Speter 167390285Sobrien/* If defined, the maximum amount of space required for outgoing arguments will 167490285Sobrien be computed and placed into the variable 167590285Sobrien `current_function_outgoing_args_size'. No space will be pushed onto the 167690285Sobrien stack for each call; instead, the function prologue should increase the stack 167790285Sobrien frame size by this amount. */ 167890285Sobrien 167990285Sobrien#define ACCUMULATE_OUTGOING_ARGS TARGET_ACCUMULATE_OUTGOING_ARGS 168090285Sobrien 168190285Sobrien/* If defined, a C expression whose value is nonzero when we want to use PUSH 168290285Sobrien instructions to pass outgoing arguments. */ 168390285Sobrien 168490285Sobrien#define PUSH_ARGS (TARGET_PUSH_ARGS && !ACCUMULATE_OUTGOING_ARGS) 168590285Sobrien 1686107598Sobrien/* We want the stack and args grow in opposite directions, even if 1687107598Sobrien PUSH_ARGS is 0. */ 1688107598Sobrien#define PUSH_ARGS_REVERSED 1 1689107598Sobrien 169018334Speter/* Offset of first parameter from the argument pointer register value. */ 169118334Speter#define FIRST_PARM_OFFSET(FNDECL) 0 169218334Speter 169390285Sobrien/* Define this macro if functions should assume that stack space has been 169490285Sobrien allocated for arguments even when their values are passed in registers. 169590285Sobrien 169690285Sobrien The value of this macro is the size, in bytes, of the area reserved for 169790285Sobrien arguments passed in registers for the function represented by FNDECL. 169890285Sobrien 169990285Sobrien This space can be allocated by the caller, or be a part of the 170090285Sobrien machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE' says 170190285Sobrien which. */ 170290285Sobrien#define REG_PARM_STACK_SPACE(FNDECL) 0 170390285Sobrien 170490285Sobrien/* Define as a C expression that evaluates to nonzero if we do not know how 170590285Sobrien to pass TYPE solely in registers. The file expr.h defines a 170690285Sobrien definition that is usually appropriate, refer to expr.h for additional 170790285Sobrien documentation. If `REG_PARM_STACK_SPACE' is defined, the argument will be 170890285Sobrien computed in the stack and then loaded into a register. */ 1709132744Skan#define MUST_PASS_IN_STACK(MODE, TYPE) ix86_must_pass_in_stack ((MODE), (TYPE)) 171090285Sobrien 171118334Speter/* Value is the number of bytes of arguments automatically 171218334Speter popped when returning from a subroutine call. 171318334Speter FUNDECL is the declaration node of the function (as a tree), 171418334Speter FUNTYPE is the data type of the function (as a tree), 171518334Speter or for a library call it is an identifier node for the subroutine name. 171618334Speter SIZE is the number of bytes of arguments passed on the stack. 171718334Speter 171818334Speter On the 80386, the RTD insn may be used to pop them if the number 171918334Speter of args is fixed, but if the number is variable then the caller 172018334Speter must pop them all. RTD can't be used for library calls now 172118334Speter because the library is compiled with the Unix compiler. 172218334Speter Use of RTD is a selectable option, since it is incompatible with 172318334Speter standard Unix calling sequences. If the option is not selected, 172418334Speter the caller must always pop the args. 172518334Speter 172618334Speter The attribute stdcall is equivalent to RTD on a per module basis. */ 172718334Speter 172890285Sobrien#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) \ 172990285Sobrien ix86_return_pops_args ((FUNDECL), (FUNTYPE), (SIZE)) 173018334Speter 173118334Speter/* Define how to find the value returned by a function. 173218334Speter VALTYPE is the data type of the value (as a tree). 173318334Speter If the precise function being called is known, FUNC is its FUNCTION_DECL; 173418334Speter otherwise, FUNC is 0. */ 173518334Speter#define FUNCTION_VALUE(VALTYPE, FUNC) \ 173690285Sobrien ix86_function_value (VALTYPE) 173718334Speter 173890285Sobrien#define FUNCTION_VALUE_REGNO_P(N) \ 173990285Sobrien ix86_function_value_regno_p (N) 174090285Sobrien 174118334Speter/* Define how to find the value returned by a library function 174218334Speter assuming the value has mode MODE. */ 174318334Speter 174418334Speter#define LIBCALL_VALUE(MODE) \ 174590285Sobrien ix86_libcall_value (MODE) 174618334Speter 174718334Speter/* Define the size of the result block used for communication between 174818334Speter untyped_call and untyped_return. The block contains a DImode value 174918334Speter followed by the block used by fnsave and frstor. */ 175018334Speter 175118334Speter#define APPLY_RESULT_SIZE (8+108) 175218334Speter 175318334Speter/* 1 if N is a possible register number for function argument passing. */ 175490285Sobrien#define FUNCTION_ARG_REGNO_P(N) ix86_function_arg_regno_p (N) 175518334Speter 175618334Speter/* Define a data type for recording info about an argument list 175718334Speter during the scan of that argument list. This data type should 175818334Speter hold all necessary information about the function itself 175918334Speter and about the args processed so far, enough to enable macros 176018334Speter such as FUNCTION_ARG to determine where the next arg should go. */ 176118334Speter 176290285Sobrientypedef struct ix86_args { 176318334Speter int words; /* # words passed so far */ 176418334Speter int nregs; /* # registers available for passing */ 176518334Speter int regno; /* next available register number */ 1766132744Skan int fastcall; /* fastcall calling convention is used */ 176790285Sobrien int sse_words; /* # sse words passed so far */ 176890285Sobrien int sse_nregs; /* # sse registers available for passing */ 1769132744Skan int warn_sse; /* True when we want to warn about SSE ABI. */ 1770132744Skan int warn_mmx; /* True when we want to warn about MMX ABI. */ 177190285Sobrien int sse_regno; /* next available sse register number */ 1772132744Skan int mmx_words; /* # mmx words passed so far */ 1773132744Skan int mmx_nregs; /* # mmx registers available for passing */ 1774132744Skan int mmx_regno; /* next available mmx register number */ 177590285Sobrien int maybe_vaarg; /* true for calls to possibly vardic fncts. */ 177618334Speter} CUMULATIVE_ARGS; 177718334Speter 177818334Speter/* Initialize a variable CUM of type CUMULATIVE_ARGS 177918334Speter for a call to a function whose data type is FNTYPE. 178018334Speter For a library call, FNTYPE is 0. */ 178118334Speter 1782132744Skan#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ 1783132744Skan init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME), (FNDECL)) 178418334Speter 178518334Speter/* Update the data in CUM to advance over an argument 178618334Speter of mode MODE and data type TYPE. 178718334Speter (TYPE is null for libcalls where that information may not be available.) */ 178818334Speter 178990285Sobrien#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 179090285Sobrien function_arg_advance (&(CUM), (MODE), (TYPE), (NAMED)) 179118334Speter 179218334Speter/* Define where to put the arguments to a function. 179318334Speter Value is zero to push the argument on the stack, 179418334Speter or a hard register in which to store the argument. 179518334Speter 179618334Speter MODE is the argument's machine mode. 179718334Speter TYPE is the data type of the argument (as a tree). 179818334Speter This is null for libcalls where that information may 179918334Speter not be available. 180018334Speter CUM is a variable of type CUMULATIVE_ARGS which gives info about 180118334Speter the preceding args and about the function being called. 180218334Speter NAMED is nonzero if this argument is a named parameter 180318334Speter (otherwise it is an extra parameter matching an ellipsis). */ 180418334Speter 180518334Speter#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 180690285Sobrien function_arg (&(CUM), (MODE), (TYPE), (NAMED)) 180718334Speter 180818334Speter/* For an arg passed partly in registers and partly in memory, 180918334Speter this is the number of registers used. 181018334Speter For args passed entirely in registers or entirely in memory, zero. */ 181118334Speter 181290285Sobrien#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0 181318334Speter 1814117407Skan/* A C expression that indicates when an argument must be passed by 1815117407Skan reference. If nonzero for an argument, a copy of that argument is 1816117407Skan made in memory and a pointer to the argument is passed instead of 1817117407Skan the argument itself. The pointer is passed in whatever way is 1818117407Skan appropriate for passing a pointer to that type. */ 1819132744Skan 1820117407Skan#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ 1821117407Skan function_arg_pass_by_reference(&CUM, MODE, TYPE, NAMED) 1822132744Skan 182390285Sobrien/* Perform any needed actions needed for a function that is receiving a 182490285Sobrien variable number of arguments. 182550654Sobrien 182690285Sobrien CUM is as above. 182718334Speter 182890285Sobrien MODE and TYPE are the mode and type of the current parameter. 182918334Speter 183090285Sobrien PRETEND_SIZE is a variable that should be set to the amount of stack 183190285Sobrien that must be pushed by the prolog to pretend that our caller pushed 183290285Sobrien it. 183318334Speter 183490285Sobrien Normally, this macro will push all remaining incoming registers on the 183590285Sobrien stack and set PRETEND_SIZE to the length of the registers pushed. */ 183618334Speter 183790285Sobrien#define SETUP_INCOMING_VARARGS(CUM, MODE, TYPE, PRETEND_SIZE, NO_RTL) \ 183890285Sobrien ix86_setup_incoming_varargs (&(CUM), (MODE), (TYPE), &(PRETEND_SIZE), \ 183990285Sobrien (NO_RTL)) 184018334Speter 184190285Sobrien/* Implement `va_start' for varargs and stdarg. */ 1842117407Skan#define EXPAND_BUILTIN_VA_START(VALIST, NEXTARG) \ 1843117407Skan ix86_va_start (VALIST, NEXTARG) 184418334Speter 184590285Sobrien/* Implement `va_arg'. */ 184690285Sobrien#define EXPAND_BUILTIN_VA_ARG(VALIST, TYPE) \ 184790285Sobrien ix86_va_arg ((VALIST), (TYPE)) 184818334Speter 1849132744Skan#define TARGET_ASM_FILE_END ix86_file_end 1850132744Skan#define NEED_INDICATE_EXEC_STACK 0 185118334Speter 185290285Sobrien/* Output assembler code to FILE to increment profiler label # LABELNO 185390285Sobrien for profiling a function entry. */ 185450654Sobrien 1855117407Skan#define FUNCTION_PROFILER(FILE, LABELNO) x86_function_profiler (FILE, LABELNO) 185618334Speter 1857117407Skan#define MCOUNT_NAME "_mcount" 1858117407Skan 1859117407Skan#define PROFILE_COUNT_REGISTER "edx" 1860117407Skan 186118334Speter/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 186218334Speter the stack pointer does not matter. The value is tested only in 186318334Speter functions that have frame pointers. 186418334Speter No definition is equivalent to always zero. */ 1865117407Skan/* Note on the 386 it might be more efficient not to define this since 186618334Speter we have to restore it ourselves from the frame pointer, in order to 186718334Speter use pop */ 186818334Speter 186918334Speter#define EXIT_IGNORE_STACK 1 187018334Speter 187118334Speter/* Output assembler code for a block containing the constant parts 187218334Speter of a trampoline, leaving space for the variable parts. */ 187318334Speter 187452295Sobrien/* On the 386, the trampoline contains two instructions: 187518334Speter mov #STATIC,ecx 187652295Sobrien jmp FUNCTION 187752295Sobrien The trampoline is generated entirely at runtime. The operand of JMP 187852295Sobrien is the address of FUNCTION relative to the instruction following the 187952295Sobrien JMP (which is 5 bytes long). */ 188018334Speter 188118334Speter/* Length in units of the trampoline for entering a nested function. */ 188218334Speter 188390285Sobrien#define TRAMPOLINE_SIZE (TARGET_64BIT ? 23 : 10) 188418334Speter 188518334Speter/* Emit RTL insns to initialize the variable parts of a trampoline. 188618334Speter FNADDR is an RTX for the address of the function's pure code. 188718334Speter CXT is an RTX for the static chain value for the function. */ 188818334Speter 188990285Sobrien#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 189090285Sobrien x86_initialize_trampoline ((TRAMP), (FNADDR), (CXT)) 189118334Speter 189218334Speter/* Definitions for register eliminations. 189318334Speter 189418334Speter This is an array of structures. Each structure initializes one pair 189518334Speter of eliminable registers. The "from" register number is given first, 189618334Speter followed by "to". Eliminations of the same "from" register are listed 189718334Speter in order of preference. 189818334Speter 189990285Sobrien There are two registers that can always be eliminated on the i386. 190090285Sobrien The frame pointer and the arg pointer can be replaced by either the 190190285Sobrien hard frame pointer or to the stack pointer, depending upon the 190290285Sobrien circumstances. The hard frame pointer is not used before reload and 190390285Sobrien so it is not eligible for elimination. */ 190418334Speter 190590285Sobrien#define ELIMINABLE_REGS \ 190690285Sobrien{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 190790285Sobrien { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ 190890285Sobrien { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 190990285Sobrien { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} \ 191018334Speter 191190285Sobrien/* Given FROM and TO register numbers, say whether this elimination is 191290285Sobrien allowed. Frame pointer elimination is automatically handled. 191318334Speter 191418334Speter All other eliminations are valid. */ 191518334Speter 191690285Sobrien#define CAN_ELIMINATE(FROM, TO) \ 191790285Sobrien ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1) 191818334Speter 191918334Speter/* Define the offset between two registers, one to be eliminated, and the other 192018334Speter its replacement, at the start of a routine. */ 192118334Speter 192290285Sobrien#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 192390285Sobrien ((OFFSET) = ix86_initial_elimination_offset ((FROM), (TO))) 192418334Speter 192518334Speter/* Addressing modes, and classification of registers for them. */ 192618334Speter 192718334Speter/* Macros to check register numbers against specific register classes. */ 192818334Speter 192918334Speter/* These assume that REGNO is a hard or pseudo reg number. 193018334Speter They give nonzero only if REGNO is a hard reg of the suitable class 193118334Speter or a pseudo reg currently allocated to a suitable hard reg. 193218334Speter Since they use reg_renumber, they are safe only once reg_renumber 193318334Speter has been allocated, which happens in local-alloc.c. */ 193418334Speter 193590285Sobrien#define REGNO_OK_FOR_INDEX_P(REGNO) \ 193690285Sobrien ((REGNO) < STACK_POINTER_REGNUM \ 193790285Sobrien || (REGNO >= FIRST_REX_INT_REG \ 193890285Sobrien && (REGNO) <= LAST_REX_INT_REG) \ 193990285Sobrien || ((unsigned) reg_renumber[(REGNO)] >= FIRST_REX_INT_REG \ 194090285Sobrien && (unsigned) reg_renumber[(REGNO)] <= LAST_REX_INT_REG) \ 194190285Sobrien || (unsigned) reg_renumber[(REGNO)] < STACK_POINTER_REGNUM) 194218334Speter 194390285Sobrien#define REGNO_OK_FOR_BASE_P(REGNO) \ 194490285Sobrien ((REGNO) <= STACK_POINTER_REGNUM \ 194590285Sobrien || (REGNO) == ARG_POINTER_REGNUM \ 194690285Sobrien || (REGNO) == FRAME_POINTER_REGNUM \ 194790285Sobrien || (REGNO >= FIRST_REX_INT_REG \ 194890285Sobrien && (REGNO) <= LAST_REX_INT_REG) \ 194990285Sobrien || ((unsigned) reg_renumber[(REGNO)] >= FIRST_REX_INT_REG \ 195090285Sobrien && (unsigned) reg_renumber[(REGNO)] <= LAST_REX_INT_REG) \ 195190285Sobrien || (unsigned) reg_renumber[(REGNO)] <= STACK_POINTER_REGNUM) 195218334Speter 195390285Sobrien#define REGNO_OK_FOR_SIREG_P(REGNO) \ 195490285Sobrien ((REGNO) == 4 || reg_renumber[(REGNO)] == 4) 195590285Sobrien#define REGNO_OK_FOR_DIREG_P(REGNO) \ 195690285Sobrien ((REGNO) == 5 || reg_renumber[(REGNO)] == 5) 195718334Speter 195818334Speter/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 195918334Speter and check its validity for a certain class. 196018334Speter We have two alternate definitions for each of them. 196118334Speter The usual definition accepts all pseudo regs; the other rejects 196218334Speter them unless they have been allocated suitable hard regs. 196318334Speter The symbol REG_OK_STRICT causes the latter definition to be used. 196418334Speter 196518334Speter Most source files want to accept pseudo regs in the hope that 196618334Speter they will get allocated to the class that the insn wants them to be in. 196718334Speter Source files for reload pass need to be strict. 196818334Speter After reload, it makes no difference, since pseudo regs have 196918334Speter been eliminated by then. */ 197018334Speter 197118334Speter 197218334Speter/* Non strict versions, pseudos are ok */ 197318334Speter#define REG_OK_FOR_INDEX_NONSTRICT_P(X) \ 197418334Speter (REGNO (X) < STACK_POINTER_REGNUM \ 197590285Sobrien || (REGNO (X) >= FIRST_REX_INT_REG \ 197690285Sobrien && REGNO (X) <= LAST_REX_INT_REG) \ 197718334Speter || REGNO (X) >= FIRST_PSEUDO_REGISTER) 197818334Speter 197918334Speter#define REG_OK_FOR_BASE_NONSTRICT_P(X) \ 198018334Speter (REGNO (X) <= STACK_POINTER_REGNUM \ 198118334Speter || REGNO (X) == ARG_POINTER_REGNUM \ 198290285Sobrien || REGNO (X) == FRAME_POINTER_REGNUM \ 198390285Sobrien || (REGNO (X) >= FIRST_REX_INT_REG \ 198490285Sobrien && REGNO (X) <= LAST_REX_INT_REG) \ 198518334Speter || REGNO (X) >= FIRST_PSEUDO_REGISTER) 198618334Speter 198718334Speter/* Strict versions, hard registers only */ 198818334Speter#define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 198918334Speter#define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 199018334Speter 199118334Speter#ifndef REG_OK_STRICT 199290285Sobrien#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X) 199390285Sobrien#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P (X) 199418334Speter 199518334Speter#else 199690285Sobrien#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P (X) 199790285Sobrien#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X) 199818334Speter#endif 199918334Speter 200018334Speter/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 200118334Speter that is a valid memory address for an instruction. 200218334Speter The MODE argument is the machine mode for the MEM expression 200318334Speter that wants to use this address. 200418334Speter 200518334Speter The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, 200618334Speter except for CONSTANT_ADDRESS_P which is usually machine-independent. 200718334Speter 200818334Speter See legitimize_pic_address in i386.c for details as to what 200918334Speter constitutes a legitimate address when -fpic is used. */ 201018334Speter 201118334Speter#define MAX_REGS_PER_ADDRESS 2 201218334Speter 2013117407Skan#define CONSTANT_ADDRESS_P(X) constant_address_p (X) 201418334Speter 201518334Speter/* Nonzero if the constant value X is a legitimate general operand. 201618334Speter It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 201718334Speter 2018117407Skan#define LEGITIMATE_CONSTANT_P(X) legitimate_constant_p (X) 201918334Speter 202018334Speter#ifdef REG_OK_STRICT 202118334Speter#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 202290285Sobriendo { \ 202390285Sobrien if (legitimate_address_p ((MODE), (X), 1)) \ 202418334Speter goto ADDR; \ 202590285Sobrien} while (0) 202618334Speter 202718334Speter#else 202818334Speter#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 202990285Sobriendo { \ 203090285Sobrien if (legitimate_address_p ((MODE), (X), 0)) \ 203118334Speter goto ADDR; \ 203290285Sobrien} while (0) 203318334Speter 203418334Speter#endif 203518334Speter 203690285Sobrien/* If defined, a C expression to determine the base term of address X. 203790285Sobrien This macro is used in only one place: `find_base_term' in alias.c. 203890285Sobrien 203990285Sobrien It is always safe for this macro to not be defined. It exists so 204090285Sobrien that alias analysis can understand machine-dependent addresses. 204190285Sobrien 204290285Sobrien The typical use of this macro is to handle addresses containing 204390285Sobrien a label_ref or symbol_ref within an UNSPEC. */ 204490285Sobrien 204590285Sobrien#define FIND_BASE_TERM(X) ix86_find_base_term (X) 204690285Sobrien 204718334Speter/* Try machine-dependent ways of modifying an illegitimate address 204818334Speter to be legitimate. If we find one, return the new, valid address. 204918334Speter This macro is used in only one place: `memory_address' in explow.c. 205018334Speter 205118334Speter OLDX is the address as it was before break_out_memory_refs was called. 205218334Speter In some cases it is useful to look at this to decide what needs to be done. 205318334Speter 205418334Speter MODE and WIN are passed so that this macro can use 205518334Speter GO_IF_LEGITIMATE_ADDRESS. 205618334Speter 205718334Speter It is always safe for this macro to do nothing. It exists to recognize 205818334Speter opportunities to optimize the output. 205918334Speter 206018334Speter For the 80386, we handle X+REG by loading X into a register R and 206118334Speter using R+REG. R will go in a general reg and indexing will be used. 206218334Speter However, if REG is a broken-out memory address or multiplication, 206318334Speter nothing needs to be done because REG can certainly go in a general reg. 206418334Speter 206518334Speter When -fpic is used, special handling is needed for symbolic references. 206618334Speter See comments by legitimize_pic_address in i386.c for details. */ 206718334Speter 206818334Speter#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ 206990285Sobriendo { \ 207090285Sobrien (X) = legitimize_address ((X), (OLDX), (MODE)); \ 207190285Sobrien if (memory_address_p ((MODE), (X))) \ 207218334Speter goto WIN; \ 207390285Sobrien} while (0) 207418334Speter 207590285Sobrien#define REWRITE_ADDRESS(X) rewrite_address (X) 207650654Sobrien 207718334Speter/* Nonzero if the constant value X is a legitimate general operand 2078117407Skan when generating PIC code. It is given that flag_pic is on and 207918334Speter that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 208018334Speter 2081117407Skan#define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X) 208218334Speter 208318334Speter#define SYMBOLIC_CONST(X) \ 208490285Sobrien (GET_CODE (X) == SYMBOL_REF \ 208590285Sobrien || GET_CODE (X) == LABEL_REF \ 208690285Sobrien || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X))) 208718334Speter 208818334Speter/* Go to LABEL if ADDR (a legitimate address expression) 208918334Speter has an effect that depends on the machine mode it is used for. 209018334Speter On the 80386, only postdecrement and postincrement address depend thus 209118334Speter (the amount of decrement or increment being the length of the operand). */ 209290285Sobrien#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ 209390285Sobriendo { \ 209490285Sobrien if (GET_CODE (ADDR) == POST_INC \ 209590285Sobrien || GET_CODE (ADDR) == POST_DEC) \ 209690285Sobrien goto LABEL; \ 209790285Sobrien} while (0) 209818334Speter 209990285Sobrien/* Codes for all the SSE/MMX builtins. */ 210090285Sobrienenum ix86_builtins 210190285Sobrien{ 210290285Sobrien IX86_BUILTIN_ADDPS, 210390285Sobrien IX86_BUILTIN_ADDSS, 210490285Sobrien IX86_BUILTIN_DIVPS, 210590285Sobrien IX86_BUILTIN_DIVSS, 210690285Sobrien IX86_BUILTIN_MULPS, 210790285Sobrien IX86_BUILTIN_MULSS, 210890285Sobrien IX86_BUILTIN_SUBPS, 210990285Sobrien IX86_BUILTIN_SUBSS, 211090285Sobrien 211190285Sobrien IX86_BUILTIN_CMPEQPS, 211290285Sobrien IX86_BUILTIN_CMPLTPS, 211390285Sobrien IX86_BUILTIN_CMPLEPS, 211490285Sobrien IX86_BUILTIN_CMPGTPS, 211590285Sobrien IX86_BUILTIN_CMPGEPS, 211690285Sobrien IX86_BUILTIN_CMPNEQPS, 211790285Sobrien IX86_BUILTIN_CMPNLTPS, 211890285Sobrien IX86_BUILTIN_CMPNLEPS, 211990285Sobrien IX86_BUILTIN_CMPNGTPS, 212090285Sobrien IX86_BUILTIN_CMPNGEPS, 212190285Sobrien IX86_BUILTIN_CMPORDPS, 212290285Sobrien IX86_BUILTIN_CMPUNORDPS, 212390285Sobrien IX86_BUILTIN_CMPNEPS, 212490285Sobrien IX86_BUILTIN_CMPEQSS, 212590285Sobrien IX86_BUILTIN_CMPLTSS, 212690285Sobrien IX86_BUILTIN_CMPLESS, 212790285Sobrien IX86_BUILTIN_CMPNEQSS, 212890285Sobrien IX86_BUILTIN_CMPNLTSS, 212990285Sobrien IX86_BUILTIN_CMPNLESS, 213090285Sobrien IX86_BUILTIN_CMPORDSS, 213190285Sobrien IX86_BUILTIN_CMPUNORDSS, 213290285Sobrien IX86_BUILTIN_CMPNESS, 213390285Sobrien 213490285Sobrien IX86_BUILTIN_COMIEQSS, 213590285Sobrien IX86_BUILTIN_COMILTSS, 213690285Sobrien IX86_BUILTIN_COMILESS, 213790285Sobrien IX86_BUILTIN_COMIGTSS, 213890285Sobrien IX86_BUILTIN_COMIGESS, 213990285Sobrien IX86_BUILTIN_COMINEQSS, 214090285Sobrien IX86_BUILTIN_UCOMIEQSS, 214190285Sobrien IX86_BUILTIN_UCOMILTSS, 214290285Sobrien IX86_BUILTIN_UCOMILESS, 214390285Sobrien IX86_BUILTIN_UCOMIGTSS, 214490285Sobrien IX86_BUILTIN_UCOMIGESS, 214590285Sobrien IX86_BUILTIN_UCOMINEQSS, 214690285Sobrien 214790285Sobrien IX86_BUILTIN_CVTPI2PS, 214890285Sobrien IX86_BUILTIN_CVTPS2PI, 214990285Sobrien IX86_BUILTIN_CVTSI2SS, 2150117407Skan IX86_BUILTIN_CVTSI642SS, 215190285Sobrien IX86_BUILTIN_CVTSS2SI, 2152117407Skan IX86_BUILTIN_CVTSS2SI64, 215390285Sobrien IX86_BUILTIN_CVTTPS2PI, 215490285Sobrien IX86_BUILTIN_CVTTSS2SI, 2155117407Skan IX86_BUILTIN_CVTTSS2SI64, 215690285Sobrien 215790285Sobrien IX86_BUILTIN_MAXPS, 215890285Sobrien IX86_BUILTIN_MAXSS, 215990285Sobrien IX86_BUILTIN_MINPS, 216090285Sobrien IX86_BUILTIN_MINSS, 216190285Sobrien 216290285Sobrien IX86_BUILTIN_LOADAPS, 216390285Sobrien IX86_BUILTIN_LOADUPS, 216490285Sobrien IX86_BUILTIN_STOREAPS, 216590285Sobrien IX86_BUILTIN_STOREUPS, 216690285Sobrien IX86_BUILTIN_LOADSS, 216790285Sobrien IX86_BUILTIN_STORESS, 216890285Sobrien IX86_BUILTIN_MOVSS, 216990285Sobrien 217090285Sobrien IX86_BUILTIN_MOVHLPS, 217190285Sobrien IX86_BUILTIN_MOVLHPS, 217290285Sobrien IX86_BUILTIN_LOADHPS, 217390285Sobrien IX86_BUILTIN_LOADLPS, 217490285Sobrien IX86_BUILTIN_STOREHPS, 217590285Sobrien IX86_BUILTIN_STORELPS, 217690285Sobrien 217790285Sobrien IX86_BUILTIN_MASKMOVQ, 217890285Sobrien IX86_BUILTIN_MOVMSKPS, 217990285Sobrien IX86_BUILTIN_PMOVMSKB, 218090285Sobrien 218190285Sobrien IX86_BUILTIN_MOVNTPS, 218290285Sobrien IX86_BUILTIN_MOVNTQ, 218390285Sobrien 2184117407Skan IX86_BUILTIN_LOADDQA, 2185117407Skan IX86_BUILTIN_LOADDQU, 2186117407Skan IX86_BUILTIN_STOREDQA, 2187117407Skan IX86_BUILTIN_STOREDQU, 2188117407Skan IX86_BUILTIN_MOVQ, 2189117407Skan IX86_BUILTIN_LOADD, 2190117407Skan IX86_BUILTIN_STORED, 2191117407Skan 2192117407Skan IX86_BUILTIN_CLRTI, 2193117407Skan 219490285Sobrien IX86_BUILTIN_PACKSSWB, 219590285Sobrien IX86_BUILTIN_PACKSSDW, 219690285Sobrien IX86_BUILTIN_PACKUSWB, 219790285Sobrien 219890285Sobrien IX86_BUILTIN_PADDB, 219990285Sobrien IX86_BUILTIN_PADDW, 220090285Sobrien IX86_BUILTIN_PADDD, 2201117407Skan IX86_BUILTIN_PADDQ, 220290285Sobrien IX86_BUILTIN_PADDSB, 220390285Sobrien IX86_BUILTIN_PADDSW, 220490285Sobrien IX86_BUILTIN_PADDUSB, 220590285Sobrien IX86_BUILTIN_PADDUSW, 220690285Sobrien IX86_BUILTIN_PSUBB, 220790285Sobrien IX86_BUILTIN_PSUBW, 220890285Sobrien IX86_BUILTIN_PSUBD, 2209117407Skan IX86_BUILTIN_PSUBQ, 221090285Sobrien IX86_BUILTIN_PSUBSB, 221190285Sobrien IX86_BUILTIN_PSUBSW, 221290285Sobrien IX86_BUILTIN_PSUBUSB, 221390285Sobrien IX86_BUILTIN_PSUBUSW, 221490285Sobrien 221590285Sobrien IX86_BUILTIN_PAND, 221690285Sobrien IX86_BUILTIN_PANDN, 221790285Sobrien IX86_BUILTIN_POR, 221890285Sobrien IX86_BUILTIN_PXOR, 221990285Sobrien 222090285Sobrien IX86_BUILTIN_PAVGB, 222190285Sobrien IX86_BUILTIN_PAVGW, 222290285Sobrien 222390285Sobrien IX86_BUILTIN_PCMPEQB, 222490285Sobrien IX86_BUILTIN_PCMPEQW, 222590285Sobrien IX86_BUILTIN_PCMPEQD, 222690285Sobrien IX86_BUILTIN_PCMPGTB, 222790285Sobrien IX86_BUILTIN_PCMPGTW, 222890285Sobrien IX86_BUILTIN_PCMPGTD, 222990285Sobrien 223090285Sobrien IX86_BUILTIN_PEXTRW, 223190285Sobrien IX86_BUILTIN_PINSRW, 223290285Sobrien 223390285Sobrien IX86_BUILTIN_PMADDWD, 223490285Sobrien 223590285Sobrien IX86_BUILTIN_PMAXSW, 223690285Sobrien IX86_BUILTIN_PMAXUB, 223790285Sobrien IX86_BUILTIN_PMINSW, 223890285Sobrien IX86_BUILTIN_PMINUB, 223990285Sobrien 224090285Sobrien IX86_BUILTIN_PMULHUW, 224190285Sobrien IX86_BUILTIN_PMULHW, 224290285Sobrien IX86_BUILTIN_PMULLW, 224390285Sobrien 224490285Sobrien IX86_BUILTIN_PSADBW, 224590285Sobrien IX86_BUILTIN_PSHUFW, 224690285Sobrien 224790285Sobrien IX86_BUILTIN_PSLLW, 224890285Sobrien IX86_BUILTIN_PSLLD, 224990285Sobrien IX86_BUILTIN_PSLLQ, 225090285Sobrien IX86_BUILTIN_PSRAW, 225190285Sobrien IX86_BUILTIN_PSRAD, 225290285Sobrien IX86_BUILTIN_PSRLW, 225390285Sobrien IX86_BUILTIN_PSRLD, 225490285Sobrien IX86_BUILTIN_PSRLQ, 225590285Sobrien IX86_BUILTIN_PSLLWI, 225690285Sobrien IX86_BUILTIN_PSLLDI, 225790285Sobrien IX86_BUILTIN_PSLLQI, 225890285Sobrien IX86_BUILTIN_PSRAWI, 225990285Sobrien IX86_BUILTIN_PSRADI, 226090285Sobrien IX86_BUILTIN_PSRLWI, 226190285Sobrien IX86_BUILTIN_PSRLDI, 226290285Sobrien IX86_BUILTIN_PSRLQI, 226390285Sobrien 226490285Sobrien IX86_BUILTIN_PUNPCKHBW, 226590285Sobrien IX86_BUILTIN_PUNPCKHWD, 226690285Sobrien IX86_BUILTIN_PUNPCKHDQ, 226790285Sobrien IX86_BUILTIN_PUNPCKLBW, 226890285Sobrien IX86_BUILTIN_PUNPCKLWD, 226990285Sobrien IX86_BUILTIN_PUNPCKLDQ, 227090285Sobrien 227190285Sobrien IX86_BUILTIN_SHUFPS, 227290285Sobrien 227390285Sobrien IX86_BUILTIN_RCPPS, 227490285Sobrien IX86_BUILTIN_RCPSS, 227590285Sobrien IX86_BUILTIN_RSQRTPS, 227690285Sobrien IX86_BUILTIN_RSQRTSS, 227790285Sobrien IX86_BUILTIN_SQRTPS, 227890285Sobrien IX86_BUILTIN_SQRTSS, 2279117407Skan 228090285Sobrien IX86_BUILTIN_UNPCKHPS, 228190285Sobrien IX86_BUILTIN_UNPCKLPS, 228290285Sobrien 228390285Sobrien IX86_BUILTIN_ANDPS, 228490285Sobrien IX86_BUILTIN_ANDNPS, 228590285Sobrien IX86_BUILTIN_ORPS, 228690285Sobrien IX86_BUILTIN_XORPS, 228790285Sobrien 228890285Sobrien IX86_BUILTIN_EMMS, 228990285Sobrien IX86_BUILTIN_LDMXCSR, 229090285Sobrien IX86_BUILTIN_STMXCSR, 229190285Sobrien IX86_BUILTIN_SFENCE, 229290285Sobrien 229390285Sobrien /* 3DNow! Original */ 229490285Sobrien IX86_BUILTIN_FEMMS, 229590285Sobrien IX86_BUILTIN_PAVGUSB, 229690285Sobrien IX86_BUILTIN_PF2ID, 229790285Sobrien IX86_BUILTIN_PFACC, 229890285Sobrien IX86_BUILTIN_PFADD, 229990285Sobrien IX86_BUILTIN_PFCMPEQ, 230090285Sobrien IX86_BUILTIN_PFCMPGE, 230190285Sobrien IX86_BUILTIN_PFCMPGT, 230290285Sobrien IX86_BUILTIN_PFMAX, 230390285Sobrien IX86_BUILTIN_PFMIN, 230490285Sobrien IX86_BUILTIN_PFMUL, 230590285Sobrien IX86_BUILTIN_PFRCP, 230690285Sobrien IX86_BUILTIN_PFRCPIT1, 230790285Sobrien IX86_BUILTIN_PFRCPIT2, 230890285Sobrien IX86_BUILTIN_PFRSQIT1, 230990285Sobrien IX86_BUILTIN_PFRSQRT, 231090285Sobrien IX86_BUILTIN_PFSUB, 231190285Sobrien IX86_BUILTIN_PFSUBR, 231290285Sobrien IX86_BUILTIN_PI2FD, 231390285Sobrien IX86_BUILTIN_PMULHRW, 231490285Sobrien 231590285Sobrien /* 3DNow! Athlon Extensions */ 231690285Sobrien IX86_BUILTIN_PF2IW, 231790285Sobrien IX86_BUILTIN_PFNACC, 231890285Sobrien IX86_BUILTIN_PFPNACC, 231990285Sobrien IX86_BUILTIN_PI2FW, 232090285Sobrien IX86_BUILTIN_PSWAPDSI, 232190285Sobrien IX86_BUILTIN_PSWAPDSF, 232290285Sobrien 232390285Sobrien IX86_BUILTIN_SSE_ZERO, 232490285Sobrien IX86_BUILTIN_MMX_ZERO, 232590285Sobrien 2326117407Skan /* SSE2 */ 2327117407Skan IX86_BUILTIN_ADDPD, 2328117407Skan IX86_BUILTIN_ADDSD, 2329117407Skan IX86_BUILTIN_DIVPD, 2330117407Skan IX86_BUILTIN_DIVSD, 2331117407Skan IX86_BUILTIN_MULPD, 2332117407Skan IX86_BUILTIN_MULSD, 2333117407Skan IX86_BUILTIN_SUBPD, 2334117407Skan IX86_BUILTIN_SUBSD, 233518334Speter 2336117407Skan IX86_BUILTIN_CMPEQPD, 2337117407Skan IX86_BUILTIN_CMPLTPD, 2338117407Skan IX86_BUILTIN_CMPLEPD, 2339117407Skan IX86_BUILTIN_CMPGTPD, 2340117407Skan IX86_BUILTIN_CMPGEPD, 2341117407Skan IX86_BUILTIN_CMPNEQPD, 2342117407Skan IX86_BUILTIN_CMPNLTPD, 2343117407Skan IX86_BUILTIN_CMPNLEPD, 2344117407Skan IX86_BUILTIN_CMPNGTPD, 2345117407Skan IX86_BUILTIN_CMPNGEPD, 2346117407Skan IX86_BUILTIN_CMPORDPD, 2347117407Skan IX86_BUILTIN_CMPUNORDPD, 2348117407Skan IX86_BUILTIN_CMPNEPD, 2349117407Skan IX86_BUILTIN_CMPEQSD, 2350117407Skan IX86_BUILTIN_CMPLTSD, 2351117407Skan IX86_BUILTIN_CMPLESD, 2352117407Skan IX86_BUILTIN_CMPNEQSD, 2353117407Skan IX86_BUILTIN_CMPNLTSD, 2354117407Skan IX86_BUILTIN_CMPNLESD, 2355117407Skan IX86_BUILTIN_CMPORDSD, 2356117407Skan IX86_BUILTIN_CMPUNORDSD, 2357117407Skan IX86_BUILTIN_CMPNESD, 235818334Speter 2359117407Skan IX86_BUILTIN_COMIEQSD, 2360117407Skan IX86_BUILTIN_COMILTSD, 2361117407Skan IX86_BUILTIN_COMILESD, 2362117407Skan IX86_BUILTIN_COMIGTSD, 2363117407Skan IX86_BUILTIN_COMIGESD, 2364117407Skan IX86_BUILTIN_COMINEQSD, 2365117407Skan IX86_BUILTIN_UCOMIEQSD, 2366117407Skan IX86_BUILTIN_UCOMILTSD, 2367117407Skan IX86_BUILTIN_UCOMILESD, 2368117407Skan IX86_BUILTIN_UCOMIGTSD, 2369117407Skan IX86_BUILTIN_UCOMIGESD, 2370117407Skan IX86_BUILTIN_UCOMINEQSD, 237118334Speter 2372117407Skan IX86_BUILTIN_MAXPD, 2373117407Skan IX86_BUILTIN_MAXSD, 2374117407Skan IX86_BUILTIN_MINPD, 2375117407Skan IX86_BUILTIN_MINSD, 237618334Speter 2377117407Skan IX86_BUILTIN_ANDPD, 2378117407Skan IX86_BUILTIN_ANDNPD, 2379117407Skan IX86_BUILTIN_ORPD, 2380117407Skan IX86_BUILTIN_XORPD, 238118334Speter 2382117407Skan IX86_BUILTIN_SQRTPD, 2383117407Skan IX86_BUILTIN_SQRTSD, 2384117407Skan 2385117407Skan IX86_BUILTIN_UNPCKHPD, 2386117407Skan IX86_BUILTIN_UNPCKLPD, 2387117407Skan 2388117407Skan IX86_BUILTIN_SHUFPD, 2389117407Skan 2390117407Skan IX86_BUILTIN_LOADAPD, 2391117407Skan IX86_BUILTIN_LOADUPD, 2392117407Skan IX86_BUILTIN_STOREAPD, 2393117407Skan IX86_BUILTIN_STOREUPD, 2394117407Skan IX86_BUILTIN_LOADSD, 2395117407Skan IX86_BUILTIN_STORESD, 2396117407Skan IX86_BUILTIN_MOVSD, 2397117407Skan 2398117407Skan IX86_BUILTIN_LOADHPD, 2399117407Skan IX86_BUILTIN_LOADLPD, 2400117407Skan IX86_BUILTIN_STOREHPD, 2401117407Skan IX86_BUILTIN_STORELPD, 2402117407Skan 2403117407Skan IX86_BUILTIN_CVTDQ2PD, 2404117407Skan IX86_BUILTIN_CVTDQ2PS, 2405117407Skan 2406117407Skan IX86_BUILTIN_CVTPD2DQ, 2407117407Skan IX86_BUILTIN_CVTPD2PI, 2408117407Skan IX86_BUILTIN_CVTPD2PS, 2409117407Skan IX86_BUILTIN_CVTTPD2DQ, 2410117407Skan IX86_BUILTIN_CVTTPD2PI, 2411117407Skan 2412117407Skan IX86_BUILTIN_CVTPI2PD, 2413117407Skan IX86_BUILTIN_CVTSI2SD, 2414117407Skan IX86_BUILTIN_CVTSI642SD, 2415117407Skan 2416117407Skan IX86_BUILTIN_CVTSD2SI, 2417117407Skan IX86_BUILTIN_CVTSD2SI64, 2418117407Skan IX86_BUILTIN_CVTSD2SS, 2419117407Skan IX86_BUILTIN_CVTSS2SD, 2420117407Skan IX86_BUILTIN_CVTTSD2SI, 2421117407Skan IX86_BUILTIN_CVTTSD2SI64, 2422117407Skan 2423117407Skan IX86_BUILTIN_CVTPS2DQ, 2424117407Skan IX86_BUILTIN_CVTPS2PD, 2425117407Skan IX86_BUILTIN_CVTTPS2DQ, 2426117407Skan 2427117407Skan IX86_BUILTIN_MOVNTI, 2428117407Skan IX86_BUILTIN_MOVNTPD, 2429117407Skan IX86_BUILTIN_MOVNTDQ, 2430117407Skan 2431117407Skan IX86_BUILTIN_SETPD1, 2432117407Skan IX86_BUILTIN_SETPD, 2433117407Skan IX86_BUILTIN_CLRPD, 2434117407Skan IX86_BUILTIN_SETRPD, 2435117407Skan IX86_BUILTIN_LOADPD1, 2436117407Skan IX86_BUILTIN_LOADRPD, 2437117407Skan IX86_BUILTIN_STOREPD1, 2438117407Skan IX86_BUILTIN_STORERPD, 2439117407Skan 2440117407Skan /* SSE2 MMX */ 2441117407Skan IX86_BUILTIN_MASKMOVDQU, 2442117407Skan IX86_BUILTIN_MOVMSKPD, 2443117407Skan IX86_BUILTIN_PMOVMSKB128, 2444117407Skan IX86_BUILTIN_MOVQ2DQ, 2445117407Skan IX86_BUILTIN_MOVDQ2Q, 2446117407Skan 2447117407Skan IX86_BUILTIN_PACKSSWB128, 2448117407Skan IX86_BUILTIN_PACKSSDW128, 2449117407Skan IX86_BUILTIN_PACKUSWB128, 2450117407Skan 2451117407Skan IX86_BUILTIN_PADDB128, 2452117407Skan IX86_BUILTIN_PADDW128, 2453117407Skan IX86_BUILTIN_PADDD128, 2454117407Skan IX86_BUILTIN_PADDQ128, 2455117407Skan IX86_BUILTIN_PADDSB128, 2456117407Skan IX86_BUILTIN_PADDSW128, 2457117407Skan IX86_BUILTIN_PADDUSB128, 2458117407Skan IX86_BUILTIN_PADDUSW128, 2459117407Skan IX86_BUILTIN_PSUBB128, 2460117407Skan IX86_BUILTIN_PSUBW128, 2461117407Skan IX86_BUILTIN_PSUBD128, 2462117407Skan IX86_BUILTIN_PSUBQ128, 2463117407Skan IX86_BUILTIN_PSUBSB128, 2464117407Skan IX86_BUILTIN_PSUBSW128, 2465117407Skan IX86_BUILTIN_PSUBUSB128, 2466117407Skan IX86_BUILTIN_PSUBUSW128, 2467117407Skan 2468117407Skan IX86_BUILTIN_PAND128, 2469117407Skan IX86_BUILTIN_PANDN128, 2470117407Skan IX86_BUILTIN_POR128, 2471117407Skan IX86_BUILTIN_PXOR128, 2472117407Skan 2473117407Skan IX86_BUILTIN_PAVGB128, 2474117407Skan IX86_BUILTIN_PAVGW128, 2475117407Skan 2476117407Skan IX86_BUILTIN_PCMPEQB128, 2477117407Skan IX86_BUILTIN_PCMPEQW128, 2478117407Skan IX86_BUILTIN_PCMPEQD128, 2479117407Skan IX86_BUILTIN_PCMPGTB128, 2480117407Skan IX86_BUILTIN_PCMPGTW128, 2481117407Skan IX86_BUILTIN_PCMPGTD128, 2482117407Skan 2483117407Skan IX86_BUILTIN_PEXTRW128, 2484117407Skan IX86_BUILTIN_PINSRW128, 2485117407Skan 2486117407Skan IX86_BUILTIN_PMADDWD128, 2487117407Skan 2488117407Skan IX86_BUILTIN_PMAXSW128, 2489117407Skan IX86_BUILTIN_PMAXUB128, 2490117407Skan IX86_BUILTIN_PMINSW128, 2491117407Skan IX86_BUILTIN_PMINUB128, 2492117407Skan 2493117407Skan IX86_BUILTIN_PMULUDQ, 2494117407Skan IX86_BUILTIN_PMULUDQ128, 2495117407Skan IX86_BUILTIN_PMULHUW128, 2496117407Skan IX86_BUILTIN_PMULHW128, 2497117407Skan IX86_BUILTIN_PMULLW128, 2498117407Skan 2499117407Skan IX86_BUILTIN_PSADBW128, 2500117407Skan IX86_BUILTIN_PSHUFHW, 2501117407Skan IX86_BUILTIN_PSHUFLW, 2502117407Skan IX86_BUILTIN_PSHUFD, 2503117407Skan 2504117407Skan IX86_BUILTIN_PSLLW128, 2505117407Skan IX86_BUILTIN_PSLLD128, 2506117407Skan IX86_BUILTIN_PSLLQ128, 2507117407Skan IX86_BUILTIN_PSRAW128, 2508117407Skan IX86_BUILTIN_PSRAD128, 2509117407Skan IX86_BUILTIN_PSRLW128, 2510117407Skan IX86_BUILTIN_PSRLD128, 2511117407Skan IX86_BUILTIN_PSRLQ128, 2512117407Skan IX86_BUILTIN_PSLLDQI128, 2513117407Skan IX86_BUILTIN_PSLLWI128, 2514117407Skan IX86_BUILTIN_PSLLDI128, 2515117407Skan IX86_BUILTIN_PSLLQI128, 2516117407Skan IX86_BUILTIN_PSRAWI128, 2517117407Skan IX86_BUILTIN_PSRADI128, 2518117407Skan IX86_BUILTIN_PSRLDQI128, 2519117407Skan IX86_BUILTIN_PSRLWI128, 2520117407Skan IX86_BUILTIN_PSRLDI128, 2521117407Skan IX86_BUILTIN_PSRLQI128, 2522117407Skan 2523117407Skan IX86_BUILTIN_PUNPCKHBW128, 2524117407Skan IX86_BUILTIN_PUNPCKHWD128, 2525117407Skan IX86_BUILTIN_PUNPCKHDQ128, 2526117407Skan IX86_BUILTIN_PUNPCKHQDQ128, 2527117407Skan IX86_BUILTIN_PUNPCKLBW128, 2528117407Skan IX86_BUILTIN_PUNPCKLWD128, 2529117407Skan IX86_BUILTIN_PUNPCKLDQ128, 2530117407Skan IX86_BUILTIN_PUNPCKLQDQ128, 2531117407Skan 2532117407Skan IX86_BUILTIN_CLFLUSH, 2533117407Skan IX86_BUILTIN_MFENCE, 2534117407Skan IX86_BUILTIN_LFENCE, 2535117407Skan 2536122193Skan /* Prescott New Instructions. */ 2537122193Skan IX86_BUILTIN_ADDSUBPS, 2538122193Skan IX86_BUILTIN_HADDPS, 2539122193Skan IX86_BUILTIN_HSUBPS, 2540122193Skan IX86_BUILTIN_MOVSHDUP, 2541122193Skan IX86_BUILTIN_MOVSLDUP, 2542122193Skan IX86_BUILTIN_ADDSUBPD, 2543122193Skan IX86_BUILTIN_HADDPD, 2544122193Skan IX86_BUILTIN_HSUBPD, 2545122193Skan IX86_BUILTIN_LOADDDUP, 2546122193Skan IX86_BUILTIN_MOVDDUP, 2547122193Skan IX86_BUILTIN_LDDQU, 2548122193Skan 2549122193Skan IX86_BUILTIN_MONITOR, 2550122193Skan IX86_BUILTIN_MWAIT, 2551122193Skan 2552117407Skan IX86_BUILTIN_MAX 2553117407Skan}; 255418334Speter 255518334Speter/* Max number of args passed in registers. If this is more than 3, we will 255618334Speter have problems with ebx (register #4), since it is a caller save register and 255718334Speter is also used as the pic register in ELF. So for now, don't allow more than 255818334Speter 3 registers to be passed in registers. */ 255918334Speter 256090285Sobrien#define REGPARM_MAX (TARGET_64BIT ? 6 : 3) 256118334Speter 2562132744Skan#define SSE_REGPARM_MAX (TARGET_64BIT ? 8 : (TARGET_SSE ? 3 : 0)) 256390285Sobrien 2564132744Skan#define MMX_REGPARM_MAX (TARGET_64BIT ? 0 : (TARGET_MMX ? 3 : 0)) 2565132744Skan 256618334Speter 256718334Speter/* Specify the machine mode that this machine uses 256818334Speter for the index in the tablejump instruction. */ 256990285Sobrien#define CASE_VECTOR_MODE (!TARGET_64BIT || flag_pic ? SImode : DImode) 257018334Speter 257150654Sobrien/* Define as C expression which evaluates to nonzero if the tablejump 257250654Sobrien instruction expects the table to contain offsets from the address of the 257350654Sobrien table. 257490285Sobrien Do not define this if the table should contain absolute addresses. */ 257550654Sobrien/* #define CASE_VECTOR_PC_RELATIVE 1 */ 257618334Speter 257718334Speter/* Define this as 1 if `char' should by default be signed; else as 0. */ 257818334Speter#define DEFAULT_SIGNED_CHAR 1 257918334Speter 258090285Sobrien/* Number of bytes moved into a data cache for a single prefetch operation. */ 258190285Sobrien#define PREFETCH_BLOCK ix86_cost->prefetch_block 258290285Sobrien 258390285Sobrien/* Number of prefetch operations that can be done in parallel. */ 258490285Sobrien#define SIMULTANEOUS_PREFETCHES ix86_cost->simultaneous_prefetches 258590285Sobrien 258618334Speter/* Max number of bytes we can move from memory to memory 258718334Speter in one reasonably fast instruction. */ 258890285Sobrien#define MOVE_MAX 16 258918334Speter 259090285Sobrien/* MOVE_MAX_PIECES is the number of bytes at a time which we can 259190285Sobrien move efficiently, as opposed to MOVE_MAX which is the maximum 259290285Sobrien number of bytes we can move with a single instruction. */ 259390285Sobrien#define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4) 259490285Sobrien 259552295Sobrien/* If a memory-to-memory move would take MOVE_RATIO or more simple 259652295Sobrien move-instruction pairs, we will do a movstr or libcall instead. 259752295Sobrien Increasing the value will always make code faster, but eventually 259852295Sobrien incurs high cost in increased code size. 259918334Speter 260090285Sobrien If you don't define this, a reasonable default is used. */ 260118334Speter 260290285Sobrien#define MOVE_RATIO (optimize_size ? 3 : ix86_cost->move_ratio) 260318334Speter 260418334Speter/* Define if shifts truncate the shift count 260518334Speter which implies one can omit a sign-extension or zero-extension 260618334Speter of a shift count. */ 260790285Sobrien/* On i386, shifts do truncate the count. But bit opcodes don't. */ 260818334Speter 260918334Speter/* #define SHIFT_COUNT_TRUNCATED */ 261018334Speter 261118334Speter/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 261218334Speter is done just by pretending it is already truncated. */ 261318334Speter#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 261418334Speter 261518334Speter/* When a prototype says `char' or `short', really pass an `int'. 261618334Speter (The 386 can't easily push less than an int.) */ 261718334Speter 2618117407Skan#define PROMOTE_PROTOTYPES 1 261918334Speter 262090285Sobrien/* A macro to update M and UNSIGNEDP when an object whose type is 262190285Sobrien TYPE and which has the specified mode and signedness is to be 262290285Sobrien stored in a register. This macro is only called when TYPE is a 262390285Sobrien scalar type. 262490285Sobrien 262590285Sobrien On i386 it is sometimes useful to promote HImode and QImode 262690285Sobrien quantities to SImode. The choice depends on target type. */ 262790285Sobrien 262890285Sobrien#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ 262990285Sobriendo { \ 263090285Sobrien if (((MODE) == HImode && TARGET_PROMOTE_HI_REGS) \ 263190285Sobrien || ((MODE) == QImode && TARGET_PROMOTE_QI_REGS)) \ 263290285Sobrien (MODE) = SImode; \ 263390285Sobrien} while (0) 263490285Sobrien 263518334Speter/* Specify the machine mode that pointers have. 263618334Speter After generation of rtl, the compiler makes no further distinction 263718334Speter between pointers and any other objects of this machine mode. */ 263890285Sobrien#define Pmode (TARGET_64BIT ? DImode : SImode) 263918334Speter 264018334Speter/* A function address in a call instruction 264118334Speter is a byte address (for indexing purposes) 264218334Speter so give the MEM rtx a byte's mode. */ 264318334Speter#define FUNCTION_MODE QImode 264450654Sobrien 264590285Sobrien/* A C expression for the cost of moving data from a register in class FROM to 264690285Sobrien one in class TO. The classes are expressed using the enumeration values 264790285Sobrien such as `GENERAL_REGS'. A value of 2 is the default; other values are 264890285Sobrien interpreted relative to that. 264950654Sobrien 265090285Sobrien It is not required that the cost always equal 2 when FROM is the same as TO; 265190285Sobrien on some machines it is expensive to move between registers if they are not 265290285Sobrien general registers. */ 265350654Sobrien 265490285Sobrien#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ 265590285Sobrien ix86_register_move_cost ((MODE), (CLASS1), (CLASS2)) 265650654Sobrien 265750654Sobrien/* A C expression for the cost of moving data of mode M between a 265850654Sobrien register and memory. A value of 2 is the default; this cost is 265950654Sobrien relative to those in `REGISTER_MOVE_COST'. 266050654Sobrien 266150654Sobrien If moving between registers and memory is more expensive than 266250654Sobrien between two registers, you should define this macro to express the 266350654Sobrien relative cost. */ 266450654Sobrien 266590285Sobrien#define MEMORY_MOVE_COST(MODE, CLASS, IN) \ 266690285Sobrien ix86_memory_move_cost ((MODE), (CLASS), (IN)) 266750654Sobrien 266850654Sobrien/* A C expression for the cost of a branch instruction. A value of 1 266950654Sobrien is the default; other values are interpreted relative to that. */ 267050654Sobrien 267190285Sobrien#define BRANCH_COST ix86_branch_cost 267250654Sobrien 267350654Sobrien/* Define this macro as a C expression which is nonzero if accessing 267450654Sobrien less than a word of memory (i.e. a `char' or a `short') is no 267550654Sobrien faster than accessing a word of memory, i.e., if such access 267650654Sobrien require more than one instruction or if there is no difference in 267750654Sobrien cost between byte and (aligned) word loads. 267850654Sobrien 267950654Sobrien When this macro is not defined, the compiler will access a field by 268050654Sobrien finding the smallest containing object; when it is defined, a 268150654Sobrien fullword load will be used if alignment permits. Unless bytes 268250654Sobrien accesses are faster than word accesses, using word accesses is 268350654Sobrien preferable since it may eliminate subsequent memory access if 268450654Sobrien subsequent accesses occur to other fields in the same word of the 268550654Sobrien structure, but to different bytes. */ 268650654Sobrien 268750654Sobrien#define SLOW_BYTE_ACCESS 0 268850654Sobrien 268950654Sobrien/* Nonzero if access to memory by shorts is slow and undesirable. */ 269050654Sobrien#define SLOW_SHORT_ACCESS 0 269150654Sobrien 269250654Sobrien/* Define this macro to be the value 1 if unaligned accesses have a 269350654Sobrien cost many times greater than aligned accesses, for example if they 269450654Sobrien are emulated in a trap handler. 269550654Sobrien 2696117407Skan When this macro is nonzero, the compiler will act as if 2697117407Skan `STRICT_ALIGNMENT' were nonzero when generating code for block 269850654Sobrien moves. This can cause significantly more instructions to be 2699117407Skan produced. Therefore, do not set this macro nonzero if unaligned 270050654Sobrien accesses only add a cycle or two to the time for a memory access. 270150654Sobrien 270250654Sobrien If the value of this macro is always zero, it need not be defined. */ 270350654Sobrien 270490285Sobrien/* #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 0 */ 270550654Sobrien 270650654Sobrien/* Define this macro if it is as good or better to call a constant 270750654Sobrien function address than to call an address kept in a register. 270850654Sobrien 270950654Sobrien Desirable on the 386 because a CALL with a constant address is 271050654Sobrien faster than one with a register address. */ 271150654Sobrien 271250654Sobrien#define NO_FUNCTION_CSE 271350654Sobrien 271450654Sobrien/* Define this macro if it is as good or better for a function to call 271550654Sobrien itself with an explicit address than to call an address kept in a 271650654Sobrien register. */ 271750654Sobrien 271850654Sobrien#define NO_RECURSIVE_FUNCTION_CSE 271990285Sobrien 272018334Speter/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, 272118334Speter return the mode to be used for the comparison. 272218334Speter 272318334Speter For floating-point equality comparisons, CCFPEQmode should be used. 272490285Sobrien VOIDmode should be used in all other cases. 272518334Speter 272690285Sobrien For integer comparisons against zero, reduce to CCNOmode or CCZmode if 272790285Sobrien possible, to allow for more combinations. */ 272818334Speter 272990285Sobrien#define SELECT_CC_MODE(OP, X, Y) ix86_cc_mode ((OP), (X), (Y)) 273018334Speter 2731117407Skan/* Return nonzero if MODE implies a floating point inequality can be 273290285Sobrien reversed. */ 273318334Speter 273490285Sobrien#define REVERSIBLE_CC_MODE(MODE) 1 273518334Speter 273690285Sobrien/* A C expression whose value is reversed condition code of the CODE for 273790285Sobrien comparison done in CC_MODE mode. */ 273890285Sobrien#define REVERSE_CONDITION(CODE, MODE) \ 273990285Sobrien ((MODE) != CCFPmode && (MODE) != CCFPUmode ? reverse_condition (CODE) \ 274090285Sobrien : reverse_condition_maybe_unordered (CODE)) 274118334Speter 274218334Speter 274318334Speter/* Control the assembler format that we output, to the extent 274418334Speter this does not vary between assemblers. */ 274518334Speter 274618334Speter/* How to refer to registers in assembler output. 274790285Sobrien This sequence is indexed by compiler's hard-register-number (see above). */ 274818334Speter 274918334Speter/* In order to refer to the first 8 regs as 32 bit regs prefix an "e" 275018334Speter For non floating point regs, the following are the HImode names. 275118334Speter 275218334Speter For float regs, the stack top is sometimes referred to as "%st(0)" 2753132744Skan instead of just "%st". PRINT_OPERAND handles this with the "y" code. */ 275418334Speter 275590285Sobrien#define HI_REGISTER_NAMES \ 275690285Sobrien{"ax","dx","cx","bx","si","di","bp","sp", \ 2757132744Skan "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)", \ 2758132744Skan "argp", "flags", "fpsr", "dirflag", "frame", \ 275990285Sobrien "xmm0","xmm1","xmm2","xmm3","xmm4","xmm5","xmm6","xmm7", \ 276090285Sobrien "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7" , \ 276190285Sobrien "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ 276290285Sobrien "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"} 276318334Speter 276418334Speter#define REGISTER_NAMES HI_REGISTER_NAMES 276518334Speter 276618334Speter/* Table of additional register names to use in user input. */ 276718334Speter 276818334Speter#define ADDITIONAL_REGISTER_NAMES \ 276950654Sobrien{ { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \ 277050654Sobrien { "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \ 277190285Sobrien { "rax", 0 }, { "rdx", 1 }, { "rcx", 2 }, { "rbx", 3 }, \ 277290285Sobrien { "rsi", 4 }, { "rdi", 5 }, { "rbp", 6 }, { "rsp", 7 }, \ 277350654Sobrien { "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 }, \ 277490285Sobrien { "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 }, \ 277590285Sobrien { "mm0", 8}, { "mm1", 9}, { "mm2", 10}, { "mm3", 11}, \ 277690285Sobrien { "mm4", 12}, { "mm5", 13}, { "mm6", 14}, { "mm7", 15} } 277718334Speter 277818334Speter/* Note we are omitting these since currently I don't know how 277918334Speterto get gcc to use these, since they want the same but different 278018334Speternumber as al, and ax. 278118334Speter*/ 278218334Speter 278318334Speter#define QI_REGISTER_NAMES \ 278490285Sobrien{"al", "dl", "cl", "bl", "sil", "dil", "bpl", "spl",} 278518334Speter 278618334Speter/* These parallel the array above, and can be used to access bits 8:15 278790285Sobrien of regs 0 through 3. */ 278818334Speter 278918334Speter#define QI_HIGH_REGISTER_NAMES \ 279018334Speter{"ah", "dh", "ch", "bh", } 279118334Speter 279218334Speter/* How to renumber registers for dbx and gdb. */ 279318334Speter 279490285Sobrien#define DBX_REGISTER_NUMBER(N) \ 279590285Sobrien (TARGET_64BIT ? dbx64_register_map[(N)] : dbx_register_map[(N)]) 279618334Speter 279790285Sobrienextern int const dbx_register_map[FIRST_PSEUDO_REGISTER]; 279890285Sobrienextern int const dbx64_register_map[FIRST_PSEUDO_REGISTER]; 279990285Sobrienextern int const svr4_dbx_register_map[FIRST_PSEUDO_REGISTER]; 280090285Sobrien 280150654Sobrien/* Before the prologue, RA is at 0(%esp). */ 280250654Sobrien#define INCOMING_RETURN_ADDR_RTX \ 280350654Sobrien gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM)) 2804117407Skan 280550654Sobrien/* After the prologue, RA is at -4(AP) in the current frame. */ 280690285Sobrien#define RETURN_ADDR_RTX(COUNT, FRAME) \ 280790285Sobrien ((COUNT) == 0 \ 280890285Sobrien ? gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -UNITS_PER_WORD)) \ 280990285Sobrien : gen_rtx_MEM (Pmode, plus_constant (FRAME, UNITS_PER_WORD))) 281050654Sobrien 281190285Sobrien/* PC is dbx register 8; let's use that column for RA. */ 281290285Sobrien#define DWARF_FRAME_RETURN_COLUMN (TARGET_64BIT ? 16 : 8) 281350654Sobrien 281450654Sobrien/* Before the prologue, the top of the frame is at 4(%esp). */ 281590285Sobrien#define INCOMING_FRAME_SP_OFFSET UNITS_PER_WORD 281650654Sobrien 281790285Sobrien/* Describe how we implement __builtin_eh_return. */ 281890285Sobrien#define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? (N) : INVALID_REGNUM) 281990285Sobrien#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 2) 282018334Speter 282118334Speter 282290285Sobrien/* Select a format to encode pointers in exception handling data. CODE 282390285Sobrien is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is 282490285Sobrien true if the symbol may be affected by dynamic relocations. 282518334Speter 282690285Sobrien ??? All x86 object file formats are capable of representing this. 282790285Sobrien After all, the relocation needed is the same as for the call insn. 282890285Sobrien Whether or not a particular assembler allows us to enter such, I 282990285Sobrien guess we'll have to see. */ 283090285Sobrien#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \ 283190285Sobrien (flag_pic \ 283290285Sobrien ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4\ 283390285Sobrien : DW_EH_PE_absptr) 283418334Speter 283518334Speter/* This is how to output an insn to push a register on the stack. 283618334Speter It need not be very fast code. */ 283718334Speter 283890285Sobrien#define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \ 2839107598Sobriendo { \ 2840107598Sobrien if (TARGET_64BIT) \ 2841107598Sobrien asm_fprintf ((FILE), "\tpush{q}\t%%r%s\n", \ 2842107598Sobrien reg_names[(REGNO)] + (REX_INT_REGNO_P (REGNO) != 0)); \ 2843107598Sobrien else \ 2844107598Sobrien asm_fprintf ((FILE), "\tpush{l}\t%%e%s\n", reg_names[(REGNO)]); \ 2845107598Sobrien} while (0) 284618334Speter 284718334Speter/* This is how to output an insn to pop a register from the stack. 284818334Speter It need not be very fast code. */ 284918334Speter 285090285Sobrien#define ASM_OUTPUT_REG_POP(FILE, REGNO) \ 2851107598Sobriendo { \ 2852107598Sobrien if (TARGET_64BIT) \ 2853107598Sobrien asm_fprintf ((FILE), "\tpop{q}\t%%r%s\n", \ 2854107598Sobrien reg_names[(REGNO)] + (REX_INT_REGNO_P (REGNO) != 0)); \ 2855107598Sobrien else \ 2856107598Sobrien asm_fprintf ((FILE), "\tpop{l}\t%%e%s\n", reg_names[(REGNO)]); \ 2857107598Sobrien} while (0) 285818334Speter 285990285Sobrien/* This is how to output an element of a case-vector that is absolute. */ 286018334Speter 286118334Speter#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 286290285Sobrien ix86_output_addr_vec_elt ((FILE), (VALUE)) 286318334Speter 286490285Sobrien/* This is how to output an element of a case-vector that is relative. */ 286518334Speter 286650654Sobrien#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 286790285Sobrien ix86_output_addr_diff_elt ((FILE), (VALUE), (REL)) 286818334Speter 286990285Sobrien/* Under some conditions we need jump tables in the text section, because 287090285Sobrien the assembler cannot handle label differences between sections. */ 287118334Speter 287290285Sobrien#define JUMP_TABLES_IN_TEXT_SECTION \ 287390285Sobrien (!TARGET_64BIT && flag_pic && !HAVE_AS_GOTOFF_IN_DATA) 287418334Speter 2875117407Skan/* A C statement that outputs an address constant appropriate to 287690285Sobrien for DWARF debugging. */ 287790285Sobrien 287890285Sobrien#define ASM_OUTPUT_DWARF_ADDR_CONST(FILE, X) \ 287990285Sobrien i386_dwarf_output_addr_const ((FILE), (X)) 288090285Sobrien 2881117407Skan/* Emit a dtp-relative reference to a TLS variable. */ 2882117407Skan 2883117407Skan#ifdef HAVE_AS_TLS 2884117407Skan#define ASM_OUTPUT_DWARF_DTPREL(FILE, SIZE, X) \ 2885117407Skan i386_output_dwarf_dtprel (FILE, SIZE, X) 2886117407Skan#endif 2887117407Skan 288890285Sobrien/* Switch to init or fini section via SECTION_OP, emit a call to FUNC, 288990285Sobrien and switch back. For x86 we do this only to save a few bytes that 289090285Sobrien would otherwise be unused in the text section. */ 289190285Sobrien#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \ 289290285Sobrien asm (SECTION_OP "\n\t" \ 289390285Sobrien "call " USER_LABEL_PREFIX #FUNC "\n" \ 289490285Sobrien TEXT_SECTION_ASM_OP); 289518334Speter 289618334Speter/* Print operand X (an rtx) in assembler syntax to file FILE. 289718334Speter CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 289890285Sobrien Effect of various CODE letters is described in i386.c near 289990285Sobrien print_operand function. */ 290018334Speter 290190285Sobrien#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 2902117407Skan ((CODE) == '*' || (CODE) == '+' || (CODE) == '&') 290318334Speter 290418334Speter#define PRINT_OPERAND(FILE, X, CODE) \ 290590285Sobrien print_operand ((FILE), (X), (CODE)) 290618334Speter 290718334Speter#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 290890285Sobrien print_operand_address ((FILE), (ADDR)) 290918334Speter 2910117407Skan#define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL) \ 2911117407Skando { \ 2912117407Skan if (! output_addr_const_extra (FILE, (X))) \ 2913117407Skan goto FAIL; \ 2914117407Skan} while (0); 2915117407Skan 291618334Speter/* a letter which is not needed by the normal asm syntax, which 291718334Speter we can use for operand syntax in the extended asm */ 291818334Speter 291918334Speter#define ASM_OPERAND_LETTER '#' 292018334Speter#define RET return "" 292190285Sobrien#define AT_SP(MODE) (gen_rtx_MEM ((MODE), stack_pointer_rtx)) 292218334Speter 292390285Sobrien/* Define the codes that are matched by predicates in i386.c. */ 292450654Sobrien 292590285Sobrien#define PREDICATE_CODES \ 292690285Sobrien {"x86_64_immediate_operand", {CONST_INT, SUBREG, REG, \ 292790285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 292890285Sobrien {"x86_64_nonmemory_operand", {CONST_INT, SUBREG, REG, \ 292990285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 293090285Sobrien {"x86_64_movabs_operand", {CONST_INT, SUBREG, REG, \ 293190285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 293290285Sobrien {"x86_64_szext_nonmemory_operand", {CONST_INT, SUBREG, REG, \ 293390285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 293490285Sobrien {"x86_64_general_operand", {CONST_INT, SUBREG, REG, MEM, \ 293590285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 293690285Sobrien {"x86_64_szext_general_operand", {CONST_INT, SUBREG, REG, MEM, \ 293790285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 293890285Sobrien {"x86_64_zext_immediate_operand", {CONST_INT, CONST_DOUBLE, CONST, \ 293990285Sobrien SYMBOL_REF, LABEL_REF}}, \ 294090285Sobrien {"shiftdi_operand", {SUBREG, REG, MEM}}, \ 2941102801Skan {"const_int_1_31_operand", {CONST_INT}}, \ 294290285Sobrien {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \ 294390285Sobrien {"aligned_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \ 294490285Sobrien LABEL_REF, SUBREG, REG, MEM}}, \ 294590285Sobrien {"pic_symbolic_operand", {CONST}}, \ 294690285Sobrien {"call_insn_operand", {REG, SUBREG, MEM, SYMBOL_REF}}, \ 2947132744Skan {"sibcall_insn_operand", {REG, SUBREG, SYMBOL_REF}}, \ 294890285Sobrien {"constant_call_address_operand", {SYMBOL_REF, CONST}}, \ 294990285Sobrien {"const0_operand", {CONST_INT, CONST_DOUBLE}}, \ 295090285Sobrien {"const1_operand", {CONST_INT}}, \ 295190285Sobrien {"const248_operand", {CONST_INT}}, \ 2952132744Skan {"const_0_to_3_operand", {CONST_INT}}, \ 2953132744Skan {"const_0_to_7_operand", {CONST_INT}}, \ 2954132744Skan {"const_0_to_15_operand", {CONST_INT}}, \ 2955132744Skan {"const_0_to_255_operand", {CONST_INT}}, \ 295690285Sobrien {"incdec_operand", {CONST_INT}}, \ 295790285Sobrien {"mmx_reg_operand", {REG}}, \ 295890285Sobrien {"reg_no_sp_operand", {SUBREG, REG}}, \ 295990285Sobrien {"general_no_elim_operand", {CONST_INT, CONST_DOUBLE, CONST, \ 296090285Sobrien SYMBOL_REF, LABEL_REF, SUBREG, REG, MEM}}, \ 296190285Sobrien {"nonmemory_no_elim_operand", {CONST_INT, REG, SUBREG}}, \ 2962117407Skan {"index_register_operand", {SUBREG, REG}}, \ 2963132744Skan {"flags_reg_operand", {REG}}, \ 296490285Sobrien {"q_regs_operand", {SUBREG, REG}}, \ 296590285Sobrien {"non_q_regs_operand", {SUBREG, REG}}, \ 296690285Sobrien {"fcmov_comparison_operator", {EQ, NE, LTU, GTU, LEU, GEU, UNORDERED, \ 296790285Sobrien ORDERED, LT, UNLT, GT, UNGT, LE, UNLE, \ 296890285Sobrien GE, UNGE, LTGT, UNEQ}}, \ 296990285Sobrien {"sse_comparison_operator", {EQ, LT, LE, UNORDERED, NE, UNGE, UNGT, \ 297090285Sobrien ORDERED, UNEQ, UNLT, UNLE, LTGT, GE, GT \ 297190285Sobrien }}, \ 297290285Sobrien {"ix86_comparison_operator", {EQ, NE, LE, LT, GE, GT, LEU, LTU, GEU, \ 297390285Sobrien GTU, UNORDERED, ORDERED, UNLE, UNLT, \ 297490285Sobrien UNGE, UNGT, LTGT, UNEQ }}, \ 2975132744Skan {"ix86_carry_flag_operator", {LTU, LT, UNLT, GT, UNGT, LE, UNLE, \ 2976132744Skan GE, UNGE, LTGT, UNEQ}}, \ 297790285Sobrien {"cmp_fp_expander_operand", {CONST_DOUBLE, SUBREG, REG, MEM}}, \ 297890285Sobrien {"ext_register_operand", {SUBREG, REG}}, \ 297990285Sobrien {"binary_fp_operator", {PLUS, MINUS, MULT, DIV}}, \ 298090285Sobrien {"mult_operator", {MULT}}, \ 298190285Sobrien {"div_operator", {DIV}}, \ 298290285Sobrien {"arith_or_logical_operator", {PLUS, MULT, AND, IOR, XOR, SMIN, SMAX, \ 298390285Sobrien UMIN, UMAX, COMPARE, MINUS, DIV, MOD, \ 298490285Sobrien UDIV, UMOD, ASHIFT, ROTATE, ASHIFTRT, \ 298590285Sobrien LSHIFTRT, ROTATERT}}, \ 298690285Sobrien {"promotable_binary_operator", {PLUS, MULT, AND, IOR, XOR, ASHIFT}}, \ 298790285Sobrien {"memory_displacement_operand", {MEM}}, \ 298890285Sobrien {"cmpsi_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \ 298990285Sobrien LABEL_REF, SUBREG, REG, MEM, AND}}, \ 2990117407Skan {"long_memory_operand", {MEM}}, \ 2991117407Skan {"tls_symbolic_operand", {SYMBOL_REF}}, \ 2992117407Skan {"global_dynamic_symbolic_operand", {SYMBOL_REF}}, \ 2993117407Skan {"local_dynamic_symbolic_operand", {SYMBOL_REF}}, \ 2994117407Skan {"initial_exec_symbolic_operand", {SYMBOL_REF}}, \ 2995117407Skan {"local_exec_symbolic_operand", {SYMBOL_REF}}, \ 2996117407Skan {"any_fp_register_operand", {REG}}, \ 2997117407Skan {"register_and_not_any_fp_reg_operand", {REG}}, \ 2998117407Skan {"fp_register_operand", {REG}}, \ 2999117407Skan {"register_and_not_fp_reg_operand", {REG}}, \ 3000132744Skan {"zero_extended_scalar_load_operand", {MEM}}, \ 3001117407Skan {"vector_move_operand", {CONST_VECTOR, SUBREG, REG, MEM}}, \ 3002132744Skan {"no_seg_address_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \ 3003146908Skan LABEL_REF, SUBREG, REG, MEM, PLUS, MULT}}, \ 3004146908Skan {"compare_operator", {COMPARE}}, 300550654Sobrien 300690285Sobrien/* A list of predicates that do special things with modes, and so 300790285Sobrien should not elicit warnings for VOIDmode match_operand. */ 300890285Sobrien 300990285Sobrien#define SPECIAL_MODE_PREDICATES \ 301090285Sobrien "ext_register_operand", 301150654Sobrien 3012117407Skan/* Which processor to schedule for. The cpu attribute defines a list that 3013117407Skan mirrors this list, so changes to i386.md must be made at the same time. */ 3014117407Skan 3015117407Skanenum processor_type 3016117407Skan{ 3017117407Skan PROCESSOR_I386, /* 80386 */ 3018117407Skan PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */ 3019117407Skan PROCESSOR_PENTIUM, 3020117407Skan PROCESSOR_PENTIUMPRO, 3021117407Skan PROCESSOR_K6, 3022117407Skan PROCESSOR_ATHLON, 3023117407Skan PROCESSOR_PENTIUM4, 3024132744Skan PROCESSOR_K8, 3025117407Skan PROCESSOR_max 3026117407Skan}; 3027117407Skan 3028132744Skanextern enum processor_type ix86_tune; 3029132744Skanextern const char *ix86_tune_string; 3030117407Skan 3031117407Skanextern enum processor_type ix86_arch; 3032117407Skanextern const char *ix86_arch_string; 3033117407Skan 3034117407Skanenum fpmath_unit 3035117407Skan{ 3036117407Skan FPMATH_387 = 1, 3037117407Skan FPMATH_SSE = 2 3038117407Skan}; 3039117407Skan 3040117407Skanextern enum fpmath_unit ix86_fpmath; 3041117407Skanextern const char *ix86_fpmath_string; 3042117407Skan 3043117407Skanenum tls_dialect 3044117407Skan{ 3045117407Skan TLS_DIALECT_GNU, 3046117407Skan TLS_DIALECT_SUN 3047117407Skan}; 3048117407Skan 3049117407Skanextern enum tls_dialect ix86_tls_dialect; 3050117407Skanextern const char *ix86_tls_dialect_string; 3051117407Skan 305290285Sobrienenum cmodel { 3053117407Skan CM_32, /* The traditional 32-bit ABI. */ 3054117407Skan CM_SMALL, /* Assumes all code and data fits in the low 31 bits. */ 3055117407Skan CM_KERNEL, /* Assumes all code and data fits in the high 31 bits. */ 3056117407Skan CM_MEDIUM, /* Assumes code fits in the low 31 bits; data unlimited. */ 3057117407Skan CM_LARGE, /* No assumptions. */ 3058117407Skan CM_SMALL_PIC /* Assumes code+data+got/plt fits in a 31 bit region. */ 305990285Sobrien}; 306018334Speter 3061117407Skanextern enum cmodel ix86_cmodel; 3062117407Skanextern const char *ix86_cmodel_string; 3063117407Skan 306490285Sobrien/* Size of the RED_ZONE area. */ 306590285Sobrien#define RED_ZONE_SIZE 128 306690285Sobrien/* Reserved area of the red zone for temporaries. */ 306790285Sobrien#define RED_ZONE_RESERVE 8 306850654Sobrien 306990285Sobrienenum asm_dialect { 307090285Sobrien ASM_ATT, 307190285Sobrien ASM_INTEL 307290285Sobrien}; 3073117407Skan 307490285Sobrienextern const char *ix86_asm_string; 307590285Sobrienextern enum asm_dialect ix86_asm_dialect; 3076117407Skan 3077117407Skanextern int ix86_regparm; 3078117407Skanextern const char *ix86_regparm_string; 3079117407Skan 3080117407Skanextern int ix86_preferred_stack_boundary; 3081117407Skanextern const char *ix86_preferred_stack_boundary_string; 3082117407Skan 3083117407Skanextern int ix86_branch_cost; 3084117407Skanextern const char *ix86_branch_cost_string; 3085117407Skan 3086117407Skanextern const char *ix86_debug_arg_string; 3087117407Skanextern const char *ix86_debug_addr_string; 3088117407Skan 3089117407Skan/* Obsoleted by -f options. Remove before 3.2 ships. */ 3090117407Skanextern const char *ix86_align_loops_string; 3091117407Skanextern const char *ix86_align_jumps_string; 3092117407Skanextern const char *ix86_align_funcs_string; 3093117407Skan 3094117407Skan/* Smallest class containing REGNO. */ 3095117407Skanextern enum reg_class const regclass_map[FIRST_PSEUDO_REGISTER]; 3096117407Skan 309790285Sobrienextern rtx ix86_compare_op0; /* operand 0 for comparisons */ 309890285Sobrienextern rtx ix86_compare_op1; /* operand 1 for comparisons */ 309990285Sobrien 310090285Sobrien/* To properly truncate FP values into integers, we need to set i387 control 310190285Sobrien word. We can't emit proper mode switching code before reload, as spills 310290285Sobrien generated by reload may truncate values incorrectly, but we still can avoid 310390285Sobrien redundant computation of new control word by the mode switching pass. 310490285Sobrien The fldcw instructions are still emitted redundantly, but this is probably 310590285Sobrien not going to be noticeable problem, as most CPUs do have fast path for 3106117407Skan the sequence. 310718334Speter 310890285Sobrien The machinery is to emit simple truncation instructions and split them 310990285Sobrien before reload to instructions having USEs of two memory locations that 311090285Sobrien are filled by this code to old and new control word. 3111117407Skan 311290285Sobrien Post-reload pass may be later used to eliminate the redundant fildcw if 311390285Sobrien needed. */ 311418334Speter 311590285Sobrienenum fp_cw_mode {FP_CW_STORED, FP_CW_UNINITIALIZED, FP_CW_ANY}; 311650654Sobrien 311790285Sobrien/* Define this macro if the port needs extra instructions inserted 311890285Sobrien for mode switching in an optimizing compilation. */ 311990285Sobrien 3120132744Skan#define OPTIMIZE_MODE_SWITCHING(ENTITY) ix86_optimize_mode_switching 312190285Sobrien 312290285Sobrien/* If you define `OPTIMIZE_MODE_SWITCHING', you have to define this as 312390285Sobrien initializer for an array of integers. Each initializer element N 312490285Sobrien refers to an entity that needs mode switching, and specifies the 312590285Sobrien number of different modes that might need to be set for this 312690285Sobrien entity. The position of the initializer in the initializer - 312790285Sobrien starting counting at zero - determines the integer that is used to 312890285Sobrien refer to the mode-switched entity in question. */ 312990285Sobrien 313090285Sobrien#define NUM_MODES_FOR_MODE_SWITCHING { FP_CW_ANY } 313190285Sobrien 313290285Sobrien/* ENTITY is an integer specifying a mode-switched entity. If 313390285Sobrien `OPTIMIZE_MODE_SWITCHING' is defined, you must define this macro to 313490285Sobrien return an integer value not larger than the corresponding element 313590285Sobrien in `NUM_MODES_FOR_MODE_SWITCHING', to denote the mode that ENTITY 313690285Sobrien must be switched into prior to the execution of INSN. */ 313790285Sobrien 313890285Sobrien#define MODE_NEEDED(ENTITY, I) \ 313990285Sobrien (GET_CODE (I) == CALL_INSN \ 314090285Sobrien || (GET_CODE (I) == INSN && (asm_noperands (PATTERN (I)) >= 0 \ 314190285Sobrien || GET_CODE (PATTERN (I)) == ASM_INPUT))\ 314290285Sobrien ? FP_CW_UNINITIALIZED \ 314390285Sobrien : recog_memoized (I) < 0 || get_attr_type (I) != TYPE_FISTP \ 314490285Sobrien ? FP_CW_ANY \ 314590285Sobrien : FP_CW_STORED) 314690285Sobrien 314790285Sobrien/* This macro specifies the order in which modes for ENTITY are 314890285Sobrien processed. 0 is the highest priority. */ 314990285Sobrien 315090285Sobrien#define MODE_PRIORITY_TO_MODE(ENTITY, N) (N) 315190285Sobrien 315290285Sobrien/* Generate one or more insns to set ENTITY to MODE. HARD_REG_LIVE 315390285Sobrien is the set of hard registers live at the point where the insn(s) 315490285Sobrien are to be inserted. */ 315590285Sobrien 315690285Sobrien#define EMIT_MODE_SET(ENTITY, MODE, HARD_REGS_LIVE) \ 315790285Sobrien ((MODE) == FP_CW_STORED \ 315890285Sobrien ? emit_i387_cw_initialization (assign_386_stack_local (HImode, 1), \ 315990285Sobrien assign_386_stack_local (HImode, 2)), 0\ 316090285Sobrien : 0) 316118334Speter 316290285Sobrien/* Avoid renaming of stack registers, as doing so in combination with 316390285Sobrien scheduling just increases amount of live registers at time and in 316490285Sobrien the turn amount of fxch instructions needed. 316590285Sobrien 3166132744Skan ??? Maybe Pentium chips benefits from renaming, someone can try.... */ 316790285Sobrien 316890285Sobrien#define HARD_REGNO_RENAME_OK(SRC, TARGET) \ 316990285Sobrien ((SRC) < FIRST_STACK_REG || (SRC) > LAST_STACK_REG) 317090285Sobrien 317190285Sobrien 3172132744Skan#define DLL_IMPORT_EXPORT_PREFIX '#' 3173117407Skan 3174132744Skan#define FASTCALL_PREFIX '@' 3175132744Skan 3176132744Skanstruct machine_function GTY(()) 3177132744Skan{ 3178132744Skan struct stack_local_entry *stack_locals; 3179132744Skan const char *some_ld_name; 3180132744Skan int save_varrargs_registers; 3181132744Skan int accesses_prev_frame; 3182132744Skan int optimize_mode_switching; 3183132744Skan /* Set by ix86_compute_frame_layout and used by prologue/epilogue expander to 3184132744Skan determine the style used. */ 3185132744Skan int use_fast_prologue_epilogue; 3186132744Skan /* Number of saved registers USE_FAST_PROLOGUE_EPILOGUE has been computed 3187132744Skan for. */ 3188132744Skan int use_fast_prologue_epilogue_nregs; 3189132744Skan}; 3190117407Skan 3191132744Skan#define ix86_stack_locals (cfun->machine->stack_locals) 3192132744Skan#define ix86_save_varrargs_registers (cfun->machine->save_varrargs_registers) 3193132744Skan#define ix86_optimize_mode_switching (cfun->machine->optimize_mode_switching) 3194132744Skan 3195132744Skan/* Control behavior of x86_file_start. */ 3196132744Skan#define X86_FILE_START_VERSION_DIRECTIVE false 3197132744Skan#define X86_FILE_START_FLTUSED false 3198132744Skan 319918334Speter/* 320018334SpeterLocal variables: 320118334Speterversion-control: t 320218334SpeterEnd: 320318334Speter*/ 3204