i386.h revision 117407
190285Sobrien/* Definitions of target machine for GNU compiler for IA-32. 290285Sobrien Copyright (C) 1988, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 390285Sobrien 2001, 2002 Free Software Foundation, Inc. 418334Speter 518334SpeterThis file is part of GNU CC. 618334Speter 718334SpeterGNU CC is free software; you can redistribute it and/or modify 818334Speterit under the terms of the GNU General Public License as published by 918334Speterthe Free Software Foundation; either version 2, or (at your option) 1018334Speterany later version. 1118334Speter 1218334SpeterGNU CC is distributed in the hope that it will be useful, 1318334Speterbut WITHOUT ANY WARRANTY; without even the implied warranty of 1418334SpeterMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1518334SpeterGNU General Public License for more details. 1618334Speter 1718334SpeterYou should have received a copy of the GNU General Public License 1818334Speteralong with GNU CC; see the file COPYING. If not, write to 1918334Speterthe Free Software Foundation, 59 Temple Place - Suite 330, 2090285SobrienBoston, MA 02111-1307, USA. */ 2118334Speter 2218334Speter/* The purpose of this file is to define the characteristics of the i386, 2318334Speter independent of assembler syntax or operating system. 2418334Speter 2518334Speter Three other files build on this one to describe a specific assembler syntax: 2618334Speter bsd386.h, att386.h, and sun386.h. 2718334Speter 2818334Speter The actual tm.h file for a particular system should include 2918334Speter this file, and then the file for the appropriate assembler syntax. 3018334Speter 3118334Speter Many macros that specify assembler syntax are omitted entirely from 3218334Speter this file because they really belong in the files for particular 3390285Sobrien assemblers. These include RP, IP, LPREFIX, PUT_OP_SIZE, USE_STAR, 3490285Sobrien ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE, PRINT_B_I_S, and many 3590285Sobrien that start with ASM_ or end in ASM_OP. */ 3618334Speter 3750654Sobrien/* Define the specific costs for a given cpu */ 3850654Sobrien 3950654Sobrienstruct processor_costs { 4090285Sobrien const int add; /* cost of an add instruction */ 4190285Sobrien const int lea; /* cost of a lea instruction */ 4290285Sobrien const int shift_var; /* variable shift costs */ 4390285Sobrien const int shift_const; /* constant shift costs */ 4490285Sobrien const int mult_init; /* cost of starting a multiply */ 4590285Sobrien const int mult_bit; /* cost of multiply per each bit set */ 4690285Sobrien const int divide; /* cost of a divide/mod */ 4790285Sobrien int movsx; /* The cost of movsx operation. */ 4890285Sobrien int movzx; /* The cost of movzx operation. */ 4990285Sobrien const int large_insn; /* insns larger than this cost more */ 5090285Sobrien const int move_ratio; /* The threshold of number of scalar 5190285Sobrien memory-to-memory move insns. */ 5290285Sobrien const int movzbl_load; /* cost of loading using movzbl */ 5390285Sobrien const int int_load[3]; /* cost of loading integer registers 5490285Sobrien in QImode, HImode and SImode relative 5590285Sobrien to reg-reg move (2). */ 5690285Sobrien const int int_store[3]; /* cost of storing integer register 5790285Sobrien in QImode, HImode and SImode */ 5890285Sobrien const int fp_move; /* cost of reg,reg fld/fst */ 5990285Sobrien const int fp_load[3]; /* cost of loading FP register 6090285Sobrien in SFmode, DFmode and XFmode */ 6190285Sobrien const int fp_store[3]; /* cost of storing FP register 6290285Sobrien in SFmode, DFmode and XFmode */ 6390285Sobrien const int mmx_move; /* cost of moving MMX register. */ 6490285Sobrien const int mmx_load[2]; /* cost of loading MMX register 6590285Sobrien in SImode and DImode */ 6690285Sobrien const int mmx_store[2]; /* cost of storing MMX register 6790285Sobrien in SImode and DImode */ 6890285Sobrien const int sse_move; /* cost of moving SSE register. */ 6990285Sobrien const int sse_load[3]; /* cost of loading SSE register 7090285Sobrien in SImode, DImode and TImode*/ 7190285Sobrien const int sse_store[3]; /* cost of storing SSE register 7290285Sobrien in SImode, DImode and TImode*/ 7390285Sobrien const int mmxsse_to_integer; /* cost of moving mmxsse register to 7490285Sobrien integer and vice versa. */ 7590285Sobrien const int prefetch_block; /* bytes moved to cache for prefetch. */ 7690285Sobrien const int simultaneous_prefetches; /* number of parallel prefetch 7790285Sobrien operations. */ 78117407Skan const int fadd; /* cost of FADD and FSUB instructions. */ 79117407Skan const int fmul; /* cost of FMUL instruction. */ 80117407Skan const int fdiv; /* cost of FDIV instruction. */ 81117407Skan const int fabs; /* cost of FABS instruction. */ 82117407Skan const int fchs; /* cost of FCHS instruction. */ 83117407Skan const int fsqrt; /* cost of FSQRT instruction. */ 8450654Sobrien}; 8550654Sobrien 8690285Sobrienextern const struct processor_costs *ix86_cost; 8750654Sobrien 8818334Speter/* Run-time compilation parameters selecting different hardware subsets. */ 8918334Speter 9018334Speterextern int target_flags; 9118334Speter 9218334Speter/* Macros used in the machine description to test the flags. */ 9318334Speter 9418334Speter/* configure can arrange to make this 2, to force a 486. */ 9590285Sobrien 9618334Speter#ifndef TARGET_CPU_DEFAULT 9718334Speter#define TARGET_CPU_DEFAULT 0 9818334Speter#endif 9918334Speter 10018334Speter/* Masks for the -m switches */ 10190285Sobrien#define MASK_80387 0x00000001 /* Hardware floating point */ 10290285Sobrien#define MASK_RTD 0x00000002 /* Use ret that pops args */ 10390285Sobrien#define MASK_ALIGN_DOUBLE 0x00000004 /* align doubles to 2 word boundary */ 10490285Sobrien#define MASK_SVR3_SHLIB 0x00000008 /* Uninit locals into bss */ 10590285Sobrien#define MASK_IEEE_FP 0x00000010 /* IEEE fp comparisons */ 10690285Sobrien#define MASK_FLOAT_RETURNS 0x00000020 /* Return float in st(0) */ 10790285Sobrien#define MASK_NO_FANCY_MATH_387 0x00000040 /* Disable sin, cos, sqrt */ 10890285Sobrien#define MASK_OMIT_LEAF_FRAME_POINTER 0x080 /* omit leaf frame pointers */ 10990285Sobrien#define MASK_STACK_PROBE 0x00000100 /* Enable stack probing */ 11090285Sobrien#define MASK_NO_ALIGN_STROPS 0x00000200 /* Enable aligning of string ops. */ 11190285Sobrien#define MASK_INLINE_ALL_STROPS 0x00000400 /* Inline stringops in all cases */ 11290285Sobrien#define MASK_NO_PUSH_ARGS 0x00000800 /* Use push instructions */ 11390285Sobrien#define MASK_ACCUMULATE_OUTGOING_ARGS 0x00001000/* Accumulate outgoing args */ 114117407Skan#define MASK_MMX 0x00002000 /* Support MMX regs/builtins */ 115117407Skan#define MASK_SSE 0x00004000 /* Support SSE regs/builtins */ 116117407Skan#define MASK_SSE2 0x00008000 /* Support SSE2 regs/builtins */ 117117407Skan#define MASK_3DNOW 0x00010000 /* Support 3Dnow builtins */ 118117407Skan#define MASK_3DNOW_A 0x00020000 /* Support Athlon 3Dnow builtins */ 119117407Skan#define MASK_128BIT_LONG_DOUBLE 0x00040000 /* long double size is 128bit */ 120117407Skan#define MASK_64BIT 0x00080000 /* Produce 64bit code */ 121117407Skan 122117407Skan/* Unused: 0x03f0000 */ 123117407Skan 12490285Sobrien/* ... overlap with subtarget options starts by 0x04000000. */ 12590285Sobrien#define MASK_NO_RED_ZONE 0x04000000 /* Do not use red zone */ 12697911Sobrien#define MASK_NO_ALIGN_LONG_STRINGS 0x08000000 /* Do not align long strings specially */ 12718334Speter 12818334Speter/* Use the floating point instructions */ 12918334Speter#define TARGET_80387 (target_flags & MASK_80387) 13018334Speter 13118334Speter/* Compile using ret insn that pops args. 13218334Speter This will not work unless you use prototypes at least 133117407Skan for all functions that can take varying numbers of args. */ 13418334Speter#define TARGET_RTD (target_flags & MASK_RTD) 13518334Speter 13618334Speter/* Align doubles to a two word boundary. This breaks compatibility with 13718334Speter the published ABI's for structures containing doubles, but produces 13818334Speter faster code on the pentium. */ 13918334Speter#define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE) 14018334Speter 14190285Sobrien/* Use push instructions to save outgoing args. */ 14290285Sobrien#define TARGET_PUSH_ARGS (!(target_flags & MASK_NO_PUSH_ARGS)) 14390285Sobrien 14490285Sobrien/* Accumulate stack adjustments to prologue/epilogue. */ 14590285Sobrien#define TARGET_ACCUMULATE_OUTGOING_ARGS \ 14690285Sobrien (target_flags & MASK_ACCUMULATE_OUTGOING_ARGS) 14790285Sobrien 14818334Speter/* Put uninitialized locals into bss, not data. 14918334Speter Meaningful only on svr3. */ 15018334Speter#define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB) 15118334Speter 15218334Speter/* Use IEEE floating point comparisons. These handle correctly the cases 15318334Speter where the result of a comparison is unordered. Normally SIGFPE is 15418334Speter generated in such cases, in which case this isn't needed. */ 15518334Speter#define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP) 15618334Speter 15718334Speter/* Functions that return a floating point value may return that value 15818334Speter in the 387 FPU or in 386 integer registers. If set, this flag causes 15990285Sobrien the 387 to be used, which is compatible with most calling conventions. */ 16018334Speter#define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS) 16118334Speter 16290285Sobrien/* Long double is 128bit instead of 96bit, even when only 80bits are used. 16390285Sobrien This mode wastes cache, but avoid misaligned data accesses and simplifies 16490285Sobrien address calculations. */ 16590285Sobrien#define TARGET_128BIT_LONG_DOUBLE (target_flags & MASK_128BIT_LONG_DOUBLE) 16690285Sobrien 16718334Speter/* Disable generation of FP sin, cos and sqrt operations for 387. 16818334Speter This is because FreeBSD lacks these in the math-emulator-code */ 16918334Speter#define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387) 17018334Speter 17150654Sobrien/* Don't create frame pointers for leaf functions */ 17290285Sobrien#define TARGET_OMIT_LEAF_FRAME_POINTER \ 17390285Sobrien (target_flags & MASK_OMIT_LEAF_FRAME_POINTER) 17450654Sobrien 17518334Speter/* Debug GO_IF_LEGITIMATE_ADDRESS */ 17690285Sobrien#define TARGET_DEBUG_ADDR (ix86_debug_addr_string != 0) 17718334Speter 17818334Speter/* Debug FUNCTION_ARG macros */ 17990285Sobrien#define TARGET_DEBUG_ARG (ix86_debug_arg_string != 0) 18018334Speter 181117407Skan/* 64bit Sledgehammer mode. For libgcc2 we make sure this is a 182117407Skan compile-time constant. */ 183117407Skan#ifdef IN_LIBGCC2 184117407Skan#ifdef __x86_64__ 185117407Skan#define TARGET_64BIT 1 186117407Skan#else 187117407Skan#define TARGET_64BIT 0 188117407Skan#endif 189117407Skan#else 19090285Sobrien#ifdef TARGET_BI_ARCH 19190285Sobrien#define TARGET_64BIT (target_flags & MASK_64BIT) 19290285Sobrien#else 193117407Skan#if TARGET_64BIT_DEFAULT 19490285Sobrien#define TARGET_64BIT 1 19590285Sobrien#else 19690285Sobrien#define TARGET_64BIT 0 19790285Sobrien#endif 19890285Sobrien#endif 199117407Skan#endif 20018334Speter 20150654Sobrien#define TARGET_386 (ix86_cpu == PROCESSOR_I386) 20250654Sobrien#define TARGET_486 (ix86_cpu == PROCESSOR_I486) 20350654Sobrien#define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM) 20450654Sobrien#define TARGET_PENTIUMPRO (ix86_cpu == PROCESSOR_PENTIUMPRO) 20552295Sobrien#define TARGET_K6 (ix86_cpu == PROCESSOR_K6) 20690285Sobrien#define TARGET_ATHLON (ix86_cpu == PROCESSOR_ATHLON) 20790285Sobrien#define TARGET_PENTIUM4 (ix86_cpu == PROCESSOR_PENTIUM4) 20852295Sobrien 20952295Sobrien#define CPUMASK (1 << ix86_cpu) 21052295Sobrienextern const int x86_use_leave, x86_push_memory, x86_zero_extend_with_and; 21152295Sobrienextern const int x86_use_bit_test, x86_cmove, x86_deep_branch; 21290285Sobrienextern const int x86_branch_hints, x86_unroll_strlen; 21390285Sobrienextern const int x86_double_with_add, x86_partial_reg_stall, x86_movx; 21490285Sobrienextern const int x86_use_loop, x86_use_fiop, x86_use_mov0; 21590285Sobrienextern const int x86_use_cltd, x86_read_modify_write; 21690285Sobrienextern const int x86_read_modify, x86_split_long_moves; 217117407Skanextern const int x86_promote_QImode, x86_single_stringop, x86_fast_prefix; 21890285Sobrienextern const int x86_himode_math, x86_qimode_math, x86_promote_qi_regs; 21990285Sobrienextern const int x86_promote_hi_regs, x86_integer_DFmode_moves; 22090285Sobrienextern const int x86_add_esp_4, x86_add_esp_8, x86_sub_esp_4, x86_sub_esp_8; 22190285Sobrienextern const int x86_partial_reg_dependency, x86_memory_mismatch_stall; 22290285Sobrienextern const int x86_accumulate_outgoing_args, x86_prologue_using_move; 22390285Sobrienextern const int x86_epilogue_using_move, x86_decompose_lea; 224117407Skanextern const int x86_arch_always_fancy_math_387, x86_shift1; 22590285Sobrienextern int x86_prefetch_sse; 22652295Sobrien 22752295Sobrien#define TARGET_USE_LEAVE (x86_use_leave & CPUMASK) 22852295Sobrien#define TARGET_PUSH_MEMORY (x86_push_memory & CPUMASK) 22952295Sobrien#define TARGET_ZERO_EXTEND_WITH_AND (x86_zero_extend_with_and & CPUMASK) 23052295Sobrien#define TARGET_USE_BIT_TEST (x86_use_bit_test & CPUMASK) 23152295Sobrien#define TARGET_UNROLL_STRLEN (x86_unroll_strlen & CPUMASK) 23290285Sobrien/* For sane SSE instruction set generation we need fcomi instruction. It is 23390285Sobrien safe to enable all CMOVE instructions. */ 23490285Sobrien#define TARGET_CMOVE ((x86_cmove & (1 << ix86_arch)) || TARGET_SSE) 23552295Sobrien#define TARGET_DEEP_BRANCH_PREDICTION (x86_deep_branch & CPUMASK) 23690285Sobrien#define TARGET_BRANCH_PREDICTION_HINTS (x86_branch_hints & CPUMASK) 23752295Sobrien#define TARGET_DOUBLE_WITH_ADD (x86_double_with_add & CPUMASK) 23890285Sobrien#define TARGET_USE_SAHF ((x86_use_sahf & CPUMASK) && !TARGET_64BIT) 23990285Sobrien#define TARGET_MOVX (x86_movx & CPUMASK) 24090285Sobrien#define TARGET_PARTIAL_REG_STALL (x86_partial_reg_stall & CPUMASK) 24190285Sobrien#define TARGET_USE_LOOP (x86_use_loop & CPUMASK) 24290285Sobrien#define TARGET_USE_FIOP (x86_use_fiop & CPUMASK) 24390285Sobrien#define TARGET_USE_MOV0 (x86_use_mov0 & CPUMASK) 24490285Sobrien#define TARGET_USE_CLTD (x86_use_cltd & CPUMASK) 24590285Sobrien#define TARGET_SPLIT_LONG_MOVES (x86_split_long_moves & CPUMASK) 24690285Sobrien#define TARGET_READ_MODIFY_WRITE (x86_read_modify_write & CPUMASK) 24790285Sobrien#define TARGET_READ_MODIFY (x86_read_modify & CPUMASK) 24890285Sobrien#define TARGET_PROMOTE_QImode (x86_promote_QImode & CPUMASK) 249117407Skan#define TARGET_FAST_PREFIX (x86_fast_prefix & CPUMASK) 25090285Sobrien#define TARGET_SINGLE_STRINGOP (x86_single_stringop & CPUMASK) 25190285Sobrien#define TARGET_QIMODE_MATH (x86_qimode_math & CPUMASK) 25290285Sobrien#define TARGET_HIMODE_MATH (x86_himode_math & CPUMASK) 25390285Sobrien#define TARGET_PROMOTE_QI_REGS (x86_promote_qi_regs & CPUMASK) 25490285Sobrien#define TARGET_PROMOTE_HI_REGS (x86_promote_hi_regs & CPUMASK) 25590285Sobrien#define TARGET_ADD_ESP_4 (x86_add_esp_4 & CPUMASK) 25690285Sobrien#define TARGET_ADD_ESP_8 (x86_add_esp_8 & CPUMASK) 25790285Sobrien#define TARGET_SUB_ESP_4 (x86_sub_esp_4 & CPUMASK) 25890285Sobrien#define TARGET_SUB_ESP_8 (x86_sub_esp_8 & CPUMASK) 25990285Sobrien#define TARGET_INTEGER_DFMODE_MOVES (x86_integer_DFmode_moves & CPUMASK) 26090285Sobrien#define TARGET_PARTIAL_REG_DEPENDENCY (x86_partial_reg_dependency & CPUMASK) 26190285Sobrien#define TARGET_MEMORY_MISMATCH_STALL (x86_memory_mismatch_stall & CPUMASK) 26290285Sobrien#define TARGET_PROLOGUE_USING_MOVE (x86_prologue_using_move & CPUMASK) 26390285Sobrien#define TARGET_EPILOGUE_USING_MOVE (x86_epilogue_using_move & CPUMASK) 26490285Sobrien#define TARGET_DECOMPOSE_LEA (x86_decompose_lea & CPUMASK) 26590285Sobrien#define TARGET_PREFETCH_SSE (x86_prefetch_sse) 266117407Skan#define TARGET_SHIFT1 (x86_shift1 & CPUMASK) 26752295Sobrien 26850654Sobrien#define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE) 26918334Speter 27090285Sobrien#define TARGET_ALIGN_STRINGOPS (!(target_flags & MASK_NO_ALIGN_STROPS)) 27190285Sobrien#define TARGET_INLINE_ALL_STRINGOPS (target_flags & MASK_INLINE_ALL_STROPS) 27218334Speter 27390285Sobrien#define ASSEMBLER_DIALECT (ix86_asm_dialect) 27490285Sobrien 27590285Sobrien#define TARGET_SSE ((target_flags & (MASK_SSE | MASK_SSE2)) != 0) 27690285Sobrien#define TARGET_SSE2 ((target_flags & MASK_SSE2) != 0) 27790285Sobrien#define TARGET_SSE_MATH ((ix86_fpmath & FPMATH_SSE) != 0) 27890285Sobrien#define TARGET_MIX_SSE_I387 ((ix86_fpmath & FPMATH_SSE) \ 27990285Sobrien && (ix86_fpmath & FPMATH_387)) 28090285Sobrien#define TARGET_MMX ((target_flags & MASK_MMX) != 0) 28190285Sobrien#define TARGET_3DNOW ((target_flags & MASK_3DNOW) != 0) 28290285Sobrien#define TARGET_3DNOW_A ((target_flags & MASK_3DNOW_A) != 0) 28390285Sobrien 28490285Sobrien#define TARGET_RED_ZONE (!(target_flags & MASK_NO_RED_ZONE)) 28590285Sobrien 28697911Sobrien#define TARGET_NO_ALIGN_LONG_STRINGS (target_flags & MASK_NO_ALIGN_LONG_STRINGS) 28797911Sobrien 288117407Skan#define TARGET_GNU_TLS (ix86_tls_dialect == TLS_DIALECT_GNU) 289117407Skan#define TARGET_SUN_TLS (ix86_tls_dialect == TLS_DIALECT_SUN) 290117407Skan 29196294Sobrien/* WARNING: Do not mark empty strings for translation, as calling 29296294Sobrien gettext on an empty string does NOT return an empty 29396294Sobrien string. */ 29496294Sobrien 29596294Sobrien 29690285Sobrien#define TARGET_SWITCHES \ 29790285Sobrien{ { "80387", MASK_80387, N_("Use hardware fp") }, \ 29890285Sobrien { "no-80387", -MASK_80387, N_("Do not use hardware fp") }, \ 29990285Sobrien { "hard-float", MASK_80387, N_("Use hardware fp") }, \ 30090285Sobrien { "soft-float", -MASK_80387, N_("Do not use hardware fp") }, \ 30190285Sobrien { "no-soft-float", MASK_80387, N_("Use hardware fp") }, \ 30296294Sobrien { "386", 0, "" /*Deprecated.*/}, \ 30396294Sobrien { "486", 0, "" /*Deprecated.*/}, \ 30496294Sobrien { "pentium", 0, "" /*Deprecated.*/}, \ 30596294Sobrien { "pentiumpro", 0, "" /*Deprecated.*/}, \ 30696294Sobrien { "intel-syntax", 0, "" /*Deprecated.*/}, \ 30796294Sobrien { "no-intel-syntax", 0, "" /*Deprecated.*/}, \ 30890285Sobrien { "rtd", MASK_RTD, \ 30990285Sobrien N_("Alternate calling convention") }, \ 31090285Sobrien { "no-rtd", -MASK_RTD, \ 31190285Sobrien N_("Use normal calling convention") }, \ 31290285Sobrien { "align-double", MASK_ALIGN_DOUBLE, \ 31390285Sobrien N_("Align some doubles on dword boundary") }, \ 31490285Sobrien { "no-align-double", -MASK_ALIGN_DOUBLE, \ 31590285Sobrien N_("Align doubles on word boundary") }, \ 31690285Sobrien { "svr3-shlib", MASK_SVR3_SHLIB, \ 31790285Sobrien N_("Uninitialized locals in .bss") }, \ 31890285Sobrien { "no-svr3-shlib", -MASK_SVR3_SHLIB, \ 31990285Sobrien N_("Uninitialized locals in .data") }, \ 32090285Sobrien { "ieee-fp", MASK_IEEE_FP, \ 32190285Sobrien N_("Use IEEE math for fp comparisons") }, \ 32290285Sobrien { "no-ieee-fp", -MASK_IEEE_FP, \ 32390285Sobrien N_("Do not use IEEE math for fp comparisons") }, \ 32490285Sobrien { "fp-ret-in-387", MASK_FLOAT_RETURNS, \ 32590285Sobrien N_("Return values of functions in FPU registers") }, \ 32690285Sobrien { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS , \ 32790285Sobrien N_("Do not return values of functions in FPU registers")}, \ 32890285Sobrien { "no-fancy-math-387", MASK_NO_FANCY_MATH_387, \ 32990285Sobrien N_("Do not generate sin, cos, sqrt for FPU") }, \ 33090285Sobrien { "fancy-math-387", -MASK_NO_FANCY_MATH_387, \ 33190285Sobrien N_("Generate sin, cos, sqrt for FPU")}, \ 33290285Sobrien { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER, \ 33390285Sobrien N_("Omit the frame pointer in leaf functions") }, \ 33490285Sobrien { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER, "" }, \ 33590285Sobrien { "stack-arg-probe", MASK_STACK_PROBE, \ 33690285Sobrien N_("Enable stack probing") }, \ 33790285Sobrien { "no-stack-arg-probe", -MASK_STACK_PROBE, "" }, \ 33890285Sobrien { "windows", 0, 0 /* undocumented */ }, \ 33990285Sobrien { "dll", 0, 0 /* undocumented */ }, \ 34090285Sobrien { "align-stringops", -MASK_NO_ALIGN_STROPS, \ 34190285Sobrien N_("Align destination of the string operations") }, \ 34290285Sobrien { "no-align-stringops", MASK_NO_ALIGN_STROPS, \ 34390285Sobrien N_("Do not align destination of the string operations") }, \ 34490285Sobrien { "inline-all-stringops", MASK_INLINE_ALL_STROPS, \ 34590285Sobrien N_("Inline all known string operations") }, \ 34690285Sobrien { "no-inline-all-stringops", -MASK_INLINE_ALL_STROPS, \ 34790285Sobrien N_("Do not inline all known string operations") }, \ 34890285Sobrien { "push-args", -MASK_NO_PUSH_ARGS, \ 34990285Sobrien N_("Use push instructions to save outgoing arguments") }, \ 35090285Sobrien { "no-push-args", MASK_NO_PUSH_ARGS, \ 35190285Sobrien N_("Do not use push instructions to save outgoing arguments") }, \ 352117407Skan { "accumulate-outgoing-args", MASK_ACCUMULATE_OUTGOING_ARGS, \ 35390285Sobrien N_("Use push instructions to save outgoing arguments") }, \ 354117407Skan { "no-accumulate-outgoing-args",-MASK_ACCUMULATE_OUTGOING_ARGS, \ 35590285Sobrien N_("Do not use push instructions to save outgoing arguments") }, \ 356117407Skan { "mmx", MASK_MMX, \ 35790285Sobrien N_("Support MMX built-in functions") }, \ 35890285Sobrien { "no-mmx", -MASK_MMX, \ 35990285Sobrien N_("Do not support MMX built-in functions") }, \ 360117407Skan { "3dnow", MASK_3DNOW, \ 36190285Sobrien N_("Support 3DNow! built-in functions") }, \ 362117407Skan { "no-3dnow", -MASK_3DNOW, \ 36390285Sobrien N_("Do not support 3DNow! built-in functions") }, \ 364117407Skan { "sse", MASK_SSE, \ 36590285Sobrien N_("Support MMX and SSE built-in functions and code generation") }, \ 366117407Skan { "no-sse", -MASK_SSE, \ 36790285Sobrien N_("Do not support MMX and SSE built-in functions and code generation") },\ 368117407Skan { "sse2", MASK_SSE2, \ 36990285Sobrien N_("Support MMX, SSE and SSE2 built-in functions and code generation") }, \ 370117407Skan { "no-sse2", -MASK_SSE2, \ 37190285Sobrien N_("Do not support MMX, SSE and SSE2 built-in functions and code generation") }, \ 37290285Sobrien { "128bit-long-double", MASK_128BIT_LONG_DOUBLE, \ 37390285Sobrien N_("sizeof(long double) is 16") }, \ 37490285Sobrien { "96bit-long-double", -MASK_128BIT_LONG_DOUBLE, \ 37590285Sobrien N_("sizeof(long double) is 12") }, \ 37690285Sobrien { "64", MASK_64BIT, \ 37790285Sobrien N_("Generate 64bit x86-64 code") }, \ 37890285Sobrien { "32", -MASK_64BIT, \ 37990285Sobrien N_("Generate 32bit i386 code") }, \ 38090285Sobrien { "red-zone", -MASK_NO_RED_ZONE, \ 38190285Sobrien N_("Use red-zone in the x86-64 code") }, \ 38290285Sobrien { "no-red-zone", MASK_NO_RED_ZONE, \ 38390285Sobrien N_("Do not use red-zone in the x86-64 code") }, \ 38497911Sobrien { "no-align-long-strings", MASK_NO_ALIGN_LONG_STRINGS, \ 38597911Sobrien N_("Do not align long strings specially") }, \ 38697911Sobrien { "align-long-strings", -MASK_NO_ALIGN_LONG_STRINGS, \ 38797911Sobrien N_("Align strings longer than 30 on a 32-byte boundary") }, \ 38890285Sobrien SUBTARGET_SWITCHES \ 389117407Skan { "", TARGET_DEFAULT | TARGET_64BIT_DEFAULT | TARGET_SUBTARGET_DEFAULT, 0 }} 39090285Sobrien 391117407Skan#ifndef TARGET_64BIT_DEFAULT 392117407Skan#define TARGET_64BIT_DEFAULT 0 39390285Sobrien#endif 39490285Sobrien 395117407Skan/* Once GDB has been enhanced to deal with functions without frame 396117407Skan pointers, we can change this to allow for elimination of 397117407Skan the frame pointer in leaf functions. */ 398117407Skan#define TARGET_DEFAULT 0 39950654Sobrien 400117407Skan/* This is not really a target flag, but is done this way so that 401117407Skan it's analogous to similar code for Mach-O on PowerPC. darwin.h 402117407Skan redefines this to 1. */ 403117407Skan#define TARGET_MACHO 0 40450654Sobrien 40518334Speter/* This macro is similar to `TARGET_SWITCHES' but defines names of 40618334Speter command options that have values. Its definition is an 40718334Speter initializer with a subgrouping for each command option. 40818334Speter 40918334Speter Each subgrouping contains a string constant, that defines the 41018334Speter fixed part of the option name, and the address of a variable. The 41118334Speter variable, type `char *', is set to the variable part of the given 41218334Speter option if the fixed part matches. The actual option name is made 41318334Speter by appending `-m' to the specified name. */ 41490285Sobrien#define TARGET_OPTIONS \ 41590285Sobrien{ { "cpu=", &ix86_cpu_string, \ 41690285Sobrien N_("Schedule code for given CPU")}, \ 41790285Sobrien { "fpmath=", &ix86_fpmath_string, \ 41890285Sobrien N_("Generate floating point mathematics using given instruction set")},\ 41990285Sobrien { "arch=", &ix86_arch_string, \ 42090285Sobrien N_("Generate code for given CPU")}, \ 42190285Sobrien { "regparm=", &ix86_regparm_string, \ 42290285Sobrien N_("Number of registers used to pass integer arguments") }, \ 42390285Sobrien { "align-loops=", &ix86_align_loops_string, \ 42490285Sobrien N_("Loop code aligned to this power of 2") }, \ 42590285Sobrien { "align-jumps=", &ix86_align_jumps_string, \ 42690285Sobrien N_("Jump targets are aligned to this power of 2") }, \ 42790285Sobrien { "align-functions=", &ix86_align_funcs_string, \ 42890285Sobrien N_("Function starts are aligned to this power of 2") }, \ 42990285Sobrien { "preferred-stack-boundary=", \ 43090285Sobrien &ix86_preferred_stack_boundary_string, \ 43190285Sobrien N_("Attempt to keep stack aligned to this power of 2") }, \ 43290285Sobrien { "branch-cost=", &ix86_branch_cost_string, \ 43390285Sobrien N_("Branches are this expensive (1-5, arbitrary units)") }, \ 43490285Sobrien { "cmodel=", &ix86_cmodel_string, \ 43590285Sobrien N_("Use given x86-64 code model") }, \ 43690285Sobrien { "debug-arg", &ix86_debug_arg_string, \ 43796294Sobrien "" /* Undocumented. */ }, \ 43890285Sobrien { "debug-addr", &ix86_debug_addr_string, \ 43996294Sobrien "" /* Undocumented. */ }, \ 44090285Sobrien { "asm=", &ix86_asm_string, \ 44190285Sobrien N_("Use given assembler dialect") }, \ 442117407Skan { "tls-dialect=", &ix86_tls_dialect_string, \ 443117407Skan N_("Use given thread-local storage dialect") }, \ 44490285Sobrien SUBTARGET_OPTIONS \ 44518334Speter} 44618334Speter 44718334Speter/* Sometimes certain combinations of command options do not make 44818334Speter sense on a particular target machine. You can define a macro 44918334Speter `OVERRIDE_OPTIONS' to take account of this. This macro, if 45018334Speter defined, is executed once just after all the command options have 45118334Speter been parsed. 45218334Speter 45318334Speter Don't use this macro to turn on various extra optimizations for 45418334Speter `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */ 45518334Speter 45618334Speter#define OVERRIDE_OPTIONS override_options () 45718334Speter 45818334Speter/* These are meant to be redefined in the host dependent files */ 45918334Speter#define SUBTARGET_SWITCHES 46018334Speter#define SUBTARGET_OPTIONS 46118334Speter 46250654Sobrien/* Define this to change the optimizations performed by default. */ 46390285Sobrien#define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \ 46490285Sobrien optimization_options ((LEVEL), (SIZE)) 46550654Sobrien 46650654Sobrien/* Specs for the compiler proper */ 46750654Sobrien 46850654Sobrien#ifndef CC1_CPU_SPEC 46950654Sobrien#define CC1_CPU_SPEC "\ 47050654Sobrien%{!mcpu*: \ 47190285Sobrien%{m386:-mcpu=i386 \ 47290285Sobrien%n`-m386' is deprecated. Use `-march=i386' or `-mcpu=i386' instead.\n} \ 47390285Sobrien%{m486:-mcpu=i486 \ 47490285Sobrien%n`-m486' is deprecated. Use `-march=i486' or `-mcpu=i486' instead.\n} \ 47590285Sobrien%{mpentium:-mcpu=pentium \ 47690285Sobrien%n`-mpentium' is deprecated. Use `-march=pentium' or `-mcpu=pentium' instead.\n} \ 47790285Sobrien%{mpentiumpro:-mcpu=pentiumpro \ 47890285Sobrien%n`-mpentiumpro' is deprecated. Use `-march=pentiumpro' or `-mcpu=pentiumpro' instead.\n}} \ 47990285Sobrien%{mintel-syntax:-masm=intel \ 48090285Sobrien%n`-mintel-syntax' is deprecated. Use `-masm=intel' instead.\n} \ 48190285Sobrien%{mno-intel-syntax:-masm=att \ 48290285Sobrien%n`-mno-intel-syntax' is deprecated. Use `-masm=att' instead.\n}" 48350654Sobrien#endif 48418334Speter 485117407Skan/* Target CPU builtins. */ 486117407Skan#define TARGET_CPU_CPP_BUILTINS() \ 487117407Skan do \ 488117407Skan { \ 489117407Skan size_t arch_len = strlen (ix86_arch_string); \ 490117407Skan size_t cpu_len = strlen (ix86_cpu_string); \ 491117407Skan int last_arch_char = ix86_arch_string[arch_len - 1]; \ 492117407Skan int last_cpu_char = ix86_cpu_string[cpu_len - 1]; \ 493117407Skan \ 494117407Skan if (TARGET_64BIT) \ 495117407Skan { \ 496117407Skan builtin_assert ("cpu=x86_64"); \ 497117407Skan builtin_define ("__x86_64"); \ 498117407Skan builtin_define ("__x86_64__"); \ 499117407Skan builtin_define ("__amd64"); \ 500117407Skan builtin_define ("__amd64__"); \ 501117407Skan } \ 502117407Skan else \ 503117407Skan { \ 504117407Skan builtin_assert ("cpu=i386"); \ 505117407Skan builtin_assert ("machine=i386"); \ 506117407Skan builtin_define_std ("i386"); \ 507117407Skan } \ 508117407Skan \ 509117407Skan /* Built-ins based on -mcpu= (or -march= if no \ 510117407Skan CPU given). */ \ 511117407Skan if (TARGET_386) \ 512117407Skan builtin_define ("__tune_i386__"); \ 513117407Skan else if (TARGET_486) \ 514117407Skan builtin_define ("__tune_i486__"); \ 515117407Skan else if (TARGET_PENTIUM) \ 516117407Skan { \ 517117407Skan builtin_define ("__tune_i586__"); \ 518117407Skan builtin_define ("__tune_pentium__"); \ 519117407Skan if (last_cpu_char == 'x') \ 520117407Skan builtin_define ("__tune_pentium_mmx__"); \ 521117407Skan } \ 522117407Skan else if (TARGET_PENTIUMPRO) \ 523117407Skan { \ 524117407Skan builtin_define ("__tune_i686__"); \ 525117407Skan builtin_define ("__tune_pentiumpro__"); \ 526117407Skan switch (last_cpu_char) \ 527117407Skan { \ 528117407Skan case '3': \ 529117407Skan builtin_define ("__tune_pentium3__"); \ 530117407Skan /* FALLTHRU */ \ 531117407Skan case '2': \ 532117407Skan builtin_define ("__tune_pentium2__"); \ 533117407Skan break; \ 534117407Skan } \ 535117407Skan } \ 536117407Skan else if (TARGET_K6) \ 537117407Skan { \ 538117407Skan builtin_define ("__tune_k6__"); \ 539117407Skan if (last_cpu_char == '2') \ 540117407Skan builtin_define ("__tune_k6_2__"); \ 541117407Skan else if (last_cpu_char == '3') \ 542117407Skan builtin_define ("__tune_k6_3__"); \ 543117407Skan } \ 544117407Skan else if (TARGET_ATHLON) \ 545117407Skan { \ 546117407Skan builtin_define ("__tune_athlon__"); \ 547117407Skan /* Only plain "athlon" lacks SSE. */ \ 548117407Skan if (last_cpu_char != 'n') \ 549117407Skan builtin_define ("__tune_athlon_sse__"); \ 550117407Skan } \ 551117407Skan else if (TARGET_PENTIUM4) \ 552117407Skan builtin_define ("__tune_pentium4__"); \ 553117407Skan \ 554117407Skan if (TARGET_MMX) \ 555117407Skan builtin_define ("__MMX__"); \ 556117407Skan if (TARGET_3DNOW) \ 557117407Skan builtin_define ("__3dNOW__"); \ 558117407Skan if (TARGET_3DNOW_A) \ 559117407Skan builtin_define ("__3dNOW_A__"); \ 560117407Skan if (TARGET_SSE) \ 561117407Skan builtin_define ("__SSE__"); \ 562117407Skan if (TARGET_SSE2) \ 563117407Skan builtin_define ("__SSE2__"); \ 564117407Skan if (TARGET_SSE_MATH && TARGET_SSE) \ 565117407Skan builtin_define ("__SSE_MATH__"); \ 566117407Skan if (TARGET_SSE_MATH && TARGET_SSE2) \ 567117407Skan builtin_define ("__SSE2_MATH__"); \ 568117407Skan \ 569117407Skan /* Built-ins based on -march=. */ \ 570117407Skan if (ix86_arch == PROCESSOR_I486) \ 571117407Skan { \ 572117407Skan builtin_define ("__i486"); \ 573117407Skan builtin_define ("__i486__"); \ 574117407Skan } \ 575117407Skan else if (ix86_arch == PROCESSOR_PENTIUM) \ 576117407Skan { \ 577117407Skan builtin_define ("__i586"); \ 578117407Skan builtin_define ("__i586__"); \ 579117407Skan builtin_define ("__pentium"); \ 580117407Skan builtin_define ("__pentium__"); \ 581117407Skan if (last_arch_char == 'x') \ 582117407Skan builtin_define ("__pentium_mmx__"); \ 583117407Skan } \ 584117407Skan else if (ix86_arch == PROCESSOR_PENTIUMPRO) \ 585117407Skan { \ 586117407Skan builtin_define ("__i686"); \ 587117407Skan builtin_define ("__i686__"); \ 588117407Skan builtin_define ("__pentiumpro"); \ 589117407Skan builtin_define ("__pentiumpro__"); \ 590117407Skan } \ 591117407Skan else if (ix86_arch == PROCESSOR_K6) \ 592117407Skan { \ 593117407Skan \ 594117407Skan builtin_define ("__k6"); \ 595117407Skan builtin_define ("__k6__"); \ 596117407Skan if (last_arch_char == '2') \ 597117407Skan builtin_define ("__k6_2__"); \ 598117407Skan else if (last_arch_char == '3') \ 599117407Skan builtin_define ("__k6_3__"); \ 600117407Skan } \ 601117407Skan else if (ix86_arch == PROCESSOR_ATHLON) \ 602117407Skan { \ 603117407Skan builtin_define ("__athlon"); \ 604117407Skan builtin_define ("__athlon__"); \ 605117407Skan /* Only plain "athlon" lacks SSE. */ \ 606117407Skan if (last_arch_char != 'n') \ 607117407Skan builtin_define ("__athlon_sse__"); \ 608117407Skan } \ 609117407Skan else if (ix86_arch == PROCESSOR_PENTIUM4) \ 610117407Skan { \ 611117407Skan builtin_define ("__pentium4"); \ 612117407Skan builtin_define ("__pentium4__"); \ 613117407Skan } \ 614117407Skan } \ 615117407Skan while (0) 616117407Skan 61790285Sobrien#define TARGET_CPU_DEFAULT_i386 0 61890285Sobrien#define TARGET_CPU_DEFAULT_i486 1 61990285Sobrien#define TARGET_CPU_DEFAULT_pentium 2 62090285Sobrien#define TARGET_CPU_DEFAULT_pentium_mmx 3 62190285Sobrien#define TARGET_CPU_DEFAULT_pentiumpro 4 62290285Sobrien#define TARGET_CPU_DEFAULT_pentium2 5 62390285Sobrien#define TARGET_CPU_DEFAULT_pentium3 6 62490285Sobrien#define TARGET_CPU_DEFAULT_pentium4 7 62590285Sobrien#define TARGET_CPU_DEFAULT_k6 8 62690285Sobrien#define TARGET_CPU_DEFAULT_k6_2 9 62790285Sobrien#define TARGET_CPU_DEFAULT_k6_3 10 62890285Sobrien#define TARGET_CPU_DEFAULT_athlon 11 62990285Sobrien#define TARGET_CPU_DEFAULT_athlon_sse 12 63050654Sobrien 63190285Sobrien#define TARGET_CPU_DEFAULT_NAMES {"i386", "i486", "pentium", "pentium-mmx",\ 63290285Sobrien "pentiumpro", "pentium2", "pentium3", \ 63390285Sobrien "pentium4", "k6", "k6-2", "k6-3",\ 63490285Sobrien "athlon", "athlon-4"} 63550654Sobrien 63650654Sobrien#ifndef CC1_SPEC 63790285Sobrien#define CC1_SPEC "%(cc1_cpu) " 63850654Sobrien#endif 63950654Sobrien 64050654Sobrien/* This macro defines names of additional specifications to put in the 64150654Sobrien specs that can be used in various specifications like CC1_SPEC. Its 64250654Sobrien definition is an initializer with a subgrouping for each command option. 64350654Sobrien 64450654Sobrien Each subgrouping contains a string constant, that defines the 64550654Sobrien specification name, and a string constant that used by the GNU CC driver 64650654Sobrien program. 64750654Sobrien 64850654Sobrien Do not define this macro if it does not need to do anything. */ 64950654Sobrien 65050654Sobrien#ifndef SUBTARGET_EXTRA_SPECS 65150654Sobrien#define SUBTARGET_EXTRA_SPECS 65250654Sobrien#endif 65350654Sobrien 65450654Sobrien#define EXTRA_SPECS \ 65550654Sobrien { "cc1_cpu", CC1_CPU_SPEC }, \ 65650654Sobrien SUBTARGET_EXTRA_SPECS 65750654Sobrien 65818334Speter/* target machine storage layout */ 65918334Speter 66090285Sobrien/* Define for XFmode or TFmode extended real floating point support. 66190285Sobrien The XFmode is specified by i386 ABI, while TFmode may be faster 662117407Skan due to alignment and simplifications in the address calculations. */ 66390285Sobrien#define LONG_DOUBLE_TYPE_SIZE (TARGET_128BIT_LONG_DOUBLE ? 128 : 96) 66490285Sobrien#define MAX_LONG_DOUBLE_TYPE_SIZE 128 66590285Sobrien#ifdef __x86_64__ 66690285Sobrien#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128 66790285Sobrien#else 66890285Sobrien#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 96 66990285Sobrien#endif 67018334Speter 671117407Skan/* Set the value of FLT_EVAL_METHOD in float.h. When using only the 672117407Skan FPU, assume that the fpcw is set to extended precision; when using 673117407Skan only SSE, rounding is correct; when using both SSE and the FPU, 674117407Skan the rounding precision is indeterminate, since either may be chosen 675117407Skan apparently at random. */ 676117407Skan#define TARGET_FLT_EVAL_METHOD \ 677117407Skan (TARGET_MIX_SSE_I387 ? -1 : TARGET_SSE_MATH ? 1 : 2) 67890285Sobrien 67990285Sobrien#define SHORT_TYPE_SIZE 16 68090285Sobrien#define INT_TYPE_SIZE 32 68190285Sobrien#define FLOAT_TYPE_SIZE 32 68297912Sobrien#ifndef LONG_TYPE_SIZE 68390285Sobrien#define LONG_TYPE_SIZE BITS_PER_WORD 68497912Sobrien#endif 68590285Sobrien#define MAX_WCHAR_TYPE_SIZE 32 68690285Sobrien#define DOUBLE_TYPE_SIZE 64 68790285Sobrien#define LONG_LONG_TYPE_SIZE 64 68890285Sobrien 689117407Skan#if defined (TARGET_BI_ARCH) || TARGET_64BIT_DEFAULT 69090285Sobrien#define MAX_BITS_PER_WORD 64 69190285Sobrien#define MAX_LONG_TYPE_SIZE 64 69290285Sobrien#else 69390285Sobrien#define MAX_BITS_PER_WORD 32 69490285Sobrien#define MAX_LONG_TYPE_SIZE 32 69590285Sobrien#endif 69690285Sobrien 69718334Speter/* Define this if most significant byte of a word is the lowest numbered. */ 69818334Speter/* That is true on the 80386. */ 69918334Speter 70018334Speter#define BITS_BIG_ENDIAN 0 70118334Speter 70218334Speter/* Define this if most significant byte of a word is the lowest numbered. */ 70318334Speter/* That is not true on the 80386. */ 70418334Speter#define BYTES_BIG_ENDIAN 0 70518334Speter 70618334Speter/* Define this if most significant word of a multiword number is the lowest 70718334Speter numbered. */ 70818334Speter/* Not true for 80386 */ 70918334Speter#define WORDS_BIG_ENDIAN 0 71018334Speter 71118334Speter/* Width of a word, in units (bytes). */ 71290285Sobrien#define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) 713117407Skan#ifdef IN_LIBGCC2 714117407Skan#define MIN_UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) 715117407Skan#else 716117407Skan#define MIN_UNITS_PER_WORD 4 717117407Skan#endif 71818334Speter 71918334Speter/* Allocation boundary (in *bits*) for storing arguments in argument list. */ 72090285Sobrien#define PARM_BOUNDARY BITS_PER_WORD 72118334Speter 72290285Sobrien/* Boundary (in *bits*) on which stack pointer should be aligned. */ 72390285Sobrien#define STACK_BOUNDARY BITS_PER_WORD 72418334Speter 72552295Sobrien/* Boundary (in *bits*) on which the stack pointer preferrs to be 72652295Sobrien aligned; the compiler cannot rely on having this alignment. */ 72790285Sobrien#define PREFERRED_STACK_BOUNDARY ix86_preferred_stack_boundary 72852295Sobrien 72990285Sobrien/* As of July 2001, many runtimes to not align the stack properly when 73090285Sobrien entering main. This causes expand_main_function to forcably align 73190285Sobrien the stack, which results in aligned frames for functions called from 73290285Sobrien main, though it does nothing for the alignment of main itself. */ 73390285Sobrien#define FORCE_PREFERRED_STACK_BOUNDARY_IN_MAIN \ 73490285Sobrien (ix86_preferred_stack_boundary > STACK_BOUNDARY && !TARGET_64BIT) 73518334Speter 736104768Skan/* Minimum allocation boundary for the code of a function. */ 737104768Skan#define FUNCTION_BOUNDARY 8 73818334Speter 739104768Skan/* C++ stores the virtual bit in the lowest bit of function pointers. */ 740104768Skan#define TARGET_PTRMEMFUNC_VBIT_LOCATION ptrmemfunc_vbit_in_pfn 741104768Skan 74290285Sobrien/* Alignment of field after `int : 0' in a structure. */ 74318334Speter 74490285Sobrien#define EMPTY_FIELD_BOUNDARY BITS_PER_WORD 74590285Sobrien 74618334Speter/* Minimum size in bits of the largest boundary to which any 74718334Speter and all fundamental data types supported by the hardware 74818334Speter might need to be aligned. No data type wants to be aligned 74990285Sobrien rounder than this. 750117407Skan 75190285Sobrien Pentium+ preferrs DFmode values to be aligned to 64 bit boundary 75290285Sobrien and Pentium Pro XFmode values at 128 bit boundaries. */ 75318334Speter 75490285Sobrien#define BIGGEST_ALIGNMENT 128 75590285Sobrien 756117407Skan/* Decide whether a variable of mode MODE should be 128 bit aligned. */ 75790285Sobrien#define ALIGN_MODE_128(MODE) \ 758117407Skan ((MODE) == XFmode || (MODE) == TFmode || SSE_REG_MODE_P (MODE)) 75990285Sobrien 76090285Sobrien/* The published ABIs say that doubles should be aligned on word 76190285Sobrien boundaries, so lower the aligment for structure fields unless 76290285Sobrien -malign-double is set. */ 763102801Skan 764102801Skan/* ??? Blah -- this macro is used directly by libobjc. Since it 765102801Skan supports no vector modes, cut out the complexity and fall back 766102801Skan on BIGGEST_FIELD_ALIGNMENT. */ 767102801Skan#ifdef IN_TARGET_LIBS 768117407Skan#ifdef __x86_64__ 769117407Skan#define BIGGEST_FIELD_ALIGNMENT 128 770117407Skan#else 771102801Skan#define BIGGEST_FIELD_ALIGNMENT 32 772117407Skan#endif 77390285Sobrien#else 774102801Skan#define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \ 775102801Skan x86_field_alignment (FIELD, COMPUTED) 77690285Sobrien#endif 77790285Sobrien 77850654Sobrien/* If defined, a C expression to compute the alignment given to a 77990285Sobrien constant that is being placed in memory. EXP is the constant 78050654Sobrien and ALIGN is the alignment that the object would ordinarily have. 78150654Sobrien The value of this macro is used instead of that alignment to align 78250654Sobrien the object. 78350654Sobrien 78450654Sobrien If this macro is not defined, then ALIGN is used. 78550654Sobrien 78650654Sobrien The typical use of this macro is to increase alignment for string 78750654Sobrien constants to be word aligned so that `strcpy' calls that copy 78850654Sobrien constants can be done inline. */ 78950654Sobrien 79090285Sobrien#define CONSTANT_ALIGNMENT(EXP, ALIGN) ix86_constant_alignment ((EXP), (ALIGN)) 79150654Sobrien 79250654Sobrien/* If defined, a C expression to compute the alignment for a static 79350654Sobrien variable. TYPE is the data type, and ALIGN is the alignment that 79450654Sobrien the object would ordinarily have. The value of this macro is used 79550654Sobrien instead of that alignment to align the object. 79650654Sobrien 79750654Sobrien If this macro is not defined, then ALIGN is used. 79850654Sobrien 79950654Sobrien One use of this macro is to increase alignment of medium-size 80050654Sobrien data to make it all fit in fewer cache lines. Another is to 80150654Sobrien cause character arrays to be word-aligned so that `strcpy' calls 80250654Sobrien that copy constants to character arrays can be done inline. */ 80350654Sobrien 80490285Sobrien#define DATA_ALIGNMENT(TYPE, ALIGN) ix86_data_alignment ((TYPE), (ALIGN)) 80550654Sobrien 80652295Sobrien/* If defined, a C expression to compute the alignment for a local 80752295Sobrien variable. TYPE is the data type, and ALIGN is the alignment that 80852295Sobrien the object would ordinarily have. The value of this macro is used 80952295Sobrien instead of that alignment to align the object. 81052295Sobrien 81152295Sobrien If this macro is not defined, then ALIGN is used. 81252295Sobrien 81352295Sobrien One use of this macro is to increase alignment of medium-size 81452295Sobrien data to make it all fit in fewer cache lines. */ 81552295Sobrien 81690285Sobrien#define LOCAL_ALIGNMENT(TYPE, ALIGN) ix86_local_alignment ((TYPE), (ALIGN)) 81752295Sobrien 81890285Sobrien/* If defined, a C expression that gives the alignment boundary, in 81990285Sobrien bits, of an argument with the specified mode and type. If it is 82090285Sobrien not defined, `PARM_BOUNDARY' is used for all arguments. */ 82190285Sobrien 82290285Sobrien#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ 82390285Sobrien ix86_function_arg_boundary ((MODE), (TYPE)) 82490285Sobrien 825117407Skan/* Set this nonzero if move instructions will actually fail to work 82618334Speter when given unaligned data. */ 82718334Speter#define STRICT_ALIGNMENT 0 82818334Speter 82918334Speter/* If bit field type is int, don't let it cross an int, 83018334Speter and give entire struct the alignment of an int. */ 831117407Skan/* Required on the 386 since it doesn't have bit-field insns. */ 83218334Speter#define PCC_BITFIELD_TYPE_MATTERS 1 83318334Speter 83418334Speter/* Standard register usage. */ 83518334Speter 83618334Speter/* This processor has special stack-like registers. See reg-stack.c 83790285Sobrien for details. */ 83818334Speter 83918334Speter#define STACK_REGS 84090285Sobrien#define IS_STACK_MODE(MODE) \ 84190285Sobrien ((MODE) == DFmode || (MODE) == SFmode || (MODE) == XFmode \ 84290285Sobrien || (MODE) == TFmode) 84318334Speter 84418334Speter/* Number of actual hardware registers. 84518334Speter The hardware registers are assigned numbers for the compiler 84618334Speter from 0 to just below FIRST_PSEUDO_REGISTER. 84718334Speter All registers that the compiler knows about must be given numbers, 84818334Speter even those that are not normally considered general registers. 84918334Speter 85018334Speter In the 80386 we give the 8 general purpose registers the numbers 0-7. 85118334Speter We number the floating point registers 8-15. 85218334Speter Note that registers 0-7 can be accessed as a short or int, 85318334Speter while only 0-3 may be used with byte `mov' instructions. 85418334Speter 85518334Speter Reg 16 does not correspond to any hardware register, but instead 85618334Speter appears in the RTL as an argument pointer prior to reload, and is 85718334Speter eliminated during reloading in favor of either the stack or frame 85890285Sobrien pointer. */ 85918334Speter 86090285Sobrien#define FIRST_PSEUDO_REGISTER 53 86118334Speter 86290285Sobrien/* Number of hardware registers that go into the DWARF-2 unwind info. 86390285Sobrien If not defined, equals FIRST_PSEUDO_REGISTER. */ 86490285Sobrien 86590285Sobrien#define DWARF_FRAME_REGISTERS 17 86690285Sobrien 86718334Speter/* 1 for registers that have pervasive standard uses 86818334Speter and are not available for the register allocator. 86990285Sobrien On the 80386, the stack pointer is such, as is the arg pointer. 870117407Skan 87190285Sobrien The value is an mask - bit 1 is set for fixed registers 87290285Sobrien for 32bit target, while 2 is set for fixed registers for 64bit. 87390285Sobrien Proper value is computed in the CONDITIONAL_REGISTER_USAGE. 87490285Sobrien */ 87590285Sobrien#define FIXED_REGISTERS \ 87690285Sobrien/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/ \ 87790285Sobrien{ 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, \ 87890285Sobrien/*arg,flags,fpsr,dir,frame*/ \ 87990285Sobrien 3, 3, 3, 3, 3, \ 88090285Sobrien/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \ 88190285Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 88290285Sobrien/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/ \ 88390285Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 88490285Sobrien/* r8, r9, r10, r11, r12, r13, r14, r15*/ \ 88590285Sobrien 1, 1, 1, 1, 1, 1, 1, 1, \ 88690285Sobrien/*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/ \ 88790285Sobrien 1, 1, 1, 1, 1, 1, 1, 1} 88818334Speter 889117407Skan 89018334Speter/* 1 for registers not available across function calls. 89118334Speter These must include the FIXED_REGISTERS and also any 89218334Speter registers that can be used without being saved. 89318334Speter The latter must include the registers where values are returned 89418334Speter and the register where structure-value addresses are passed. 895117407Skan Aside from that, you can include as many other registers as you like. 896117407Skan 89790285Sobrien The value is an mask - bit 1 is set for call used 89890285Sobrien for 32bit target, while 2 is set for call used for 64bit. 89990285Sobrien Proper value is computed in the CONDITIONAL_REGISTER_USAGE. 90090285Sobrien*/ 90190285Sobrien#define CALL_USED_REGISTERS \ 90290285Sobrien/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/ \ 90390285Sobrien{ 3, 3, 3, 0, 2, 2, 0, 3, 3, 3, 3, 3, 3, 3, 3, 3, \ 90490285Sobrien/*arg,flags,fpsr,dir,frame*/ \ 90590285Sobrien 3, 3, 3, 3, 3, \ 90690285Sobrien/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \ 90790285Sobrien 3, 3, 3, 3, 3, 3, 3, 3, \ 90890285Sobrien/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/ \ 90990285Sobrien 3, 3, 3, 3, 3, 3, 3, 3, \ 91090285Sobrien/* r8, r9, r10, r11, r12, r13, r14, r15*/ \ 91190285Sobrien 3, 3, 3, 3, 1, 1, 1, 1, \ 91290285Sobrien/*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/ \ 91390285Sobrien 3, 3, 3, 3, 3, 3, 3, 3} \ 91418334Speter 91518334Speter/* Order in which to allocate registers. Each register must be 91618334Speter listed once, even those in FIXED_REGISTERS. List frame pointer 91718334Speter late and fixed registers last. Note that, in general, we prefer 91818334Speter registers listed in CALL_USED_REGISTERS, keeping the others 91918334Speter available for storage of persistent values. 92018334Speter 92196294Sobrien The ORDER_REGS_FOR_LOCAL_ALLOC actually overwrite the order, 92296294Sobrien so this is just empty initializer for array. */ 92318334Speter 92496294Sobrien#define REG_ALLOC_ORDER \ 92596294Sobrien{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,\ 92696294Sobrien 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, \ 92796294Sobrien 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \ 92896294Sobrien 48, 49, 50, 51, 52 } 92918334Speter 93096294Sobrien/* ORDER_REGS_FOR_LOCAL_ALLOC is a macro which permits reg_alloc_order 93196294Sobrien to be rearranged based on a particular function. When using sse math, 93296294Sobrien we want to allocase SSE before x87 registers and vice vera. */ 93318334Speter 93496294Sobrien#define ORDER_REGS_FOR_LOCAL_ALLOC x86_order_regs_for_local_alloc () 93518334Speter 93618334Speter 93718334Speter/* Macro to conditionally modify fixed_regs/call_used_regs. */ 93890285Sobrien#define CONDITIONAL_REGISTER_USAGE \ 93990285Sobriendo { \ 94090285Sobrien int i; \ 94190285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 94290285Sobrien { \ 94390285Sobrien fixed_regs[i] = (fixed_regs[i] & (TARGET_64BIT ? 2 : 1)) != 0; \ 94490285Sobrien call_used_regs[i] = (call_used_regs[i] \ 94590285Sobrien & (TARGET_64BIT ? 2 : 1)) != 0; \ 94690285Sobrien } \ 94796294Sobrien if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \ 94890285Sobrien { \ 94990285Sobrien fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 95090285Sobrien call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 95190285Sobrien } \ 95290285Sobrien if (! TARGET_MMX) \ 95390285Sobrien { \ 95490285Sobrien int i; \ 95590285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 95690285Sobrien if (TEST_HARD_REG_BIT (reg_class_contents[(int)MMX_REGS], i)) \ 95790285Sobrien fixed_regs[i] = call_used_regs[i] = 1; \ 95890285Sobrien } \ 95990285Sobrien if (! TARGET_SSE) \ 96090285Sobrien { \ 96190285Sobrien int i; \ 96290285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 96390285Sobrien if (TEST_HARD_REG_BIT (reg_class_contents[(int)SSE_REGS], i)) \ 96490285Sobrien fixed_regs[i] = call_used_regs[i] = 1; \ 96590285Sobrien } \ 96690285Sobrien if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \ 96790285Sobrien { \ 96890285Sobrien int i; \ 96990285Sobrien HARD_REG_SET x; \ 97090285Sobrien COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \ 97190285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 97290285Sobrien if (TEST_HARD_REG_BIT (x, i)) \ 97390285Sobrien fixed_regs[i] = call_used_regs[i] = 1; \ 97490285Sobrien } \ 97590285Sobrien } while (0) 97618334Speter 97718334Speter/* Return number of consecutive hard regs needed starting at reg REGNO 97818334Speter to hold something of mode MODE. 97918334Speter This is ordinarily the length in words of a value of mode MODE 98018334Speter but can be less for certain modes in special long registers. 98118334Speter 982117407Skan Actually there are no two word move instructions for consecutive 98318334Speter registers. And only registers 0-3 may have mov byte instructions 98418334Speter applied to them. 98518334Speter */ 98618334Speter 98718334Speter#define HARD_REGNO_NREGS(REGNO, MODE) \ 98890285Sobrien (FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO) \ 98990285Sobrien ? (COMPLEX_MODE_P (MODE) ? 2 : 1) \ 99090285Sobrien : ((MODE) == TFmode \ 99190285Sobrien ? (TARGET_64BIT ? 2 : 3) \ 99290285Sobrien : (MODE) == TCmode \ 99390285Sobrien ? (TARGET_64BIT ? 4 : 6) \ 99490285Sobrien : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) 99518334Speter 996117407Skan#define VALID_SSE2_REG_MODE(MODE) \ 997117407Skan ((MODE) == V16QImode || (MODE) == V8HImode || (MODE) == V2DFmode \ 998117407Skan || (MODE) == V2DImode) 999117407Skan 100090285Sobrien#define VALID_SSE_REG_MODE(MODE) \ 100190285Sobrien ((MODE) == TImode || (MODE) == V4SFmode || (MODE) == V4SImode \ 100290285Sobrien || (MODE) == SFmode \ 1003117407Skan /* Always accept SSE2 modes so that xmmintrin.h compiles. */ \ 1004117407Skan || VALID_SSE2_REG_MODE (MODE) \ 100590285Sobrien || (TARGET_SSE2 && ((MODE) == DFmode || VALID_MMX_REG_MODE (MODE)))) 100618334Speter 100790285Sobrien#define VALID_MMX_REG_MODE_3DNOW(MODE) \ 100890285Sobrien ((MODE) == V2SFmode || (MODE) == SFmode) 100918334Speter 101090285Sobrien#define VALID_MMX_REG_MODE(MODE) \ 101190285Sobrien ((MODE) == DImode || (MODE) == V8QImode || (MODE) == V4HImode \ 101290285Sobrien || (MODE) == V2SImode || (MODE) == SImode) 101318334Speter 101490285Sobrien#define VECTOR_MODE_SUPPORTED_P(MODE) \ 101590285Sobrien (VALID_SSE_REG_MODE (MODE) && TARGET_SSE ? 1 \ 101690285Sobrien : VALID_MMX_REG_MODE (MODE) && TARGET_MMX ? 1 \ 101790285Sobrien : VALID_MMX_REG_MODE_3DNOW (MODE) && TARGET_3DNOW ? 1 : 0) 101890285Sobrien 101990285Sobrien#define VALID_FP_MODE_P(MODE) \ 102090285Sobrien ((MODE) == SFmode || (MODE) == DFmode || (MODE) == TFmode \ 102190285Sobrien || (!TARGET_64BIT && (MODE) == XFmode) \ 102290285Sobrien || (MODE) == SCmode || (MODE) == DCmode || (MODE) == TCmode \ 102390285Sobrien || (!TARGET_64BIT && (MODE) == XCmode)) 102490285Sobrien 102590285Sobrien#define VALID_INT_MODE_P(MODE) \ 102690285Sobrien ((MODE) == QImode || (MODE) == HImode || (MODE) == SImode \ 102790285Sobrien || (MODE) == DImode \ 102890285Sobrien || (MODE) == CQImode || (MODE) == CHImode || (MODE) == CSImode \ 102990285Sobrien || (MODE) == CDImode \ 103090285Sobrien || (TARGET_64BIT && ((MODE) == TImode || (MODE) == CTImode))) 103190285Sobrien 1032117407Skan/* Return true for modes passed in SSE registers. */ 1033117407Skan#define SSE_REG_MODE_P(MODE) \ 1034117407Skan ((MODE) == TImode || (MODE) == V16QImode \ 1035117407Skan || (MODE) == V8HImode || (MODE) == V2DFmode || (MODE) == V2DImode \ 1036117407Skan || (MODE) == V4SFmode || (MODE) == V4SImode) 1037117407Skan 1038117407Skan/* Return true for modes passed in MMX registers. */ 1039117407Skan#define MMX_REG_MODE_P(MODE) \ 1040117407Skan ((MODE) == V8QImode || (MODE) == V4HImode || (MODE) == V2SImode \ 1041117407Skan || (MODE) == V2SFmode) 1042117407Skan 104390285Sobrien/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */ 104490285Sobrien 104590285Sobrien#define HARD_REGNO_MODE_OK(REGNO, MODE) \ 104690285Sobrien ix86_hard_regno_mode_ok ((REGNO), (MODE)) 104790285Sobrien 104818334Speter/* Value is 1 if it is a good idea to tie two pseudo registers 104918334Speter when one has mode MODE1 and one has mode MODE2. 105018334Speter If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 105118334Speter for any hard reg, then this must be 0 for correct output. */ 105218334Speter 105350654Sobrien#define MODES_TIEABLE_P(MODE1, MODE2) \ 105450654Sobrien ((MODE1) == (MODE2) \ 105590285Sobrien || (((MODE1) == HImode || (MODE1) == SImode \ 105690285Sobrien || ((MODE1) == QImode \ 105790285Sobrien && (TARGET_64BIT || !TARGET_PARTIAL_REG_STALL)) \ 105890285Sobrien || ((MODE1) == DImode && TARGET_64BIT)) \ 105990285Sobrien && ((MODE2) == HImode || (MODE2) == SImode \ 1060117407Skan || ((MODE2) == QImode \ 106190285Sobrien && (TARGET_64BIT || !TARGET_PARTIAL_REG_STALL)) \ 106290285Sobrien || ((MODE2) == DImode && TARGET_64BIT)))) 106318334Speter 106490285Sobrien 106590285Sobrien/* Specify the modes required to caller save a given hard regno. 106690285Sobrien We do this on i386 to prevent flags from being saved at all. 106790285Sobrien 106890285Sobrien Kill any attempts to combine saving of modes. */ 106990285Sobrien 107090285Sobrien#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ 107190285Sobrien (CC_REGNO_P (REGNO) ? VOIDmode \ 107290285Sobrien : (MODE) == VOIDmode && (NREGS) != 1 ? VOIDmode \ 107390285Sobrien : (MODE) == VOIDmode ? choose_hard_reg_mode ((REGNO), (NREGS)) \ 107490285Sobrien : (MODE) == HImode && !TARGET_PARTIAL_REG_STALL ? SImode \ 107590285Sobrien : (MODE) == QImode && (REGNO) >= 4 && !TARGET_64BIT ? SImode \ 107690285Sobrien : (MODE)) 107718334Speter/* Specify the registers used for certain standard purposes. 107818334Speter The values of these macros are register numbers. */ 107918334Speter 108018334Speter/* on the 386 the pc register is %eip, and is not usable as a general 108118334Speter register. The ordinary mov instructions won't work */ 108218334Speter/* #define PC_REGNUM */ 108318334Speter 108418334Speter/* Register to use for pushing function arguments. */ 108518334Speter#define STACK_POINTER_REGNUM 7 108618334Speter 108718334Speter/* Base register for access to local variables of the function. */ 108890285Sobrien#define HARD_FRAME_POINTER_REGNUM 6 108918334Speter 109090285Sobrien/* Base register for access to local variables of the function. */ 109190285Sobrien#define FRAME_POINTER_REGNUM 20 109290285Sobrien 109318334Speter/* First floating point reg */ 109418334Speter#define FIRST_FLOAT_REG 8 109518334Speter 109618334Speter/* First & last stack-like regs */ 109718334Speter#define FIRST_STACK_REG FIRST_FLOAT_REG 109818334Speter#define LAST_STACK_REG (FIRST_FLOAT_REG + 7) 109918334Speter 110090285Sobrien#define FLAGS_REG 17 110190285Sobrien#define FPSR_REG 18 110290285Sobrien#define DIRFLAG_REG 19 110390285Sobrien 110490285Sobrien#define FIRST_SSE_REG (FRAME_POINTER_REGNUM + 1) 110590285Sobrien#define LAST_SSE_REG (FIRST_SSE_REG + 7) 1106117407Skan 110790285Sobrien#define FIRST_MMX_REG (LAST_SSE_REG + 1) 110890285Sobrien#define LAST_MMX_REG (FIRST_MMX_REG + 7) 110990285Sobrien 111090285Sobrien#define FIRST_REX_INT_REG (LAST_MMX_REG + 1) 111190285Sobrien#define LAST_REX_INT_REG (FIRST_REX_INT_REG + 7) 111290285Sobrien 111390285Sobrien#define FIRST_REX_SSE_REG (LAST_REX_INT_REG + 1) 111490285Sobrien#define LAST_REX_SSE_REG (FIRST_REX_SSE_REG + 7) 111590285Sobrien 111618334Speter/* Value should be nonzero if functions must have frame pointers. 111718334Speter Zero means the frame pointer need not be set up (and parms 111818334Speter may be accessed via the stack pointer) in functions that seem suitable. 111918334Speter This is computed in `reload', in reload1.c. */ 112090285Sobrien#define FRAME_POINTER_REQUIRED ix86_frame_pointer_required () 112118334Speter 112290285Sobrien/* Override this in other tm.h files to cope with various OS losage 112390285Sobrien requiring a frame pointer. */ 112490285Sobrien#ifndef SUBTARGET_FRAME_POINTER_REQUIRED 112590285Sobrien#define SUBTARGET_FRAME_POINTER_REQUIRED 0 112690285Sobrien#endif 112790285Sobrien 112890285Sobrien/* Make sure we can access arbitrary call frames. */ 112990285Sobrien#define SETUP_FRAME_ADDRESSES() ix86_setup_frame_addresses () 113090285Sobrien 113118334Speter/* Base register for access to arguments of the function. */ 113218334Speter#define ARG_POINTER_REGNUM 16 113318334Speter 113490285Sobrien/* Register in which static-chain is passed to a function. 113590285Sobrien We do use ECX as static chain register for 32 bit ABI. On the 113690285Sobrien 64bit ABI, ECX is an argument register, so we use R10 instead. */ 113790285Sobrien#define STATIC_CHAIN_REGNUM (TARGET_64BIT ? FIRST_REX_INT_REG + 10 - 8 : 2) 113818334Speter 113918334Speter/* Register to hold the addressing base for position independent 114096294Sobrien code access to data items. We don't use PIC pointer for 64bit 114196294Sobrien mode. Define the regnum to dummy value to prevent gcc from 1142117407Skan pessimizing code dealing with EBX. 114318334Speter 1144117407Skan To avoid clobbering a call-saved register unnecessarily, we renumber 1145117407Skan the pic register when possible. The change is visible after the 1146117407Skan prologue has been emitted. */ 1147117407Skan 1148117407Skan#define REAL_PIC_OFFSET_TABLE_REGNUM 3 1149117407Skan 1150117407Skan#define PIC_OFFSET_TABLE_REGNUM \ 1151117407Skan (TARGET_64BIT || !flag_pic ? INVALID_REGNUM \ 1152117407Skan : reload_completed ? REGNO (pic_offset_table_rtx) \ 1153117407Skan : REAL_PIC_OFFSET_TABLE_REGNUM) 1154117407Skan 1155117407Skan#define GOT_SYMBOL_NAME "_GLOBAL_OFFSET_TABLE_" 1156117407Skan 115718334Speter/* Register in which address to store a structure value 115818334Speter arrives in the function. On the 386, the prologue 115918334Speter copies this from the stack to register %eax. */ 116018334Speter#define STRUCT_VALUE_INCOMING 0 116118334Speter 116218334Speter/* Place in which caller passes the structure value address. 116318334Speter 0 means push the value on the stack like an argument. */ 116418334Speter#define STRUCT_VALUE 0 116518334Speter 116618334Speter/* A C expression which can inhibit the returning of certain function 116718334Speter values in registers, based on the type of value. A nonzero value 116818334Speter says to return the function value in memory, just as large 116918334Speter structures are always returned. Here TYPE will be a C expression 117018334Speter of type `tree', representing the data type of the value. 117118334Speter 117218334Speter Note that values of mode `BLKmode' must be explicitly handled by 117318334Speter this macro. Also, the option `-fpcc-struct-return' takes effect 117418334Speter regardless of this macro. On most systems, it is possible to 117518334Speter leave the macro undefined; this causes a default definition to be 117618334Speter used, whose value is the constant 1 for `BLKmode' values, and 0 117718334Speter otherwise. 117818334Speter 117918334Speter Do not use this macro to indicate that structures and unions 118018334Speter should always be returned in memory. You should instead use 118118334Speter `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */ 118218334Speter 118318334Speter#define RETURN_IN_MEMORY(TYPE) \ 118490285Sobrien ix86_return_in_memory (TYPE) 118518334Speter 118618334Speter 118718334Speter/* Define the classes of registers for register constraints in the 118818334Speter machine description. Also define ranges of constants. 118918334Speter 119018334Speter One of the classes must always be named ALL_REGS and include all hard regs. 119118334Speter If there is more than one class, another class must be named NO_REGS 119218334Speter and contain no registers. 119318334Speter 119418334Speter The name GENERAL_REGS must be the name of a class (or an alias for 119518334Speter another name such as ALL_REGS). This is the class of registers 119618334Speter that is allowed by "g" or "r" in a register constraint. 119718334Speter Also, registers outside this class are allocated only when 119818334Speter instructions express preferences for them. 119918334Speter 120018334Speter The classes must be numbered in nondecreasing order; that is, 120118334Speter a larger-numbered class must never be contained completely 120218334Speter in a smaller-numbered class. 120318334Speter 120418334Speter For any two classes, it is very desirable that there be another 120518334Speter class that represents their union. 120618334Speter 120718334Speter It might seem that class BREG is unnecessary, since no useful 386 120818334Speter opcode needs reg %ebx. But some systems pass args to the OS in ebx, 120990285Sobrien and the "b" register constraint is useful in asms for syscalls. 121018334Speter 121190285Sobrien The flags and fpsr registers are in no class. */ 121290285Sobrien 121318334Speterenum reg_class 121418334Speter{ 121518334Speter NO_REGS, 121690285Sobrien AREG, DREG, CREG, BREG, SIREG, DIREG, 121718334Speter AD_REGS, /* %eax/%edx for DImode */ 121818334Speter Q_REGS, /* %eax %ebx %ecx %edx */ 121990285Sobrien NON_Q_REGS, /* %esi %edi %ebp %esp */ 122018334Speter INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */ 122190285Sobrien LEGACY_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */ 122290285Sobrien GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp %r8 - %r15*/ 122318334Speter FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */ 122418334Speter FLOAT_REGS, 122590285Sobrien SSE_REGS, 122690285Sobrien MMX_REGS, 122790285Sobrien FP_TOP_SSE_REGS, 122890285Sobrien FP_SECOND_SSE_REGS, 122990285Sobrien FLOAT_SSE_REGS, 123090285Sobrien FLOAT_INT_REGS, 123190285Sobrien INT_SSE_REGS, 123290285Sobrien FLOAT_INT_SSE_REGS, 123318334Speter ALL_REGS, LIM_REG_CLASSES 123418334Speter}; 123518334Speter 123690285Sobrien#define N_REG_CLASSES ((int) LIM_REG_CLASSES) 123718334Speter 123890285Sobrien#define INTEGER_CLASS_P(CLASS) \ 123990285Sobrien reg_class_subset_p ((CLASS), GENERAL_REGS) 124090285Sobrien#define FLOAT_CLASS_P(CLASS) \ 124190285Sobrien reg_class_subset_p ((CLASS), FLOAT_REGS) 124290285Sobrien#define SSE_CLASS_P(CLASS) \ 124390285Sobrien reg_class_subset_p ((CLASS), SSE_REGS) 124490285Sobrien#define MMX_CLASS_P(CLASS) \ 124590285Sobrien reg_class_subset_p ((CLASS), MMX_REGS) 124690285Sobrien#define MAYBE_INTEGER_CLASS_P(CLASS) \ 124790285Sobrien reg_classes_intersect_p ((CLASS), GENERAL_REGS) 124890285Sobrien#define MAYBE_FLOAT_CLASS_P(CLASS) \ 124990285Sobrien reg_classes_intersect_p ((CLASS), FLOAT_REGS) 125090285Sobrien#define MAYBE_SSE_CLASS_P(CLASS) \ 125190285Sobrien reg_classes_intersect_p (SSE_REGS, (CLASS)) 125290285Sobrien#define MAYBE_MMX_CLASS_P(CLASS) \ 125390285Sobrien reg_classes_intersect_p (MMX_REGS, (CLASS)) 125418334Speter 125590285Sobrien#define Q_CLASS_P(CLASS) \ 125690285Sobrien reg_class_subset_p ((CLASS), Q_REGS) 125790285Sobrien 125818334Speter/* Give names of register classes as strings for dump file. */ 125918334Speter 126018334Speter#define REG_CLASS_NAMES \ 126118334Speter{ "NO_REGS", \ 126218334Speter "AREG", "DREG", "CREG", "BREG", \ 126390285Sobrien "SIREG", "DIREG", \ 126418334Speter "AD_REGS", \ 126590285Sobrien "Q_REGS", "NON_Q_REGS", \ 126618334Speter "INDEX_REGS", \ 126790285Sobrien "LEGACY_REGS", \ 126818334Speter "GENERAL_REGS", \ 126918334Speter "FP_TOP_REG", "FP_SECOND_REG", \ 127018334Speter "FLOAT_REGS", \ 127190285Sobrien "SSE_REGS", \ 127290285Sobrien "MMX_REGS", \ 127390285Sobrien "FP_TOP_SSE_REGS", \ 127490285Sobrien "FP_SECOND_SSE_REGS", \ 127590285Sobrien "FLOAT_SSE_REGS", \ 127690285Sobrien "FLOAT_INT_REGS", \ 127790285Sobrien "INT_SSE_REGS", \ 127890285Sobrien "FLOAT_INT_SSE_REGS", \ 127918334Speter "ALL_REGS" } 128018334Speter 128118334Speter/* Define which registers fit in which classes. 128218334Speter This is an initializer for a vector of HARD_REG_SET 128318334Speter of length N_REG_CLASSES. */ 128418334Speter 128590285Sobrien#define REG_CLASS_CONTENTS \ 128690285Sobrien{ { 0x00, 0x0 }, \ 128790285Sobrien { 0x01, 0x0 }, { 0x02, 0x0 }, /* AREG, DREG */ \ 128890285Sobrien { 0x04, 0x0 }, { 0x08, 0x0 }, /* CREG, BREG */ \ 128990285Sobrien { 0x10, 0x0 }, { 0x20, 0x0 }, /* SIREG, DIREG */ \ 129090285Sobrien { 0x03, 0x0 }, /* AD_REGS */ \ 129190285Sobrien { 0x0f, 0x0 }, /* Q_REGS */ \ 129290285Sobrien { 0x1100f0, 0x1fe0 }, /* NON_Q_REGS */ \ 129390285Sobrien { 0x7f, 0x1fe0 }, /* INDEX_REGS */ \ 129490285Sobrien { 0x1100ff, 0x0 }, /* LEGACY_REGS */ \ 129590285Sobrien { 0x1100ff, 0x1fe0 }, /* GENERAL_REGS */ \ 129690285Sobrien { 0x100, 0x0 }, { 0x0200, 0x0 },/* FP_TOP_REG, FP_SECOND_REG */\ 129790285Sobrien { 0xff00, 0x0 }, /* FLOAT_REGS */ \ 129890285Sobrien{ 0x1fe00000,0x1fe000 }, /* SSE_REGS */ \ 129990285Sobrien{ 0xe0000000, 0x1f }, /* MMX_REGS */ \ 130090285Sobrien{ 0x1fe00100,0x1fe000 }, /* FP_TOP_SSE_REG */ \ 130190285Sobrien{ 0x1fe00200,0x1fe000 }, /* FP_SECOND_SSE_REG */ \ 130290285Sobrien{ 0x1fe0ff00,0x1fe000 }, /* FLOAT_SSE_REGS */ \ 130390285Sobrien { 0x1ffff, 0x1fe0 }, /* FLOAT_INT_REGS */ \ 130490285Sobrien{ 0x1fe100ff,0x1fffe0 }, /* INT_SSE_REGS */ \ 130590285Sobrien{ 0x1fe1ffff,0x1fffe0 }, /* FLOAT_INT_SSE_REGS */ \ 130690285Sobrien{ 0xffffffff,0x1fffff } \ 130790285Sobrien} 130818334Speter 130918334Speter/* The same information, inverted: 131018334Speter Return the class number of the smallest class containing 131118334Speter reg number REGNO. This could be a conditional expression 131218334Speter or could index an array. */ 131318334Speter 131418334Speter#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO]) 131518334Speter 131618334Speter/* When defined, the compiler allows registers explicitly used in the 131718334Speter rtl to be used as spill registers but prevents the compiler from 131890285Sobrien extending the lifetime of these registers. */ 131918334Speter 132050654Sobrien#define SMALL_REGISTER_CLASSES 1 132118334Speter 132218334Speter#define QI_REG_P(X) \ 132318334Speter (REG_P (X) && REGNO (X) < 4) 132490285Sobrien 132590285Sobrien#define GENERAL_REGNO_P(N) \ 132690285Sobrien ((N) < 8 || REX_INT_REGNO_P (N)) 132790285Sobrien 132890285Sobrien#define GENERAL_REG_P(X) \ 132990285Sobrien (REG_P (X) && GENERAL_REGNO_P (REGNO (X))) 133090285Sobrien 133190285Sobrien#define ANY_QI_REG_P(X) (TARGET_64BIT ? GENERAL_REG_P(X) : QI_REG_P (X)) 133290285Sobrien 133318334Speter#define NON_QI_REG_P(X) \ 133418334Speter (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER) 133518334Speter 133690285Sobrien#define REX_INT_REGNO_P(N) ((N) >= FIRST_REX_INT_REG && (N) <= LAST_REX_INT_REG) 133790285Sobrien#define REX_INT_REG_P(X) (REG_P (X) && REX_INT_REGNO_P (REGNO (X))) 133890285Sobrien 133918334Speter#define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X))) 134090285Sobrien#define FP_REGNO_P(N) ((N) >= FIRST_STACK_REG && (N) <= LAST_STACK_REG) 134190285Sobrien#define ANY_FP_REG_P(X) (REG_P (X) && ANY_FP_REGNO_P (REGNO (X))) 134290285Sobrien#define ANY_FP_REGNO_P(N) (FP_REGNO_P (N) || SSE_REGNO_P (N)) 134390285Sobrien 134490285Sobrien#define SSE_REGNO_P(N) \ 134590285Sobrien (((N) >= FIRST_SSE_REG && (N) <= LAST_SSE_REG) \ 134690285Sobrien || ((N) >= FIRST_REX_SSE_REG && (N) <= LAST_REX_SSE_REG)) 134790285Sobrien 134890285Sobrien#define SSE_REGNO(N) \ 134990285Sobrien ((N) < 8 ? FIRST_SSE_REG + (N) : FIRST_REX_SSE_REG + (N) - 8) 135090285Sobrien#define SSE_REG_P(N) (REG_P (N) && SSE_REGNO_P (REGNO (N))) 135190285Sobrien 135290285Sobrien#define SSE_FLOAT_MODE_P(MODE) \ 135396294Sobrien ((TARGET_SSE && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode)) 135490285Sobrien 135590285Sobrien#define MMX_REGNO_P(N) ((N) >= FIRST_MMX_REG && (N) <= LAST_MMX_REG) 135690285Sobrien#define MMX_REG_P(XOP) (REG_P (XOP) && MMX_REGNO_P (REGNO (XOP))) 1357117407Skan 135890285Sobrien#define STACK_REG_P(XOP) \ 135990285Sobrien (REG_P (XOP) && \ 136090285Sobrien REGNO (XOP) >= FIRST_STACK_REG && \ 136190285Sobrien REGNO (XOP) <= LAST_STACK_REG) 136218334Speter 136390285Sobrien#define NON_STACK_REG_P(XOP) (REG_P (XOP) && ! STACK_REG_P (XOP)) 136418334Speter 136590285Sobrien#define STACK_TOP_P(XOP) (REG_P (XOP) && REGNO (XOP) == FIRST_STACK_REG) 136618334Speter 136790285Sobrien#define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X))) 136890285Sobrien#define CC_REGNO_P(X) ((X) == FLAGS_REG || (X) == FPSR_REG) 136918334Speter 137090285Sobrien/* Indicate whether hard register numbered REG_NO should be converted 137190285Sobrien to SSA form. */ 137290285Sobrien#define CONVERT_HARD_REGISTER_TO_SSA_P(REG_NO) \ 137390285Sobrien ((REG_NO) == FLAGS_REG || (REG_NO) == ARG_POINTER_REGNUM) 137418334Speter 137518334Speter/* The class value for index registers, and the one for base regs. */ 137618334Speter 137718334Speter#define INDEX_REG_CLASS INDEX_REGS 137818334Speter#define BASE_REG_CLASS GENERAL_REGS 137918334Speter 138018334Speter/* Get reg_class from a letter such as appears in the machine description. */ 138118334Speter 138218334Speter#define REG_CLASS_FROM_LETTER(C) \ 138318334Speter ((C) == 'r' ? GENERAL_REGS : \ 138490285Sobrien (C) == 'R' ? LEGACY_REGS : \ 138590285Sobrien (C) == 'q' ? TARGET_64BIT ? GENERAL_REGS : Q_REGS : \ 138690285Sobrien (C) == 'Q' ? Q_REGS : \ 138718334Speter (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \ 138818334Speter ? FLOAT_REGS \ 138918334Speter : NO_REGS) : \ 139018334Speter (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \ 139118334Speter ? FP_TOP_REG \ 139218334Speter : NO_REGS) : \ 139318334Speter (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \ 139418334Speter ? FP_SECOND_REG \ 139518334Speter : NO_REGS) : \ 139618334Speter (C) == 'a' ? AREG : \ 139718334Speter (C) == 'b' ? BREG : \ 139818334Speter (C) == 'c' ? CREG : \ 139918334Speter (C) == 'd' ? DREG : \ 140090285Sobrien (C) == 'x' ? TARGET_SSE ? SSE_REGS : NO_REGS : \ 140190285Sobrien (C) == 'Y' ? TARGET_SSE2? SSE_REGS : NO_REGS : \ 140290285Sobrien (C) == 'y' ? TARGET_MMX ? MMX_REGS : NO_REGS : \ 140318334Speter (C) == 'A' ? AD_REGS : \ 140418334Speter (C) == 'D' ? DIREG : \ 140518334Speter (C) == 'S' ? SIREG : NO_REGS) 140618334Speter 140718334Speter/* The letters I, J, K, L and M in a register constraint string 140818334Speter can be used to stand for particular ranges of immediate operands. 140918334Speter This macro defines what the ranges are. 141018334Speter C is the letter, and VALUE is a constant value. 141118334Speter Return 1 if VALUE is in the range specified by C. 141218334Speter 141318334Speter I is for non-DImode shifts. 141418334Speter J is for DImode shifts. 141590285Sobrien K is for signed imm8 operands. 141690285Sobrien L is for andsi as zero-extending move. 141718334Speter M is for shifts that can be executed by the "lea" opcode. 141890285Sobrien N is for immedaite operands for out/in instructions (0-255) 141918334Speter */ 142018334Speter 142190285Sobrien#define CONST_OK_FOR_LETTER_P(VALUE, C) \ 142290285Sobrien ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 \ 142390285Sobrien : (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 \ 142490285Sobrien : (C) == 'K' ? (VALUE) >= -128 && (VALUE) <= 127 \ 142590285Sobrien : (C) == 'L' ? (VALUE) == 0xff || (VALUE) == 0xffff \ 142690285Sobrien : (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 \ 142790285Sobrien : (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 \ 142890285Sobrien : 0) 142918334Speter 143018334Speter/* Similar, but for floating constants, and defining letters G and H. 143118334Speter Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if 143218334Speter TARGET_387 isn't set, because the stack register converter may need to 143352295Sobrien load 0.0 into the function value register. */ 143418334Speter 143518334Speter#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 143690285Sobrien ((C) == 'G' ? standard_80387_constant_p (VALUE) \ 1437117407Skan : 0) 143818334Speter 143990285Sobrien/* A C expression that defines the optional machine-dependent 144090285Sobrien constraint letters that can be used to segregate specific types of 144190285Sobrien operands, usually memory references, for the target machine. Any 144290285Sobrien letter that is not elsewhere defined and not matched by 144390285Sobrien `REG_CLASS_FROM_LETTER' may be used. Normally this macro will not 144490285Sobrien be defined. 144590285Sobrien 144690285Sobrien If it is required for a particular target machine, it should 144790285Sobrien return 1 if VALUE corresponds to the operand type represented by 144890285Sobrien the constraint letter C. If C is not defined as an extra 144990285Sobrien constraint, the value returned should be 0 regardless of VALUE. */ 145090285Sobrien 1451117407Skan#define EXTRA_CONSTRAINT(VALUE, D) \ 1452117407Skan ((D) == 'e' ? x86_64_sign_extended_value (VALUE) \ 1453117407Skan : (D) == 'Z' ? x86_64_zero_extended_value (VALUE) \ 1454117407Skan : (D) == 'C' ? standard_sse_constant_p (VALUE) \ 145590285Sobrien : 0) 145690285Sobrien 145718334Speter/* Place additional restrictions on the register class to use when it 145818334Speter is necessary to be able to hold a value of mode MODE in a reload 145990285Sobrien register for which class CLASS would ordinarily be used. */ 146018334Speter 146190285Sobrien#define LIMIT_RELOAD_CLASS(MODE, CLASS) \ 146290285Sobrien ((MODE) == QImode && !TARGET_64BIT \ 146390285Sobrien && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS \ 146490285Sobrien || (CLASS) == LEGACY_REGS || (CLASS) == INDEX_REGS) \ 146518334Speter ? Q_REGS : (CLASS)) 146618334Speter 146718334Speter/* Given an rtx X being reloaded into a reg required to be 146818334Speter in class CLASS, return the class of reg to actually use. 146918334Speter In general this is just CLASS; but on some machines 147018334Speter in some cases it is preferable to use a more restrictive class. 147118334Speter On the 80386 series, we prevent floating constants from being 147218334Speter reloaded into floating registers (since no move-insn can do that) 147318334Speter and we ensure that QImodes aren't reloaded into the esi or edi reg. */ 147418334Speter 147518334Speter/* Put float CONST_DOUBLE in the constant pool instead of fp regs. 147618334Speter QImode must go into class Q_REGS. 147718334Speter Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and 147890285Sobrien movdf to do mem-to-mem moves through integer regs. */ 147918334Speter 148090285Sobrien#define PREFERRED_RELOAD_CLASS(X, CLASS) \ 148190285Sobrien ix86_preferred_reload_class ((X), (CLASS)) 148218334Speter 148318334Speter/* If we are copying between general and FP registers, we need a memory 148490285Sobrien location. The same is true for SSE and MMX registers. */ 148590285Sobrien#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ 148690285Sobrien ix86_secondary_memory_needed ((CLASS1), (CLASS2), (MODE), 1) 148718334Speter 148890285Sobrien/* QImode spills from non-QI registers need a scratch. This does not 1489117407Skan happen often -- the only example so far requires an uninitialized 149090285Sobrien pseudo. */ 149118334Speter 149290285Sobrien#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \ 149390285Sobrien (((CLASS) == GENERAL_REGS || (CLASS) == LEGACY_REGS \ 149490285Sobrien || (CLASS) == INDEX_REGS) && !TARGET_64BIT && (MODE) == QImode \ 149590285Sobrien ? Q_REGS : NO_REGS) 149690285Sobrien 149718334Speter/* Return the maximum number of consecutive registers 149818334Speter needed to represent mode MODE in a register of class CLASS. */ 149918334Speter/* On the 80386, this is the size of MODE in words, 150090285Sobrien except in the FP regs, where a single reg is always enough. 150190285Sobrien The TFmodes are really just 80bit values, so we use only 3 registers 150290285Sobrien to hold them, instead of 4, as the size would suggest. 150390285Sobrien */ 150490285Sobrien#define CLASS_MAX_NREGS(CLASS, MODE) \ 150590285Sobrien (!MAYBE_INTEGER_CLASS_P (CLASS) \ 150690285Sobrien ? (COMPLEX_MODE_P (MODE) ? 2 : 1) \ 150790285Sobrien : ((GET_MODE_SIZE ((MODE) == TFmode ? XFmode : (MODE)) \ 150890285Sobrien + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 150918334Speter 151018334Speter/* A C expression whose value is nonzero if pseudos that have been 151118334Speter assigned to registers of class CLASS would likely be spilled 151218334Speter because registers of CLASS are needed for spill registers. 151318334Speter 151418334Speter The default value of this macro returns 1 if CLASS has exactly one 151518334Speter register and zero otherwise. On most machines, this default 151618334Speter should be used. Only define this macro to some other expression 151718334Speter if pseudo allocated by `local-alloc.c' end up in memory because 151818334Speter their hard registers were needed for spill registers. If this 151918334Speter macro returns nonzero for those classes, those pseudos will only 152018334Speter be allocated by `global.c', which knows how to reallocate the 152118334Speter pseudo to another register. If there would not be another 152218334Speter register available for reallocation, you should not change the 152318334Speter definition of this macro since the only effect of such a 152418334Speter definition would be to slow down register allocation. */ 152518334Speter 152618334Speter#define CLASS_LIKELY_SPILLED_P(CLASS) \ 152718334Speter (((CLASS) == AREG) \ 152818334Speter || ((CLASS) == DREG) \ 152918334Speter || ((CLASS) == CREG) \ 153018334Speter || ((CLASS) == BREG) \ 153118334Speter || ((CLASS) == AD_REGS) \ 153218334Speter || ((CLASS) == SIREG) \ 153318334Speter || ((CLASS) == DIREG)) 153418334Speter 1535117407Skan/* Return a class of registers that cannot change FROM mode to TO mode. 1536117407Skan 1537117407Skan x87 registers can't do subreg as all values are reformated to extended 1538117407Skan precision. XMM registers does not support with nonzero offsets equal 1539117407Skan to 4, 8 and 12 otherwise valid for integer registers. Since we can't 1540117407Skan determine these, prohibit all nonparadoxical subregs changing size. */ 1541117407Skan 1542117407Skan#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ 1543117407Skan (GET_MODE_SIZE (TO) < GET_MODE_SIZE (FROM) \ 1544117407Skan ? reg_classes_intersect_p (FLOAT_SSE_REGS, (CLASS)) \ 1545117407Skan || MAYBE_MMX_CLASS_P (CLASS) \ 1546117407Skan : GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ 1547117407Skan ? reg_classes_intersect_p (FLOAT_REGS, (CLASS)) : 0) 1548117407Skan 154990285Sobrien/* A C statement that adds to CLOBBERS any hard regs the port wishes 1550117407Skan to automatically clobber for all asms. 155190285Sobrien 155290285Sobrien We do this in the new i386 backend to maintain source compatibility 155390285Sobrien with the old cc0-based compiler. */ 155490285Sobrien 155590285Sobrien#define MD_ASM_CLOBBERS(CLOBBERS) \ 155690285Sobrien do { \ 155790285Sobrien (CLOBBERS) = tree_cons (NULL_TREE, build_string (5, "flags"), \ 155890285Sobrien (CLOBBERS)); \ 155990285Sobrien (CLOBBERS) = tree_cons (NULL_TREE, build_string (4, "fpsr"), \ 156090285Sobrien (CLOBBERS)); \ 156190285Sobrien (CLOBBERS) = tree_cons (NULL_TREE, build_string (7, "dirflag"), \ 156290285Sobrien (CLOBBERS)); \ 156390285Sobrien } while (0) 156418334Speter 156518334Speter/* Stack layout; function entry, exit and calling. */ 156618334Speter 156718334Speter/* Define this if pushing a word on the stack 156818334Speter makes the stack pointer a smaller address. */ 156918334Speter#define STACK_GROWS_DOWNWARD 157018334Speter 157118334Speter/* Define this if the nominal address of the stack frame 157218334Speter is at the high-address end of the local variables; 157318334Speter that is, each additional local variable allocated 157418334Speter goes at a more negative offset in the frame. */ 157518334Speter#define FRAME_GROWS_DOWNWARD 157618334Speter 157718334Speter/* Offset within stack frame to start allocating local variables at. 157818334Speter If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 157918334Speter first local allocated. Otherwise, it is the offset to the BEGINNING 158018334Speter of the first local allocated. */ 158118334Speter#define STARTING_FRAME_OFFSET 0 158218334Speter 158318334Speter/* If we generate an insn to push BYTES bytes, 158418334Speter this says how many the stack pointer really advances by. 158518334Speter On 386 pushw decrements by exactly 2 no matter what the position was. 158618334Speter On the 386 there is no pushb; we use pushw instead, and this 158790285Sobrien has the effect of rounding up to 2. 1588117407Skan 158990285Sobrien For 64bit ABI we round up to 8 bytes. 159090285Sobrien */ 159118334Speter 159290285Sobrien#define PUSH_ROUNDING(BYTES) \ 159390285Sobrien (TARGET_64BIT \ 159490285Sobrien ? (((BYTES) + 7) & (-8)) \ 159590285Sobrien : (((BYTES) + 1) & (-2))) 159618334Speter 159790285Sobrien/* If defined, the maximum amount of space required for outgoing arguments will 159890285Sobrien be computed and placed into the variable 159990285Sobrien `current_function_outgoing_args_size'. No space will be pushed onto the 160090285Sobrien stack for each call; instead, the function prologue should increase the stack 160190285Sobrien frame size by this amount. */ 160290285Sobrien 160390285Sobrien#define ACCUMULATE_OUTGOING_ARGS TARGET_ACCUMULATE_OUTGOING_ARGS 160490285Sobrien 160590285Sobrien/* If defined, a C expression whose value is nonzero when we want to use PUSH 160690285Sobrien instructions to pass outgoing arguments. */ 160790285Sobrien 160890285Sobrien#define PUSH_ARGS (TARGET_PUSH_ARGS && !ACCUMULATE_OUTGOING_ARGS) 160990285Sobrien 1610107598Sobrien/* We want the stack and args grow in opposite directions, even if 1611107598Sobrien PUSH_ARGS is 0. */ 1612107598Sobrien#define PUSH_ARGS_REVERSED 1 1613107598Sobrien 161418334Speter/* Offset of first parameter from the argument pointer register value. */ 161518334Speter#define FIRST_PARM_OFFSET(FNDECL) 0 161618334Speter 161790285Sobrien/* Define this macro if functions should assume that stack space has been 161890285Sobrien allocated for arguments even when their values are passed in registers. 161990285Sobrien 162090285Sobrien The value of this macro is the size, in bytes, of the area reserved for 162190285Sobrien arguments passed in registers for the function represented by FNDECL. 162290285Sobrien 162390285Sobrien This space can be allocated by the caller, or be a part of the 162490285Sobrien machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE' says 162590285Sobrien which. */ 162690285Sobrien#define REG_PARM_STACK_SPACE(FNDECL) 0 162790285Sobrien 162890285Sobrien/* Define as a C expression that evaluates to nonzero if we do not know how 162990285Sobrien to pass TYPE solely in registers. The file expr.h defines a 163090285Sobrien definition that is usually appropriate, refer to expr.h for additional 163190285Sobrien documentation. If `REG_PARM_STACK_SPACE' is defined, the argument will be 163290285Sobrien computed in the stack and then loaded into a register. */ 163390285Sobrien#define MUST_PASS_IN_STACK(MODE, TYPE) \ 163490285Sobrien ((TYPE) != 0 \ 163590285Sobrien && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \ 163690285Sobrien || TREE_ADDRESSABLE (TYPE) \ 163790285Sobrien || ((MODE) == TImode) \ 163890285Sobrien || ((MODE) == BLKmode \ 163990285Sobrien && ! ((TYPE) != 0 \ 164090285Sobrien && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \ 164190285Sobrien && 0 == (int_size_in_bytes (TYPE) \ 164290285Sobrien % (PARM_BOUNDARY / BITS_PER_UNIT))) \ 164390285Sobrien && (FUNCTION_ARG_PADDING (MODE, TYPE) \ 164490285Sobrien == (BYTES_BIG_ENDIAN ? upward : downward))))) 164590285Sobrien 164618334Speter/* Value is the number of bytes of arguments automatically 164718334Speter popped when returning from a subroutine call. 164818334Speter FUNDECL is the declaration node of the function (as a tree), 164918334Speter FUNTYPE is the data type of the function (as a tree), 165018334Speter or for a library call it is an identifier node for the subroutine name. 165118334Speter SIZE is the number of bytes of arguments passed on the stack. 165218334Speter 165318334Speter On the 80386, the RTD insn may be used to pop them if the number 165418334Speter of args is fixed, but if the number is variable then the caller 165518334Speter must pop them all. RTD can't be used for library calls now 165618334Speter because the library is compiled with the Unix compiler. 165718334Speter Use of RTD is a selectable option, since it is incompatible with 165818334Speter standard Unix calling sequences. If the option is not selected, 165918334Speter the caller must always pop the args. 166018334Speter 166118334Speter The attribute stdcall is equivalent to RTD on a per module basis. */ 166218334Speter 166390285Sobrien#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) \ 166490285Sobrien ix86_return_pops_args ((FUNDECL), (FUNTYPE), (SIZE)) 166518334Speter 166618334Speter/* Define how to find the value returned by a function. 166718334Speter VALTYPE is the data type of the value (as a tree). 166818334Speter If the precise function being called is known, FUNC is its FUNCTION_DECL; 166918334Speter otherwise, FUNC is 0. */ 167018334Speter#define FUNCTION_VALUE(VALTYPE, FUNC) \ 167190285Sobrien ix86_function_value (VALTYPE) 167218334Speter 167390285Sobrien#define FUNCTION_VALUE_REGNO_P(N) \ 167490285Sobrien ix86_function_value_regno_p (N) 167590285Sobrien 167618334Speter/* Define how to find the value returned by a library function 167718334Speter assuming the value has mode MODE. */ 167818334Speter 167918334Speter#define LIBCALL_VALUE(MODE) \ 168090285Sobrien ix86_libcall_value (MODE) 168118334Speter 168218334Speter/* Define the size of the result block used for communication between 168318334Speter untyped_call and untyped_return. The block contains a DImode value 168418334Speter followed by the block used by fnsave and frstor. */ 168518334Speter 168618334Speter#define APPLY_RESULT_SIZE (8+108) 168718334Speter 168818334Speter/* 1 if N is a possible register number for function argument passing. */ 168990285Sobrien#define FUNCTION_ARG_REGNO_P(N) ix86_function_arg_regno_p (N) 169018334Speter 169118334Speter/* Define a data type for recording info about an argument list 169218334Speter during the scan of that argument list. This data type should 169318334Speter hold all necessary information about the function itself 169418334Speter and about the args processed so far, enough to enable macros 169518334Speter such as FUNCTION_ARG to determine where the next arg should go. */ 169618334Speter 169790285Sobrientypedef struct ix86_args { 169818334Speter int words; /* # words passed so far */ 169918334Speter int nregs; /* # registers available for passing */ 170018334Speter int regno; /* next available register number */ 170190285Sobrien int sse_words; /* # sse words passed so far */ 170290285Sobrien int sse_nregs; /* # sse registers available for passing */ 170390285Sobrien int sse_regno; /* next available sse register number */ 170490285Sobrien int maybe_vaarg; /* true for calls to possibly vardic fncts. */ 170518334Speter} CUMULATIVE_ARGS; 170618334Speter 170718334Speter/* Initialize a variable CUM of type CUMULATIVE_ARGS 170818334Speter for a call to a function whose data type is FNTYPE. 170918334Speter For a library call, FNTYPE is 0. */ 171018334Speter 171190285Sobrien#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \ 171290285Sobrien init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME)) 171318334Speter 171418334Speter/* Update the data in CUM to advance over an argument 171518334Speter of mode MODE and data type TYPE. 171618334Speter (TYPE is null for libcalls where that information may not be available.) */ 171718334Speter 171890285Sobrien#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 171990285Sobrien function_arg_advance (&(CUM), (MODE), (TYPE), (NAMED)) 172018334Speter 172118334Speter/* Define where to put the arguments to a function. 172218334Speter Value is zero to push the argument on the stack, 172318334Speter or a hard register in which to store the argument. 172418334Speter 172518334Speter MODE is the argument's machine mode. 172618334Speter TYPE is the data type of the argument (as a tree). 172718334Speter This is null for libcalls where that information may 172818334Speter not be available. 172918334Speter CUM is a variable of type CUMULATIVE_ARGS which gives info about 173018334Speter the preceding args and about the function being called. 173118334Speter NAMED is nonzero if this argument is a named parameter 173218334Speter (otherwise it is an extra parameter matching an ellipsis). */ 173318334Speter 173418334Speter#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 173590285Sobrien function_arg (&(CUM), (MODE), (TYPE), (NAMED)) 173618334Speter 173718334Speter/* For an arg passed partly in registers and partly in memory, 173818334Speter this is the number of registers used. 173918334Speter For args passed entirely in registers or entirely in memory, zero. */ 174018334Speter 174190285Sobrien#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0 174218334Speter 1743117407Skan/* A C expression that indicates when an argument must be passed by 1744117407Skan reference. If nonzero for an argument, a copy of that argument is 1745117407Skan made in memory and a pointer to the argument is passed instead of 1746117407Skan the argument itself. The pointer is passed in whatever way is 1747117407Skan appropriate for passing a pointer to that type. */ 1748117407Skan 1749117407Skan#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ 1750117407Skan function_arg_pass_by_reference(&CUM, MODE, TYPE, NAMED) 1751117407Skan 175290285Sobrien/* If PIC, we cannot make sibling calls to global functions 175390285Sobrien because the PLT requires %ebx live. 1754117407Skan If we are returning floats on the 80387 register stack, we cannot 1755117407Skan make a sibcall from a function that doesn't return a float to a 1756117407Skan function that does or, conversely, from a function that does return 1757117407Skan a float to a function that doesn't; the necessary stack adjustment 1758117407Skan would not be executed. */ 175990285Sobrien#define FUNCTION_OK_FOR_SIBCALL(DECL) \ 176090285Sobrien ((DECL) \ 176190285Sobrien && (! flag_pic || ! TREE_PUBLIC (DECL)) \ 176290285Sobrien && (! TARGET_FLOAT_RETURNS_IN_80387 \ 1763117407Skan || (FLOAT_MODE_P (TYPE_MODE (TREE_TYPE (TREE_TYPE (DECL)))) \ 1764117407Skan == FLOAT_MODE_P (TYPE_MODE (TREE_TYPE (TREE_TYPE (cfun->decl))))))) 176550654Sobrien 176690285Sobrien/* Perform any needed actions needed for a function that is receiving a 176790285Sobrien variable number of arguments. 176850654Sobrien 176990285Sobrien CUM is as above. 177018334Speter 177190285Sobrien MODE and TYPE are the mode and type of the current parameter. 177218334Speter 177390285Sobrien PRETEND_SIZE is a variable that should be set to the amount of stack 177490285Sobrien that must be pushed by the prolog to pretend that our caller pushed 177590285Sobrien it. 177618334Speter 177790285Sobrien Normally, this macro will push all remaining incoming registers on the 177890285Sobrien stack and set PRETEND_SIZE to the length of the registers pushed. */ 177918334Speter 178090285Sobrien#define SETUP_INCOMING_VARARGS(CUM, MODE, TYPE, PRETEND_SIZE, NO_RTL) \ 178190285Sobrien ix86_setup_incoming_varargs (&(CUM), (MODE), (TYPE), &(PRETEND_SIZE), \ 178290285Sobrien (NO_RTL)) 178318334Speter 178490285Sobrien/* Define the `__builtin_va_list' type for the ABI. */ 178590285Sobrien#define BUILD_VA_LIST_TYPE(VALIST) \ 178690285Sobrien ((VALIST) = ix86_build_va_list ()) 178718334Speter 178890285Sobrien/* Implement `va_start' for varargs and stdarg. */ 1789117407Skan#define EXPAND_BUILTIN_VA_START(VALIST, NEXTARG) \ 1790117407Skan ix86_va_start (VALIST, NEXTARG) 179118334Speter 179290285Sobrien/* Implement `va_arg'. */ 179390285Sobrien#define EXPAND_BUILTIN_VA_ARG(VALIST, TYPE) \ 179490285Sobrien ix86_va_arg ((VALIST), (TYPE)) 179518334Speter 179690285Sobrien/* This macro is invoked at the end of compilation. It is used here to 179790285Sobrien output code for -fpic that will load the return address into %ebx. */ 179818334Speter 179990285Sobrien#undef ASM_FILE_END 180090285Sobrien#define ASM_FILE_END(FILE) ix86_asm_file_end (FILE) 180150654Sobrien 180290285Sobrien/* Output assembler code to FILE to increment profiler label # LABELNO 180390285Sobrien for profiling a function entry. */ 180450654Sobrien 1805117407Skan#define FUNCTION_PROFILER(FILE, LABELNO) x86_function_profiler (FILE, LABELNO) 180618334Speter 1807117407Skan#define MCOUNT_NAME "_mcount" 1808117407Skan 1809117407Skan#define PROFILE_COUNT_REGISTER "edx" 1810117407Skan 181118334Speter/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 181218334Speter the stack pointer does not matter. The value is tested only in 181318334Speter functions that have frame pointers. 181418334Speter No definition is equivalent to always zero. */ 1815117407Skan/* Note on the 386 it might be more efficient not to define this since 181618334Speter we have to restore it ourselves from the frame pointer, in order to 181718334Speter use pop */ 181818334Speter 181918334Speter#define EXIT_IGNORE_STACK 1 182018334Speter 182118334Speter/* Output assembler code for a block containing the constant parts 182218334Speter of a trampoline, leaving space for the variable parts. */ 182318334Speter 182452295Sobrien/* On the 386, the trampoline contains two instructions: 182518334Speter mov #STATIC,ecx 182652295Sobrien jmp FUNCTION 182752295Sobrien The trampoline is generated entirely at runtime. The operand of JMP 182852295Sobrien is the address of FUNCTION relative to the instruction following the 182952295Sobrien JMP (which is 5 bytes long). */ 183018334Speter 183118334Speter/* Length in units of the trampoline for entering a nested function. */ 183218334Speter 183390285Sobrien#define TRAMPOLINE_SIZE (TARGET_64BIT ? 23 : 10) 183418334Speter 183518334Speter/* Emit RTL insns to initialize the variable parts of a trampoline. 183618334Speter FNADDR is an RTX for the address of the function's pure code. 183718334Speter CXT is an RTX for the static chain value for the function. */ 183818334Speter 183990285Sobrien#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 184090285Sobrien x86_initialize_trampoline ((TRAMP), (FNADDR), (CXT)) 184118334Speter 184218334Speter/* Definitions for register eliminations. 184318334Speter 184418334Speter This is an array of structures. Each structure initializes one pair 184518334Speter of eliminable registers. The "from" register number is given first, 184618334Speter followed by "to". Eliminations of the same "from" register are listed 184718334Speter in order of preference. 184818334Speter 184990285Sobrien There are two registers that can always be eliminated on the i386. 185090285Sobrien The frame pointer and the arg pointer can be replaced by either the 185190285Sobrien hard frame pointer or to the stack pointer, depending upon the 185290285Sobrien circumstances. The hard frame pointer is not used before reload and 185390285Sobrien so it is not eligible for elimination. */ 185418334Speter 185590285Sobrien#define ELIMINABLE_REGS \ 185690285Sobrien{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 185790285Sobrien { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ 185890285Sobrien { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 185990285Sobrien { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} \ 186018334Speter 186190285Sobrien/* Given FROM and TO register numbers, say whether this elimination is 186290285Sobrien allowed. Frame pointer elimination is automatically handled. 186318334Speter 186418334Speter All other eliminations are valid. */ 186518334Speter 186690285Sobrien#define CAN_ELIMINATE(FROM, TO) \ 186790285Sobrien ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1) 186818334Speter 186918334Speter/* Define the offset between two registers, one to be eliminated, and the other 187018334Speter its replacement, at the start of a routine. */ 187118334Speter 187290285Sobrien#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 187390285Sobrien ((OFFSET) = ix86_initial_elimination_offset ((FROM), (TO))) 187418334Speter 187518334Speter/* Addressing modes, and classification of registers for them. */ 187618334Speter 187752295Sobrien/* #define HAVE_POST_INCREMENT 0 */ 187852295Sobrien/* #define HAVE_POST_DECREMENT 0 */ 187918334Speter 188052295Sobrien/* #define HAVE_PRE_DECREMENT 0 */ 188152295Sobrien/* #define HAVE_PRE_INCREMENT 0 */ 188218334Speter 188318334Speter/* Macros to check register numbers against specific register classes. */ 188418334Speter 188518334Speter/* These assume that REGNO is a hard or pseudo reg number. 188618334Speter They give nonzero only if REGNO is a hard reg of the suitable class 188718334Speter or a pseudo reg currently allocated to a suitable hard reg. 188818334Speter Since they use reg_renumber, they are safe only once reg_renumber 188918334Speter has been allocated, which happens in local-alloc.c. */ 189018334Speter 189190285Sobrien#define REGNO_OK_FOR_INDEX_P(REGNO) \ 189290285Sobrien ((REGNO) < STACK_POINTER_REGNUM \ 189390285Sobrien || (REGNO >= FIRST_REX_INT_REG \ 189490285Sobrien && (REGNO) <= LAST_REX_INT_REG) \ 189590285Sobrien || ((unsigned) reg_renumber[(REGNO)] >= FIRST_REX_INT_REG \ 189690285Sobrien && (unsigned) reg_renumber[(REGNO)] <= LAST_REX_INT_REG) \ 189790285Sobrien || (unsigned) reg_renumber[(REGNO)] < STACK_POINTER_REGNUM) 189818334Speter 189990285Sobrien#define REGNO_OK_FOR_BASE_P(REGNO) \ 190090285Sobrien ((REGNO) <= STACK_POINTER_REGNUM \ 190190285Sobrien || (REGNO) == ARG_POINTER_REGNUM \ 190290285Sobrien || (REGNO) == FRAME_POINTER_REGNUM \ 190390285Sobrien || (REGNO >= FIRST_REX_INT_REG \ 190490285Sobrien && (REGNO) <= LAST_REX_INT_REG) \ 190590285Sobrien || ((unsigned) reg_renumber[(REGNO)] >= FIRST_REX_INT_REG \ 190690285Sobrien && (unsigned) reg_renumber[(REGNO)] <= LAST_REX_INT_REG) \ 190790285Sobrien || (unsigned) reg_renumber[(REGNO)] <= STACK_POINTER_REGNUM) 190818334Speter 190990285Sobrien#define REGNO_OK_FOR_SIREG_P(REGNO) \ 191090285Sobrien ((REGNO) == 4 || reg_renumber[(REGNO)] == 4) 191190285Sobrien#define REGNO_OK_FOR_DIREG_P(REGNO) \ 191290285Sobrien ((REGNO) == 5 || reg_renumber[(REGNO)] == 5) 191318334Speter 191418334Speter/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 191518334Speter and check its validity for a certain class. 191618334Speter We have two alternate definitions for each of them. 191718334Speter The usual definition accepts all pseudo regs; the other rejects 191818334Speter them unless they have been allocated suitable hard regs. 191918334Speter The symbol REG_OK_STRICT causes the latter definition to be used. 192018334Speter 192118334Speter Most source files want to accept pseudo regs in the hope that 192218334Speter they will get allocated to the class that the insn wants them to be in. 192318334Speter Source files for reload pass need to be strict. 192418334Speter After reload, it makes no difference, since pseudo regs have 192518334Speter been eliminated by then. */ 192618334Speter 192718334Speter 192818334Speter/* Non strict versions, pseudos are ok */ 192918334Speter#define REG_OK_FOR_INDEX_NONSTRICT_P(X) \ 193018334Speter (REGNO (X) < STACK_POINTER_REGNUM \ 193190285Sobrien || (REGNO (X) >= FIRST_REX_INT_REG \ 193290285Sobrien && REGNO (X) <= LAST_REX_INT_REG) \ 193318334Speter || REGNO (X) >= FIRST_PSEUDO_REGISTER) 193418334Speter 193518334Speter#define REG_OK_FOR_BASE_NONSTRICT_P(X) \ 193618334Speter (REGNO (X) <= STACK_POINTER_REGNUM \ 193718334Speter || REGNO (X) == ARG_POINTER_REGNUM \ 193890285Sobrien || REGNO (X) == FRAME_POINTER_REGNUM \ 193990285Sobrien || (REGNO (X) >= FIRST_REX_INT_REG \ 194090285Sobrien && REGNO (X) <= LAST_REX_INT_REG) \ 194118334Speter || REGNO (X) >= FIRST_PSEUDO_REGISTER) 194218334Speter 194318334Speter/* Strict versions, hard registers only */ 194418334Speter#define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 194518334Speter#define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 194618334Speter 194718334Speter#ifndef REG_OK_STRICT 194890285Sobrien#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X) 194990285Sobrien#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P (X) 195018334Speter 195118334Speter#else 195290285Sobrien#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P (X) 195390285Sobrien#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X) 195418334Speter#endif 195518334Speter 195618334Speter/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 195718334Speter that is a valid memory address for an instruction. 195818334Speter The MODE argument is the machine mode for the MEM expression 195918334Speter that wants to use this address. 196018334Speter 196118334Speter The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, 196218334Speter except for CONSTANT_ADDRESS_P which is usually machine-independent. 196318334Speter 196418334Speter See legitimize_pic_address in i386.c for details as to what 196518334Speter constitutes a legitimate address when -fpic is used. */ 196618334Speter 196718334Speter#define MAX_REGS_PER_ADDRESS 2 196818334Speter 1969117407Skan#define CONSTANT_ADDRESS_P(X) constant_address_p (X) 197018334Speter 197118334Speter/* Nonzero if the constant value X is a legitimate general operand. 197218334Speter It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 197318334Speter 1974117407Skan#define LEGITIMATE_CONSTANT_P(X) legitimate_constant_p (X) 197518334Speter 197618334Speter#ifdef REG_OK_STRICT 197718334Speter#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 197890285Sobriendo { \ 197990285Sobrien if (legitimate_address_p ((MODE), (X), 1)) \ 198018334Speter goto ADDR; \ 198190285Sobrien} while (0) 198218334Speter 198318334Speter#else 198418334Speter#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 198590285Sobriendo { \ 198690285Sobrien if (legitimate_address_p ((MODE), (X), 0)) \ 198718334Speter goto ADDR; \ 198890285Sobrien} while (0) 198918334Speter 199018334Speter#endif 199118334Speter 199290285Sobrien/* If defined, a C expression to determine the base term of address X. 199390285Sobrien This macro is used in only one place: `find_base_term' in alias.c. 199490285Sobrien 199590285Sobrien It is always safe for this macro to not be defined. It exists so 199690285Sobrien that alias analysis can understand machine-dependent addresses. 199790285Sobrien 199890285Sobrien The typical use of this macro is to handle addresses containing 199990285Sobrien a label_ref or symbol_ref within an UNSPEC. */ 200090285Sobrien 200190285Sobrien#define FIND_BASE_TERM(X) ix86_find_base_term (X) 200290285Sobrien 200318334Speter/* Try machine-dependent ways of modifying an illegitimate address 200418334Speter to be legitimate. If we find one, return the new, valid address. 200518334Speter This macro is used in only one place: `memory_address' in explow.c. 200618334Speter 200718334Speter OLDX is the address as it was before break_out_memory_refs was called. 200818334Speter In some cases it is useful to look at this to decide what needs to be done. 200918334Speter 201018334Speter MODE and WIN are passed so that this macro can use 201118334Speter GO_IF_LEGITIMATE_ADDRESS. 201218334Speter 201318334Speter It is always safe for this macro to do nothing. It exists to recognize 201418334Speter opportunities to optimize the output. 201518334Speter 201618334Speter For the 80386, we handle X+REG by loading X into a register R and 201718334Speter using R+REG. R will go in a general reg and indexing will be used. 201818334Speter However, if REG is a broken-out memory address or multiplication, 201918334Speter nothing needs to be done because REG can certainly go in a general reg. 202018334Speter 202118334Speter When -fpic is used, special handling is needed for symbolic references. 202218334Speter See comments by legitimize_pic_address in i386.c for details. */ 202318334Speter 202418334Speter#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ 202590285Sobriendo { \ 202690285Sobrien (X) = legitimize_address ((X), (OLDX), (MODE)); \ 202790285Sobrien if (memory_address_p ((MODE), (X))) \ 202818334Speter goto WIN; \ 202990285Sobrien} while (0) 203018334Speter 203190285Sobrien#define REWRITE_ADDRESS(X) rewrite_address (X) 203250654Sobrien 203318334Speter/* Nonzero if the constant value X is a legitimate general operand 2034117407Skan when generating PIC code. It is given that flag_pic is on and 203518334Speter that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 203618334Speter 2037117407Skan#define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X) 203818334Speter 203918334Speter#define SYMBOLIC_CONST(X) \ 204090285Sobrien (GET_CODE (X) == SYMBOL_REF \ 204190285Sobrien || GET_CODE (X) == LABEL_REF \ 204290285Sobrien || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X))) 204318334Speter 204418334Speter/* Go to LABEL if ADDR (a legitimate address expression) 204518334Speter has an effect that depends on the machine mode it is used for. 204618334Speter On the 80386, only postdecrement and postincrement address depend thus 204718334Speter (the amount of decrement or increment being the length of the operand). */ 204890285Sobrien#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ 204990285Sobriendo { \ 205090285Sobrien if (GET_CODE (ADDR) == POST_INC \ 205190285Sobrien || GET_CODE (ADDR) == POST_DEC) \ 205290285Sobrien goto LABEL; \ 205390285Sobrien} while (0) 205418334Speter 205590285Sobrien/* Codes for all the SSE/MMX builtins. */ 205690285Sobrienenum ix86_builtins 205790285Sobrien{ 205890285Sobrien IX86_BUILTIN_ADDPS, 205990285Sobrien IX86_BUILTIN_ADDSS, 206090285Sobrien IX86_BUILTIN_DIVPS, 206190285Sobrien IX86_BUILTIN_DIVSS, 206290285Sobrien IX86_BUILTIN_MULPS, 206390285Sobrien IX86_BUILTIN_MULSS, 206490285Sobrien IX86_BUILTIN_SUBPS, 206590285Sobrien IX86_BUILTIN_SUBSS, 206690285Sobrien 206790285Sobrien IX86_BUILTIN_CMPEQPS, 206890285Sobrien IX86_BUILTIN_CMPLTPS, 206990285Sobrien IX86_BUILTIN_CMPLEPS, 207090285Sobrien IX86_BUILTIN_CMPGTPS, 207190285Sobrien IX86_BUILTIN_CMPGEPS, 207290285Sobrien IX86_BUILTIN_CMPNEQPS, 207390285Sobrien IX86_BUILTIN_CMPNLTPS, 207490285Sobrien IX86_BUILTIN_CMPNLEPS, 207590285Sobrien IX86_BUILTIN_CMPNGTPS, 207690285Sobrien IX86_BUILTIN_CMPNGEPS, 207790285Sobrien IX86_BUILTIN_CMPORDPS, 207890285Sobrien IX86_BUILTIN_CMPUNORDPS, 207990285Sobrien IX86_BUILTIN_CMPNEPS, 208090285Sobrien IX86_BUILTIN_CMPEQSS, 208190285Sobrien IX86_BUILTIN_CMPLTSS, 208290285Sobrien IX86_BUILTIN_CMPLESS, 208390285Sobrien IX86_BUILTIN_CMPNEQSS, 208490285Sobrien IX86_BUILTIN_CMPNLTSS, 208590285Sobrien IX86_BUILTIN_CMPNLESS, 208690285Sobrien IX86_BUILTIN_CMPORDSS, 208790285Sobrien IX86_BUILTIN_CMPUNORDSS, 208890285Sobrien IX86_BUILTIN_CMPNESS, 208990285Sobrien 209090285Sobrien IX86_BUILTIN_COMIEQSS, 209190285Sobrien IX86_BUILTIN_COMILTSS, 209290285Sobrien IX86_BUILTIN_COMILESS, 209390285Sobrien IX86_BUILTIN_COMIGTSS, 209490285Sobrien IX86_BUILTIN_COMIGESS, 209590285Sobrien IX86_BUILTIN_COMINEQSS, 209690285Sobrien IX86_BUILTIN_UCOMIEQSS, 209790285Sobrien IX86_BUILTIN_UCOMILTSS, 209890285Sobrien IX86_BUILTIN_UCOMILESS, 209990285Sobrien IX86_BUILTIN_UCOMIGTSS, 210090285Sobrien IX86_BUILTIN_UCOMIGESS, 210190285Sobrien IX86_BUILTIN_UCOMINEQSS, 210290285Sobrien 210390285Sobrien IX86_BUILTIN_CVTPI2PS, 210490285Sobrien IX86_BUILTIN_CVTPS2PI, 210590285Sobrien IX86_BUILTIN_CVTSI2SS, 2106117407Skan IX86_BUILTIN_CVTSI642SS, 210790285Sobrien IX86_BUILTIN_CVTSS2SI, 2108117407Skan IX86_BUILTIN_CVTSS2SI64, 210990285Sobrien IX86_BUILTIN_CVTTPS2PI, 211090285Sobrien IX86_BUILTIN_CVTTSS2SI, 2111117407Skan IX86_BUILTIN_CVTTSS2SI64, 211290285Sobrien 211390285Sobrien IX86_BUILTIN_MAXPS, 211490285Sobrien IX86_BUILTIN_MAXSS, 211590285Sobrien IX86_BUILTIN_MINPS, 211690285Sobrien IX86_BUILTIN_MINSS, 211790285Sobrien 211890285Sobrien IX86_BUILTIN_LOADAPS, 211990285Sobrien IX86_BUILTIN_LOADUPS, 212090285Sobrien IX86_BUILTIN_STOREAPS, 212190285Sobrien IX86_BUILTIN_STOREUPS, 212290285Sobrien IX86_BUILTIN_LOADSS, 212390285Sobrien IX86_BUILTIN_STORESS, 212490285Sobrien IX86_BUILTIN_MOVSS, 212590285Sobrien 212690285Sobrien IX86_BUILTIN_MOVHLPS, 212790285Sobrien IX86_BUILTIN_MOVLHPS, 212890285Sobrien IX86_BUILTIN_LOADHPS, 212990285Sobrien IX86_BUILTIN_LOADLPS, 213090285Sobrien IX86_BUILTIN_STOREHPS, 213190285Sobrien IX86_BUILTIN_STORELPS, 213290285Sobrien 213390285Sobrien IX86_BUILTIN_MASKMOVQ, 213490285Sobrien IX86_BUILTIN_MOVMSKPS, 213590285Sobrien IX86_BUILTIN_PMOVMSKB, 213690285Sobrien 213790285Sobrien IX86_BUILTIN_MOVNTPS, 213890285Sobrien IX86_BUILTIN_MOVNTQ, 213990285Sobrien 2140117407Skan IX86_BUILTIN_LOADDQA, 2141117407Skan IX86_BUILTIN_LOADDQU, 2142117407Skan IX86_BUILTIN_STOREDQA, 2143117407Skan IX86_BUILTIN_STOREDQU, 2144117407Skan IX86_BUILTIN_MOVQ, 2145117407Skan IX86_BUILTIN_LOADD, 2146117407Skan IX86_BUILTIN_STORED, 2147117407Skan 2148117407Skan IX86_BUILTIN_CLRTI, 2149117407Skan 215090285Sobrien IX86_BUILTIN_PACKSSWB, 215190285Sobrien IX86_BUILTIN_PACKSSDW, 215290285Sobrien IX86_BUILTIN_PACKUSWB, 215390285Sobrien 215490285Sobrien IX86_BUILTIN_PADDB, 215590285Sobrien IX86_BUILTIN_PADDW, 215690285Sobrien IX86_BUILTIN_PADDD, 2157117407Skan IX86_BUILTIN_PADDQ, 215890285Sobrien IX86_BUILTIN_PADDSB, 215990285Sobrien IX86_BUILTIN_PADDSW, 216090285Sobrien IX86_BUILTIN_PADDUSB, 216190285Sobrien IX86_BUILTIN_PADDUSW, 216290285Sobrien IX86_BUILTIN_PSUBB, 216390285Sobrien IX86_BUILTIN_PSUBW, 216490285Sobrien IX86_BUILTIN_PSUBD, 2165117407Skan IX86_BUILTIN_PSUBQ, 216690285Sobrien IX86_BUILTIN_PSUBSB, 216790285Sobrien IX86_BUILTIN_PSUBSW, 216890285Sobrien IX86_BUILTIN_PSUBUSB, 216990285Sobrien IX86_BUILTIN_PSUBUSW, 217090285Sobrien 217190285Sobrien IX86_BUILTIN_PAND, 217290285Sobrien IX86_BUILTIN_PANDN, 217390285Sobrien IX86_BUILTIN_POR, 217490285Sobrien IX86_BUILTIN_PXOR, 217590285Sobrien 217690285Sobrien IX86_BUILTIN_PAVGB, 217790285Sobrien IX86_BUILTIN_PAVGW, 217890285Sobrien 217990285Sobrien IX86_BUILTIN_PCMPEQB, 218090285Sobrien IX86_BUILTIN_PCMPEQW, 218190285Sobrien IX86_BUILTIN_PCMPEQD, 218290285Sobrien IX86_BUILTIN_PCMPGTB, 218390285Sobrien IX86_BUILTIN_PCMPGTW, 218490285Sobrien IX86_BUILTIN_PCMPGTD, 218590285Sobrien 218690285Sobrien IX86_BUILTIN_PEXTRW, 218790285Sobrien IX86_BUILTIN_PINSRW, 218890285Sobrien 218990285Sobrien IX86_BUILTIN_PMADDWD, 219090285Sobrien 219190285Sobrien IX86_BUILTIN_PMAXSW, 219290285Sobrien IX86_BUILTIN_PMAXUB, 219390285Sobrien IX86_BUILTIN_PMINSW, 219490285Sobrien IX86_BUILTIN_PMINUB, 219590285Sobrien 219690285Sobrien IX86_BUILTIN_PMULHUW, 219790285Sobrien IX86_BUILTIN_PMULHW, 219890285Sobrien IX86_BUILTIN_PMULLW, 219990285Sobrien 220090285Sobrien IX86_BUILTIN_PSADBW, 220190285Sobrien IX86_BUILTIN_PSHUFW, 220290285Sobrien 220390285Sobrien IX86_BUILTIN_PSLLW, 220490285Sobrien IX86_BUILTIN_PSLLD, 220590285Sobrien IX86_BUILTIN_PSLLQ, 220690285Sobrien IX86_BUILTIN_PSRAW, 220790285Sobrien IX86_BUILTIN_PSRAD, 220890285Sobrien IX86_BUILTIN_PSRLW, 220990285Sobrien IX86_BUILTIN_PSRLD, 221090285Sobrien IX86_BUILTIN_PSRLQ, 221190285Sobrien IX86_BUILTIN_PSLLWI, 221290285Sobrien IX86_BUILTIN_PSLLDI, 221390285Sobrien IX86_BUILTIN_PSLLQI, 221490285Sobrien IX86_BUILTIN_PSRAWI, 221590285Sobrien IX86_BUILTIN_PSRADI, 221690285Sobrien IX86_BUILTIN_PSRLWI, 221790285Sobrien IX86_BUILTIN_PSRLDI, 221890285Sobrien IX86_BUILTIN_PSRLQI, 221990285Sobrien 222090285Sobrien IX86_BUILTIN_PUNPCKHBW, 222190285Sobrien IX86_BUILTIN_PUNPCKHWD, 222290285Sobrien IX86_BUILTIN_PUNPCKHDQ, 222390285Sobrien IX86_BUILTIN_PUNPCKLBW, 222490285Sobrien IX86_BUILTIN_PUNPCKLWD, 222590285Sobrien IX86_BUILTIN_PUNPCKLDQ, 222690285Sobrien 222790285Sobrien IX86_BUILTIN_SHUFPS, 222890285Sobrien 222990285Sobrien IX86_BUILTIN_RCPPS, 223090285Sobrien IX86_BUILTIN_RCPSS, 223190285Sobrien IX86_BUILTIN_RSQRTPS, 223290285Sobrien IX86_BUILTIN_RSQRTSS, 223390285Sobrien IX86_BUILTIN_SQRTPS, 223490285Sobrien IX86_BUILTIN_SQRTSS, 2235117407Skan 223690285Sobrien IX86_BUILTIN_UNPCKHPS, 223790285Sobrien IX86_BUILTIN_UNPCKLPS, 223890285Sobrien 223990285Sobrien IX86_BUILTIN_ANDPS, 224090285Sobrien IX86_BUILTIN_ANDNPS, 224190285Sobrien IX86_BUILTIN_ORPS, 224290285Sobrien IX86_BUILTIN_XORPS, 224390285Sobrien 224490285Sobrien IX86_BUILTIN_EMMS, 224590285Sobrien IX86_BUILTIN_LDMXCSR, 224690285Sobrien IX86_BUILTIN_STMXCSR, 224790285Sobrien IX86_BUILTIN_SFENCE, 224890285Sobrien 224990285Sobrien /* 3DNow! Original */ 225090285Sobrien IX86_BUILTIN_FEMMS, 225190285Sobrien IX86_BUILTIN_PAVGUSB, 225290285Sobrien IX86_BUILTIN_PF2ID, 225390285Sobrien IX86_BUILTIN_PFACC, 225490285Sobrien IX86_BUILTIN_PFADD, 225590285Sobrien IX86_BUILTIN_PFCMPEQ, 225690285Sobrien IX86_BUILTIN_PFCMPGE, 225790285Sobrien IX86_BUILTIN_PFCMPGT, 225890285Sobrien IX86_BUILTIN_PFMAX, 225990285Sobrien IX86_BUILTIN_PFMIN, 226090285Sobrien IX86_BUILTIN_PFMUL, 226190285Sobrien IX86_BUILTIN_PFRCP, 226290285Sobrien IX86_BUILTIN_PFRCPIT1, 226390285Sobrien IX86_BUILTIN_PFRCPIT2, 226490285Sobrien IX86_BUILTIN_PFRSQIT1, 226590285Sobrien IX86_BUILTIN_PFRSQRT, 226690285Sobrien IX86_BUILTIN_PFSUB, 226790285Sobrien IX86_BUILTIN_PFSUBR, 226890285Sobrien IX86_BUILTIN_PI2FD, 226990285Sobrien IX86_BUILTIN_PMULHRW, 227090285Sobrien 227190285Sobrien /* 3DNow! Athlon Extensions */ 227290285Sobrien IX86_BUILTIN_PF2IW, 227390285Sobrien IX86_BUILTIN_PFNACC, 227490285Sobrien IX86_BUILTIN_PFPNACC, 227590285Sobrien IX86_BUILTIN_PI2FW, 227690285Sobrien IX86_BUILTIN_PSWAPDSI, 227790285Sobrien IX86_BUILTIN_PSWAPDSF, 227890285Sobrien 227990285Sobrien IX86_BUILTIN_SSE_ZERO, 228090285Sobrien IX86_BUILTIN_MMX_ZERO, 228190285Sobrien 2282117407Skan /* SSE2 */ 2283117407Skan IX86_BUILTIN_ADDPD, 2284117407Skan IX86_BUILTIN_ADDSD, 2285117407Skan IX86_BUILTIN_DIVPD, 2286117407Skan IX86_BUILTIN_DIVSD, 2287117407Skan IX86_BUILTIN_MULPD, 2288117407Skan IX86_BUILTIN_MULSD, 2289117407Skan IX86_BUILTIN_SUBPD, 2290117407Skan IX86_BUILTIN_SUBSD, 229118334Speter 2292117407Skan IX86_BUILTIN_CMPEQPD, 2293117407Skan IX86_BUILTIN_CMPLTPD, 2294117407Skan IX86_BUILTIN_CMPLEPD, 2295117407Skan IX86_BUILTIN_CMPGTPD, 2296117407Skan IX86_BUILTIN_CMPGEPD, 2297117407Skan IX86_BUILTIN_CMPNEQPD, 2298117407Skan IX86_BUILTIN_CMPNLTPD, 2299117407Skan IX86_BUILTIN_CMPNLEPD, 2300117407Skan IX86_BUILTIN_CMPNGTPD, 2301117407Skan IX86_BUILTIN_CMPNGEPD, 2302117407Skan IX86_BUILTIN_CMPORDPD, 2303117407Skan IX86_BUILTIN_CMPUNORDPD, 2304117407Skan IX86_BUILTIN_CMPNEPD, 2305117407Skan IX86_BUILTIN_CMPEQSD, 2306117407Skan IX86_BUILTIN_CMPLTSD, 2307117407Skan IX86_BUILTIN_CMPLESD, 2308117407Skan IX86_BUILTIN_CMPNEQSD, 2309117407Skan IX86_BUILTIN_CMPNLTSD, 2310117407Skan IX86_BUILTIN_CMPNLESD, 2311117407Skan IX86_BUILTIN_CMPORDSD, 2312117407Skan IX86_BUILTIN_CMPUNORDSD, 2313117407Skan IX86_BUILTIN_CMPNESD, 231418334Speter 2315117407Skan IX86_BUILTIN_COMIEQSD, 2316117407Skan IX86_BUILTIN_COMILTSD, 2317117407Skan IX86_BUILTIN_COMILESD, 2318117407Skan IX86_BUILTIN_COMIGTSD, 2319117407Skan IX86_BUILTIN_COMIGESD, 2320117407Skan IX86_BUILTIN_COMINEQSD, 2321117407Skan IX86_BUILTIN_UCOMIEQSD, 2322117407Skan IX86_BUILTIN_UCOMILTSD, 2323117407Skan IX86_BUILTIN_UCOMILESD, 2324117407Skan IX86_BUILTIN_UCOMIGTSD, 2325117407Skan IX86_BUILTIN_UCOMIGESD, 2326117407Skan IX86_BUILTIN_UCOMINEQSD, 232718334Speter 2328117407Skan IX86_BUILTIN_MAXPD, 2329117407Skan IX86_BUILTIN_MAXSD, 2330117407Skan IX86_BUILTIN_MINPD, 2331117407Skan IX86_BUILTIN_MINSD, 233218334Speter 2333117407Skan IX86_BUILTIN_ANDPD, 2334117407Skan IX86_BUILTIN_ANDNPD, 2335117407Skan IX86_BUILTIN_ORPD, 2336117407Skan IX86_BUILTIN_XORPD, 233718334Speter 2338117407Skan IX86_BUILTIN_SQRTPD, 2339117407Skan IX86_BUILTIN_SQRTSD, 2340117407Skan 2341117407Skan IX86_BUILTIN_UNPCKHPD, 2342117407Skan IX86_BUILTIN_UNPCKLPD, 2343117407Skan 2344117407Skan IX86_BUILTIN_SHUFPD, 2345117407Skan 2346117407Skan IX86_BUILTIN_LOADAPD, 2347117407Skan IX86_BUILTIN_LOADUPD, 2348117407Skan IX86_BUILTIN_STOREAPD, 2349117407Skan IX86_BUILTIN_STOREUPD, 2350117407Skan IX86_BUILTIN_LOADSD, 2351117407Skan IX86_BUILTIN_STORESD, 2352117407Skan IX86_BUILTIN_MOVSD, 2353117407Skan 2354117407Skan IX86_BUILTIN_LOADHPD, 2355117407Skan IX86_BUILTIN_LOADLPD, 2356117407Skan IX86_BUILTIN_STOREHPD, 2357117407Skan IX86_BUILTIN_STORELPD, 2358117407Skan 2359117407Skan IX86_BUILTIN_CVTDQ2PD, 2360117407Skan IX86_BUILTIN_CVTDQ2PS, 2361117407Skan 2362117407Skan IX86_BUILTIN_CVTPD2DQ, 2363117407Skan IX86_BUILTIN_CVTPD2PI, 2364117407Skan IX86_BUILTIN_CVTPD2PS, 2365117407Skan IX86_BUILTIN_CVTTPD2DQ, 2366117407Skan IX86_BUILTIN_CVTTPD2PI, 2367117407Skan 2368117407Skan IX86_BUILTIN_CVTPI2PD, 2369117407Skan IX86_BUILTIN_CVTSI2SD, 2370117407Skan IX86_BUILTIN_CVTSI642SD, 2371117407Skan 2372117407Skan IX86_BUILTIN_CVTSD2SI, 2373117407Skan IX86_BUILTIN_CVTSD2SI64, 2374117407Skan IX86_BUILTIN_CVTSD2SS, 2375117407Skan IX86_BUILTIN_CVTSS2SD, 2376117407Skan IX86_BUILTIN_CVTTSD2SI, 2377117407Skan IX86_BUILTIN_CVTTSD2SI64, 2378117407Skan 2379117407Skan IX86_BUILTIN_CVTPS2DQ, 2380117407Skan IX86_BUILTIN_CVTPS2PD, 2381117407Skan IX86_BUILTIN_CVTTPS2DQ, 2382117407Skan 2383117407Skan IX86_BUILTIN_MOVNTI, 2384117407Skan IX86_BUILTIN_MOVNTPD, 2385117407Skan IX86_BUILTIN_MOVNTDQ, 2386117407Skan 2387117407Skan IX86_BUILTIN_SETPD1, 2388117407Skan IX86_BUILTIN_SETPD, 2389117407Skan IX86_BUILTIN_CLRPD, 2390117407Skan IX86_BUILTIN_SETRPD, 2391117407Skan IX86_BUILTIN_LOADPD1, 2392117407Skan IX86_BUILTIN_LOADRPD, 2393117407Skan IX86_BUILTIN_STOREPD1, 2394117407Skan IX86_BUILTIN_STORERPD, 2395117407Skan 2396117407Skan /* SSE2 MMX */ 2397117407Skan IX86_BUILTIN_MASKMOVDQU, 2398117407Skan IX86_BUILTIN_MOVMSKPD, 2399117407Skan IX86_BUILTIN_PMOVMSKB128, 2400117407Skan IX86_BUILTIN_MOVQ2DQ, 2401117407Skan IX86_BUILTIN_MOVDQ2Q, 2402117407Skan 2403117407Skan IX86_BUILTIN_PACKSSWB128, 2404117407Skan IX86_BUILTIN_PACKSSDW128, 2405117407Skan IX86_BUILTIN_PACKUSWB128, 2406117407Skan 2407117407Skan IX86_BUILTIN_PADDB128, 2408117407Skan IX86_BUILTIN_PADDW128, 2409117407Skan IX86_BUILTIN_PADDD128, 2410117407Skan IX86_BUILTIN_PADDQ128, 2411117407Skan IX86_BUILTIN_PADDSB128, 2412117407Skan IX86_BUILTIN_PADDSW128, 2413117407Skan IX86_BUILTIN_PADDUSB128, 2414117407Skan IX86_BUILTIN_PADDUSW128, 2415117407Skan IX86_BUILTIN_PSUBB128, 2416117407Skan IX86_BUILTIN_PSUBW128, 2417117407Skan IX86_BUILTIN_PSUBD128, 2418117407Skan IX86_BUILTIN_PSUBQ128, 2419117407Skan IX86_BUILTIN_PSUBSB128, 2420117407Skan IX86_BUILTIN_PSUBSW128, 2421117407Skan IX86_BUILTIN_PSUBUSB128, 2422117407Skan IX86_BUILTIN_PSUBUSW128, 2423117407Skan 2424117407Skan IX86_BUILTIN_PAND128, 2425117407Skan IX86_BUILTIN_PANDN128, 2426117407Skan IX86_BUILTIN_POR128, 2427117407Skan IX86_BUILTIN_PXOR128, 2428117407Skan 2429117407Skan IX86_BUILTIN_PAVGB128, 2430117407Skan IX86_BUILTIN_PAVGW128, 2431117407Skan 2432117407Skan IX86_BUILTIN_PCMPEQB128, 2433117407Skan IX86_BUILTIN_PCMPEQW128, 2434117407Skan IX86_BUILTIN_PCMPEQD128, 2435117407Skan IX86_BUILTIN_PCMPGTB128, 2436117407Skan IX86_BUILTIN_PCMPGTW128, 2437117407Skan IX86_BUILTIN_PCMPGTD128, 2438117407Skan 2439117407Skan IX86_BUILTIN_PEXTRW128, 2440117407Skan IX86_BUILTIN_PINSRW128, 2441117407Skan 2442117407Skan IX86_BUILTIN_PMADDWD128, 2443117407Skan 2444117407Skan IX86_BUILTIN_PMAXSW128, 2445117407Skan IX86_BUILTIN_PMAXUB128, 2446117407Skan IX86_BUILTIN_PMINSW128, 2447117407Skan IX86_BUILTIN_PMINUB128, 2448117407Skan 2449117407Skan IX86_BUILTIN_PMULUDQ, 2450117407Skan IX86_BUILTIN_PMULUDQ128, 2451117407Skan IX86_BUILTIN_PMULHUW128, 2452117407Skan IX86_BUILTIN_PMULHW128, 2453117407Skan IX86_BUILTIN_PMULLW128, 2454117407Skan 2455117407Skan IX86_BUILTIN_PSADBW128, 2456117407Skan IX86_BUILTIN_PSHUFHW, 2457117407Skan IX86_BUILTIN_PSHUFLW, 2458117407Skan IX86_BUILTIN_PSHUFD, 2459117407Skan 2460117407Skan IX86_BUILTIN_PSLLW128, 2461117407Skan IX86_BUILTIN_PSLLD128, 2462117407Skan IX86_BUILTIN_PSLLQ128, 2463117407Skan IX86_BUILTIN_PSRAW128, 2464117407Skan IX86_BUILTIN_PSRAD128, 2465117407Skan IX86_BUILTIN_PSRLW128, 2466117407Skan IX86_BUILTIN_PSRLD128, 2467117407Skan IX86_BUILTIN_PSRLQ128, 2468117407Skan IX86_BUILTIN_PSLLDQI128, 2469117407Skan IX86_BUILTIN_PSLLWI128, 2470117407Skan IX86_BUILTIN_PSLLDI128, 2471117407Skan IX86_BUILTIN_PSLLQI128, 2472117407Skan IX86_BUILTIN_PSRAWI128, 2473117407Skan IX86_BUILTIN_PSRADI128, 2474117407Skan IX86_BUILTIN_PSRLDQI128, 2475117407Skan IX86_BUILTIN_PSRLWI128, 2476117407Skan IX86_BUILTIN_PSRLDI128, 2477117407Skan IX86_BUILTIN_PSRLQI128, 2478117407Skan 2479117407Skan IX86_BUILTIN_PUNPCKHBW128, 2480117407Skan IX86_BUILTIN_PUNPCKHWD128, 2481117407Skan IX86_BUILTIN_PUNPCKHDQ128, 2482117407Skan IX86_BUILTIN_PUNPCKHQDQ128, 2483117407Skan IX86_BUILTIN_PUNPCKLBW128, 2484117407Skan IX86_BUILTIN_PUNPCKLWD128, 2485117407Skan IX86_BUILTIN_PUNPCKLDQ128, 2486117407Skan IX86_BUILTIN_PUNPCKLQDQ128, 2487117407Skan 2488117407Skan IX86_BUILTIN_CLFLUSH, 2489117407Skan IX86_BUILTIN_MFENCE, 2490117407Skan IX86_BUILTIN_LFENCE, 2491117407Skan 2492117407Skan IX86_BUILTIN_MAX 2493117407Skan}; 249418334Speter 2495117407Skan#define TARGET_ENCODE_SECTION_INFO ix86_encode_section_info 2496117407Skan#define TARGET_STRIP_NAME_ENCODING ix86_strip_name_encoding 2497117407Skan 2498117407Skan#define ASM_OUTPUT_LABELREF(FILE,NAME) \ 2499117407Skan do { \ 2500117407Skan const char *xname = (NAME); \ 2501117407Skan if (xname[0] == '%') \ 2502117407Skan xname += 2; \ 2503117407Skan if (xname[0] == '*') \ 2504117407Skan xname += 1; \ 2505117407Skan else \ 2506117407Skan fputs (user_label_prefix, FILE); \ 2507117407Skan fputs (xname, FILE); \ 2508117407Skan } while (0) 2509117407Skan 251018334Speter/* Max number of args passed in registers. If this is more than 3, we will 251118334Speter have problems with ebx (register #4), since it is a caller save register and 251218334Speter is also used as the pic register in ELF. So for now, don't allow more than 251318334Speter 3 registers to be passed in registers. */ 251418334Speter 251590285Sobrien#define REGPARM_MAX (TARGET_64BIT ? 6 : 3) 251618334Speter 251790285Sobrien#define SSE_REGPARM_MAX (TARGET_64BIT ? 8 : 0) 251890285Sobrien 251918334Speter 252018334Speter/* Specify the machine mode that this machine uses 252118334Speter for the index in the tablejump instruction. */ 252290285Sobrien#define CASE_VECTOR_MODE (!TARGET_64BIT || flag_pic ? SImode : DImode) 252318334Speter 252450654Sobrien/* Define as C expression which evaluates to nonzero if the tablejump 252550654Sobrien instruction expects the table to contain offsets from the address of the 252650654Sobrien table. 252790285Sobrien Do not define this if the table should contain absolute addresses. */ 252850654Sobrien/* #define CASE_VECTOR_PC_RELATIVE 1 */ 252918334Speter 253018334Speter/* Define this as 1 if `char' should by default be signed; else as 0. */ 253118334Speter#define DEFAULT_SIGNED_CHAR 1 253218334Speter 253390285Sobrien/* Number of bytes moved into a data cache for a single prefetch operation. */ 253490285Sobrien#define PREFETCH_BLOCK ix86_cost->prefetch_block 253590285Sobrien 253690285Sobrien/* Number of prefetch operations that can be done in parallel. */ 253790285Sobrien#define SIMULTANEOUS_PREFETCHES ix86_cost->simultaneous_prefetches 253890285Sobrien 253918334Speter/* Max number of bytes we can move from memory to memory 254018334Speter in one reasonably fast instruction. */ 254190285Sobrien#define MOVE_MAX 16 254218334Speter 254390285Sobrien/* MOVE_MAX_PIECES is the number of bytes at a time which we can 254490285Sobrien move efficiently, as opposed to MOVE_MAX which is the maximum 254590285Sobrien number of bytes we can move with a single instruction. */ 254690285Sobrien#define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4) 254790285Sobrien 254852295Sobrien/* If a memory-to-memory move would take MOVE_RATIO or more simple 254952295Sobrien move-instruction pairs, we will do a movstr or libcall instead. 255052295Sobrien Increasing the value will always make code faster, but eventually 255152295Sobrien incurs high cost in increased code size. 255218334Speter 255390285Sobrien If you don't define this, a reasonable default is used. */ 255418334Speter 255590285Sobrien#define MOVE_RATIO (optimize_size ? 3 : ix86_cost->move_ratio) 255618334Speter 255718334Speter/* Define if shifts truncate the shift count 255818334Speter which implies one can omit a sign-extension or zero-extension 255918334Speter of a shift count. */ 256090285Sobrien/* On i386, shifts do truncate the count. But bit opcodes don't. */ 256118334Speter 256218334Speter/* #define SHIFT_COUNT_TRUNCATED */ 256318334Speter 256418334Speter/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 256518334Speter is done just by pretending it is already truncated. */ 256618334Speter#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 256718334Speter 256818334Speter/* We assume that the store-condition-codes instructions store 0 for false 256918334Speter and some other value for true. This is the value stored for true. */ 257018334Speter 257118334Speter#define STORE_FLAG_VALUE 1 257218334Speter 257318334Speter/* When a prototype says `char' or `short', really pass an `int'. 257418334Speter (The 386 can't easily push less than an int.) */ 257518334Speter 2576117407Skan#define PROMOTE_PROTOTYPES 1 257718334Speter 257890285Sobrien/* A macro to update M and UNSIGNEDP when an object whose type is 257990285Sobrien TYPE and which has the specified mode and signedness is to be 258090285Sobrien stored in a register. This macro is only called when TYPE is a 258190285Sobrien scalar type. 258290285Sobrien 258390285Sobrien On i386 it is sometimes useful to promote HImode and QImode 258490285Sobrien quantities to SImode. The choice depends on target type. */ 258590285Sobrien 258690285Sobrien#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ 258790285Sobriendo { \ 258890285Sobrien if (((MODE) == HImode && TARGET_PROMOTE_HI_REGS) \ 258990285Sobrien || ((MODE) == QImode && TARGET_PROMOTE_QI_REGS)) \ 259090285Sobrien (MODE) = SImode; \ 259190285Sobrien} while (0) 259290285Sobrien 259318334Speter/* Specify the machine mode that pointers have. 259418334Speter After generation of rtl, the compiler makes no further distinction 259518334Speter between pointers and any other objects of this machine mode. */ 259690285Sobrien#define Pmode (TARGET_64BIT ? DImode : SImode) 259718334Speter 259818334Speter/* A function address in a call instruction 259918334Speter is a byte address (for indexing purposes) 260018334Speter so give the MEM rtx a byte's mode. */ 260118334Speter#define FUNCTION_MODE QImode 260250654Sobrien 260350654Sobrien/* A part of a C `switch' statement that describes the relative costs 260450654Sobrien of constant RTL expressions. It must contain `case' labels for 260550654Sobrien expression codes `const_int', `const', `symbol_ref', `label_ref' 260650654Sobrien and `const_double'. Each case must ultimately reach a `return' 260750654Sobrien statement to return the relative cost of the use of that kind of 260850654Sobrien constant value in an expression. The cost may depend on the 260950654Sobrien precise value of the constant, which is available for examination 261050654Sobrien in X, and the rtx code of the expression in which it is contained, 261150654Sobrien found in OUTER_CODE. 2612117407Skan 261350654Sobrien CODE is the expression code--redundant, since it can be obtained 261450654Sobrien with `GET_CODE (X)'. */ 261518334Speter 261690285Sobrien#define CONST_COSTS(RTX, CODE, OUTER_CODE) \ 261718334Speter case CONST_INT: \ 261818334Speter case CONST: \ 261918334Speter case LABEL_REF: \ 262018334Speter case SYMBOL_REF: \ 262190285Sobrien if (TARGET_64BIT && !x86_64_sign_extended_value (RTX)) \ 262290285Sobrien return 3; \ 262390285Sobrien if (TARGET_64BIT && !x86_64_zero_extended_value (RTX)) \ 262490285Sobrien return 2; \ 262590285Sobrien return flag_pic && SYMBOLIC_CONST (RTX) ? 1 : 0; \ 262650654Sobrien \ 262718334Speter case CONST_DOUBLE: \ 2628117407Skan if (GET_MODE (RTX) == VOIDmode) \ 2629117407Skan return 0; \ 2630117407Skan switch (standard_80387_constant_p (RTX)) \ 2631117407Skan { \ 2632117407Skan case 1: /* 0.0 */ \ 2633117407Skan return 1; \ 2634117407Skan case 2: /* 1.0 */ \ 2635117407Skan return 2; \ 2636117407Skan default: \ 2637117407Skan /* Start with (MEM (SYMBOL_REF)), since that's where \ 2638117407Skan it'll probably end up. Add a penalty for size. */ \ 2639117407Skan return (COSTS_N_INSNS (1) + (flag_pic != 0) \ 2640117407Skan + (GET_MODE (RTX) == SFmode ? 0 \ 2641117407Skan : GET_MODE (RTX) == DFmode ? 1 : 2)); \ 2642117407Skan } 264318334Speter 264450654Sobrien/* Delete the definition here when TOPLEVEL_COSTS_N_INSNS gets added to cse.c */ 264590285Sobrien#define TOPLEVEL_COSTS_N_INSNS(N) \ 264690285Sobrien do { total = COSTS_N_INSNS (N); goto egress_rtx_costs; } while (0) 264718334Speter 264850654Sobrien/* Like `CONST_COSTS' but applies to nonconstant RTL expressions. 264950654Sobrien This can be used, for example, to indicate how costly a multiply 265050654Sobrien instruction is. In writing this macro, you can use the construct 265150654Sobrien `COSTS_N_INSNS (N)' to specify a cost equal to N fast 265250654Sobrien instructions. OUTER_CODE is the code of the expression in which X 265350654Sobrien is contained. 265450654Sobrien 265550654Sobrien This macro is optional; do not define it if the default cost 265650654Sobrien assumptions are adequate for the target machine. */ 265750654Sobrien 265890285Sobrien#define RTX_COSTS(X, CODE, OUTER_CODE) \ 265990285Sobrien case ZERO_EXTEND: \ 266090285Sobrien /* The zero extensions is often completely free on x86_64, so make \ 266190285Sobrien it as cheap as possible. */ \ 266290285Sobrien if (TARGET_64BIT && GET_MODE (X) == DImode \ 266390285Sobrien && GET_MODE (XEXP (X, 0)) == SImode) \ 266490285Sobrien { \ 266590285Sobrien total = 1; goto egress_rtx_costs; \ 266690285Sobrien } \ 266790285Sobrien else \ 266890285Sobrien TOPLEVEL_COSTS_N_INSNS (TARGET_ZERO_EXTEND_WITH_AND ? \ 266990285Sobrien ix86_cost->add : ix86_cost->movzx); \ 267090285Sobrien break; \ 267190285Sobrien case SIGN_EXTEND: \ 267290285Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->movsx); \ 267390285Sobrien break; \ 267450654Sobrien case ASHIFT: \ 267550654Sobrien if (GET_CODE (XEXP (X, 1)) == CONST_INT \ 267690285Sobrien && (GET_MODE (XEXP (X, 0)) != DImode || TARGET_64BIT)) \ 267750654Sobrien { \ 267850654Sobrien HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \ 267950654Sobrien if (value == 1) \ 268090285Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->add); \ 268190285Sobrien if ((value == 2 || value == 3) \ 268290285Sobrien && !TARGET_DECOMPOSE_LEA \ 268390285Sobrien && ix86_cost->lea <= ix86_cost->shift_const) \ 268490285Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->lea); \ 268550654Sobrien } \ 268650654Sobrien /* fall through */ \ 268750654Sobrien \ 268850654Sobrien case ROTATE: \ 268950654Sobrien case ASHIFTRT: \ 269050654Sobrien case LSHIFTRT: \ 269150654Sobrien case ROTATERT: \ 269290285Sobrien if (!TARGET_64BIT && GET_MODE (XEXP (X, 0)) == DImode) \ 269350654Sobrien { \ 269450654Sobrien if (GET_CODE (XEXP (X, 1)) == CONST_INT) \ 269550654Sobrien { \ 269650654Sobrien if (INTVAL (XEXP (X, 1)) > 32) \ 269790285Sobrien TOPLEVEL_COSTS_N_INSNS(ix86_cost->shift_const + 2); \ 269890285Sobrien else \ 269990285Sobrien TOPLEVEL_COSTS_N_INSNS(ix86_cost->shift_const * 2); \ 270050654Sobrien } \ 270190285Sobrien else \ 270290285Sobrien { \ 270390285Sobrien if (GET_CODE (XEXP (X, 1)) == AND) \ 270490285Sobrien TOPLEVEL_COSTS_N_INSNS(ix86_cost->shift_var * 2); \ 270590285Sobrien else \ 270690285Sobrien TOPLEVEL_COSTS_N_INSNS(ix86_cost->shift_var * 6 + 2); \ 270790285Sobrien } \ 270850654Sobrien } \ 270990285Sobrien else \ 271090285Sobrien { \ 271190285Sobrien if (GET_CODE (XEXP (X, 1)) == CONST_INT) \ 271290285Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->shift_const); \ 271390285Sobrien else \ 271490285Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->shift_var); \ 271590285Sobrien } \ 271690285Sobrien break; \ 271750654Sobrien \ 271850654Sobrien case MULT: \ 2719117407Skan if (FLOAT_MODE_P (GET_MODE (X))) \ 2720117407Skan TOPLEVEL_COSTS_N_INSNS (ix86_cost->fmul); \ 2721117407Skan else if (GET_CODE (XEXP (X, 1)) == CONST_INT) \ 272250654Sobrien { \ 272350654Sobrien unsigned HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \ 272450654Sobrien int nbits = 0; \ 272550654Sobrien \ 272650654Sobrien while (value != 0) \ 272750654Sobrien { \ 272850654Sobrien nbits++; \ 272950654Sobrien value >>= 1; \ 273050654Sobrien } \ 273150654Sobrien \ 273290285Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \ 273390285Sobrien + nbits * ix86_cost->mult_bit); \ 273450654Sobrien } \ 273550654Sobrien else /* This is arbitrary */ \ 273650654Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \ 273750654Sobrien + 7 * ix86_cost->mult_bit); \ 273850654Sobrien \ 273950654Sobrien case DIV: \ 274050654Sobrien case UDIV: \ 274150654Sobrien case MOD: \ 274250654Sobrien case UMOD: \ 2743117407Skan if (FLOAT_MODE_P (GET_MODE (X))) \ 2744117407Skan TOPLEVEL_COSTS_N_INSNS (ix86_cost->fdiv); \ 2745117407Skan else \ 2746117407Skan TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide); \ 2747117407Skan break; \ 274850654Sobrien \ 274950654Sobrien case PLUS: \ 2750117407Skan if (FLOAT_MODE_P (GET_MODE (X))) \ 2751117407Skan TOPLEVEL_COSTS_N_INSNS (ix86_cost->fadd); \ 2752117407Skan else if (!TARGET_DECOMPOSE_LEA \ 275390285Sobrien && INTEGRAL_MODE_P (GET_MODE (X)) \ 275490285Sobrien && GET_MODE_BITSIZE (GET_MODE (X)) <= GET_MODE_BITSIZE (Pmode)) \ 275590285Sobrien { \ 275690285Sobrien if (GET_CODE (XEXP (X, 0)) == PLUS \ 275790285Sobrien && GET_CODE (XEXP (XEXP (X, 0), 0)) == MULT \ 275890285Sobrien && GET_CODE (XEXP (XEXP (XEXP (X, 0), 0), 1)) == CONST_INT \ 275990285Sobrien && CONSTANT_P (XEXP (X, 1))) \ 276090285Sobrien { \ 276190285Sobrien HOST_WIDE_INT val = INTVAL (XEXP (XEXP (XEXP (X, 0), 0), 1));\ 276290285Sobrien if (val == 2 || val == 4 || val == 8) \ 276390285Sobrien { \ 276490285Sobrien return (COSTS_N_INSNS (ix86_cost->lea) \ 276590285Sobrien + rtx_cost (XEXP (XEXP (X, 0), 1), \ 276690285Sobrien (OUTER_CODE)) \ 276790285Sobrien + rtx_cost (XEXP (XEXP (XEXP (X, 0), 0), 0), \ 276890285Sobrien (OUTER_CODE)) \ 276990285Sobrien + rtx_cost (XEXP (X, 1), (OUTER_CODE))); \ 277090285Sobrien } \ 277190285Sobrien } \ 277290285Sobrien else if (GET_CODE (XEXP (X, 0)) == MULT \ 277390285Sobrien && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT) \ 277490285Sobrien { \ 277590285Sobrien HOST_WIDE_INT val = INTVAL (XEXP (XEXP (X, 0), 1)); \ 277690285Sobrien if (val == 2 || val == 4 || val == 8) \ 277790285Sobrien { \ 277890285Sobrien return (COSTS_N_INSNS (ix86_cost->lea) \ 277990285Sobrien + rtx_cost (XEXP (XEXP (X, 0), 0), \ 278090285Sobrien (OUTER_CODE)) \ 278190285Sobrien + rtx_cost (XEXP (X, 1), (OUTER_CODE))); \ 278290285Sobrien } \ 278390285Sobrien } \ 278490285Sobrien else if (GET_CODE (XEXP (X, 0)) == PLUS) \ 278590285Sobrien { \ 278690285Sobrien return (COSTS_N_INSNS (ix86_cost->lea) \ 278790285Sobrien + rtx_cost (XEXP (XEXP (X, 0), 0), (OUTER_CODE)) \ 278890285Sobrien + rtx_cost (XEXP (XEXP (X, 0), 1), (OUTER_CODE)) \ 278990285Sobrien + rtx_cost (XEXP (X, 1), (OUTER_CODE))); \ 279090285Sobrien } \ 279190285Sobrien } \ 2792117407Skan /* fall through */ \ 279350654Sobrien \ 2794117407Skan case MINUS: \ 2795117407Skan if (FLOAT_MODE_P (GET_MODE (X))) \ 2796117407Skan TOPLEVEL_COSTS_N_INSNS (ix86_cost->fadd); \ 279750654Sobrien /* fall through */ \ 2798117407Skan \ 279950654Sobrien case AND: \ 280050654Sobrien case IOR: \ 280150654Sobrien case XOR: \ 280290285Sobrien if (!TARGET_64BIT && GET_MODE (X) == DImode) \ 280390285Sobrien return (COSTS_N_INSNS (ix86_cost->add) * 2 \ 280490285Sobrien + (rtx_cost (XEXP (X, 0), (OUTER_CODE)) \ 280590285Sobrien << (GET_MODE (XEXP (X, 0)) != DImode)) \ 280690285Sobrien + (rtx_cost (XEXP (X, 1), (OUTER_CODE)) \ 280790285Sobrien << (GET_MODE (XEXP (X, 1)) != DImode))); \ 2808117407Skan /* fall through */ \ 280990285Sobrien \ 2810117407Skan case NEG: \ 2811117407Skan if (FLOAT_MODE_P (GET_MODE (X))) \ 2812117407Skan TOPLEVEL_COSTS_N_INSNS (ix86_cost->fchs); \ 281390285Sobrien /* fall through */ \ 2814117407Skan \ 281550654Sobrien case NOT: \ 281690285Sobrien if (!TARGET_64BIT && GET_MODE (X) == DImode) \ 281790285Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->add * 2); \ 281890285Sobrien TOPLEVEL_COSTS_N_INSNS (ix86_cost->add); \ 281990285Sobrien \ 2820117407Skan case FLOAT_EXTEND: \ 2821117407Skan if (!TARGET_SSE_MATH \ 2822117407Skan || !VALID_SSE_REG_MODE (GET_MODE (X))) \ 2823117407Skan TOPLEVEL_COSTS_N_INSNS (0); \ 2824117407Skan break; \ 2825117407Skan \ 2826117407Skan case ABS: \ 2827117407Skan if (FLOAT_MODE_P (GET_MODE (X))) \ 2828117407Skan TOPLEVEL_COSTS_N_INSNS (ix86_cost->fabs); \ 2829117407Skan break; \ 2830117407Skan \ 2831117407Skan case SQRT: \ 2832117407Skan if (FLOAT_MODE_P (GET_MODE (X))) \ 2833117407Skan TOPLEVEL_COSTS_N_INSNS (ix86_cost->fsqrt); \ 2834117407Skan break; \ 2835117407Skan \ 283690285Sobrien egress_rtx_costs: \ 283790285Sobrien break; 283850654Sobrien 283950654Sobrien 284050654Sobrien/* An expression giving the cost of an addressing mode that contains 284150654Sobrien ADDRESS. If not defined, the cost is computed from the ADDRESS 284250654Sobrien expression and the `CONST_COSTS' values. 284350654Sobrien 284450654Sobrien For most CISC machines, the default cost is a good approximation 284550654Sobrien of the true cost of the addressing mode. However, on RISC 284650654Sobrien machines, all instructions normally have the same length and 284750654Sobrien execution time. Hence all addresses will have equal costs. 284850654Sobrien 284950654Sobrien In cases where more than one form of an address is known, the form 285050654Sobrien with the lowest cost will be used. If multiple forms have the 285150654Sobrien same, lowest, cost, the one that is the most complex will be used. 285250654Sobrien 285350654Sobrien For example, suppose an address that is equal to the sum of a 285450654Sobrien register and a constant is used twice in the same basic block. 285550654Sobrien When this macro is not defined, the address will be computed in a 285650654Sobrien register and memory references will be indirect through that 285750654Sobrien register. On machines where the cost of the addressing mode 285850654Sobrien containing the sum is no higher than that of a simple indirect 285950654Sobrien reference, this will produce an additional instruction and 286050654Sobrien possibly require an additional register. Proper specification of 286150654Sobrien this macro eliminates this overhead for such machines. 286250654Sobrien 286350654Sobrien Similar use of this macro is made in strength reduction of loops. 286450654Sobrien 286550654Sobrien ADDRESS need not be valid as an address. In such a case, the cost 286650654Sobrien is not relevant and can be any value; invalid addresses need not be 286750654Sobrien assigned a different cost. 286850654Sobrien 286950654Sobrien On machines where an address involving more than one register is as 287050654Sobrien cheap as an address computation involving only one register, 287150654Sobrien defining `ADDRESS_COST' to reflect this can cause two registers to 287250654Sobrien be live over a region of code where only one would have been if 287350654Sobrien `ADDRESS_COST' were not defined in that manner. This effect should 287450654Sobrien be considered in the definition of this macro. Equivalent costs 287550654Sobrien should probably only be given to addresses with different numbers 287650654Sobrien of registers on machines with lots of registers. 287750654Sobrien 287850654Sobrien This macro will normally either not be defined or be defined as a 287950654Sobrien constant. 288050654Sobrien 288118334Speter For i386, it is better to use a complex address than let gcc copy 288218334Speter the address into a reg and make a new pseudo. But not if the address 288318334Speter requires to two regs - that would mean more pseudos with longer 288418334Speter lifetimes. */ 288518334Speter 288618334Speter#define ADDRESS_COST(RTX) \ 288790285Sobrien ix86_address_cost (RTX) 288850654Sobrien 288990285Sobrien/* A C expression for the cost of moving data from a register in class FROM to 289090285Sobrien one in class TO. The classes are expressed using the enumeration values 289190285Sobrien such as `GENERAL_REGS'. A value of 2 is the default; other values are 289290285Sobrien interpreted relative to that. 289350654Sobrien 289490285Sobrien It is not required that the cost always equal 2 when FROM is the same as TO; 289590285Sobrien on some machines it is expensive to move between registers if they are not 289690285Sobrien general registers. */ 289750654Sobrien 289890285Sobrien#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ 289990285Sobrien ix86_register_move_cost ((MODE), (CLASS1), (CLASS2)) 290050654Sobrien 290150654Sobrien/* A C expression for the cost of moving data of mode M between a 290250654Sobrien register and memory. A value of 2 is the default; this cost is 290350654Sobrien relative to those in `REGISTER_MOVE_COST'. 290450654Sobrien 290550654Sobrien If moving between registers and memory is more expensive than 290650654Sobrien between two registers, you should define this macro to express the 290750654Sobrien relative cost. */ 290850654Sobrien 290990285Sobrien#define MEMORY_MOVE_COST(MODE, CLASS, IN) \ 291090285Sobrien ix86_memory_move_cost ((MODE), (CLASS), (IN)) 291150654Sobrien 291250654Sobrien/* A C expression for the cost of a branch instruction. A value of 1 291350654Sobrien is the default; other values are interpreted relative to that. */ 291450654Sobrien 291590285Sobrien#define BRANCH_COST ix86_branch_cost 291650654Sobrien 291750654Sobrien/* Define this macro as a C expression which is nonzero if accessing 291850654Sobrien less than a word of memory (i.e. a `char' or a `short') is no 291950654Sobrien faster than accessing a word of memory, i.e., if such access 292050654Sobrien require more than one instruction or if there is no difference in 292150654Sobrien cost between byte and (aligned) word loads. 292250654Sobrien 292350654Sobrien When this macro is not defined, the compiler will access a field by 292450654Sobrien finding the smallest containing object; when it is defined, a 292550654Sobrien fullword load will be used if alignment permits. Unless bytes 292650654Sobrien accesses are faster than word accesses, using word accesses is 292750654Sobrien preferable since it may eliminate subsequent memory access if 292850654Sobrien subsequent accesses occur to other fields in the same word of the 292950654Sobrien structure, but to different bytes. */ 293050654Sobrien 293150654Sobrien#define SLOW_BYTE_ACCESS 0 293250654Sobrien 293350654Sobrien/* Nonzero if access to memory by shorts is slow and undesirable. */ 293450654Sobrien#define SLOW_SHORT_ACCESS 0 293550654Sobrien 293650654Sobrien/* Define this macro to be the value 1 if unaligned accesses have a 293750654Sobrien cost many times greater than aligned accesses, for example if they 293850654Sobrien are emulated in a trap handler. 293950654Sobrien 2940117407Skan When this macro is nonzero, the compiler will act as if 2941117407Skan `STRICT_ALIGNMENT' were nonzero when generating code for block 294250654Sobrien moves. This can cause significantly more instructions to be 2943117407Skan produced. Therefore, do not set this macro nonzero if unaligned 294450654Sobrien accesses only add a cycle or two to the time for a memory access. 294550654Sobrien 294650654Sobrien If the value of this macro is always zero, it need not be defined. */ 294750654Sobrien 294890285Sobrien/* #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 0 */ 294950654Sobrien 295050654Sobrien/* Define this macro to inhibit strength reduction of memory 295150654Sobrien addresses. (On some machines, such strength reduction seems to do 295250654Sobrien harm rather than good.) */ 295350654Sobrien 295450654Sobrien/* #define DONT_REDUCE_ADDR */ 295550654Sobrien 295650654Sobrien/* Define this macro if it is as good or better to call a constant 295750654Sobrien function address than to call an address kept in a register. 295850654Sobrien 295950654Sobrien Desirable on the 386 because a CALL with a constant address is 296050654Sobrien faster than one with a register address. */ 296150654Sobrien 296250654Sobrien#define NO_FUNCTION_CSE 296350654Sobrien 296450654Sobrien/* Define this macro if it is as good or better for a function to call 296550654Sobrien itself with an explicit address than to call an address kept in a 296650654Sobrien register. */ 296750654Sobrien 296850654Sobrien#define NO_RECURSIVE_FUNCTION_CSE 296990285Sobrien 297018334Speter/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, 297118334Speter return the mode to be used for the comparison. 297218334Speter 297318334Speter For floating-point equality comparisons, CCFPEQmode should be used. 297490285Sobrien VOIDmode should be used in all other cases. 297518334Speter 297690285Sobrien For integer comparisons against zero, reduce to CCNOmode or CCZmode if 297790285Sobrien possible, to allow for more combinations. */ 297818334Speter 297990285Sobrien#define SELECT_CC_MODE(OP, X, Y) ix86_cc_mode ((OP), (X), (Y)) 298018334Speter 2981117407Skan/* Return nonzero if MODE implies a floating point inequality can be 298290285Sobrien reversed. */ 298318334Speter 298490285Sobrien#define REVERSIBLE_CC_MODE(MODE) 1 298518334Speter 298690285Sobrien/* A C expression whose value is reversed condition code of the CODE for 298790285Sobrien comparison done in CC_MODE mode. */ 298890285Sobrien#define REVERSE_CONDITION(CODE, MODE) \ 298990285Sobrien ((MODE) != CCFPmode && (MODE) != CCFPUmode ? reverse_condition (CODE) \ 299090285Sobrien : reverse_condition_maybe_unordered (CODE)) 299118334Speter 299218334Speter 299318334Speter/* Control the assembler format that we output, to the extent 299418334Speter this does not vary between assemblers. */ 299518334Speter 299618334Speter/* How to refer to registers in assembler output. 299790285Sobrien This sequence is indexed by compiler's hard-register-number (see above). */ 299818334Speter 299918334Speter/* In order to refer to the first 8 regs as 32 bit regs prefix an "e" 300018334Speter For non floating point regs, the following are the HImode names. 300118334Speter 300218334Speter For float regs, the stack top is sometimes referred to as "%st(0)" 300318334Speter instead of just "%st". PRINT_REG handles this with the "y" code. */ 300418334Speter 3005117407Skan#undef HI_REGISTER_NAMES 300690285Sobrien#define HI_REGISTER_NAMES \ 300790285Sobrien{"ax","dx","cx","bx","si","di","bp","sp", \ 300890285Sobrien "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","", \ 300990285Sobrien "flags","fpsr", "dirflag", "frame", \ 301090285Sobrien "xmm0","xmm1","xmm2","xmm3","xmm4","xmm5","xmm6","xmm7", \ 301190285Sobrien "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7" , \ 301290285Sobrien "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ 301390285Sobrien "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"} 301418334Speter 301518334Speter#define REGISTER_NAMES HI_REGISTER_NAMES 301618334Speter 301718334Speter/* Table of additional register names to use in user input. */ 301818334Speter 301918334Speter#define ADDITIONAL_REGISTER_NAMES \ 302050654Sobrien{ { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \ 302150654Sobrien { "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \ 302290285Sobrien { "rax", 0 }, { "rdx", 1 }, { "rcx", 2 }, { "rbx", 3 }, \ 302390285Sobrien { "rsi", 4 }, { "rdi", 5 }, { "rbp", 6 }, { "rsp", 7 }, \ 302450654Sobrien { "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 }, \ 302590285Sobrien { "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 }, \ 302690285Sobrien { "mm0", 8}, { "mm1", 9}, { "mm2", 10}, { "mm3", 11}, \ 302790285Sobrien { "mm4", 12}, { "mm5", 13}, { "mm6", 14}, { "mm7", 15} } 302818334Speter 302918334Speter/* Note we are omitting these since currently I don't know how 303018334Speterto get gcc to use these, since they want the same but different 303118334Speternumber as al, and ax. 303218334Speter*/ 303318334Speter 303418334Speter#define QI_REGISTER_NAMES \ 303590285Sobrien{"al", "dl", "cl", "bl", "sil", "dil", "bpl", "spl",} 303618334Speter 303718334Speter/* These parallel the array above, and can be used to access bits 8:15 303890285Sobrien of regs 0 through 3. */ 303918334Speter 304018334Speter#define QI_HIGH_REGISTER_NAMES \ 304118334Speter{"ah", "dh", "ch", "bh", } 304218334Speter 304318334Speter/* How to renumber registers for dbx and gdb. */ 304418334Speter 304590285Sobrien#define DBX_REGISTER_NUMBER(N) \ 304690285Sobrien (TARGET_64BIT ? dbx64_register_map[(N)] : dbx_register_map[(N)]) 304718334Speter 304890285Sobrienextern int const dbx_register_map[FIRST_PSEUDO_REGISTER]; 304990285Sobrienextern int const dbx64_register_map[FIRST_PSEUDO_REGISTER]; 305090285Sobrienextern int const svr4_dbx_register_map[FIRST_PSEUDO_REGISTER]; 305190285Sobrien 305250654Sobrien/* Before the prologue, RA is at 0(%esp). */ 305350654Sobrien#define INCOMING_RETURN_ADDR_RTX \ 305450654Sobrien gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM)) 3055117407Skan 305650654Sobrien/* After the prologue, RA is at -4(AP) in the current frame. */ 305790285Sobrien#define RETURN_ADDR_RTX(COUNT, FRAME) \ 305890285Sobrien ((COUNT) == 0 \ 305990285Sobrien ? gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -UNITS_PER_WORD)) \ 306090285Sobrien : gen_rtx_MEM (Pmode, plus_constant (FRAME, UNITS_PER_WORD))) 306150654Sobrien 306290285Sobrien/* PC is dbx register 8; let's use that column for RA. */ 306390285Sobrien#define DWARF_FRAME_RETURN_COLUMN (TARGET_64BIT ? 16 : 8) 306450654Sobrien 306550654Sobrien/* Before the prologue, the top of the frame is at 4(%esp). */ 306690285Sobrien#define INCOMING_FRAME_SP_OFFSET UNITS_PER_WORD 306750654Sobrien 306890285Sobrien/* Describe how we implement __builtin_eh_return. */ 306990285Sobrien#define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? (N) : INVALID_REGNUM) 307090285Sobrien#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 2) 307118334Speter 307218334Speter 307390285Sobrien/* Select a format to encode pointers in exception handling data. CODE 307490285Sobrien is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is 307590285Sobrien true if the symbol may be affected by dynamic relocations. 307618334Speter 307790285Sobrien ??? All x86 object file formats are capable of representing this. 307890285Sobrien After all, the relocation needed is the same as for the call insn. 307990285Sobrien Whether or not a particular assembler allows us to enter such, I 308090285Sobrien guess we'll have to see. */ 308190285Sobrien#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \ 308290285Sobrien (flag_pic \ 308390285Sobrien ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4\ 308490285Sobrien : DW_EH_PE_absptr) 308518334Speter 308618334Speter/* Store in OUTPUT a string (made with alloca) containing 308718334Speter an assembler-name for a local static variable named NAME. 308818334Speter LABELNO is an integer which is different for each call. */ 308918334Speter 309018334Speter#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 309118334Speter( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 309218334Speter sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 309318334Speter 309418334Speter/* This is how to output an insn to push a register on the stack. 309518334Speter It need not be very fast code. */ 309618334Speter 309790285Sobrien#define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \ 3098107598Sobriendo { \ 3099107598Sobrien if (TARGET_64BIT) \ 3100107598Sobrien asm_fprintf ((FILE), "\tpush{q}\t%%r%s\n", \ 3101107598Sobrien reg_names[(REGNO)] + (REX_INT_REGNO_P (REGNO) != 0)); \ 3102107598Sobrien else \ 3103107598Sobrien asm_fprintf ((FILE), "\tpush{l}\t%%e%s\n", reg_names[(REGNO)]); \ 3104107598Sobrien} while (0) 310518334Speter 310618334Speter/* This is how to output an insn to pop a register from the stack. 310718334Speter It need not be very fast code. */ 310818334Speter 310990285Sobrien#define ASM_OUTPUT_REG_POP(FILE, REGNO) \ 3110107598Sobriendo { \ 3111107598Sobrien if (TARGET_64BIT) \ 3112107598Sobrien asm_fprintf ((FILE), "\tpop{q}\t%%r%s\n", \ 3113107598Sobrien reg_names[(REGNO)] + (REX_INT_REGNO_P (REGNO) != 0)); \ 3114107598Sobrien else \ 3115107598Sobrien asm_fprintf ((FILE), "\tpop{l}\t%%e%s\n", reg_names[(REGNO)]); \ 3116107598Sobrien} while (0) 311718334Speter 311890285Sobrien/* This is how to output an element of a case-vector that is absolute. */ 311918334Speter 312018334Speter#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 312190285Sobrien ix86_output_addr_vec_elt ((FILE), (VALUE)) 312218334Speter 312390285Sobrien/* This is how to output an element of a case-vector that is relative. */ 312418334Speter 312550654Sobrien#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 312690285Sobrien ix86_output_addr_diff_elt ((FILE), (VALUE), (REL)) 312718334Speter 312890285Sobrien/* Under some conditions we need jump tables in the text section, because 312990285Sobrien the assembler cannot handle label differences between sections. */ 313018334Speter 313190285Sobrien#define JUMP_TABLES_IN_TEXT_SECTION \ 313290285Sobrien (!TARGET_64BIT && flag_pic && !HAVE_AS_GOTOFF_IN_DATA) 313318334Speter 3134117407Skan/* A C statement that outputs an address constant appropriate to 313590285Sobrien for DWARF debugging. */ 313690285Sobrien 313790285Sobrien#define ASM_OUTPUT_DWARF_ADDR_CONST(FILE, X) \ 313890285Sobrien i386_dwarf_output_addr_const ((FILE), (X)) 313990285Sobrien 314090285Sobrien/* Either simplify a location expression, or return the original. */ 314190285Sobrien 314290285Sobrien#define ASM_SIMPLIFY_DWARF_ADDR(X) \ 314390285Sobrien i386_simplify_dwarf_addr (X) 314490285Sobrien 3145117407Skan/* Emit a dtp-relative reference to a TLS variable. */ 3146117407Skan 3147117407Skan#ifdef HAVE_AS_TLS 3148117407Skan#define ASM_OUTPUT_DWARF_DTPREL(FILE, SIZE, X) \ 3149117407Skan i386_output_dwarf_dtprel (FILE, SIZE, X) 3150117407Skan#endif 3151117407Skan 315290285Sobrien/* Switch to init or fini section via SECTION_OP, emit a call to FUNC, 315390285Sobrien and switch back. For x86 we do this only to save a few bytes that 315490285Sobrien would otherwise be unused in the text section. */ 315590285Sobrien#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \ 315690285Sobrien asm (SECTION_OP "\n\t" \ 315790285Sobrien "call " USER_LABEL_PREFIX #FUNC "\n" \ 315890285Sobrien TEXT_SECTION_ASM_OP); 315918334Speter 316018334Speter/* Print operand X (an rtx) in assembler syntax to file FILE. 316118334Speter CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 316290285Sobrien Effect of various CODE letters is described in i386.c near 316390285Sobrien print_operand function. */ 316418334Speter 316590285Sobrien#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 3166117407Skan ((CODE) == '*' || (CODE) == '+' || (CODE) == '&') 316718334Speter 316818334Speter/* Print the name of a register based on its machine mode and number. 316918334Speter If CODE is 'w', pretend the mode is HImode. 317018334Speter If CODE is 'b', pretend the mode is QImode. 317118334Speter If CODE is 'k', pretend the mode is SImode. 317290285Sobrien If CODE is 'q', pretend the mode is DImode. 317318334Speter If CODE is 'h', pretend the reg is the `high' byte register. 317490285Sobrien If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */ 317518334Speter 317690285Sobrien#define PRINT_REG(X, CODE, FILE) \ 317790285Sobrien print_reg ((X), (CODE), (FILE)) 317818334Speter 317918334Speter#define PRINT_OPERAND(FILE, X, CODE) \ 318090285Sobrien print_operand ((FILE), (X), (CODE)) 318118334Speter 318218334Speter#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 318390285Sobrien print_operand_address ((FILE), (ADDR)) 318418334Speter 3185117407Skan#define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL) \ 3186117407Skando { \ 3187117407Skan if (! output_addr_const_extra (FILE, (X))) \ 3188117407Skan goto FAIL; \ 3189117407Skan} while (0); 3190117407Skan 319118334Speter/* Print the name of a register for based on its machine mode and number. 319218334Speter This macro is used to print debugging output. 319318334Speter This macro is different from PRINT_REG in that it may be used in 319418334Speter programs that are not linked with aux-output.o. */ 319518334Speter 319690285Sobrien#define DEBUG_PRINT_REG(X, CODE, FILE) \ 319790285Sobrien do { static const char * const hi_name[] = HI_REGISTER_NAMES; \ 319890285Sobrien static const char * const qi_name[] = QI_REGISTER_NAMES; \ 319990285Sobrien fprintf ((FILE), "%d ", REGNO (X)); \ 320090285Sobrien if (REGNO (X) == FLAGS_REG) \ 320190285Sobrien { fputs ("flags", (FILE)); break; } \ 320290285Sobrien if (REGNO (X) == DIRFLAG_REG) \ 320390285Sobrien { fputs ("dirflag", (FILE)); break; } \ 320490285Sobrien if (REGNO (X) == FPSR_REG) \ 320590285Sobrien { fputs ("fpsr", (FILE)); break; } \ 320618334Speter if (REGNO (X) == ARG_POINTER_REGNUM) \ 320790285Sobrien { fputs ("argp", (FILE)); break; } \ 320890285Sobrien if (REGNO (X) == FRAME_POINTER_REGNUM) \ 320990285Sobrien { fputs ("frame", (FILE)); break; } \ 321018334Speter if (STACK_TOP_P (X)) \ 321190285Sobrien { fputs ("st(0)", (FILE)); break; } \ 321218334Speter if (FP_REG_P (X)) \ 321390285Sobrien { fputs (hi_name[REGNO(X)], (FILE)); break; } \ 321490285Sobrien if (REX_INT_REG_P (X)) \ 321590285Sobrien { \ 321690285Sobrien switch (GET_MODE_SIZE (GET_MODE (X))) \ 321790285Sobrien { \ 321890285Sobrien default: \ 321990285Sobrien case 8: \ 322090285Sobrien fprintf ((FILE), "r%i", REGNO (X) \ 322190285Sobrien - FIRST_REX_INT_REG + 8); \ 322290285Sobrien break; \ 322390285Sobrien case 4: \ 322490285Sobrien fprintf ((FILE), "r%id", REGNO (X) \ 322590285Sobrien - FIRST_REX_INT_REG + 8); \ 322690285Sobrien break; \ 322790285Sobrien case 2: \ 322890285Sobrien fprintf ((FILE), "r%iw", REGNO (X) \ 322990285Sobrien - FIRST_REX_INT_REG + 8); \ 323090285Sobrien break; \ 323190285Sobrien case 1: \ 323290285Sobrien fprintf ((FILE), "r%ib", REGNO (X) \ 323390285Sobrien - FIRST_REX_INT_REG + 8); \ 323490285Sobrien break; \ 323590285Sobrien } \ 323690285Sobrien break; \ 323790285Sobrien } \ 323818334Speter switch (GET_MODE_SIZE (GET_MODE (X))) \ 323918334Speter { \ 324090285Sobrien case 8: \ 324190285Sobrien fputs ("r", (FILE)); \ 324290285Sobrien fputs (hi_name[REGNO (X)], (FILE)); \ 324390285Sobrien break; \ 324418334Speter default: \ 324590285Sobrien fputs ("e", (FILE)); \ 324618334Speter case 2: \ 324790285Sobrien fputs (hi_name[REGNO (X)], (FILE)); \ 324818334Speter break; \ 324918334Speter case 1: \ 325090285Sobrien fputs (qi_name[REGNO (X)], (FILE)); \ 325118334Speter break; \ 325218334Speter } \ 325318334Speter } while (0) 325418334Speter 325518334Speter/* a letter which is not needed by the normal asm syntax, which 325618334Speter we can use for operand syntax in the extended asm */ 325718334Speter 325818334Speter#define ASM_OPERAND_LETTER '#' 325918334Speter#define RET return "" 326090285Sobrien#define AT_SP(MODE) (gen_rtx_MEM ((MODE), stack_pointer_rtx)) 326118334Speter 326290285Sobrien/* Define the codes that are matched by predicates in i386.c. */ 326350654Sobrien 326490285Sobrien#define PREDICATE_CODES \ 326590285Sobrien {"x86_64_immediate_operand", {CONST_INT, SUBREG, REG, \ 326690285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 326790285Sobrien {"x86_64_nonmemory_operand", {CONST_INT, SUBREG, REG, \ 326890285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 326990285Sobrien {"x86_64_movabs_operand", {CONST_INT, SUBREG, REG, \ 327090285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 327190285Sobrien {"x86_64_szext_nonmemory_operand", {CONST_INT, SUBREG, REG, \ 327290285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 327390285Sobrien {"x86_64_general_operand", {CONST_INT, SUBREG, REG, MEM, \ 327490285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 327590285Sobrien {"x86_64_szext_general_operand", {CONST_INT, SUBREG, REG, MEM, \ 327690285Sobrien SYMBOL_REF, LABEL_REF, CONST}}, \ 327790285Sobrien {"x86_64_zext_immediate_operand", {CONST_INT, CONST_DOUBLE, CONST, \ 327890285Sobrien SYMBOL_REF, LABEL_REF}}, \ 327990285Sobrien {"shiftdi_operand", {SUBREG, REG, MEM}}, \ 328090285Sobrien {"const_int_1_operand", {CONST_INT}}, \ 3281102801Skan {"const_int_1_31_operand", {CONST_INT}}, \ 328290285Sobrien {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \ 328390285Sobrien {"aligned_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \ 328490285Sobrien LABEL_REF, SUBREG, REG, MEM}}, \ 328590285Sobrien {"pic_symbolic_operand", {CONST}}, \ 328690285Sobrien {"call_insn_operand", {REG, SUBREG, MEM, SYMBOL_REF}}, \ 328790285Sobrien {"constant_call_address_operand", {SYMBOL_REF, CONST}}, \ 328890285Sobrien {"const0_operand", {CONST_INT, CONST_DOUBLE}}, \ 328990285Sobrien {"const1_operand", {CONST_INT}}, \ 329090285Sobrien {"const248_operand", {CONST_INT}}, \ 329190285Sobrien {"incdec_operand", {CONST_INT}}, \ 329290285Sobrien {"mmx_reg_operand", {REG}}, \ 329390285Sobrien {"reg_no_sp_operand", {SUBREG, REG}}, \ 329490285Sobrien {"general_no_elim_operand", {CONST_INT, CONST_DOUBLE, CONST, \ 329590285Sobrien SYMBOL_REF, LABEL_REF, SUBREG, REG, MEM}}, \ 329690285Sobrien {"nonmemory_no_elim_operand", {CONST_INT, REG, SUBREG}}, \ 3297117407Skan {"index_register_operand", {SUBREG, REG}}, \ 329890285Sobrien {"q_regs_operand", {SUBREG, REG}}, \ 329990285Sobrien {"non_q_regs_operand", {SUBREG, REG}}, \ 330090285Sobrien {"fcmov_comparison_operator", {EQ, NE, LTU, GTU, LEU, GEU, UNORDERED, \ 330190285Sobrien ORDERED, LT, UNLT, GT, UNGT, LE, UNLE, \ 330290285Sobrien GE, UNGE, LTGT, UNEQ}}, \ 330390285Sobrien {"sse_comparison_operator", {EQ, LT, LE, UNORDERED, NE, UNGE, UNGT, \ 330490285Sobrien ORDERED, UNEQ, UNLT, UNLE, LTGT, GE, GT \ 330590285Sobrien }}, \ 330690285Sobrien {"ix86_comparison_operator", {EQ, NE, LE, LT, GE, GT, LEU, LTU, GEU, \ 330790285Sobrien GTU, UNORDERED, ORDERED, UNLE, UNLT, \ 330890285Sobrien UNGE, UNGT, LTGT, UNEQ }}, \ 330990285Sobrien {"cmp_fp_expander_operand", {CONST_DOUBLE, SUBREG, REG, MEM}}, \ 331090285Sobrien {"ext_register_operand", {SUBREG, REG}}, \ 331190285Sobrien {"binary_fp_operator", {PLUS, MINUS, MULT, DIV}}, \ 331290285Sobrien {"mult_operator", {MULT}}, \ 331390285Sobrien {"div_operator", {DIV}}, \ 331490285Sobrien {"arith_or_logical_operator", {PLUS, MULT, AND, IOR, XOR, SMIN, SMAX, \ 331590285Sobrien UMIN, UMAX, COMPARE, MINUS, DIV, MOD, \ 331690285Sobrien UDIV, UMOD, ASHIFT, ROTATE, ASHIFTRT, \ 331790285Sobrien LSHIFTRT, ROTATERT}}, \ 331890285Sobrien {"promotable_binary_operator", {PLUS, MULT, AND, IOR, XOR, ASHIFT}}, \ 331990285Sobrien {"memory_displacement_operand", {MEM}}, \ 332090285Sobrien {"cmpsi_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \ 332190285Sobrien LABEL_REF, SUBREG, REG, MEM, AND}}, \ 3322117407Skan {"long_memory_operand", {MEM}}, \ 3323117407Skan {"tls_symbolic_operand", {SYMBOL_REF}}, \ 3324117407Skan {"global_dynamic_symbolic_operand", {SYMBOL_REF}}, \ 3325117407Skan {"local_dynamic_symbolic_operand", {SYMBOL_REF}}, \ 3326117407Skan {"initial_exec_symbolic_operand", {SYMBOL_REF}}, \ 3327117407Skan {"local_exec_symbolic_operand", {SYMBOL_REF}}, \ 3328117407Skan {"any_fp_register_operand", {REG}}, \ 3329117407Skan {"register_and_not_any_fp_reg_operand", {REG}}, \ 3330117407Skan {"fp_register_operand", {REG}}, \ 3331117407Skan {"register_and_not_fp_reg_operand", {REG}}, \ 3332117407Skan {"vector_move_operand", {CONST_VECTOR, SUBREG, REG, MEM}}, \ 333350654Sobrien 333490285Sobrien/* A list of predicates that do special things with modes, and so 333590285Sobrien should not elicit warnings for VOIDmode match_operand. */ 333690285Sobrien 333790285Sobrien#define SPECIAL_MODE_PREDICATES \ 333890285Sobrien "ext_register_operand", 333950654Sobrien 3340117407Skan/* Which processor to schedule for. The cpu attribute defines a list that 3341117407Skan mirrors this list, so changes to i386.md must be made at the same time. */ 3342117407Skan 3343117407Skanenum processor_type 3344117407Skan{ 3345117407Skan PROCESSOR_I386, /* 80386 */ 3346117407Skan PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */ 3347117407Skan PROCESSOR_PENTIUM, 3348117407Skan PROCESSOR_PENTIUMPRO, 3349117407Skan PROCESSOR_K6, 3350117407Skan PROCESSOR_ATHLON, 3351117407Skan PROCESSOR_PENTIUM4, 3352117407Skan PROCESSOR_max 3353117407Skan}; 3354117407Skan 3355117407Skanextern enum processor_type ix86_cpu; 3356117407Skanextern const char *ix86_cpu_string; 3357117407Skan 3358117407Skanextern enum processor_type ix86_arch; 3359117407Skanextern const char *ix86_arch_string; 3360117407Skan 3361117407Skanenum fpmath_unit 3362117407Skan{ 3363117407Skan FPMATH_387 = 1, 3364117407Skan FPMATH_SSE = 2 3365117407Skan}; 3366117407Skan 3367117407Skanextern enum fpmath_unit ix86_fpmath; 3368117407Skanextern const char *ix86_fpmath_string; 3369117407Skan 3370117407Skanenum tls_dialect 3371117407Skan{ 3372117407Skan TLS_DIALECT_GNU, 3373117407Skan TLS_DIALECT_SUN 3374117407Skan}; 3375117407Skan 3376117407Skanextern enum tls_dialect ix86_tls_dialect; 3377117407Skanextern const char *ix86_tls_dialect_string; 3378117407Skan 337990285Sobrienenum cmodel { 3380117407Skan CM_32, /* The traditional 32-bit ABI. */ 3381117407Skan CM_SMALL, /* Assumes all code and data fits in the low 31 bits. */ 3382117407Skan CM_KERNEL, /* Assumes all code and data fits in the high 31 bits. */ 3383117407Skan CM_MEDIUM, /* Assumes code fits in the low 31 bits; data unlimited. */ 3384117407Skan CM_LARGE, /* No assumptions. */ 3385117407Skan CM_SMALL_PIC /* Assumes code+data+got/plt fits in a 31 bit region. */ 338690285Sobrien}; 338718334Speter 3388117407Skanextern enum cmodel ix86_cmodel; 3389117407Skanextern const char *ix86_cmodel_string; 3390117407Skan 339190285Sobrien/* Size of the RED_ZONE area. */ 339290285Sobrien#define RED_ZONE_SIZE 128 339390285Sobrien/* Reserved area of the red zone for temporaries. */ 339490285Sobrien#define RED_ZONE_RESERVE 8 339550654Sobrien 339690285Sobrienenum asm_dialect { 339790285Sobrien ASM_ATT, 339890285Sobrien ASM_INTEL 339990285Sobrien}; 3400117407Skan 340190285Sobrienextern const char *ix86_asm_string; 340290285Sobrienextern enum asm_dialect ix86_asm_dialect; 3403117407Skan 3404117407Skanextern int ix86_regparm; 3405117407Skanextern const char *ix86_regparm_string; 3406117407Skan 3407117407Skanextern int ix86_preferred_stack_boundary; 3408117407Skanextern const char *ix86_preferred_stack_boundary_string; 3409117407Skan 3410117407Skanextern int ix86_branch_cost; 3411117407Skanextern const char *ix86_branch_cost_string; 3412117407Skan 3413117407Skanextern const char *ix86_debug_arg_string; 3414117407Skanextern const char *ix86_debug_addr_string; 3415117407Skan 3416117407Skan/* Obsoleted by -f options. Remove before 3.2 ships. */ 3417117407Skanextern const char *ix86_align_loops_string; 3418117407Skanextern const char *ix86_align_jumps_string; 3419117407Skanextern const char *ix86_align_funcs_string; 3420117407Skan 3421117407Skan/* Smallest class containing REGNO. */ 3422117407Skanextern enum reg_class const regclass_map[FIRST_PSEUDO_REGISTER]; 3423117407Skan 342490285Sobrienextern rtx ix86_compare_op0; /* operand 0 for comparisons */ 342590285Sobrienextern rtx ix86_compare_op1; /* operand 1 for comparisons */ 342690285Sobrien 342790285Sobrien/* To properly truncate FP values into integers, we need to set i387 control 342890285Sobrien word. We can't emit proper mode switching code before reload, as spills 342990285Sobrien generated by reload may truncate values incorrectly, but we still can avoid 343090285Sobrien redundant computation of new control word by the mode switching pass. 343190285Sobrien The fldcw instructions are still emitted redundantly, but this is probably 343290285Sobrien not going to be noticeable problem, as most CPUs do have fast path for 3433117407Skan the sequence. 343418334Speter 343590285Sobrien The machinery is to emit simple truncation instructions and split them 343690285Sobrien before reload to instructions having USEs of two memory locations that 343790285Sobrien are filled by this code to old and new control word. 3438117407Skan 343990285Sobrien Post-reload pass may be later used to eliminate the redundant fildcw if 344090285Sobrien needed. */ 344118334Speter 344290285Sobrienenum fp_cw_mode {FP_CW_STORED, FP_CW_UNINITIALIZED, FP_CW_ANY}; 344350654Sobrien 344490285Sobrien/* Define this macro if the port needs extra instructions inserted 344590285Sobrien for mode switching in an optimizing compilation. */ 344690285Sobrien 344790285Sobrien#define OPTIMIZE_MODE_SWITCHING(ENTITY) 1 344890285Sobrien 344990285Sobrien/* If you define `OPTIMIZE_MODE_SWITCHING', you have to define this as 345090285Sobrien initializer for an array of integers. Each initializer element N 345190285Sobrien refers to an entity that needs mode switching, and specifies the 345290285Sobrien number of different modes that might need to be set for this 345390285Sobrien entity. The position of the initializer in the initializer - 345490285Sobrien starting counting at zero - determines the integer that is used to 345590285Sobrien refer to the mode-switched entity in question. */ 345690285Sobrien 345790285Sobrien#define NUM_MODES_FOR_MODE_SWITCHING { FP_CW_ANY } 345890285Sobrien 345990285Sobrien/* ENTITY is an integer specifying a mode-switched entity. If 346090285Sobrien `OPTIMIZE_MODE_SWITCHING' is defined, you must define this macro to 346190285Sobrien return an integer value not larger than the corresponding element 346290285Sobrien in `NUM_MODES_FOR_MODE_SWITCHING', to denote the mode that ENTITY 346390285Sobrien must be switched into prior to the execution of INSN. */ 346490285Sobrien 346590285Sobrien#define MODE_NEEDED(ENTITY, I) \ 346690285Sobrien (GET_CODE (I) == CALL_INSN \ 346790285Sobrien || (GET_CODE (I) == INSN && (asm_noperands (PATTERN (I)) >= 0 \ 346890285Sobrien || GET_CODE (PATTERN (I)) == ASM_INPUT))\ 346990285Sobrien ? FP_CW_UNINITIALIZED \ 347090285Sobrien : recog_memoized (I) < 0 || get_attr_type (I) != TYPE_FISTP \ 347190285Sobrien ? FP_CW_ANY \ 347290285Sobrien : FP_CW_STORED) 347390285Sobrien 347490285Sobrien/* This macro specifies the order in which modes for ENTITY are 347590285Sobrien processed. 0 is the highest priority. */ 347690285Sobrien 347790285Sobrien#define MODE_PRIORITY_TO_MODE(ENTITY, N) (N) 347890285Sobrien 347990285Sobrien/* Generate one or more insns to set ENTITY to MODE. HARD_REG_LIVE 348090285Sobrien is the set of hard registers live at the point where the insn(s) 348190285Sobrien are to be inserted. */ 348290285Sobrien 348390285Sobrien#define EMIT_MODE_SET(ENTITY, MODE, HARD_REGS_LIVE) \ 348490285Sobrien ((MODE) == FP_CW_STORED \ 348590285Sobrien ? emit_i387_cw_initialization (assign_386_stack_local (HImode, 1), \ 348690285Sobrien assign_386_stack_local (HImode, 2)), 0\ 348790285Sobrien : 0) 348818334Speter 348990285Sobrien/* Avoid renaming of stack registers, as doing so in combination with 349090285Sobrien scheduling just increases amount of live registers at time and in 349190285Sobrien the turn amount of fxch instructions needed. 349290285Sobrien 349390285Sobrien ??? Maybe Pentium chips benefits from renaming, someone can try... */ 349490285Sobrien 349590285Sobrien#define HARD_REGNO_RENAME_OK(SRC, TARGET) \ 349690285Sobrien ((SRC) < FIRST_STACK_REG || (SRC) > LAST_STACK_REG) 349790285Sobrien 349890285Sobrien 3499117407Skan#define MACHINE_DEPENDENT_REORG(X) x86_machine_dependent_reorg(X) 3500117407Skan 3501117407Skan#define DLL_IMPORT_EXPORT_PREFIX '@' 3502117407Skan 350318334Speter/* 350418334SpeterLocal variables: 350518334Speterversion-control: t 350618334SpeterEnd: 350718334Speter*/ 3508