1132744Skan/* Definitions of target machine for GCC for IA-32. 290285Sobrien Copyright (C) 1988, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 3169706Skan 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. 418334Speter 5132744SkanThis file is part of GCC. 618334Speter 7132744SkanGCC is free software; you can redistribute it and/or modify 818334Speterit under the terms of the GNU General Public License as published by 918334Speterthe Free Software Foundation; either version 2, or (at your option) 1018334Speterany later version. 1118334Speter 12132744SkanGCC is distributed in the hope that it will be useful, 1318334Speterbut WITHOUT ANY WARRANTY; without even the implied warranty of 1418334SpeterMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1518334SpeterGNU General Public License for more details. 1618334Speter 1718334SpeterYou should have received a copy of the GNU General Public License 18132744Skanalong with GCC; see the file COPYING. If not, write to 19169706Skanthe Free Software Foundation, 51 Franklin Street, Fifth Floor, 20169706SkanBoston, MA 02110-1301, USA. */ 2118334Speter 2218334Speter/* The purpose of this file is to define the characteristics of the i386, 2318334Speter independent of assembler syntax or operating system. 2418334Speter 2518334Speter Three other files build on this one to describe a specific assembler syntax: 2618334Speter bsd386.h, att386.h, and sun386.h. 2718334Speter 2818334Speter The actual tm.h file for a particular system should include 2918334Speter this file, and then the file for the appropriate assembler syntax. 3018334Speter 3118334Speter Many macros that specify assembler syntax are omitted entirely from 3218334Speter this file because they really belong in the files for particular 3390285Sobrien assemblers. These include RP, IP, LPREFIX, PUT_OP_SIZE, USE_STAR, 3490285Sobrien ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE, PRINT_B_I_S, and many 3590285Sobrien that start with ASM_ or end in ASM_OP. */ 3618334Speter 3750654Sobrien/* Define the specific costs for a given cpu */ 3850654Sobrien 3950654Sobrienstruct processor_costs { 4090285Sobrien const int add; /* cost of an add instruction */ 4190285Sobrien const int lea; /* cost of a lea instruction */ 4290285Sobrien const int shift_var; /* variable shift costs */ 4390285Sobrien const int shift_const; /* constant shift costs */ 44169706Skan const int mult_init[5]; /* cost of starting a multiply 45132744Skan in QImode, HImode, SImode, DImode, TImode*/ 4690285Sobrien const int mult_bit; /* cost of multiply per each bit set */ 47169706Skan const int divide[5]; /* cost of a divide/mod 48132744Skan in QImode, HImode, SImode, DImode, TImode*/ 4990285Sobrien int movsx; /* The cost of movsx operation. */ 5090285Sobrien int movzx; /* The cost of movzx operation. */ 5190285Sobrien const int large_insn; /* insns larger than this cost more */ 5290285Sobrien const int move_ratio; /* The threshold of number of scalar 5390285Sobrien memory-to-memory move insns. */ 5490285Sobrien const int movzbl_load; /* cost of loading using movzbl */ 5590285Sobrien const int int_load[3]; /* cost of loading integer registers 5690285Sobrien in QImode, HImode and SImode relative 5790285Sobrien to reg-reg move (2). */ 5890285Sobrien const int int_store[3]; /* cost of storing integer register 5990285Sobrien in QImode, HImode and SImode */ 6090285Sobrien const int fp_move; /* cost of reg,reg fld/fst */ 6190285Sobrien const int fp_load[3]; /* cost of loading FP register 6290285Sobrien in SFmode, DFmode and XFmode */ 6390285Sobrien const int fp_store[3]; /* cost of storing FP register 6490285Sobrien in SFmode, DFmode and XFmode */ 6590285Sobrien const int mmx_move; /* cost of moving MMX register. */ 6690285Sobrien const int mmx_load[2]; /* cost of loading MMX register 6790285Sobrien in SImode and DImode */ 6890285Sobrien const int mmx_store[2]; /* cost of storing MMX register 6990285Sobrien in SImode and DImode */ 7090285Sobrien const int sse_move; /* cost of moving SSE register. */ 7190285Sobrien const int sse_load[3]; /* cost of loading SSE register 7290285Sobrien in SImode, DImode and TImode*/ 7390285Sobrien const int sse_store[3]; /* cost of storing SSE register 7490285Sobrien in SImode, DImode and TImode*/ 7590285Sobrien const int mmxsse_to_integer; /* cost of moving mmxsse register to 7690285Sobrien integer and vice versa. */ 7790285Sobrien const int prefetch_block; /* bytes moved to cache for prefetch. */ 7890285Sobrien const int simultaneous_prefetches; /* number of parallel prefetch 7990285Sobrien operations. */ 80132744Skan const int branch_cost; /* Default value for BRANCH_COST. */ 81117407Skan const int fadd; /* cost of FADD and FSUB instructions. */ 82117407Skan const int fmul; /* cost of FMUL instruction. */ 83117407Skan const int fdiv; /* cost of FDIV instruction. */ 84117407Skan const int fabs; /* cost of FABS instruction. */ 85117407Skan const int fchs; /* cost of FCHS instruction. */ 86117407Skan const int fsqrt; /* cost of FSQRT instruction. */ 8750654Sobrien}; 8850654Sobrien 8990285Sobrienextern const struct processor_costs *ix86_cost; 9050654Sobrien 9118334Speter/* Macros used in the machine description to test the flags. */ 9218334Speter 9318334Speter/* configure can arrange to make this 2, to force a 486. */ 9490285Sobrien 9518334Speter#ifndef TARGET_CPU_DEFAULT 96169706Skan#define TARGET_CPU_DEFAULT TARGET_CPU_DEFAULT_generic 9718334Speter#endif 98169706Skan 99169706Skan#ifndef TARGET_FPMATH_DEFAULT 100169706Skan#define TARGET_FPMATH_DEFAULT \ 101169706Skan (TARGET_64BIT && TARGET_SSE ? FPMATH_SSE : FPMATH_387) 102132744Skan#endif 10318334Speter 104169706Skan#define TARGET_FLOAT_RETURNS_IN_80387 TARGET_FLOAT_RETURNS 105117407Skan 106117407Skan/* 64bit Sledgehammer mode. For libgcc2 we make sure this is a 107117407Skan compile-time constant. */ 108117407Skan#ifdef IN_LIBGCC2 109169706Skan#undef TARGET_64BIT 110117407Skan#ifdef __x86_64__ 111117407Skan#define TARGET_64BIT 1 112117407Skan#else 113117407Skan#define TARGET_64BIT 0 114117407Skan#endif 115117407Skan#else 116169706Skan#ifndef TARGET_BI_ARCH 117169706Skan#undef TARGET_64BIT 118117407Skan#if TARGET_64BIT_DEFAULT 11990285Sobrien#define TARGET_64BIT 1 12090285Sobrien#else 12190285Sobrien#define TARGET_64BIT 0 12290285Sobrien#endif 12390285Sobrien#endif 124117407Skan#endif 12518334Speter 126169706Skan#define HAS_LONG_COND_BRANCH 1 127169706Skan#define HAS_LONG_UNCOND_BRANCH 1 12852295Sobrien 129132744Skan#define TARGET_386 (ix86_tune == PROCESSOR_I386) 130132744Skan#define TARGET_486 (ix86_tune == PROCESSOR_I486) 131132744Skan#define TARGET_PENTIUM (ix86_tune == PROCESSOR_PENTIUM) 132132744Skan#define TARGET_PENTIUMPRO (ix86_tune == PROCESSOR_PENTIUMPRO) 133219374Smm#define TARGET_GEODE (ix86_tune == PROCESSOR_GEODE) 134132744Skan#define TARGET_K6 (ix86_tune == PROCESSOR_K6) 135132744Skan#define TARGET_ATHLON (ix86_tune == PROCESSOR_ATHLON) 136132744Skan#define TARGET_PENTIUM4 (ix86_tune == PROCESSOR_PENTIUM4) 137132744Skan#define TARGET_K8 (ix86_tune == PROCESSOR_K8) 138132744Skan#define TARGET_ATHLON_K8 (TARGET_K8 || TARGET_ATHLON) 139169706Skan#define TARGET_NOCONA (ix86_tune == PROCESSOR_NOCONA) 140219374Smm#define TARGET_CORE2 (ix86_tune == PROCESSOR_CORE2) 141169706Skan#define TARGET_GENERIC32 (ix86_tune == PROCESSOR_GENERIC32) 142169706Skan#define TARGET_GENERIC64 (ix86_tune == PROCESSOR_GENERIC64) 143169706Skan#define TARGET_GENERIC (TARGET_GENERIC32 || TARGET_GENERIC64) 144251212Spfg#define TARGET_AMDFAM10 (ix86_tune == PROCESSOR_AMDFAM10) 145132744Skan 146132744Skan#define TUNEMASK (1 << ix86_tune) 14752295Sobrienextern const int x86_use_leave, x86_push_memory, x86_zero_extend_with_and; 14852295Sobrienextern const int x86_use_bit_test, x86_cmove, x86_deep_branch; 14990285Sobrienextern const int x86_branch_hints, x86_unroll_strlen; 15090285Sobrienextern const int x86_double_with_add, x86_partial_reg_stall, x86_movx; 151169706Skanextern const int x86_use_himode_fiop, x86_use_simode_fiop; 152169706Skanextern const int x86_use_mov0, x86_use_cltd, x86_read_modify_write; 15390285Sobrienextern const int x86_read_modify, x86_split_long_moves; 154117407Skanextern const int x86_promote_QImode, x86_single_stringop, x86_fast_prefix; 15590285Sobrienextern const int x86_himode_math, x86_qimode_math, x86_promote_qi_regs; 15690285Sobrienextern const int x86_promote_hi_regs, x86_integer_DFmode_moves; 15790285Sobrienextern const int x86_add_esp_4, x86_add_esp_8, x86_sub_esp_4, x86_sub_esp_8; 15890285Sobrienextern const int x86_partial_reg_dependency, x86_memory_mismatch_stall; 15990285Sobrienextern const int x86_accumulate_outgoing_args, x86_prologue_using_move; 16090285Sobrienextern const int x86_epilogue_using_move, x86_decompose_lea; 161117407Skanextern const int x86_arch_always_fancy_math_387, x86_shift1; 162169706Skanextern const int x86_sse_partial_reg_dependency, x86_sse_split_regs; 163251212Spfgextern const int x86_sse_unaligned_move_optimal; 164132744Skanextern const int x86_sse_typeless_stores, x86_sse_load0_by_pxor; 165169706Skanextern const int x86_use_ffreep; 166169706Skanextern const int x86_inter_unit_moves, x86_schedule; 167169706Skanextern const int x86_use_bt; 168251212Spfgextern const int x86_cmpxchg, x86_cmpxchg8b, x86_xadd; 169169706Skanextern const int x86_use_incdec; 170169706Skanextern const int x86_pad_returns; 171258428Spfgextern const int x86_bswap; 172169706Skanextern const int x86_partial_flag_reg_stall; 173251212Spfgextern int x86_prefetch_sse, x86_cmpxchg16b; 17452295Sobrien 175132744Skan#define TARGET_USE_LEAVE (x86_use_leave & TUNEMASK) 176132744Skan#define TARGET_PUSH_MEMORY (x86_push_memory & TUNEMASK) 177132744Skan#define TARGET_ZERO_EXTEND_WITH_AND (x86_zero_extend_with_and & TUNEMASK) 178132744Skan#define TARGET_USE_BIT_TEST (x86_use_bit_test & TUNEMASK) 179132744Skan#define TARGET_UNROLL_STRLEN (x86_unroll_strlen & TUNEMASK) 18090285Sobrien/* For sane SSE instruction set generation we need fcomi instruction. It is 18190285Sobrien safe to enable all CMOVE instructions. */ 18290285Sobrien#define TARGET_CMOVE ((x86_cmove & (1 << ix86_arch)) || TARGET_SSE) 183169706Skan#define TARGET_FISTTP (TARGET_SSE3 && TARGET_80387) 184132744Skan#define TARGET_DEEP_BRANCH_PREDICTION (x86_deep_branch & TUNEMASK) 185132744Skan#define TARGET_BRANCH_PREDICTION_HINTS (x86_branch_hints & TUNEMASK) 186132744Skan#define TARGET_DOUBLE_WITH_ADD (x86_double_with_add & TUNEMASK) 187132744Skan#define TARGET_USE_SAHF ((x86_use_sahf & TUNEMASK) && !TARGET_64BIT) 188132744Skan#define TARGET_MOVX (x86_movx & TUNEMASK) 189132744Skan#define TARGET_PARTIAL_REG_STALL (x86_partial_reg_stall & TUNEMASK) 190169706Skan#define TARGET_PARTIAL_FLAG_REG_STALL (x86_partial_flag_reg_stall & TUNEMASK) 191169706Skan#define TARGET_USE_HIMODE_FIOP (x86_use_himode_fiop & TUNEMASK) 192169706Skan#define TARGET_USE_SIMODE_FIOP (x86_use_simode_fiop & TUNEMASK) 193132744Skan#define TARGET_USE_MOV0 (x86_use_mov0 & TUNEMASK) 194132744Skan#define TARGET_USE_CLTD (x86_use_cltd & TUNEMASK) 195132744Skan#define TARGET_SPLIT_LONG_MOVES (x86_split_long_moves & TUNEMASK) 196132744Skan#define TARGET_READ_MODIFY_WRITE (x86_read_modify_write & TUNEMASK) 197132744Skan#define TARGET_READ_MODIFY (x86_read_modify & TUNEMASK) 198132744Skan#define TARGET_PROMOTE_QImode (x86_promote_QImode & TUNEMASK) 199132744Skan#define TARGET_FAST_PREFIX (x86_fast_prefix & TUNEMASK) 200132744Skan#define TARGET_SINGLE_STRINGOP (x86_single_stringop & TUNEMASK) 201132744Skan#define TARGET_QIMODE_MATH (x86_qimode_math & TUNEMASK) 202132744Skan#define TARGET_HIMODE_MATH (x86_himode_math & TUNEMASK) 203132744Skan#define TARGET_PROMOTE_QI_REGS (x86_promote_qi_regs & TUNEMASK) 204132744Skan#define TARGET_PROMOTE_HI_REGS (x86_promote_hi_regs & TUNEMASK) 205132744Skan#define TARGET_ADD_ESP_4 (x86_add_esp_4 & TUNEMASK) 206132744Skan#define TARGET_ADD_ESP_8 (x86_add_esp_8 & TUNEMASK) 207132744Skan#define TARGET_SUB_ESP_4 (x86_sub_esp_4 & TUNEMASK) 208132744Skan#define TARGET_SUB_ESP_8 (x86_sub_esp_8 & TUNEMASK) 209132744Skan#define TARGET_INTEGER_DFMODE_MOVES (x86_integer_DFmode_moves & TUNEMASK) 210132744Skan#define TARGET_PARTIAL_REG_DEPENDENCY (x86_partial_reg_dependency & TUNEMASK) 211132744Skan#define TARGET_SSE_PARTIAL_REG_DEPENDENCY \ 212132744Skan (x86_sse_partial_reg_dependency & TUNEMASK) 213251212Spfg#define TARGET_SSE_UNALIGNED_MOVE_OPTIMAL \ 214251212Spfg (x86_sse_unaligned_move_optimal & TUNEMASK) 215169706Skan#define TARGET_SSE_SPLIT_REGS (x86_sse_split_regs & TUNEMASK) 216132744Skan#define TARGET_SSE_TYPELESS_STORES (x86_sse_typeless_stores & TUNEMASK) 217132744Skan#define TARGET_SSE_LOAD0_BY_PXOR (x86_sse_load0_by_pxor & TUNEMASK) 218132744Skan#define TARGET_MEMORY_MISMATCH_STALL (x86_memory_mismatch_stall & TUNEMASK) 219132744Skan#define TARGET_PROLOGUE_USING_MOVE (x86_prologue_using_move & TUNEMASK) 220132744Skan#define TARGET_EPILOGUE_USING_MOVE (x86_epilogue_using_move & TUNEMASK) 22190285Sobrien#define TARGET_PREFETCH_SSE (x86_prefetch_sse) 222132744Skan#define TARGET_SHIFT1 (x86_shift1 & TUNEMASK) 223132744Skan#define TARGET_USE_FFREEP (x86_use_ffreep & TUNEMASK) 224132744Skan#define TARGET_REP_MOVL_OPTIMAL (x86_rep_movl_optimal & TUNEMASK) 225132744Skan#define TARGET_INTER_UNIT_MOVES (x86_inter_unit_moves & TUNEMASK) 226169706Skan#define TARGET_FOUR_JUMP_LIMIT (x86_four_jump_limit & TUNEMASK) 227169706Skan#define TARGET_SCHEDULE (x86_schedule & TUNEMASK) 228169706Skan#define TARGET_USE_BT (x86_use_bt & TUNEMASK) 229169706Skan#define TARGET_USE_INCDEC (x86_use_incdec & TUNEMASK) 230169706Skan#define TARGET_PAD_RETURNS (x86_pad_returns & TUNEMASK) 23152295Sobrien 23290285Sobrien#define ASSEMBLER_DIALECT (ix86_asm_dialect) 23390285Sobrien 23490285Sobrien#define TARGET_SSE_MATH ((ix86_fpmath & FPMATH_SSE) != 0) 23590285Sobrien#define TARGET_MIX_SSE_I387 ((ix86_fpmath & FPMATH_SSE) \ 23690285Sobrien && (ix86_fpmath & FPMATH_387)) 23790285Sobrien 238117407Skan#define TARGET_GNU_TLS (ix86_tls_dialect == TLS_DIALECT_GNU) 239169706Skan#define TARGET_GNU2_TLS (ix86_tls_dialect == TLS_DIALECT_GNU2) 240169706Skan#define TARGET_ANY_GNU_TLS (TARGET_GNU_TLS || TARGET_GNU2_TLS) 241117407Skan#define TARGET_SUN_TLS (ix86_tls_dialect == TLS_DIALECT_SUN) 242117407Skan 243169706Skan#define TARGET_CMPXCHG (x86_cmpxchg & (1 << ix86_arch)) 244169706Skan#define TARGET_CMPXCHG8B (x86_cmpxchg8b & (1 << ix86_arch)) 245251212Spfg#define TARGET_CMPXCHG16B (x86_cmpxchg16b) 246169706Skan#define TARGET_XADD (x86_xadd & (1 << ix86_arch)) 247258428Spfg#define TARGET_BSWAP (x86_bswap & (1 << ix86_arch)) 24896294Sobrien 249117407Skan#ifndef TARGET_64BIT_DEFAULT 250117407Skan#define TARGET_64BIT_DEFAULT 0 25190285Sobrien#endif 252132744Skan#ifndef TARGET_TLS_DIRECT_SEG_REFS_DEFAULT 253132744Skan#define TARGET_TLS_DIRECT_SEG_REFS_DEFAULT 0 254132744Skan#endif 25590285Sobrien 256117407Skan/* Once GDB has been enhanced to deal with functions without frame 257117407Skan pointers, we can change this to allow for elimination of 258117407Skan the frame pointer in leaf functions. */ 259117407Skan#define TARGET_DEFAULT 0 26050654Sobrien 261117407Skan/* This is not really a target flag, but is done this way so that 262117407Skan it's analogous to similar code for Mach-O on PowerPC. darwin.h 263117407Skan redefines this to 1. */ 264117407Skan#define TARGET_MACHO 0 26550654Sobrien 266146908Skan/* Subtargets may reset this to 1 in order to enable 96-bit long double 267146908Skan with the rounding mode forced to 53 bits. */ 268146908Skan#define TARGET_96_ROUND_53_LONG_DOUBLE 0 269146908Skan 27018334Speter/* Sometimes certain combinations of command options do not make 27118334Speter sense on a particular target machine. You can define a macro 27218334Speter `OVERRIDE_OPTIONS' to take account of this. This macro, if 27318334Speter defined, is executed once just after all the command options have 27418334Speter been parsed. 27518334Speter 27618334Speter Don't use this macro to turn on various extra optimizations for 27718334Speter `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */ 27818334Speter 27918334Speter#define OVERRIDE_OPTIONS override_options () 28018334Speter 28150654Sobrien/* Define this to change the optimizations performed by default. */ 28290285Sobrien#define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \ 28390285Sobrien optimization_options ((LEVEL), (SIZE)) 28450654Sobrien 285169706Skan/* -march=native handling only makes sense with compiler running on 286169706Skan an x86 or x86_64 chip. If changing this condition, also change 287169706Skan the condition in driver-i386.c. */ 288169706Skan#if defined(__i386__) || defined(__x86_64__) 289169706Skan/* In driver-i386.c. */ 290169706Skanextern const char *host_detect_local_cpu (int argc, const char **argv); 291169706Skan#define EXTRA_SPEC_FUNCTIONS \ 292169706Skan { "local_cpu_detect", host_detect_local_cpu }, 293169706Skan#define HAVE_LOCAL_CPU_DETECT 294169706Skan#endif 295169706Skan 296169706Skan/* Support for configure-time defaults of some command line options. 297169706Skan The order here is important so that -march doesn't squash the 298169706Skan tune or cpu values. */ 299132744Skan#define OPTION_DEFAULT_SPECS \ 300132744Skan {"tune", "%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}" }, \ 301169706Skan {"cpu", "%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}" }, \ 302169706Skan {"arch", "%{!march=*:-march=%(VALUE)}"} 303132744Skan 30450654Sobrien/* Specs for the compiler proper */ 30550654Sobrien 30650654Sobrien#ifndef CC1_CPU_SPEC 307169706Skan#define CC1_CPU_SPEC_1 "\ 308132744Skan%{!mtune*: \ 309132744Skan%{m386:mtune=i386 \ 310132744Skan%n`-m386' is deprecated. Use `-march=i386' or `-mtune=i386' instead.\n} \ 311132744Skan%{m486:-mtune=i486 \ 312132744Skan%n`-m486' is deprecated. Use `-march=i486' or `-mtune=i486' instead.\n} \ 313132744Skan%{mpentium:-mtune=pentium \ 314132744Skan%n`-mpentium' is deprecated. Use `-march=pentium' or `-mtune=pentium' instead.\n} \ 315132744Skan%{mpentiumpro:-mtune=pentiumpro \ 316132744Skan%n`-mpentiumpro' is deprecated. Use `-march=pentiumpro' or `-mtune=pentiumpro' instead.\n} \ 317132744Skan%{mcpu=*:-mtune=%* \ 318132744Skan%n`-mcpu=' is deprecated. Use `-mtune=' or '-march=' instead.\n}} \ 319132744Skan%<mcpu=* \ 32090285Sobrien%{mintel-syntax:-masm=intel \ 32190285Sobrien%n`-mintel-syntax' is deprecated. Use `-masm=intel' instead.\n} \ 32290285Sobrien%{mno-intel-syntax:-masm=att \ 32390285Sobrien%n`-mno-intel-syntax' is deprecated. Use `-masm=att' instead.\n}" 324169706Skan 325169706Skan#ifndef HAVE_LOCAL_CPU_DETECT 326169706Skan#define CC1_CPU_SPEC CC1_CPU_SPEC_1 327169706Skan#else 328169706Skan#define CC1_CPU_SPEC CC1_CPU_SPEC_1 \ 329169706Skan"%{march=native:%<march=native %:local_cpu_detect(arch) \ 330169706Skan %{!mtune=*:%<mtune=native %:local_cpu_detect(tune)}} \ 331169706Skan%{mtune=native:%<mtune=native %:local_cpu_detect(tune)}" 33250654Sobrien#endif 333169706Skan#endif 33418334Speter 335117407Skan/* Target CPU builtins. */ 336117407Skan#define TARGET_CPU_CPP_BUILTINS() \ 337117407Skan do \ 338117407Skan { \ 339117407Skan size_t arch_len = strlen (ix86_arch_string); \ 340132744Skan size_t tune_len = strlen (ix86_tune_string); \ 341117407Skan int last_arch_char = ix86_arch_string[arch_len - 1]; \ 342132744Skan int last_tune_char = ix86_tune_string[tune_len - 1]; \ 343117407Skan \ 344117407Skan if (TARGET_64BIT) \ 345117407Skan { \ 346117407Skan builtin_assert ("cpu=x86_64"); \ 347132744Skan builtin_assert ("machine=x86_64"); \ 348132744Skan builtin_define ("__amd64"); \ 349132744Skan builtin_define ("__amd64__"); \ 350117407Skan builtin_define ("__x86_64"); \ 351117407Skan builtin_define ("__x86_64__"); \ 352117407Skan } \ 353117407Skan else \ 354117407Skan { \ 355117407Skan builtin_assert ("cpu=i386"); \ 356117407Skan builtin_assert ("machine=i386"); \ 357117407Skan builtin_define_std ("i386"); \ 358117407Skan } \ 359117407Skan \ 360132744Skan /* Built-ins based on -mtune= (or -march= if no \ 361132744Skan -mtune= given). */ \ 362117407Skan if (TARGET_386) \ 363117407Skan builtin_define ("__tune_i386__"); \ 364117407Skan else if (TARGET_486) \ 365117407Skan builtin_define ("__tune_i486__"); \ 366117407Skan else if (TARGET_PENTIUM) \ 367117407Skan { \ 368117407Skan builtin_define ("__tune_i586__"); \ 369117407Skan builtin_define ("__tune_pentium__"); \ 370132744Skan if (last_tune_char == 'x') \ 371117407Skan builtin_define ("__tune_pentium_mmx__"); \ 372117407Skan } \ 373117407Skan else if (TARGET_PENTIUMPRO) \ 374117407Skan { \ 375117407Skan builtin_define ("__tune_i686__"); \ 376117407Skan builtin_define ("__tune_pentiumpro__"); \ 377132744Skan switch (last_tune_char) \ 378117407Skan { \ 379117407Skan case '3': \ 380117407Skan builtin_define ("__tune_pentium3__"); \ 381117407Skan /* FALLTHRU */ \ 382117407Skan case '2': \ 383117407Skan builtin_define ("__tune_pentium2__"); \ 384117407Skan break; \ 385117407Skan } \ 386117407Skan } \ 387219374Smm else if (TARGET_GEODE) \ 388219374Smm { \ 389219374Smm builtin_define ("__tune_geode__"); \ 390219374Smm } \ 391117407Skan else if (TARGET_K6) \ 392117407Skan { \ 393117407Skan builtin_define ("__tune_k6__"); \ 394132744Skan if (last_tune_char == '2') \ 395117407Skan builtin_define ("__tune_k6_2__"); \ 396132744Skan else if (last_tune_char == '3') \ 397117407Skan builtin_define ("__tune_k6_3__"); \ 398117407Skan } \ 399117407Skan else if (TARGET_ATHLON) \ 400117407Skan { \ 401117407Skan builtin_define ("__tune_athlon__"); \ 402148163Sobrien /* Plain "athlon" & "athlon-tbird" lacks SSE. */ \ 403148163Sobrien if (last_tune_char != 'n' && last_tune_char != 'd') \ 404117407Skan builtin_define ("__tune_athlon_sse__"); \ 405117407Skan } \ 406132744Skan else if (TARGET_K8) \ 407132744Skan builtin_define ("__tune_k8__"); \ 408251212Spfg else if (TARGET_AMDFAM10) \ 409251212Spfg builtin_define ("__tune_amdfam10__"); \ 410117407Skan else if (TARGET_PENTIUM4) \ 411117407Skan builtin_define ("__tune_pentium4__"); \ 412169706Skan else if (TARGET_NOCONA) \ 413169706Skan builtin_define ("__tune_nocona__"); \ 414219374Smm else if (TARGET_CORE2) \ 415219374Smm builtin_define ("__tune_core2__"); \ 416117407Skan \ 417117407Skan if (TARGET_MMX) \ 418117407Skan builtin_define ("__MMX__"); \ 419117407Skan if (TARGET_3DNOW) \ 420117407Skan builtin_define ("__3dNOW__"); \ 421117407Skan if (TARGET_3DNOW_A) \ 422117407Skan builtin_define ("__3dNOW_A__"); \ 423117407Skan if (TARGET_SSE) \ 424117407Skan builtin_define ("__SSE__"); \ 425117407Skan if (TARGET_SSE2) \ 426117407Skan builtin_define ("__SSE2__"); \ 427132744Skan if (TARGET_SSE3) \ 428169706Skan builtin_define ("__SSE3__"); \ 429219639Smm if (TARGET_SSSE3) \ 430219639Smm builtin_define ("__SSSE3__"); \ 431251212Spfg if (TARGET_SSE4A) \ 432251212Spfg builtin_define ("__SSE4A__"); \ 433255185Sjmg if (TARGET_AES) \ 434255185Sjmg builtin_define ("__AES__"); \ 435117407Skan if (TARGET_SSE_MATH && TARGET_SSE) \ 436117407Skan builtin_define ("__SSE_MATH__"); \ 437117407Skan if (TARGET_SSE_MATH && TARGET_SSE2) \ 438117407Skan builtin_define ("__SSE2_MATH__"); \ 439117407Skan \ 440117407Skan /* Built-ins based on -march=. */ \ 441117407Skan if (ix86_arch == PROCESSOR_I486) \ 442117407Skan { \ 443117407Skan builtin_define ("__i486"); \ 444117407Skan builtin_define ("__i486__"); \ 445117407Skan } \ 446117407Skan else if (ix86_arch == PROCESSOR_PENTIUM) \ 447117407Skan { \ 448117407Skan builtin_define ("__i586"); \ 449117407Skan builtin_define ("__i586__"); \ 450117407Skan builtin_define ("__pentium"); \ 451117407Skan builtin_define ("__pentium__"); \ 452117407Skan if (last_arch_char == 'x') \ 453117407Skan builtin_define ("__pentium_mmx__"); \ 454117407Skan } \ 455117407Skan else if (ix86_arch == PROCESSOR_PENTIUMPRO) \ 456117407Skan { \ 457117407Skan builtin_define ("__i686"); \ 458117407Skan builtin_define ("__i686__"); \ 459117407Skan builtin_define ("__pentiumpro"); \ 460117407Skan builtin_define ("__pentiumpro__"); \ 461117407Skan } \ 462219374Smm else if (ix86_arch == PROCESSOR_GEODE) \ 463219374Smm { \ 464219374Smm builtin_define ("__geode"); \ 465219374Smm builtin_define ("__geode__"); \ 466219374Smm } \ 467117407Skan else if (ix86_arch == PROCESSOR_K6) \ 468117407Skan { \ 469117407Skan \ 470117407Skan builtin_define ("__k6"); \ 471117407Skan builtin_define ("__k6__"); \ 472117407Skan if (last_arch_char == '2') \ 473117407Skan builtin_define ("__k6_2__"); \ 474117407Skan else if (last_arch_char == '3') \ 475117407Skan builtin_define ("__k6_3__"); \ 476117407Skan } \ 477117407Skan else if (ix86_arch == PROCESSOR_ATHLON) \ 478117407Skan { \ 479117407Skan builtin_define ("__athlon"); \ 480117407Skan builtin_define ("__athlon__"); \ 481148163Sobrien /* Plain "athlon" & "athlon-tbird" lacks SSE. */ \ 482148163Sobrien if (last_tune_char != 'n' && last_tune_char != 'd') \ 483117407Skan builtin_define ("__athlon_sse__"); \ 484117407Skan } \ 485132744Skan else if (ix86_arch == PROCESSOR_K8) \ 486132744Skan { \ 487132744Skan builtin_define ("__k8"); \ 488132744Skan builtin_define ("__k8__"); \ 489132744Skan } \ 490251212Spfg else if (ix86_arch == PROCESSOR_AMDFAM10) \ 491251212Spfg { \ 492251212Spfg builtin_define ("__amdfam10"); \ 493251212Spfg builtin_define ("__amdfam10__"); \ 494251212Spfg } \ 495117407Skan else if (ix86_arch == PROCESSOR_PENTIUM4) \ 496117407Skan { \ 497117407Skan builtin_define ("__pentium4"); \ 498117407Skan builtin_define ("__pentium4__"); \ 499117407Skan } \ 500169706Skan else if (ix86_arch == PROCESSOR_NOCONA) \ 501169706Skan { \ 502169706Skan builtin_define ("__nocona"); \ 503169706Skan builtin_define ("__nocona__"); \ 504169706Skan } \ 505219374Smm else if (ix86_arch == PROCESSOR_CORE2) \ 506219374Smm { \ 507219374Smm builtin_define ("__core2"); \ 508219374Smm builtin_define ("__core2__"); \ 509219374Smm } \ 510117407Skan } \ 511117407Skan while (0) 512117407Skan 51390285Sobrien#define TARGET_CPU_DEFAULT_i386 0 51490285Sobrien#define TARGET_CPU_DEFAULT_i486 1 51590285Sobrien#define TARGET_CPU_DEFAULT_pentium 2 51690285Sobrien#define TARGET_CPU_DEFAULT_pentium_mmx 3 51790285Sobrien#define TARGET_CPU_DEFAULT_pentiumpro 4 51890285Sobrien#define TARGET_CPU_DEFAULT_pentium2 5 51990285Sobrien#define TARGET_CPU_DEFAULT_pentium3 6 52090285Sobrien#define TARGET_CPU_DEFAULT_pentium4 7 521219374Smm#define TARGET_CPU_DEFAULT_geode 8 522219374Smm#define TARGET_CPU_DEFAULT_k6 9 523219374Smm#define TARGET_CPU_DEFAULT_k6_2 10 524219374Smm#define TARGET_CPU_DEFAULT_k6_3 11 525219374Smm#define TARGET_CPU_DEFAULT_athlon 12 526219374Smm#define TARGET_CPU_DEFAULT_athlon_sse 13 527219374Smm#define TARGET_CPU_DEFAULT_k8 14 528219374Smm#define TARGET_CPU_DEFAULT_pentium_m 15 529219374Smm#define TARGET_CPU_DEFAULT_prescott 16 530219374Smm#define TARGET_CPU_DEFAULT_nocona 17 531219374Smm#define TARGET_CPU_DEFAULT_core2 18 532219374Smm#define TARGET_CPU_DEFAULT_generic 19 533251212Spfg#define TARGET_CPU_DEFAULT_amdfam10 20 53450654Sobrien 53590285Sobrien#define TARGET_CPU_DEFAULT_NAMES {"i386", "i486", "pentium", "pentium-mmx",\ 53690285Sobrien "pentiumpro", "pentium2", "pentium3", \ 537219374Smm "pentium4", "geode", "k6", "k6-2", "k6-3", \ 538132744Skan "athlon", "athlon-4", "k8", \ 539169706Skan "pentium-m", "prescott", "nocona", \ 540251212Spfg "core2", "generic", "amdfam10"} 54150654Sobrien 54250654Sobrien#ifndef CC1_SPEC 54390285Sobrien#define CC1_SPEC "%(cc1_cpu) " 54450654Sobrien#endif 54550654Sobrien 54650654Sobrien/* This macro defines names of additional specifications to put in the 54750654Sobrien specs that can be used in various specifications like CC1_SPEC. Its 54850654Sobrien definition is an initializer with a subgrouping for each command option. 54950654Sobrien 55050654Sobrien Each subgrouping contains a string constant, that defines the 551132744Skan specification name, and a string constant that used by the GCC driver 55250654Sobrien program. 55350654Sobrien 55450654Sobrien Do not define this macro if it does not need to do anything. */ 55550654Sobrien 55650654Sobrien#ifndef SUBTARGET_EXTRA_SPECS 55750654Sobrien#define SUBTARGET_EXTRA_SPECS 55850654Sobrien#endif 55950654Sobrien 56050654Sobrien#define EXTRA_SPECS \ 56150654Sobrien { "cc1_cpu", CC1_CPU_SPEC }, \ 56250654Sobrien SUBTARGET_EXTRA_SPECS 56350654Sobrien 56418334Speter/* target machine storage layout */ 56518334Speter 566169706Skan#define LONG_DOUBLE_TYPE_SIZE 80 56718334Speter 568117407Skan/* Set the value of FLT_EVAL_METHOD in float.h. When using only the 569117407Skan FPU, assume that the fpcw is set to extended precision; when using 570117407Skan only SSE, rounding is correct; when using both SSE and the FPU, 571117407Skan the rounding precision is indeterminate, since either may be chosen 572117407Skan apparently at random. */ 573117407Skan#define TARGET_FLT_EVAL_METHOD \ 574132744Skan (TARGET_MIX_SSE_I387 ? -1 : TARGET_SSE_MATH ? 0 : 2) 57590285Sobrien 57690285Sobrien#define SHORT_TYPE_SIZE 16 57790285Sobrien#define INT_TYPE_SIZE 32 57890285Sobrien#define FLOAT_TYPE_SIZE 32 57997912Sobrien#ifndef LONG_TYPE_SIZE 58090285Sobrien#define LONG_TYPE_SIZE BITS_PER_WORD 58197912Sobrien#endif 58290285Sobrien#define DOUBLE_TYPE_SIZE 64 58390285Sobrien#define LONG_LONG_TYPE_SIZE 64 58490285Sobrien 585117407Skan#if defined (TARGET_BI_ARCH) || TARGET_64BIT_DEFAULT 58690285Sobrien#define MAX_BITS_PER_WORD 64 58790285Sobrien#else 58890285Sobrien#define MAX_BITS_PER_WORD 32 58990285Sobrien#endif 59090285Sobrien 59118334Speter/* Define this if most significant byte of a word is the lowest numbered. */ 59218334Speter/* That is true on the 80386. */ 59318334Speter 59418334Speter#define BITS_BIG_ENDIAN 0 59518334Speter 59618334Speter/* Define this if most significant byte of a word is the lowest numbered. */ 59718334Speter/* That is not true on the 80386. */ 59818334Speter#define BYTES_BIG_ENDIAN 0 59918334Speter 60018334Speter/* Define this if most significant word of a multiword number is the lowest 60118334Speter numbered. */ 60218334Speter/* Not true for 80386 */ 60318334Speter#define WORDS_BIG_ENDIAN 0 60418334Speter 60518334Speter/* Width of a word, in units (bytes). */ 60690285Sobrien#define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) 607117407Skan#ifdef IN_LIBGCC2 608117407Skan#define MIN_UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) 609117407Skan#else 610117407Skan#define MIN_UNITS_PER_WORD 4 611117407Skan#endif 61218334Speter 61318334Speter/* Allocation boundary (in *bits*) for storing arguments in argument list. */ 61490285Sobrien#define PARM_BOUNDARY BITS_PER_WORD 61518334Speter 61690285Sobrien/* Boundary (in *bits*) on which stack pointer should be aligned. */ 61790285Sobrien#define STACK_BOUNDARY BITS_PER_WORD 61818334Speter 619132744Skan/* Boundary (in *bits*) on which the stack pointer prefers to be 62052295Sobrien aligned; the compiler cannot rely on having this alignment. */ 62190285Sobrien#define PREFERRED_STACK_BOUNDARY ix86_preferred_stack_boundary 62252295Sobrien 623169706Skan/* As of July 2001, many runtimes do not align the stack properly when 624132744Skan entering main. This causes expand_main_function to forcibly align 62590285Sobrien the stack, which results in aligned frames for functions called from 62690285Sobrien main, though it does nothing for the alignment of main itself. */ 62790285Sobrien#define FORCE_PREFERRED_STACK_BOUNDARY_IN_MAIN \ 62890285Sobrien (ix86_preferred_stack_boundary > STACK_BOUNDARY && !TARGET_64BIT) 62918334Speter 630104768Skan/* Minimum allocation boundary for the code of a function. */ 631104768Skan#define FUNCTION_BOUNDARY 8 63218334Speter 633104768Skan/* C++ stores the virtual bit in the lowest bit of function pointers. */ 634104768Skan#define TARGET_PTRMEMFUNC_VBIT_LOCATION ptrmemfunc_vbit_in_pfn 635104768Skan 63690285Sobrien/* Alignment of field after `int : 0' in a structure. */ 63718334Speter 63890285Sobrien#define EMPTY_FIELD_BOUNDARY BITS_PER_WORD 63990285Sobrien 64018334Speter/* Minimum size in bits of the largest boundary to which any 64118334Speter and all fundamental data types supported by the hardware 64218334Speter might need to be aligned. No data type wants to be aligned 64390285Sobrien rounder than this. 644117407Skan 645132744Skan Pentium+ prefers DFmode values to be aligned to 64 bit boundary 64690285Sobrien and Pentium Pro XFmode values at 128 bit boundaries. */ 64718334Speter 64890285Sobrien#define BIGGEST_ALIGNMENT 128 64990285Sobrien 650117407Skan/* Decide whether a variable of mode MODE should be 128 bit aligned. */ 65190285Sobrien#define ALIGN_MODE_128(MODE) \ 652169706Skan ((MODE) == XFmode || SSE_REG_MODE_P (MODE)) 65390285Sobrien 65490285Sobrien/* The published ABIs say that doubles should be aligned on word 655132744Skan boundaries, so lower the alignment for structure fields unless 65690285Sobrien -malign-double is set. */ 657102801Skan 658102801Skan/* ??? Blah -- this macro is used directly by libobjc. Since it 659102801Skan supports no vector modes, cut out the complexity and fall back 660102801Skan on BIGGEST_FIELD_ALIGNMENT. */ 661102801Skan#ifdef IN_TARGET_LIBS 662117407Skan#ifdef __x86_64__ 663117407Skan#define BIGGEST_FIELD_ALIGNMENT 128 664117407Skan#else 665102801Skan#define BIGGEST_FIELD_ALIGNMENT 32 666117407Skan#endif 66790285Sobrien#else 668102801Skan#define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \ 669102801Skan x86_field_alignment (FIELD, COMPUTED) 67090285Sobrien#endif 67190285Sobrien 67250654Sobrien/* If defined, a C expression to compute the alignment given to a 67390285Sobrien constant that is being placed in memory. EXP is the constant 67450654Sobrien and ALIGN is the alignment that the object would ordinarily have. 67550654Sobrien The value of this macro is used instead of that alignment to align 67650654Sobrien the object. 67750654Sobrien 67850654Sobrien If this macro is not defined, then ALIGN is used. 67950654Sobrien 68050654Sobrien The typical use of this macro is to increase alignment for string 68150654Sobrien constants to be word aligned so that `strcpy' calls that copy 68250654Sobrien constants can be done inline. */ 68350654Sobrien 68490285Sobrien#define CONSTANT_ALIGNMENT(EXP, ALIGN) ix86_constant_alignment ((EXP), (ALIGN)) 68550654Sobrien 68650654Sobrien/* If defined, a C expression to compute the alignment for a static 68750654Sobrien variable. TYPE is the data type, and ALIGN is the alignment that 68850654Sobrien the object would ordinarily have. The value of this macro is used 68950654Sobrien instead of that alignment to align the object. 69050654Sobrien 69150654Sobrien If this macro is not defined, then ALIGN is used. 69250654Sobrien 69350654Sobrien One use of this macro is to increase alignment of medium-size 69450654Sobrien data to make it all fit in fewer cache lines. Another is to 69550654Sobrien cause character arrays to be word-aligned so that `strcpy' calls 69650654Sobrien that copy constants to character arrays can be done inline. */ 69750654Sobrien 69890285Sobrien#define DATA_ALIGNMENT(TYPE, ALIGN) ix86_data_alignment ((TYPE), (ALIGN)) 69950654Sobrien 70052295Sobrien/* If defined, a C expression to compute the alignment for a local 70152295Sobrien variable. TYPE is the data type, and ALIGN is the alignment that 70252295Sobrien the object would ordinarily have. The value of this macro is used 70352295Sobrien instead of that alignment to align the object. 70452295Sobrien 70552295Sobrien If this macro is not defined, then ALIGN is used. 70652295Sobrien 70752295Sobrien One use of this macro is to increase alignment of medium-size 70852295Sobrien data to make it all fit in fewer cache lines. */ 70952295Sobrien 71090285Sobrien#define LOCAL_ALIGNMENT(TYPE, ALIGN) ix86_local_alignment ((TYPE), (ALIGN)) 71152295Sobrien 71290285Sobrien/* If defined, a C expression that gives the alignment boundary, in 71390285Sobrien bits, of an argument with the specified mode and type. If it is 71490285Sobrien not defined, `PARM_BOUNDARY' is used for all arguments. */ 71590285Sobrien 71690285Sobrien#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ 71790285Sobrien ix86_function_arg_boundary ((MODE), (TYPE)) 71890285Sobrien 719117407Skan/* Set this nonzero if move instructions will actually fail to work 72018334Speter when given unaligned data. */ 72118334Speter#define STRICT_ALIGNMENT 0 72218334Speter 72318334Speter/* If bit field type is int, don't let it cross an int, 72418334Speter and give entire struct the alignment of an int. */ 725117407Skan/* Required on the 386 since it doesn't have bit-field insns. */ 72618334Speter#define PCC_BITFIELD_TYPE_MATTERS 1 72718334Speter 72818334Speter/* Standard register usage. */ 72918334Speter 73018334Speter/* This processor has special stack-like registers. See reg-stack.c 73190285Sobrien for details. */ 73218334Speter 73318334Speter#define STACK_REGS 73490285Sobrien#define IS_STACK_MODE(MODE) \ 735169706Skan (((MODE) == SFmode && (!TARGET_SSE || !TARGET_SSE_MATH)) \ 736169706Skan || ((MODE) == DFmode && (!TARGET_SSE2 || !TARGET_SSE_MATH)) \ 737169706Skan || (MODE) == XFmode) 73818334Speter 73918334Speter/* Number of actual hardware registers. 74018334Speter The hardware registers are assigned numbers for the compiler 74118334Speter from 0 to just below FIRST_PSEUDO_REGISTER. 74218334Speter All registers that the compiler knows about must be given numbers, 74318334Speter even those that are not normally considered general registers. 74418334Speter 74518334Speter In the 80386 we give the 8 general purpose registers the numbers 0-7. 74618334Speter We number the floating point registers 8-15. 74718334Speter Note that registers 0-7 can be accessed as a short or int, 74818334Speter while only 0-3 may be used with byte `mov' instructions. 74918334Speter 75018334Speter Reg 16 does not correspond to any hardware register, but instead 75118334Speter appears in the RTL as an argument pointer prior to reload, and is 75218334Speter eliminated during reloading in favor of either the stack or frame 75390285Sobrien pointer. */ 75418334Speter 755237021Spfg#define FIRST_PSEUDO_REGISTER 53 75618334Speter 75790285Sobrien/* Number of hardware registers that go into the DWARF-2 unwind info. 75890285Sobrien If not defined, equals FIRST_PSEUDO_REGISTER. */ 75990285Sobrien 76090285Sobrien#define DWARF_FRAME_REGISTERS 17 76190285Sobrien 76218334Speter/* 1 for registers that have pervasive standard uses 76318334Speter and are not available for the register allocator. 76490285Sobrien On the 80386, the stack pointer is such, as is the arg pointer. 765117407Skan 766169706Skan The value is zero if the register is not fixed on either 32 or 767169706Skan 64 bit targets, one if the register if fixed on both 32 and 64 768169706Skan bit targets, two if it is only fixed on 32bit targets and three 769169706Skan if its only fixed on 64bit targets. 770169706Skan Proper values are computed in the CONDITIONAL_REGISTER_USAGE. 77190285Sobrien */ 77290285Sobrien#define FIXED_REGISTERS \ 77390285Sobrien/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/ \ 774169706Skan{ 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ 775237021Spfg/*arg,flags,fpsr,dir,frame*/ \ 776237021Spfg 1, 1, 1, 1, 1, \ 77790285Sobrien/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \ 77890285Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 77990285Sobrien/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/ \ 78090285Sobrien 0, 0, 0, 0, 0, 0, 0, 0, \ 78190285Sobrien/* r8, r9, r10, r11, r12, r13, r14, r15*/ \ 782169706Skan 2, 2, 2, 2, 2, 2, 2, 2, \ 78390285Sobrien/*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/ \ 784169706Skan 2, 2, 2, 2, 2, 2, 2, 2} 78518334Speter 786117407Skan 78718334Speter/* 1 for registers not available across function calls. 78818334Speter These must include the FIXED_REGISTERS and also any 78918334Speter registers that can be used without being saved. 79018334Speter The latter must include the registers where values are returned 79118334Speter and the register where structure-value addresses are passed. 792117407Skan Aside from that, you can include as many other registers as you like. 793117407Skan 794169706Skan The value is zero if the register is not call used on either 32 or 795169706Skan 64 bit targets, one if the register if call used on both 32 and 64 796169706Skan bit targets, two if it is only call used on 32bit targets and three 797169706Skan if its only call used on 64bit targets. 798169706Skan Proper values are computed in the CONDITIONAL_REGISTER_USAGE. 79990285Sobrien*/ 80090285Sobrien#define CALL_USED_REGISTERS \ 80190285Sobrien/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/ \ 802169706Skan{ 1, 1, 1, 0, 3, 3, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 803237021Spfg/*arg,flags,fpsr,dir,frame*/ \ 804237021Spfg 1, 1, 1, 1, 1, \ 80590285Sobrien/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \ 806237021Spfg 1, 1, 1, 1, 1, 1, 1, 1, \ 80790285Sobrien/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/ \ 808169706Skan 1, 1, 1, 1, 1, 1, 1, 1, \ 80990285Sobrien/* r8, r9, r10, r11, r12, r13, r14, r15*/ \ 810169706Skan 1, 1, 1, 1, 2, 2, 2, 2, \ 81190285Sobrien/*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/ \ 812169706Skan 1, 1, 1, 1, 1, 1, 1, 1} \ 81318334Speter 81418334Speter/* Order in which to allocate registers. Each register must be 81518334Speter listed once, even those in FIXED_REGISTERS. List frame pointer 81618334Speter late and fixed registers last. Note that, in general, we prefer 81718334Speter registers listed in CALL_USED_REGISTERS, keeping the others 81818334Speter available for storage of persistent values. 81918334Speter 82096294Sobrien The ORDER_REGS_FOR_LOCAL_ALLOC actually overwrite the order, 82196294Sobrien so this is just empty initializer for array. */ 82218334Speter 82396294Sobrien#define REG_ALLOC_ORDER \ 82496294Sobrien{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,\ 82596294Sobrien 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, \ 82696294Sobrien 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \ 827237021Spfg 48, 49, 50, 51, 52 } 82818334Speter 82996294Sobrien/* ORDER_REGS_FOR_LOCAL_ALLOC is a macro which permits reg_alloc_order 83096294Sobrien to be rearranged based on a particular function. When using sse math, 831237021Spfg we want to allocate SSE before x87 registers and vice vera. */ 83218334Speter 83396294Sobrien#define ORDER_REGS_FOR_LOCAL_ALLOC x86_order_regs_for_local_alloc () 83418334Speter 83518334Speter 83618334Speter/* Macro to conditionally modify fixed_regs/call_used_regs. */ 83790285Sobrien#define CONDITIONAL_REGISTER_USAGE \ 83890285Sobriendo { \ 83990285Sobrien int i; \ 84090285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 84190285Sobrien { \ 842169706Skan if (fixed_regs[i] > 1) \ 843169706Skan fixed_regs[i] = (fixed_regs[i] == (TARGET_64BIT ? 3 : 2)); \ 844169706Skan if (call_used_regs[i] > 1) \ 845169706Skan call_used_regs[i] = (call_used_regs[i] \ 846169706Skan == (TARGET_64BIT ? 3 : 2)); \ 84790285Sobrien } \ 84896294Sobrien if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \ 84990285Sobrien { \ 85090285Sobrien fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 85190285Sobrien call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 85290285Sobrien } \ 85390285Sobrien if (! TARGET_MMX) \ 85490285Sobrien { \ 85590285Sobrien int i; \ 85690285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 85790285Sobrien if (TEST_HARD_REG_BIT (reg_class_contents[(int)MMX_REGS], i)) \ 858169706Skan fixed_regs[i] = call_used_regs[i] = 1, reg_names[i] = ""; \ 85990285Sobrien } \ 86090285Sobrien if (! TARGET_SSE) \ 86190285Sobrien { \ 86290285Sobrien int i; \ 86390285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 86490285Sobrien if (TEST_HARD_REG_BIT (reg_class_contents[(int)SSE_REGS], i)) \ 865169706Skan fixed_regs[i] = call_used_regs[i] = 1, reg_names[i] = ""; \ 86690285Sobrien } \ 86790285Sobrien if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \ 86890285Sobrien { \ 86990285Sobrien int i; \ 87090285Sobrien HARD_REG_SET x; \ 87190285Sobrien COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \ 87290285Sobrien for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 87390285Sobrien if (TEST_HARD_REG_BIT (x, i)) \ 874169706Skan fixed_regs[i] = call_used_regs[i] = 1, reg_names[i] = ""; \ 87590285Sobrien } \ 876169706Skan if (! TARGET_64BIT) \ 877169706Skan { \ 878169706Skan int i; \ 879169706Skan for (i = FIRST_REX_INT_REG; i <= LAST_REX_INT_REG; i++) \ 880169706Skan reg_names[i] = ""; \ 881169706Skan for (i = FIRST_REX_SSE_REG; i <= LAST_REX_SSE_REG; i++) \ 882169706Skan reg_names[i] = ""; \ 883169706Skan } \ 88490285Sobrien } while (0) 88518334Speter 88618334Speter/* Return number of consecutive hard regs needed starting at reg REGNO 88718334Speter to hold something of mode MODE. 88818334Speter This is ordinarily the length in words of a value of mode MODE 88918334Speter but can be less for certain modes in special long registers. 89018334Speter 891117407Skan Actually there are no two word move instructions for consecutive 89218334Speter registers. And only registers 0-3 may have mov byte instructions 89318334Speter applied to them. 89418334Speter */ 89518334Speter 89618334Speter#define HARD_REGNO_NREGS(REGNO, MODE) \ 89790285Sobrien (FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO) \ 89890285Sobrien ? (COMPLEX_MODE_P (MODE) ? 2 : 1) \ 899132744Skan : ((MODE) == XFmode \ 90090285Sobrien ? (TARGET_64BIT ? 2 : 3) \ 901132744Skan : (MODE) == XCmode \ 90290285Sobrien ? (TARGET_64BIT ? 4 : 6) \ 90390285Sobrien : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) 90418334Speter 905169706Skan#define HARD_REGNO_NREGS_HAS_PADDING(REGNO, MODE) \ 906169706Skan ((TARGET_128BIT_LONG_DOUBLE && !TARGET_64BIT) \ 907169706Skan ? (FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO) \ 908169706Skan ? 0 \ 909169706Skan : ((MODE) == XFmode || (MODE) == XCmode)) \ 910169706Skan : 0) 911169706Skan 912169706Skan#define HARD_REGNO_NREGS_WITH_PADDING(REGNO, MODE) ((MODE) == XFmode ? 4 : 8) 913169706Skan 914117407Skan#define VALID_SSE2_REG_MODE(MODE) \ 915117407Skan ((MODE) == V16QImode || (MODE) == V8HImode || (MODE) == V2DFmode \ 916146908Skan || (MODE) == V2DImode || (MODE) == DFmode) 917117407Skan 91890285Sobrien#define VALID_SSE_REG_MODE(MODE) \ 91990285Sobrien ((MODE) == TImode || (MODE) == V4SFmode || (MODE) == V4SImode \ 920146908Skan || (MODE) == SFmode || (MODE) == TFmode) 92118334Speter 92290285Sobrien#define VALID_MMX_REG_MODE_3DNOW(MODE) \ 92390285Sobrien ((MODE) == V2SFmode || (MODE) == SFmode) 92418334Speter 92590285Sobrien#define VALID_MMX_REG_MODE(MODE) \ 92690285Sobrien ((MODE) == DImode || (MODE) == V8QImode || (MODE) == V4HImode \ 92790285Sobrien || (MODE) == V2SImode || (MODE) == SImode) 92818334Speter 929169706Skan/* ??? No autovectorization into MMX or 3DNOW until we can reliably 930169706Skan place emms and femms instructions. */ 931169706Skan#define UNITS_PER_SIMD_WORD (TARGET_SSE ? 16 : UNITS_PER_WORD) 93290285Sobrien 93390285Sobrien#define VALID_FP_MODE_P(MODE) \ 934132744Skan ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode \ 935132744Skan || (MODE) == SCmode || (MODE) == DCmode || (MODE) == XCmode) \ 93690285Sobrien 93790285Sobrien#define VALID_INT_MODE_P(MODE) \ 93890285Sobrien ((MODE) == QImode || (MODE) == HImode || (MODE) == SImode \ 93990285Sobrien || (MODE) == DImode \ 94090285Sobrien || (MODE) == CQImode || (MODE) == CHImode || (MODE) == CSImode \ 94190285Sobrien || (MODE) == CDImode \ 942132744Skan || (TARGET_64BIT && ((MODE) == TImode || (MODE) == CTImode \ 943132744Skan || (MODE) == TFmode || (MODE) == TCmode))) 94490285Sobrien 945117407Skan/* Return true for modes passed in SSE registers. */ 946117407Skan#define SSE_REG_MODE_P(MODE) \ 947132744Skan ((MODE) == TImode || (MODE) == V16QImode || (MODE) == TFmode \ 948117407Skan || (MODE) == V8HImode || (MODE) == V2DFmode || (MODE) == V2DImode \ 949117407Skan || (MODE) == V4SFmode || (MODE) == V4SImode) 950117407Skan 95190285Sobrien/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */ 95290285Sobrien 95390285Sobrien#define HARD_REGNO_MODE_OK(REGNO, MODE) \ 95490285Sobrien ix86_hard_regno_mode_ok ((REGNO), (MODE)) 95590285Sobrien 95618334Speter/* Value is 1 if it is a good idea to tie two pseudo registers 95718334Speter when one has mode MODE1 and one has mode MODE2. 95818334Speter If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 95918334Speter for any hard reg, then this must be 0 for correct output. */ 96018334Speter 961169706Skan#define MODES_TIEABLE_P(MODE1, MODE2) ix86_modes_tieable_p (MODE1, MODE2) 96218334Speter 963132744Skan/* It is possible to write patterns to move flags; but until someone 964132744Skan does it, */ 965132744Skan#define AVOID_CCMODE_COPIES 96690285Sobrien 96790285Sobrien/* Specify the modes required to caller save a given hard regno. 96890285Sobrien We do this on i386 to prevent flags from being saved at all. 96990285Sobrien 97090285Sobrien Kill any attempts to combine saving of modes. */ 97190285Sobrien 97290285Sobrien#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ 97390285Sobrien (CC_REGNO_P (REGNO) ? VOIDmode \ 97490285Sobrien : (MODE) == VOIDmode && (NREGS) != 1 ? VOIDmode \ 975132744Skan : (MODE) == VOIDmode ? choose_hard_reg_mode ((REGNO), (NREGS), false)\ 97690285Sobrien : (MODE) == HImode && !TARGET_PARTIAL_REG_STALL ? SImode \ 97790285Sobrien : (MODE) == QImode && (REGNO) >= 4 && !TARGET_64BIT ? SImode \ 97890285Sobrien : (MODE)) 97918334Speter/* Specify the registers used for certain standard purposes. 98018334Speter The values of these macros are register numbers. */ 98118334Speter 98218334Speter/* on the 386 the pc register is %eip, and is not usable as a general 98318334Speter register. The ordinary mov instructions won't work */ 98418334Speter/* #define PC_REGNUM */ 98518334Speter 98618334Speter/* Register to use for pushing function arguments. */ 98718334Speter#define STACK_POINTER_REGNUM 7 98818334Speter 98918334Speter/* Base register for access to local variables of the function. */ 99090285Sobrien#define HARD_FRAME_POINTER_REGNUM 6 99118334Speter 99290285Sobrien/* Base register for access to local variables of the function. */ 993237021Spfg#define FRAME_POINTER_REGNUM 20 99490285Sobrien 99518334Speter/* First floating point reg */ 99618334Speter#define FIRST_FLOAT_REG 8 99718334Speter 99818334Speter/* First & last stack-like regs */ 99918334Speter#define FIRST_STACK_REG FIRST_FLOAT_REG 100018334Speter#define LAST_STACK_REG (FIRST_FLOAT_REG + 7) 100118334Speter 100290285Sobrien#define FIRST_SSE_REG (FRAME_POINTER_REGNUM + 1) 100390285Sobrien#define LAST_SSE_REG (FIRST_SSE_REG + 7) 1004117407Skan 100590285Sobrien#define FIRST_MMX_REG (LAST_SSE_REG + 1) 100690285Sobrien#define LAST_MMX_REG (FIRST_MMX_REG + 7) 100790285Sobrien 100890285Sobrien#define FIRST_REX_INT_REG (LAST_MMX_REG + 1) 100990285Sobrien#define LAST_REX_INT_REG (FIRST_REX_INT_REG + 7) 101090285Sobrien 101190285Sobrien#define FIRST_REX_SSE_REG (LAST_REX_INT_REG + 1) 101290285Sobrien#define LAST_REX_SSE_REG (FIRST_REX_SSE_REG + 7) 101390285Sobrien 101418334Speter/* Value should be nonzero if functions must have frame pointers. 101518334Speter Zero means the frame pointer need not be set up (and parms 101618334Speter may be accessed via the stack pointer) in functions that seem suitable. 101718334Speter This is computed in `reload', in reload1.c. */ 101890285Sobrien#define FRAME_POINTER_REQUIRED ix86_frame_pointer_required () 101918334Speter 1020169706Skan/* Override this in other tm.h files to cope with various OS lossage 102190285Sobrien requiring a frame pointer. */ 102290285Sobrien#ifndef SUBTARGET_FRAME_POINTER_REQUIRED 102390285Sobrien#define SUBTARGET_FRAME_POINTER_REQUIRED 0 102490285Sobrien#endif 102590285Sobrien 102690285Sobrien/* Make sure we can access arbitrary call frames. */ 102790285Sobrien#define SETUP_FRAME_ADDRESSES() ix86_setup_frame_addresses () 102890285Sobrien 102918334Speter/* Base register for access to arguments of the function. */ 103018334Speter#define ARG_POINTER_REGNUM 16 103118334Speter 103290285Sobrien/* Register in which static-chain is passed to a function. 103390285Sobrien We do use ECX as static chain register for 32 bit ABI. On the 103490285Sobrien 64bit ABI, ECX is an argument register, so we use R10 instead. */ 103590285Sobrien#define STATIC_CHAIN_REGNUM (TARGET_64BIT ? FIRST_REX_INT_REG + 10 - 8 : 2) 103618334Speter 103718334Speter/* Register to hold the addressing base for position independent 103896294Sobrien code access to data items. We don't use PIC pointer for 64bit 103996294Sobrien mode. Define the regnum to dummy value to prevent gcc from 1040117407Skan pessimizing code dealing with EBX. 104118334Speter 1042117407Skan To avoid clobbering a call-saved register unnecessarily, we renumber 1043117407Skan the pic register when possible. The change is visible after the 1044117407Skan prologue has been emitted. */ 1045117407Skan 1046117407Skan#define REAL_PIC_OFFSET_TABLE_REGNUM 3 1047117407Skan 1048117407Skan#define PIC_OFFSET_TABLE_REGNUM \ 1049169706Skan ((TARGET_64BIT && ix86_cmodel == CM_SMALL_PIC) \ 1050169706Skan || !flag_pic ? INVALID_REGNUM \ 1051117407Skan : reload_completed ? REGNO (pic_offset_table_rtx) \ 1052117407Skan : REAL_PIC_OFFSET_TABLE_REGNUM) 1053117407Skan 1054117407Skan#define GOT_SYMBOL_NAME "_GLOBAL_OFFSET_TABLE_" 1055117407Skan 105618334Speter/* A C expression which can inhibit the returning of certain function 105718334Speter values in registers, based on the type of value. A nonzero value 105818334Speter says to return the function value in memory, just as large 105918334Speter structures are always returned. Here TYPE will be a C expression 106018334Speter of type `tree', representing the data type of the value. 106118334Speter 106218334Speter Note that values of mode `BLKmode' must be explicitly handled by 106318334Speter this macro. Also, the option `-fpcc-struct-return' takes effect 106418334Speter regardless of this macro. On most systems, it is possible to 106518334Speter leave the macro undefined; this causes a default definition to be 106618334Speter used, whose value is the constant 1 for `BLKmode' values, and 0 106718334Speter otherwise. 106818334Speter 106918334Speter Do not use this macro to indicate that structures and unions 107018334Speter should always be returned in memory. You should instead use 107118334Speter `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */ 107218334Speter 107318334Speter#define RETURN_IN_MEMORY(TYPE) \ 107490285Sobrien ix86_return_in_memory (TYPE) 107518334Speter 1076132744Skan/* This is overridden by <cygwin.h>. */ 1077132744Skan#define MS_AGGREGATE_RETURN 0 1078132744Skan 1079169706Skan/* This is overridden by <netware.h>. */ 1080169706Skan#define KEEP_AGGREGATE_RETURN_POINTER 0 108118334Speter 108218334Speter/* Define the classes of registers for register constraints in the 108318334Speter machine description. Also define ranges of constants. 108418334Speter 108518334Speter One of the classes must always be named ALL_REGS and include all hard regs. 108618334Speter If there is more than one class, another class must be named NO_REGS 108718334Speter and contain no registers. 108818334Speter 108918334Speter The name GENERAL_REGS must be the name of a class (or an alias for 109018334Speter another name such as ALL_REGS). This is the class of registers 109118334Speter that is allowed by "g" or "r" in a register constraint. 109218334Speter Also, registers outside this class are allocated only when 109318334Speter instructions express preferences for them. 109418334Speter 109518334Speter The classes must be numbered in nondecreasing order; that is, 109618334Speter a larger-numbered class must never be contained completely 109718334Speter in a smaller-numbered class. 109818334Speter 109918334Speter For any two classes, it is very desirable that there be another 110018334Speter class that represents their union. 110118334Speter 110218334Speter It might seem that class BREG is unnecessary, since no useful 386 110318334Speter opcode needs reg %ebx. But some systems pass args to the OS in ebx, 110490285Sobrien and the "b" register constraint is useful in asms for syscalls. 110518334Speter 1106237021Spfg The flags and fpsr registers are in no class. */ 110790285Sobrien 110818334Speterenum reg_class 110918334Speter{ 111018334Speter NO_REGS, 111190285Sobrien AREG, DREG, CREG, BREG, SIREG, DIREG, 111218334Speter AD_REGS, /* %eax/%edx for DImode */ 111318334Speter Q_REGS, /* %eax %ebx %ecx %edx */ 111490285Sobrien NON_Q_REGS, /* %esi %edi %ebp %esp */ 111518334Speter INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */ 111690285Sobrien LEGACY_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */ 111790285Sobrien GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp %r8 - %r15*/ 111818334Speter FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */ 111918334Speter FLOAT_REGS, 112090285Sobrien SSE_REGS, 112190285Sobrien MMX_REGS, 112290285Sobrien FP_TOP_SSE_REGS, 112390285Sobrien FP_SECOND_SSE_REGS, 112490285Sobrien FLOAT_SSE_REGS, 112590285Sobrien FLOAT_INT_REGS, 112690285Sobrien INT_SSE_REGS, 112790285Sobrien FLOAT_INT_SSE_REGS, 112818334Speter ALL_REGS, LIM_REG_CLASSES 112918334Speter}; 113018334Speter 113190285Sobrien#define N_REG_CLASSES ((int) LIM_REG_CLASSES) 113218334Speter 113390285Sobrien#define INTEGER_CLASS_P(CLASS) \ 113490285Sobrien reg_class_subset_p ((CLASS), GENERAL_REGS) 113590285Sobrien#define FLOAT_CLASS_P(CLASS) \ 113690285Sobrien reg_class_subset_p ((CLASS), FLOAT_REGS) 113790285Sobrien#define SSE_CLASS_P(CLASS) \ 1138169706Skan ((CLASS) == SSE_REGS) 113990285Sobrien#define MMX_CLASS_P(CLASS) \ 1140169706Skan ((CLASS) == MMX_REGS) 114190285Sobrien#define MAYBE_INTEGER_CLASS_P(CLASS) \ 114290285Sobrien reg_classes_intersect_p ((CLASS), GENERAL_REGS) 114390285Sobrien#define MAYBE_FLOAT_CLASS_P(CLASS) \ 114490285Sobrien reg_classes_intersect_p ((CLASS), FLOAT_REGS) 114590285Sobrien#define MAYBE_SSE_CLASS_P(CLASS) \ 114690285Sobrien reg_classes_intersect_p (SSE_REGS, (CLASS)) 114790285Sobrien#define MAYBE_MMX_CLASS_P(CLASS) \ 114890285Sobrien reg_classes_intersect_p (MMX_REGS, (CLASS)) 114918334Speter 115090285Sobrien#define Q_CLASS_P(CLASS) \ 115190285Sobrien reg_class_subset_p ((CLASS), Q_REGS) 115290285Sobrien 1153132744Skan/* Give names of register classes as strings for dump file. */ 115418334Speter 115518334Speter#define REG_CLASS_NAMES \ 115618334Speter{ "NO_REGS", \ 115718334Speter "AREG", "DREG", "CREG", "BREG", \ 115890285Sobrien "SIREG", "DIREG", \ 115918334Speter "AD_REGS", \ 116090285Sobrien "Q_REGS", "NON_Q_REGS", \ 116118334Speter "INDEX_REGS", \ 116290285Sobrien "LEGACY_REGS", \ 116318334Speter "GENERAL_REGS", \ 116418334Speter "FP_TOP_REG", "FP_SECOND_REG", \ 116518334Speter "FLOAT_REGS", \ 116690285Sobrien "SSE_REGS", \ 116790285Sobrien "MMX_REGS", \ 116890285Sobrien "FP_TOP_SSE_REGS", \ 116990285Sobrien "FP_SECOND_SSE_REGS", \ 117090285Sobrien "FLOAT_SSE_REGS", \ 117190285Sobrien "FLOAT_INT_REGS", \ 117290285Sobrien "INT_SSE_REGS", \ 117390285Sobrien "FLOAT_INT_SSE_REGS", \ 117418334Speter "ALL_REGS" } 117518334Speter 117618334Speter/* Define which registers fit in which classes. 117718334Speter This is an initializer for a vector of HARD_REG_SET 117818334Speter of length N_REG_CLASSES. */ 117918334Speter 118090285Sobrien#define REG_CLASS_CONTENTS \ 118190285Sobrien{ { 0x00, 0x0 }, \ 118290285Sobrien { 0x01, 0x0 }, { 0x02, 0x0 }, /* AREG, DREG */ \ 118390285Sobrien { 0x04, 0x0 }, { 0x08, 0x0 }, /* CREG, BREG */ \ 118490285Sobrien { 0x10, 0x0 }, { 0x20, 0x0 }, /* SIREG, DIREG */ \ 118590285Sobrien { 0x03, 0x0 }, /* AD_REGS */ \ 118690285Sobrien { 0x0f, 0x0 }, /* Q_REGS */ \ 1187237021Spfg { 0x1100f0, 0x1fe0 }, /* NON_Q_REGS */ \ 1188237021Spfg { 0x7f, 0x1fe0 }, /* INDEX_REGS */ \ 1189237021Spfg { 0x1100ff, 0x0 }, /* LEGACY_REGS */ \ 1190237021Spfg { 0x1100ff, 0x1fe0 }, /* GENERAL_REGS */ \ 119190285Sobrien { 0x100, 0x0 }, { 0x0200, 0x0 },/* FP_TOP_REG, FP_SECOND_REG */\ 119290285Sobrien { 0xff00, 0x0 }, /* FLOAT_REGS */ \ 1193237021Spfg{ 0x1fe00000,0x1fe000 }, /* SSE_REGS */ \ 1194237021Spfg{ 0xe0000000, 0x1f }, /* MMX_REGS */ \ 1195237021Spfg{ 0x1fe00100,0x1fe000 }, /* FP_TOP_SSE_REG */ \ 1196237021Spfg{ 0x1fe00200,0x1fe000 }, /* FP_SECOND_SSE_REG */ \ 1197237021Spfg{ 0x1fe0ff00,0x1fe000 }, /* FLOAT_SSE_REGS */ \ 1198237021Spfg { 0x1ffff, 0x1fe0 }, /* FLOAT_INT_REGS */ \ 1199237021Spfg{ 0x1fe100ff,0x1fffe0 }, /* INT_SSE_REGS */ \ 1200237021Spfg{ 0x1fe1ffff,0x1fffe0 }, /* FLOAT_INT_SSE_REGS */ \ 1201237021Spfg{ 0xffffffff,0x1fffff } \ 120290285Sobrien} 120318334Speter 120418334Speter/* The same information, inverted: 120518334Speter Return the class number of the smallest class containing 120618334Speter reg number REGNO. This could be a conditional expression 120718334Speter or could index an array. */ 120818334Speter 120918334Speter#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO]) 121018334Speter 121118334Speter/* When defined, the compiler allows registers explicitly used in the 121218334Speter rtl to be used as spill registers but prevents the compiler from 121390285Sobrien extending the lifetime of these registers. */ 121418334Speter 121550654Sobrien#define SMALL_REGISTER_CLASSES 1 121618334Speter 1217237021Spfg#define QI_REG_P(X) \ 1218237021Spfg (REG_P (X) && REGNO (X) < 4) 121990285Sobrien 122090285Sobrien#define GENERAL_REGNO_P(N) \ 1221237021Spfg ((N) < 8 || REX_INT_REGNO_P (N)) 122290285Sobrien 122390285Sobrien#define GENERAL_REG_P(X) \ 122490285Sobrien (REG_P (X) && GENERAL_REGNO_P (REGNO (X))) 122590285Sobrien 122690285Sobrien#define ANY_QI_REG_P(X) (TARGET_64BIT ? GENERAL_REG_P(X) : QI_REG_P (X)) 122790285Sobrien 122818334Speter#define NON_QI_REG_P(X) \ 1229237021Spfg (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER) 123018334Speter 1231237021Spfg#define REX_INT_REGNO_P(N) ((N) >= FIRST_REX_INT_REG && (N) <= LAST_REX_INT_REG) 123290285Sobrien#define REX_INT_REG_P(X) (REG_P (X) && REX_INT_REGNO_P (REGNO (X))) 123390285Sobrien 123418334Speter#define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X))) 1235237021Spfg#define FP_REGNO_P(N) ((N) >= FIRST_STACK_REG && (N) <= LAST_STACK_REG) 123690285Sobrien#define ANY_FP_REG_P(X) (REG_P (X) && ANY_FP_REGNO_P (REGNO (X))) 123790285Sobrien#define ANY_FP_REGNO_P(N) (FP_REGNO_P (N) || SSE_REGNO_P (N)) 123890285Sobrien 1239237021Spfg#define SSE_REGNO_P(N) \ 1240237021Spfg (((N) >= FIRST_SSE_REG && (N) <= LAST_SSE_REG) \ 1241237021Spfg || ((N) >= FIRST_REX_SSE_REG && (N) <= LAST_REX_SSE_REG)) 124290285Sobrien 1243132744Skan#define REX_SSE_REGNO_P(N) \ 1244237021Spfg ((N) >= FIRST_REX_SSE_REG && (N) <= LAST_REX_SSE_REG) 1245132744Skan 124690285Sobrien#define SSE_REGNO(N) \ 124790285Sobrien ((N) < 8 ? FIRST_SSE_REG + (N) : FIRST_REX_SSE_REG + (N) - 8) 1248237021Spfg#define SSE_REG_P(N) (REG_P (N) && SSE_REGNO_P (REGNO (N))) 124990285Sobrien 125090285Sobrien#define SSE_FLOAT_MODE_P(MODE) \ 125196294Sobrien ((TARGET_SSE && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode)) 125290285Sobrien 1253237021Spfg#define MMX_REGNO_P(N) ((N) >= FIRST_MMX_REG && (N) <= LAST_MMX_REG) 125490285Sobrien#define MMX_REG_P(XOP) (REG_P (XOP) && MMX_REGNO_P (REGNO (XOP))) 1255117407Skan 1256237021Spfg#define STACK_REG_P(XOP) \ 1257237021Spfg (REG_P (XOP) && \ 1258237021Spfg REGNO (XOP) >= FIRST_STACK_REG && \ 1259237021Spfg REGNO (XOP) <= LAST_STACK_REG) 126018334Speter 1261237021Spfg#define NON_STACK_REG_P(XOP) (REG_P (XOP) && ! STACK_REG_P (XOP)) 1262237021Spfg 126390285Sobrien#define STACK_TOP_P(XOP) (REG_P (XOP) && REGNO (XOP) == FIRST_STACK_REG) 126418334Speter 126590285Sobrien#define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X))) 126690285Sobrien#define CC_REGNO_P(X) ((X) == FLAGS_REG || (X) == FPSR_REG) 126718334Speter 126818334Speter/* The class value for index registers, and the one for base regs. */ 126918334Speter 127018334Speter#define INDEX_REG_CLASS INDEX_REGS 127118334Speter#define BASE_REG_CLASS GENERAL_REGS 127218334Speter 127318334Speter/* Place additional restrictions on the register class to use when it 127418334Speter is necessary to be able to hold a value of mode MODE in a reload 127590285Sobrien register for which class CLASS would ordinarily be used. */ 127618334Speter 127790285Sobrien#define LIMIT_RELOAD_CLASS(MODE, CLASS) \ 127890285Sobrien ((MODE) == QImode && !TARGET_64BIT \ 127990285Sobrien && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS \ 128090285Sobrien || (CLASS) == LEGACY_REGS || (CLASS) == INDEX_REGS) \ 128118334Speter ? Q_REGS : (CLASS)) 128218334Speter 128318334Speter/* Given an rtx X being reloaded into a reg required to be 128418334Speter in class CLASS, return the class of reg to actually use. 128518334Speter In general this is just CLASS; but on some machines 128618334Speter in some cases it is preferable to use a more restrictive class. 128718334Speter On the 80386 series, we prevent floating constants from being 128818334Speter reloaded into floating registers (since no move-insn can do that) 128918334Speter and we ensure that QImodes aren't reloaded into the esi or edi reg. */ 129018334Speter 129118334Speter/* Put float CONST_DOUBLE in the constant pool instead of fp regs. 129218334Speter QImode must go into class Q_REGS. 129318334Speter Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and 129490285Sobrien movdf to do mem-to-mem moves through integer regs. */ 129518334Speter 129690285Sobrien#define PREFERRED_RELOAD_CLASS(X, CLASS) \ 129790285Sobrien ix86_preferred_reload_class ((X), (CLASS)) 129818334Speter 1299169706Skan/* Discourage putting floating-point values in SSE registers unless 1300169706Skan SSE math is being used, and likewise for the 387 registers. */ 1301169706Skan 1302169706Skan#define PREFERRED_OUTPUT_RELOAD_CLASS(X, CLASS) \ 1303169706Skan ix86_preferred_output_reload_class ((X), (CLASS)) 1304169706Skan 130518334Speter/* If we are copying between general and FP registers, we need a memory 130690285Sobrien location. The same is true for SSE and MMX registers. */ 130790285Sobrien#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ 130890285Sobrien ix86_secondary_memory_needed ((CLASS1), (CLASS2), (MODE), 1) 130918334Speter 131090285Sobrien/* QImode spills from non-QI registers need a scratch. This does not 1311117407Skan happen often -- the only example so far requires an uninitialized 131290285Sobrien pseudo. */ 131318334Speter 131490285Sobrien#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \ 131590285Sobrien (((CLASS) == GENERAL_REGS || (CLASS) == LEGACY_REGS \ 131690285Sobrien || (CLASS) == INDEX_REGS) && !TARGET_64BIT && (MODE) == QImode \ 131790285Sobrien ? Q_REGS : NO_REGS) 131890285Sobrien 131918334Speter/* Return the maximum number of consecutive registers 132018334Speter needed to represent mode MODE in a register of class CLASS. */ 132118334Speter/* On the 80386, this is the size of MODE in words, 1322132744Skan except in the FP regs, where a single reg is always enough. */ 132390285Sobrien#define CLASS_MAX_NREGS(CLASS, MODE) \ 132490285Sobrien (!MAYBE_INTEGER_CLASS_P (CLASS) \ 132590285Sobrien ? (COMPLEX_MODE_P (MODE) ? 2 : 1) \ 1326132744Skan : (((((MODE) == XFmode ? 12 : GET_MODE_SIZE (MODE))) \ 1327132744Skan + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 132818334Speter 132918334Speter/* A C expression whose value is nonzero if pseudos that have been 133018334Speter assigned to registers of class CLASS would likely be spilled 133118334Speter because registers of CLASS are needed for spill registers. 133218334Speter 133318334Speter The default value of this macro returns 1 if CLASS has exactly one 133418334Speter register and zero otherwise. On most machines, this default 133518334Speter should be used. Only define this macro to some other expression 133618334Speter if pseudo allocated by `local-alloc.c' end up in memory because 133718334Speter their hard registers were needed for spill registers. If this 133818334Speter macro returns nonzero for those classes, those pseudos will only 133918334Speter be allocated by `global.c', which knows how to reallocate the 134018334Speter pseudo to another register. If there would not be another 134118334Speter register available for reallocation, you should not change the 134218334Speter definition of this macro since the only effect of such a 134318334Speter definition would be to slow down register allocation. */ 134418334Speter 134518334Speter#define CLASS_LIKELY_SPILLED_P(CLASS) \ 134618334Speter (((CLASS) == AREG) \ 134718334Speter || ((CLASS) == DREG) \ 134818334Speter || ((CLASS) == CREG) \ 134918334Speter || ((CLASS) == BREG) \ 135018334Speter || ((CLASS) == AD_REGS) \ 135118334Speter || ((CLASS) == SIREG) \ 1352132744Skan || ((CLASS) == DIREG) \ 1353132744Skan || ((CLASS) == FP_TOP_REG) \ 1354132744Skan || ((CLASS) == FP_SECOND_REG)) 135518334Speter 1356169706Skan/* Return a class of registers that cannot change FROM mode to TO mode. */ 1357117407Skan 1358169706Skan#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ 1359169706Skan ix86_cannot_change_mode_class (FROM, TO, CLASS) 136018334Speter 136118334Speter/* Stack layout; function entry, exit and calling. */ 136218334Speter 136318334Speter/* Define this if pushing a word on the stack 136418334Speter makes the stack pointer a smaller address. */ 136518334Speter#define STACK_GROWS_DOWNWARD 136618334Speter 1367169706Skan/* Define this to nonzero if the nominal address of the stack frame 136818334Speter is at the high-address end of the local variables; 136918334Speter that is, each additional local variable allocated 137018334Speter goes at a more negative offset in the frame. */ 1371169706Skan#define FRAME_GROWS_DOWNWARD 1 137218334Speter 137318334Speter/* Offset within stack frame to start allocating local variables at. 137418334Speter If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 137518334Speter first local allocated. Otherwise, it is the offset to the BEGINNING 137618334Speter of the first local allocated. */ 137718334Speter#define STARTING_FRAME_OFFSET 0 137818334Speter 137918334Speter/* If we generate an insn to push BYTES bytes, 138018334Speter this says how many the stack pointer really advances by. 1381169706Skan On 386, we have pushw instruction that decrements by exactly 2 no 1382169706Skan matter what the position was, there is no pushb. 1383169706Skan But as CIE data alignment factor on this arch is -4, we need to make 1384169706Skan sure all stack pointer adjustments are in multiple of 4. 1385117407Skan 138690285Sobrien For 64bit ABI we round up to 8 bytes. 138790285Sobrien */ 138818334Speter 138990285Sobrien#define PUSH_ROUNDING(BYTES) \ 139090285Sobrien (TARGET_64BIT \ 139190285Sobrien ? (((BYTES) + 7) & (-8)) \ 1392169706Skan : (((BYTES) + 3) & (-4))) 139318334Speter 139490285Sobrien/* If defined, the maximum amount of space required for outgoing arguments will 139590285Sobrien be computed and placed into the variable 139690285Sobrien `current_function_outgoing_args_size'. No space will be pushed onto the 139790285Sobrien stack for each call; instead, the function prologue should increase the stack 139890285Sobrien frame size by this amount. */ 139990285Sobrien 140090285Sobrien#define ACCUMULATE_OUTGOING_ARGS TARGET_ACCUMULATE_OUTGOING_ARGS 140190285Sobrien 140290285Sobrien/* If defined, a C expression whose value is nonzero when we want to use PUSH 140390285Sobrien instructions to pass outgoing arguments. */ 140490285Sobrien 140590285Sobrien#define PUSH_ARGS (TARGET_PUSH_ARGS && !ACCUMULATE_OUTGOING_ARGS) 140690285Sobrien 1407107598Sobrien/* We want the stack and args grow in opposite directions, even if 1408107598Sobrien PUSH_ARGS is 0. */ 1409107598Sobrien#define PUSH_ARGS_REVERSED 1 1410107598Sobrien 141118334Speter/* Offset of first parameter from the argument pointer register value. */ 141218334Speter#define FIRST_PARM_OFFSET(FNDECL) 0 141318334Speter 141490285Sobrien/* Define this macro if functions should assume that stack space has been 141590285Sobrien allocated for arguments even when their values are passed in registers. 141690285Sobrien 141790285Sobrien The value of this macro is the size, in bytes, of the area reserved for 141890285Sobrien arguments passed in registers for the function represented by FNDECL. 141990285Sobrien 142090285Sobrien This space can be allocated by the caller, or be a part of the 142190285Sobrien machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE' says 142290285Sobrien which. */ 142390285Sobrien#define REG_PARM_STACK_SPACE(FNDECL) 0 142490285Sobrien 142518334Speter/* Value is the number of bytes of arguments automatically 142618334Speter popped when returning from a subroutine call. 142718334Speter FUNDECL is the declaration node of the function (as a tree), 142818334Speter FUNTYPE is the data type of the function (as a tree), 142918334Speter or for a library call it is an identifier node for the subroutine name. 143018334Speter SIZE is the number of bytes of arguments passed on the stack. 143118334Speter 143218334Speter On the 80386, the RTD insn may be used to pop them if the number 143318334Speter of args is fixed, but if the number is variable then the caller 143418334Speter must pop them all. RTD can't be used for library calls now 143518334Speter because the library is compiled with the Unix compiler. 143618334Speter Use of RTD is a selectable option, since it is incompatible with 143718334Speter standard Unix calling sequences. If the option is not selected, 143818334Speter the caller must always pop the args. 143918334Speter 144018334Speter The attribute stdcall is equivalent to RTD on a per module basis. */ 144118334Speter 144290285Sobrien#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) \ 144390285Sobrien ix86_return_pops_args ((FUNDECL), (FUNTYPE), (SIZE)) 144418334Speter 144590285Sobrien#define FUNCTION_VALUE_REGNO_P(N) \ 144690285Sobrien ix86_function_value_regno_p (N) 144790285Sobrien 144818334Speter/* Define how to find the value returned by a library function 144918334Speter assuming the value has mode MODE. */ 145018334Speter 145118334Speter#define LIBCALL_VALUE(MODE) \ 145290285Sobrien ix86_libcall_value (MODE) 145318334Speter 145418334Speter/* Define the size of the result block used for communication between 145518334Speter untyped_call and untyped_return. The block contains a DImode value 145618334Speter followed by the block used by fnsave and frstor. */ 145718334Speter 145818334Speter#define APPLY_RESULT_SIZE (8+108) 145918334Speter 146018334Speter/* 1 if N is a possible register number for function argument passing. */ 146190285Sobrien#define FUNCTION_ARG_REGNO_P(N) ix86_function_arg_regno_p (N) 146218334Speter 146318334Speter/* Define a data type for recording info about an argument list 146418334Speter during the scan of that argument list. This data type should 146518334Speter hold all necessary information about the function itself 146618334Speter and about the args processed so far, enough to enable macros 146718334Speter such as FUNCTION_ARG to determine where the next arg should go. */ 146818334Speter 146990285Sobrientypedef struct ix86_args { 147018334Speter int words; /* # words passed so far */ 147118334Speter int nregs; /* # registers available for passing */ 147218334Speter int regno; /* next available register number */ 1473169706Skan int fastcall; /* fastcall calling convention is used */ 147490285Sobrien int sse_words; /* # sse words passed so far */ 147590285Sobrien int sse_nregs; /* # sse registers available for passing */ 1476132744Skan int warn_sse; /* True when we want to warn about SSE ABI. */ 1477132744Skan int warn_mmx; /* True when we want to warn about MMX ABI. */ 147890285Sobrien int sse_regno; /* next available sse register number */ 1479132744Skan int mmx_words; /* # mmx words passed so far */ 1480132744Skan int mmx_nregs; /* # mmx registers available for passing */ 1481132744Skan int mmx_regno; /* next available mmx register number */ 148290285Sobrien int maybe_vaarg; /* true for calls to possibly vardic fncts. */ 1483169706Skan int float_in_sse; /* 1 if in 32-bit mode SFmode (2 for DFmode) should 1484169706Skan be passed in SSE registers. Otherwise 0. */ 148518334Speter} CUMULATIVE_ARGS; 148618334Speter 148718334Speter/* Initialize a variable CUM of type CUMULATIVE_ARGS 148818334Speter for a call to a function whose data type is FNTYPE. 148918334Speter For a library call, FNTYPE is 0. */ 149018334Speter 1491132744Skan#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ 1492132744Skan init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME), (FNDECL)) 149318334Speter 149418334Speter/* Update the data in CUM to advance over an argument 149518334Speter of mode MODE and data type TYPE. 149618334Speter (TYPE is null for libcalls where that information may not be available.) */ 149718334Speter 149890285Sobrien#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 149990285Sobrien function_arg_advance (&(CUM), (MODE), (TYPE), (NAMED)) 150018334Speter 150118334Speter/* Define where to put the arguments to a function. 150218334Speter Value is zero to push the argument on the stack, 150318334Speter or a hard register in which to store the argument. 150418334Speter 150518334Speter MODE is the argument's machine mode. 150618334Speter TYPE is the data type of the argument (as a tree). 150718334Speter This is null for libcalls where that information may 150818334Speter not be available. 150918334Speter CUM is a variable of type CUMULATIVE_ARGS which gives info about 151018334Speter the preceding args and about the function being called. 151118334Speter NAMED is nonzero if this argument is a named parameter 151218334Speter (otherwise it is an extra parameter matching an ellipsis). */ 151318334Speter 151418334Speter#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 151590285Sobrien function_arg (&(CUM), (MODE), (TYPE), (NAMED)) 151618334Speter 151790285Sobrien/* Implement `va_start' for varargs and stdarg. */ 1518117407Skan#define EXPAND_BUILTIN_VA_START(VALIST, NEXTARG) \ 1519117407Skan ix86_va_start (VALIST, NEXTARG) 152018334Speter 1521132744Skan#define TARGET_ASM_FILE_END ix86_file_end 1522132744Skan#define NEED_INDICATE_EXEC_STACK 0 152318334Speter 152490285Sobrien/* Output assembler code to FILE to increment profiler label # LABELNO 152590285Sobrien for profiling a function entry. */ 152650654Sobrien 1527117407Skan#define FUNCTION_PROFILER(FILE, LABELNO) x86_function_profiler (FILE, LABELNO) 152818334Speter 1529117407Skan#define MCOUNT_NAME "_mcount" 1530117407Skan 1531117407Skan#define PROFILE_COUNT_REGISTER "edx" 1532117407Skan 153318334Speter/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 153418334Speter the stack pointer does not matter. The value is tested only in 153518334Speter functions that have frame pointers. 153618334Speter No definition is equivalent to always zero. */ 1537117407Skan/* Note on the 386 it might be more efficient not to define this since 153818334Speter we have to restore it ourselves from the frame pointer, in order to 153918334Speter use pop */ 154018334Speter 154118334Speter#define EXIT_IGNORE_STACK 1 154218334Speter 154318334Speter/* Output assembler code for a block containing the constant parts 154418334Speter of a trampoline, leaving space for the variable parts. */ 154518334Speter 154652295Sobrien/* On the 386, the trampoline contains two instructions: 154718334Speter mov #STATIC,ecx 154852295Sobrien jmp FUNCTION 154952295Sobrien The trampoline is generated entirely at runtime. The operand of JMP 155052295Sobrien is the address of FUNCTION relative to the instruction following the 155152295Sobrien JMP (which is 5 bytes long). */ 155218334Speter 155318334Speter/* Length in units of the trampoline for entering a nested function. */ 155418334Speter 155590285Sobrien#define TRAMPOLINE_SIZE (TARGET_64BIT ? 23 : 10) 155618334Speter 155718334Speter/* Emit RTL insns to initialize the variable parts of a trampoline. 155818334Speter FNADDR is an RTX for the address of the function's pure code. 155918334Speter CXT is an RTX for the static chain value for the function. */ 156018334Speter 156190285Sobrien#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 156290285Sobrien x86_initialize_trampoline ((TRAMP), (FNADDR), (CXT)) 156318334Speter 156418334Speter/* Definitions for register eliminations. 156518334Speter 156618334Speter This is an array of structures. Each structure initializes one pair 156718334Speter of eliminable registers. The "from" register number is given first, 156818334Speter followed by "to". Eliminations of the same "from" register are listed 156918334Speter in order of preference. 157018334Speter 157190285Sobrien There are two registers that can always be eliminated on the i386. 157290285Sobrien The frame pointer and the arg pointer can be replaced by either the 157390285Sobrien hard frame pointer or to the stack pointer, depending upon the 157490285Sobrien circumstances. The hard frame pointer is not used before reload and 157590285Sobrien so it is not eligible for elimination. */ 157618334Speter 157790285Sobrien#define ELIMINABLE_REGS \ 157890285Sobrien{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 157990285Sobrien { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ 158090285Sobrien { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 158190285Sobrien { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} \ 158218334Speter 158390285Sobrien/* Given FROM and TO register numbers, say whether this elimination is 158490285Sobrien allowed. Frame pointer elimination is automatically handled. 158518334Speter 158618334Speter All other eliminations are valid. */ 158718334Speter 158890285Sobrien#define CAN_ELIMINATE(FROM, TO) \ 158990285Sobrien ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1) 159018334Speter 159118334Speter/* Define the offset between two registers, one to be eliminated, and the other 159218334Speter its replacement, at the start of a routine. */ 159318334Speter 159490285Sobrien#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 159590285Sobrien ((OFFSET) = ix86_initial_elimination_offset ((FROM), (TO))) 159618334Speter 159718334Speter/* Addressing modes, and classification of registers for them. */ 159818334Speter 159918334Speter/* Macros to check register numbers against specific register classes. */ 160018334Speter 160118334Speter/* These assume that REGNO is a hard or pseudo reg number. 160218334Speter They give nonzero only if REGNO is a hard reg of the suitable class 160318334Speter or a pseudo reg currently allocated to a suitable hard reg. 160418334Speter Since they use reg_renumber, they are safe only once reg_renumber 160518334Speter has been allocated, which happens in local-alloc.c. */ 160618334Speter 160790285Sobrien#define REGNO_OK_FOR_INDEX_P(REGNO) \ 160890285Sobrien ((REGNO) < STACK_POINTER_REGNUM \ 1609237021Spfg || (REGNO >= FIRST_REX_INT_REG \ 1610237021Spfg && (REGNO) <= LAST_REX_INT_REG) \ 1611237021Spfg || ((unsigned) reg_renumber[(REGNO)] >= FIRST_REX_INT_REG \ 1612237021Spfg && (unsigned) reg_renumber[(REGNO)] <= LAST_REX_INT_REG) \ 1613237021Spfg || (unsigned) reg_renumber[(REGNO)] < STACK_POINTER_REGNUM) 161418334Speter 161590285Sobrien#define REGNO_OK_FOR_BASE_P(REGNO) \ 1616237021Spfg ((REGNO) <= STACK_POINTER_REGNUM \ 161790285Sobrien || (REGNO) == ARG_POINTER_REGNUM \ 161890285Sobrien || (REGNO) == FRAME_POINTER_REGNUM \ 1619237021Spfg || (REGNO >= FIRST_REX_INT_REG \ 1620237021Spfg && (REGNO) <= LAST_REX_INT_REG) \ 1621237021Spfg || ((unsigned) reg_renumber[(REGNO)] >= FIRST_REX_INT_REG \ 1622237021Spfg && (unsigned) reg_renumber[(REGNO)] <= LAST_REX_INT_REG) \ 1623237021Spfg || (unsigned) reg_renumber[(REGNO)] <= STACK_POINTER_REGNUM) 162418334Speter 162590285Sobrien#define REGNO_OK_FOR_SIREG_P(REGNO) \ 162690285Sobrien ((REGNO) == 4 || reg_renumber[(REGNO)] == 4) 162790285Sobrien#define REGNO_OK_FOR_DIREG_P(REGNO) \ 162890285Sobrien ((REGNO) == 5 || reg_renumber[(REGNO)] == 5) 162918334Speter 163018334Speter/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 163118334Speter and check its validity for a certain class. 163218334Speter We have two alternate definitions for each of them. 163318334Speter The usual definition accepts all pseudo regs; the other rejects 163418334Speter them unless they have been allocated suitable hard regs. 163518334Speter The symbol REG_OK_STRICT causes the latter definition to be used. 163618334Speter 163718334Speter Most source files want to accept pseudo regs in the hope that 163818334Speter they will get allocated to the class that the insn wants them to be in. 163918334Speter Source files for reload pass need to be strict. 164018334Speter After reload, it makes no difference, since pseudo regs have 164118334Speter been eliminated by then. */ 164218334Speter 164318334Speter 1644169706Skan/* Non strict versions, pseudos are ok. */ 164518334Speter#define REG_OK_FOR_INDEX_NONSTRICT_P(X) \ 164618334Speter (REGNO (X) < STACK_POINTER_REGNUM \ 1647237021Spfg || (REGNO (X) >= FIRST_REX_INT_REG \ 1648237021Spfg && REGNO (X) <= LAST_REX_INT_REG) \ 164918334Speter || REGNO (X) >= FIRST_PSEUDO_REGISTER) 165018334Speter 165118334Speter#define REG_OK_FOR_BASE_NONSTRICT_P(X) \ 1652237021Spfg (REGNO (X) <= STACK_POINTER_REGNUM \ 165318334Speter || REGNO (X) == ARG_POINTER_REGNUM \ 165490285Sobrien || REGNO (X) == FRAME_POINTER_REGNUM \ 1655237021Spfg || (REGNO (X) >= FIRST_REX_INT_REG \ 1656237021Spfg && REGNO (X) <= LAST_REX_INT_REG) \ 165718334Speter || REGNO (X) >= FIRST_PSEUDO_REGISTER) 165818334Speter 165918334Speter/* Strict versions, hard registers only */ 166018334Speter#define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 166118334Speter#define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 166218334Speter 166318334Speter#ifndef REG_OK_STRICT 166490285Sobrien#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X) 166590285Sobrien#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P (X) 166618334Speter 166718334Speter#else 166890285Sobrien#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P (X) 166990285Sobrien#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X) 167018334Speter#endif 167118334Speter 167218334Speter/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 167318334Speter that is a valid memory address for an instruction. 167418334Speter The MODE argument is the machine mode for the MEM expression 167518334Speter that wants to use this address. 167618334Speter 167718334Speter The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, 167818334Speter except for CONSTANT_ADDRESS_P which is usually machine-independent. 167918334Speter 168018334Speter See legitimize_pic_address in i386.c for details as to what 168118334Speter constitutes a legitimate address when -fpic is used. */ 168218334Speter 168318334Speter#define MAX_REGS_PER_ADDRESS 2 168418334Speter 1685117407Skan#define CONSTANT_ADDRESS_P(X) constant_address_p (X) 168618334Speter 168718334Speter/* Nonzero if the constant value X is a legitimate general operand. 168818334Speter It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 168918334Speter 1690117407Skan#define LEGITIMATE_CONSTANT_P(X) legitimate_constant_p (X) 169118334Speter 169218334Speter#ifdef REG_OK_STRICT 169318334Speter#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 169490285Sobriendo { \ 169590285Sobrien if (legitimate_address_p ((MODE), (X), 1)) \ 169618334Speter goto ADDR; \ 169790285Sobrien} while (0) 169818334Speter 169918334Speter#else 170018334Speter#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 170190285Sobriendo { \ 170290285Sobrien if (legitimate_address_p ((MODE), (X), 0)) \ 170318334Speter goto ADDR; \ 170490285Sobrien} while (0) 170518334Speter 170618334Speter#endif 170718334Speter 170890285Sobrien/* If defined, a C expression to determine the base term of address X. 170990285Sobrien This macro is used in only one place: `find_base_term' in alias.c. 171090285Sobrien 171190285Sobrien It is always safe for this macro to not be defined. It exists so 171290285Sobrien that alias analysis can understand machine-dependent addresses. 171390285Sobrien 171490285Sobrien The typical use of this macro is to handle addresses containing 171590285Sobrien a label_ref or symbol_ref within an UNSPEC. */ 171690285Sobrien 171790285Sobrien#define FIND_BASE_TERM(X) ix86_find_base_term (X) 171890285Sobrien 171918334Speter/* Try machine-dependent ways of modifying an illegitimate address 172018334Speter to be legitimate. If we find one, return the new, valid address. 172118334Speter This macro is used in only one place: `memory_address' in explow.c. 172218334Speter 172318334Speter OLDX is the address as it was before break_out_memory_refs was called. 172418334Speter In some cases it is useful to look at this to decide what needs to be done. 172518334Speter 172618334Speter MODE and WIN are passed so that this macro can use 172718334Speter GO_IF_LEGITIMATE_ADDRESS. 172818334Speter 172918334Speter It is always safe for this macro to do nothing. It exists to recognize 173018334Speter opportunities to optimize the output. 173118334Speter 173218334Speter For the 80386, we handle X+REG by loading X into a register R and 173318334Speter using R+REG. R will go in a general reg and indexing will be used. 173418334Speter However, if REG is a broken-out memory address or multiplication, 173518334Speter nothing needs to be done because REG can certainly go in a general reg. 173618334Speter 173718334Speter When -fpic is used, special handling is needed for symbolic references. 173818334Speter See comments by legitimize_pic_address in i386.c for details. */ 173918334Speter 174018334Speter#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ 174190285Sobriendo { \ 174290285Sobrien (X) = legitimize_address ((X), (OLDX), (MODE)); \ 174390285Sobrien if (memory_address_p ((MODE), (X))) \ 174418334Speter goto WIN; \ 174590285Sobrien} while (0) 174618334Speter 174790285Sobrien#define REWRITE_ADDRESS(X) rewrite_address (X) 174850654Sobrien 174918334Speter/* Nonzero if the constant value X is a legitimate general operand 1750117407Skan when generating PIC code. It is given that flag_pic is on and 175118334Speter that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 175218334Speter 1753117407Skan#define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X) 175418334Speter 175518334Speter#define SYMBOLIC_CONST(X) \ 175690285Sobrien (GET_CODE (X) == SYMBOL_REF \ 175790285Sobrien || GET_CODE (X) == LABEL_REF \ 175890285Sobrien || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X))) 175918334Speter 176018334Speter/* Go to LABEL if ADDR (a legitimate address expression) 176118334Speter has an effect that depends on the machine mode it is used for. 176218334Speter On the 80386, only postdecrement and postincrement address depend thus 176318334Speter (the amount of decrement or increment being the length of the operand). */ 176490285Sobrien#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ 176590285Sobriendo { \ 176690285Sobrien if (GET_CODE (ADDR) == POST_INC \ 176790285Sobrien || GET_CODE (ADDR) == POST_DEC) \ 176890285Sobrien goto LABEL; \ 176990285Sobrien} while (0) 177018334Speter 177118334Speter/* Max number of args passed in registers. If this is more than 3, we will 177218334Speter have problems with ebx (register #4), since it is a caller save register and 177318334Speter is also used as the pic register in ELF. So for now, don't allow more than 177418334Speter 3 registers to be passed in registers. */ 177518334Speter 177690285Sobrien#define REGPARM_MAX (TARGET_64BIT ? 6 : 3) 177718334Speter 1778132744Skan#define SSE_REGPARM_MAX (TARGET_64BIT ? 8 : (TARGET_SSE ? 3 : 0)) 177990285Sobrien 1780132744Skan#define MMX_REGPARM_MAX (TARGET_64BIT ? 0 : (TARGET_MMX ? 3 : 0)) 1781132744Skan 178218334Speter 178318334Speter/* Specify the machine mode that this machine uses 178418334Speter for the index in the tablejump instruction. */ 178590285Sobrien#define CASE_VECTOR_MODE (!TARGET_64BIT || flag_pic ? SImode : DImode) 178618334Speter 178718334Speter/* Define this as 1 if `char' should by default be signed; else as 0. */ 178818334Speter#define DEFAULT_SIGNED_CHAR 1 178918334Speter 179090285Sobrien/* Number of bytes moved into a data cache for a single prefetch operation. */ 179190285Sobrien#define PREFETCH_BLOCK ix86_cost->prefetch_block 179290285Sobrien 179390285Sobrien/* Number of prefetch operations that can be done in parallel. */ 179490285Sobrien#define SIMULTANEOUS_PREFETCHES ix86_cost->simultaneous_prefetches 179590285Sobrien 179618334Speter/* Max number of bytes we can move from memory to memory 179718334Speter in one reasonably fast instruction. */ 179890285Sobrien#define MOVE_MAX 16 179918334Speter 180090285Sobrien/* MOVE_MAX_PIECES is the number of bytes at a time which we can 180190285Sobrien move efficiently, as opposed to MOVE_MAX which is the maximum 180290285Sobrien number of bytes we can move with a single instruction. */ 180390285Sobrien#define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4) 180490285Sobrien 180552295Sobrien/* If a memory-to-memory move would take MOVE_RATIO or more simple 1806169706Skan move-instruction pairs, we will do a movmem or libcall instead. 180752295Sobrien Increasing the value will always make code faster, but eventually 180852295Sobrien incurs high cost in increased code size. 180918334Speter 181090285Sobrien If you don't define this, a reasonable default is used. */ 181118334Speter 181290285Sobrien#define MOVE_RATIO (optimize_size ? 3 : ix86_cost->move_ratio) 181318334Speter 1814169706Skan/* If a clear memory operation would take CLEAR_RATIO or more simple 1815169706Skan move-instruction sequences, we will do a clrmem or libcall instead. */ 1816169706Skan 1817169706Skan#define CLEAR_RATIO (optimize_size ? 2 \ 1818169706Skan : ix86_cost->move_ratio > 6 ? 6 : ix86_cost->move_ratio) 1819169706Skan 182018334Speter/* Define if shifts truncate the shift count 182118334Speter which implies one can omit a sign-extension or zero-extension 182218334Speter of a shift count. */ 182390285Sobrien/* On i386, shifts do truncate the count. But bit opcodes don't. */ 182418334Speter 182518334Speter/* #define SHIFT_COUNT_TRUNCATED */ 182618334Speter 182718334Speter/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 182818334Speter is done just by pretending it is already truncated. */ 182918334Speter#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 183018334Speter 183190285Sobrien/* A macro to update M and UNSIGNEDP when an object whose type is 183290285Sobrien TYPE and which has the specified mode and signedness is to be 183390285Sobrien stored in a register. This macro is only called when TYPE is a 183490285Sobrien scalar type. 183590285Sobrien 183690285Sobrien On i386 it is sometimes useful to promote HImode and QImode 183790285Sobrien quantities to SImode. The choice depends on target type. */ 183890285Sobrien 183990285Sobrien#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ 184090285Sobriendo { \ 184190285Sobrien if (((MODE) == HImode && TARGET_PROMOTE_HI_REGS) \ 184290285Sobrien || ((MODE) == QImode && TARGET_PROMOTE_QI_REGS)) \ 184390285Sobrien (MODE) = SImode; \ 184490285Sobrien} while (0) 184590285Sobrien 184618334Speter/* Specify the machine mode that pointers have. 184718334Speter After generation of rtl, the compiler makes no further distinction 184818334Speter between pointers and any other objects of this machine mode. */ 184990285Sobrien#define Pmode (TARGET_64BIT ? DImode : SImode) 185018334Speter 185118334Speter/* A function address in a call instruction 185218334Speter is a byte address (for indexing purposes) 185318334Speter so give the MEM rtx a byte's mode. */ 185418334Speter#define FUNCTION_MODE QImode 185550654Sobrien 185690285Sobrien/* A C expression for the cost of moving data from a register in class FROM to 185790285Sobrien one in class TO. The classes are expressed using the enumeration values 185890285Sobrien such as `GENERAL_REGS'. A value of 2 is the default; other values are 185990285Sobrien interpreted relative to that. 186050654Sobrien 186190285Sobrien It is not required that the cost always equal 2 when FROM is the same as TO; 186290285Sobrien on some machines it is expensive to move between registers if they are not 186390285Sobrien general registers. */ 186450654Sobrien 186590285Sobrien#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ 186690285Sobrien ix86_register_move_cost ((MODE), (CLASS1), (CLASS2)) 186750654Sobrien 186850654Sobrien/* A C expression for the cost of moving data of mode M between a 186950654Sobrien register and memory. A value of 2 is the default; this cost is 187050654Sobrien relative to those in `REGISTER_MOVE_COST'. 187150654Sobrien 187250654Sobrien If moving between registers and memory is more expensive than 187350654Sobrien between two registers, you should define this macro to express the 187450654Sobrien relative cost. */ 187550654Sobrien 187690285Sobrien#define MEMORY_MOVE_COST(MODE, CLASS, IN) \ 187790285Sobrien ix86_memory_move_cost ((MODE), (CLASS), (IN)) 187850654Sobrien 187950654Sobrien/* A C expression for the cost of a branch instruction. A value of 1 188050654Sobrien is the default; other values are interpreted relative to that. */ 188150654Sobrien 188290285Sobrien#define BRANCH_COST ix86_branch_cost 188350654Sobrien 188450654Sobrien/* Define this macro as a C expression which is nonzero if accessing 188550654Sobrien less than a word of memory (i.e. a `char' or a `short') is no 188650654Sobrien faster than accessing a word of memory, i.e., if such access 188750654Sobrien require more than one instruction or if there is no difference in 188850654Sobrien cost between byte and (aligned) word loads. 188950654Sobrien 189050654Sobrien When this macro is not defined, the compiler will access a field by 189150654Sobrien finding the smallest containing object; when it is defined, a 189250654Sobrien fullword load will be used if alignment permits. Unless bytes 189350654Sobrien accesses are faster than word accesses, using word accesses is 189450654Sobrien preferable since it may eliminate subsequent memory access if 189550654Sobrien subsequent accesses occur to other fields in the same word of the 189650654Sobrien structure, but to different bytes. */ 189750654Sobrien 189850654Sobrien#define SLOW_BYTE_ACCESS 0 189950654Sobrien 190050654Sobrien/* Nonzero if access to memory by shorts is slow and undesirable. */ 190150654Sobrien#define SLOW_SHORT_ACCESS 0 190250654Sobrien 190350654Sobrien/* Define this macro to be the value 1 if unaligned accesses have a 190450654Sobrien cost many times greater than aligned accesses, for example if they 190550654Sobrien are emulated in a trap handler. 190650654Sobrien 1907117407Skan When this macro is nonzero, the compiler will act as if 1908117407Skan `STRICT_ALIGNMENT' were nonzero when generating code for block 190950654Sobrien moves. This can cause significantly more instructions to be 1910117407Skan produced. Therefore, do not set this macro nonzero if unaligned 191150654Sobrien accesses only add a cycle or two to the time for a memory access. 191250654Sobrien 191350654Sobrien If the value of this macro is always zero, it need not be defined. */ 191450654Sobrien 191590285Sobrien/* #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 0 */ 191650654Sobrien 191750654Sobrien/* Define this macro if it is as good or better to call a constant 191850654Sobrien function address than to call an address kept in a register. 191950654Sobrien 192050654Sobrien Desirable on the 386 because a CALL with a constant address is 192150654Sobrien faster than one with a register address. */ 192250654Sobrien 192350654Sobrien#define NO_FUNCTION_CSE 192490285Sobrien 192518334Speter/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, 192618334Speter return the mode to be used for the comparison. 192718334Speter 192818334Speter For floating-point equality comparisons, CCFPEQmode should be used. 192990285Sobrien VOIDmode should be used in all other cases. 193018334Speter 193190285Sobrien For integer comparisons against zero, reduce to CCNOmode or CCZmode if 193290285Sobrien possible, to allow for more combinations. */ 193318334Speter 193490285Sobrien#define SELECT_CC_MODE(OP, X, Y) ix86_cc_mode ((OP), (X), (Y)) 193518334Speter 1936117407Skan/* Return nonzero if MODE implies a floating point inequality can be 193790285Sobrien reversed. */ 193818334Speter 193990285Sobrien#define REVERSIBLE_CC_MODE(MODE) 1 194018334Speter 194190285Sobrien/* A C expression whose value is reversed condition code of the CODE for 194290285Sobrien comparison done in CC_MODE mode. */ 1943169706Skan#define REVERSE_CONDITION(CODE, MODE) ix86_reverse_condition ((CODE), (MODE)) 194418334Speter 194518334Speter 194618334Speter/* Control the assembler format that we output, to the extent 194718334Speter this does not vary between assemblers. */ 194818334Speter 194918334Speter/* How to refer to registers in assembler output. 195090285Sobrien This sequence is indexed by compiler's hard-register-number (see above). */ 195118334Speter 1952169706Skan/* In order to refer to the first 8 regs as 32 bit regs, prefix an "e". 195318334Speter For non floating point regs, the following are the HImode names. 195418334Speter 195518334Speter For float regs, the stack top is sometimes referred to as "%st(0)" 1956132744Skan instead of just "%st". PRINT_OPERAND handles this with the "y" code. */ 195718334Speter 195890285Sobrien#define HI_REGISTER_NAMES \ 195990285Sobrien{"ax","dx","cx","bx","si","di","bp","sp", \ 1960132744Skan "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)", \ 1961237021Spfg "argp", "flags", "fpsr", "dirflag", "frame", \ 196290285Sobrien "xmm0","xmm1","xmm2","xmm3","xmm4","xmm5","xmm6","xmm7", \ 1963237021Spfg "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7" , \ 196490285Sobrien "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ 196590285Sobrien "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"} 196618334Speter 196718334Speter#define REGISTER_NAMES HI_REGISTER_NAMES 196818334Speter 196918334Speter/* Table of additional register names to use in user input. */ 197018334Speter 197118334Speter#define ADDITIONAL_REGISTER_NAMES \ 197250654Sobrien{ { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \ 197350654Sobrien { "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \ 197490285Sobrien { "rax", 0 }, { "rdx", 1 }, { "rcx", 2 }, { "rbx", 3 }, \ 197590285Sobrien { "rsi", 4 }, { "rdi", 5 }, { "rbp", 6 }, { "rsp", 7 }, \ 197650654Sobrien { "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 }, \ 1977169706Skan { "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 } } 197818334Speter 197918334Speter/* Note we are omitting these since currently I don't know how 198018334Speterto get gcc to use these, since they want the same but different 198118334Speternumber as al, and ax. 198218334Speter*/ 198318334Speter 198418334Speter#define QI_REGISTER_NAMES \ 198590285Sobrien{"al", "dl", "cl", "bl", "sil", "dil", "bpl", "spl",} 198618334Speter 198718334Speter/* These parallel the array above, and can be used to access bits 8:15 198890285Sobrien of regs 0 through 3. */ 198918334Speter 199018334Speter#define QI_HIGH_REGISTER_NAMES \ 199118334Speter{"ah", "dh", "ch", "bh", } 199218334Speter 199318334Speter/* How to renumber registers for dbx and gdb. */ 199418334Speter 199590285Sobrien#define DBX_REGISTER_NUMBER(N) \ 199690285Sobrien (TARGET_64BIT ? dbx64_register_map[(N)] : dbx_register_map[(N)]) 199718334Speter 199890285Sobrienextern int const dbx_register_map[FIRST_PSEUDO_REGISTER]; 199990285Sobrienextern int const dbx64_register_map[FIRST_PSEUDO_REGISTER]; 200090285Sobrienextern int const svr4_dbx_register_map[FIRST_PSEUDO_REGISTER]; 200190285Sobrien 200250654Sobrien/* Before the prologue, RA is at 0(%esp). */ 200350654Sobrien#define INCOMING_RETURN_ADDR_RTX \ 200450654Sobrien gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM)) 2005117407Skan 200650654Sobrien/* After the prologue, RA is at -4(AP) in the current frame. */ 200790285Sobrien#define RETURN_ADDR_RTX(COUNT, FRAME) \ 200890285Sobrien ((COUNT) == 0 \ 200990285Sobrien ? gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -UNITS_PER_WORD)) \ 201090285Sobrien : gen_rtx_MEM (Pmode, plus_constant (FRAME, UNITS_PER_WORD))) 201150654Sobrien 201290285Sobrien/* PC is dbx register 8; let's use that column for RA. */ 201390285Sobrien#define DWARF_FRAME_RETURN_COLUMN (TARGET_64BIT ? 16 : 8) 201450654Sobrien 201550654Sobrien/* Before the prologue, the top of the frame is at 4(%esp). */ 201690285Sobrien#define INCOMING_FRAME_SP_OFFSET UNITS_PER_WORD 201750654Sobrien 201890285Sobrien/* Describe how we implement __builtin_eh_return. */ 201990285Sobrien#define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? (N) : INVALID_REGNUM) 202090285Sobrien#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 2) 202118334Speter 202218334Speter 202390285Sobrien/* Select a format to encode pointers in exception handling data. CODE 202490285Sobrien is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is 202590285Sobrien true if the symbol may be affected by dynamic relocations. 202618334Speter 202790285Sobrien ??? All x86 object file formats are capable of representing this. 202890285Sobrien After all, the relocation needed is the same as for the call insn. 202990285Sobrien Whether or not a particular assembler allows us to enter such, I 203090285Sobrien guess we'll have to see. */ 203190285Sobrien#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \ 2032169706Skan asm_preferred_eh_data_format ((CODE), (GLOBAL)) 203318334Speter 203418334Speter/* This is how to output an insn to push a register on the stack. 203518334Speter It need not be very fast code. */ 203618334Speter 203790285Sobrien#define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \ 2038107598Sobriendo { \ 2039107598Sobrien if (TARGET_64BIT) \ 2040107598Sobrien asm_fprintf ((FILE), "\tpush{q}\t%%r%s\n", \ 2041107598Sobrien reg_names[(REGNO)] + (REX_INT_REGNO_P (REGNO) != 0)); \ 2042107598Sobrien else \ 2043107598Sobrien asm_fprintf ((FILE), "\tpush{l}\t%%e%s\n", reg_names[(REGNO)]); \ 2044107598Sobrien} while (0) 204518334Speter 204618334Speter/* This is how to output an insn to pop a register from the stack. 204718334Speter It need not be very fast code. */ 204818334Speter 204990285Sobrien#define ASM_OUTPUT_REG_POP(FILE, REGNO) \ 2050107598Sobriendo { \ 2051107598Sobrien if (TARGET_64BIT) \ 2052107598Sobrien asm_fprintf ((FILE), "\tpop{q}\t%%r%s\n", \ 2053107598Sobrien reg_names[(REGNO)] + (REX_INT_REGNO_P (REGNO) != 0)); \ 2054107598Sobrien else \ 2055107598Sobrien asm_fprintf ((FILE), "\tpop{l}\t%%e%s\n", reg_names[(REGNO)]); \ 2056107598Sobrien} while (0) 205718334Speter 205890285Sobrien/* This is how to output an element of a case-vector that is absolute. */ 205918334Speter 206018334Speter#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 206190285Sobrien ix86_output_addr_vec_elt ((FILE), (VALUE)) 206218334Speter 206390285Sobrien/* This is how to output an element of a case-vector that is relative. */ 206418334Speter 206550654Sobrien#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 206690285Sobrien ix86_output_addr_diff_elt ((FILE), (VALUE), (REL)) 206718334Speter 2068169706Skan/* Under some conditions we need jump tables in the text section, 2069169706Skan because the assembler cannot handle label differences between 2070169706Skan sections. This is the case for x86_64 on Mach-O for example. */ 207118334Speter 207290285Sobrien#define JUMP_TABLES_IN_TEXT_SECTION \ 2073169706Skan (flag_pic && ((TARGET_MACHO && TARGET_64BIT) \ 2074169706Skan || (!TARGET_64BIT && !HAVE_AS_GOTOFF_IN_DATA))) 207518334Speter 207690285Sobrien/* Switch to init or fini section via SECTION_OP, emit a call to FUNC, 207790285Sobrien and switch back. For x86 we do this only to save a few bytes that 207890285Sobrien would otherwise be unused in the text section. */ 207990285Sobrien#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \ 208090285Sobrien asm (SECTION_OP "\n\t" \ 208190285Sobrien "call " USER_LABEL_PREFIX #FUNC "\n" \ 208290285Sobrien TEXT_SECTION_ASM_OP); 208318334Speter 208418334Speter/* Print operand X (an rtx) in assembler syntax to file FILE. 208518334Speter CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 208690285Sobrien Effect of various CODE letters is described in i386.c near 208790285Sobrien print_operand function. */ 208818334Speter 208990285Sobrien#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 2090117407Skan ((CODE) == '*' || (CODE) == '+' || (CODE) == '&') 209118334Speter 209218334Speter#define PRINT_OPERAND(FILE, X, CODE) \ 209390285Sobrien print_operand ((FILE), (X), (CODE)) 209418334Speter 209518334Speter#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 209690285Sobrien print_operand_address ((FILE), (ADDR)) 209718334Speter 2098117407Skan#define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL) \ 2099117407Skando { \ 2100117407Skan if (! output_addr_const_extra (FILE, (X))) \ 2101117407Skan goto FAIL; \ 2102117407Skan} while (0); 2103117407Skan 210418334Speter/* a letter which is not needed by the normal asm syntax, which 210518334Speter we can use for operand syntax in the extended asm */ 210618334Speter 210718334Speter#define ASM_OPERAND_LETTER '#' 210818334Speter#define RET return "" 210990285Sobrien#define AT_SP(MODE) (gen_rtx_MEM ((MODE), stack_pointer_rtx)) 211018334Speter 2111117407Skan/* Which processor to schedule for. The cpu attribute defines a list that 2112117407Skan mirrors this list, so changes to i386.md must be made at the same time. */ 2113117407Skan 2114117407Skanenum processor_type 2115117407Skan{ 2116117407Skan PROCESSOR_I386, /* 80386 */ 2117117407Skan PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */ 2118117407Skan PROCESSOR_PENTIUM, 2119117407Skan PROCESSOR_PENTIUMPRO, 2120219374Smm PROCESSOR_GEODE, 2121117407Skan PROCESSOR_K6, 2122117407Skan PROCESSOR_ATHLON, 2123117407Skan PROCESSOR_PENTIUM4, 2124132744Skan PROCESSOR_K8, 2125169706Skan PROCESSOR_NOCONA, 2126219374Smm PROCESSOR_CORE2, 2127169706Skan PROCESSOR_GENERIC32, 2128169706Skan PROCESSOR_GENERIC64, 2129251212Spfg PROCESSOR_AMDFAM10, 2130117407Skan PROCESSOR_max 2131117407Skan}; 2132117407Skan 2133132744Skanextern enum processor_type ix86_tune; 2134117407Skanextern enum processor_type ix86_arch; 2135117407Skan 2136117407Skanenum fpmath_unit 2137117407Skan{ 2138117407Skan FPMATH_387 = 1, 2139117407Skan FPMATH_SSE = 2 2140117407Skan}; 2141117407Skan 2142117407Skanextern enum fpmath_unit ix86_fpmath; 2143117407Skan 2144117407Skanenum tls_dialect 2145117407Skan{ 2146117407Skan TLS_DIALECT_GNU, 2147169706Skan TLS_DIALECT_GNU2, 2148117407Skan TLS_DIALECT_SUN 2149117407Skan}; 2150117407Skan 2151117407Skanextern enum tls_dialect ix86_tls_dialect; 2152117407Skan 215390285Sobrienenum cmodel { 2154117407Skan CM_32, /* The traditional 32-bit ABI. */ 2155117407Skan CM_SMALL, /* Assumes all code and data fits in the low 31 bits. */ 2156117407Skan CM_KERNEL, /* Assumes all code and data fits in the high 31 bits. */ 2157117407Skan CM_MEDIUM, /* Assumes code fits in the low 31 bits; data unlimited. */ 2158117407Skan CM_LARGE, /* No assumptions. */ 2159169706Skan CM_SMALL_PIC, /* Assumes code+data+got/plt fits in a 31 bit region. */ 2160169706Skan CM_MEDIUM_PIC /* Assumes code+got/plt fits in a 31 bit region. */ 216190285Sobrien}; 216218334Speter 2163117407Skanextern enum cmodel ix86_cmodel; 2164117407Skan 216590285Sobrien/* Size of the RED_ZONE area. */ 216690285Sobrien#define RED_ZONE_SIZE 128 216790285Sobrien/* Reserved area of the red zone for temporaries. */ 216890285Sobrien#define RED_ZONE_RESERVE 8 216950654Sobrien 217090285Sobrienenum asm_dialect { 217190285Sobrien ASM_ATT, 217290285Sobrien ASM_INTEL 217390285Sobrien}; 2174117407Skan 217590285Sobrienextern enum asm_dialect ix86_asm_dialect; 2176169706Skanextern unsigned int ix86_preferred_stack_boundary; 2177169706Skanextern int ix86_branch_cost, ix86_section_threshold; 2178117407Skan 2179117407Skan/* Smallest class containing REGNO. */ 2180117407Skanextern enum reg_class const regclass_map[FIRST_PSEUDO_REGISTER]; 2181117407Skan 218290285Sobrienextern rtx ix86_compare_op0; /* operand 0 for comparisons */ 218390285Sobrienextern rtx ix86_compare_op1; /* operand 1 for comparisons */ 2184169706Skanextern rtx ix86_compare_emitted; 218590285Sobrien 218690285Sobrien/* To properly truncate FP values into integers, we need to set i387 control 218790285Sobrien word. We can't emit proper mode switching code before reload, as spills 218890285Sobrien generated by reload may truncate values incorrectly, but we still can avoid 218990285Sobrien redundant computation of new control word by the mode switching pass. 219090285Sobrien The fldcw instructions are still emitted redundantly, but this is probably 219190285Sobrien not going to be noticeable problem, as most CPUs do have fast path for 2192117407Skan the sequence. 219318334Speter 219490285Sobrien The machinery is to emit simple truncation instructions and split them 219590285Sobrien before reload to instructions having USEs of two memory locations that 219690285Sobrien are filled by this code to old and new control word. 2197117407Skan 219890285Sobrien Post-reload pass may be later used to eliminate the redundant fildcw if 219990285Sobrien needed. */ 220018334Speter 2201169706Skanenum ix86_entity 2202169706Skan{ 2203169706Skan I387_TRUNC = 0, 2204169706Skan I387_FLOOR, 2205169706Skan I387_CEIL, 2206169706Skan I387_MASK_PM, 2207169706Skan MAX_386_ENTITIES 2208169706Skan}; 220950654Sobrien 2210169706Skanenum ix86_stack_slot 2211169706Skan{ 2212171836Skan SLOT_VIRTUAL = 0, 2213171836Skan SLOT_TEMP, 2214169706Skan SLOT_CW_STORED, 2215169706Skan SLOT_CW_TRUNC, 2216169706Skan SLOT_CW_FLOOR, 2217169706Skan SLOT_CW_CEIL, 2218169706Skan SLOT_CW_MASK_PM, 2219169706Skan MAX_386_STACK_LOCALS 2220169706Skan}; 2221169706Skan 222290285Sobrien/* Define this macro if the port needs extra instructions inserted 222390285Sobrien for mode switching in an optimizing compilation. */ 222490285Sobrien 2225169706Skan#define OPTIMIZE_MODE_SWITCHING(ENTITY) \ 2226169706Skan ix86_optimize_mode_switching[(ENTITY)] 222790285Sobrien 222890285Sobrien/* If you define `OPTIMIZE_MODE_SWITCHING', you have to define this as 222990285Sobrien initializer for an array of integers. Each initializer element N 223090285Sobrien refers to an entity that needs mode switching, and specifies the 223190285Sobrien number of different modes that might need to be set for this 223290285Sobrien entity. The position of the initializer in the initializer - 223390285Sobrien starting counting at zero - determines the integer that is used to 223490285Sobrien refer to the mode-switched entity in question. */ 223590285Sobrien 2236169706Skan#define NUM_MODES_FOR_MODE_SWITCHING \ 2237169706Skan { I387_CW_ANY, I387_CW_ANY, I387_CW_ANY, I387_CW_ANY } 223890285Sobrien 223990285Sobrien/* ENTITY is an integer specifying a mode-switched entity. If 224090285Sobrien `OPTIMIZE_MODE_SWITCHING' is defined, you must define this macro to 224190285Sobrien return an integer value not larger than the corresponding element 224290285Sobrien in `NUM_MODES_FOR_MODE_SWITCHING', to denote the mode that ENTITY 2243169706Skan must be switched into prior to the execution of INSN. */ 224490285Sobrien 2245169706Skan#define MODE_NEEDED(ENTITY, I) ix86_mode_needed ((ENTITY), (I)) 224690285Sobrien 224790285Sobrien/* This macro specifies the order in which modes for ENTITY are 224890285Sobrien processed. 0 is the highest priority. */ 224990285Sobrien 225090285Sobrien#define MODE_PRIORITY_TO_MODE(ENTITY, N) (N) 225190285Sobrien 225290285Sobrien/* Generate one or more insns to set ENTITY to MODE. HARD_REG_LIVE 225390285Sobrien is the set of hard registers live at the point where the insn(s) 225490285Sobrien are to be inserted. */ 225590285Sobrien 225690285Sobrien#define EMIT_MODE_SET(ENTITY, MODE, HARD_REGS_LIVE) \ 2257169706Skan ((MODE) != I387_CW_ANY && (MODE) != I387_CW_UNINITIALIZED \ 2258169706Skan ? emit_i387_cw_initialization (MODE), 0 \ 225990285Sobrien : 0) 2260169706Skan 226118334Speter 226290285Sobrien/* Avoid renaming of stack registers, as doing so in combination with 226390285Sobrien scheduling just increases amount of live registers at time and in 226490285Sobrien the turn amount of fxch instructions needed. 226590285Sobrien 2266132744Skan ??? Maybe Pentium chips benefits from renaming, someone can try.... */ 226790285Sobrien 226890285Sobrien#define HARD_REGNO_RENAME_OK(SRC, TARGET) \ 2269237021Spfg ((SRC) < FIRST_STACK_REG || (SRC) > LAST_STACK_REG) 227090285Sobrien 227190285Sobrien 2272132744Skan#define DLL_IMPORT_EXPORT_PREFIX '#' 2273117407Skan 2274132744Skan#define FASTCALL_PREFIX '@' 2275132744Skan 2276132744Skanstruct machine_function GTY(()) 2277132744Skan{ 2278132744Skan struct stack_local_entry *stack_locals; 2279132744Skan const char *some_ld_name; 2280169706Skan rtx force_align_arg_pointer; 2281132744Skan int save_varrargs_registers; 2282132744Skan int accesses_prev_frame; 2283169706Skan int optimize_mode_switching[MAX_386_ENTITIES]; 2284132744Skan /* Set by ix86_compute_frame_layout and used by prologue/epilogue expander to 2285132744Skan determine the style used. */ 2286132744Skan int use_fast_prologue_epilogue; 2287132744Skan /* Number of saved registers USE_FAST_PROLOGUE_EPILOGUE has been computed 2288132744Skan for. */ 2289132744Skan int use_fast_prologue_epilogue_nregs; 2290169706Skan /* If true, the current function needs the default PIC register, not 2291169706Skan an alternate register (on x86) and must not use the red zone (on 2292169706Skan x86_64), even if it's a leaf function. We don't want the 2293169706Skan function to be regarded as non-leaf because TLS calls need not 2294169706Skan affect register allocation. This flag is set when a TLS call 2295169706Skan instruction is expanded within a function, and never reset, even 2296169706Skan if all such instructions are optimized away. Use the 2297169706Skan ix86_current_function_calls_tls_descriptor macro for a better 2298169706Skan approximation. */ 2299169706Skan int tls_descriptor_call_expanded_p; 2300132744Skan}; 2301117407Skan 2302132744Skan#define ix86_stack_locals (cfun->machine->stack_locals) 2303132744Skan#define ix86_save_varrargs_registers (cfun->machine->save_varrargs_registers) 2304132744Skan#define ix86_optimize_mode_switching (cfun->machine->optimize_mode_switching) 2305169706Skan#define ix86_tls_descriptor_calls_expanded_in_cfun \ 2306169706Skan (cfun->machine->tls_descriptor_call_expanded_p) 2307169706Skan/* Since tls_descriptor_call_expanded is not cleared, even if all TLS 2308169706Skan calls are optimized away, we try to detect cases in which it was 2309169706Skan optimized away. Since such instructions (use (reg REG_SP)), we can 2310169706Skan verify whether there's any such instruction live by testing that 2311169706Skan REG_SP is live. */ 2312169706Skan#define ix86_current_function_calls_tls_descriptor \ 2313169706Skan (ix86_tls_descriptor_calls_expanded_in_cfun && regs_ever_live[SP_REG]) 2314132744Skan 2315132744Skan/* Control behavior of x86_file_start. */ 2316132744Skan#define X86_FILE_START_VERSION_DIRECTIVE false 2317132744Skan#define X86_FILE_START_FLTUSED false 2318132744Skan 2319169706Skan/* Flag to mark data that is in the large address area. */ 2320169706Skan#define SYMBOL_FLAG_FAR_ADDR (SYMBOL_FLAG_MACH_DEP << 0) 2321169706Skan#define SYMBOL_REF_FAR_ADDR_P(X) \ 2322169706Skan ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_FAR_ADDR) != 0) 232318334Speter/* 232418334SpeterLocal variables: 232518334Speterversion-control: t 232618334SpeterEnd: 232718334Speter*/ 2328