1251212Spfg/* Copyright (C) 2007 Free Software Foundation, Inc.
2251212Spfg
3251212Spfg   This file is part of GCC.
4251212Spfg
5251212Spfg   GCC is free software; you can redistribute it and/or modify
6251212Spfg   it under the terms of the GNU General Public License as published by
7251212Spfg   the Free Software Foundation; either version 2, or (at your option)
8251212Spfg   any later version.
9251212Spfg
10251212Spfg   GCC is distributed in the hope that it will be useful,
11251212Spfg   but WITHOUT ANY WARRANTY; without even the implied warranty of
12251212Spfg   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13251212Spfg   GNU General Public License for more details.
14251212Spfg
15251212Spfg   You should have received a copy of the GNU General Public License
16251212Spfg   along with GCC; see the file COPYING.  If not, write to
17251212Spfg   the Free Software Foundation, 51 Franklin Street, Fifth Floor,
18251212Spfg   Boston, MA 02110-1301, USA.  */
19251212Spfg
20251212Spfg/* As a special exception, if you include this header file into source
21251212Spfg   files compiled by GCC, this header file does not by itself cause
22251212Spfg   the resulting executable to be covered by the GNU General Public
23251212Spfg   License.  This exception does not however invalidate any other
24251212Spfg   reasons why the executable file might be covered by the GNU General
25251212Spfg   Public License.  */
26251212Spfg
27251212Spfg/* Implemented from the specification included in the AMD Programmers
28251212Spfg   Manual Update, version 2.x */
29251212Spfg
30251212Spfg#ifndef _AMMINTRIN_H_INCLUDED
31251212Spfg#define _AMMINTRIN_H_INCLUDED
32251212Spfg
33251212Spfg#ifndef __SSE4A__
34251212Spfg# error "SSE4A instruction set not enabled"
35251212Spfg#else
36251212Spfg
37251212Spfg/* We need definitions from the SSE3, SSE2 and SSE header files*/
38251212Spfg#include <pmmintrin.h>
39251212Spfg
40251212Spfgstatic __inline void __attribute__((__always_inline__))
41251212Spfg_mm_stream_sd (double * __P, __m128d __Y)
42251212Spfg{
43251212Spfg  __builtin_ia32_movntsd (__P, (__v2df) __Y);
44251212Spfg}
45251212Spfg
46251212Spfgstatic __inline void __attribute__((__always_inline__))
47251212Spfg_mm_stream_ss (float * __P, __m128 __Y)
48251212Spfg{
49251212Spfg  __builtin_ia32_movntss (__P, (__v4sf) __Y);
50251212Spfg}
51251212Spfg
52251212Spfgstatic __inline __m128i __attribute__((__always_inline__))
53251212Spfg_mm_extract_si64 (__m128i __X, __m128i __Y)
54251212Spfg{
55251212Spfg  return (__m128i) __builtin_ia32_extrq ((__v2di) __X, (__v16qi) __Y);
56251212Spfg}
57251212Spfg
58251212Spfg#define _mm_extracti_si64(X, I, L) \
59251212Spfg((__m128i) __builtin_ia32_extrqi ((__v2di)(X), I, L))
60251212Spfg
61251212Spfgstatic __inline __m128i __attribute__((__always_inline__))
62251212Spfg_mm_insert_si64 (__m128i __X,__m128i __Y)
63251212Spfg{
64251212Spfg  return (__m128i) __builtin_ia32_insertq ((__v2di)__X, (__v2di)__Y);
65251212Spfg}
66251212Spfg
67251212Spfg#define _mm_inserti_si64(X, Y, I, L) \
68251212Spfg((__m128i) __builtin_ia32_insertqi ((__v2di)(X), (__v2di)(Y), I, L))
69251212Spfg
70251212Spfg
71251212Spfg#endif /* __SSE4A__ */
72251212Spfg
73251212Spfg#endif /* _AMMINTRIN_H_INCLUDED */
74