1214571Sdim/* SPU opcode list 2214571Sdim 3214571Sdim Copyright 2006 Free Software Foundation, Inc. 4214571Sdim 5214571Sdim This file is part of GDB, GAS, and the GNU binutils. 6214571Sdim 7214571Sdim This program is free software; you can redistribute it and/or modify 8214571Sdim it under the terms of the GNU General Public License as published by 9214571Sdim the Free Software Foundation; either version 2 of the License, or 10214571Sdim (at your option) any later version. 11214571Sdim 12214571Sdim This program is distributed in the hope that it will be useful, 13214571Sdim but WITHOUT ANY WARRANTY; without even the implied warranty of 14214571Sdim MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15214571Sdim GNU General Public License for more details. 16214571Sdim 17214571Sdim You should have received a copy of the GNU General Public License along 18214571Sdim with this program; if not, write to the Free Software Foundation, Inc., 19214571Sdim 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 20214571Sdim 21214571Sdim#include "opcode/spu.h" 22214571Sdim 23214571Sdim/* This file holds the Spu opcode table */ 24214571Sdim 25214571Sdim 26214571Sdim/* 27214571Sdim Example contents of spu-insn.h 28214571Sdim id_tag mode mode type opcode mnemonic asmtype dependency FPU L/S? branch? instruction 29214571Sdim QUAD WORD (0,RC,RB,RA,RT) latency 30214571Sdim APUOP(M_LQD, 1, 0, RI9, 0x1f8, "lqd", ASM_RI9IDX, 00012, FXU, 1, 0) Load Quadword d-form 31214571Sdim */ 32214571Sdim 33214571Sdimconst struct spu_opcode spu_opcodes[] = { 34214571Sdim#define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \ 35214571Sdim { MACFORMAT, OPCODE, MNEMONIC, ASMFORMAT }, 36214571Sdim#define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \ 37214571Sdim { MACFORMAT, OPCODE, MNEMONIC, ASMFORMAT }, 38214571Sdim#include "opcode/spu-insns.h" 39214571Sdim#undef APUOP 40214571Sdim#undef APUOPFB 41214571Sdim}; 42214571Sdim 43214571Sdimconst int spu_num_opcodes = 44214571Sdim sizeof (spu_opcodes) / sizeof (spu_opcodes[0]); 45