ia64-opc.h revision 218822
1122205Sharti/* ia64-opc.h -- IA-64 opcode table. 2122205Sharti Copyright 1998, 1999, 2000, 2002, 2005, 2006 3122205Sharti Free Software Foundation, Inc. 4122205Sharti Contributed by David Mosberger-Tang <davidm@hpl.hp.com> 5122205Sharti 6122205Sharti This file is part of GDB, GAS, and the GNU binutils. 7122205Sharti 8122205Sharti GDB, GAS, and the GNU binutils are free software; you can redistribute 9122205Sharti them and/or modify them under the terms of the GNU General Public 10122205Sharti License as published by the Free Software Foundation; either version 11122205Sharti 2, or (at your option) any later version. 12122205Sharti 13122205Sharti GDB, GAS, and the GNU binutils are distributed in the hope that they 14122205Sharti will be useful, but WITHOUT ANY WARRANTY; without even the implied 15122205Sharti warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See 16122205Sharti the GNU General Public License for more details. 17122205Sharti 18122205Sharti You should have received a copy of the GNU General Public License 19122205Sharti along with this file; see the file COPYING. If not, write to the 20122205Sharti Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 21122205Sharti 02110-1301, USA. */ 22122205Sharti 23122205Sharti#ifndef IA64_OPC_H 24122205Sharti#define IA64_OPC_H 25122205Sharti 26122205Sharti#include "opcode/ia64.h" 27122205Sharti 28122205Sharti/* define a couple of abbreviations: */ 29131826Sharti 30122205Sharti#define bOp(x) (((ia64_insn) ((x) & 0xf)) << 37) 31122205Sharti#define mOp bOp (-1) 32122205Sharti#define Op(x) bOp (x), mOp 33122205Sharti 34122205Sharti#define FIRST IA64_OPCODE_FIRST 35122205Sharti#define X_IN_MLX IA64_OPCODE_X_IN_MLX 36122205Sharti#define LAST IA64_OPCODE_LAST 37122205Sharti#define PRIV IA64_OPCODE_PRIV 38122205Sharti#define NO_PRED IA64_OPCODE_NO_PRED 39122205Sharti#define SLOT2 IA64_OPCODE_SLOT2 40122205Sharti#define PSEUDO IA64_OPCODE_PSEUDO 41122205Sharti#define F2_EQ_F3 IA64_OPCODE_F2_EQ_F3 42122205Sharti#define LEN_EQ_64MCNT IA64_OPCODE_LEN_EQ_64MCNT 43122205Sharti#define MOD_RRBS IA64_OPCODE_MOD_RRBS 44122205Sharti#define POSTINC IA64_OPCODE_POSTINC 45122205Sharti 46122205Sharti#define AR_CCV IA64_OPND_AR_CCV 47122205Sharti#define AR_PFS IA64_OPND_AR_PFS 48122205Sharti#define AR_CSD IA64_OPND_AR_CSD 49122205Sharti#define C1 IA64_OPND_C1 50122205Sharti#define C8 IA64_OPND_C8 51122205Sharti#define C16 IA64_OPND_C16 52122205Sharti#define GR0 IA64_OPND_GR0 53122205Sharti#define IP IA64_OPND_IP 54122205Sharti#define PR IA64_OPND_PR 55122205Sharti#define PR_ROT IA64_OPND_PR_ROT 56122205Sharti#define PSR IA64_OPND_PSR 57122205Sharti#define PSR_L IA64_OPND_PSR_L 58122205Sharti#define PSR_UM IA64_OPND_PSR_UM 59122205Sharti 60122205Sharti#define AR3 IA64_OPND_AR3 61122205Sharti#define B1 IA64_OPND_B1 62122205Sharti#define B2 IA64_OPND_B2 63122205Sharti#define CR3 IA64_OPND_CR3 64122205Sharti#define F1 IA64_OPND_F1 65122205Sharti#define F2 IA64_OPND_F2 66122205Sharti#define F3 IA64_OPND_F3 67122205Sharti#define F4 IA64_OPND_F4 68122205Sharti#define P1 IA64_OPND_P1 69122205Sharti#define P2 IA64_OPND_P2 70122205Sharti#define R1 IA64_OPND_R1 71122205Sharti#define R2 IA64_OPND_R2 72122205Sharti#define R3 IA64_OPND_R3 73122205Sharti#define R3_2 IA64_OPND_R3_2 74122205Sharti 75122205Sharti#define CPUID_R3 IA64_OPND_CPUID_R3 76122205Sharti#define DBR_R3 IA64_OPND_DBR_R3 77122205Sharti#define DTR_R3 IA64_OPND_DTR_R3 78122205Sharti#define ITR_R3 IA64_OPND_ITR_R3 79122205Sharti#define IBR_R3 IA64_OPND_IBR_R3 80122205Sharti#define MR3 IA64_OPND_MR3 81122205Sharti#define MSR_R3 IA64_OPND_MSR_R3 82122205Sharti#define PKR_R3 IA64_OPND_PKR_R3 83122205Sharti#define PMC_R3 IA64_OPND_PMC_R3 84122205Sharti#define PMD_R3 IA64_OPND_PMD_R3 85122205Sharti#define RR_R3 IA64_OPND_RR_R3 86122205Sharti 87122205Sharti#define CCNT5 IA64_OPND_CCNT5 88122205Sharti#define CNT2a IA64_OPND_CNT2a 89122205Sharti#define CNT2b IA64_OPND_CNT2b 90122205Sharti#define CNT2c IA64_OPND_CNT2c 91122205Sharti#define CNT5 IA64_OPND_CNT5 92122205Sharti#define CNT6 IA64_OPND_CNT6 93122205Sharti#define CPOS6a IA64_OPND_CPOS6a 94122205Sharti#define CPOS6b IA64_OPND_CPOS6b 95122205Sharti#define CPOS6c IA64_OPND_CPOS6c 96122205Sharti#define IMM1 IA64_OPND_IMM1 97122205Sharti#define IMM14 IA64_OPND_IMM14 98122205Sharti#define IMM17 IA64_OPND_IMM17 99122205Sharti#define IMM22 IA64_OPND_IMM22 100122205Sharti#define IMM44 IA64_OPND_IMM44 101122205Sharti#define SOF IA64_OPND_SOF 102122205Sharti#define SOL IA64_OPND_SOL 103122205Sharti#define SOR IA64_OPND_SOR 104122205Sharti#define IMM8 IA64_OPND_IMM8 105122205Sharti#define IMM8U4 IA64_OPND_IMM8U4 106122205Sharti#define IMM8M1 IA64_OPND_IMM8M1 107122205Sharti#define IMM8M1U4 IA64_OPND_IMM8M1U4 108122205Sharti#define IMM8M1U8 IA64_OPND_IMM8M1U8 109122205Sharti#define IMM9a IA64_OPND_IMM9a 110122205Sharti#define IMM9b IA64_OPND_IMM9b 111122205Sharti#define IMMU2 IA64_OPND_IMMU2 112122205Sharti#define IMMU21 IA64_OPND_IMMU21 113122205Sharti#define IMMU24 IA64_OPND_IMMU24 114122205Sharti#define IMMU62 IA64_OPND_IMMU62 115122205Sharti#define IMMU64 IA64_OPND_IMMU64 116122205Sharti#define IMMU5b IA64_OPND_IMMU5b 117122205Sharti#define IMMU7a IA64_OPND_IMMU7a 118122205Sharti#define IMMU7b IA64_OPND_IMMU7b 119122205Sharti#define IMMU9 IA64_OPND_IMMU9 120122205Sharti#define INC3 IA64_OPND_INC3 121122205Sharti#define LEN4 IA64_OPND_LEN4 122122205Sharti#define LEN6 IA64_OPND_LEN6 123122205Sharti#define MBTYPE4 IA64_OPND_MBTYPE4 124122205Sharti#define MHTYPE8 IA64_OPND_MHTYPE8 125122205Sharti#define POS6 IA64_OPND_POS6 126122205Sharti#define TAG13 IA64_OPND_TAG13 127122205Sharti#define TAG13b IA64_OPND_TAG13b 128122205Sharti#define TGT25 IA64_OPND_TGT25 129122205Sharti#define TGT25b IA64_OPND_TGT25b 130122205Sharti#define TGT25c IA64_OPND_TGT25c 131122205Sharti#define TGT64 IA64_OPND_TGT64 132122205Sharti 133122205Sharti#endif 134122205Sharti