ia64-opc.h revision 130561
184865Sobrien/* ia64-opc.h -- IA-64 opcode table. 284865Sobrien Copyright 1998, 1999, 2000 Free Software Foundation, Inc. 384865Sobrien Contributed by David Mosberger-Tang <davidm@hpl.hp.com> 484865Sobrien 584865Sobrien This file is part of GDB, GAS, and the GNU binutils. 684865Sobrien 784865Sobrien GDB, GAS, and the GNU binutils are free software; you can redistribute 884865Sobrien them and/or modify them under the terms of the GNU General Public 984865Sobrien License as published by the Free Software Foundation; either version 1084865Sobrien 2, or (at your option) any later version. 1184865Sobrien 1284865Sobrien GDB, GAS, and the GNU binutils are distributed in the hope that they 1384865Sobrien will be useful, but WITHOUT ANY WARRANTY; without even the implied 1484865Sobrien warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See 1584865Sobrien the GNU General Public License for more details. 1684865Sobrien 1784865Sobrien You should have received a copy of the GNU General Public License 1884865Sobrien along with this file; see the file COPYING. If not, write to the 1984865Sobrien Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 2084865Sobrien 02111-1307, USA. */ 2184865Sobrien 2284865Sobrien#ifndef IA64_OPC_H 2384865Sobrien#define IA64_OPC_H 2484865Sobrien 2584865Sobrien#include "opcode/ia64.h" 2684865Sobrien 2784865Sobrien/* define a couple of abbreviations: */ 2884865Sobrien 2984865Sobrien#define bOp(x) (((ia64_insn) ((x) & 0xf)) << 37) 3084865Sobrien#define mOp bOp (-1) 3184865Sobrien#define Op(x) bOp (x), mOp 3284865Sobrien 3384865Sobrien#define FIRST IA64_OPCODE_FIRST 3484865Sobrien#define X_IN_MLX IA64_OPCODE_X_IN_MLX 3584865Sobrien#define LAST IA64_OPCODE_LAST 3684865Sobrien#define PRIV IA64_OPCODE_PRIV 3784865Sobrien#define NO_PRED IA64_OPCODE_NO_PRED 3884865Sobrien#define SLOT2 IA64_OPCODE_SLOT2 3984865Sobrien#define PSEUDO IA64_OPCODE_PSEUDO 4084865Sobrien#define F2_EQ_F3 IA64_OPCODE_F2_EQ_F3 4184865Sobrien#define LEN_EQ_64MCNT IA64_OPCODE_LEN_EQ_64MCNT 4284865Sobrien#define MOD_RRBS IA64_OPCODE_MOD_RRBS 4384865Sobrien#define POSTINC IA64_OPCODE_POSTINC 4484865Sobrien 4584865Sobrien#define AR_CCV IA64_OPND_AR_CCV 4684865Sobrien#define AR_PFS IA64_OPND_AR_PFS 47130561Sobrien#define AR_CSD IA64_OPND_AR_CSD 4884865Sobrien#define C1 IA64_OPND_C1 4984865Sobrien#define C8 IA64_OPND_C8 5084865Sobrien#define C16 IA64_OPND_C16 5184865Sobrien#define GR0 IA64_OPND_GR0 5284865Sobrien#define IP IA64_OPND_IP 5384865Sobrien#define PR IA64_OPND_PR 5484865Sobrien#define PR_ROT IA64_OPND_PR_ROT 5584865Sobrien#define PSR IA64_OPND_PSR 5684865Sobrien#define PSR_L IA64_OPND_PSR_L 5784865Sobrien#define PSR_UM IA64_OPND_PSR_UM 5884865Sobrien 5984865Sobrien#define AR3 IA64_OPND_AR3 6084865Sobrien#define B1 IA64_OPND_B1 6184865Sobrien#define B2 IA64_OPND_B2 6284865Sobrien#define CR3 IA64_OPND_CR3 6384865Sobrien#define F1 IA64_OPND_F1 6484865Sobrien#define F2 IA64_OPND_F2 6584865Sobrien#define F3 IA64_OPND_F3 6684865Sobrien#define F4 IA64_OPND_F4 6784865Sobrien#define P1 IA64_OPND_P1 6884865Sobrien#define P2 IA64_OPND_P2 6984865Sobrien#define R1 IA64_OPND_R1 7084865Sobrien#define R2 IA64_OPND_R2 7184865Sobrien#define R3 IA64_OPND_R3 7284865Sobrien#define R3_2 IA64_OPND_R3_2 7384865Sobrien 7484865Sobrien#define CPUID_R3 IA64_OPND_CPUID_R3 7584865Sobrien#define DBR_R3 IA64_OPND_DBR_R3 7684865Sobrien#define DTR_R3 IA64_OPND_DTR_R3 7784865Sobrien#define ITR_R3 IA64_OPND_ITR_R3 7884865Sobrien#define IBR_R3 IA64_OPND_IBR_R3 7984865Sobrien#define MR3 IA64_OPND_MR3 8084865Sobrien#define MSR_R3 IA64_OPND_MSR_R3 8184865Sobrien#define PKR_R3 IA64_OPND_PKR_R3 8284865Sobrien#define PMC_R3 IA64_OPND_PMC_R3 8384865Sobrien#define PMD_R3 IA64_OPND_PMD_R3 8484865Sobrien#define RR_R3 IA64_OPND_RR_R3 8584865Sobrien 8684865Sobrien#define CCNT5 IA64_OPND_CCNT5 8784865Sobrien#define CNT2a IA64_OPND_CNT2a 8884865Sobrien#define CNT2b IA64_OPND_CNT2b 8984865Sobrien#define CNT2c IA64_OPND_CNT2c 9084865Sobrien#define CNT5 IA64_OPND_CNT5 9184865Sobrien#define CNT6 IA64_OPND_CNT6 9284865Sobrien#define CPOS6a IA64_OPND_CPOS6a 9384865Sobrien#define CPOS6b IA64_OPND_CPOS6b 9484865Sobrien#define CPOS6c IA64_OPND_CPOS6c 9584865Sobrien#define IMM1 IA64_OPND_IMM1 9684865Sobrien#define IMM14 IA64_OPND_IMM14 9784865Sobrien#define IMM17 IA64_OPND_IMM17 9884865Sobrien#define IMM22 IA64_OPND_IMM22 9984865Sobrien#define IMM44 IA64_OPND_IMM44 10084865Sobrien#define SOF IA64_OPND_SOF 10184865Sobrien#define SOL IA64_OPND_SOL 10284865Sobrien#define SOR IA64_OPND_SOR 10384865Sobrien#define IMM8 IA64_OPND_IMM8 10484865Sobrien#define IMM8U4 IA64_OPND_IMM8U4 10584865Sobrien#define IMM8M1 IA64_OPND_IMM8M1 10684865Sobrien#define IMM8M1U4 IA64_OPND_IMM8M1U4 10784865Sobrien#define IMM8M1U8 IA64_OPND_IMM8M1U8 10884865Sobrien#define IMM9a IA64_OPND_IMM9a 10984865Sobrien#define IMM9b IA64_OPND_IMM9b 11084865Sobrien#define IMMU2 IA64_OPND_IMMU2 11184865Sobrien#define IMMU21 IA64_OPND_IMMU21 11284865Sobrien#define IMMU24 IA64_OPND_IMMU24 11384865Sobrien#define IMMU62 IA64_OPND_IMMU62 11484865Sobrien#define IMMU64 IA64_OPND_IMMU64 11584865Sobrien#define IMMU7a IA64_OPND_IMMU7a 11684865Sobrien#define IMMU7b IA64_OPND_IMMU7b 11784865Sobrien#define IMMU9 IA64_OPND_IMMU9 11884865Sobrien#define INC3 IA64_OPND_INC3 11984865Sobrien#define LEN4 IA64_OPND_LEN4 12084865Sobrien#define LEN6 IA64_OPND_LEN6 12184865Sobrien#define MBTYPE4 IA64_OPND_MBTYPE4 12284865Sobrien#define MHTYPE8 IA64_OPND_MHTYPE8 12384865Sobrien#define POS6 IA64_OPND_POS6 12484865Sobrien#define TAG13 IA64_OPND_TAG13 12584865Sobrien#define TAG13b IA64_OPND_TAG13b 12684865Sobrien#define TGT25 IA64_OPND_TGT25 12784865Sobrien#define TGT25b IA64_OPND_TGT25b 12884865Sobrien#define TGT25c IA64_OPND_TGT25c 12984865Sobrien#define TGT64 IA64_OPND_TGT64 13084865Sobrien 13184865Sobrien#endif 132