184865Sobrien/* ia64-opc.h -- IA-64 opcode table.
2218822Sdim   Copyright 1998, 1999, 2000, 2002, 2005, 2006
3218822Sdim   Free Software Foundation, Inc.
484865Sobrien   Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
584865Sobrien
684865Sobrien   This file is part of GDB, GAS, and the GNU binutils.
784865Sobrien
884865Sobrien   GDB, GAS, and the GNU binutils are free software; you can redistribute
984865Sobrien   them and/or modify them under the terms of the GNU General Public
1084865Sobrien   License as published by the Free Software Foundation; either version
1184865Sobrien   2, or (at your option) any later version.
1284865Sobrien
1384865Sobrien   GDB, GAS, and the GNU binutils are distributed in the hope that they
1484865Sobrien   will be useful, but WITHOUT ANY WARRANTY; without even the implied
1584865Sobrien   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
1684865Sobrien   the GNU General Public License for more details.
1784865Sobrien
1884865Sobrien   You should have received a copy of the GNU General Public License
1984865Sobrien   along with this file; see the file COPYING.  If not, write to the
20218822Sdim   Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21218822Sdim   02110-1301, USA.  */
2284865Sobrien
2384865Sobrien#ifndef IA64_OPC_H
2484865Sobrien#define IA64_OPC_H
2584865Sobrien
2684865Sobrien#include "opcode/ia64.h"
2784865Sobrien
2884865Sobrien/* define a couple of abbreviations: */
2984865Sobrien
3084865Sobrien#define bOp(x)	(((ia64_insn) ((x) & 0xf)) << 37)
3184865Sobrien#define mOp	bOp (-1)
3284865Sobrien#define Op(x)	bOp (x), mOp
3384865Sobrien
3484865Sobrien#define FIRST		IA64_OPCODE_FIRST
3584865Sobrien#define X_IN_MLX	IA64_OPCODE_X_IN_MLX
3684865Sobrien#define LAST		IA64_OPCODE_LAST
3784865Sobrien#define PRIV		IA64_OPCODE_PRIV
3884865Sobrien#define NO_PRED		IA64_OPCODE_NO_PRED
3984865Sobrien#define SLOT2		IA64_OPCODE_SLOT2
4084865Sobrien#define PSEUDO		IA64_OPCODE_PSEUDO
4184865Sobrien#define F2_EQ_F3	IA64_OPCODE_F2_EQ_F3
4284865Sobrien#define LEN_EQ_64MCNT	IA64_OPCODE_LEN_EQ_64MCNT
4384865Sobrien#define MOD_RRBS        IA64_OPCODE_MOD_RRBS
4484865Sobrien#define POSTINC		IA64_OPCODE_POSTINC
4584865Sobrien
4684865Sobrien#define AR_CCV	IA64_OPND_AR_CCV
4784865Sobrien#define AR_PFS	IA64_OPND_AR_PFS
48130561Sobrien#define AR_CSD	IA64_OPND_AR_CSD
4984865Sobrien#define C1	IA64_OPND_C1
5084865Sobrien#define C8	IA64_OPND_C8
5184865Sobrien#define C16	IA64_OPND_C16
5284865Sobrien#define GR0	IA64_OPND_GR0
5384865Sobrien#define IP	IA64_OPND_IP
5484865Sobrien#define PR	IA64_OPND_PR
5584865Sobrien#define PR_ROT	IA64_OPND_PR_ROT
5684865Sobrien#define PSR	IA64_OPND_PSR
5784865Sobrien#define PSR_L	IA64_OPND_PSR_L
5884865Sobrien#define PSR_UM	IA64_OPND_PSR_UM
5984865Sobrien
6084865Sobrien#define AR3	IA64_OPND_AR3
6184865Sobrien#define B1	IA64_OPND_B1
6284865Sobrien#define B2	IA64_OPND_B2
6384865Sobrien#define CR3	IA64_OPND_CR3
6484865Sobrien#define F1	IA64_OPND_F1
6584865Sobrien#define F2	IA64_OPND_F2
6684865Sobrien#define F3	IA64_OPND_F3
6784865Sobrien#define F4	IA64_OPND_F4
6884865Sobrien#define P1	IA64_OPND_P1
6984865Sobrien#define P2	IA64_OPND_P2
7084865Sobrien#define R1	IA64_OPND_R1
7184865Sobrien#define R2	IA64_OPND_R2
7284865Sobrien#define R3	IA64_OPND_R3
7384865Sobrien#define R3_2	IA64_OPND_R3_2
7484865Sobrien
7584865Sobrien#define CPUID_R3 IA64_OPND_CPUID_R3
7684865Sobrien#define DBR_R3	IA64_OPND_DBR_R3
7784865Sobrien#define DTR_R3	IA64_OPND_DTR_R3
7884865Sobrien#define ITR_R3	IA64_OPND_ITR_R3
7984865Sobrien#define IBR_R3	IA64_OPND_IBR_R3
8084865Sobrien#define MR3	IA64_OPND_MR3
8184865Sobrien#define MSR_R3	IA64_OPND_MSR_R3
8284865Sobrien#define PKR_R3	IA64_OPND_PKR_R3
8384865Sobrien#define PMC_R3	IA64_OPND_PMC_R3
8484865Sobrien#define PMD_R3	IA64_OPND_PMD_R3
8584865Sobrien#define RR_R3	IA64_OPND_RR_R3
8684865Sobrien
8784865Sobrien#define CCNT5	IA64_OPND_CCNT5
8884865Sobrien#define CNT2a	IA64_OPND_CNT2a
8984865Sobrien#define CNT2b	IA64_OPND_CNT2b
9084865Sobrien#define CNT2c	IA64_OPND_CNT2c
9184865Sobrien#define CNT5	IA64_OPND_CNT5
9284865Sobrien#define CNT6	IA64_OPND_CNT6
9384865Sobrien#define CPOS6a	IA64_OPND_CPOS6a
9484865Sobrien#define CPOS6b	IA64_OPND_CPOS6b
9584865Sobrien#define CPOS6c	IA64_OPND_CPOS6c
9684865Sobrien#define IMM1	IA64_OPND_IMM1
9784865Sobrien#define IMM14	IA64_OPND_IMM14
9884865Sobrien#define IMM17	IA64_OPND_IMM17
9984865Sobrien#define IMM22	IA64_OPND_IMM22
10084865Sobrien#define IMM44	IA64_OPND_IMM44
10184865Sobrien#define SOF	IA64_OPND_SOF
10284865Sobrien#define SOL	IA64_OPND_SOL
10384865Sobrien#define SOR	IA64_OPND_SOR
10484865Sobrien#define IMM8	IA64_OPND_IMM8
10584865Sobrien#define IMM8U4	IA64_OPND_IMM8U4
10684865Sobrien#define IMM8M1	IA64_OPND_IMM8M1
10784865Sobrien#define IMM8M1U4 IA64_OPND_IMM8M1U4
10884865Sobrien#define IMM8M1U8 IA64_OPND_IMM8M1U8
10984865Sobrien#define IMM9a	IA64_OPND_IMM9a
11084865Sobrien#define IMM9b	IA64_OPND_IMM9b
11184865Sobrien#define IMMU2	IA64_OPND_IMMU2
11284865Sobrien#define IMMU21	IA64_OPND_IMMU21
11384865Sobrien#define IMMU24	IA64_OPND_IMMU24
11484865Sobrien#define IMMU62	IA64_OPND_IMMU62
11584865Sobrien#define IMMU64	IA64_OPND_IMMU64
116218822Sdim#define IMMU5b	IA64_OPND_IMMU5b
11784865Sobrien#define IMMU7a	IA64_OPND_IMMU7a
11884865Sobrien#define IMMU7b	IA64_OPND_IMMU7b
11984865Sobrien#define IMMU9	IA64_OPND_IMMU9
12084865Sobrien#define INC3	IA64_OPND_INC3
12184865Sobrien#define LEN4	IA64_OPND_LEN4
12284865Sobrien#define LEN6	IA64_OPND_LEN6
12384865Sobrien#define MBTYPE4	IA64_OPND_MBTYPE4
12484865Sobrien#define MHTYPE8	IA64_OPND_MHTYPE8
12584865Sobrien#define POS6	IA64_OPND_POS6
12684865Sobrien#define TAG13	IA64_OPND_TAG13
12784865Sobrien#define TAG13b	IA64_OPND_TAG13b
12884865Sobrien#define TGT25	IA64_OPND_TGT25
12984865Sobrien#define TGT25b	IA64_OPND_TGT25b
13084865Sobrien#define TGT25c	IA64_OPND_TGT25c
13184865Sobrien#define TGT64   IA64_OPND_TGT64
13284865Sobrien
13384865Sobrien#endif
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