i386-dis.c revision 85815
1/* Print i386 instructions for GDB, the GNU debugger. 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 3 2001 4 Free Software Foundation, Inc. 5 6This file is part of GDB. 7 8This program is free software; you can redistribute it and/or modify 9it under the terms of the GNU General Public License as published by 10the Free Software Foundation; either version 2 of the License, or 11(at your option) any later version. 12 13This program is distributed in the hope that it will be useful, 14but WITHOUT ANY WARRANTY; without even the implied warranty of 15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16GNU General Public License for more details. 17 18You should have received a copy of the GNU General Public License 19along with this program; if not, write to the Free Software 20Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 21 22/* 23 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu) 24 * July 1988 25 * modified by John Hassey (hassey@dg-rtp.dg.com) 26 * x86-64 support added by Jan Hubicka (jh@suse.cz) 27 */ 28 29/* 30 * The main tables describing the instructions is essentially a copy 31 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386 32 * Programmers Manual. Usually, there is a capital letter, followed 33 * by a small letter. The capital letter tell the addressing mode, 34 * and the small letter tells about the operand size. Refer to 35 * the Intel manual for details. 36 */ 37 38#include "dis-asm.h" 39#include "sysdep.h" 40#include "opintl.h" 41 42#define MAXLEN 20 43 44#include <setjmp.h> 45 46#ifndef UNIXWARE_COMPAT 47/* Set non-zero for broken, compatible instructions. Set to zero for 48 non-broken opcodes. */ 49#define UNIXWARE_COMPAT 1 50#endif 51 52static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *)); 53static void ckprefix PARAMS ((void)); 54static const char *prefix_name PARAMS ((int, int)); 55static int print_insn_i386 PARAMS ((bfd_vma, disassemble_info *)); 56static void dofloat PARAMS ((int)); 57static void OP_ST PARAMS ((int, int)); 58static void OP_STi PARAMS ((int, int)); 59static int putop PARAMS ((const char *, int)); 60static void oappend PARAMS ((const char *)); 61static void append_seg PARAMS ((void)); 62static void OP_indirE PARAMS ((int, int)); 63static void print_operand_value PARAMS ((char *, int, bfd_vma)); 64static void OP_E PARAMS ((int, int)); 65static void OP_G PARAMS ((int, int)); 66static bfd_vma get64 PARAMS ((void)); 67static bfd_signed_vma get32 PARAMS ((void)); 68static bfd_signed_vma get32s PARAMS ((void)); 69static int get16 PARAMS ((void)); 70static void set_op PARAMS ((bfd_vma, int)); 71static void OP_REG PARAMS ((int, int)); 72static void OP_IMREG PARAMS ((int, int)); 73static void OP_I PARAMS ((int, int)); 74static void OP_I64 PARAMS ((int, int)); 75static void OP_sI PARAMS ((int, int)); 76static void OP_J PARAMS ((int, int)); 77static void OP_SEG PARAMS ((int, int)); 78static void OP_DIR PARAMS ((int, int)); 79static void OP_OFF PARAMS ((int, int)); 80static void OP_OFF64 PARAMS ((int, int)); 81static void ptr_reg PARAMS ((int, int)); 82static void OP_ESreg PARAMS ((int, int)); 83static void OP_DSreg PARAMS ((int, int)); 84static void OP_C PARAMS ((int, int)); 85static void OP_D PARAMS ((int, int)); 86static void OP_T PARAMS ((int, int)); 87static void OP_Rd PARAMS ((int, int)); 88static void OP_MMX PARAMS ((int, int)); 89static void OP_XMM PARAMS ((int, int)); 90static void OP_EM PARAMS ((int, int)); 91static void OP_EX PARAMS ((int, int)); 92static void OP_MS PARAMS ((int, int)); 93static void OP_XS PARAMS ((int, int)); 94static void OP_3DNowSuffix PARAMS ((int, int)); 95static void OP_SIMD_Suffix PARAMS ((int, int)); 96static void SIMD_Fixup PARAMS ((int, int)); 97static void BadOp PARAMS ((void)); 98 99struct dis_private { 100 /* Points to first byte not fetched. */ 101 bfd_byte *max_fetched; 102 bfd_byte the_buffer[MAXLEN]; 103 bfd_vma insn_start; 104 jmp_buf bailout; 105}; 106 107/* The opcode for the fwait instruction, which we treat as a prefix 108 when we can. */ 109#define FWAIT_OPCODE (0x9b) 110 111/* Set to 1 for 64bit mode disassembly. */ 112static int mode_64bit; 113 114/* Flags for the prefixes for the current instruction. See below. */ 115static int prefixes; 116 117/* REX prefix the current instruction. See below. */ 118static int rex; 119/* Bits of REX we've already used. */ 120static int rex_used; 121#define REX_MODE64 8 122#define REX_EXTX 4 123#define REX_EXTY 2 124#define REX_EXTZ 1 125/* Mark parts used in the REX prefix. When we are testing for 126 empty prefix (for 8bit register REX extension), just mask it 127 out. Otherwise test for REX bit is excuse for existence of REX 128 only in case value is nonzero. */ 129#define USED_REX(value) \ 130 { \ 131 if (value) \ 132 rex_used |= (rex & value) ? (value) | 0x40 : 0; \ 133 else \ 134 rex_used |= 0x40; \ 135 } 136 137/* Flags for prefixes which we somehow handled when printing the 138 current instruction. */ 139static int used_prefixes; 140 141/* Flags stored in PREFIXES. */ 142#define PREFIX_REPZ 1 143#define PREFIX_REPNZ 2 144#define PREFIX_LOCK 4 145#define PREFIX_CS 8 146#define PREFIX_SS 0x10 147#define PREFIX_DS 0x20 148#define PREFIX_ES 0x40 149#define PREFIX_FS 0x80 150#define PREFIX_GS 0x100 151#define PREFIX_DATA 0x200 152#define PREFIX_ADDR 0x400 153#define PREFIX_FWAIT 0x800 154 155/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive) 156 to ADDR (exclusive) are valid. Returns 1 for success, longjmps 157 on error. */ 158#define FETCH_DATA(info, addr) \ 159 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \ 160 ? 1 : fetch_data ((info), (addr))) 161 162static int 163fetch_data (info, addr) 164 struct disassemble_info *info; 165 bfd_byte *addr; 166{ 167 int status; 168 struct dis_private *priv = (struct dis_private *) info->private_data; 169 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer); 170 171 status = (*info->read_memory_func) (start, 172 priv->max_fetched, 173 addr - priv->max_fetched, 174 info); 175 if (status != 0) 176 { 177 /* If we did manage to read at least one byte, then 178 print_insn_i386 will do something sensible. Otherwise, print 179 an error. We do that here because this is where we know 180 STATUS. */ 181 if (priv->max_fetched == priv->the_buffer) 182 (*info->memory_error_func) (status, start, info); 183 longjmp (priv->bailout, 1); 184 } 185 else 186 priv->max_fetched = addr; 187 return 1; 188} 189 190#define XX NULL, 0 191 192#define Eb OP_E, b_mode 193#define Ev OP_E, v_mode 194#define Ed OP_E, d_mode 195#define indirEb OP_indirE, b_mode 196#define indirEv OP_indirE, v_mode 197#define Ew OP_E, w_mode 198#define Ma OP_E, v_mode 199#define M OP_E, 0 /* lea, lgdt, etc. */ 200#define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */ 201#define Gb OP_G, b_mode 202#define Gv OP_G, v_mode 203#define Gd OP_G, d_mode 204#define Gw OP_G, w_mode 205#define Rd OP_Rd, d_mode 206#define Rm OP_Rd, m_mode 207#define Ib OP_I, b_mode 208#define sIb OP_sI, b_mode /* sign extened byte */ 209#define Iv OP_I, v_mode 210#define Iq OP_I, q_mode 211#define Iv64 OP_I64, v_mode 212#define Iw OP_I, w_mode 213#define Jb OP_J, b_mode 214#define Jv OP_J, v_mode 215#define Cm OP_C, m_mode 216#define Dm OP_D, m_mode 217#define Td OP_T, d_mode 218 219#define RMeAX OP_REG, eAX_reg 220#define RMeBX OP_REG, eBX_reg 221#define RMeCX OP_REG, eCX_reg 222#define RMeDX OP_REG, eDX_reg 223#define RMeSP OP_REG, eSP_reg 224#define RMeBP OP_REG, eBP_reg 225#define RMeSI OP_REG, eSI_reg 226#define RMeDI OP_REG, eDI_reg 227#define RMrAX OP_REG, rAX_reg 228#define RMrBX OP_REG, rBX_reg 229#define RMrCX OP_REG, rCX_reg 230#define RMrDX OP_REG, rDX_reg 231#define RMrSP OP_REG, rSP_reg 232#define RMrBP OP_REG, rBP_reg 233#define RMrSI OP_REG, rSI_reg 234#define RMrDI OP_REG, rDI_reg 235#define RMAL OP_REG, al_reg 236#define RMAL OP_REG, al_reg 237#define RMCL OP_REG, cl_reg 238#define RMDL OP_REG, dl_reg 239#define RMBL OP_REG, bl_reg 240#define RMAH OP_REG, ah_reg 241#define RMCH OP_REG, ch_reg 242#define RMDH OP_REG, dh_reg 243#define RMBH OP_REG, bh_reg 244#define RMAX OP_REG, ax_reg 245#define RMDX OP_REG, dx_reg 246 247#define eAX OP_IMREG, eAX_reg 248#define eBX OP_IMREG, eBX_reg 249#define eCX OP_IMREG, eCX_reg 250#define eDX OP_IMREG, eDX_reg 251#define eSP OP_IMREG, eSP_reg 252#define eBP OP_IMREG, eBP_reg 253#define eSI OP_IMREG, eSI_reg 254#define eDI OP_IMREG, eDI_reg 255#define AL OP_IMREG, al_reg 256#define AL OP_IMREG, al_reg 257#define CL OP_IMREG, cl_reg 258#define DL OP_IMREG, dl_reg 259#define BL OP_IMREG, bl_reg 260#define AH OP_IMREG, ah_reg 261#define CH OP_IMREG, ch_reg 262#define DH OP_IMREG, dh_reg 263#define BH OP_IMREG, bh_reg 264#define AX OP_IMREG, ax_reg 265#define DX OP_IMREG, dx_reg 266#define indirDX OP_IMREG, indir_dx_reg 267 268#define Sw OP_SEG, w_mode 269#define Ap OP_DIR, 0 270#define Ob OP_OFF, b_mode 271#define Ob64 OP_OFF64, b_mode 272#define Ov OP_OFF, v_mode 273#define Ov64 OP_OFF64, v_mode 274#define Xb OP_DSreg, eSI_reg 275#define Xv OP_DSreg, eSI_reg 276#define Yb OP_ESreg, eDI_reg 277#define Yv OP_ESreg, eDI_reg 278#define DSBX OP_DSreg, eBX_reg 279 280#define es OP_REG, es_reg 281#define ss OP_REG, ss_reg 282#define cs OP_REG, cs_reg 283#define ds OP_REG, ds_reg 284#define fs OP_REG, fs_reg 285#define gs OP_REG, gs_reg 286 287#define MX OP_MMX, 0 288#define XM OP_XMM, 0 289#define EM OP_EM, v_mode 290#define EX OP_EX, v_mode 291#define MS OP_MS, v_mode 292#define XS OP_XS, v_mode 293#define None OP_E, 0 294#define OPSUF OP_3DNowSuffix, 0 295#define OPSIMD OP_SIMD_Suffix, 0 296 297#define cond_jump_flag NULL, cond_jump_mode 298#define loop_jcxz_flag NULL, loop_jcxz_mode 299 300/* bits in sizeflag */ 301#if 0 /* Leave undefined until someone adds the extra flag to objdump. */ 302#define SUFFIX_ALWAYS 4 303#endif 304#define AFLAG 2 305#define DFLAG 1 306 307#define b_mode 1 /* byte operand */ 308#define v_mode 2 /* operand size depends on prefixes */ 309#define w_mode 3 /* word operand */ 310#define d_mode 4 /* double word operand */ 311#define q_mode 5 /* quad word operand */ 312#define x_mode 6 313#define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */ 314#define cond_jump_mode 8 315#define loop_jcxz_mode 9 316 317#define es_reg 100 318#define cs_reg 101 319#define ss_reg 102 320#define ds_reg 103 321#define fs_reg 104 322#define gs_reg 105 323 324#define eAX_reg 108 325#define eCX_reg 109 326#define eDX_reg 110 327#define eBX_reg 111 328#define eSP_reg 112 329#define eBP_reg 113 330#define eSI_reg 114 331#define eDI_reg 115 332 333#define al_reg 116 334#define cl_reg 117 335#define dl_reg 118 336#define bl_reg 119 337#define ah_reg 120 338#define ch_reg 121 339#define dh_reg 122 340#define bh_reg 123 341 342#define ax_reg 124 343#define cx_reg 125 344#define dx_reg 126 345#define bx_reg 127 346#define sp_reg 128 347#define bp_reg 129 348#define si_reg 130 349#define di_reg 131 350 351#define rAX_reg 132 352#define rCX_reg 133 353#define rDX_reg 134 354#define rBX_reg 135 355#define rSP_reg 136 356#define rBP_reg 137 357#define rSI_reg 138 358#define rDI_reg 139 359 360#define indir_dx_reg 150 361 362#define FLOATCODE 1 363#define USE_GROUPS 2 364#define USE_PREFIX_USER_TABLE 3 365#define X86_64_SPECIAL 4 366 367#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0 368 369#define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0 370#define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0 371#define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0 372#define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0 373#define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0 374#define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0 375#define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0 376#define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0 377#define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0 378#define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0 379#define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0 380#define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0 381#define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0 382#define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0 383#define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0 384#define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0 385#define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0 386#define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0 387#define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0 388#define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0 389#define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0 390#define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0 391#define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0 392 393#define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0 394#define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0 395#define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0 396#define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0 397#define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0 398#define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0 399#define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0 400#define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0 401#define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0 402#define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0 403#define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0 404#define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0 405#define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0 406#define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0 407#define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0 408#define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0 409#define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0 410#define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0 411#define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0 412#define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0 413#define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0 414#define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0 415#define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0 416#define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0 417#define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0 418#define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0 419#define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0 420 421#define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0 422 423typedef void (*op_rtn) PARAMS ((int bytemode, int sizeflag)); 424 425struct dis386 { 426 const char *name; 427 op_rtn op1; 428 int bytemode1; 429 op_rtn op2; 430 int bytemode2; 431 op_rtn op3; 432 int bytemode3; 433}; 434 435/* Upper case letters in the instruction names here are macros. 436 'A' => print 'b' if no register operands or suffix_always is true 437 'B' => print 'b' if suffix_always is true 438 'E' => print 'e' if 32-bit form of jcxz 439 'F' => print 'w' or 'l' depending on address size prefix (loop insns) 440 'H' => print ",pt" or ",pn" branch hint 441 'L' => print 'l' if suffix_always is true 442 'N' => print 'n' if instruction has no wait "prefix" 443 'O' => print 'd', or 'o' 444 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix, 445 or suffix_always is true 446 print 'q' if rex prefix is present. 447 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always is true 448 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode) 449 'S' => print 'w', 'l' or 'q' if suffix_always is true 450 'T' => print 'q' in 64bit mode and behave as 'P' otherwise 451 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise 452 'X' => print 's', 'd' depending on data16 prefix (for XMM) 453 'W' => print 'b' or 'w' ("w" or "de" in intel mode) 454 'Y' => 'q' if instruction has an REX 64bit overwrite prefix 455 456 Many of the above letters print nothing in Intel mode. See "putop" 457 for the details. 458 459 Braces '{' and '}', and vertical bars '|', indicate alternative 460 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel 461 modes. In cases where there are only two alternatives, the X86_64 462 instruction is reserved, and "(bad)" is printed. 463*/ 464 465static const struct dis386 dis386[] = { 466 /* 00 */ 467 { "addB", Eb, Gb, XX }, 468 { "addS", Ev, Gv, XX }, 469 { "addB", Gb, Eb, XX }, 470 { "addS", Gv, Ev, XX }, 471 { "addB", AL, Ib, XX }, 472 { "addS", eAX, Iv, XX }, 473 { "push{T|}", es, XX, XX }, 474 { "pop{T|}", es, XX, XX }, 475 /* 08 */ 476 { "orB", Eb, Gb, XX }, 477 { "orS", Ev, Gv, XX }, 478 { "orB", Gb, Eb, XX }, 479 { "orS", Gv, Ev, XX }, 480 { "orB", AL, Ib, XX }, 481 { "orS", eAX, Iv, XX }, 482 { "push{T|}", cs, XX, XX }, 483 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */ 484 /* 10 */ 485 { "adcB", Eb, Gb, XX }, 486 { "adcS", Ev, Gv, XX }, 487 { "adcB", Gb, Eb, XX }, 488 { "adcS", Gv, Ev, XX }, 489 { "adcB", AL, Ib, XX }, 490 { "adcS", eAX, Iv, XX }, 491 { "push{T|}", ss, XX, XX }, 492 { "popT|}", ss, XX, XX }, 493 /* 18 */ 494 { "sbbB", Eb, Gb, XX }, 495 { "sbbS", Ev, Gv, XX }, 496 { "sbbB", Gb, Eb, XX }, 497 { "sbbS", Gv, Ev, XX }, 498 { "sbbB", AL, Ib, XX }, 499 { "sbbS", eAX, Iv, XX }, 500 { "push{T|}", ds, XX, XX }, 501 { "pop{T|}", ds, XX, XX }, 502 /* 20 */ 503 { "andB", Eb, Gb, XX }, 504 { "andS", Ev, Gv, XX }, 505 { "andB", Gb, Eb, XX }, 506 { "andS", Gv, Ev, XX }, 507 { "andB", AL, Ib, XX }, 508 { "andS", eAX, Iv, XX }, 509 { "(bad)", XX, XX, XX }, /* SEG ES prefix */ 510 { "daa{|}", XX, XX, XX }, 511 /* 28 */ 512 { "subB", Eb, Gb, XX }, 513 { "subS", Ev, Gv, XX }, 514 { "subB", Gb, Eb, XX }, 515 { "subS", Gv, Ev, XX }, 516 { "subB", AL, Ib, XX }, 517 { "subS", eAX, Iv, XX }, 518 { "(bad)", XX, XX, XX }, /* SEG CS prefix */ 519 { "das{|}", XX, XX, XX }, 520 /* 30 */ 521 { "xorB", Eb, Gb, XX }, 522 { "xorS", Ev, Gv, XX }, 523 { "xorB", Gb, Eb, XX }, 524 { "xorS", Gv, Ev, XX }, 525 { "xorB", AL, Ib, XX }, 526 { "xorS", eAX, Iv, XX }, 527 { "(bad)", XX, XX, XX }, /* SEG SS prefix */ 528 { "aaa{|}", XX, XX, XX }, 529 /* 38 */ 530 { "cmpB", Eb, Gb, XX }, 531 { "cmpS", Ev, Gv, XX }, 532 { "cmpB", Gb, Eb, XX }, 533 { "cmpS", Gv, Ev, XX }, 534 { "cmpB", AL, Ib, XX }, 535 { "cmpS", eAX, Iv, XX }, 536 { "(bad)", XX, XX, XX }, /* SEG DS prefix */ 537 { "aas{|}", XX, XX, XX }, 538 /* 40 */ 539 { "inc{S|}", RMeAX, XX, XX }, 540 { "inc{S|}", RMeCX, XX, XX }, 541 { "inc{S|}", RMeDX, XX, XX }, 542 { "inc{S|}", RMeBX, XX, XX }, 543 { "inc{S|}", RMeSP, XX, XX }, 544 { "inc{S|}", RMeBP, XX, XX }, 545 { "inc{S|}", RMeSI, XX, XX }, 546 { "inc{S|}", RMeDI, XX, XX }, 547 /* 48 */ 548 { "dec{S|}", RMeAX, XX, XX }, 549 { "dec{S|}", RMeCX, XX, XX }, 550 { "dec{S|}", RMeDX, XX, XX }, 551 { "dec{S|}", RMeBX, XX, XX }, 552 { "dec{S|}", RMeSP, XX, XX }, 553 { "dec{S|}", RMeBP, XX, XX }, 554 { "dec{S|}", RMeSI, XX, XX }, 555 { "dec{S|}", RMeDI, XX, XX }, 556 /* 50 */ 557 { "pushS", RMrAX, XX, XX }, 558 { "pushS", RMrCX, XX, XX }, 559 { "pushS", RMrDX, XX, XX }, 560 { "pushS", RMrBX, XX, XX }, 561 { "pushS", RMrSP, XX, XX }, 562 { "pushS", RMrBP, XX, XX }, 563 { "pushS", RMrSI, XX, XX }, 564 { "pushS", RMrDI, XX, XX }, 565 /* 58 */ 566 { "popS", RMrAX, XX, XX }, 567 { "popS", RMrCX, XX, XX }, 568 { "popS", RMrDX, XX, XX }, 569 { "popS", RMrBX, XX, XX }, 570 { "popS", RMrSP, XX, XX }, 571 { "popS", RMrBP, XX, XX }, 572 { "popS", RMrSI, XX, XX }, 573 { "popS", RMrDI, XX, XX }, 574 /* 60 */ 575 { "pusha{P|}", XX, XX, XX }, 576 { "popa{P|}", XX, XX, XX }, 577 { "bound{S|}", Gv, Ma, XX }, 578 { X86_64_0 }, 579 { "(bad)", XX, XX, XX }, /* seg fs */ 580 { "(bad)", XX, XX, XX }, /* seg gs */ 581 { "(bad)", XX, XX, XX }, /* op size prefix */ 582 { "(bad)", XX, XX, XX }, /* adr size prefix */ 583 /* 68 */ 584 { "pushT", Iq, XX, XX }, 585 { "imulS", Gv, Ev, Iv }, 586 { "pushT", sIb, XX, XX }, 587 { "imulS", Gv, Ev, sIb }, 588 { "ins{b||b|}", Yb, indirDX, XX }, 589 { "ins{R||R|}", Yv, indirDX, XX }, 590 { "outs{b||b|}", indirDX, Xb, XX }, 591 { "outs{R||R|}", indirDX, Xv, XX }, 592 /* 70 */ 593 { "joH", Jb, XX, cond_jump_flag }, 594 { "jnoH", Jb, XX, cond_jump_flag }, 595 { "jbH", Jb, XX, cond_jump_flag }, 596 { "jaeH", Jb, XX, cond_jump_flag }, 597 { "jeH", Jb, XX, cond_jump_flag }, 598 { "jneH", Jb, XX, cond_jump_flag }, 599 { "jbeH", Jb, XX, cond_jump_flag }, 600 { "jaH", Jb, XX, cond_jump_flag }, 601 /* 78 */ 602 { "jsH", Jb, XX, cond_jump_flag }, 603 { "jnsH", Jb, XX, cond_jump_flag }, 604 { "jpH", Jb, XX, cond_jump_flag }, 605 { "jnpH", Jb, XX, cond_jump_flag }, 606 { "jlH", Jb, XX, cond_jump_flag }, 607 { "jgeH", Jb, XX, cond_jump_flag }, 608 { "jleH", Jb, XX, cond_jump_flag }, 609 { "jgH", Jb, XX, cond_jump_flag }, 610 /* 80 */ 611 { GRP1b }, 612 { GRP1S }, 613 { "(bad)", XX, XX, XX }, 614 { GRP1Ss }, 615 { "testB", Eb, Gb, XX }, 616 { "testS", Ev, Gv, XX }, 617 { "xchgB", Eb, Gb, XX }, 618 { "xchgS", Ev, Gv, XX }, 619 /* 88 */ 620 { "movB", Eb, Gb, XX }, 621 { "movS", Ev, Gv, XX }, 622 { "movB", Gb, Eb, XX }, 623 { "movS", Gv, Ev, XX }, 624 { "movQ", Ev, Sw, XX }, 625 { "leaS", Gv, M, XX }, 626 { "movQ", Sw, Ev, XX }, 627 { "popU", Ev, XX, XX }, 628 /* 90 */ 629 { "nop", XX, XX, XX }, 630 /* FIXME: NOP with REPz prefix is called PAUSE. */ 631 { "xchgS", RMeCX, eAX, XX }, 632 { "xchgS", RMeDX, eAX, XX }, 633 { "xchgS", RMeBX, eAX, XX }, 634 { "xchgS", RMeSP, eAX, XX }, 635 { "xchgS", RMeBP, eAX, XX }, 636 { "xchgS", RMeSI, eAX, XX }, 637 { "xchgS", RMeDI, eAX, XX }, 638 /* 98 */ 639 { "cW{tR||tR|}", XX, XX, XX }, 640 { "cR{tO||tO|}", XX, XX, XX }, 641 { "lcall{T|}", Ap, XX, XX }, 642 { "(bad)", XX, XX, XX }, /* fwait */ 643 { "pushfT", XX, XX, XX }, 644 { "popfT", XX, XX, XX }, 645 { "sahf{|}", XX, XX, XX }, 646 { "lahf{|}", XX, XX, XX }, 647 /* a0 */ 648 { "movB", AL, Ob64, XX }, 649 { "movS", eAX, Ov64, XX }, 650 { "movB", Ob64, AL, XX }, 651 { "movS", Ov64, eAX, XX }, 652 { "movs{b||b|}", Yb, Xb, XX }, 653 { "movs{R||R|}", Yv, Xv, XX }, 654 { "cmps{b||b|}", Xb, Yb, XX }, 655 { "cmps{R||R|}", Xv, Yv, XX }, 656 /* a8 */ 657 { "testB", AL, Ib, XX }, 658 { "testS", eAX, Iv, XX }, 659 { "stosB", Yb, AL, XX }, 660 { "stosS", Yv, eAX, XX }, 661 { "lodsB", AL, Xb, XX }, 662 { "lodsS", eAX, Xv, XX }, 663 { "scasB", AL, Yb, XX }, 664 { "scasS", eAX, Yv, XX }, 665 /* b0 */ 666 { "movB", RMAL, Ib, XX }, 667 { "movB", RMCL, Ib, XX }, 668 { "movB", RMDL, Ib, XX }, 669 { "movB", RMBL, Ib, XX }, 670 { "movB", RMAH, Ib, XX }, 671 { "movB", RMCH, Ib, XX }, 672 { "movB", RMDH, Ib, XX }, 673 { "movB", RMBH, Ib, XX }, 674 /* b8 */ 675 { "movS", RMeAX, Iv64, XX }, 676 { "movS", RMeCX, Iv64, XX }, 677 { "movS", RMeDX, Iv64, XX }, 678 { "movS", RMeBX, Iv64, XX }, 679 { "movS", RMeSP, Iv64, XX }, 680 { "movS", RMeBP, Iv64, XX }, 681 { "movS", RMeSI, Iv64, XX }, 682 { "movS", RMeDI, Iv64, XX }, 683 /* c0 */ 684 { GRP2b }, 685 { GRP2S }, 686 { "retT", Iw, XX, XX }, 687 { "retT", XX, XX, XX }, 688 { "les{S|}", Gv, Mp, XX }, 689 { "ldsS", Gv, Mp, XX }, 690 { "movA", Eb, Ib, XX }, 691 { "movQ", Ev, Iv, XX }, 692 /* c8 */ 693 { "enterT", Iw, Ib, XX }, 694 { "leaveT", XX, XX, XX }, 695 { "lretP", Iw, XX, XX }, 696 { "lretP", XX, XX, XX }, 697 { "int3", XX, XX, XX }, 698 { "int", Ib, XX, XX }, 699 { "into{|}", XX, XX, XX }, 700 { "iretP", XX, XX, XX }, 701 /* d0 */ 702 { GRP2b_one }, 703 { GRP2S_one }, 704 { GRP2b_cl }, 705 { GRP2S_cl }, 706 { "aam{|}", sIb, XX, XX }, 707 { "aad{|}", sIb, XX, XX }, 708 { "(bad)", XX, XX, XX }, 709 { "xlat", DSBX, XX, XX }, 710 /* d8 */ 711 { FLOAT }, 712 { FLOAT }, 713 { FLOAT }, 714 { FLOAT }, 715 { FLOAT }, 716 { FLOAT }, 717 { FLOAT }, 718 { FLOAT }, 719 /* e0 */ 720 { "loopneFH", Jb, XX, loop_jcxz_flag }, 721 { "loopeFH", Jb, XX, loop_jcxz_flag }, 722 { "loopFH", Jb, XX, loop_jcxz_flag }, 723 { "jEcxzH", Jb, XX, loop_jcxz_flag }, 724 { "inB", AL, Ib, XX }, 725 { "inS", eAX, Ib, XX }, 726 { "outB", Ib, AL, XX }, 727 { "outS", Ib, eAX, XX }, 728 /* e8 */ 729 { "callT", Jv, XX, XX }, 730 { "jmpT", Jv, XX, XX }, 731 { "ljmp{T|}", Ap, XX, XX }, 732 { "jmp", Jb, XX, XX }, 733 { "inB", AL, indirDX, XX }, 734 { "inS", eAX, indirDX, XX }, 735 { "outB", indirDX, AL, XX }, 736 { "outS", indirDX, eAX, XX }, 737 /* f0 */ 738 { "(bad)", XX, XX, XX }, /* lock prefix */ 739 { "(bad)", XX, XX, XX }, 740 { "(bad)", XX, XX, XX }, /* repne */ 741 { "(bad)", XX, XX, XX }, /* repz */ 742 { "hlt", XX, XX, XX }, 743 { "cmc", XX, XX, XX }, 744 { GRP3b }, 745 { GRP3S }, 746 /* f8 */ 747 { "clc", XX, XX, XX }, 748 { "stc", XX, XX, XX }, 749 { "cli", XX, XX, XX }, 750 { "sti", XX, XX, XX }, 751 { "cld", XX, XX, XX }, 752 { "std", XX, XX, XX }, 753 { GRP4 }, 754 { GRP5 }, 755}; 756 757static const struct dis386 dis386_twobyte[] = { 758 /* 00 */ 759 { GRP6 }, 760 { GRP7 }, 761 { "larS", Gv, Ew, XX }, 762 { "lslS", Gv, Ew, XX }, 763 { "(bad)", XX, XX, XX }, 764 { "syscall", XX, XX, XX }, 765 { "clts", XX, XX, XX }, 766 { "sysretP", XX, XX, XX }, 767 /* 08 */ 768 { "invd", XX, XX, XX }, 769 { "wbinvd", XX, XX, XX }, 770 { "(bad)", XX, XX, XX }, 771 { "ud2a", XX, XX, XX }, 772 { "(bad)", XX, XX, XX }, 773 { GRPAMD }, 774 { "femms", XX, XX, XX }, 775 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */ 776 /* 10 */ 777 { PREGRP8 }, 778 { PREGRP9 }, 779 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */ 780 { "movlpX", EX, XM, SIMD_Fixup, 'h' }, 781 { "unpcklpX", XM, EX, XX }, 782 { "unpckhpX", XM, EX, XX }, 783 { "movhpX", XM, EX, SIMD_Fixup, 'l' }, 784 { "movhpX", EX, XM, SIMD_Fixup, 'l' }, 785 /* 18 */ 786 { GRP14 }, 787 { "(bad)", XX, XX, XX }, 788 { "(bad)", XX, XX, XX }, 789 { "(bad)", XX, XX, XX }, 790 { "(bad)", XX, XX, XX }, 791 { "(bad)", XX, XX, XX }, 792 { "(bad)", XX, XX, XX }, 793 { "(bad)", XX, XX, XX }, 794 /* 20 */ 795 { "movL", Rm, Cm, XX }, 796 { "movL", Rm, Dm, XX }, 797 { "movL", Cm, Rm, XX }, 798 { "movL", Dm, Rm, XX }, 799 { "movL", Rd, Td, XX }, 800 { "(bad)", XX, XX, XX }, 801 { "movL", Td, Rd, XX }, 802 { "(bad)", XX, XX, XX }, 803 /* 28 */ 804 { "movapX", XM, EX, XX }, 805 { "movapX", EX, XM, XX }, 806 { PREGRP2 }, 807 { "movntpX", Ev, XM, XX }, 808 { PREGRP4 }, 809 { PREGRP3 }, 810 { "ucomisX", XM,EX, XX }, 811 { "comisX", XM,EX, XX }, 812 /* 30 */ 813 { "wrmsr", XX, XX, XX }, 814 { "rdtsc", XX, XX, XX }, 815 { "rdmsr", XX, XX, XX }, 816 { "rdpmc", XX, XX, XX }, 817 { "sysenter", XX, XX, XX }, 818 { "sysexit", XX, XX, XX }, 819 { "(bad)", XX, XX, XX }, 820 { "(bad)", XX, XX, XX }, 821 /* 38 */ 822 { "(bad)", XX, XX, XX }, 823 { "(bad)", XX, XX, XX }, 824 { "(bad)", XX, XX, XX }, 825 { "(bad)", XX, XX, XX }, 826 { "(bad)", XX, XX, XX }, 827 { "(bad)", XX, XX, XX }, 828 { "(bad)", XX, XX, XX }, 829 { "(bad)", XX, XX, XX }, 830 /* 40 */ 831 { "cmovo", Gv, Ev, XX }, 832 { "cmovno", Gv, Ev, XX }, 833 { "cmovb", Gv, Ev, XX }, 834 { "cmovae", Gv, Ev, XX }, 835 { "cmove", Gv, Ev, XX }, 836 { "cmovne", Gv, Ev, XX }, 837 { "cmovbe", Gv, Ev, XX }, 838 { "cmova", Gv, Ev, XX }, 839 /* 48 */ 840 { "cmovs", Gv, Ev, XX }, 841 { "cmovns", Gv, Ev, XX }, 842 { "cmovp", Gv, Ev, XX }, 843 { "cmovnp", Gv, Ev, XX }, 844 { "cmovl", Gv, Ev, XX }, 845 { "cmovge", Gv, Ev, XX }, 846 { "cmovle", Gv, Ev, XX }, 847 { "cmovg", Gv, Ev, XX }, 848 /* 50 */ 849 { "movmskpX", Gd, XS, XX }, 850 { PREGRP13 }, 851 { PREGRP12 }, 852 { PREGRP11 }, 853 { "andpX", XM, EX, XX }, 854 { "andnpX", XM, EX, XX }, 855 { "orpX", XM, EX, XX }, 856 { "xorpX", XM, EX, XX }, 857 /* 58 */ 858 { PREGRP0 }, 859 { PREGRP10 }, 860 { PREGRP17 }, 861 { PREGRP16 }, 862 { PREGRP14 }, 863 { PREGRP7 }, 864 { PREGRP5 }, 865 { PREGRP6 }, 866 /* 60 */ 867 { "punpcklbw", MX, EM, XX }, 868 { "punpcklwd", MX, EM, XX }, 869 { "punpckldq", MX, EM, XX }, 870 { "packsswb", MX, EM, XX }, 871 { "pcmpgtb", MX, EM, XX }, 872 { "pcmpgtw", MX, EM, XX }, 873 { "pcmpgtd", MX, EM, XX }, 874 { "packuswb", MX, EM, XX }, 875 /* 68 */ 876 { "punpckhbw", MX, EM, XX }, 877 { "punpckhwd", MX, EM, XX }, 878 { "punpckhdq", MX, EM, XX }, 879 { "packssdw", MX, EM, XX }, 880 { PREGRP26 }, 881 { PREGRP24 }, 882 { "movd", MX, Ed, XX }, 883 { PREGRP19 }, 884 /* 70 */ 885 { PREGRP22 }, 886 { GRP10 }, 887 { GRP11 }, 888 { GRP12 }, 889 { "pcmpeqb", MX, EM, XX }, 890 { "pcmpeqw", MX, EM, XX }, 891 { "pcmpeqd", MX, EM, XX }, 892 { "emms", XX, XX, XX }, 893 /* 78 */ 894 { "(bad)", XX, XX, XX }, 895 { "(bad)", XX, XX, XX }, 896 { "(bad)", XX, XX, XX }, 897 { "(bad)", XX, XX, XX }, 898 { "(bad)", XX, XX, XX }, 899 { "(bad)", XX, XX, XX }, 900 { PREGRP23 }, 901 { PREGRP20 }, 902 /* 80 */ 903 { "joH", Jv, XX, cond_jump_flag }, 904 { "jnoH", Jv, XX, cond_jump_flag }, 905 { "jbH", Jv, XX, cond_jump_flag }, 906 { "jaeH", Jv, XX, cond_jump_flag }, 907 { "jeH", Jv, XX, cond_jump_flag }, 908 { "jneH", Jv, XX, cond_jump_flag }, 909 { "jbeH", Jv, XX, cond_jump_flag }, 910 { "jaH", Jv, XX, cond_jump_flag }, 911 /* 88 */ 912 { "jsH", Jv, XX, cond_jump_flag }, 913 { "jnsH", Jv, XX, cond_jump_flag }, 914 { "jpH", Jv, XX, cond_jump_flag }, 915 { "jnpH", Jv, XX, cond_jump_flag }, 916 { "jlH", Jv, XX, cond_jump_flag }, 917 { "jgeH", Jv, XX, cond_jump_flag }, 918 { "jleH", Jv, XX, cond_jump_flag }, 919 { "jgH", Jv, XX, cond_jump_flag }, 920 /* 90 */ 921 { "seto", Eb, XX, XX }, 922 { "setno", Eb, XX, XX }, 923 { "setb", Eb, XX, XX }, 924 { "setae", Eb, XX, XX }, 925 { "sete", Eb, XX, XX }, 926 { "setne", Eb, XX, XX }, 927 { "setbe", Eb, XX, XX }, 928 { "seta", Eb, XX, XX }, 929 /* 98 */ 930 { "sets", Eb, XX, XX }, 931 { "setns", Eb, XX, XX }, 932 { "setp", Eb, XX, XX }, 933 { "setnp", Eb, XX, XX }, 934 { "setl", Eb, XX, XX }, 935 { "setge", Eb, XX, XX }, 936 { "setle", Eb, XX, XX }, 937 { "setg", Eb, XX, XX }, 938 /* a0 */ 939 { "pushT", fs, XX, XX }, 940 { "popT", fs, XX, XX }, 941 { "cpuid", XX, XX, XX }, 942 { "btS", Ev, Gv, XX }, 943 { "shldS", Ev, Gv, Ib }, 944 { "shldS", Ev, Gv, CL }, 945 { "(bad)", XX, XX, XX }, 946 { "(bad)", XX, XX, XX }, 947 /* a8 */ 948 { "pushT", gs, XX, XX }, 949 { "popT", gs, XX, XX }, 950 { "rsm", XX, XX, XX }, 951 { "btsS", Ev, Gv, XX }, 952 { "shrdS", Ev, Gv, Ib }, 953 { "shrdS", Ev, Gv, CL }, 954 { GRP13 }, 955 { "imulS", Gv, Ev, XX }, 956 /* b0 */ 957 { "cmpxchgB", Eb, Gb, XX }, 958 { "cmpxchgS", Ev, Gv, XX }, 959 { "lssS", Gv, Mp, XX }, 960 { "btrS", Ev, Gv, XX }, 961 { "lfsS", Gv, Mp, XX }, 962 { "lgsS", Gv, Mp, XX }, 963 { "movz{bR|x|bR|x}", Gv, Eb, XX }, 964 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */ 965 /* b8 */ 966 { "(bad)", XX, XX, XX }, 967 { "ud2b", XX, XX, XX }, 968 { GRP8 }, 969 { "btcS", Ev, Gv, XX }, 970 { "bsfS", Gv, Ev, XX }, 971 { "bsrS", Gv, Ev, XX }, 972 { "movs{bR|x|bR|x}", Gv, Eb, XX }, 973 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */ 974 /* c0 */ 975 { "xaddB", Eb, Gb, XX }, 976 { "xaddS", Ev, Gv, XX }, 977 { PREGRP1 }, 978 { "movntiS", Ev, Gv, XX }, 979 { "pinsrw", MX, Ed, Ib }, 980 { "pextrw", Gd, MS, Ib }, 981 { "shufpX", XM, EX, Ib }, 982 { GRP9 }, 983 /* c8 */ 984 { "bswap", RMeAX, XX, XX }, 985 { "bswap", RMeCX, XX, XX }, 986 { "bswap", RMeDX, XX, XX }, 987 { "bswap", RMeBX, XX, XX }, 988 { "bswap", RMeSP, XX, XX }, 989 { "bswap", RMeBP, XX, XX }, 990 { "bswap", RMeSI, XX, XX }, 991 { "bswap", RMeDI, XX, XX }, 992 /* d0 */ 993 { "(bad)", XX, XX, XX }, 994 { "psrlw", MX, EM, XX }, 995 { "psrld", MX, EM, XX }, 996 { "psrlq", MX, EM, XX }, 997 { "paddq", MX, EM, XX }, 998 { "pmullw", MX, EM, XX }, 999 { PREGRP21 }, 1000 { "pmovmskb", Gd, MS, XX }, 1001 /* d8 */ 1002 { "psubusb", MX, EM, XX }, 1003 { "psubusw", MX, EM, XX }, 1004 { "pminub", MX, EM, XX }, 1005 { "pand", MX, EM, XX }, 1006 { "paddusb", MX, EM, XX }, 1007 { "paddusw", MX, EM, XX }, 1008 { "pmaxub", MX, EM, XX }, 1009 { "pandn", MX, EM, XX }, 1010 /* e0 */ 1011 { "pavgb", MX, EM, XX }, 1012 { "psraw", MX, EM, XX }, 1013 { "psrad", MX, EM, XX }, 1014 { "pavgw", MX, EM, XX }, 1015 { "pmulhuw", MX, EM, XX }, 1016 { "pmulhw", MX, EM, XX }, 1017 { PREGRP15 }, 1018 { PREGRP25 }, 1019 /* e8 */ 1020 { "psubsb", MX, EM, XX }, 1021 { "psubsw", MX, EM, XX }, 1022 { "pminsw", MX, EM, XX }, 1023 { "por", MX, EM, XX }, 1024 { "paddsb", MX, EM, XX }, 1025 { "paddsw", MX, EM, XX }, 1026 { "pmaxsw", MX, EM, XX }, 1027 { "pxor", MX, EM, XX }, 1028 /* f0 */ 1029 { "(bad)", XX, XX, XX }, 1030 { "psllw", MX, EM, XX }, 1031 { "pslld", MX, EM, XX }, 1032 { "psllq", MX, EM, XX }, 1033 { "pmuludq", MX, EM, XX }, 1034 { "pmaddwd", MX, EM, XX }, 1035 { "psadbw", MX, EM, XX }, 1036 { PREGRP18 }, 1037 /* f8 */ 1038 { "psubb", MX, EM, XX }, 1039 { "psubw", MX, EM, XX }, 1040 { "psubd", MX, EM, XX }, 1041 { "psubq", MX, EM, XX }, 1042 { "paddb", MX, EM, XX }, 1043 { "paddw", MX, EM, XX }, 1044 { "paddd", MX, EM, XX }, 1045 { "(bad)", XX, XX, XX } 1046}; 1047 1048static const unsigned char onebyte_has_modrm[256] = { 1049 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1050 /* ------------------------------- */ 1051 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */ 1052 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */ 1053 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */ 1054 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */ 1055 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */ 1056 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */ 1057 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */ 1058 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */ 1059 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */ 1060 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */ 1061 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */ 1062 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */ 1063 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */ 1064 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */ 1065 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */ 1066 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */ 1067 /* ------------------------------- */ 1068 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1069}; 1070 1071static const unsigned char twobyte_has_modrm[256] = { 1072 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1073 /* ------------------------------- */ 1074 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */ 1075 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */ 1076 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */ 1077 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1078 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */ 1079 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */ 1080 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */ 1081 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */ 1082 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1083 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */ 1084 /* a0 */ 0,0,0,1,1,1,0,0,0,0,0,1,1,1,1,1, /* af */ 1085 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */ 1086 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */ 1087 /* d0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */ 1088 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */ 1089 /* f0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */ 1090 /* ------------------------------- */ 1091 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1092}; 1093 1094static const unsigned char twobyte_uses_SSE_prefix[256] = { 1095 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1096 /* ------------------------------- */ 1097 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1098 /* 10 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ 1099 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */ 1100 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1101 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1102 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */ 1103 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */ 1104 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */ 1105 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1106 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1107 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1108 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1109 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1110 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */ 1111 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ 1112 /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */ 1113 /* ------------------------------- */ 1114 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1115}; 1116 1117static char obuf[100]; 1118static char *obufp; 1119static char scratchbuf[100]; 1120static unsigned char *start_codep; 1121static unsigned char *insn_codep; 1122static unsigned char *codep; 1123static disassemble_info *the_info; 1124static int mod; 1125static int rm; 1126static int reg; 1127static unsigned char need_modrm; 1128 1129/* If we are accessing mod/rm/reg without need_modrm set, then the 1130 values are stale. Hitting this abort likely indicates that you 1131 need to update onebyte_has_modrm or twobyte_has_modrm. */ 1132#define MODRM_CHECK if (!need_modrm) abort () 1133 1134static const char **names64; 1135static const char **names32; 1136static const char **names16; 1137static const char **names8; 1138static const char **names8rex; 1139static const char **names_seg; 1140static const char **index16; 1141 1142static const char *intel_names64[] = { 1143 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", 1144 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 1145}; 1146static const char *intel_names32[] = { 1147 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi", 1148 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d" 1149}; 1150static const char *intel_names16[] = { 1151 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di", 1152 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w" 1153}; 1154static const char *intel_names8[] = { 1155 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh", 1156}; 1157static const char *intel_names8rex[] = { 1158 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil", 1159 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b" 1160}; 1161static const char *intel_names_seg[] = { 1162 "es", "cs", "ss", "ds", "fs", "gs", "?", "?", 1163}; 1164static const char *intel_index16[] = { 1165 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx" 1166}; 1167 1168static const char *att_names64[] = { 1169 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi", 1170 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15" 1171}; 1172static const char *att_names32[] = { 1173 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi", 1174 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d" 1175}; 1176static const char *att_names16[] = { 1177 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di", 1178 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w" 1179}; 1180static const char *att_names8[] = { 1181 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh", 1182}; 1183static const char *att_names8rex[] = { 1184 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil", 1185 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b" 1186}; 1187static const char *att_names_seg[] = { 1188 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?", 1189}; 1190static const char *att_index16[] = { 1191 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx" 1192}; 1193 1194static const struct dis386 grps[][8] = { 1195 /* GRP1b */ 1196 { 1197 { "addA", Eb, Ib, XX }, 1198 { "orA", Eb, Ib, XX }, 1199 { "adcA", Eb, Ib, XX }, 1200 { "sbbA", Eb, Ib, XX }, 1201 { "andA", Eb, Ib, XX }, 1202 { "subA", Eb, Ib, XX }, 1203 { "xorA", Eb, Ib, XX }, 1204 { "cmpA", Eb, Ib, XX } 1205 }, 1206 /* GRP1S */ 1207 { 1208 { "addQ", Ev, Iv, XX }, 1209 { "orQ", Ev, Iv, XX }, 1210 { "adcQ", Ev, Iv, XX }, 1211 { "sbbQ", Ev, Iv, XX }, 1212 { "andQ", Ev, Iv, XX }, 1213 { "subQ", Ev, Iv, XX }, 1214 { "xorQ", Ev, Iv, XX }, 1215 { "cmpQ", Ev, Iv, XX } 1216 }, 1217 /* GRP1Ss */ 1218 { 1219 { "addQ", Ev, sIb, XX }, 1220 { "orQ", Ev, sIb, XX }, 1221 { "adcQ", Ev, sIb, XX }, 1222 { "sbbQ", Ev, sIb, XX }, 1223 { "andQ", Ev, sIb, XX }, 1224 { "subQ", Ev, sIb, XX }, 1225 { "xorQ", Ev, sIb, XX }, 1226 { "cmpQ", Ev, sIb, XX } 1227 }, 1228 /* GRP2b */ 1229 { 1230 { "rolA", Eb, Ib, XX }, 1231 { "rorA", Eb, Ib, XX }, 1232 { "rclA", Eb, Ib, XX }, 1233 { "rcrA", Eb, Ib, XX }, 1234 { "shlA", Eb, Ib, XX }, 1235 { "shrA", Eb, Ib, XX }, 1236 { "(bad)", XX, XX, XX }, 1237 { "sarA", Eb, Ib, XX }, 1238 }, 1239 /* GRP2S */ 1240 { 1241 { "rolQ", Ev, Ib, XX }, 1242 { "rorQ", Ev, Ib, XX }, 1243 { "rclQ", Ev, Ib, XX }, 1244 { "rcrQ", Ev, Ib, XX }, 1245 { "shlQ", Ev, Ib, XX }, 1246 { "shrQ", Ev, Ib, XX }, 1247 { "(bad)", XX, XX, XX }, 1248 { "sarQ", Ev, Ib, XX }, 1249 }, 1250 /* GRP2b_one */ 1251 { 1252 { "rolA", Eb, XX, XX }, 1253 { "rorA", Eb, XX, XX }, 1254 { "rclA", Eb, XX, XX }, 1255 { "rcrA", Eb, XX, XX }, 1256 { "shlA", Eb, XX, XX }, 1257 { "shrA", Eb, XX, XX }, 1258 { "(bad)", XX, XX, XX }, 1259 { "sarA", Eb, XX, XX }, 1260 }, 1261 /* GRP2S_one */ 1262 { 1263 { "rolQ", Ev, XX, XX }, 1264 { "rorQ", Ev, XX, XX }, 1265 { "rclQ", Ev, XX, XX }, 1266 { "rcrQ", Ev, XX, XX }, 1267 { "shlQ", Ev, XX, XX }, 1268 { "shrQ", Ev, XX, XX }, 1269 { "(bad)", XX, XX, XX}, 1270 { "sarQ", Ev, XX, XX }, 1271 }, 1272 /* GRP2b_cl */ 1273 { 1274 { "rolA", Eb, CL, XX }, 1275 { "rorA", Eb, CL, XX }, 1276 { "rclA", Eb, CL, XX }, 1277 { "rcrA", Eb, CL, XX }, 1278 { "shlA", Eb, CL, XX }, 1279 { "shrA", Eb, CL, XX }, 1280 { "(bad)", XX, XX, XX }, 1281 { "sarA", Eb, CL, XX }, 1282 }, 1283 /* GRP2S_cl */ 1284 { 1285 { "rolQ", Ev, CL, XX }, 1286 { "rorQ", Ev, CL, XX }, 1287 { "rclQ", Ev, CL, XX }, 1288 { "rcrQ", Ev, CL, XX }, 1289 { "shlQ", Ev, CL, XX }, 1290 { "shrQ", Ev, CL, XX }, 1291 { "(bad)", XX, XX, XX }, 1292 { "sarQ", Ev, CL, XX } 1293 }, 1294 /* GRP3b */ 1295 { 1296 { "testA", Eb, Ib, XX }, 1297 { "(bad)", Eb, XX, XX }, 1298 { "notA", Eb, XX, XX }, 1299 { "negA", Eb, XX, XX }, 1300 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */ 1301 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */ 1302 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */ 1303 { "idivA", Eb, XX, XX } /* and idiv for consistency. */ 1304 }, 1305 /* GRP3S */ 1306 { 1307 { "testQ", Ev, Iv, XX }, 1308 { "(bad)", XX, XX, XX }, 1309 { "notQ", Ev, XX, XX }, 1310 { "negQ", Ev, XX, XX }, 1311 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */ 1312 { "imulQ", Ev, XX, XX }, 1313 { "divQ", Ev, XX, XX }, 1314 { "idivQ", Ev, XX, XX }, 1315 }, 1316 /* GRP4 */ 1317 { 1318 { "incA", Eb, XX, XX }, 1319 { "decA", Eb, XX, XX }, 1320 { "(bad)", XX, XX, XX }, 1321 { "(bad)", XX, XX, XX }, 1322 { "(bad)", XX, XX, XX }, 1323 { "(bad)", XX, XX, XX }, 1324 { "(bad)", XX, XX, XX }, 1325 { "(bad)", XX, XX, XX }, 1326 }, 1327 /* GRP5 */ 1328 { 1329 { "incQ", Ev, XX, XX }, 1330 { "decQ", Ev, XX, XX }, 1331 { "callT", indirEv, XX, XX }, 1332 { "lcallT", indirEv, XX, XX }, 1333 { "jmpT", indirEv, XX, XX }, 1334 { "ljmpT", indirEv, XX, XX }, 1335 { "pushU", Ev, XX, XX }, 1336 { "(bad)", XX, XX, XX }, 1337 }, 1338 /* GRP6 */ 1339 { 1340 { "sldt", Ew, XX, XX }, 1341 { "str", Ew, XX, XX }, 1342 { "lldt", Ew, XX, XX }, 1343 { "ltr", Ew, XX, XX }, 1344 { "verr", Ew, XX, XX }, 1345 { "verw", Ew, XX, XX }, 1346 { "(bad)", XX, XX, XX }, 1347 { "(bad)", XX, XX, XX } 1348 }, 1349 /* GRP7 */ 1350 { 1351 { "sgdtQ", M, XX, XX }, 1352 { "sidtQ", M, XX, XX }, 1353 { "lgdtQ", M, XX, XX }, 1354 { "lidtQ", M, XX, XX }, 1355 { "smsw", Ew, XX, XX }, 1356 { "(bad)", XX, XX, XX }, 1357 { "lmsw", Ew, XX, XX }, 1358 { "invlpg", Ew, XX, XX }, 1359 }, 1360 /* GRP8 */ 1361 { 1362 { "(bad)", XX, XX, XX }, 1363 { "(bad)", XX, XX, XX }, 1364 { "(bad)", XX, XX, XX }, 1365 { "(bad)", XX, XX, XX }, 1366 { "btQ", Ev, Ib, XX }, 1367 { "btsQ", Ev, Ib, XX }, 1368 { "btrQ", Ev, Ib, XX }, 1369 { "btcQ", Ev, Ib, XX }, 1370 }, 1371 /* GRP9 */ 1372 { 1373 { "(bad)", XX, XX, XX }, 1374 { "cmpxchg8b", Ev, XX, XX }, 1375 { "(bad)", XX, XX, XX }, 1376 { "(bad)", XX, XX, XX }, 1377 { "(bad)", XX, XX, XX }, 1378 { "(bad)", XX, XX, XX }, 1379 { "(bad)", XX, XX, XX }, 1380 { "(bad)", XX, XX, XX }, 1381 }, 1382 /* GRP10 */ 1383 { 1384 { "(bad)", XX, XX, XX }, 1385 { "(bad)", XX, XX, XX }, 1386 { "psrlw", MS, Ib, XX }, 1387 { "(bad)", XX, XX, XX }, 1388 { "psraw", MS, Ib, XX }, 1389 { "(bad)", XX, XX, XX }, 1390 { "psllw", MS, Ib, XX }, 1391 { "(bad)", XX, XX, XX }, 1392 }, 1393 /* GRP11 */ 1394 { 1395 { "(bad)", XX, XX, XX }, 1396 { "(bad)", XX, XX, XX }, 1397 { "psrld", MS, Ib, XX }, 1398 { "(bad)", XX, XX, XX }, 1399 { "psrad", MS, Ib, XX }, 1400 { "(bad)", XX, XX, XX }, 1401 { "pslld", MS, Ib, XX }, 1402 { "(bad)", XX, XX, XX }, 1403 }, 1404 /* GRP12 */ 1405 { 1406 { "(bad)", XX, XX, XX }, 1407 { "(bad)", XX, XX, XX }, 1408 { "psrlq", MS, Ib, XX }, 1409 { "psrldq", MS, Ib, XX }, 1410 { "(bad)", XX, XX, XX }, 1411 { "(bad)", XX, XX, XX }, 1412 { "psllq", MS, Ib, XX }, 1413 { "pslldq", MS, Ib, XX }, 1414 }, 1415 /* GRP13 */ 1416 { 1417 { "fxsave", Ev, XX, XX }, 1418 { "fxrstor", Ev, XX, XX }, 1419 { "ldmxcsr", Ev, XX, XX }, 1420 { "stmxcsr", Ev, XX, XX }, 1421 { "(bad)", XX, XX, XX }, 1422 { "lfence", None, XX, XX }, 1423 { "mfence", None, XX, XX }, 1424 { "sfence", None, XX, XX }, 1425 /* FIXME: the sfence with memory operand is clflush! */ 1426 }, 1427 /* GRP14 */ 1428 { 1429 { "prefetchnta", Ev, XX, XX }, 1430 { "prefetcht0", Ev, XX, XX }, 1431 { "prefetcht1", Ev, XX, XX }, 1432 { "prefetcht2", Ev, XX, XX }, 1433 { "(bad)", XX, XX, XX }, 1434 { "(bad)", XX, XX, XX }, 1435 { "(bad)", XX, XX, XX }, 1436 { "(bad)", XX, XX, XX }, 1437 }, 1438 /* GRPAMD */ 1439 { 1440 { "prefetch", Eb, XX, XX }, 1441 { "prefetchw", Eb, XX, XX }, 1442 { "(bad)", XX, XX, XX }, 1443 { "(bad)", XX, XX, XX }, 1444 { "(bad)", XX, XX, XX }, 1445 { "(bad)", XX, XX, XX }, 1446 { "(bad)", XX, XX, XX }, 1447 { "(bad)", XX, XX, XX }, 1448 } 1449}; 1450 1451static const struct dis386 prefix_user_table[][4] = { 1452 /* PREGRP0 */ 1453 { 1454 { "addps", XM, EX, XX }, 1455 { "addss", XM, EX, XX }, 1456 { "addpd", XM, EX, XX }, 1457 { "addsd", XM, EX, XX }, 1458 }, 1459 /* PREGRP1 */ 1460 { 1461 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */ 1462 { "", XM, EX, OPSIMD }, 1463 { "", XM, EX, OPSIMD }, 1464 { "", XM, EX, OPSIMD }, 1465 }, 1466 /* PREGRP2 */ 1467 { 1468 { "cvtpi2ps", XM, EM, XX }, 1469 { "cvtsi2ssY", XM, Ev, XX }, 1470 { "cvtpi2pd", XM, EM, XX }, 1471 { "cvtsi2sdY", XM, Ev, XX }, 1472 }, 1473 /* PREGRP3 */ 1474 { 1475 { "cvtps2pi", MX, EX, XX }, 1476 { "cvtss2siY", Gv, EX, XX }, 1477 { "cvtpd2pi", MX, EX, XX }, 1478 { "cvtsd2siY", Gv, EX, XX }, 1479 }, 1480 /* PREGRP4 */ 1481 { 1482 { "cvttps2pi", MX, EX, XX }, 1483 { "cvttss2siY", Gv, EX, XX }, 1484 { "cvttpd2pi", MX, EX, XX }, 1485 { "cvttsd2siY", Gv, EX, XX }, 1486 }, 1487 /* PREGRP5 */ 1488 { 1489 { "divps", XM, EX, XX }, 1490 { "divss", XM, EX, XX }, 1491 { "divpd", XM, EX, XX }, 1492 { "divsd", XM, EX, XX }, 1493 }, 1494 /* PREGRP6 */ 1495 { 1496 { "maxps", XM, EX, XX }, 1497 { "maxss", XM, EX, XX }, 1498 { "maxpd", XM, EX, XX }, 1499 { "maxsd", XM, EX, XX }, 1500 }, 1501 /* PREGRP7 */ 1502 { 1503 { "minps", XM, EX, XX }, 1504 { "minss", XM, EX, XX }, 1505 { "minpd", XM, EX, XX }, 1506 { "minsd", XM, EX, XX }, 1507 }, 1508 /* PREGRP8 */ 1509 { 1510 { "movups", XM, EX, XX }, 1511 { "movss", XM, EX, XX }, 1512 { "movupd", XM, EX, XX }, 1513 { "movsd", XM, EX, XX }, 1514 }, 1515 /* PREGRP9 */ 1516 { 1517 { "movups", EX, XM, XX }, 1518 { "movss", EX, XM, XX }, 1519 { "movupd", EX, XM, XX }, 1520 { "movsd", EX, XM, XX }, 1521 }, 1522 /* PREGRP10 */ 1523 { 1524 { "mulps", XM, EX, XX }, 1525 { "mulss", XM, EX, XX }, 1526 { "mulpd", XM, EX, XX }, 1527 { "mulsd", XM, EX, XX }, 1528 }, 1529 /* PREGRP11 */ 1530 { 1531 { "rcpps", XM, EX, XX }, 1532 { "rcpss", XM, EX, XX }, 1533 { "(bad)", XM, EX, XX }, 1534 { "(bad)", XM, EX, XX }, 1535 }, 1536 /* PREGRP12 */ 1537 { 1538 { "rsqrtps", XM, EX, XX }, 1539 { "rsqrtss", XM, EX, XX }, 1540 { "(bad)", XM, EX, XX }, 1541 { "(bad)", XM, EX, XX }, 1542 }, 1543 /* PREGRP13 */ 1544 { 1545 { "sqrtps", XM, EX, XX }, 1546 { "sqrtss", XM, EX, XX }, 1547 { "sqrtpd", XM, EX, XX }, 1548 { "sqrtsd", XM, EX, XX }, 1549 }, 1550 /* PREGRP14 */ 1551 { 1552 { "subps", XM, EX, XX }, 1553 { "subss", XM, EX, XX }, 1554 { "subpd", XM, EX, XX }, 1555 { "subsd", XM, EX, XX }, 1556 }, 1557 /* PREGRP15 */ 1558 { 1559 { "(bad)", XM, EX, XX }, 1560 { "cvtdq2pd", XM, EX, XX }, 1561 { "cvttpd2dq", XM, EX, XX }, 1562 { "cvtpd2dq", XM, EX, XX }, 1563 }, 1564 /* PREGRP16 */ 1565 { 1566 { "cvtdq2ps", XM, EX, XX }, 1567 { "cvttps2dq",XM, EX, XX }, 1568 { "cvtps2dq",XM, EX, XX }, 1569 { "(bad)", XM, EX, XX }, 1570 }, 1571 /* PREGRP17 */ 1572 { 1573 { "cvtps2pd", XM, EX, XX }, 1574 { "cvtss2sd", XM, EX, XX }, 1575 { "cvtpd2ps", XM, EX, XX }, 1576 { "cvtsd2ss", XM, EX, XX }, 1577 }, 1578 /* PREGRP18 */ 1579 { 1580 { "maskmovq", MX, MS, XX }, 1581 { "(bad)", XM, EX, XX }, 1582 { "maskmovdqu", XM, EX, XX }, 1583 { "(bad)", XM, EX, XX }, 1584 }, 1585 /* PREGRP19 */ 1586 { 1587 { "movq", MX, EM, XX }, 1588 { "movdqu", XM, EX, XX }, 1589 { "movdqa", XM, EX, XX }, 1590 { "(bad)", XM, EX, XX }, 1591 }, 1592 /* PREGRP20 */ 1593 { 1594 { "movq", EM, MX, XX }, 1595 { "movdqu", EX, XM, XX }, 1596 { "movdqa", EX, XM, XX }, 1597 { "(bad)", EX, XM, XX }, 1598 }, 1599 /* PREGRP21 */ 1600 { 1601 { "(bad)", EX, XM, XX }, 1602 { "movq2dq", XM, MS, XX }, 1603 { "movq", EX, XM, XX }, 1604 { "movdq2q", MX, XS, XX }, 1605 }, 1606 /* PREGRP22 */ 1607 { 1608 { "pshufw", MX, EM, Ib }, 1609 { "pshufhw", XM, EX, Ib }, 1610 { "pshufd", XM, EX, Ib }, 1611 { "pshuflw", XM, EX, Ib }, 1612 }, 1613 /* PREGRP23 */ 1614 { 1615 { "movd", Ed, MX, XX }, 1616 { "movq", XM, EX, XX }, 1617 { "movd", Ed, XM, XX }, 1618 { "(bad)", Ed, XM, XX }, 1619 }, 1620 /* PREGRP24 */ 1621 { 1622 { "(bad)", MX, EX, XX }, 1623 { "(bad)", XM, EX, XX }, 1624 { "punpckhqdq", XM, EX, XX }, 1625 { "(bad)", XM, EX, XX }, 1626 }, 1627 /* PREGRP25 */ 1628 { 1629 { "movntq", Ev, MX, XX }, 1630 { "(bad)", Ev, XM, XX }, 1631 { "movntdq", Ev, XM, XX }, 1632 { "(bad)", Ev, XM, XX }, 1633 }, 1634 /* PREGRP26 */ 1635 { 1636 { "(bad)", MX, EX, XX }, 1637 { "(bad)", XM, EX, XX }, 1638 { "punpcklqdq", XM, EX, XX }, 1639 { "(bad)", XM, EX, XX }, 1640 }, 1641}; 1642 1643static const struct dis386 x86_64_table[][2] = { 1644 { 1645 { "arpl", Ew, Gw, XX }, 1646 { "movs{||lq|xd}", Gv, Ed, XX }, 1647 }, 1648}; 1649 1650#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>") 1651 1652static void 1653ckprefix () 1654{ 1655 int newrex; 1656 rex = 0; 1657 prefixes = 0; 1658 used_prefixes = 0; 1659 rex_used = 0; 1660 while (1) 1661 { 1662 FETCH_DATA (the_info, codep + 1); 1663 newrex = 0; 1664 switch (*codep) 1665 { 1666 /* REX prefixes family. */ 1667 case 0x40: 1668 case 0x41: 1669 case 0x42: 1670 case 0x43: 1671 case 0x44: 1672 case 0x45: 1673 case 0x46: 1674 case 0x47: 1675 case 0x48: 1676 case 0x49: 1677 case 0x4a: 1678 case 0x4b: 1679 case 0x4c: 1680 case 0x4d: 1681 case 0x4e: 1682 case 0x4f: 1683 if (mode_64bit) 1684 newrex = *codep; 1685 else 1686 return; 1687 break; 1688 case 0xf3: 1689 prefixes |= PREFIX_REPZ; 1690 break; 1691 case 0xf2: 1692 prefixes |= PREFIX_REPNZ; 1693 break; 1694 case 0xf0: 1695 prefixes |= PREFIX_LOCK; 1696 break; 1697 case 0x2e: 1698 prefixes |= PREFIX_CS; 1699 break; 1700 case 0x36: 1701 prefixes |= PREFIX_SS; 1702 break; 1703 case 0x3e: 1704 prefixes |= PREFIX_DS; 1705 break; 1706 case 0x26: 1707 prefixes |= PREFIX_ES; 1708 break; 1709 case 0x64: 1710 prefixes |= PREFIX_FS; 1711 break; 1712 case 0x65: 1713 prefixes |= PREFIX_GS; 1714 break; 1715 case 0x66: 1716 prefixes |= PREFIX_DATA; 1717 break; 1718 case 0x67: 1719 prefixes |= PREFIX_ADDR; 1720 break; 1721 case FWAIT_OPCODE: 1722 /* fwait is really an instruction. If there are prefixes 1723 before the fwait, they belong to the fwait, *not* to the 1724 following instruction. */ 1725 if (prefixes) 1726 { 1727 prefixes |= PREFIX_FWAIT; 1728 codep++; 1729 return; 1730 } 1731 prefixes = PREFIX_FWAIT; 1732 break; 1733 default: 1734 return; 1735 } 1736 /* Rex is ignored when followed by another prefix. */ 1737 if (rex) 1738 { 1739 oappend (prefix_name (rex, 0)); 1740 oappend (" "); 1741 } 1742 rex = newrex; 1743 codep++; 1744 } 1745} 1746 1747/* Return the name of the prefix byte PREF, or NULL if PREF is not a 1748 prefix byte. */ 1749 1750static const char * 1751prefix_name (pref, sizeflag) 1752 int pref; 1753 int sizeflag; 1754{ 1755 switch (pref) 1756 { 1757 /* REX prefixes family. */ 1758 case 0x40: 1759 return "rex"; 1760 case 0x41: 1761 return "rexZ"; 1762 case 0x42: 1763 return "rexY"; 1764 case 0x43: 1765 return "rexYZ"; 1766 case 0x44: 1767 return "rexX"; 1768 case 0x45: 1769 return "rexXZ"; 1770 case 0x46: 1771 return "rexXY"; 1772 case 0x47: 1773 return "rexXYZ"; 1774 case 0x48: 1775 return "rex64"; 1776 case 0x49: 1777 return "rex64Z"; 1778 case 0x4a: 1779 return "rex64Y"; 1780 case 0x4b: 1781 return "rex64YZ"; 1782 case 0x4c: 1783 return "rex64X"; 1784 case 0x4d: 1785 return "rex64XZ"; 1786 case 0x4e: 1787 return "rex64XY"; 1788 case 0x4f: 1789 return "rex64XYZ"; 1790 case 0xf3: 1791 return "repz"; 1792 case 0xf2: 1793 return "repnz"; 1794 case 0xf0: 1795 return "lock"; 1796 case 0x2e: 1797 return "cs"; 1798 case 0x36: 1799 return "ss"; 1800 case 0x3e: 1801 return "ds"; 1802 case 0x26: 1803 return "es"; 1804 case 0x64: 1805 return "fs"; 1806 case 0x65: 1807 return "gs"; 1808 case 0x66: 1809 return (sizeflag & DFLAG) ? "data16" : "data32"; 1810 case 0x67: 1811 return (sizeflag & AFLAG) ? "addr16" : "addr32"; 1812 case FWAIT_OPCODE: 1813 return "fwait"; 1814 default: 1815 return NULL; 1816 } 1817} 1818 1819static char op1out[100], op2out[100], op3out[100]; 1820static int op_ad, op_index[3]; 1821static bfd_vma op_address[3]; 1822static bfd_vma op_riprel[3]; 1823static bfd_vma start_pc; 1824 1825/* 1826 * On the 386's of 1988, the maximum length of an instruction is 15 bytes. 1827 * (see topic "Redundant prefixes" in the "Differences from 8086" 1828 * section of the "Virtual 8086 Mode" chapter.) 1829 * 'pc' should be the address of this instruction, it will 1830 * be used to print the target address if this is a relative jump or call 1831 * The function returns the length of this instruction in bytes. 1832 */ 1833 1834static char intel_syntax; 1835static char open_char; 1836static char close_char; 1837static char separator_char; 1838static char scale_char; 1839 1840int 1841print_insn_i386_att (pc, info) 1842 bfd_vma pc; 1843 disassemble_info *info; 1844{ 1845 intel_syntax = 0; 1846 names64 = att_names64; 1847 names32 = att_names32; 1848 names16 = att_names16; 1849 names8 = att_names8; 1850 names8rex = att_names8rex; 1851 names_seg = att_names_seg; 1852 index16 = att_index16; 1853 open_char = '('; 1854 close_char = ')'; 1855 separator_char = ','; 1856 scale_char = ','; 1857 1858 return print_insn_i386 (pc, info); 1859} 1860 1861int 1862print_insn_i386_intel (pc, info) 1863 bfd_vma pc; 1864 disassemble_info *info; 1865{ 1866 intel_syntax = 1; 1867 names64 = intel_names64; 1868 names32 = intel_names32; 1869 names16 = intel_names16; 1870 names8 = intel_names8; 1871 names8rex = intel_names8rex; 1872 names_seg = intel_names_seg; 1873 index16 = intel_index16; 1874 open_char = '['; 1875 close_char = ']'; 1876 separator_char = '+'; 1877 scale_char = '*'; 1878 1879 return print_insn_i386 (pc, info); 1880} 1881 1882static int 1883print_insn_i386 (pc, info) 1884 bfd_vma pc; 1885 disassemble_info *info; 1886{ 1887 const struct dis386 *dp; 1888 int i; 1889 int two_source_ops; 1890 char *first, *second, *third; 1891 int needcomma; 1892 unsigned char uses_SSE_prefix; 1893 VOLATILE int sizeflag; 1894 VOLATILE int orig_sizeflag; 1895 1896 struct dis_private priv; 1897 bfd_byte *inbuf = priv.the_buffer; 1898 1899 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax 1900 || info->mach == bfd_mach_x86_64); 1901 1902 if (info->mach == bfd_mach_i386_i386 1903 || info->mach == bfd_mach_x86_64 1904 || info->mach == bfd_mach_i386_i386_intel_syntax 1905 || info->mach == bfd_mach_x86_64_intel_syntax) 1906 sizeflag = AFLAG | DFLAG; 1907 else if (info->mach == bfd_mach_i386_i8086) 1908 sizeflag = 0; 1909 else 1910 abort (); 1911 orig_sizeflag = sizeflag; 1912 1913 /* The output looks better if we put 7 bytes on a line, since that 1914 puts most long word instructions on a single line. */ 1915 info->bytes_per_line = 7; 1916 1917 info->private_data = (PTR) &priv; 1918 priv.max_fetched = priv.the_buffer; 1919 priv.insn_start = pc; 1920 1921 obuf[0] = 0; 1922 op1out[0] = 0; 1923 op2out[0] = 0; 1924 op3out[0] = 0; 1925 1926 op_index[0] = op_index[1] = op_index[2] = -1; 1927 1928 the_info = info; 1929 start_pc = pc; 1930 start_codep = inbuf; 1931 codep = inbuf; 1932 1933 if (setjmp (priv.bailout) != 0) 1934 { 1935 const char *name; 1936 1937 /* Getting here means we tried for data but didn't get it. That 1938 means we have an incomplete instruction of some sort. Just 1939 print the first byte as a prefix or a .byte pseudo-op. */ 1940 if (codep > inbuf) 1941 { 1942 name = prefix_name (inbuf[0], orig_sizeflag); 1943 if (name != NULL) 1944 (*info->fprintf_func) (info->stream, "%s", name); 1945 else 1946 { 1947 /* Just print the first byte as a .byte instruction. */ 1948 (*info->fprintf_func) (info->stream, ".byte 0x%x", 1949 (unsigned int) inbuf[0]); 1950 } 1951 1952 return 1; 1953 } 1954 1955 return -1; 1956 } 1957 1958 obufp = obuf; 1959 ckprefix (); 1960 1961 insn_codep = codep; 1962 1963 FETCH_DATA (info, codep + 1); 1964 two_source_ops = (*codep == 0x62) || (*codep == 0xc8); 1965 1966 if ((prefixes & PREFIX_FWAIT) 1967 && ((*codep < 0xd8) || (*codep > 0xdf))) 1968 { 1969 const char *name; 1970 1971 /* fwait not followed by floating point instruction. Print the 1972 first prefix, which is probably fwait itself. */ 1973 name = prefix_name (inbuf[0], orig_sizeflag); 1974 if (name == NULL) 1975 name = INTERNAL_DISASSEMBLER_ERROR; 1976 (*info->fprintf_func) (info->stream, "%s", name); 1977 return 1; 1978 } 1979 1980 if (*codep == 0x0f) 1981 { 1982 FETCH_DATA (info, codep + 2); 1983 dp = &dis386_twobyte[*++codep]; 1984 need_modrm = twobyte_has_modrm[*codep]; 1985 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep]; 1986 } 1987 else 1988 { 1989 dp = &dis386[*codep]; 1990 need_modrm = onebyte_has_modrm[*codep]; 1991 uses_SSE_prefix = 0; 1992 } 1993 codep++; 1994 1995 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ)) 1996 { 1997 oappend ("repz "); 1998 used_prefixes |= PREFIX_REPZ; 1999 } 2000 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ)) 2001 { 2002 oappend ("repnz "); 2003 used_prefixes |= PREFIX_REPNZ; 2004 } 2005 if (prefixes & PREFIX_LOCK) 2006 { 2007 oappend ("lock "); 2008 used_prefixes |= PREFIX_LOCK; 2009 } 2010 2011 if (prefixes & PREFIX_ADDR) 2012 { 2013 sizeflag ^= AFLAG; 2014 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax) 2015 { 2016 if (sizeflag & AFLAG) 2017 oappend ("addr32 "); 2018 else 2019 oappend ("addr16 "); 2020 used_prefixes |= PREFIX_ADDR; 2021 } 2022 } 2023 2024 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA)) 2025 { 2026 sizeflag ^= DFLAG; 2027 if (dp->bytemode3 == cond_jump_mode 2028 && dp->bytemode1 == v_mode 2029 && !intel_syntax) 2030 { 2031 if (sizeflag & DFLAG) 2032 oappend ("data32 "); 2033 else 2034 oappend ("data16 "); 2035 used_prefixes |= PREFIX_DATA; 2036 } 2037 } 2038 2039 if (need_modrm) 2040 { 2041 FETCH_DATA (info, codep + 1); 2042 mod = (*codep >> 6) & 3; 2043 reg = (*codep >> 3) & 7; 2044 rm = *codep & 7; 2045 } 2046 2047 if (dp->name == NULL && dp->bytemode1 == FLOATCODE) 2048 { 2049 dofloat (sizeflag); 2050 } 2051 else 2052 { 2053 int index; 2054 if (dp->name == NULL) 2055 { 2056 switch (dp->bytemode1) 2057 { 2058 case USE_GROUPS: 2059 dp = &grps[dp->bytemode2][reg]; 2060 break; 2061 2062 case USE_PREFIX_USER_TABLE: 2063 index = 0; 2064 used_prefixes |= (prefixes & PREFIX_REPZ); 2065 if (prefixes & PREFIX_REPZ) 2066 index = 1; 2067 else 2068 { 2069 used_prefixes |= (prefixes & PREFIX_DATA); 2070 if (prefixes & PREFIX_DATA) 2071 index = 2; 2072 else 2073 { 2074 used_prefixes |= (prefixes & PREFIX_REPNZ); 2075 if (prefixes & PREFIX_REPNZ) 2076 index = 3; 2077 } 2078 } 2079 dp = &prefix_user_table[dp->bytemode2][index]; 2080 break; 2081 2082 case X86_64_SPECIAL: 2083 dp = &x86_64_table[dp->bytemode2][mode_64bit]; 2084 break; 2085 2086 default: 2087 oappend (INTERNAL_DISASSEMBLER_ERROR); 2088 break; 2089 } 2090 } 2091 2092 if (putop (dp->name, sizeflag) == 0) 2093 { 2094 obufp = op1out; 2095 op_ad = 2; 2096 if (dp->op1) 2097 (*dp->op1) (dp->bytemode1, sizeflag); 2098 2099 obufp = op2out; 2100 op_ad = 1; 2101 if (dp->op2) 2102 (*dp->op2) (dp->bytemode2, sizeflag); 2103 2104 obufp = op3out; 2105 op_ad = 0; 2106 if (dp->op3) 2107 (*dp->op3) (dp->bytemode3, sizeflag); 2108 } 2109 } 2110 2111 /* See if any prefixes were not used. If so, print the first one 2112 separately. If we don't do this, we'll wind up printing an 2113 instruction stream which does not precisely correspond to the 2114 bytes we are disassembling. */ 2115 if ((prefixes & ~used_prefixes) != 0) 2116 { 2117 const char *name; 2118 2119 name = prefix_name (inbuf[0], orig_sizeflag); 2120 if (name == NULL) 2121 name = INTERNAL_DISASSEMBLER_ERROR; 2122 (*info->fprintf_func) (info->stream, "%s", name); 2123 return 1; 2124 } 2125 if (rex & ~rex_used) 2126 { 2127 const char *name; 2128 name = prefix_name (rex | 0x40, orig_sizeflag); 2129 if (name == NULL) 2130 name = INTERNAL_DISASSEMBLER_ERROR; 2131 (*info->fprintf_func) (info->stream, "%s ", name); 2132 } 2133 2134 obufp = obuf + strlen (obuf); 2135 for (i = strlen (obuf); i < 6; i++) 2136 oappend (" "); 2137 oappend (" "); 2138 (*info->fprintf_func) (info->stream, "%s", obuf); 2139 2140 /* The enter and bound instructions are printed with operands in the same 2141 order as the intel book; everything else is printed in reverse order. */ 2142 if (intel_syntax || two_source_ops) 2143 { 2144 first = op1out; 2145 second = op2out; 2146 third = op3out; 2147 op_ad = op_index[0]; 2148 op_index[0] = op_index[2]; 2149 op_index[2] = op_ad; 2150 } 2151 else 2152 { 2153 first = op3out; 2154 second = op2out; 2155 third = op1out; 2156 } 2157 needcomma = 0; 2158 if (*first) 2159 { 2160 if (op_index[0] != -1 && !op_riprel[0]) 2161 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info); 2162 else 2163 (*info->fprintf_func) (info->stream, "%s", first); 2164 needcomma = 1; 2165 } 2166 if (*second) 2167 { 2168 if (needcomma) 2169 (*info->fprintf_func) (info->stream, ","); 2170 if (op_index[1] != -1 && !op_riprel[1]) 2171 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info); 2172 else 2173 (*info->fprintf_func) (info->stream, "%s", second); 2174 needcomma = 1; 2175 } 2176 if (*third) 2177 { 2178 if (needcomma) 2179 (*info->fprintf_func) (info->stream, ","); 2180 if (op_index[2] != -1 && !op_riprel[2]) 2181 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info); 2182 else 2183 (*info->fprintf_func) (info->stream, "%s", third); 2184 } 2185 for (i = 0; i < 3; i++) 2186 if (op_index[i] != -1 && op_riprel[i]) 2187 { 2188 (*info->fprintf_func) (info->stream, " # "); 2189 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep 2190 + op_address[op_index[i]]), info); 2191 } 2192 return codep - inbuf; 2193} 2194 2195static const char *float_mem[] = { 2196 /* d8 */ 2197 "fadd{s||s|}", 2198 "fmul{s||s|}", 2199 "fcom{s||s|}", 2200 "fcomp{s||s|}", 2201 "fsub{s||s|}", 2202 "fsubr{s||s|}", 2203 "fdiv{s||s|}", 2204 "fdivr{s||s|}", 2205 /* d9 */ 2206 "fld{s||s|}", 2207 "(bad)", 2208 "fst{s||s|}", 2209 "fstp{s||s|}", 2210 "fldenv", 2211 "fldcw", 2212 "fNstenv", 2213 "fNstcw", 2214 /* da */ 2215 "fiadd{l||l|}", 2216 "fimul{l||l|}", 2217 "ficom{l||l|}", 2218 "ficomp{l||l|}", 2219 "fisub{l||l|}", 2220 "fisubr{l||l|}", 2221 "fidiv{l||l|}", 2222 "fidivr{l||l|}", 2223 /* db */ 2224 "fild{l||l|}", 2225 "(bad)", 2226 "fist{l||l|}", 2227 "fistp{l||l|}", 2228 "(bad)", 2229 "fld{t||t|}", 2230 "(bad)", 2231 "fstp{t||t|}", 2232 /* dc */ 2233 "fadd{l||l|}", 2234 "fmul{l||l|}", 2235 "fcom{l||l|}", 2236 "fcomp{l||l|}", 2237 "fsub{l||l|}", 2238 "fsubr{l||l|}", 2239 "fdiv{l||l|}", 2240 "fdivr{l||l|}", 2241 /* dd */ 2242 "fld{l||l|}", 2243 "(bad)", 2244 "fst{l||l|}", 2245 "fstp{l||l|}", 2246 "frstor", 2247 "(bad)", 2248 "fNsave", 2249 "fNstsw", 2250 /* de */ 2251 "fiadd", 2252 "fimul", 2253 "ficom", 2254 "ficomp", 2255 "fisub", 2256 "fisubr", 2257 "fidiv", 2258 "fidivr", 2259 /* df */ 2260 "fild", 2261 "(bad)", 2262 "fist", 2263 "fistp", 2264 "fbld", 2265 "fild{ll||ll|}", 2266 "fbstp", 2267 "fistpll", 2268}; 2269 2270#define ST OP_ST, 0 2271#define STi OP_STi, 0 2272 2273#define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0 2274#define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0 2275#define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0 2276#define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0 2277#define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0 2278#define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0 2279#define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0 2280#define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0 2281#define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0 2282 2283static const struct dis386 float_reg[][8] = { 2284 /* d8 */ 2285 { 2286 { "fadd", ST, STi, XX }, 2287 { "fmul", ST, STi, XX }, 2288 { "fcom", STi, XX, XX }, 2289 { "fcomp", STi, XX, XX }, 2290 { "fsub", ST, STi, XX }, 2291 { "fsubr", ST, STi, XX }, 2292 { "fdiv", ST, STi, XX }, 2293 { "fdivr", ST, STi, XX }, 2294 }, 2295 /* d9 */ 2296 { 2297 { "fld", STi, XX, XX }, 2298 { "fxch", STi, XX, XX }, 2299 { FGRPd9_2 }, 2300 { "(bad)", XX, XX, XX }, 2301 { FGRPd9_4 }, 2302 { FGRPd9_5 }, 2303 { FGRPd9_6 }, 2304 { FGRPd9_7 }, 2305 }, 2306 /* da */ 2307 { 2308 { "fcmovb", ST, STi, XX }, 2309 { "fcmove", ST, STi, XX }, 2310 { "fcmovbe",ST, STi, XX }, 2311 { "fcmovu", ST, STi, XX }, 2312 { "(bad)", XX, XX, XX }, 2313 { FGRPda_5 }, 2314 { "(bad)", XX, XX, XX }, 2315 { "(bad)", XX, XX, XX }, 2316 }, 2317 /* db */ 2318 { 2319 { "fcmovnb",ST, STi, XX }, 2320 { "fcmovne",ST, STi, XX }, 2321 { "fcmovnbe",ST, STi, XX }, 2322 { "fcmovnu",ST, STi, XX }, 2323 { FGRPdb_4 }, 2324 { "fucomi", ST, STi, XX }, 2325 { "fcomi", ST, STi, XX }, 2326 { "(bad)", XX, XX, XX }, 2327 }, 2328 /* dc */ 2329 { 2330 { "fadd", STi, ST, XX }, 2331 { "fmul", STi, ST, XX }, 2332 { "(bad)", XX, XX, XX }, 2333 { "(bad)", XX, XX, XX }, 2334#if UNIXWARE_COMPAT 2335 { "fsub", STi, ST, XX }, 2336 { "fsubr", STi, ST, XX }, 2337 { "fdiv", STi, ST, XX }, 2338 { "fdivr", STi, ST, XX }, 2339#else 2340 { "fsubr", STi, ST, XX }, 2341 { "fsub", STi, ST, XX }, 2342 { "fdivr", STi, ST, XX }, 2343 { "fdiv", STi, ST, XX }, 2344#endif 2345 }, 2346 /* dd */ 2347 { 2348 { "ffree", STi, XX, XX }, 2349 { "(bad)", XX, XX, XX }, 2350 { "fst", STi, XX, XX }, 2351 { "fstp", STi, XX, XX }, 2352 { "fucom", STi, XX, XX }, 2353 { "fucomp", STi, XX, XX }, 2354 { "(bad)", XX, XX, XX }, 2355 { "(bad)", XX, XX, XX }, 2356 }, 2357 /* de */ 2358 { 2359 { "faddp", STi, ST, XX }, 2360 { "fmulp", STi, ST, XX }, 2361 { "(bad)", XX, XX, XX }, 2362 { FGRPde_3 }, 2363#if UNIXWARE_COMPAT 2364 { "fsubp", STi, ST, XX }, 2365 { "fsubrp", STi, ST, XX }, 2366 { "fdivp", STi, ST, XX }, 2367 { "fdivrp", STi, ST, XX }, 2368#else 2369 { "fsubrp", STi, ST, XX }, 2370 { "fsubp", STi, ST, XX }, 2371 { "fdivrp", STi, ST, XX }, 2372 { "fdivp", STi, ST, XX }, 2373#endif 2374 }, 2375 /* df */ 2376 { 2377 { "ffreep", STi, XX, XX }, 2378 { "(bad)", XX, XX, XX }, 2379 { "(bad)", XX, XX, XX }, 2380 { "(bad)", XX, XX, XX }, 2381 { FGRPdf_4 }, 2382 { "fucomip",ST, STi, XX }, 2383 { "fcomip", ST, STi, XX }, 2384 { "(bad)", XX, XX, XX }, 2385 }, 2386}; 2387 2388static char *fgrps[][8] = { 2389 /* d9_2 0 */ 2390 { 2391 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 2392 }, 2393 2394 /* d9_4 1 */ 2395 { 2396 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)", 2397 }, 2398 2399 /* d9_5 2 */ 2400 { 2401 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)", 2402 }, 2403 2404 /* d9_6 3 */ 2405 { 2406 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp", 2407 }, 2408 2409 /* d9_7 4 */ 2410 { 2411 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos", 2412 }, 2413 2414 /* da_5 5 */ 2415 { 2416 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 2417 }, 2418 2419 /* db_4 6 */ 2420 { 2421 "feni(287 only)","fdisi(287 only)","fNclex","fNinit", 2422 "fNsetpm(287 only)","(bad)","(bad)","(bad)", 2423 }, 2424 2425 /* de_3 7 */ 2426 { 2427 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 2428 }, 2429 2430 /* df_4 8 */ 2431 { 2432 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 2433 }, 2434}; 2435 2436static void 2437dofloat (sizeflag) 2438 int sizeflag; 2439{ 2440 const struct dis386 *dp; 2441 unsigned char floatop; 2442 2443 floatop = codep[-1]; 2444 2445 if (mod != 3) 2446 { 2447 putop (float_mem[(floatop - 0xd8) * 8 + reg], sizeflag); 2448 obufp = op1out; 2449 if (floatop == 0xdb) 2450 OP_E (x_mode, sizeflag); 2451 else if (floatop == 0xdd) 2452 OP_E (d_mode, sizeflag); 2453 else 2454 OP_E (v_mode, sizeflag); 2455 return; 2456 } 2457 /* Skip mod/rm byte. */ 2458 MODRM_CHECK; 2459 codep++; 2460 2461 dp = &float_reg[floatop - 0xd8][reg]; 2462 if (dp->name == NULL) 2463 { 2464 putop (fgrps[dp->bytemode1][rm], sizeflag); 2465 2466 /* Instruction fnstsw is only one with strange arg. */ 2467 if (floatop == 0xdf && codep[-1] == 0xe0) 2468 strcpy (op1out, names16[0]); 2469 } 2470 else 2471 { 2472 putop (dp->name, sizeflag); 2473 2474 obufp = op1out; 2475 if (dp->op1) 2476 (*dp->op1) (dp->bytemode1, sizeflag); 2477 obufp = op2out; 2478 if (dp->op2) 2479 (*dp->op2) (dp->bytemode2, sizeflag); 2480 } 2481} 2482 2483static void 2484OP_ST (bytemode, sizeflag) 2485 int bytemode ATTRIBUTE_UNUSED; 2486 int sizeflag ATTRIBUTE_UNUSED; 2487{ 2488 oappend ("%st"); 2489} 2490 2491static void 2492OP_STi (bytemode, sizeflag) 2493 int bytemode ATTRIBUTE_UNUSED; 2494 int sizeflag ATTRIBUTE_UNUSED; 2495{ 2496 sprintf (scratchbuf, "%%st(%d)", rm); 2497 oappend (scratchbuf + intel_syntax); 2498} 2499 2500/* Capital letters in template are macros. */ 2501static int 2502putop (template, sizeflag) 2503 const char *template; 2504 int sizeflag; 2505{ 2506 const char *p; 2507 int alt; 2508 2509 for (p = template; *p; p++) 2510 { 2511 switch (*p) 2512 { 2513 default: 2514 *obufp++ = *p; 2515 break; 2516 case '{': 2517 alt = 0; 2518 if (intel_syntax) 2519 alt += 1; 2520 if (mode_64bit) 2521 alt += 2; 2522 while (alt != 0) 2523 { 2524 while (*++p != '|') 2525 { 2526 if (*p == '}') 2527 { 2528 /* Alternative not valid. */ 2529 strcpy (obuf, "(bad)"); 2530 obufp = obuf + 5; 2531 return 1; 2532 } 2533 else if (*p == '\0') 2534 abort (); 2535 } 2536 alt--; 2537 } 2538 break; 2539 case '|': 2540 while (*++p != '}') 2541 { 2542 if (*p == '\0') 2543 abort (); 2544 } 2545 break; 2546 case '}': 2547 break; 2548 case 'A': 2549 if (intel_syntax) 2550 break; 2551 if (mod != 3 2552#ifdef SUFFIX_ALWAYS 2553 || (sizeflag & SUFFIX_ALWAYS) 2554#endif 2555 ) 2556 *obufp++ = 'b'; 2557 break; 2558 case 'B': 2559 if (intel_syntax) 2560 break; 2561#ifdef SUFFIX_ALWAYS 2562 if (sizeflag & SUFFIX_ALWAYS) 2563 *obufp++ = 'b'; 2564#endif 2565 break; 2566 case 'E': /* For jcxz/jecxz */ 2567 if (sizeflag & AFLAG) 2568 *obufp++ = 'e'; 2569 used_prefixes |= (prefixes & PREFIX_ADDR); 2570 break; 2571 case 'F': 2572 if (intel_syntax) 2573 break; 2574 if ((prefixes & PREFIX_ADDR) 2575#ifdef SUFFIX_ALWAYS 2576 || (sizeflag & SUFFIX_ALWAYS) 2577#endif 2578 ) 2579 { 2580 if (sizeflag & AFLAG) 2581 *obufp++ = 'l'; 2582 else 2583 *obufp++ = 'w'; 2584 used_prefixes |= (prefixes & PREFIX_ADDR); 2585 } 2586 break; 2587 case 'H': 2588 if (intel_syntax) 2589 break; 2590 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS 2591 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS) 2592 { 2593 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS); 2594 *obufp++ = ','; 2595 *obufp++ = 'p'; 2596 if (prefixes & PREFIX_DS) 2597 *obufp++ = 't'; 2598 else 2599 *obufp++ = 'n'; 2600 } 2601 break; 2602 case 'L': 2603 if (intel_syntax) 2604 break; 2605#ifdef SUFFIX_ALWAYS 2606 if (sizeflag & SUFFIX_ALWAYS) 2607 *obufp++ = 'l'; 2608#endif 2609 break; 2610 case 'N': 2611 if ((prefixes & PREFIX_FWAIT) == 0) 2612 *obufp++ = 'n'; 2613 else 2614 used_prefixes |= PREFIX_FWAIT; 2615 break; 2616 case 'O': 2617 USED_REX (REX_MODE64); 2618 if (rex & REX_MODE64) 2619 *obufp++ = 'o'; 2620 else 2621 *obufp++ = 'd'; 2622 break; 2623 case 'T': 2624 if (intel_syntax) 2625 break; 2626 if (mode_64bit) 2627 { 2628 *obufp++ = 'q'; 2629 break; 2630 } 2631 /* Fall through. */ 2632 case 'P': 2633 if (intel_syntax) 2634 break; 2635 if ((prefixes & PREFIX_DATA) 2636 || (rex & REX_MODE64) 2637#ifdef SUFFIX_ALWAYS 2638 || (sizeflag & SUFFIX_ALWAYS) 2639#endif 2640 ) 2641 { 2642 USED_REX (REX_MODE64); 2643 if (rex & REX_MODE64) 2644 *obufp++ = 'q'; 2645 else 2646 { 2647 if (sizeflag & DFLAG) 2648 *obufp++ = 'l'; 2649 else 2650 *obufp++ = 'w'; 2651 used_prefixes |= (prefixes & PREFIX_DATA); 2652 } 2653 } 2654 break; 2655 case 'U': 2656 if (intel_syntax) 2657 break; 2658 if (mode_64bit) 2659 { 2660 *obufp++ = 'q'; 2661 break; 2662 } 2663 /* Fall through. */ 2664 case 'Q': 2665 if (intel_syntax) 2666 break; 2667 USED_REX (REX_MODE64); 2668 if (mod != 3 2669#ifdef SUFFIX_ALWAYS 2670 || (sizeflag & SUFFIX_ALWAYS) 2671#endif 2672 ) 2673 { 2674 if (rex & REX_MODE64) 2675 *obufp++ = 'q'; 2676 else 2677 { 2678 if (sizeflag & DFLAG) 2679 *obufp++ = 'l'; 2680 else 2681 *obufp++ = 'w'; 2682 used_prefixes |= (prefixes & PREFIX_DATA); 2683 } 2684 } 2685 break; 2686 case 'R': 2687 USED_REX (REX_MODE64); 2688 if (intel_syntax) 2689 { 2690 if (rex & REX_MODE64) 2691 { 2692 *obufp++ = 'q'; 2693 *obufp++ = 't'; 2694 } 2695 else if (sizeflag & DFLAG) 2696 { 2697 *obufp++ = 'd'; 2698 *obufp++ = 'q'; 2699 } 2700 else 2701 { 2702 *obufp++ = 'w'; 2703 *obufp++ = 'd'; 2704 } 2705 } 2706 else 2707 { 2708 if (rex & REX_MODE64) 2709 *obufp++ = 'q'; 2710 else if (sizeflag & DFLAG) 2711 *obufp++ = 'l'; 2712 else 2713 *obufp++ = 'w'; 2714 } 2715 if (!(rex & REX_MODE64)) 2716 used_prefixes |= (prefixes & PREFIX_DATA); 2717 break; 2718 case 'S': 2719 if (intel_syntax) 2720 break; 2721#ifdef SUFFIX_ALWAYS 2722 if (sizeflag & SUFFIX_ALWAYS) 2723 { 2724 if (rex & REX_MODE64) 2725 *obufp++ = 'q'; 2726 else 2727 { 2728 if (sizeflag & DFLAG) 2729 *obufp++ = 'l'; 2730 else 2731 *obufp++ = 'w'; 2732 used_prefixes |= (prefixes & PREFIX_DATA); 2733 } 2734 } 2735#endif 2736 break; 2737 case 'X': 2738 if (prefixes & PREFIX_DATA) 2739 *obufp++ = 'd'; 2740 else 2741 *obufp++ = 's'; 2742 used_prefixes |= (prefixes & PREFIX_DATA); 2743 break; 2744 case 'Y': 2745 if (intel_syntax) 2746 break; 2747 if (rex & REX_MODE64) 2748 { 2749 USED_REX (REX_MODE64); 2750 *obufp++ = 'q'; 2751 } 2752 break; 2753 /* implicit operand size 'l' for i386 or 'q' for x86-64 */ 2754 case 'W': 2755 /* operand size flag for cwtl, cbtw */ 2756 USED_REX (0); 2757 if (rex) 2758 *obufp++ = 'l'; 2759 else if (sizeflag & DFLAG) 2760 *obufp++ = 'w'; 2761 else 2762 *obufp++ = 'b'; 2763 if (intel_syntax) 2764 { 2765 if (rex) 2766 { 2767 *obufp++ = 'q'; 2768 *obufp++ = 'e'; 2769 } 2770 if (sizeflag & DFLAG) 2771 { 2772 *obufp++ = 'd'; 2773 *obufp++ = 'e'; 2774 } 2775 else 2776 { 2777 *obufp++ = 'w'; 2778 } 2779 } 2780 if (!rex) 2781 used_prefixes |= (prefixes & PREFIX_DATA); 2782 break; 2783 } 2784 } 2785 *obufp = 0; 2786 return 0; 2787} 2788 2789static void 2790oappend (s) 2791 const char *s; 2792{ 2793 strcpy (obufp, s); 2794 obufp += strlen (s); 2795} 2796 2797static void 2798append_seg () 2799{ 2800 if (prefixes & PREFIX_CS) 2801 { 2802 used_prefixes |= PREFIX_CS; 2803 oappend ("%cs:" + intel_syntax); 2804 } 2805 if (prefixes & PREFIX_DS) 2806 { 2807 used_prefixes |= PREFIX_DS; 2808 oappend ("%ds:" + intel_syntax); 2809 } 2810 if (prefixes & PREFIX_SS) 2811 { 2812 used_prefixes |= PREFIX_SS; 2813 oappend ("%ss:" + intel_syntax); 2814 } 2815 if (prefixes & PREFIX_ES) 2816 { 2817 used_prefixes |= PREFIX_ES; 2818 oappend ("%es:" + intel_syntax); 2819 } 2820 if (prefixes & PREFIX_FS) 2821 { 2822 used_prefixes |= PREFIX_FS; 2823 oappend ("%fs:" + intel_syntax); 2824 } 2825 if (prefixes & PREFIX_GS) 2826 { 2827 used_prefixes |= PREFIX_GS; 2828 oappend ("%gs:" + intel_syntax); 2829 } 2830} 2831 2832static void 2833OP_indirE (bytemode, sizeflag) 2834 int bytemode; 2835 int sizeflag; 2836{ 2837 if (!intel_syntax) 2838 oappend ("*"); 2839 OP_E (bytemode, sizeflag); 2840} 2841 2842static void 2843print_operand_value (buf, hex, disp) 2844 char *buf; 2845 int hex; 2846 bfd_vma disp; 2847{ 2848 if (mode_64bit) 2849 { 2850 if (hex) 2851 { 2852 char tmp[30]; 2853 int i; 2854 buf[0] = '0'; 2855 buf[1] = 'x'; 2856 sprintf_vma (tmp, disp); 2857 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++); 2858 strcpy (buf + 2, tmp + i); 2859 } 2860 else 2861 { 2862 bfd_signed_vma v = disp; 2863 char tmp[30]; 2864 int i; 2865 if (v < 0) 2866 { 2867 *(buf++) = '-'; 2868 v = -disp; 2869 /* Check for possible overflow on 0x8000000000000000. */ 2870 if (v < 0) 2871 { 2872 strcpy (buf, "9223372036854775808"); 2873 return; 2874 } 2875 } 2876 if (!v) 2877 { 2878 strcpy (buf, "0"); 2879 return; 2880 } 2881 2882 i = 0; 2883 tmp[29] = 0; 2884 while (v) 2885 { 2886 tmp[28 - i] = (v % 10) + '0'; 2887 v /= 10; 2888 i++; 2889 } 2890 strcpy (buf, tmp + 29 - i); 2891 } 2892 } 2893 else 2894 { 2895 if (hex) 2896 sprintf (buf, "0x%x", (unsigned int) disp); 2897 else 2898 sprintf (buf, "%d", (int) disp); 2899 } 2900} 2901 2902static void 2903OP_E (bytemode, sizeflag) 2904 int bytemode; 2905 int sizeflag; 2906{ 2907 bfd_vma disp; 2908 int add = 0; 2909 int riprel = 0; 2910 USED_REX (REX_EXTZ); 2911 if (rex & REX_EXTZ) 2912 add += 8; 2913 2914 /* Skip mod/rm byte. */ 2915 MODRM_CHECK; 2916 codep++; 2917 2918 if (mod == 3) 2919 { 2920 switch (bytemode) 2921 { 2922 case b_mode: 2923 USED_REX (0); 2924 if (rex) 2925 oappend (names8rex[rm + add]); 2926 else 2927 oappend (names8[rm + add]); 2928 break; 2929 case w_mode: 2930 oappend (names16[rm + add]); 2931 break; 2932 case d_mode: 2933 oappend (names32[rm + add]); 2934 break; 2935 case q_mode: 2936 oappend (names64[rm + add]); 2937 break; 2938 case m_mode: 2939 if (mode_64bit) 2940 oappend (names64[rm + add]); 2941 else 2942 oappend (names32[rm + add]); 2943 break; 2944 case v_mode: 2945 USED_REX (REX_MODE64); 2946 if (rex & REX_MODE64) 2947 oappend (names64[rm + add]); 2948 else if (sizeflag & DFLAG) 2949 oappend (names32[rm + add]); 2950 else 2951 oappend (names16[rm + add]); 2952 used_prefixes |= (prefixes & PREFIX_DATA); 2953 break; 2954 case 0: 2955 if (!(codep[-2] == 0xAE && codep[-1] == 0xF8 /* sfence */) 2956 && !(codep[-2] == 0xAE && codep[-1] == 0xF0 /* mfence */) 2957 && !(codep[-2] == 0xAE && codep[-1] == 0xe8 /* lfence */)) 2958 BadOp (); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */ 2959 break; 2960 default: 2961 oappend (INTERNAL_DISASSEMBLER_ERROR); 2962 break; 2963 } 2964 return; 2965 } 2966 2967 disp = 0; 2968 append_seg (); 2969 2970 if (sizeflag & AFLAG) /* 32 bit address mode */ 2971 { 2972 int havesib; 2973 int havebase; 2974 int base; 2975 int index = 0; 2976 int scale = 0; 2977 2978 havesib = 0; 2979 havebase = 1; 2980 base = rm; 2981 2982 if (base == 4) 2983 { 2984 havesib = 1; 2985 FETCH_DATA (the_info, codep + 1); 2986 scale = (*codep >> 6) & 3; 2987 index = (*codep >> 3) & 7; 2988 base = *codep & 7; 2989 USED_REX (REX_EXTY); 2990 USED_REX (REX_EXTZ); 2991 if (rex & REX_EXTY) 2992 index += 8; 2993 if (rex & REX_EXTZ) 2994 base += 8; 2995 codep++; 2996 } 2997 2998 switch (mod) 2999 { 3000 case 0: 3001 if ((base & 7) == 5) 3002 { 3003 havebase = 0; 3004 if (mode_64bit && !havesib) 3005 riprel = 1; 3006 disp = get32s (); 3007 } 3008 break; 3009 case 1: 3010 FETCH_DATA (the_info, codep + 1); 3011 disp = *codep++; 3012 if ((disp & 0x80) != 0) 3013 disp -= 0x100; 3014 break; 3015 case 2: 3016 disp = get32s (); 3017 break; 3018 } 3019 3020 if (!intel_syntax) 3021 if (mod != 0 || (base & 7) == 5) 3022 { 3023 print_operand_value (scratchbuf, !riprel, disp); 3024 oappend (scratchbuf); 3025 if (riprel) 3026 { 3027 set_op (disp, 1); 3028 oappend ("(%rip)"); 3029 } 3030 } 3031 3032 if (havebase || (havesib && (index != 4 || scale != 0))) 3033 { 3034 if (intel_syntax) 3035 { 3036 switch (bytemode) 3037 { 3038 case b_mode: 3039 oappend ("BYTE PTR "); 3040 break; 3041 case w_mode: 3042 oappend ("WORD PTR "); 3043 break; 3044 case v_mode: 3045 oappend ("DWORD PTR "); 3046 break; 3047 case d_mode: 3048 oappend ("QWORD PTR "); 3049 break; 3050 case m_mode: 3051 if (mode_64bit) 3052 oappend ("DWORD PTR "); 3053 else 3054 oappend ("QWORD PTR "); 3055 break; 3056 case x_mode: 3057 oappend ("XWORD PTR "); 3058 break; 3059 default: 3060 break; 3061 } 3062 } 3063 *obufp++ = open_char; 3064 if (intel_syntax && riprel) 3065 oappend ("rip + "); 3066 *obufp = '\0'; 3067 USED_REX (REX_EXTZ); 3068 if (!havesib && (rex & REX_EXTZ)) 3069 base += 8; 3070 if (havebase) 3071 oappend (mode_64bit ? names64[base] : names32[base]); 3072 if (havesib) 3073 { 3074 if (index != 4) 3075 { 3076 if (intel_syntax) 3077 { 3078 if (havebase) 3079 { 3080 *obufp++ = separator_char; 3081 *obufp = '\0'; 3082 } 3083 sprintf (scratchbuf, "%s", 3084 mode_64bit ? names64[index] : names32[index]); 3085 } 3086 else 3087 sprintf (scratchbuf, ",%s", 3088 mode_64bit ? names64[index] : names32[index]); 3089 oappend (scratchbuf); 3090 } 3091 if (!intel_syntax 3092 || (intel_syntax 3093 && bytemode != b_mode 3094 && bytemode != w_mode 3095 && bytemode != v_mode)) 3096 { 3097 *obufp++ = scale_char; 3098 *obufp = '\0'; 3099 sprintf (scratchbuf, "%d", 1 << scale); 3100 oappend (scratchbuf); 3101 } 3102 } 3103 if (intel_syntax) 3104 if (mod != 0 || (base & 7) == 5) 3105 { 3106 /* Don't print zero displacements. */ 3107 if (disp != 0) 3108 { 3109 if ((bfd_signed_vma) disp > 0) 3110 { 3111 *obufp++ = '+'; 3112 *obufp = '\0'; 3113 } 3114 3115 print_operand_value (scratchbuf, 0, disp); 3116 oappend (scratchbuf); 3117 } 3118 } 3119 3120 *obufp++ = close_char; 3121 *obufp = '\0'; 3122 } 3123 else if (intel_syntax) 3124 { 3125 if (mod != 0 || (base & 7) == 5) 3126 { 3127 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 3128 | PREFIX_ES | PREFIX_FS | PREFIX_GS)) 3129 ; 3130 else 3131 { 3132 oappend (names_seg[ds_reg - es_reg]); 3133 oappend (":"); 3134 } 3135 print_operand_value (scratchbuf, 1, disp); 3136 oappend (scratchbuf); 3137 } 3138 } 3139 } 3140 else 3141 { /* 16 bit address mode */ 3142 switch (mod) 3143 { 3144 case 0: 3145 if ((rm & 7) == 6) 3146 { 3147 disp = get16 (); 3148 if ((disp & 0x8000) != 0) 3149 disp -= 0x10000; 3150 } 3151 break; 3152 case 1: 3153 FETCH_DATA (the_info, codep + 1); 3154 disp = *codep++; 3155 if ((disp & 0x80) != 0) 3156 disp -= 0x100; 3157 break; 3158 case 2: 3159 disp = get16 (); 3160 if ((disp & 0x8000) != 0) 3161 disp -= 0x10000; 3162 break; 3163 } 3164 3165 if (!intel_syntax) 3166 if (mod != 0 || (rm & 7) == 6) 3167 { 3168 print_operand_value (scratchbuf, 0, disp); 3169 oappend (scratchbuf); 3170 } 3171 3172 if (mod != 0 || (rm & 7) != 6) 3173 { 3174 *obufp++ = open_char; 3175 *obufp = '\0'; 3176 oappend (index16[rm + add]); 3177 *obufp++ = close_char; 3178 *obufp = '\0'; 3179 } 3180 } 3181} 3182 3183static void 3184OP_G (bytemode, sizeflag) 3185 int bytemode; 3186 int sizeflag; 3187{ 3188 int add = 0; 3189 USED_REX (REX_EXTX); 3190 if (rex & REX_EXTX) 3191 add += 8; 3192 switch (bytemode) 3193 { 3194 case b_mode: 3195 USED_REX (0); 3196 if (rex) 3197 oappend (names8rex[reg + add]); 3198 else 3199 oappend (names8[reg + add]); 3200 break; 3201 case w_mode: 3202 oappend (names16[reg + add]); 3203 break; 3204 case d_mode: 3205 oappend (names32[reg + add]); 3206 break; 3207 case q_mode: 3208 oappend (names64[reg + add]); 3209 break; 3210 case v_mode: 3211 USED_REX (REX_MODE64); 3212 if (rex & REX_MODE64) 3213 oappend (names64[reg + add]); 3214 else if (sizeflag & DFLAG) 3215 oappend (names32[reg + add]); 3216 else 3217 oappend (names16[reg + add]); 3218 used_prefixes |= (prefixes & PREFIX_DATA); 3219 break; 3220 default: 3221 oappend (INTERNAL_DISASSEMBLER_ERROR); 3222 break; 3223 } 3224} 3225 3226static bfd_vma 3227get64 () 3228{ 3229 bfd_vma x; 3230#ifdef BFD64 3231 unsigned int a; 3232 unsigned int b; 3233 3234 FETCH_DATA (the_info, codep + 8); 3235 a = *codep++ & 0xff; 3236 a |= (*codep++ & 0xff) << 8; 3237 a |= (*codep++ & 0xff) << 16; 3238 a |= (*codep++ & 0xff) << 24; 3239 b = *codep++ & 0xff; 3240 b |= (*codep++ & 0xff) << 8; 3241 b |= (*codep++ & 0xff) << 16; 3242 b |= (*codep++ & 0xff) << 24; 3243 x = a + ((bfd_vma) b << 32); 3244#else 3245 abort (); 3246 x = 0; 3247#endif 3248 return x; 3249} 3250 3251static bfd_signed_vma 3252get32 () 3253{ 3254 bfd_signed_vma x = 0; 3255 3256 FETCH_DATA (the_info, codep + 4); 3257 x = *codep++ & (bfd_signed_vma) 0xff; 3258 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; 3259 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; 3260 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; 3261 return x; 3262} 3263 3264static bfd_signed_vma 3265get32s () 3266{ 3267 bfd_signed_vma x = 0; 3268 3269 FETCH_DATA (the_info, codep + 4); 3270 x = *codep++ & (bfd_signed_vma) 0xff; 3271 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; 3272 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; 3273 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; 3274 3275 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31); 3276 3277 return x; 3278} 3279 3280static int 3281get16 () 3282{ 3283 int x = 0; 3284 3285 FETCH_DATA (the_info, codep + 2); 3286 x = *codep++ & 0xff; 3287 x |= (*codep++ & 0xff) << 8; 3288 return x; 3289} 3290 3291static void 3292set_op (op, riprel) 3293 bfd_vma op; 3294 int riprel; 3295{ 3296 op_index[op_ad] = op_ad; 3297 if (mode_64bit) 3298 { 3299 op_address[op_ad] = op; 3300 op_riprel[op_ad] = riprel; 3301 } 3302 else 3303 { 3304 /* Mask to get a 32-bit address. */ 3305 op_address[op_ad] = op & 0xffffffff; 3306 op_riprel[op_ad] = riprel & 0xffffffff; 3307 } 3308} 3309 3310static void 3311OP_REG (code, sizeflag) 3312 int code; 3313 int sizeflag; 3314{ 3315 const char *s; 3316 int add = 0; 3317 USED_REX (REX_EXTZ); 3318 if (rex & REX_EXTZ) 3319 add = 8; 3320 3321 switch (code) 3322 { 3323 case indir_dx_reg: 3324 if (intel_syntax) 3325 s = "[dx]"; 3326 else 3327 s = "(%dx)"; 3328 break; 3329 case ax_reg: case cx_reg: case dx_reg: case bx_reg: 3330 case sp_reg: case bp_reg: case si_reg: case di_reg: 3331 s = names16[code - ax_reg + add]; 3332 break; 3333 case es_reg: case ss_reg: case cs_reg: 3334 case ds_reg: case fs_reg: case gs_reg: 3335 s = names_seg[code - es_reg + add]; 3336 break; 3337 case al_reg: case ah_reg: case cl_reg: case ch_reg: 3338 case dl_reg: case dh_reg: case bl_reg: case bh_reg: 3339 USED_REX (0); 3340 if (rex) 3341 s = names8rex[code - al_reg + add]; 3342 else 3343 s = names8[code - al_reg]; 3344 break; 3345 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg: 3346 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg: 3347 if (mode_64bit) 3348 { 3349 s = names64[code - rAX_reg + add]; 3350 break; 3351 } 3352 code += eAX_reg - rAX_reg; 3353 /* Fall through. */ 3354 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: 3355 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: 3356 USED_REX (REX_MODE64); 3357 if (rex & REX_MODE64) 3358 s = names64[code - eAX_reg + add]; 3359 else if (sizeflag & DFLAG) 3360 s = names32[code - eAX_reg + add]; 3361 else 3362 s = names16[code - eAX_reg + add]; 3363 used_prefixes |= (prefixes & PREFIX_DATA); 3364 break; 3365 default: 3366 s = INTERNAL_DISASSEMBLER_ERROR; 3367 break; 3368 } 3369 oappend (s); 3370} 3371 3372static void 3373OP_IMREG (code, sizeflag) 3374 int code; 3375 int sizeflag; 3376{ 3377 const char *s; 3378 3379 switch (code) 3380 { 3381 case indir_dx_reg: 3382 if (intel_syntax) 3383 s = "[dx]"; 3384 else 3385 s = "(%dx)"; 3386 break; 3387 case ax_reg: case cx_reg: case dx_reg: case bx_reg: 3388 case sp_reg: case bp_reg: case si_reg: case di_reg: 3389 s = names16[code - ax_reg]; 3390 break; 3391 case es_reg: case ss_reg: case cs_reg: 3392 case ds_reg: case fs_reg: case gs_reg: 3393 s = names_seg[code - es_reg]; 3394 break; 3395 case al_reg: case ah_reg: case cl_reg: case ch_reg: 3396 case dl_reg: case dh_reg: case bl_reg: case bh_reg: 3397 USED_REX (0); 3398 if (rex) 3399 s = names8rex[code - al_reg]; 3400 else 3401 s = names8[code - al_reg]; 3402 break; 3403 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: 3404 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: 3405 USED_REX (REX_MODE64); 3406 if (rex & REX_MODE64) 3407 s = names64[code - eAX_reg]; 3408 else if (sizeflag & DFLAG) 3409 s = names32[code - eAX_reg]; 3410 else 3411 s = names16[code - eAX_reg]; 3412 used_prefixes |= (prefixes & PREFIX_DATA); 3413 break; 3414 default: 3415 s = INTERNAL_DISASSEMBLER_ERROR; 3416 break; 3417 } 3418 oappend (s); 3419} 3420 3421static void 3422OP_I (bytemode, sizeflag) 3423 int bytemode; 3424 int sizeflag; 3425{ 3426 bfd_signed_vma op; 3427 bfd_signed_vma mask = -1; 3428 3429 switch (bytemode) 3430 { 3431 case b_mode: 3432 FETCH_DATA (the_info, codep + 1); 3433 op = *codep++; 3434 mask = 0xff; 3435 break; 3436 case q_mode: 3437 if (mode_64bit) 3438 { 3439 op = get32s (); 3440 break; 3441 } 3442 /* Fall through. */ 3443 case v_mode: 3444 USED_REX (REX_MODE64); 3445 if (rex & REX_MODE64) 3446 op = get32s (); 3447 else if (sizeflag & DFLAG) 3448 { 3449 op = get32 (); 3450 mask = 0xffffffff; 3451 } 3452 else 3453 { 3454 op = get16 (); 3455 mask = 0xfffff; 3456 } 3457 used_prefixes |= (prefixes & PREFIX_DATA); 3458 break; 3459 case w_mode: 3460 mask = 0xfffff; 3461 op = get16 (); 3462 break; 3463 default: 3464 oappend (INTERNAL_DISASSEMBLER_ERROR); 3465 return; 3466 } 3467 3468 op &= mask; 3469 scratchbuf[0] = '$'; 3470 print_operand_value (scratchbuf + 1, 1, op); 3471 oappend (scratchbuf + intel_syntax); 3472 scratchbuf[0] = '\0'; 3473} 3474 3475static void 3476OP_I64 (bytemode, sizeflag) 3477 int bytemode; 3478 int sizeflag; 3479{ 3480 bfd_signed_vma op; 3481 bfd_signed_vma mask = -1; 3482 3483 if (!mode_64bit) 3484 { 3485 OP_I (bytemode, sizeflag); 3486 return; 3487 } 3488 3489 switch (bytemode) 3490 { 3491 case b_mode: 3492 FETCH_DATA (the_info, codep + 1); 3493 op = *codep++; 3494 mask = 0xff; 3495 break; 3496 case v_mode: 3497 USED_REX (REX_MODE64); 3498 if (rex & REX_MODE64) 3499 op = get64 (); 3500 else if (sizeflag & DFLAG) 3501 { 3502 op = get32 (); 3503 mask = 0xffffffff; 3504 } 3505 else 3506 { 3507 op = get16 (); 3508 mask = 0xfffff; 3509 } 3510 used_prefixes |= (prefixes & PREFIX_DATA); 3511 break; 3512 case w_mode: 3513 mask = 0xfffff; 3514 op = get16 (); 3515 break; 3516 default: 3517 oappend (INTERNAL_DISASSEMBLER_ERROR); 3518 return; 3519 } 3520 3521 op &= mask; 3522 scratchbuf[0] = '$'; 3523 print_operand_value (scratchbuf + 1, 1, op); 3524 oappend (scratchbuf + intel_syntax); 3525 scratchbuf[0] = '\0'; 3526} 3527 3528static void 3529OP_sI (bytemode, sizeflag) 3530 int bytemode; 3531 int sizeflag; 3532{ 3533 bfd_signed_vma op; 3534 bfd_signed_vma mask = -1; 3535 3536 switch (bytemode) 3537 { 3538 case b_mode: 3539 FETCH_DATA (the_info, codep + 1); 3540 op = *codep++; 3541 if ((op & 0x80) != 0) 3542 op -= 0x100; 3543 mask = 0xffffffff; 3544 break; 3545 case v_mode: 3546 USED_REX (REX_MODE64); 3547 if (rex & REX_MODE64) 3548 op = get32s (); 3549 else if (sizeflag & DFLAG) 3550 { 3551 op = get32s (); 3552 mask = 0xffffffff; 3553 } 3554 else 3555 { 3556 mask = 0xffffffff; 3557 op = get16 (); 3558 if ((op & 0x8000) != 0) 3559 op -= 0x10000; 3560 } 3561 used_prefixes |= (prefixes & PREFIX_DATA); 3562 break; 3563 case w_mode: 3564 op = get16 (); 3565 mask = 0xffffffff; 3566 if ((op & 0x8000) != 0) 3567 op -= 0x10000; 3568 break; 3569 default: 3570 oappend (INTERNAL_DISASSEMBLER_ERROR); 3571 return; 3572 } 3573 3574 scratchbuf[0] = '$'; 3575 print_operand_value (scratchbuf + 1, 1, op); 3576 oappend (scratchbuf + intel_syntax); 3577} 3578 3579static void 3580OP_J (bytemode, sizeflag) 3581 int bytemode; 3582 int sizeflag; 3583{ 3584 bfd_vma disp; 3585 bfd_vma mask = -1; 3586 3587 switch (bytemode) 3588 { 3589 case b_mode: 3590 FETCH_DATA (the_info, codep + 1); 3591 disp = *codep++; 3592 if ((disp & 0x80) != 0) 3593 disp -= 0x100; 3594 break; 3595 case v_mode: 3596 if (sizeflag & DFLAG) 3597 disp = get32s (); 3598 else 3599 { 3600 disp = get16 (); 3601 /* For some reason, a data16 prefix on a jump instruction 3602 means that the pc is masked to 16 bits after the 3603 displacement is added! */ 3604 mask = 0xffff; 3605 } 3606 break; 3607 default: 3608 oappend (INTERNAL_DISASSEMBLER_ERROR); 3609 return; 3610 } 3611 disp = (start_pc + codep - start_codep + disp) & mask; 3612 set_op (disp, 0); 3613 print_operand_value (scratchbuf, 1, disp); 3614 oappend (scratchbuf); 3615} 3616 3617static void 3618OP_SEG (dummy, sizeflag) 3619 int dummy ATTRIBUTE_UNUSED; 3620 int sizeflag ATTRIBUTE_UNUSED; 3621{ 3622 oappend (names_seg[reg]); 3623} 3624 3625static void 3626OP_DIR (dummy, sizeflag) 3627 int dummy ATTRIBUTE_UNUSED; 3628 int sizeflag; 3629{ 3630 int seg, offset; 3631 3632 if (sizeflag & DFLAG) 3633 { 3634 offset = get32 (); 3635 seg = get16 (); 3636 } 3637 else 3638 { 3639 offset = get16 (); 3640 seg = get16 (); 3641 } 3642 used_prefixes |= (prefixes & PREFIX_DATA); 3643 if (intel_syntax) 3644 sprintf (scratchbuf, "0x%x,0x%x", seg, offset); 3645 else 3646 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset); 3647 oappend (scratchbuf); 3648} 3649 3650static void 3651OP_OFF (bytemode, sizeflag) 3652 int bytemode ATTRIBUTE_UNUSED; 3653 int sizeflag; 3654{ 3655 bfd_vma off; 3656 3657 append_seg (); 3658 3659 if (sizeflag & AFLAG) 3660 off = get32 (); 3661 else 3662 off = get16 (); 3663 3664 if (intel_syntax) 3665 { 3666 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 3667 | PREFIX_ES | PREFIX_FS | PREFIX_GS))) 3668 { 3669 oappend (names_seg[ds_reg - es_reg]); 3670 oappend (":"); 3671 } 3672 } 3673 print_operand_value (scratchbuf, 1, off); 3674 oappend (scratchbuf); 3675} 3676 3677static void 3678OP_OFF64 (bytemode, sizeflag) 3679 int bytemode ATTRIBUTE_UNUSED; 3680 int sizeflag ATTRIBUTE_UNUSED; 3681{ 3682 bfd_vma off; 3683 3684 if (!mode_64bit) 3685 { 3686 OP_OFF (bytemode, sizeflag); 3687 return; 3688 } 3689 3690 append_seg (); 3691 3692 off = get64 (); 3693 3694 if (intel_syntax) 3695 { 3696 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 3697 | PREFIX_ES | PREFIX_FS | PREFIX_GS))) 3698 { 3699 oappend (names_seg[ds_reg - es_reg]); 3700 oappend (":"); 3701 } 3702 } 3703 print_operand_value (scratchbuf, 1, off); 3704 oappend (scratchbuf); 3705} 3706 3707static void 3708ptr_reg (code, sizeflag) 3709 int code; 3710 int sizeflag; 3711{ 3712 const char *s; 3713 if (intel_syntax) 3714 oappend ("["); 3715 else 3716 oappend ("("); 3717 3718 USED_REX (REX_MODE64); 3719 if (rex & REX_MODE64) 3720 s = names64[code - eAX_reg]; 3721 else if (sizeflag & AFLAG) 3722 s = names32[code - eAX_reg]; 3723 else 3724 s = names16[code - eAX_reg]; 3725 oappend (s); 3726 if (intel_syntax) 3727 oappend ("]"); 3728 else 3729 oappend (")"); 3730} 3731 3732static void 3733OP_ESreg (code, sizeflag) 3734 int code; 3735 int sizeflag; 3736{ 3737 oappend ("%es:" + intel_syntax); 3738 ptr_reg (code, sizeflag); 3739} 3740 3741static void 3742OP_DSreg (code, sizeflag) 3743 int code; 3744 int sizeflag; 3745{ 3746 if ((prefixes 3747 & (PREFIX_CS 3748 | PREFIX_DS 3749 | PREFIX_SS 3750 | PREFIX_ES 3751 | PREFIX_FS 3752 | PREFIX_GS)) == 0) 3753 prefixes |= PREFIX_DS; 3754 append_seg (); 3755 ptr_reg (code, sizeflag); 3756} 3757 3758static void 3759OP_C (dummy, sizeflag) 3760 int dummy ATTRIBUTE_UNUSED; 3761 int sizeflag ATTRIBUTE_UNUSED; 3762{ 3763 int add = 0; 3764 USED_REX (REX_EXTX); 3765 if (rex & REX_EXTX) 3766 add = 8; 3767 sprintf (scratchbuf, "%%cr%d", reg + add); 3768 oappend (scratchbuf + intel_syntax); 3769} 3770 3771static void 3772OP_D (dummy, sizeflag) 3773 int dummy ATTRIBUTE_UNUSED; 3774 int sizeflag ATTRIBUTE_UNUSED; 3775{ 3776 int add = 0; 3777 USED_REX (REX_EXTX); 3778 if (rex & REX_EXTX) 3779 add = 8; 3780 if (intel_syntax) 3781 sprintf (scratchbuf, "db%d", reg + add); 3782 else 3783 sprintf (scratchbuf, "%%db%d", reg + add); 3784 oappend (scratchbuf); 3785} 3786 3787static void 3788OP_T (dummy, sizeflag) 3789 int dummy ATTRIBUTE_UNUSED; 3790 int sizeflag ATTRIBUTE_UNUSED; 3791{ 3792 sprintf (scratchbuf, "%%tr%d", reg); 3793 oappend (scratchbuf + intel_syntax); 3794} 3795 3796static void 3797OP_Rd (bytemode, sizeflag) 3798 int bytemode; 3799 int sizeflag; 3800{ 3801 if (mod == 3) 3802 OP_E (bytemode, sizeflag); 3803 else 3804 BadOp (); 3805} 3806 3807static void 3808OP_MMX (bytemode, sizeflag) 3809 int bytemode ATTRIBUTE_UNUSED; 3810 int sizeflag ATTRIBUTE_UNUSED; 3811{ 3812 int add = 0; 3813 USED_REX (REX_EXTX); 3814 if (rex & REX_EXTX) 3815 add = 8; 3816 used_prefixes |= (prefixes & PREFIX_DATA); 3817 if (prefixes & PREFIX_DATA) 3818 sprintf (scratchbuf, "%%xmm%d", reg + add); 3819 else 3820 sprintf (scratchbuf, "%%mm%d", reg + add); 3821 oappend (scratchbuf + intel_syntax); 3822} 3823 3824static void 3825OP_XMM (bytemode, sizeflag) 3826 int bytemode ATTRIBUTE_UNUSED; 3827 int sizeflag ATTRIBUTE_UNUSED; 3828{ 3829 int add = 0; 3830 USED_REX (REX_EXTX); 3831 if (rex & REX_EXTX) 3832 add = 8; 3833 sprintf (scratchbuf, "%%xmm%d", reg + add); 3834 oappend (scratchbuf + intel_syntax); 3835} 3836 3837static void 3838OP_EM (bytemode, sizeflag) 3839 int bytemode; 3840 int sizeflag; 3841{ 3842 int add = 0; 3843 if (mod != 3) 3844 { 3845 OP_E (bytemode, sizeflag); 3846 return; 3847 } 3848 USED_REX (REX_EXTZ); 3849 if (rex & REX_EXTZ) 3850 add = 8; 3851 3852 /* Skip mod/rm byte. */ 3853 MODRM_CHECK; 3854 codep++; 3855 used_prefixes |= (prefixes & PREFIX_DATA); 3856 if (prefixes & PREFIX_DATA) 3857 sprintf (scratchbuf, "%%xmm%d", rm + add); 3858 else 3859 sprintf (scratchbuf, "%%mm%d", rm + add); 3860 oappend (scratchbuf + intel_syntax); 3861} 3862 3863static void 3864OP_EX (bytemode, sizeflag) 3865 int bytemode; 3866 int sizeflag; 3867{ 3868 int add = 0; 3869 if (mod != 3) 3870 { 3871 OP_E (bytemode, sizeflag); 3872 return; 3873 } 3874 USED_REX (REX_EXTZ); 3875 if (rex & REX_EXTZ) 3876 add = 8; 3877 3878 /* Skip mod/rm byte. */ 3879 MODRM_CHECK; 3880 codep++; 3881 sprintf (scratchbuf, "%%xmm%d", rm + add); 3882 oappend (scratchbuf + intel_syntax); 3883} 3884 3885static void 3886OP_MS (bytemode, sizeflag) 3887 int bytemode; 3888 int sizeflag; 3889{ 3890 if (mod == 3) 3891 OP_EM (bytemode, sizeflag); 3892 else 3893 BadOp (); 3894} 3895 3896static void 3897OP_XS (bytemode, sizeflag) 3898 int bytemode; 3899 int sizeflag; 3900{ 3901 if (mod == 3) 3902 OP_EX (bytemode, sizeflag); 3903 else 3904 BadOp (); 3905} 3906 3907static const char *Suffix3DNow[] = { 3908/* 00 */ NULL, NULL, NULL, NULL, 3909/* 04 */ NULL, NULL, NULL, NULL, 3910/* 08 */ NULL, NULL, NULL, NULL, 3911/* 0C */ "pi2fw", "pi2fd", NULL, NULL, 3912/* 10 */ NULL, NULL, NULL, NULL, 3913/* 14 */ NULL, NULL, NULL, NULL, 3914/* 18 */ NULL, NULL, NULL, NULL, 3915/* 1C */ "pf2iw", "pf2id", NULL, NULL, 3916/* 20 */ NULL, NULL, NULL, NULL, 3917/* 24 */ NULL, NULL, NULL, NULL, 3918/* 28 */ NULL, NULL, NULL, NULL, 3919/* 2C */ NULL, NULL, NULL, NULL, 3920/* 30 */ NULL, NULL, NULL, NULL, 3921/* 34 */ NULL, NULL, NULL, NULL, 3922/* 38 */ NULL, NULL, NULL, NULL, 3923/* 3C */ NULL, NULL, NULL, NULL, 3924/* 40 */ NULL, NULL, NULL, NULL, 3925/* 44 */ NULL, NULL, NULL, NULL, 3926/* 48 */ NULL, NULL, NULL, NULL, 3927/* 4C */ NULL, NULL, NULL, NULL, 3928/* 50 */ NULL, NULL, NULL, NULL, 3929/* 54 */ NULL, NULL, NULL, NULL, 3930/* 58 */ NULL, NULL, NULL, NULL, 3931/* 5C */ NULL, NULL, NULL, NULL, 3932/* 60 */ NULL, NULL, NULL, NULL, 3933/* 64 */ NULL, NULL, NULL, NULL, 3934/* 68 */ NULL, NULL, NULL, NULL, 3935/* 6C */ NULL, NULL, NULL, NULL, 3936/* 70 */ NULL, NULL, NULL, NULL, 3937/* 74 */ NULL, NULL, NULL, NULL, 3938/* 78 */ NULL, NULL, NULL, NULL, 3939/* 7C */ NULL, NULL, NULL, NULL, 3940/* 80 */ NULL, NULL, NULL, NULL, 3941/* 84 */ NULL, NULL, NULL, NULL, 3942/* 88 */ NULL, NULL, "pfnacc", NULL, 3943/* 8C */ NULL, NULL, "pfpnacc", NULL, 3944/* 90 */ "pfcmpge", NULL, NULL, NULL, 3945/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt", 3946/* 98 */ NULL, NULL, "pfsub", NULL, 3947/* 9C */ NULL, NULL, "pfadd", NULL, 3948/* A0 */ "pfcmpgt", NULL, NULL, NULL, 3949/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1", 3950/* A8 */ NULL, NULL, "pfsubr", NULL, 3951/* AC */ NULL, NULL, "pfacc", NULL, 3952/* B0 */ "pfcmpeq", NULL, NULL, NULL, 3953/* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw", 3954/* B8 */ NULL, NULL, NULL, "pswapd", 3955/* BC */ NULL, NULL, NULL, "pavgusb", 3956/* C0 */ NULL, NULL, NULL, NULL, 3957/* C4 */ NULL, NULL, NULL, NULL, 3958/* C8 */ NULL, NULL, NULL, NULL, 3959/* CC */ NULL, NULL, NULL, NULL, 3960/* D0 */ NULL, NULL, NULL, NULL, 3961/* D4 */ NULL, NULL, NULL, NULL, 3962/* D8 */ NULL, NULL, NULL, NULL, 3963/* DC */ NULL, NULL, NULL, NULL, 3964/* E0 */ NULL, NULL, NULL, NULL, 3965/* E4 */ NULL, NULL, NULL, NULL, 3966/* E8 */ NULL, NULL, NULL, NULL, 3967/* EC */ NULL, NULL, NULL, NULL, 3968/* F0 */ NULL, NULL, NULL, NULL, 3969/* F4 */ NULL, NULL, NULL, NULL, 3970/* F8 */ NULL, NULL, NULL, NULL, 3971/* FC */ NULL, NULL, NULL, NULL, 3972}; 3973 3974static void 3975OP_3DNowSuffix (bytemode, sizeflag) 3976 int bytemode ATTRIBUTE_UNUSED; 3977 int sizeflag ATTRIBUTE_UNUSED; 3978{ 3979 const char *mnemonic; 3980 3981 FETCH_DATA (the_info, codep + 1); 3982 /* AMD 3DNow! instructions are specified by an opcode suffix in the 3983 place where an 8-bit immediate would normally go. ie. the last 3984 byte of the instruction. */ 3985 obufp = obuf + strlen (obuf); 3986 mnemonic = Suffix3DNow[*codep++ & 0xff]; 3987 if (mnemonic) 3988 oappend (mnemonic); 3989 else 3990 { 3991 /* Since a variable sized modrm/sib chunk is between the start 3992 of the opcode (0x0f0f) and the opcode suffix, we need to do 3993 all the modrm processing first, and don't know until now that 3994 we have a bad opcode. This necessitates some cleaning up. */ 3995 op1out[0] = '\0'; 3996 op2out[0] = '\0'; 3997 BadOp (); 3998 } 3999} 4000 4001static const char *simd_cmp_op[] = { 4002 "eq", 4003 "lt", 4004 "le", 4005 "unord", 4006 "neq", 4007 "nlt", 4008 "nle", 4009 "ord" 4010}; 4011 4012static void 4013OP_SIMD_Suffix (bytemode, sizeflag) 4014 int bytemode ATTRIBUTE_UNUSED; 4015 int sizeflag ATTRIBUTE_UNUSED; 4016{ 4017 unsigned int cmp_type; 4018 4019 FETCH_DATA (the_info, codep + 1); 4020 obufp = obuf + strlen (obuf); 4021 cmp_type = *codep++ & 0xff; 4022 if (cmp_type < 8) 4023 { 4024 char suffix1 = 'p', suffix2 = 's'; 4025 used_prefixes |= (prefixes & PREFIX_REPZ); 4026 if (prefixes & PREFIX_REPZ) 4027 suffix1 = 's'; 4028 else 4029 { 4030 used_prefixes |= (prefixes & PREFIX_DATA); 4031 if (prefixes & PREFIX_DATA) 4032 suffix2 = 'd'; 4033 else 4034 { 4035 used_prefixes |= (prefixes & PREFIX_REPNZ); 4036 if (prefixes & PREFIX_REPNZ) 4037 suffix1 = 's', suffix2 = 'd'; 4038 } 4039 } 4040 sprintf (scratchbuf, "cmp%s%c%c", 4041 simd_cmp_op[cmp_type], suffix1, suffix2); 4042 used_prefixes |= (prefixes & PREFIX_REPZ); 4043 oappend (scratchbuf); 4044 } 4045 else 4046 { 4047 /* We have a bad extension byte. Clean up. */ 4048 op1out[0] = '\0'; 4049 op2out[0] = '\0'; 4050 BadOp (); 4051 } 4052} 4053 4054static void 4055SIMD_Fixup (extrachar, sizeflag) 4056 int extrachar; 4057 int sizeflag ATTRIBUTE_UNUSED; 4058{ 4059 /* Change movlps/movhps to movhlps/movlhps for 2 register operand 4060 forms of these instructions. */ 4061 if (mod == 3) 4062 { 4063 char *p = obuf + strlen (obuf); 4064 *(p + 1) = '\0'; 4065 *p = *(p - 1); 4066 *(p - 1) = *(p - 2); 4067 *(p - 2) = *(p - 3); 4068 *(p - 3) = extrachar; 4069 } 4070} 4071 4072static void 4073BadOp (void) 4074{ 4075 /* Throw away prefixes and 1st. opcode byte. */ 4076 codep = insn_codep + 1; 4077 oappend ("(bad)"); 4078} 4079