1214571Sdim/* score-datadep.h -- Score Instructions data dependency table
2214571Sdim   Copyright 2006 Free Software Foundation, Inc.
3214571Sdim   Contributed by:
4214571Sdim   Mei Ligang (ligang@sunnorth.com.cn)
5214571Sdim   Pei-Lin Tsai (pltsai@sunplus.com)
6214571Sdim
7214571Sdim   This file is part of GAS, the GNU Assembler.
8214571Sdim
9214571Sdim   GAS is free software; you can redistribute it and/or modify
10214571Sdim   it under the terms of the GNU General Public License as published by
11214571Sdim   the Free Software Foundation; either version 2, or (at your option)
12214571Sdim   any later version.
13214571Sdim
14214571Sdim   GAS is distributed in the hope that it will be useful,
15214571Sdim   but WITHOUT ANY WARRANTY; without even the implied warranty of
16214571Sdim   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17214571Sdim   GNU General Public License for more details.
18214571Sdim
19214571Sdim   You should have received a copy of the GNU General Public License
20214571Sdim   along with GAS; see the file COPYING.  If not, write to the Free
21214571Sdim   Software Foundation, Inc., 51 Franklin Street - Fifth Floor,
22214571Sdim   Boston, MA 02110-1301, USA.  */
23214571Sdim
24214571Sdim#ifndef SCORE_DATA_DEPENDENCY_H
25214571Sdim#define SCORE_DATA_DEPENDENCY_H
26214571Sdim
27214571Sdim#define INSN_NAME_LEN 16
28214571Sdim
29214571Sdimenum insn_type_for_dependency
30214571Sdim{
31214571Sdim  D_pce,
32214571Sdim  D_cond_br,
33214571Sdim  D_cond_mv,
34214571Sdim  D_cached,
35214571Sdim  D_cachei,
36214571Sdim  D_ldst,
37214571Sdim  D_ldcombine,
38214571Sdim  D_mtcr,
39214571Sdim  D_mfcr,
40214571Sdim  D_mfsr,
41214571Sdim  D_mftlb,
42214571Sdim  D_mtptlb,
43214571Sdim  D_mtrtlb,
44214571Sdim  D_stlb,
45214571Sdim  D_all_insn
46214571Sdim};
47214571Sdim
48214571Sdimstruct insn_to_dependency
49214571Sdim{
50214571Sdim  char *insn_name;
51214571Sdim  enum insn_type_for_dependency type;
52214571Sdim};
53214571Sdim
54214571Sdimstruct data_dependency
55214571Sdim{
56214571Sdim  enum insn_type_for_dependency pre_insn_type;
57214571Sdim  char pre_reg[6];
58214571Sdim  enum insn_type_for_dependency cur_insn_type;
59214571Sdim  char cur_reg[6];
60214571Sdim  int bubblenum_7;
61214571Sdim  int bubblenum_5;
62214571Sdim  int warn_or_error;           /* warning - 0; error - 1  */
63214571Sdim};
64214571Sdim
65214571Sdimstatic const struct insn_to_dependency insn_to_dependency_table[] =
66214571Sdim{
67214571Sdim  /* pce instruction.  */
68214571Sdim  {"pce",       D_pce},
69214571Sdim  /* conditional branch instruction.  */
70214571Sdim  {"bcs",       D_cond_br},
71214571Sdim  {"bcc",       D_cond_br},
72214571Sdim  {"bgtu",      D_cond_br},
73214571Sdim  {"bleu",      D_cond_br},
74214571Sdim  {"beq",       D_cond_br},
75214571Sdim  {"bne",       D_cond_br},
76214571Sdim  {"bgt",       D_cond_br},
77214571Sdim  {"ble",       D_cond_br},
78214571Sdim  {"bge",       D_cond_br},
79214571Sdim  {"blt",       D_cond_br},
80214571Sdim  {"bmi",       D_cond_br},
81214571Sdim  {"bpl",       D_cond_br},
82214571Sdim  {"bvs",       D_cond_br},
83214571Sdim  {"bvc",       D_cond_br},
84214571Sdim  {"bcsl",      D_cond_br},
85214571Sdim  {"bccl",      D_cond_br},
86214571Sdim  {"bgtul",     D_cond_br},
87214571Sdim  {"bleul",     D_cond_br},
88214571Sdim  {"beql",      D_cond_br},
89214571Sdim  {"bnel",      D_cond_br},
90214571Sdim  {"bgtl",      D_cond_br},
91214571Sdim  {"blel",      D_cond_br},
92214571Sdim  {"bgel",      D_cond_br},
93214571Sdim  {"bltl",      D_cond_br},
94214571Sdim  {"bmil",      D_cond_br},
95214571Sdim  {"bpll",      D_cond_br},
96214571Sdim  {"bvsl",      D_cond_br},
97214571Sdim  {"bvcl",      D_cond_br},
98214571Sdim  {"bcs!",      D_cond_br},
99214571Sdim  {"bcc!",      D_cond_br},
100214571Sdim  {"bgtu!",     D_cond_br},
101214571Sdim  {"bleu!",     D_cond_br},
102214571Sdim  {"beq!",      D_cond_br},
103214571Sdim  {"bne!",      D_cond_br},
104214571Sdim  {"bgt!",      D_cond_br},
105214571Sdim  {"ble!",      D_cond_br},
106214571Sdim  {"bge!",      D_cond_br},
107214571Sdim  {"blt!",      D_cond_br},
108214571Sdim  {"bmi!",      D_cond_br},
109214571Sdim  {"bpl!",      D_cond_br},
110214571Sdim  {"bvs!",      D_cond_br},
111214571Sdim  {"bvc!",      D_cond_br},
112214571Sdim  {"brcs",      D_cond_br},
113214571Sdim  {"brcc",      D_cond_br},
114214571Sdim  {"brgtu",     D_cond_br},
115214571Sdim  {"brleu",     D_cond_br},
116214571Sdim  {"breq",      D_cond_br},
117214571Sdim  {"brne",      D_cond_br},
118214571Sdim  {"brgt",      D_cond_br},
119214571Sdim  {"brle",      D_cond_br},
120214571Sdim  {"brge",      D_cond_br},
121214571Sdim  {"brlt",      D_cond_br},
122214571Sdim  {"brmi",      D_cond_br},
123214571Sdim  {"brpl",      D_cond_br},
124214571Sdim  {"brvs",      D_cond_br},
125214571Sdim  {"brvc",      D_cond_br},
126214571Sdim  {"brcsl",     D_cond_br},
127214571Sdim  {"brccl",     D_cond_br},
128214571Sdim  {"brgtul",    D_cond_br},
129214571Sdim  {"brleul",    D_cond_br},
130214571Sdim  {"breql",     D_cond_br},
131214571Sdim  {"brnel",     D_cond_br},
132214571Sdim  {"brgtl",     D_cond_br},
133214571Sdim  {"brlel",     D_cond_br},
134214571Sdim  {"brgel",     D_cond_br},
135214571Sdim  {"brltl",     D_cond_br},
136214571Sdim  {"brmil",     D_cond_br},
137214571Sdim  {"brpll",     D_cond_br},
138214571Sdim  {"brvsl",     D_cond_br},
139214571Sdim  {"brvcl",     D_cond_br},
140214571Sdim  {"brcs!",     D_cond_br},
141214571Sdim  {"brcc!",     D_cond_br},
142214571Sdim  {"brgtu!",    D_cond_br},
143214571Sdim  {"brleu!",    D_cond_br},
144214571Sdim  {"breq!",     D_cond_br},
145214571Sdim  {"brne!",     D_cond_br},
146214571Sdim  {"brgt!",     D_cond_br},
147214571Sdim  {"brle!",     D_cond_br},
148214571Sdim  {"brge!",     D_cond_br},
149214571Sdim  {"brlt!",     D_cond_br},
150214571Sdim  {"brmi!",     D_cond_br},
151214571Sdim  {"brpl!",     D_cond_br},
152214571Sdim  {"brvs!",     D_cond_br},
153214571Sdim  {"brvc!",     D_cond_br},
154214571Sdim  {"brcsl!",    D_cond_br},
155214571Sdim  {"brccl!",    D_cond_br},
156214571Sdim  {"brgtul!",   D_cond_br},
157214571Sdim  {"brleul!",   D_cond_br},
158214571Sdim  {"breql!",    D_cond_br},
159214571Sdim  {"brnel!",    D_cond_br},
160214571Sdim  {"brgtl!",    D_cond_br},
161214571Sdim  {"brlel!",    D_cond_br},
162214571Sdim  {"brgel!",    D_cond_br},
163214571Sdim  {"brltl!",    D_cond_br},
164214571Sdim  {"brmil!",    D_cond_br},
165214571Sdim  {"brpll!",    D_cond_br},
166214571Sdim  {"brvsl!",    D_cond_br},
167214571Sdim  {"brvcl!",    D_cond_br},
168214571Sdim  /* conditional move instruction.  */
169214571Sdim  {"mvcs",      D_cond_mv},
170214571Sdim  {"mvcc",      D_cond_mv},
171214571Sdim  {"mvgtu",     D_cond_mv},
172214571Sdim  {"mvleu",     D_cond_mv},
173214571Sdim  {"mveq",      D_cond_mv},
174214571Sdim  {"mvne",      D_cond_mv},
175214571Sdim  {"mvgt",      D_cond_mv},
176214571Sdim  {"mvle",      D_cond_mv},
177214571Sdim  {"mvge",      D_cond_mv},
178214571Sdim  {"mvlt",      D_cond_mv},
179214571Sdim  {"mvmi",      D_cond_mv},
180214571Sdim  {"mvpl",      D_cond_mv},
181214571Sdim  {"mvvs",      D_cond_mv},
182214571Sdim  {"mvvc",      D_cond_mv},
183214571Sdim  /* move spectial instruction.  */
184214571Sdim  {"mtcr",      D_mtcr},
185214571Sdim  {"mftlb",     D_mftlb},
186214571Sdim  {"mtptlb",    D_mtptlb},
187214571Sdim  {"mtrtlb",    D_mtrtlb},
188214571Sdim  {"stlb",      D_stlb},
189214571Sdim  {"mfcr",      D_mfcr},
190214571Sdim  {"mfsr",      D_mfsr},
191214571Sdim  /* cache instruction.  */
192214571Sdim  {"cache 8",   D_cached},
193214571Sdim  {"cache 9",   D_cached},
194214571Sdim  {"cache 10",  D_cached},
195214571Sdim  {"cache 11",  D_cached},
196214571Sdim  {"cache 12",  D_cached},
197214571Sdim  {"cache 13",  D_cached},
198214571Sdim  {"cache 14",  D_cached},
199214571Sdim  {"cache 24",  D_cached},
200214571Sdim  {"cache 26",  D_cached},
201214571Sdim  {"cache 27",  D_cached},
202214571Sdim  {"cache 29",  D_cached},
203214571Sdim  {"cache 30",  D_cached},
204214571Sdim  {"cache 31",  D_cached},
205214571Sdim  {"cache 0",   D_cachei},
206214571Sdim  {"cache 1",   D_cachei},
207214571Sdim  {"cache 2",   D_cachei},
208214571Sdim  {"cache 3",   D_cachei},
209214571Sdim  {"cache 4",   D_cachei},
210214571Sdim  {"cache 16",  D_cachei},
211214571Sdim  {"cache 17",  D_cachei},
212214571Sdim  /* load/store instruction.  */
213214571Sdim  {"lb",        D_ldst},
214214571Sdim  {"lbu",       D_ldst},
215214571Sdim  {"lbu!",      D_ldst},
216214571Sdim  {"lbup!",     D_ldst},
217214571Sdim  {"lh",        D_ldst},
218214571Sdim  {"lhu",       D_ldst},
219214571Sdim  {"lh!",       D_ldst},
220214571Sdim  {"lhp!",      D_ldst},
221214571Sdim  {"lw",        D_ldst},
222214571Sdim  {"lw!",       D_ldst},
223214571Sdim  {"lwp!",      D_ldst},
224214571Sdim  {"sb",        D_ldst},
225214571Sdim  {"sb!",       D_ldst},
226214571Sdim  {"sbp!",      D_ldst},
227214571Sdim  {"sh",        D_ldst},
228214571Sdim  {"sh!",       D_ldst},
229214571Sdim  {"shp!",      D_ldst},
230214571Sdim  {"sw",        D_ldst},
231214571Sdim  {"sw!",       D_ldst},
232214571Sdim  {"swp!",      D_ldst},
233214571Sdim  {"alw",       D_ldst},
234214571Sdim  {"asw",       D_ldst},
235214571Sdim  {"push!",     D_ldst},
236214571Sdim  {"pushhi!",   D_ldst},
237214571Sdim  {"pop!",      D_ldst},
238214571Sdim  {"pophi!",    D_ldst},
239214571Sdim  {"ldc1",      D_ldst},
240214571Sdim  {"ldc2",      D_ldst},
241214571Sdim  {"ldc3",      D_ldst},
242214571Sdim  {"stc1",      D_ldst},
243214571Sdim  {"stc2",      D_ldst},
244214571Sdim  {"stc3",      D_ldst},
245214571Sdim  {"scb",       D_ldst},
246214571Sdim  {"scw",       D_ldst},
247214571Sdim  {"sce",       D_ldst},
248214571Sdim  /* load combine instruction.  */
249214571Sdim  {"lcb",       D_ldcombine},
250214571Sdim  {"lcw",       D_ldcombine},
251214571Sdim  {"lce",       D_ldcombine},
252214571Sdim};
253214571Sdim
254214571Sdimstatic const struct data_dependency data_dependency_table[] =
255214571Sdim{
256214571Sdim  /* Condition register.  */
257214571Sdim  {D_mtcr, "cr1", D_pce, "", 2, 1, 1},
258214571Sdim  {D_mtcr, "cr1", D_cond_br, "", 1, 0, 1},
259214571Sdim  {D_mtcr, "cr1", D_cond_mv, "", 1, 0, 1},
260214571Sdim  /* Status regiser.  */
261214571Sdim  {D_mtcr, "cr0", D_all_insn, "", 5, 4, 0},
262214571Sdim  /* CCR regiser.  */
263214571Sdim  {D_mtcr, "cr4", D_all_insn, "", 6, 5, 0},
264214571Sdim  /* EntryHi/EntryLo register.  */
265214571Sdim  {D_mftlb, "", D_mtptlb, "", 1, 1, 1},
266214571Sdim  {D_mftlb, "", D_mtrtlb, "", 1, 1, 1},
267214571Sdim  {D_mftlb, "", D_stlb, "", 1, 1,1},
268214571Sdim  {D_mftlb, "", D_mfcr, "cr11", 1, 1, 1},
269214571Sdim  {D_mftlb, "", D_mfcr, "cr12", 1, 1, 1},
270214571Sdim  /* Index register.  */
271214571Sdim  {D_stlb, "", D_mtptlb, "", 1, 1, 1},
272214571Sdim  {D_stlb, "", D_mftlb, "", 1, 1, 1},
273214571Sdim  {D_stlb, "", D_mfcr, "cr8", 2, 2, 1},
274214571Sdim  /* Cache.  */
275214571Sdim  {D_cached, "", D_ldst, "", 1, 1, 0},
276214571Sdim  {D_cached, "", D_ldcombine, "", 1, 1, 0},
277214571Sdim  {D_cachei, "", D_all_insn, "", 5, 4, 0},
278214571Sdim  /* Load combine.  */
279214571Sdim  {D_ldcombine, "", D_mfsr, "sr1", 3, 3, 1},
280214571Sdim};
281214571Sdim
282214571Sdim#endif
283