1218822Sdim@c Copyright 1991, 1992, 1993, 1994, 1995, 1997, 1999, 2002 278828Sobrien@c Free Software Foundation, Inc. 360484Sobrien@c This is part of the GAS manual. 460484Sobrien@c For copying conditions, see the file as.texinfo. 560484Sobrien@ifset GENERIC 660484Sobrien@page 760484Sobrien@node Sparc-Dependent 860484Sobrien@chapter SPARC Dependent Features 960484Sobrien@end ifset 1060484Sobrien@ifclear GENERIC 1160484Sobrien@node Machine Dependencies 1260484Sobrien@chapter SPARC Dependent Features 1360484Sobrien@end ifclear 1460484Sobrien 1560484Sobrien@cindex SPARC support 1660484Sobrien@menu 1760484Sobrien* Sparc-Opts:: Options 1860484Sobrien* Sparc-Aligned-Data:: Option to enforce aligned data 1960484Sobrien* Sparc-Float:: Floating Point 2060484Sobrien* Sparc-Directives:: Sparc Machine Directives 2160484Sobrien@end menu 2260484Sobrien 2360484Sobrien@node Sparc-Opts 2460484Sobrien@section Options 2560484Sobrien 2660484Sobrien@cindex options for SPARC 2760484Sobrien@cindex SPARC options 2860484Sobrien@cindex architectures, SPARC 2960484Sobrien@cindex SPARC architectures 3060484SobrienThe SPARC chip family includes several successive levels, using the same 3160484Sobriencore instruction set, but including a few additional instructions at 3260484Sobrieneach level. There are exceptions to this however. For details on what 3360484Sobrieninstructions each variant supports, please see the chip's architecture 3460484Sobrienreference manual. 3560484Sobrien 3660484SobrienBy default, @code{@value{AS}} assumes the core instruction set (SPARC 3760484Sobrienv6), but ``bumps'' the architecture level as needed: it switches to 3860484Sobriensuccessively higher architectures as it encounters instructions that 3960484Sobrienonly exist in the higher levels. 4060484Sobrien 4160484SobrienIf not configured for SPARC v9 (@code{sparc64-*-*}) GAS will not bump 4260484Sobrienpassed sparclite by default, an option must be passed to enable the 4360484Sobrienv9 instructions. 4460484Sobrien 4560484SobrienGAS treats sparclite as being compatible with v8, unless an architecture 4660484Sobrienis explicitly requested. SPARC v9 is always incompatible with sparclite. 4760484Sobrien 4860484Sobrien@c The order here is the same as the order of enum sparc_opcode_arch_val 4960484Sobrien@c to give the user a sense of the order of the "bumping". 5060484Sobrien 5160484Sobrien@table @code 5260484Sobrien@kindex -Av6 5360484Sobrien@kindex Av7 5460484Sobrien@kindex -Av8 5560484Sobrien@kindex -Asparclet 5660484Sobrien@kindex -Asparclite 5760484Sobrien@kindex -Av9 5860484Sobrien@kindex -Av9a 5960484Sobrien@item -Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite 6060484Sobrien@itemx -Av8plus | -Av8plusa | -Av9 | -Av9a 6160484SobrienUse one of the @samp{-A} options to select one of the SPARC 6260484Sobrienarchitectures explicitly. If you select an architecture explicitly, 6360484Sobrien@code{@value{AS}} reports a fatal error if it encounters an instruction 6460484Sobrienor feature requiring an incompatible or higher level. 6560484Sobrien 6660484Sobrien@samp{-Av8plus} and @samp{-Av8plusa} select a 32 bit environment. 6760484Sobrien 6860484Sobrien@samp{-Av9} and @samp{-Av9a} select a 64 bit environment and are not 6960484Sobrienavailable unless GAS is explicitly configured with 64 bit environment 7060484Sobriensupport. 7160484Sobrien 7260484Sobrien@samp{-Av8plusa} and @samp{-Av9a} enable the SPARC V9 instruction set with 7360484SobrienUltraSPARC extensions. 7460484Sobrien 7560484Sobrien@item -xarch=v8plus | -xarch=v8plusa 7660484SobrienFor compatibility with the Solaris v9 assembler. These options are 7760484Sobrienequivalent to -Av8plus and -Av8plusa, respectively. 7860484Sobrien 7960484Sobrien@item -bump 8060484SobrienWarn whenever it is necessary to switch to another level. 8160484SobrienIf an architecture level is explicitly requested, GAS will not issue 8260484Sobrienwarnings until that level is reached, and will then bump the level 8360484Sobrienas required (except between incompatible levels). 8460484Sobrien 8560484Sobrien@item -32 | -64 8660484SobrienSelect the word size, either 32 bits or 64 bits. 8760484SobrienThese options are only available with the ELF object file format, 8860484Sobrienand require that the necessary BFD support has been included. 8960484Sobrien@end table 9060484Sobrien 9160484Sobrien@node Sparc-Aligned-Data 9260484Sobrien@section Enforcing aligned data 9360484Sobrien 9460484Sobrien@cindex data alignment on SPARC 9560484Sobrien@cindex SPARC data alignment 9660484SobrienSPARC GAS normally permits data to be misaligned. For example, it 9760484Sobrienpermits the @code{.long} pseudo-op to be used on a byte boundary. 9860484SobrienHowever, the native SunOS and Solaris assemblers issue an error when 9960484Sobrienthey see misaligned data. 10060484Sobrien 10160484Sobrien@kindex --enforce-aligned-data 10260484SobrienYou can use the @code{--enforce-aligned-data} option to make SPARC GAS 10360484Sobrienalso issue an error about misaligned data, just as the SunOS and Solaris 10460484Sobrienassemblers do. 10560484Sobrien 10660484SobrienThe @code{--enforce-aligned-data} option is not the default because gcc 10760484Sobrienissues misaligned data pseudo-ops when it initializes certain packed 10860484Sobriendata structures (structures defined using the @code{packed} attribute). 10960484SobrienYou may have to assemble with GAS in order to initialize packed data 11060484Sobrienstructures in your own code. 11160484Sobrien 11260484Sobrien@ignore 11360484Sobrien@c FIXME: (sparc) Fill in "syntax" section! 11460484Sobrien@c subsection syntax 11560484SobrienI don't know anything about Sparc syntax. Someone who does 11660484Sobrienwill have to write this section. 11760484Sobrien@end ignore 11860484Sobrien 11960484Sobrien@node Sparc-Float 12060484Sobrien@section Floating Point 12160484Sobrien 12260484Sobrien@cindex floating point, SPARC (@sc{ieee}) 12360484Sobrien@cindex SPARC floating point (@sc{ieee}) 12460484SobrienThe Sparc uses @sc{ieee} floating-point numbers. 12560484Sobrien 12660484Sobrien@node Sparc-Directives 12760484Sobrien@section Sparc Machine Directives 12860484Sobrien 12960484Sobrien@cindex SPARC machine directives 13060484Sobrien@cindex machine directives, SPARC 13160484SobrienThe Sparc version of @code{@value{AS}} supports the following additional 13260484Sobrienmachine directives: 13360484Sobrien 13460484Sobrien@table @code 13560484Sobrien@cindex @code{align} directive, SPARC 13660484Sobrien@item .align 13760484SobrienThis must be followed by the desired alignment in bytes. 13860484Sobrien 13960484Sobrien@cindex @code{common} directive, SPARC 14060484Sobrien@item .common 14160484SobrienThis must be followed by a symbol name, a positive number, and 14260484Sobrien@code{"bss"}. This behaves somewhat like @code{.comm}, but the 14360484Sobriensyntax is different. 14460484Sobrien 14560484Sobrien@cindex @code{half} directive, SPARC 14660484Sobrien@item .half 14760484SobrienThis is functionally identical to @code{.short}. 14860484Sobrien 14960484Sobrien@cindex @code{nword} directive, SPARC 15060484Sobrien@item .nword 15160484SobrienOn the Sparc, the @code{.nword} directive produces native word sized value, 15260484Sobrienie. if assembling with -32 it is equivalent to @code{.word}, if assembling 15360484Sobrienwith -64 it is equivalent to @code{.xword}. 15460484Sobrien 15560484Sobrien@cindex @code{proc} directive, SPARC 15660484Sobrien@item .proc 15760484SobrienThis directive is ignored. Any text following it on the same 15860484Sobrienline is also ignored. 15960484Sobrien 16060484Sobrien@cindex @code{register} directive, SPARC 16160484Sobrien@item .register 16260484SobrienThis directive declares use of a global application or system register. 16360484SobrienIt must be followed by a register name %g2, %g3, %g6 or %g7, comma and 16460484Sobrienthe symbol name for that register. If symbol name is @code{#scratch}, 165130561Sobrienit is a scratch register, if it is @code{#ignore}, it just suppresses any 16660484Sobrienerrors about using undeclared global register, but does not emit any 16760484Sobrieninformation about it into the object file. This can be useful e.g. if you 16860484Sobriensave the register before use and restore it after. 16960484Sobrien 17060484Sobrien@cindex @code{reserve} directive, SPARC 17160484Sobrien@item .reserve 17260484SobrienThis must be followed by a symbol name, a positive number, and 17360484Sobrien@code{"bss"}. This behaves somewhat like @code{.lcomm}, but the 17460484Sobriensyntax is different. 17560484Sobrien 17660484Sobrien@cindex @code{seg} directive, SPARC 17760484Sobrien@item .seg 17860484SobrienThis must be followed by @code{"text"}, @code{"data"}, or 17960484Sobrien@code{"data1"}. It behaves like @code{.text}, @code{.data}, or 18060484Sobrien@code{.data 1}. 18160484Sobrien 18260484Sobrien@cindex @code{skip} directive, SPARC 18360484Sobrien@item .skip 18460484SobrienThis is functionally identical to the @code{.space} directive. 18560484Sobrien 18660484Sobrien@cindex @code{word} directive, SPARC 18760484Sobrien@item .word 18860484SobrienOn the Sparc, the @code{.word} directive produces 32 bit values, 18960484Sobrieninstead of the 16 bit values it produces on many other machines. 19060484Sobrien 19160484Sobrien@cindex @code{xword} directive, SPARC 19260484Sobrien@item .xword 19360484SobrienOn the Sparc V9 processor, the @code{.xword} directive produces 19460484Sobrien64 bit values. 19560484Sobrien@end table 196