cgen.c revision 33965
1/* GAS interface for targets using CGEN: Cpu tools GENerator.
2   Copyright (C) 1996, 1997 Free Software Foundation, Inc.
3
4This file is part of GAS, the GNU Assembler.
5
6GAS is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GAS is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GAS; see the file COPYING.  If not, write to the Free Software
18Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20#include "ansidecl.h"
21#include "bfd.h"
22#include "cgen-opc.h"
23#include "as.h"
24#include "subsegs.h"
25
26/* Callback to insert a register into the symbol table.
27   A target may choose to let GAS parse the registers.
28   ??? Not currently used.  */
29
30void
31cgen_asm_record_register (name, number)
32     char *name;
33     int number;
34{
35  /* Use symbol_create here instead of symbol_new so we don't try to
36     output registers into the object file's symbol table.  */
37  symbol_table_insert (symbol_create (name, reg_section,
38				      number, &zero_address_frag));
39}
40
41/* We need to keep a list of fixups.  We can't simply generate them as
42   we go, because that would require us to first create the frag, and
43   that would screw up references to ``.''.
44
45   This is used by cpu's with simple operands.  It keeps knowledge of what
46   an `expressionS' is and what a `fixup' is out of CGEN which for the time
47   being is preferable.
48
49   OPINDEX is the index in the operand table.
50   OPINFO is something the caller chooses to help in reloc determination.  */
51
52struct fixup
53{
54  int opindex;
55  int opinfo;
56  expressionS exp;
57};
58
59#define MAX_FIXUPS 5
60
61static struct fixup fixups[MAX_FIXUPS];
62static int num_fixups;
63
64/* Prepare to parse an instruction.
65   ??? May wish to make this static and delete calls in md_assemble.  */
66
67void
68cgen_asm_init_parse ()
69{
70  num_fixups = 0;
71}
72
73/* Queue a fixup.  */
74
75void
76cgen_queue_fixup (opindex, opinfo, expP)
77     int opindex;
78     expressionS *expP;
79{
80  /* We need to generate a fixup for this expression.  */
81  if (num_fixups >= MAX_FIXUPS)
82    as_fatal ("too many fixups");
83  fixups[num_fixups].exp = *expP;
84  fixups[num_fixups].opindex = opindex;
85  fixups[num_fixups].opinfo = opinfo;
86  ++num_fixups;
87}
88
89/* Default routine to record a fixup.
90   This is a cover function to fix_new.
91   It exists because we record INSN with the fixup.
92
93   FRAG and WHERE are their respective arguments to fix_new_exp.
94   LENGTH is in bits.
95   OPINFO is something the caller chooses to help in reloc determination.
96
97   At this point we do not use a bfd_reloc_code_real_type for
98   operands residing in the insn, but instead just use the
99   operand index.  This lets us easily handle fixups for any
100   operand type.  We pick a BFD reloc type in md_apply_fix.  */
101
102fixS *
103cgen_record_fixup (frag, where, insn, length, operand, opinfo, symbol, offset)
104     fragS *frag;
105     int where;
106     const struct cgen_insn *insn;
107     int length;
108     const struct cgen_operand *operand;
109     int opinfo;
110     symbolS *symbol;
111     offsetT offset;
112{
113  fixS *fixP;
114
115  /* It may seem strange to use operand->attrs and not insn->attrs here,
116     but it is the operand that has a pc relative relocation.  */
117
118  fixP = fix_new (frag, where, length / 8, symbol, offset,
119		  CGEN_OPERAND_ATTR (operand, CGEN_OPERAND_PCREL_ADDR) != 0,
120		  (bfd_reloc_code_real_type) ((int) BFD_RELOC_UNUSED + CGEN_OPERAND_INDEX (operand)));
121  fixP->tc_fix_data.insn = (PTR) insn;
122  fixP->tc_fix_data.opinfo = opinfo;
123
124  return fixP;
125}
126
127/* Default routine to record a fixup given an expression.
128   This is a cover function to fix_new_exp.
129   It exists because we record INSN with the fixup.
130
131   FRAG and WHERE are their respective arguments to fix_new_exp.
132   LENGTH is in bits.
133   OPINFO is something the caller chooses to help in reloc determination.
134
135   At this point we do not use a bfd_reloc_code_real_type for
136   operands residing in the insn, but instead just use the
137   operand index.  This lets us easily handle fixups for any
138   operand type.  We pick a BFD reloc type in md_apply_fix.  */
139
140fixS *
141cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp)
142     fragS *frag;
143     int where;
144     const struct cgen_insn *insn;
145     int length;
146     const struct cgen_operand *operand;
147     int opinfo;
148     expressionS *exp;
149{
150  fixS *fixP;
151
152  /* It may seem strange to use operand->attrs and not insn->attrs here,
153     but it is the operand that has a pc relative relocation.  */
154
155  fixP = fix_new_exp (frag, where, length / 8, exp,
156		      CGEN_OPERAND_ATTR (operand, CGEN_OPERAND_PCREL_ADDR) != 0,
157		      (bfd_reloc_code_real_type) ((int) BFD_RELOC_UNUSED + CGEN_OPERAND_INDEX (operand)));
158  fixP->tc_fix_data.insn = (PTR) insn;
159  fixP->tc_fix_data.opinfo = opinfo;
160
161  return fixP;
162}
163
164/* Callback for cgen interface.  Parse the expression at *STRP.
165   The result is an error message or NULL for success (in which case
166   *STRP is advanced past the parsed text).
167   WANT is an indication of what the caller is looking for.
168   If WANT == CGEN_ASM_PARSE_INIT the caller is beginning to try to match
169   a table entry with the insn, reset the queued fixups counter.
170   An enum cgen_parse_operand_result is stored in RESULTP.
171   OPINDEX is the operand's table entry index.
172   OPINFO is something the caller chooses to help in reloc determination.
173   The resulting value is stored in VALUEP.  */
174
175const char *
176cgen_parse_operand (want, strP, opindex, opinfo, resultP, valueP)
177     enum cgen_parse_operand_type want;
178     const char **strP;
179     int opindex;
180     int opinfo;
181     enum cgen_parse_operand_result *resultP;
182     bfd_vma *valueP;
183{
184  char *hold;
185  const char *errmsg = NULL;
186  expressionS exp;
187
188  if (want == CGEN_PARSE_OPERAND_INIT)
189    {
190      cgen_asm_init_parse ();
191      return NULL;
192    }
193
194  hold = input_line_pointer;
195  input_line_pointer = (char *) *strP;
196  expression (&exp);
197  *strP = input_line_pointer;
198  input_line_pointer = hold;
199
200  /* FIXME: Need to check `want'.  */
201
202  switch (exp.X_op)
203    {
204    case O_illegal :
205      errmsg = "illegal operand";
206      *resultP = CGEN_PARSE_OPERAND_RESULT_ERROR;
207      break;
208    case O_absent :
209      errmsg = "missing operand";
210      *resultP = CGEN_PARSE_OPERAND_RESULT_ERROR;
211      break;
212    case O_constant :
213      *valueP = exp.X_add_number;
214      *resultP = CGEN_PARSE_OPERAND_RESULT_NUMBER;
215      break;
216    case O_register :
217      *valueP = exp.X_add_number;
218      *resultP = CGEN_PARSE_OPERAND_RESULT_REGISTER;
219      break;
220    default :
221      cgen_queue_fixup (opindex, opinfo, &exp);
222      *valueP = 0;
223      *resultP = CGEN_PARSE_OPERAND_RESULT_QUEUED;
224      break;
225    }
226
227  return errmsg;
228}
229
230/* Finish assembling instruction INSN.
231   BUF contains what we've built up so far.
232   LENGTH is the size of the insn in bits.  */
233
234void
235cgen_asm_finish_insn (insn, buf, length)
236     const struct cgen_insn *insn;
237     cgen_insn_t *buf;
238     unsigned int length;
239{
240  int i, relax_operand;
241  char *f;
242  unsigned int byte_len = length / 8;
243
244  /* ??? Target foo issues various warnings here, so one might want to provide
245     a hook here.  However, our caller is defined in tc-foo.c so there
246     shouldn't be a need for a hook.  */
247
248  /* Write out the instruction.
249     It is important to fetch enough space in one call to `frag_more'.
250     We use (f - frag_now->fr_literal) to compute where we are and we
251     don't want frag_now to change between calls.
252
253     Relaxable instructions: We need to ensure we allocate enough
254     space for the largest insn.  */
255
256  if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAX) != 0)
257    abort (); /* These currently shouldn't get here.  */
258
259  /* Is there a relaxable insn with the relaxable operand needing a fixup?  */
260
261  relax_operand = -1;
262  if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAXABLE) != 0)
263    {
264      /* Scan the fixups for the operand affected by relaxing
265	 (i.e. the branch address).  */
266
267      for (i = 0; i < num_fixups; ++i)
268	{
269	  if (CGEN_OPERAND_ATTR (& CGEN_SYM (operand_table) [fixups[i].opindex],
270				 CGEN_OPERAND_RELAX) != 0)
271	    {
272	      relax_operand = i;
273	      break;
274	    }
275	}
276    }
277
278  if (relax_operand != -1)
279    {
280      int max_len;
281      fragS *old_frag;
282
283#ifdef TC_CGEN_MAX_RELAX
284      max_len = TC_CGEN_MAX_RELAX (insn, byte_len);
285#else
286      max_len = CGEN_MAX_INSN_SIZE;
287#endif
288      /* Ensure variable part and fixed part are in same fragment.  */
289      /* FIXME: Having to do this seems like a hack.  */
290      frag_grow (max_len);
291      /* Allocate space for the fixed part.  */
292      f = frag_more (byte_len);
293      /* Create a relaxable fragment for this instruction.  */
294      old_frag = frag_now;
295      frag_var (rs_machine_dependent,
296		max_len - byte_len /* max chars */,
297		0 /* variable part already allocated */,
298		/* FIXME: When we machine generate the relax table,
299		   machine generate a macro to compute subtype.  */
300		1 /* subtype */,
301		fixups[relax_operand].exp.X_add_symbol,
302		fixups[relax_operand].exp.X_add_number,
303		f);
304      /* Record the operand number with the fragment so md_convert_frag
305	 can use cgen_md_record_fixup to record the appropriate reloc.  */
306      /* FIXME: fr_targ.cgen is used pending deciding whether to
307	 allow a target to add members to fragS.  For more info
308	 see the comment above fr_targ in as.h.  */
309      old_frag->fr_targ.cgen.insn = insn;
310      old_frag->fr_targ.cgen.opindex = fixups[relax_operand].opindex;
311      old_frag->fr_targ.cgen.opinfo = fixups[relax_operand].opinfo;
312    }
313  else
314    f = frag_more (byte_len);
315
316  /* If we're recording insns as numbers (rather than a string of bytes),
317     target byte order handling is deferred until now.  */
318#if 0 /*def CGEN_INT_INSN*/
319  switch (length)
320    {
321    case 16:
322      if (cgen_big_endian_p)
323	bfd_putb16 ((bfd_vma) *buf, f);
324      else
325	bfd_putl16 ((bfd_vma) *buf, f);
326      break;
327    case 32:
328      if (cgen_big_endian_p)
329	bfd_putb32 ((bfd_vma) *buf, f);
330      else
331	bfd_putl32 ((bfd_vma) *buf, f);
332      break;
333    default:
334      abort ();
335    }
336#else
337  memcpy (f, buf, byte_len);
338#endif
339
340  /* Create any fixups.  */
341  for (i = 0; i < num_fixups; ++i)
342    {
343      /* Don't create fixups for these.  That's done during relaxation.
344	 We don't need to test for CGEN_INSN_RELAX as they can't get here
345	 (see above).  */
346      if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAXABLE) != 0
347	  && CGEN_OPERAND_ATTR (& CGEN_SYM (operand_table) [fixups[i].opindex],
348				CGEN_OPERAND_RELAX) != 0)
349	continue;
350
351#ifndef md_cgen_record_fixup_exp
352#define md_cgen_record_fixup_exp cgen_record_fixup_exp
353#endif
354
355      md_cgen_record_fixup_exp (frag_now, f - frag_now->fr_literal,
356				insn, length,
357				& CGEN_SYM (operand_table) [fixups[i].opindex],
358				fixups[i].opinfo,
359				&fixups[i].exp);
360    }
361}
362
363/* Apply a fixup to the object code.  This is called for all the
364   fixups we generated by the call to fix_new_exp, above.  In the call
365   above we used a reloc code which was the largest legal reloc code
366   plus the operand index.  Here we undo that to recover the operand
367   index.  At this point all symbol values should be fully resolved,
368   and we attempt to completely resolve the reloc.  If we can not do
369   that, we determine the correct reloc code and put it back in the fixup.  */
370
371/* FIXME: This function handles some of the fixups and bfd_install_relocation
372   handles the rest.  bfd_install_relocation (or some other bfd function)
373   should handle them all.  */
374
375int
376cgen_md_apply_fix3 (fixP, valueP, seg)
377     fixS *fixP;
378     valueT *valueP;
379     segT seg;
380{
381  char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
382  valueT value;
383
384  /* FIXME FIXME FIXME: The value we are passed in *valuep includes
385     the symbol values.  Since we are using BFD_ASSEMBLER, if we are
386     doing this relocation the code in write.c is going to call
387     bfd_install_relocation, which is also going to use the symbol
388     value.  That means that if the reloc is fully resolved we want to
389     use *valuep since bfd_install_relocation is not being used.
390     However, if the reloc is not fully resolved we do not want to use
391     *valuep, and must use fx_offset instead.  However, if the reloc
392     is PC relative, we do want to use *valuep since it includes the
393     result of md_pcrel_from.  This is confusing.  */
394
395  if (fixP->fx_addsy == (symbolS *) NULL)
396    {
397      value = *valueP;
398      fixP->fx_done = 1;
399    }
400  else if (fixP->fx_pcrel)
401    value = *valueP;
402  else
403    {
404      value = fixP->fx_offset;
405      if (fixP->fx_subsy != (symbolS *) NULL)
406	{
407	  if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
408	    value -= S_GET_VALUE (fixP->fx_subsy);
409	  else
410	    {
411	      /* We don't actually support subtracting a symbol.  */
412 	      as_bad_where (fixP->fx_file, fixP->fx_line,
413			    "expression too complex");
414	    }
415	}
416    }
417
418  if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
419    {
420      int opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
421      const struct cgen_operand *operand = & CGEN_SYM (operand_table) [opindex];
422      const char *errmsg;
423      bfd_reloc_code_real_type reloc_type;
424      struct cgen_fields fields;
425      const struct cgen_insn *insn = (struct cgen_insn *) fixP->tc_fix_data.insn;
426
427      /* If the reloc has been fully resolved finish the operand here.  */
428      /* FIXME: This duplicates the capabilities of code in BFD.  */
429      if (fixP->fx_done
430	  /* FIXME: If partial_inplace isn't set bfd_install_relocation won't
431	     finish the job.  Testing for pcrel is a temporary hack.  */
432	  || fixP->fx_pcrel)
433	{
434	  /* This may seem like overkill, and using bfd_install_relocation or
435	     some such may be preferable, but this is simple.  */
436	  CGEN_FIELDS_BITSIZE (&fields) = CGEN_INSN_BITSIZE (insn);
437	  CGEN_SYM (set_operand) (opindex, &value, &fields);
438	  errmsg = CGEN_SYM (validate_operand) (opindex, &fields);
439	  if (errmsg)
440	    as_warn_where (fixP->fx_file, fixP->fx_line, "%s\n", errmsg);
441	  CGEN_SYM (insert_operand) (opindex, &fields, where);
442	}
443
444      if (fixP->fx_done)
445	return 1;
446
447      /* The operand isn't fully resolved.  Determine a BFD reloc value
448	 based on the operand information and leave it to
449	 bfd_install_relocation.  Note that this doesn't work when
450	 partial_inplace == false.  */
451
452      reloc_type = CGEN_SYM (lookup_reloc) (insn, operand, fixP);
453      if (reloc_type != BFD_RELOC_NONE)
454	{
455	  fixP->fx_r_type = reloc_type;
456	}
457      else
458	{
459	  as_bad_where (fixP->fx_file, fixP->fx_line,
460			"unresolved expression that must be resolved");
461	  fixP->fx_done = 1;
462	  return 1;
463	}
464    }
465  else if (fixP->fx_done)
466    {
467      /* We're finished with this fixup.  Install it because
468	 bfd_install_relocation won't be called to do it.  */
469      switch (fixP->fx_r_type)
470	{
471	case BFD_RELOC_8:
472	  md_number_to_chars (where, value, 1);
473	  break;
474	case BFD_RELOC_16:
475	  md_number_to_chars (where, value, 2);
476	  break;
477	case BFD_RELOC_32:
478	  md_number_to_chars (where, value, 4);
479	  break;
480	/* FIXME: later add support for 64 bits.  */
481	default:
482	  abort ();
483	}
484    }
485  else
486    {
487      /* bfd_install_relocation will be called to finish things up.  */
488    }
489
490  /* Tuck `value' away for use by tc_gen_reloc.
491     See the comment describing fx_addnumber in write.h.
492     This field is misnamed (or misused :-).  */
493  fixP->fx_addnumber = value;
494
495  return 1;
496}
497
498/* Translate internal representation of relocation info to BFD target format.
499
500   FIXME: To what extent can we get all relevant targets to use this?  */
501
502arelent *
503cgen_tc_gen_reloc (section, fixP)
504     asection *section;
505     fixS *fixP;
506{
507  arelent *reloc;
508
509  reloc = (arelent *) bfd_alloc (stdoutput, sizeof (arelent));
510
511  reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
512  if (reloc->howto == (reloc_howto_type *) NULL)
513    {
514      as_bad_where (fixP->fx_file, fixP->fx_line,
515		    "internal error: can't export reloc type %d (`%s')",
516		    fixP->fx_r_type, bfd_get_reloc_code_name (fixP->fx_r_type));
517      return NULL;
518    }
519
520  assert (!fixP->fx_pcrel == !reloc->howto->pc_relative);
521
522  reloc->sym_ptr_ptr = &fixP->fx_addsy->bsym;
523  reloc->address = fixP->fx_frag->fr_address + fixP->fx_where;
524  reloc->addend = fixP->fx_addnumber;
525
526  return reloc;
527}
528