cgen.c revision 218822
1/* GAS interface for targets using CGEN: Cpu tools GENerator. 2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 3 2006 Free Software Foundation, Inc. 4 5 This file is part of GAS, the GNU Assembler. 6 7 GAS is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2, or (at your option) 10 any later version. 11 12 GAS is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GAS; see the file COPYING. If not, write to the Free Software 19 Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 20 21#include <setjmp.h> 22#include "as.h" 23#include "symcat.h" 24#include "cgen-desc.h" 25#include "subsegs.h" 26#include "cgen.h" 27#include "dwarf2dbg.h" 28 29#include "symbols.h" 30#include "struc-symbol.h" 31 32#ifdef OBJ_COMPLEX_RELC 33static expressionS * make_right_shifted_expr 34 (expressionS *, const int, const int); 35 36static unsigned long gas_cgen_encode_addend 37 (const unsigned long, const unsigned long, const unsigned long, \ 38 const unsigned long, const unsigned long, const unsigned long, \ 39 const unsigned long); 40 41static char * weak_operand_overflow_check 42 (const expressionS *, const CGEN_OPERAND *); 43 44static void queue_fixup_recursively 45 (const int, const int, expressionS *, \ 46 const CGEN_MAYBE_MULTI_IFLD *, const int, const int); 47 48static int rightshift = 0; 49#endif 50static void queue_fixup (int, int, expressionS *); 51 52/* Opcode table descriptor, must be set by md_begin. */ 53 54CGEN_CPU_DESC gas_cgen_cpu_desc; 55 56/* Callback to insert a register into the symbol table. 57 A target may choose to let GAS parse the registers. 58 ??? Not currently used. */ 59 60void 61cgen_asm_record_register (name, number) 62 char *name; 63 int number; 64{ 65 /* Use symbol_create here instead of symbol_new so we don't try to 66 output registers into the object file's symbol table. */ 67 symbol_table_insert (symbol_create (name, reg_section, 68 number, &zero_address_frag)); 69} 70 71/* We need to keep a list of fixups. We can't simply generate them as 72 we go, because that would require us to first create the frag, and 73 that would screw up references to ``.''. 74 75 This is used by cpu's with simple operands. It keeps knowledge of what 76 an `expressionS' is and what a `fixup' is out of CGEN which for the time 77 being is preferable. 78 79 OPINDEX is the index in the operand table. 80 OPINFO is something the caller chooses to help in reloc determination. */ 81 82struct fixup 83{ 84 int opindex; 85 int opinfo; 86 expressionS exp; 87 struct cgen_maybe_multi_ifield * field; 88 int msb_field_p; 89}; 90 91static struct fixup fixups[GAS_CGEN_MAX_FIXUPS]; 92static int num_fixups; 93 94/* Prepare to parse an instruction. 95 ??? May wish to make this static and delete calls in md_assemble. */ 96 97void 98gas_cgen_init_parse () 99{ 100 num_fixups = 0; 101} 102 103/* Queue a fixup. */ 104 105static void 106queue_fixup (opindex, opinfo, expP) 107 int opindex; 108 int opinfo; 109 expressionS * expP; 110{ 111 /* We need to generate a fixup for this expression. */ 112 if (num_fixups >= GAS_CGEN_MAX_FIXUPS) 113 as_fatal (_("too many fixups")); 114 fixups[num_fixups].exp = *expP; 115 fixups[num_fixups].opindex = opindex; 116 fixups[num_fixups].opinfo = opinfo; 117 ++ num_fixups; 118} 119 120/* The following functions allow fixup chains to be stored, retrieved, 121 and swapped. They are a generalization of a pre-existing scheme 122 for storing, restoring and swapping fixup chains that was used by 123 the m32r port. The functionality is essentially the same, only 124 instead of only being able to store a single fixup chain, an entire 125 array of fixup chains can be stored. It is the user's responsibility 126 to keep track of how many fixup chains have been stored and which 127 elements of the array they are in. 128 129 The algorithms used are the same as in the old scheme. Other than the 130 "array-ness" of the whole thing, the functionality is identical to the 131 old scheme. 132 133 gas_cgen_initialize_saved_fixups_array(): 134 Sets num_fixups_in_chain to 0 for each element. Call this from 135 md_begin() if you plan to use these functions and you want the 136 fixup count in each element to be set to 0 initially. This is 137 not necessary, but it's included just in case. It performs 138 the same function for each element in the array of fixup chains 139 that gas_init_parse() performs for the current fixups. 140 141 gas_cgen_save_fixups (element): 142 element - element number of the array you wish to store the fixups 143 to. No mechanism is built in for tracking what element 144 was last stored to. 145 146 gas_cgen_restore_fixups (element): 147 element - element number of the array you wish to restore the fixups 148 from. 149 150 gas_cgen_swap_fixups(int element): 151 element - swap the current fixups with those in this element number. 152*/ 153 154struct saved_fixups 155{ 156 struct fixup fixup_chain[GAS_CGEN_MAX_FIXUPS]; 157 int num_fixups_in_chain; 158}; 159 160static struct saved_fixups stored_fixups[MAX_SAVED_FIXUP_CHAINS]; 161 162void 163gas_cgen_initialize_saved_fixups_array () 164{ 165 int i = 0; 166 167 while (i < MAX_SAVED_FIXUP_CHAINS) 168 stored_fixups[i++].num_fixups_in_chain = 0; 169} 170 171void 172gas_cgen_save_fixups (i) 173 int i; 174{ 175 if (i < 0 || i >= MAX_SAVED_FIXUP_CHAINS) 176 { 177 as_fatal ("index into stored_fixups[] out of bounds"); 178 return; 179 } 180 181 stored_fixups[i].num_fixups_in_chain = num_fixups; 182 memcpy (stored_fixups[i].fixup_chain, fixups, 183 sizeof (fixups[0]) * num_fixups); 184 num_fixups = 0; 185} 186 187void 188gas_cgen_restore_fixups (i) 189 int i; 190{ 191 if (i < 0 || i >= MAX_SAVED_FIXUP_CHAINS) 192 { 193 as_fatal ("index into stored_fixups[] out of bounds"); 194 return; 195 } 196 197 num_fixups = stored_fixups[i].num_fixups_in_chain; 198 memcpy (fixups, stored_fixups[i].fixup_chain, 199 (sizeof (stored_fixups[i].fixup_chain[0])) * num_fixups); 200 stored_fixups[i].num_fixups_in_chain = 0; 201} 202 203void 204gas_cgen_swap_fixups (i) 205 int i; 206{ 207 if (i < 0 || i >= MAX_SAVED_FIXUP_CHAINS) 208 { 209 as_fatal ("index into stored_fixups[] out of bounds"); 210 return; 211 } 212 213 if (num_fixups == 0) 214 gas_cgen_restore_fixups (i); 215 216 else if (stored_fixups[i].num_fixups_in_chain == 0) 217 gas_cgen_save_fixups (i); 218 219 else 220 { 221 int tmp; 222 struct fixup tmp_fixup; 223 224 tmp = stored_fixups[i].num_fixups_in_chain; 225 stored_fixups[i].num_fixups_in_chain = num_fixups; 226 num_fixups = tmp; 227 228 for (tmp = GAS_CGEN_MAX_FIXUPS; tmp--;) 229 { 230 tmp_fixup = stored_fixups[i].fixup_chain [tmp]; 231 stored_fixups[i].fixup_chain[tmp] = fixups [tmp]; 232 fixups [tmp] = tmp_fixup; 233 } 234 } 235} 236 237/* Default routine to record a fixup. 238 This is a cover function to fix_new. 239 It exists because we record INSN with the fixup. 240 241 FRAG and WHERE are their respective arguments to fix_new_exp. 242 LENGTH is in bits. 243 OPINFO is something the caller chooses to help in reloc determination. 244 245 At this point we do not use a bfd_reloc_code_real_type for 246 operands residing in the insn, but instead just use the 247 operand index. This lets us easily handle fixups for any 248 operand type. We pick a BFD reloc type in md_apply_fix. */ 249 250fixS * 251gas_cgen_record_fixup (frag, where, insn, length, operand, opinfo, symbol, offset) 252 fragS * frag; 253 int where; 254 const CGEN_INSN * insn; 255 int length; 256 const CGEN_OPERAND * operand; 257 int opinfo; 258 symbolS * symbol; 259 offsetT offset; 260{ 261 fixS *fixP; 262 263 /* It may seem strange to use operand->attrs and not insn->attrs here, 264 but it is the operand that has a pc relative relocation. */ 265 fixP = fix_new (frag, where, length / 8, symbol, offset, 266 CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_PCREL_ADDR), 267 (bfd_reloc_code_real_type) 268 ((int) BFD_RELOC_UNUSED 269 + (int) operand->type)); 270 fixP->fx_cgen.insn = insn; 271 fixP->fx_cgen.opinfo = opinfo; 272 fixP->fx_cgen.field = NULL; 273 fixP->fx_cgen.msb_field_p = 0; 274 275 return fixP; 276} 277 278/* Default routine to record a fixup given an expression. 279 This is a cover function to fix_new_exp. 280 It exists because we record INSN with the fixup. 281 282 FRAG and WHERE are their respective arguments to fix_new_exp. 283 LENGTH is in bits. 284 OPINFO is something the caller chooses to help in reloc determination. 285 286 At this point we do not use a bfd_reloc_code_real_type for 287 operands residing in the insn, but instead just use the 288 operand index. This lets us easily handle fixups for any 289 operand type. We pick a BFD reloc type in md_apply_fix. */ 290 291fixS * 292gas_cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp) 293 fragS * frag; 294 int where; 295 const CGEN_INSN * insn; 296 int length; 297 const CGEN_OPERAND * operand; 298 int opinfo; 299 expressionS * exp; 300{ 301 fixS *fixP; 302 303 /* It may seem strange to use operand->attrs and not insn->attrs here, 304 but it is the operand that has a pc relative relocation. */ 305 fixP = fix_new_exp (frag, where, length / 8, exp, 306 CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_PCREL_ADDR), 307 (bfd_reloc_code_real_type) 308 ((int) BFD_RELOC_UNUSED 309 + (int) operand->type)); 310 fixP->fx_cgen.insn = insn; 311 fixP->fx_cgen.opinfo = opinfo; 312 fixP->fx_cgen.field = NULL; 313 fixP->fx_cgen.msb_field_p = 0; 314 315 return fixP; 316} 317 318#ifdef OBJ_COMPLEX_RELC 319static symbolS * 320expr_build_binary (operatorT op, symbolS * s1, symbolS * s2) 321{ 322 expressionS e; 323 324 e.X_op = op; 325 e.X_add_symbol = s1; 326 e.X_op_symbol = s2; 327 e.X_add_number = 0; 328 return make_expr_symbol (& e); 329} 330#endif 331 332/* Used for communication between the next two procedures. */ 333static jmp_buf expr_jmp_buf; 334static int expr_jmp_buf_p; 335 336/* Callback for cgen interface. Parse the expression at *STRP. 337 The result is an error message or NULL for success (in which case 338 *STRP is advanced past the parsed text). 339 WANT is an indication of what the caller is looking for. 340 If WANT == CGEN_ASM_PARSE_INIT the caller is beginning to try to match 341 a table entry with the insn, reset the queued fixups counter. 342 An enum cgen_parse_operand_result is stored in RESULTP. 343 OPINDEX is the operand's table entry index. 344 OPINFO is something the caller chooses to help in reloc determination. 345 The resulting value is stored in VALUEP. */ 346 347const char * 348gas_cgen_parse_operand (cd, want, strP, opindex, opinfo, resultP, valueP) 349 350#ifdef OBJ_COMPLEX_RELC 351 CGEN_CPU_DESC cd; 352#else 353 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; 354#endif 355 enum cgen_parse_operand_type want; 356 const char **strP; 357 int opindex; 358 int opinfo; 359 enum cgen_parse_operand_result *resultP; 360 bfd_vma *valueP; 361{ 362#ifdef __STDC__ 363 /* These are volatile to survive the setjmp. */ 364 char * volatile hold; 365 enum cgen_parse_operand_result * volatile resultP_1; 366 volatile int opinfo_1; 367#else 368 static char *hold; 369 static enum cgen_parse_operand_result *resultP_1; 370 int opinfo_1; 371#endif 372 const char *errmsg; 373 expressionS exp; 374 375#ifdef OBJ_COMPLEX_RELC 376 volatile int signed_p = 0; 377 symbolS * stmp = NULL; 378 bfd_reloc_code_real_type reloc_type; 379 const CGEN_OPERAND * operand; 380 fixS dummy_fixup; 381#endif 382 if (want == CGEN_PARSE_OPERAND_INIT) 383 { 384 gas_cgen_init_parse (); 385 return NULL; 386 } 387 388 resultP_1 = resultP; 389 hold = input_line_pointer; 390 input_line_pointer = (char *) *strP; 391 opinfo_1 = opinfo; 392 393 /* We rely on md_operand to longjmp back to us. 394 This is done via gas_cgen_md_operand. */ 395 if (setjmp (expr_jmp_buf) != 0) 396 { 397 expr_jmp_buf_p = 0; 398 input_line_pointer = (char *) hold; 399 *resultP_1 = CGEN_PARSE_OPERAND_RESULT_ERROR; 400 return _("illegal operand"); 401 } 402 403 expr_jmp_buf_p = 1; 404 expression (&exp); 405 expr_jmp_buf_p = 0; 406 errmsg = NULL; 407 408 *strP = input_line_pointer; 409 input_line_pointer = hold; 410 411#ifdef TC_CGEN_PARSE_FIX_EXP 412 opinfo_1 = TC_CGEN_PARSE_FIX_EXP (opinfo_1, & exp); 413#endif 414 415 /* FIXME: Need to check `want'. */ 416 417 switch (exp.X_op) 418 { 419 case O_illegal: 420 errmsg = _("illegal operand"); 421 *resultP = CGEN_PARSE_OPERAND_RESULT_ERROR; 422 break; 423 case O_absent: 424 errmsg = _("missing operand"); 425 *resultP = CGEN_PARSE_OPERAND_RESULT_ERROR; 426 break; 427 case O_constant: 428 if (want == CGEN_PARSE_OPERAND_SYMBOLIC) 429 goto de_fault; 430 *valueP = exp.X_add_number; 431 *resultP = CGEN_PARSE_OPERAND_RESULT_NUMBER; 432 break; 433 case O_register: 434 *valueP = exp.X_add_number; 435 *resultP = CGEN_PARSE_OPERAND_RESULT_REGISTER; 436 break; 437 de_fault: 438 default: 439#ifdef OBJ_COMPLEX_RELC 440 /* Look up operand, check to see if there's an obvious 441 overflow (this helps disambiguate some insn parses). */ 442 operand = cgen_operand_lookup_by_num (cd, opindex); 443 errmsg = weak_operand_overflow_check (& exp, operand); 444 445 if (! errmsg) 446 { 447 /* Fragment the expression as necessary, and queue a reloc. */ 448 memset (& dummy_fixup, 0, sizeof (fixS)); 449 450 reloc_type = md_cgen_lookup_reloc (0, operand, & dummy_fixup); 451 452 if (exp.X_op == O_symbol 453 && reloc_type == BFD_RELOC_RELC 454 && exp.X_add_symbol->sy_value.X_op == O_constant 455 && exp.X_add_symbol->bsym->section != expr_section 456 && exp.X_add_symbol->bsym->section != absolute_section 457 && exp.X_add_symbol->bsym->section != undefined_section) 458 { 459 /* Local labels will have been (eagerly) turned into constants 460 by now, due to the inappropriately deep insight of the 461 expression parser. Unfortunately make_expr_symbol 462 prematurely dives into the symbol evaluator, and in this 463 case it gets a bad answer, so we manually create the 464 expression symbol we want here. */ 465 stmp = symbol_create (FAKE_LABEL_NAME, expr_section, 0, 466 & zero_address_frag); 467 symbol_set_value_expression (stmp, & exp); 468 } 469 else 470 stmp = make_expr_symbol (& exp); 471 472 /* If this is a pc-relative RELC operand, we 473 need to subtract "." from the expression. */ 474 if (reloc_type == BFD_RELOC_RELC 475 && CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_PCREL_ADDR)) 476 stmp = expr_build_binary (O_subtract, stmp, expr_build_dot ()); 477 478 /* FIXME: this is not a perfect heuristic for figuring out 479 whether an operand is signed: it only works when the operand 480 is an immediate. it's not terribly likely that any other 481 values will be signed relocs, but it's possible. */ 482 if (operand && (operand->hw_type == HW_H_SINT)) 483 signed_p = 1; 484 485 if (stmp->bsym && (stmp->bsym->section == expr_section)) 486 { 487 if (signed_p) 488 stmp->bsym->flags |= BSF_SRELC; 489 else 490 stmp->bsym->flags |= BSF_RELC; 491 } 492 493 /* Now package it all up for the fixup emitter. */ 494 exp.X_op = O_symbol; 495 exp.X_op_symbol = 0; 496 exp.X_add_symbol = stmp; 497 exp.X_add_number = 0; 498 499 /* Re-init rightshift quantity, just in case. */ 500 rightshift = operand->length; 501 queue_fixup_recursively (opindex, opinfo_1, & exp, 502 (reloc_type == BFD_RELOC_RELC) ? 503 & (operand->index_fields) : 0, 504 signed_p, -1); 505 } 506 * resultP = errmsg 507 ? CGEN_PARSE_OPERAND_RESULT_ERROR 508 : CGEN_PARSE_OPERAND_RESULT_QUEUED; 509 *valueP = 0; 510#else 511 queue_fixup (opindex, opinfo_1, &exp); 512 *valueP = 0; 513 *resultP = CGEN_PARSE_OPERAND_RESULT_QUEUED; 514#endif 515 break; 516 } 517 518 return errmsg; 519} 520 521/* md_operand handler to catch unrecognized expressions and halt the 522 parsing process so the next entry can be tried. 523 524 ??? This could be done differently by adding code to `expression'. */ 525 526void 527gas_cgen_md_operand (expressionP) 528 expressionS *expressionP ATTRIBUTE_UNUSED; 529{ 530 /* Don't longjmp if we're not called from within cgen_parse_operand(). */ 531 if (expr_jmp_buf_p) 532 longjmp (expr_jmp_buf, 1); 533} 534 535/* Finish assembling instruction INSN. 536 BUF contains what we've built up so far. 537 LENGTH is the size of the insn in bits. 538 RELAX_P is non-zero if relaxable insns should be emitted as such. 539 Otherwise they're emitted in non-relaxable forms. 540 The "result" is stored in RESULT if non-NULL. */ 541 542void 543gas_cgen_finish_insn (insn, buf, length, relax_p, result) 544 const CGEN_INSN *insn; 545 CGEN_INSN_BYTES_PTR buf; 546 unsigned int length; 547 int relax_p; 548 finished_insnS *result; 549{ 550 int i; 551 int relax_operand; 552 char *f; 553 unsigned int byte_len = length / 8; 554 555 /* ??? Target foo issues various warnings here, so one might want to provide 556 a hook here. However, our caller is defined in tc-foo.c so there 557 shouldn't be a need for a hook. */ 558 559 /* Write out the instruction. 560 It is important to fetch enough space in one call to `frag_more'. 561 We use (f - frag_now->fr_literal) to compute where we are and we 562 don't want frag_now to change between calls. 563 564 Relaxable instructions: We need to ensure we allocate enough 565 space for the largest insn. */ 566 567 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED)) 568 /* These currently shouldn't get here. */ 569 abort (); 570 571 /* Is there a relaxable insn with the relaxable operand needing a fixup? */ 572 573 relax_operand = -1; 574 if (relax_p && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXABLE)) 575 { 576 /* Scan the fixups for the operand affected by relaxing 577 (i.e. the branch address). */ 578 579 for (i = 0; i < num_fixups; ++i) 580 { 581 if (CGEN_OPERAND_ATTR_VALUE (cgen_operand_lookup_by_num (gas_cgen_cpu_desc, fixups[i].opindex), 582 CGEN_OPERAND_RELAX)) 583 { 584 relax_operand = i; 585 break; 586 } 587 } 588 } 589 590 if (relax_operand != -1) 591 { 592 int max_len; 593 fragS *old_frag; 594 expressionS *exp; 595 symbolS *sym; 596 offsetT off; 597 598#ifdef TC_CGEN_MAX_RELAX 599 max_len = TC_CGEN_MAX_RELAX (insn, byte_len); 600#else 601 max_len = CGEN_MAX_INSN_SIZE; 602#endif 603 /* Ensure variable part and fixed part are in same fragment. */ 604 /* FIXME: Having to do this seems like a hack. */ 605 frag_grow (max_len); 606 607 /* Allocate space for the fixed part. */ 608 f = frag_more (byte_len); 609 610 /* Create a relaxable fragment for this instruction. */ 611 old_frag = frag_now; 612 613 exp = &fixups[relax_operand].exp; 614 sym = exp->X_add_symbol; 615 off = exp->X_add_number; 616 if (exp->X_op != O_constant && exp->X_op != O_symbol) 617 { 618 /* Handle complex expressions. */ 619 sym = make_expr_symbol (exp); 620 off = 0; 621 } 622 623 frag_var (rs_machine_dependent, 624 max_len - byte_len /* max chars */, 625 0 /* variable part already allocated */, 626 /* FIXME: When we machine generate the relax table, 627 machine generate a macro to compute subtype. */ 628 1 /* subtype */, 629 sym, 630 off, 631 f); 632 633 /* Record the operand number with the fragment so md_convert_frag 634 can use gas_cgen_md_record_fixup to record the appropriate reloc. */ 635 old_frag->fr_cgen.insn = insn; 636 old_frag->fr_cgen.opindex = fixups[relax_operand].opindex; 637 old_frag->fr_cgen.opinfo = fixups[relax_operand].opinfo; 638 if (result) 639 result->frag = old_frag; 640 } 641 else 642 { 643 f = frag_more (byte_len); 644 if (result) 645 result->frag = frag_now; 646 } 647 648 /* If we're recording insns as numbers (rather than a string of bytes), 649 target byte order handling is deferred until now. */ 650#if CGEN_INT_INSN_P 651 cgen_put_insn_value (gas_cgen_cpu_desc, (unsigned char *) f, length, *buf); 652#else 653 memcpy (f, buf, byte_len); 654#endif 655 656 /* Emit DWARF2 debugging information. */ 657 dwarf2_emit_insn (byte_len); 658 659 /* Create any fixups. */ 660 for (i = 0; i < num_fixups; ++i) 661 { 662 fixS *fixP; 663 const CGEN_OPERAND *operand = 664 cgen_operand_lookup_by_num (gas_cgen_cpu_desc, fixups[i].opindex); 665 666 /* Don't create fixups for these. That's done during relaxation. 667 We don't need to test for CGEN_INSN_RELAXED as they can't get here 668 (see above). */ 669 if (relax_p 670 && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXABLE) 671 && CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_RELAX)) 672 continue; 673 674#ifndef md_cgen_record_fixup_exp 675#define md_cgen_record_fixup_exp gas_cgen_record_fixup_exp 676#endif 677 678 fixP = md_cgen_record_fixup_exp (frag_now, f - frag_now->fr_literal, 679 insn, length, operand, 680 fixups[i].opinfo, 681 &fixups[i].exp); 682 fixP->fx_cgen.field = fixups[i].field; 683 fixP->fx_cgen.msb_field_p = fixups[i].msb_field_p; 684 if (result) 685 result->fixups[i] = fixP; 686 } 687 688 if (result) 689 { 690 result->num_fixups = num_fixups; 691 result->addr = f; 692 } 693} 694 695#ifdef OBJ_COMPLEX_RELC 696/* Queue many fixups, recursively. If the field is a multi-ifield, 697 repeatedly queue its sub-parts, right shifted to fit into the field (we 698 assume here multi-fields represent a left-to-right, MSB0-LSB0 699 reading). */ 700 701static void 702queue_fixup_recursively (const int opindex, 703 const int opinfo, 704 expressionS * expP, 705 const CGEN_MAYBE_MULTI_IFLD * field, 706 const int signed_p, 707 const int part_of_multi) 708{ 709 if (field && field->count) 710 { 711 int i; 712 713 for (i = 0; i < field->count; ++ i) 714 queue_fixup_recursively (opindex, opinfo, expP, 715 & (field->val.multi[i]), signed_p, i); 716 } 717 else 718 { 719 expressionS * new_exp = expP; 720 721#ifdef DEBUG 722 printf ("queueing fixup for field %s\n", 723 (field ? field->val.leaf->name : "??")); 724 print_symbol_value (expP->X_add_symbol); 725#endif 726 if (field && part_of_multi != -1) 727 { 728 rightshift -= field->val.leaf->length; 729 730 /* Shift reloc value by number of bits remaining after this 731 field. */ 732 if (rightshift) 733 new_exp = make_right_shifted_expr (expP, rightshift, signed_p); 734 } 735 736 /* Truncate reloc values to length, *after* leftmost one. */ 737 fixups[num_fixups].msb_field_p = (part_of_multi <= 0); 738 fixups[num_fixups].field = (CGEN_MAYBE_MULTI_IFLD *) field; 739 740 queue_fixup (opindex, opinfo, new_exp); 741 } 742} 743 744/* Encode the self-describing RELC reloc format's addend. */ 745 746static unsigned long 747gas_cgen_encode_addend (const unsigned long start, /* in bits */ 748 const unsigned long len, /* in bits */ 749 const unsigned long oplen, /* in bits */ 750 const unsigned long wordsz, /* in bytes */ 751 const unsigned long chunksz, /* in bytes */ 752 const unsigned long signed_p, 753 const unsigned long trunc_p) 754{ 755 unsigned long res = 0L; 756 757 res |= start & 0x3F; 758 res |= (oplen & 0x3F) << 6; 759 res |= (len & 0x3F) << 12; 760 res |= (wordsz & 0xF) << 18; 761 res |= (chunksz & 0xF) << 22; 762 res |= (CGEN_INSN_LSB0_P ? 1 : 0) << 27; 763 res |= signed_p << 28; 764 res |= trunc_p << 29; 765 766 return res; 767} 768 769/* Purpose: make a weak check that the expression doesn't overflow the 770 operand it's to be inserted into. 771 772 Rationale: some insns used to use %operators to disambiguate during a 773 parse. when these %operators are translated to expressions by the macro 774 expander, the ambiguity returns. we attempt to disambiguate by field 775 size. 776 777 Method: check to see if the expression's top node is an O_and operator, 778 and the mask is larger than the operand length. This would be an 779 overflow, so signal it by returning an error string. Any other case is 780 ambiguous, so we assume it's OK and return NULL. */ 781 782static char * 783weak_operand_overflow_check (const expressionS * exp, 784 const CGEN_OPERAND * operand) 785{ 786 const unsigned long len = operand->length; 787 unsigned long mask; 788 unsigned long opmask = (((1L << (len - 1)) - 1) << 1) | 1; 789 790 if (!exp) 791 return NULL; 792 793 if (exp->X_op != O_bit_and) 794 { 795 /* Check for implicit overflow flag. */ 796 if (CGEN_OPERAND_ATTR_VALUE 797 (operand, CGEN_OPERAND_RELOC_IMPLIES_OVERFLOW)) 798 return _("a reloc on this operand implies an overflow"); 799 return NULL; 800 } 801 802 mask = exp->X_add_number; 803 804 if (exp->X_add_symbol && 805 exp->X_add_symbol->sy_value.X_op == O_constant) 806 mask |= exp->X_add_symbol->sy_value.X_add_number; 807 808 if (exp->X_op_symbol && 809 exp->X_op_symbol->sy_value.X_op == O_constant) 810 mask |= exp->X_op_symbol->sy_value.X_add_number; 811 812 /* Want to know if mask covers more bits than opmask. 813 this is the same as asking if mask has any bits not in opmask, 814 or whether (mask & ~opmask) is nonzero. */ 815 if (mask && (mask & ~opmask)) 816 { 817#ifdef DEBUG 818 printf ("overflow: (mask = %8.8x, ~opmask = %8.8x, AND = %8.8x)\n", 819 mask, ~opmask, (mask & ~opmask)); 820#endif 821 return _("operand mask overflow"); 822 } 823 824 return NULL; 825} 826 827 828static expressionS * 829make_right_shifted_expr (expressionS * exp, 830 const int amount, 831 const int signed_p) 832{ 833 symbolS * stmp = 0; 834 expressionS * new_exp; 835 836 stmp = expr_build_binary (O_right_shift, 837 make_expr_symbol (exp), 838 expr_build_uconstant (amount)); 839 840 if (signed_p) 841 stmp->bsym->flags |= BSF_SRELC; 842 else 843 stmp->bsym->flags |= BSF_RELC; 844 845 /* Then wrap that in a "symbol expr" for good measure. */ 846 new_exp = xmalloc (sizeof (expressionS)); 847 memset (new_exp, 0, sizeof (expressionS)); 848 new_exp->X_op = O_symbol; 849 new_exp->X_op_symbol = 0; 850 new_exp->X_add_symbol = stmp; 851 new_exp->X_add_number = 0; 852 853 return new_exp; 854} 855#endif 856/* Apply a fixup to the object code. This is called for all the 857 fixups we generated by the call to fix_new_exp, above. In the call 858 above we used a reloc code which was the largest legal reloc code 859 plus the operand index. Here we undo that to recover the operand 860 index. At this point all symbol values should be fully resolved, 861 and we attempt to completely resolve the reloc. If we can not do 862 that, we determine the correct reloc code and put it back in the fixup. */ 863 864/* FIXME: This function handles some of the fixups and bfd_install_relocation 865 handles the rest. bfd_install_relocation (or some other bfd function) 866 should handle them all. */ 867 868void 869gas_cgen_md_apply_fix (fixP, valP, seg) 870 fixS * fixP; 871 valueT * valP; 872 segT seg ATTRIBUTE_UNUSED; 873{ 874 char *where = fixP->fx_frag->fr_literal + fixP->fx_where; 875 valueT value = * valP; 876 /* Canonical name, since used a lot. */ 877 CGEN_CPU_DESC cd = gas_cgen_cpu_desc; 878 879 if (fixP->fx_addsy == (symbolS *) NULL) 880 fixP->fx_done = 1; 881 882 /* We don't actually support subtracting a symbol. */ 883 if (fixP->fx_subsy != (symbolS *) NULL) 884 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); 885 886 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED) 887 { 888 int opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED; 889 const CGEN_OPERAND *operand = cgen_operand_lookup_by_num (cd, opindex); 890 const char *errmsg; 891 bfd_reloc_code_real_type reloc_type; 892 CGEN_FIELDS *fields = alloca (CGEN_CPU_SIZEOF_FIELDS (cd)); 893 const CGEN_INSN *insn = fixP->fx_cgen.insn; 894 int start; 895 int length; 896 int signed_p = 0; 897 898 if (fixP->fx_cgen.field) 899 { 900 /* Use the twisty little pointer path 901 back to the ifield if it exists. */ 902 start = fixP->fx_cgen.field->val.leaf->start; 903 length = fixP->fx_cgen.field->val.leaf->length; 904 } 905 else 906 { 907 /* Or the far less useful operand-size guesstimate. */ 908 start = operand->start; 909 length = operand->length; 910 } 911 912 /* FIXME: this is not a perfect heuristic for figuring out 913 whether an operand is signed: it only works when the operand 914 is an immediate. it's not terribly likely that any other 915 values will be signed relocs, but it's possible. */ 916 if (operand && (operand->hw_type == HW_H_SINT)) 917 signed_p = 1; 918 919 /* If the reloc has been fully resolved finish the operand here. */ 920 /* FIXME: This duplicates the capabilities of code in BFD. */ 921 if (fixP->fx_done 922 /* FIXME: If partial_inplace isn't set bfd_install_relocation won't 923 finish the job. Testing for pcrel is a temporary hack. */ 924 || fixP->fx_pcrel) 925 { 926 CGEN_CPU_SET_FIELDS_BITSIZE (cd) (fields, CGEN_INSN_BITSIZE (insn)); 927 CGEN_CPU_SET_VMA_OPERAND (cd) (cd, opindex, fields, (bfd_vma) value); 928 929#if CGEN_INT_INSN_P 930 { 931 CGEN_INSN_INT insn_value = 932 cgen_get_insn_value (cd, (unsigned char *) where, 933 CGEN_INSN_BITSIZE (insn)); 934 935 /* ??? 0 is passed for `pc'. */ 936 errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields, 937 &insn_value, (bfd_vma) 0); 938 cgen_put_insn_value (cd, (unsigned char *) where, 939 CGEN_INSN_BITSIZE (insn), insn_value); 940 } 941#else 942 /* ??? 0 is passed for `pc'. */ 943 errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields, 944 (unsigned char *) where, 945 (bfd_vma) 0); 946#endif 947 if (errmsg) 948 as_bad_where (fixP->fx_file, fixP->fx_line, "%s", errmsg); 949 } 950 951 if (fixP->fx_done) 952 return; 953 954 /* The operand isn't fully resolved. Determine a BFD reloc value 955 based on the operand information and leave it to 956 bfd_install_relocation. Note that this doesn't work when 957 partial_inplace == false. */ 958 959 reloc_type = md_cgen_lookup_reloc (insn, operand, fixP); 960#ifdef OBJ_COMPLEX_RELC 961 if (reloc_type == BFD_RELOC_RELC) 962 { 963 /* Change addend to "self-describing" form, 964 for BFD to handle in the linker. */ 965 value = gas_cgen_encode_addend (start, operand->length, 966 length, fixP->fx_size, 967 cd->insn_chunk_bitsize / 8, 968 signed_p, 969 ! (fixP->fx_cgen.msb_field_p)); 970 } 971#endif 972 973 if (reloc_type != BFD_RELOC_NONE) 974 fixP->fx_r_type = reloc_type; 975 else 976 { 977 as_bad_where (fixP->fx_file, fixP->fx_line, 978 _("unresolved expression that must be resolved")); 979 fixP->fx_done = 1; 980 return; 981 } 982 } 983 else if (fixP->fx_done) 984 { 985 /* We're finished with this fixup. Install it because 986 bfd_install_relocation won't be called to do it. */ 987 switch (fixP->fx_r_type) 988 { 989 case BFD_RELOC_8: 990 md_number_to_chars (where, value, 1); 991 break; 992 case BFD_RELOC_16: 993 md_number_to_chars (where, value, 2); 994 break; 995 case BFD_RELOC_32: 996 md_number_to_chars (where, value, 4); 997 break; 998 case BFD_RELOC_64: 999 md_number_to_chars (where, value, 8); 1000 break; 1001 default: 1002 as_bad_where (fixP->fx_file, fixP->fx_line, 1003 _("internal error: can't install fix for reloc type %d (`%s')"), 1004 fixP->fx_r_type, bfd_get_reloc_code_name (fixP->fx_r_type)); 1005 break; 1006 } 1007 } 1008 /* else 1009 bfd_install_relocation will be called to finish things up. */ 1010 1011 /* Tuck `value' away for use by tc_gen_reloc. 1012 See the comment describing fx_addnumber in write.h. 1013 This field is misnamed (or misused :-). */ 1014 fixP->fx_addnumber = value; 1015} 1016 1017/* Translate internal representation of relocation info to BFD target format. 1018 1019 FIXME: To what extent can we get all relevant targets to use this? */ 1020 1021arelent * 1022gas_cgen_tc_gen_reloc (section, fixP) 1023 asection * section ATTRIBUTE_UNUSED; 1024 fixS * fixP; 1025{ 1026 arelent *reloc; 1027 reloc = (arelent *) xmalloc (sizeof (arelent)); 1028 1029 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); 1030 if (reloc->howto == (reloc_howto_type *) NULL) 1031 { 1032 as_bad_where (fixP->fx_file, fixP->fx_line, 1033 _("relocation is not supported")); 1034 return NULL; 1035 } 1036 1037 assert (!fixP->fx_pcrel == !reloc->howto->pc_relative); 1038 1039 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); 1040 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy); 1041 1042 /* Use fx_offset for these cases. */ 1043 if (fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY 1044 || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT) 1045 reloc->addend = fixP->fx_offset; 1046 else 1047 reloc->addend = fixP->fx_addnumber; 1048 1049 reloc->address = fixP->fx_frag->fr_address + fixP->fx_where; 1050 return reloc; 1051} 1052 1053/* Perform any cgen specific initialisation. 1054 Called after gas_cgen_cpu_desc has been created. */ 1055 1056void 1057gas_cgen_begin () 1058{ 1059 if (flag_signed_overflow_ok) 1060 cgen_set_signed_overflow_ok (gas_cgen_cpu_desc); 1061 else 1062 cgen_clear_signed_overflow_ok (gas_cgen_cpu_desc); 1063} 1064 1065