isa.h revision 5428
133965Sjdp/*-
233965Sjdp * Copyright (c) 1990 The Regents of the University of California.
333965Sjdp * All rights reserved.
433965Sjdp *
577298Sobrien * This code is derived from software contributed to Berkeley by
6218822Sdim * William Jolitz.
733965Sjdp *
894536Sobrien * Redistribution and use in source and binary forms, with or without
933965Sjdp * modification, are permitted provided that the following conditions
1094536Sobrien * are met:
1133965Sjdp * 1. Redistributions of source code must retain the above copyright
1277298Sobrien *    notice, this list of conditions and the following disclaimer.
1394536Sobrien * 2. Redistributions in binary form must reproduce the above copyright
1433965Sjdp *    notice, this list of conditions and the following disclaimer in the
1577298Sobrien *    documentation and/or other materials provided with the distribution.
1677298Sobrien * 3. All advertising materials mentioning features or use of this software
1777298Sobrien *    must display the following acknowledgement:
18130561Sobrien *	This product includes software developed by the University of
1933965Sjdp *	California, Berkeley and its contributors.
20218822Sdim * 4. Neither the name of the University nor the names of its contributors
21218822Sdim *    may be used to endorse or promote products derived from this software
22104834Sobrien *    without specific prior written permission.
2377298Sobrien *
2477298Sobrien * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25130561Sobrien * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2677298Sobrien * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2777298Sobrien * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
2877298Sobrien * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
2977298Sobrien * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
3077298Sobrien * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
3177298Sobrien * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
3277298Sobrien * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
3377298Sobrien * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
3477298Sobrien * SUCH DAMAGE.
3577298Sobrien *
3677298Sobrien *	from: @(#)isa.h	5.7 (Berkeley) 5/9/91
3777298Sobrien *	$Id: isa.h,v 1.11 1994/11/19 18:59:04 phk Exp $
3877298Sobrien */
3977298Sobrien
4077298Sobrien#ifndef _I386_ISA_ISA_H_
4177298Sobrien#define	_I386_ISA_ISA_H_
4277298Sobrien
4377298Sobrien/* BEWARE:  Included in both assembler and C code */
4477298Sobrien/*
4577298Sobrien * ISA Bus conventions
4633965Sjdp */
4733965Sjdp
4833965Sjdp/*
4933965Sjdp * Input / Output Port Assignments
5033965Sjdp */
5133965Sjdp
5233965Sjdp#ifndef IO_BEGIN
5333965Sjdp#define	IO_ISABEGIN	0x000		/* 0x000 - Beginning of I/O Registers */
54
55		/* CPU Board */
56#define IO_DMA1		0x000		/* 8237A DMA Controller #1 */
57#define IO_ICU1		0x020		/* 8259A Interrupt Controller #1 */
58#define IO_PMP1		0x026		/* 82347 Power Management Peripheral */
59#define IO_TIMER1	0x040		/* 8253 Timer #1 */
60#define IO_TIMER2	0x048		/* 8253 Timer #2 */
61#define IO_KBD		0x060		/* 8042 Keyboard */
62#define IO_PPI		0x061		/* Programmable Peripheral Interface */
63#define IO_RTC		0x070		/* RTC */
64#define IO_NMI		IO_RTC		/* NMI Control */
65#define IO_DMAPG	0x080		/* DMA Page Registers */
66#define IO_ICU2		0x0A0		/* 8259A Interrupt Controller #2 */
67#define IO_DMA2		0x0C0		/* 8237A DMA Controller #2 */
68#define IO_NPX		0x0F0		/* Numeric Coprocessor */
69
70		/* Cards */
71					/* 0x100 - 0x16F Open */
72
73#define IO_WD2		0x170		/* Secondary Fixed Disk Controller */
74
75#define IO_PMP2		0x178		/* 82347 Power Management Peripheral */
76
77					/* 0x17A - 0x1EF Open */
78
79#define IO_WD1		0x1f0		/* Primary Fixed Disk Controller */
80#define IO_GAME		0x200		/* Game Controller */
81
82#define IO_GSC1         0x270 /* -- 0x27B! GeniScan GS-4500 addr.grp. 1 */
83#define IO_GSC2         0x2e0           /* GeniScan GS-4500 addr.grp. 2 */
84#define IO_GSC3         0x370           /* GeniScan GS-4500 addr.grp. 3 */
85#define IO_GSC4         0x3e0           /* GeniScan GS-4500 addr.grp. 4 */
86
87#define IO_LPT2		0x278		/* Parallel Port #2 */
88
89#define	IO_COM4		0x2e8		/* COM4 i/o address */
90
91					/* 0x2F0 - 0x2F7 Open */
92
93#define IO_COM2		0x2f8		/* COM2 i/o address */
94					/* 0x300 - 0x32F Open */
95
96#define	IO_BT0		0x330		/* bustek 742a default addr. */
97#define	IO_AHA0		0x330		/* adaptec 1542 default addr. */
98#define	IO_UHA0		0x330		/* ultrastore 14f default addr. */
99#define	IO_BT1		0x334		/* bustek 742a default addr. */
100#define	IO_AHA1		0x334		/* adaptec 1542 default addr. */
101					/* 0x338 - 0x36F Open */
102
103#define IO_FD2		0x370		/* secondary base i/o address */
104#define IO_LPT1		0x378		/* Parallel Port #1 */
105
106					/* 0x380 - 0x3AF Open */
107
108#define IO_MDA		0x3B0		/* Monochome Adapter */
109#define IO_LPT3		0x3BC		/* Monochome Adapter Printer Port */
110#define IO_VGA		0x3C0		/* E/VGA Ports */
111#define IO_CGA		0x3D0		/* CGA Ports */
112
113					/* 0x3E0 - 0x3E7 Open */
114
115#define	IO_COM3		0x3e8		/* COM3 i/o address */
116#define IO_FD1		0x3f0		/* primary base i/o address */
117#define IO_COM1		0x3f8		/* COM1 i/o address */
118
119#define	IO_ISAEND	0x3FF		/* - 0x3FF End of I/O Registers */
120#endif	IO_ISABEGIN
121
122/*
123 * Input / Output Port Sizes - these are from several sources, and tend
124 * to be the larger of what was found, ie COM ports can be 4, but some
125 * boards do not fully decode the address, thus 8 ports are used.
126 */
127
128#ifndef	IO_ISASIZES
129#define	IO_ISASIZES
130
131#define	IO_COMSIZE	8		/* 8250, 16X50 com controllers (4?) */
132#define	IO_CGASIZE	16		/* CGA controllers */
133#define	IO_DMASIZE	16		/* 8237 DMA controllers */
134#define	IO_DPGSIZE	32		/* 74LS612 DMA page reisters */
135#define	IO_FDCSIZE	8		/* Nec765 floppy controllers */
136#define	IO_WDCSIZE	8		/* WD compatible disk controllers */
137#define	IO_GAMSIZE	16		/* AT compatible game controllers */
138#define	IO_ICUSIZE	16		/* 8259A interrupt controllers */
139#define	IO_KBDSIZE	16		/* 8042 Keyboard controllers */
140#define	IO_LPTSIZE	8		/* LPT controllers, some use only 4 */
141#define	IO_MDASIZE	16		/* Monochrome display controllers */
142#define	IO_RTCSIZE	16		/* CMOS real time clock, NMI control */
143#define	IO_TMRSIZE	16		/* 8253 programmable timers */
144#define	IO_NPXSIZE	16		/* 80387/80487 NPX registers */
145#define	IO_VGASIZE	16		/* VGA controllers */
146#define IO_EISASIZE	4096		/* EISA controllers */
147#define	IO_PMPSIZE	2		/* 82347 power management peripheral */
148
149#endif	/* IO_ISASIZES */
150
151/*
152 * Input / Output Memory Physical Addresses
153 */
154
155#ifndef	IOM_BEGIN
156#define	IOM_BEGIN	0x0a0000		/* Start of I/O Memory "hole" */
157#define	IOM_END		0x100000		/* End of I/O Memory "hole" */
158#define	IOM_SIZE	(IOM_END - IOM_BEGIN)
159#endif	IOM_BEGIN
160
161/*
162 * RAM Physical Address Space (ignoring the above mentioned "hole")
163 */
164
165#ifndef	RAM_BEGIN
166#define	RAM_BEGIN	0x0000000	/* Start of RAM Memory */
167#define	RAM_END		0x1000000	/* End of RAM Memory */
168#define	RAM_SIZE	(RAM_END - RAM_BEGIN)
169#endif	RAM_BEGIN
170
171/*
172 * Oddball Physical Memory Addresses
173 */
174#ifndef	COMPAQ_RAMRELOC
175#define	COMPAQ_RAMRELOC	0x80c00000	/* Compaq RAM relocation/diag */
176#define	COMPAQ_RAMSETUP	0x80c00002	/* Compaq RAM setup */
177#define	WEITEK_FPU	0xC0000000	/* WTL 2167 */
178#define	CYRIX_EMC	0xC0000000	/* Cyrix EMC */
179#endif	COMPAQ_RAMRELOC
180
181#endif /* !_I386_ISA_ISA_H_ */
182