isa.h revision 3258
133965Sjdp/*-
278828Sobrien * Copyright (c) 1990 The Regents of the University of California.
391041Sobrien * All rights reserved.
433965Sjdp *
533965Sjdp * This code is derived from software contributed to Berkeley by
633965Sjdp * William Jolitz.
733965Sjdp *
833965Sjdp * Redistribution and use in source and binary forms, with or without
933965Sjdp * modification, are permitted provided that the following conditions
1033965Sjdp * are met:
1133965Sjdp * 1. Redistributions of source code must retain the above copyright
1233965Sjdp *    notice, this list of conditions and the following disclaimer.
1333965Sjdp * 2. Redistributions in binary form must reproduce the above copyright
1433965Sjdp *    notice, this list of conditions and the following disclaimer in the
1533965Sjdp *    documentation and/or other materials provided with the distribution.
1633965Sjdp * 3. All advertising materials mentioning features or use of this software
1733965Sjdp *    must display the following acknowledgement:
1833965Sjdp *	This product includes software developed by the University of
1933965Sjdp *	California, Berkeley and its contributors.
2033965Sjdp * 4. Neither the name of the University nor the names of its contributors
2133965Sjdp *    may be used to endorse or promote products derived from this software
2233965Sjdp *    without specific prior written permission.
2333965Sjdp *
2433965Sjdp * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
2533965Sjdp * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2633965Sjdp * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2733965Sjdp * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
2833965Sjdp * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
2933965Sjdp * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
3033965Sjdp * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
3133965Sjdp * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
3233965Sjdp * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
3333965Sjdp * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
3433965Sjdp * SUCH DAMAGE.
3533965Sjdp *
3633965Sjdp *	from: @(#)isa.h	5.7 (Berkeley) 5/9/91
3777298Sobrien *	$Id: isa.h,v 1.5 1994/04/21 14:20:54 sos Exp $
3833965Sjdp */
3991041Sobrien
4091041Sobrien#ifndef _I386_ISA_ISA_H_
4133965Sjdp#define _I386_ISA_ISA_H_ 1
4291041Sobrien
4391041Sobrien/*
4433965Sjdp * ISA Bus conventions
4591041Sobrien */
4691041Sobrien
4791041Sobrien#ifndef LOCORE
4891041Sobrien#include <sys/cdefs.h>
4991041Sobrien
5091041Sobrienextern unsigned int atdevbase;	/* offset in virtual memory of ISA io mem */
5191041Sobrienunsigned char rtcin __P((int));
5291041Sobrien#endif
5333965Sjdp
5491041Sobrien
5591041Sobrien/*
5691041Sobrien * Input / Output Port Assignments
5733965Sjdp */
5891041Sobrien
5991041Sobrien#ifndef IO_BEGIN
6091041Sobrien#define	IO_ISABEGIN	0x000		/* 0x000 - Beginning of I/O Registers */
6191041Sobrien
6233965Sjdp		/* CPU Board */
6391041Sobrien#define IO_DMA1		0x000		/* 8237A DMA Controller #1 */
6491041Sobrien#define IO_ICU1		0x020		/* 8259A Interrupt Controller #1 */
6591041Sobrien#define IO_PMP1		0x026		/* 82347 Power Management Peripheral */
6633965Sjdp#define IO_TIMER1	0x040		/* 8253 Timer #1 */
6791041Sobrien#define IO_TIMER2	0x048		/* 8253 Timer #2 */
6891041Sobrien#define IO_KBD		0x060		/* 8042 Keyboard */
6991041Sobrien#define IO_PPI		0x061		/* Programmabel Peripheral Interface */
7033965Sjdp#define IO_RTC		0x070		/* RTC */
7191041Sobrien#define IO_NMI		IO_RTC		/* NMI Control */
7291041Sobrien#define IO_DMAPG	0x080		/* DMA Page Registers */
7333965Sjdp#define IO_ICU2		0x0A0		/* 8259A Interrupt Controller #2 */
7491041Sobrien#define IO_DMA2		0x0C0		/* 8237A DMA Controller #2 */
7591041Sobrien#define IO_NPX		0x0F0		/* Numeric Coprocessor */
7691041Sobrien
7733965Sjdp		/* Cards */
7891041Sobrien					/* 0x100 - 0x16F Open */
7991041Sobrien
8033965Sjdp#define IO_WD2		0x170		/* Secondary Fixed Disk Controller */
8191041Sobrien
8291041Sobrien#define IO_PMP2		0x178		/* 82347 Power Management Peripheral */
8333965Sjdp
8491041Sobrien					/* 0x17A - 0x1EF Open */
8591041Sobrien
8633965Sjdp#define IO_WD1		0x1f0		/* Primary Fixed Disk Controller */
8791041Sobrien#define IO_GAME		0x200		/* Game Controller */
8891041Sobrien
8991041Sobrien					/* 0x208 - 0x277 Open */
9091041Sobrien
9191041Sobrien#define IO_LPT2		0x278		/* Parallel Port #2 */
9291041Sobrien
9391041Sobrien					/* 0x280 - 0x2E7 Open */
9491041Sobrien
9591041Sobrien#define	IO_COM4		0x2e8		/* COM4 i/o address */
9633965Sjdp
9791041Sobrien					/* 0x2F0 - 0x2F7 Open */
9891041Sobrien
9933965Sjdp#define IO_COM2		0x2f8		/* COM2 i/o address */
10091041Sobrien					/* 0x300 - 0x32F Open */
10191041Sobrien
10291041Sobrien#define	IO_BT0		0x330		/* bustek 742a default addr. */
10391041Sobrien#define	IO_AHA0		0x330		/* adaptec 1542 default addr. */
10433965Sjdp#define	IO_UHA0		0x330		/* ultrastore 14f default addr. */
10591041Sobrien#define	IO_BT1		0x334		/* bustek 742a default addr. */
10691041Sobrien#define	IO_AHA1		0x334		/* adaptec 1542 default addr. */
10791041Sobrien					/* 0x338 - 0x36F Open */
10833965Sjdp
10991041Sobrien#define IO_FD2		0x370		/* secondary base i/o address */
11091041Sobrien#define IO_LPT1		0x378		/* Parallel Port #1 */
11133965Sjdp
11291041Sobrien					/* 0x380 - 0x3AF Open */
11391041Sobrien
11433965Sjdp#define IO_MDA		0x3B0		/* Monochome Adapter */
11591041Sobrien#define IO_LPT3		0x3BC		/* Monochome Adapter Printer Port */
11691041Sobrien#define IO_VGA		0x3C0		/* E/VGA Ports */
11733965Sjdp#define IO_CGA		0x3D0		/* CGA Ports */
11891041Sobrien
11991041Sobrien					/* 0x3E0 - 0x3E7 Open */
12033965Sjdp
12191041Sobrien#define	IO_COM3		0x3e8		/* COM3 i/o address */
12291041Sobrien#define IO_FD1		0x3f0		/* primary base i/o address */
12391041Sobrien#define IO_COM1		0x3f8		/* COM1 i/o address */
12433965Sjdp
12591041Sobrien#define	IO_ISAEND	0x3FF		/* - 0x3FF End of I/O Registers */
12691041Sobrien#endif	IO_ISABEGIN
12733965Sjdp
12891041Sobrien/*
12991041Sobrien * Input / Output Port Sizes - these are from several sources, and tend
13033965Sjdp * to be the larger of what was found, ie COM ports can be 4, but some
13191041Sobrien * boards do not fully decode the address, thus 8 ports are used.
13291041Sobrien */
13333965Sjdp
13491041Sobrien#ifndef	IO_ISASIZES
13591041Sobrien#define	IO_ISASIZES
13691041Sobrien
13791041Sobrien#define	IO_COMSIZE	8		/* 8250, 16X50 com controllers (4?) */
13891041Sobrien#define	IO_CGASIZE	16		/* CGA controllers */
13991041Sobrien#define	IO_DMASIZE	16		/* 8237 DMA controllers */
14033965Sjdp#define	IO_DPGSIZE	32		/* 74LS612 DMA page reisters */
14191041Sobrien#define	IO_FDCSIZE	8		/* Nec765 floppy controllers */
14291041Sobrien#define	IO_WDCSIZE	8		/* WD compatible disk controllers */
14333965Sjdp#define	IO_GAMSIZE	16		/* AT compatible game controllers */
14491041Sobrien#define	IO_ICUSIZE	16		/* 8259A interrupt controllers */
14591041Sobrien#define	IO_KBDSIZE	16		/* 8042 Keyboard controllers */
14691041Sobrien#define	IO_LPTSIZE	8		/* LPT controllers, some use only 4 */
14733965Sjdp#define	IO_MDASIZE	16		/* Monochrome display controllers */
14891041Sobrien#define	IO_RTCSIZE	16		/* CMOS real time clock, NMI control */
14991041Sobrien#define	IO_TMRSIZE	16		/* 8253 programmable timers */
15091041Sobrien#define	IO_NPXSIZE	16		/* 80387/80487 NPX registers */
15133965Sjdp#define	IO_VGASIZE	16		/* VGA controllers */
15233965Sjdp#define	IO_PMPSIZE	2		/* 82347 power management peripheral */
15333965Sjdp
15433965Sjdp#endif	/* IO_ISASIZES */
15533965Sjdp
15633965Sjdp/*
15733965Sjdp * Input / Output Memory Physical Addresses
15833965Sjdp */
15933965Sjdp
16033965Sjdp#ifndef	IOM_BEGIN
16133965Sjdp#define	IOM_BEGIN	0x0a0000		/* Start of I/O Memory "hole" */
16233965Sjdp#define	IOM_END		0x100000		/* End of I/O Memory "hole" */
16333965Sjdp#define	IOM_SIZE	(IOM_END - IOM_BEGIN)
16433965Sjdp#endif	IOM_BEGIN
16533965Sjdp
16633965Sjdp/*
16789857Sobrien * RAM Physical Address Space (ignoring the above mentioned "hole")
16833965Sjdp */
16960484Sobrien
17033965Sjdp#ifndef	RAM_BEGIN
17133965Sjdp#define	RAM_BEGIN	0x0000000	/* Start of RAM Memory */
17233965Sjdp#define	RAM_END		0x1000000	/* End of RAM Memory */
17333965Sjdp#define	RAM_SIZE	(RAM_END - RAM_BEGIN)
17433965Sjdp#endif	RAM_BEGIN
17533965Sjdp
17633965Sjdp/*
17733965Sjdp * Oddball Physical Memory Addresses
17833965Sjdp */
17933965Sjdp#ifndef	COMPAQ_RAMRELOC
18033965Sjdp#define	COMPAQ_RAMRELOC	0x80c00000	/* Compaq RAM relocation/diag */
18191041Sobrien#define	COMPAQ_RAMSETUP	0x80c00002	/* Compaq RAM setup */
18291041Sobrien#define	WEITEK_FPU	0xC0000000	/* WTL 2167 */
18377298Sobrien#define	CYRIX_EMC	0xC0000000	/* Cyrix EMC */
18491041Sobrien#endif	COMPAQ_RAMRELOC
18591041Sobrien#endif /* _I386_ISA_ISA_H_ */
18633965Sjdp