10Sstevel@tonic-gate/*- 20Sstevel@tonic-gate * Copyright (c) 1990 The Regents of the University of California. 30Sstevel@tonic-gate * All rights reserved. 40Sstevel@tonic-gate * 50Sstevel@tonic-gate * This code is derived from software contributed to Berkeley by 60Sstevel@tonic-gate * William Jolitz. 70Sstevel@tonic-gate * 80Sstevel@tonic-gate * Redistribution and use in source and binary forms, with or without 90Sstevel@tonic-gate * modification, are permitted provided that the following conditions 100Sstevel@tonic-gate * are met: 110Sstevel@tonic-gate * 1. Redistributions of source code must retain the above copyright 120Sstevel@tonic-gate * notice, this list of conditions and the following disclaimer. 130Sstevel@tonic-gate * 2. Redistributions in binary form must reproduce the above copyright 140Sstevel@tonic-gate * notice, this list of conditions and the following disclaimer in the 150Sstevel@tonic-gate * documentation and/or other materials provided with the distribution. 160Sstevel@tonic-gate * 4. Neither the name of the University nor the names of its contributors 170Sstevel@tonic-gate * may be used to endorse or promote products derived from this software 180Sstevel@tonic-gate * without specific prior written permission. 190Sstevel@tonic-gate * 200Sstevel@tonic-gate * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 210Sstevel@tonic-gate * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 220Sstevel@tonic-gate * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 230Sstevel@tonic-gate * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 240Sstevel@tonic-gate * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 250Sstevel@tonic-gate * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 260Sstevel@tonic-gate * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 270Sstevel@tonic-gate * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 280Sstevel@tonic-gate * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 290Sstevel@tonic-gate * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 300Sstevel@tonic-gate * SUCH DAMAGE. 310Sstevel@tonic-gate * 320Sstevel@tonic-gate * from: @(#)isa.h 5.7 (Berkeley) 5/9/91 330Sstevel@tonic-gate * $FreeBSD: releng/10.3/sys/x86/isa/isa.h 204309 2010-02-25 14:13:39Z attilio $ 340Sstevel@tonic-gate */ 350Sstevel@tonic-gate 360Sstevel@tonic-gate#ifdef PC98 370Sstevel@tonic-gate#error isa.h is included from PC-9801 source 380Sstevel@tonic-gate#endif 390Sstevel@tonic-gate 400Sstevel@tonic-gate#ifndef _X86_ISA_ISA_H_ 410Sstevel@tonic-gate#define _X86_ISA_ISA_H_ 420Sstevel@tonic-gate 430Sstevel@tonic-gate/* BEWARE: Included in both assembler and C code */ 440Sstevel@tonic-gate 450Sstevel@tonic-gate/* 460Sstevel@tonic-gate * ISA Bus conventions 470Sstevel@tonic-gate */ 480Sstevel@tonic-gate 490Sstevel@tonic-gate/* 500Sstevel@tonic-gate * Input / Output Port Assignments 510Sstevel@tonic-gate */ 520Sstevel@tonic-gate#ifndef IO_ISABEGIN 530Sstevel@tonic-gate#define IO_ISABEGIN 0x000 /* 0x000 - Beginning of I/O Registers */ 540Sstevel@tonic-gate 550Sstevel@tonic-gate /* CPU Board */ 560Sstevel@tonic-gate#define IO_ICU1 0x020 /* 8259A Interrupt Controller #1 */ 57#define IO_PMP1 0x026 /* 82347 Power Management Peripheral */ 58#define IO_KBD 0x060 /* 8042 Keyboard */ 59#define IO_RTC 0x070 /* RTC */ 60#define IO_NMI IO_RTC /* NMI Control */ 61#define IO_ICU2 0x0A0 /* 8259A Interrupt Controller #2 */ 62 63 /* Cards */ 64#define IO_VGA 0x3C0 /* E/VGA Ports */ 65#define IO_CGA 0x3D0 /* CGA Ports */ 66#define IO_MDA 0x3B0 /* Monochome Adapter */ 67 68#define IO_ISAEND 0x3FF /* End (actually Max) of I/O Regs */ 69#endif /* !IO_ISABEGIN */ 70 71/* 72 * Input / Output Port Sizes - these are from several sources, and tend 73 * to be the larger of what was found. 74 */ 75#ifndef IO_ISASIZES 76#define IO_ISASIZES 77 78#define IO_CGASIZE 12 /* CGA controllers */ 79#define IO_MDASIZE 12 /* Monochrome display controllers */ 80#define IO_VGASIZE 16 /* VGA controllers */ 81 82#endif /* !IO_ISASIZES */ 83 84/* 85 * Input / Output Memory Physical Addresses 86 */ 87#ifndef IOM_BEGIN 88#define IOM_BEGIN 0x0A0000 /* Start of I/O Memory "hole" */ 89#define IOM_END 0x100000 /* End of I/O Memory "hole" */ 90#define IOM_SIZE (IOM_END - IOM_BEGIN) 91#endif /* !IOM_BEGIN */ 92 93/* 94 * RAM Physical Address Space (ignoring the above mentioned "hole") 95 */ 96#ifndef RAM_BEGIN 97#define RAM_BEGIN 0x0000000 /* Start of RAM Memory */ 98#define RAM_END 0x1000000 /* End of RAM Memory */ 99#define RAM_SIZE (RAM_END - RAM_BEGIN) 100#endif /* !RAM_BEGIN */ 101 102#endif /* !_X86_ISA_ISA_H_ */ 103