cpufunc.h revision 178618
1/*- 2 * Copyright (c) 1998 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/powerpc/include/cpufunc.h 178618 2008-04-27 17:13:22Z marcel $ 27 */ 28 29#ifndef _MACHINE_CPUFUNC_H_ 30#define _MACHINE_CPUFUNC_H_ 31 32/* 33 * Required for user-space atomic.h includes 34 */ 35static __inline void 36powerpc_mb(void) 37{ 38 39 __asm __volatile("eieio; sync" : : : "memory"); 40} 41 42#ifdef _KERNEL 43 44#include <sys/types.h> 45 46#include <machine/psl.h> 47#include <machine/spr.h> 48 49struct thread; 50 51#ifdef KDB 52void ppc_db_trap(void); 53#endif 54 55static __inline void 56breakpoint(void) 57{ 58#ifdef KDB 59 ppc_db_trap(); 60#endif 61} 62 63/* CPU register mangling inlines */ 64 65static __inline void 66mtmsr(register_t value) 67{ 68 69 __asm __volatile ("mtmsr %0; isync" :: "r"(value)); 70} 71 72static __inline register_t 73mfmsr(void) 74{ 75 register_t value; 76 77 __asm __volatile ("mfmsr %0" : "=r"(value)); 78 79 return (value); 80} 81 82static __inline void 83mtsrin(vm_offset_t va, register_t value) 84{ 85 86 __asm __volatile ("mtsrin %0,%1" :: "r"(value), "r"(va)); 87} 88 89static __inline register_t 90mfsrin(vm_offset_t va) 91{ 92 register_t value; 93 94 __asm __volatile ("mfsrin %0,%1" : "=r"(value) : "r"(va)); 95 96 return (value); 97} 98 99static __inline void 100mtdec(register_t value) 101{ 102 103 __asm __volatile ("mtdec %0" :: "r"(value)); 104} 105 106static __inline register_t 107mfdec(void) 108{ 109 register_t value; 110 111 __asm __volatile ("mfdec %0" : "=r"(value)); 112 113 return (value); 114} 115 116static __inline register_t 117mfpvr(void) 118{ 119 register_t value; 120 121 __asm __volatile ("mfpvr %0" : "=r"(value)); 122 123 return (value); 124} 125 126static __inline void 127eieio(void) 128{ 129 130 __asm __volatile ("eieio"); 131} 132 133static __inline void 134isync(void) 135{ 136 137 __asm __volatile ("isync"); 138} 139 140static __inline register_t 141intr_disable(void) 142{ 143 register_t msr; 144 145 msr = mfmsr(); 146 mtmsr(msr & ~PSL_EE); 147 return (msr); 148} 149 150static __inline void 151intr_restore(register_t msr) 152{ 153 154 mtmsr(msr); 155} 156 157static __inline void 158restore_intr(unsigned int msr) 159{ 160 161 mtmsr(msr); 162} 163 164static __inline struct pcpu * 165powerpc_get_pcpup(void) 166{ 167 struct pcpu *ret; 168 169 __asm ("mfsprg %0, 0" : "=r"(ret)); 170 171 return(ret); 172} 173 174#endif /* _KERNEL */ 175 176#endif /* !_MACHINE_CPUFUNC_H_ */ 177