cpufunc.h revision 123352
1/*- 2 * Copyright (c) 1998 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/powerpc/include/cpufunc.h 123352 2003-12-09 13:37:31Z gallatin $ 27 */ 28 29#ifndef _MACHINE_CPUFUNC_H_ 30#define _MACHINE_CPUFUNC_H_ 31 32/* 33 * Required for user-space atomic.h includes 34 */ 35static __inline void 36powerpc_mb(void) 37{ 38 39 __asm __volatile("eieio; sync" : : : "memory"); 40} 41 42#ifdef _KERNEL 43 44#include <sys/types.h> 45 46#include <machine/psl.h> 47 48struct thread; 49 50#ifdef DDB 51void ddb_trap(void); 52#endif 53 54static __inline void 55breakpoint(void) 56{ 57#ifdef DDB 58 ddb_trap(); 59#endif 60} 61 62/* CPU register mangling inlines */ 63 64static __inline void 65mtmsr(register_t value) 66{ 67 68 __asm __volatile ("mtmsr %0" :: "r"(value)); 69} 70 71static __inline register_t 72mfmsr(void) 73{ 74 register_t value; 75 76 __asm __volatile ("mfmsr %0" : "=r"(value)); 77 78 return (value); 79} 80 81static __inline void 82mtsrin(vm_offset_t va, register_t value) 83{ 84 85 __asm __volatile ("mtsrin %0,%1" :: "r"(value), "r"(va)); 86} 87 88static __inline register_t 89mfsrin(vm_offset_t va) 90{ 91 register_t value; 92 93 __asm __volatile ("mfsrin %0,%1" : "=r"(value) : "r"(va)); 94 95 return (value); 96} 97 98static __inline void 99mtdec(register_t value) 100{ 101 102 __asm __volatile ("mtdec %0" :: "r"(value)); 103} 104 105static __inline register_t 106mfdec(void) 107{ 108 register_t value; 109 110 __asm __volatile ("mfdec %0" : "=r"(value)); 111 112 return (value); 113} 114 115static __inline register_t 116mfpvr(void) 117{ 118 register_t value; 119 120 __asm __volatile ("mfpvr %0" : "=r"(value)); 121 122 return (value); 123} 124 125static __inline void 126eieio(void) 127{ 128 129 __asm __volatile ("eieio"); 130} 131 132static __inline void 133isync(void) 134{ 135 136 __asm __volatile ("isync"); 137} 138 139static __inline register_t 140intr_disable(void) 141{ 142 register_t msr; 143 144 msr = mfmsr(); 145 mtmsr(msr & ~PSL_EE); 146 return (msr); 147} 148 149static __inline void 150intr_restore(register_t msr) 151{ 152 153 mtmsr(msr); 154} 155 156static __inline void 157restore_intr(unsigned int msr) 158{ 159 160 mtmsr(msr); 161} 162 163static __inline struct pcpu * 164powerpc_get_pcpup(void) 165{ 166 struct pcpu *ret; 167 168 __asm ("mfsprg %0, 0" : "=r"(ret)); 169 170 return(ret); 171} 172 173#endif /* _KERNEL */ 174 175#endif /* !_MACHINE_CPUFUNC_H_ */ 176