1146211Snyan/*- 2146211Snyan * Copyright (C) 2005 TAKAHASHI Yoshihiro. All rights reserved. 3146211Snyan * 4146211Snyan * Redistribution and use in source and binary forms, with or without 5146211Snyan * modification, are permitted provided that the following conditions 6146211Snyan * are met: 7146211Snyan * 1. Redistributions of source code must retain the above copyright 8146211Snyan * notice, this list of conditions and the following disclaimer. 9146211Snyan * 2. Redistributions in binary form must reproduce the above copyright 10146211Snyan * notice, this list of conditions and the following disclaimer in the 11146211Snyan * documentation and/or other materials provided with the distribution. 12146211Snyan * 13146211Snyan * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14146211Snyan * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15146211Snyan * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16146211Snyan * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17146211Snyan * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18146211Snyan * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19146211Snyan * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20146211Snyan * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21146211Snyan * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22146211Snyan * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23146211Snyan * SUCH DAMAGE. 24146211Snyan * 25146211Snyan * $FreeBSD: releng/10.3/sys/pc98/include/ppireg.h 146211 2005-05-14 09:10:02Z nyan $ 26146211Snyan */ 27146211Snyan 28146211Snyan#ifndef _MACHINE_PPIREG_H_ 29146211Snyan#define _MACHINE_PPIREG_H_ 30146211Snyan 31146211Snyan#ifdef _KERNEL 32146211Snyan 33146211Snyan#define IO_PPI 0x35 /* Programmable Peripheral Interface */ 34146211Snyan 35146211Snyan/* 36146211Snyan * PPI speaker control values 37146211Snyan */ 38146211Snyan 39146211Snyan#define PIT_ENABLETMR1 0x08 /* Enable timer/counter 1 */ 40146211Snyan 41146211Snyan#define PIT_SPKR (PIT_ENABLETMR1) 42146211Snyan 43146211Snyan#define ppi_spkr_on() outb(IO_PPI, inb(IO_PPI) & ~PIT_SPKR) 44146211Snyan#define ppi_spkr_off() outb(IO_PPI, inb(IO_PPI) | PIT_SPKR) 45146211Snyan 46146211Snyan#endif /* _KERNEL */ 47146211Snyan 48146211Snyan#endif /* _MACHINE_PPIREG_H_ */ 49