pcrtc.c revision 170289
1/*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz and Don Ahn. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 4. Neither the name of the University nor the names of its contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 33 */ 34 35#include <sys/cdefs.h> 36__FBSDID("$FreeBSD: head/sys/pc98/cbus/pcrtc.c 170289 2007-06-04 18:25:08Z dwmalone $"); 37 38/* 39 * Routines to handle clock hardware. 40 */ 41 42/* 43 * inittodr, settodr and support routines written 44 * by Christoph Robitschko <chmr@edvz.tu-graz.ac.at> 45 * 46 * reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94 47 */ 48 49/* 50 * modified for PC98 by Kakefuda 51 */ 52 53#include "opt_apic.h" 54#include "opt_clock.h" 55#include "opt_isa.h" 56#include "opt_mca.h" 57 58#include <sys/param.h> 59#include <sys/systm.h> 60#include <sys/bus.h> 61#include <sys/clock.h> 62#include <sys/lock.h> 63#include <sys/kdb.h> 64#include <sys/mutex.h> 65#include <sys/proc.h> 66#include <sys/time.h> 67#include <sys/timetc.h> 68#include <sys/kernel.h> 69#include <sys/limits.h> 70#include <sys/module.h> 71#include <sys/sysctl.h> 72#include <sys/cons.h> 73#include <sys/power.h> 74 75#include <machine/clock.h> 76#include <machine/cpu.h> 77#include <machine/cputypes.h> 78#include <machine/frame.h> 79#include <machine/intr_machdep.h> 80#include <machine/md_var.h> 81#include <machine/psl.h> 82#ifdef DEV_APIC 83#include <machine/apicvar.h> 84#endif 85#include <machine/specialreg.h> 86#include <machine/ppireg.h> 87#include <machine/timerreg.h> 88 89#include <i386/isa/icu.h> 90#include <pc98/cbus/cbus.h> 91#include <pc98/pc98/pc98_machdep.h> 92#ifdef DEV_ISA 93#include <isa/isavar.h> 94#endif 95 96#define TIMER_DIV(x) ((timer_freq + (x) / 2) / (x)) 97 98int clkintr_pending; 99int pscnt = 1; 100int psdiv = 1; 101int statclock_disable; 102#ifndef TIMER_FREQ 103#define TIMER_FREQ 2457600 104#endif 105u_int timer_freq = TIMER_FREQ; 106int timer0_max_count; 107int timer0_real_max_count; 108 109static int beeping = 0; 110static struct mtx clock_lock; 111static struct intsrc *i8254_intsrc; 112static u_int32_t i8254_lastcount; 113static u_int32_t i8254_offset; 114static int (*i8254_pending)(struct intsrc *); 115static int i8254_ticked; 116static int using_lapic_timer; 117 118/* Values for timerX_state: */ 119#define RELEASED 0 120#define RELEASE_PENDING 1 121#define ACQUIRED 2 122#define ACQUIRE_PENDING 3 123 124static u_char timer1_state; 125static u_char timer2_state; 126static void rtc_serialcombit(int); 127static void rtc_serialcom(int); 128static int rtc_inb(void); 129static void rtc_outb(int); 130 131static unsigned i8254_get_timecount(struct timecounter *tc); 132static unsigned i8254_simple_get_timecount(struct timecounter *tc); 133static void set_timer_freq(u_int freq, int intr_freq); 134 135static struct timecounter i8254_timecounter = { 136 i8254_get_timecount, /* get_timecount */ 137 0, /* no poll_pps */ 138 ~0u, /* counter_mask */ 139 0, /* frequency */ 140 "i8254", /* name */ 141 0 /* quality */ 142}; 143 144static int 145clkintr(struct trapframe *frame) 146{ 147 148 if (timecounter->tc_get_timecount == i8254_get_timecount) { 149 mtx_lock_spin(&clock_lock); 150 if (i8254_ticked) 151 i8254_ticked = 0; 152 else { 153 i8254_offset += timer0_max_count; 154 i8254_lastcount = 0; 155 } 156 clkintr_pending = 0; 157 mtx_unlock_spin(&clock_lock); 158 } 159 KASSERT(!using_lapic_timer, ("clk interrupt enabled with lapic timer")); 160 hardclock(TRAPF_USERMODE(frame), TRAPF_PC(frame)); 161 return (FILTER_HANDLED); 162} 163 164int 165acquire_timer1(int mode) 166{ 167 168 if (timer1_state != RELEASED) 169 return (-1); 170 timer1_state = ACQUIRED; 171 172 /* 173 * This access to the timer registers is as atomic as possible 174 * because it is a single instruction. We could do better if we 175 * knew the rate. Use of splclock() limits glitches to 10-100us, 176 * and this is probably good enough for timer2, so we aren't as 177 * careful with it as with timer0. 178 */ 179 outb(TIMER_MODE, TIMER_SEL1 | (mode & 0x3f)); 180 181 return (0); 182} 183 184int 185acquire_timer2(int mode) 186{ 187 188 if (timer2_state != RELEASED) 189 return (-1); 190 timer2_state = ACQUIRED; 191 192 /* 193 * This access to the timer registers is as atomic as possible 194 * because it is a single instruction. We could do better if we 195 * knew the rate. Use of splclock() limits glitches to 10-100us, 196 * and this is probably good enough for timer2, so we aren't as 197 * careful with it as with timer0. 198 */ 199 outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f)); 200 201 return (0); 202} 203 204int 205release_timer1() 206{ 207 208 if (timer1_state != ACQUIRED) 209 return (-1); 210 timer1_state = RELEASED; 211 outb(TIMER_MODE, TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT); 212 return (0); 213} 214 215int 216release_timer2() 217{ 218 219 if (timer2_state != ACQUIRED) 220 return (-1); 221 timer2_state = RELEASED; 222 outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT); 223 return (0); 224} 225 226 227static int 228getit(void) 229{ 230 int high, low; 231 232 mtx_lock_spin(&clock_lock); 233 234 /* Select timer0 and latch counter value. */ 235 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 236 237 low = inb(TIMER_CNTR0); 238 high = inb(TIMER_CNTR0); 239 240 mtx_unlock_spin(&clock_lock); 241 return ((high << 8) | low); 242} 243 244/* 245 * Wait "n" microseconds. 246 * Relies on timer 1 counting down from (timer_freq / hz) 247 * Note: timer had better have been programmed before this is first used! 248 */ 249void 250DELAY(int n) 251{ 252 int delta, prev_tick, tick, ticks_left; 253 254#ifdef DELAYDEBUG 255 int getit_calls = 1; 256 int n1; 257 static int state = 0; 258 259 if (state == 0) { 260 state = 1; 261 for (n1 = 1; n1 <= 10000000; n1 *= 10) 262 DELAY(n1); 263 state = 2; 264 } 265 if (state == 1) 266 printf("DELAY(%d)...", n); 267#endif 268 /* 269 * Read the counter first, so that the rest of the setup overhead is 270 * counted. Guess the initial overhead is 20 usec (on most systems it 271 * takes about 1.5 usec for each of the i/o's in getit(). The loop 272 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The 273 * multiplications and divisions to scale the count take a while). 274 * 275 * However, if ddb is active then use a fake counter since reading 276 * the i8254 counter involves acquiring a lock. ddb must not do 277 * locking for many reasons, but it calls here for at least atkbd 278 * input. 279 */ 280#ifdef KDB 281 if (kdb_active) 282 prev_tick = 1; 283 else 284#endif 285 prev_tick = getit(); 286 n -= 0; /* XXX actually guess no initial overhead */ 287 /* 288 * Calculate (n * (timer_freq / 1e6)) without using floating point 289 * and without any avoidable overflows. 290 */ 291 if (n <= 0) 292 ticks_left = 0; 293 else if (n < 256) 294 /* 295 * Use fixed point to avoid a slow division by 1000000. 296 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest. 297 * 2^15 is the first power of 2 that gives exact results 298 * for n between 0 and 256. 299 */ 300 ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15; 301 else 302 /* 303 * Don't bother using fixed point, although gcc-2.7.2 304 * generates particularly poor code for the long long 305 * division, since even the slow way will complete long 306 * before the delay is up (unless we're interrupted). 307 */ 308 ticks_left = ((u_int)n * (long long)timer_freq + 999999) 309 / 1000000; 310 311 while (ticks_left > 0) { 312#ifdef KDB 313 if (kdb_active) { 314 outb(0x5f, 0); 315 tick = prev_tick - 1; 316 if (tick <= 0) 317 tick = timer0_max_count; 318 } else 319#endif 320 tick = getit(); 321#ifdef DELAYDEBUG 322 ++getit_calls; 323#endif 324 delta = prev_tick - tick; 325 prev_tick = tick; 326 if (delta < 0) { 327 delta += timer0_max_count; 328 /* 329 * Guard against timer0_max_count being wrong. 330 * This shouldn't happen in normal operation, 331 * but it may happen if set_timer_freq() is 332 * traced. 333 */ 334 if (delta < 0) 335 delta = 0; 336 } 337 ticks_left -= delta; 338 } 339#ifdef DELAYDEBUG 340 if (state == 1) 341 printf(" %d calls to getit() at %d usec each\n", 342 getit_calls, (n + 5) / getit_calls); 343#endif 344} 345 346static void 347sysbeepstop(void *chan) 348{ 349 ppi_spkr_off(); /* disable counter1 output to speaker */ 350 timer_spkr_release(); 351 beeping = 0; 352} 353 354int 355sysbeep(int pitch, int period) 356{ 357 int x = splclock(); 358 359 if (timer_spkr_acquire()) 360 if (!beeping) { 361 /* Something else owns it. */ 362 splx(x); 363 return (-1); /* XXX Should be EBUSY, but nobody cares anyway. */ 364 } 365 mtx_lock_spin(&clock_lock); 366 spkr_set_pitch(pitch); 367 mtx_unlock_spin(&clock_lock); 368 if (!beeping) { 369 /* enable counter1 output to speaker */ 370 ppi_spkr_on(); 371 beeping = period; 372 timeout(sysbeepstop, (void *)NULL, period); 373 } 374 splx(x); 375 return (0); 376} 377 378static u_int 379calibrate_clocks(void) 380{ 381 int timeout; 382 u_int count, prev_count, tot_count; 383 u_short sec, start_sec; 384 385 if (bootverbose) 386 printf("Calibrating clock(s) ... "); 387 /* Check ARTIC. */ 388 if (!(PC98_SYSTEM_PARAMETER(0x458) & 0x80) && 389 !(PC98_SYSTEM_PARAMETER(0x45b) & 0x04)) 390 goto fail; 391 timeout = 100000000; 392 393 /* Read the ARTIC. */ 394 sec = inw(0x5e); 395 396 /* Wait for the ARTIC to changes. */ 397 start_sec = sec; 398 for (;;) { 399 sec = inw(0x5e); 400 if (sec != start_sec) 401 break; 402 if (--timeout == 0) 403 goto fail; 404 } 405 406 /* Start keeping track of the i8254 counter. */ 407 prev_count = getit(); 408 if (prev_count == 0 || prev_count > timer0_max_count) 409 goto fail; 410 tot_count = 0; 411 412 start_sec = sec; 413 for (;;) { 414 sec = inw(0x5e); 415 count = getit(); 416 if (count == 0 || count > timer0_max_count) 417 goto fail; 418 if (count > prev_count) 419 tot_count += prev_count - (count - timer0_max_count); 420 else 421 tot_count += prev_count - count; 422 prev_count = count; 423 if ((sec == start_sec + 1200) || /* 1200 = 307.2KHz >> 8 */ 424 (sec < start_sec && 425 (u_int)sec + 0x10000 == (u_int)start_sec + 1200)) 426 break; 427 if (--timeout == 0) 428 goto fail; 429 } 430 431 if (bootverbose) { 432 printf("i8254 clock: %u Hz\n", tot_count); 433 } 434 return (tot_count); 435 436fail: 437 if (bootverbose) 438 printf("failed, using default i8254 clock of %u Hz\n", 439 timer_freq); 440 return (timer_freq); 441} 442 443static void 444set_timer_freq(u_int freq, int intr_freq) 445{ 446 int new_timer0_real_max_count; 447 448 i8254_timecounter.tc_frequency = freq; 449 mtx_lock_spin(&clock_lock); 450 timer_freq = freq; 451 if (using_lapic_timer) 452 new_timer0_real_max_count = 0x10000; 453 else 454 new_timer0_real_max_count = TIMER_DIV(intr_freq); 455 if (new_timer0_real_max_count != timer0_real_max_count) { 456 timer0_real_max_count = new_timer0_real_max_count; 457 if (timer0_real_max_count == 0x10000) 458 timer0_max_count = 0xffff; 459 else 460 timer0_max_count = timer0_real_max_count; 461 outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT); 462 outb(TIMER_CNTR0, timer0_real_max_count & 0xff); 463 outb(TIMER_CNTR0, timer0_real_max_count >> 8); 464 } 465 mtx_unlock_spin(&clock_lock); 466} 467 468static void 469i8254_restore(void) 470{ 471 472 mtx_lock_spin(&clock_lock); 473 outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT); 474 outb(TIMER_CNTR0, timer0_real_max_count & 0xff); 475 outb(TIMER_CNTR0, timer0_real_max_count >> 8); 476 mtx_unlock_spin(&clock_lock); 477} 478 479 480/* 481 * Restore all the timers non-atomically (XXX: should be atomically). 482 * 483 * This function is called from pmtimer_resume() to restore all the timers. 484 * This should not be necessary, but there are broken laptops that do not 485 * restore all the timers on resume. 486 */ 487void 488timer_restore(void) 489{ 490 491 i8254_restore(); /* restore timer_freq and hz */ 492} 493 494/* This is separate from startrtclock() so that it can be called early. */ 495void 496i8254_init(void) 497{ 498 499 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE); 500 501 if (pc98_machine_type & M_8M) 502 timer_freq = 1996800L; /* 1.9968 MHz */ 503 else 504 timer_freq = 2457600L; /* 2.4576 MHz */ 505 506 set_timer_freq(timer_freq, hz); 507} 508 509void 510startrtclock() 511{ 512 u_int delta, freq; 513 514 freq = calibrate_clocks(); 515#ifdef CLK_CALIBRATION_LOOP 516 if (bootverbose) { 517 printf( 518 "Press a key on the console to abort clock calibration\n"); 519 while (cncheckc() == -1) 520 calibrate_clocks(); 521 } 522#endif 523 524 /* 525 * Use the calibrated i8254 frequency if it seems reasonable. 526 * Otherwise use the default, and don't use the calibrated i586 527 * frequency. 528 */ 529 delta = freq > timer_freq ? freq - timer_freq : timer_freq - freq; 530 if (delta < timer_freq / 100) { 531#ifndef CLK_USE_I8254_CALIBRATION 532 if (bootverbose) 533 printf( 534"CLK_USE_I8254_CALIBRATION not specified - using default frequency\n"); 535 freq = timer_freq; 536#endif 537 timer_freq = freq; 538 } else { 539 if (bootverbose) 540 printf( 541 "%d Hz differs from default of %d Hz by more than 1%%\n", 542 freq, timer_freq); 543 } 544 545 set_timer_freq(timer_freq, hz); 546 tc_init(&i8254_timecounter); 547 548 init_TSC(); 549} 550 551static void 552rtc_serialcombit(int i) 553{ 554 outb(IO_RTC, ((i&0x01)<<5)|0x07); 555 DELAY(1); 556 outb(IO_RTC, ((i&0x01)<<5)|0x17); 557 DELAY(1); 558 outb(IO_RTC, ((i&0x01)<<5)|0x07); 559 DELAY(1); 560} 561 562static void 563rtc_serialcom(int i) 564{ 565 rtc_serialcombit(i&0x01); 566 rtc_serialcombit((i&0x02)>>1); 567 rtc_serialcombit((i&0x04)>>2); 568 rtc_serialcombit((i&0x08)>>3); 569 outb(IO_RTC, 0x07); 570 DELAY(1); 571 outb(IO_RTC, 0x0f); 572 DELAY(1); 573 outb(IO_RTC, 0x07); 574 DELAY(1); 575} 576 577static void 578rtc_outb(int val) 579{ 580 int s; 581 int sa = 0; 582 583 for (s=0;s<8;s++) { 584 sa = ((val >> s) & 0x01) ? 0x27 : 0x07; 585 outb(IO_RTC, sa); /* set DI & CLK 0 */ 586 DELAY(1); 587 outb(IO_RTC, sa | 0x10); /* CLK 1 */ 588 DELAY(1); 589 } 590 outb(IO_RTC, sa & 0xef); /* CLK 0 */ 591} 592 593static int 594rtc_inb(void) 595{ 596 int s; 597 int sa = 0; 598 599 for (s=0;s<8;s++) { 600 sa |= ((inb(0x33) & 0x01) << s); 601 outb(IO_RTC, 0x17); /* CLK 1 */ 602 DELAY(1); 603 outb(IO_RTC, 0x07); /* CLK 0 */ 604 DELAY(2); 605 } 606 return sa; 607} 608 609/* 610 * Initialize the time of day register, based on the time base which is, e.g. 611 * from a filesystem. 612 */ 613void 614inittodr(time_t base) 615{ 616 struct timespec ts; 617 struct clocktime ct; 618 int i; 619 620 if (base) { 621 ts.tv_sec = base; 622 ts.tv_nsec = 0; 623 tc_setclock(&ts); 624 } 625 626 rtc_serialcom(0x03); /* Time Read */ 627 rtc_serialcom(0x01); /* Register shift command. */ 628 DELAY(20); 629 630 ct.nsec = 0; 631 ct.sec = bcd2bin(rtc_inb() & 0xff); /* sec */ 632 ct.min = bcd2bin(rtc_inb() & 0xff); /* min */ 633 ct.hour = bcd2bin(rtc_inb() & 0xff); /* hour */ 634 ct.day = bcd2bin(rtc_inb() & 0xff); /* date */ 635 i = rtc_inb(); 636 ct.dow = i & 0x0f; /* dow */ 637 ct.mon = (i >> 4) & 0x0f; /* month */ 638 ct.year = bcd2bin(rtc_inb() & 0xff) + 1900; /* year */ 639 if (ct.year < 1995) 640 ct.year += 100; 641 clock_ct_to_ts(&ct, &ts); 642 ts.tv_sec += utc_offset(); 643 tc_setclock(&ts); 644} 645 646/* 647 * Write system time back to RTC 648 */ 649void 650resettodr() 651{ 652 struct timespec ts; 653 struct clocktime ct; 654 655 if (disable_rtc_set) 656 return; 657 658 getnanotime(&ts); 659 ts.tv_sec -= utc_offset(); 660 clock_ts_to_ct(&ts, &ct); 661 662 rtc_serialcom(0x01); /* Register shift command. */ 663 664 rtc_outb(bin2bcd(ct.sec)); /* Write back Seconds */ 665 rtc_outb(bin2bcd(ct.min)); /* Write back Minutes */ 666 rtc_outb(bin2bcd(ct.hour)); /* Write back Hours */ 667 668 rtc_outb(bin2bcd(ct.day)); /* Write back Day */ 669 rtc_outb((ct.mon << 4) | ct.dow); /* Write back Month and DOW */ 670 rtc_outb(bin2bcd(ct.year % 100)); /* Write back Year */ 671 672 rtc_serialcom(0x02); /* Time set & Counter hold command. */ 673 rtc_serialcom(0x00); /* Register hold command. */ 674} 675 676 677/* 678 * Start both clocks running. 679 */ 680void 681cpu_initclocks() 682{ 683 684#ifdef DEV_APIC 685 using_lapic_timer = lapic_setup_clock(); 686#endif 687 /* 688 * If we aren't using the local APIC timer to drive the kernel 689 * clocks, setup the interrupt handler for the 8254 timer 0 so 690 * that it can drive hardclock(). Otherwise, change the 8254 691 * timecounter to user a simpler algorithm. 692 */ 693 if (!using_lapic_timer) { 694 intr_add_handler("clk", 0, (driver_filter_t *)clkintr, NULL, 695 NULL, INTR_TYPE_CLK, NULL); 696 i8254_intsrc = intr_lookup_source(0); 697 if (i8254_intsrc != NULL) 698 i8254_pending = 699 i8254_intsrc->is_pic->pic_source_pending; 700 } else { 701 i8254_timecounter.tc_get_timecount = 702 i8254_simple_get_timecount; 703 i8254_timecounter.tc_counter_mask = 0xffff; 704 set_timer_freq(timer_freq, hz); 705 } 706 707 init_TSC_tc(); 708} 709 710void 711cpu_startprofclock(void) 712{ 713} 714 715void 716cpu_stopprofclock(void) 717{ 718} 719 720static int 721sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS) 722{ 723 int error; 724 u_int freq; 725 726 /* 727 * Use `i8254' instead of `timer' in external names because `timer' 728 * is is too generic. Should use it everywhere. 729 */ 730 freq = timer_freq; 731 error = sysctl_handle_int(oidp, &freq, 0, req); 732 if (error == 0 && req->newptr != NULL) 733 set_timer_freq(freq, hz); 734 return (error); 735} 736 737SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW, 738 0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", ""); 739 740static unsigned 741i8254_simple_get_timecount(struct timecounter *tc) 742{ 743 744 return (timer0_max_count - getit()); 745} 746 747static unsigned 748i8254_get_timecount(struct timecounter *tc) 749{ 750 u_int count; 751 u_int high, low; 752 u_int eflags; 753 754 eflags = read_eflags(); 755 mtx_lock_spin(&clock_lock); 756 757 /* Select timer0 and latch counter value. */ 758 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 759 760 low = inb(TIMER_CNTR0); 761 high = inb(TIMER_CNTR0); 762 count = timer0_max_count - ((high << 8) | low); 763 if (count < i8254_lastcount || 764 (!i8254_ticked && (clkintr_pending || 765 ((count < 20 || (!(eflags & PSL_I) && count < timer0_max_count / 2u)) && 766 i8254_pending != NULL && i8254_pending(i8254_intsrc))))) { 767 i8254_ticked = 1; 768 i8254_offset += timer0_max_count; 769 } 770 i8254_lastcount = count; 771 count += i8254_offset; 772 mtx_unlock_spin(&clock_lock); 773 return (count); 774} 775 776#ifdef DEV_ISA 777/* 778 * Attach to the ISA PnP descriptors for the timer and realtime clock. 779 */ 780static struct isa_pnp_id attimer_ids[] = { 781 { 0x0001d041 /* PNP0100 */, "AT timer" }, 782 { 0x000bd041 /* PNP0B00 */, "AT realtime clock" }, 783 { 0 } 784}; 785 786static int 787attimer_probe(device_t dev) 788{ 789 int result; 790 791 if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids)) <= 0) 792 device_quiet(dev); 793 return(result); 794} 795 796static int 797attimer_attach(device_t dev) 798{ 799 return(0); 800} 801 802static device_method_t attimer_methods[] = { 803 /* Device interface */ 804 DEVMETHOD(device_probe, attimer_probe), 805 DEVMETHOD(device_attach, attimer_attach), 806 DEVMETHOD(device_detach, bus_generic_detach), 807 DEVMETHOD(device_shutdown, bus_generic_shutdown), 808 DEVMETHOD(device_suspend, bus_generic_suspend), /* XXX stop statclock? */ 809 DEVMETHOD(device_resume, bus_generic_resume), /* XXX restart statclock? */ 810 { 0, 0 } 811}; 812 813static driver_t attimer_driver = { 814 "attimer", 815 attimer_methods, 816 1, /* no softc */ 817}; 818 819static devclass_t attimer_devclass; 820 821DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0); 822#endif /* DEV_ISA */ 823