pcrtc.c revision 167193 
1/*-
2 * Copyright (c) 1990 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz and Don Ahn.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 *    may be used to endorse or promote products derived from this software
18 *    without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 *	from: @(#)clock.c	7.2 (Berkeley) 5/12/91
33 */
34
35#include <sys/cdefs.h>
36__FBSDID("$FreeBSD: head/sys/pc98/cbus/pcrtc.c 167193 2007-03-04 04:59:39Z nyan $");
37
38/*
39 * Routines to handle clock hardware.
40 */
41
42/*
43 * inittodr, settodr and support routines written
44 * by Christoph Robitschko <chmr@edvz.tu-graz.ac.at>
45 *
46 * reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94
47 */
48
49/*
50 * modified for PC98 by Kakefuda
51 */
52
53#include "opt_apic.h"
54#include "opt_clock.h"
55#include "opt_isa.h"
56#include "opt_mca.h"
57
58#include <sys/param.h>
59#include <sys/systm.h>
60#include <sys/bus.h>
61#include <sys/clock.h>
62#include <sys/lock.h>
63#include <sys/kdb.h>
64#include <sys/mutex.h>
65#include <sys/proc.h>
66#include <sys/time.h>
67#include <sys/timetc.h>
68#include <sys/kernel.h>
69#include <sys/limits.h>
70#include <sys/module.h>
71#include <sys/sysctl.h>
72#include <sys/cons.h>
73#include <sys/power.h>
74
75#include <machine/clock.h>
76#include <machine/cpu.h>
77#include <machine/cputypes.h>
78#include <machine/frame.h>
79#include <machine/intr_machdep.h>
80#include <machine/md_var.h>
81#include <machine/psl.h>
82#ifdef DEV_APIC
83#include <machine/apicvar.h>
84#endif
85#include <machine/specialreg.h>
86#include <machine/ppireg.h>
87#include <machine/timerreg.h>
88
89#include <i386/isa/icu.h>
90#include <pc98/cbus/cbus.h>
91#include <pc98/pc98/pc98_machdep.h>
92#ifdef DEV_ISA
93#include <isa/isavar.h>
94#endif
95
96#define	TIMER_DIV(x) ((timer_freq + (x) / 2) / (x))
97
98int	clkintr_pending;
99int	pscnt = 1;
100int	psdiv = 1;
101int	statclock_disable;
102#ifndef TIMER_FREQ
103#define TIMER_FREQ   2457600
104#endif
105u_int	timer_freq = TIMER_FREQ;
106int	timer0_max_count;
107int	timer0_real_max_count;
108
109static	int	beeping = 0;
110static	struct mtx clock_lock;
111static	struct intsrc *i8254_intsrc;
112static	u_int32_t i8254_lastcount;
113static	u_int32_t i8254_offset;
114static	int	(*i8254_pending)(struct intsrc *);
115static	int	i8254_ticked;
116static	int	using_lapic_timer;
117
118/* Values for timerX_state: */
119#define	RELEASED	0
120#define	RELEASE_PENDING	1
121#define	ACQUIRED	2
122#define	ACQUIRE_PENDING	3
123
124static	u_char	timer1_state;
125static	u_char	timer2_state;
126static void rtc_serialcombit(int);
127static void rtc_serialcom(int);
128static int rtc_inb(void);
129static void rtc_outb(int);
130
131static	unsigned i8254_get_timecount(struct timecounter *tc);
132static	unsigned i8254_simple_get_timecount(struct timecounter *tc);
133static	void	set_timer_freq(u_int freq, int intr_freq);
134
135static struct timecounter i8254_timecounter = {
136	i8254_get_timecount,	/* get_timecount */
137	0,			/* no poll_pps */
138	~0u,			/* counter_mask */
139	0,			/* frequency */
140	"i8254",		/* name */
141	0			/* quality */
142};
143
144static int
145clkintr(struct trapframe *frame)
146{
147
148	if (timecounter->tc_get_timecount == i8254_get_timecount) {
149		mtx_lock_spin(&clock_lock);
150		if (i8254_ticked)
151			i8254_ticked = 0;
152		else {
153			i8254_offset += timer0_max_count;
154			i8254_lastcount = 0;
155		}
156		clkintr_pending = 0;
157		mtx_unlock_spin(&clock_lock);
158	}
159	KASSERT(!using_lapic_timer, ("clk interrupt enabled with lapic timer"));
160	hardclock(TRAPF_USERMODE(frame), TRAPF_PC(frame));
161	return (FILTER_HANDLED);
162}
163
164int
165acquire_timer1(int mode)
166{
167
168	if (timer1_state != RELEASED)
169		return (-1);
170	timer1_state = ACQUIRED;
171
172	/*
173	 * This access to the timer registers is as atomic as possible
174	 * because it is a single instruction.  We could do better if we
175	 * knew the rate.  Use of splclock() limits glitches to 10-100us,
176	 * and this is probably good enough for timer2, so we aren't as
177	 * careful with it as with timer0.
178	 */
179	outb(TIMER_MODE, TIMER_SEL1 | (mode & 0x3f));
180
181	return (0);
182}
183
184int
185acquire_timer2(int mode)
186{
187
188	if (timer2_state != RELEASED)
189		return (-1);
190	timer2_state = ACQUIRED;
191
192	/*
193	 * This access to the timer registers is as atomic as possible
194	 * because it is a single instruction.  We could do better if we
195	 * knew the rate.  Use of splclock() limits glitches to 10-100us,
196	 * and this is probably good enough for timer2, so we aren't as
197	 * careful with it as with timer0.
198	 */
199	outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
200
201	return (0);
202}
203
204int
205release_timer1()
206{
207
208	if (timer1_state != ACQUIRED)
209		return (-1);
210	timer1_state = RELEASED;
211	outb(TIMER_MODE, TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT);
212	return (0);
213}
214
215int
216release_timer2()
217{
218
219	if (timer2_state != ACQUIRED)
220		return (-1);
221	timer2_state = RELEASED;
222	outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
223	return (0);
224}
225
226
227static int
228getit(void)
229{
230	int high, low;
231
232	mtx_lock_spin(&clock_lock);
233
234	/* Select timer0 and latch counter value. */
235	outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
236
237	low = inb(TIMER_CNTR0);
238	high = inb(TIMER_CNTR0);
239
240	mtx_unlock_spin(&clock_lock);
241	return ((high << 8) | low);
242}
243
244/*
245 * Wait "n" microseconds.
246 * Relies on timer 1 counting down from (timer_freq / hz)
247 * Note: timer had better have been programmed before this is first used!
248 */
249void
250DELAY(int n)
251{
252	int delta, prev_tick, tick, ticks_left;
253
254#ifdef DELAYDEBUG
255	int getit_calls = 1;
256	int n1;
257	static int state = 0;
258
259	if (state == 0) {
260		state = 1;
261		for (n1 = 1; n1 <= 10000000; n1 *= 10)
262			DELAY(n1);
263		state = 2;
264	}
265	if (state == 1)
266		printf("DELAY(%d)...", n);
267#endif
268	/*
269	 * Read the counter first, so that the rest of the setup overhead is
270	 * counted.  Guess the initial overhead is 20 usec (on most systems it
271	 * takes about 1.5 usec for each of the i/o's in getit().  The loop
272	 * takes about 6 usec on a 486/33 and 13 usec on a 386/20.  The
273	 * multiplications and divisions to scale the count take a while).
274	 *
275	 * However, if ddb is active then use a fake counter since reading
276	 * the i8254 counter involves acquiring a lock.  ddb must not do
277	 * locking for many reasons, but it calls here for at least atkbd
278	 * input.
279	 */
280#ifdef KDB
281	if (kdb_active)
282		prev_tick = 1;
283	else
284#endif
285		prev_tick = getit();
286	n -= 0;			/* XXX actually guess no initial overhead */
287	/*
288	 * Calculate (n * (timer_freq / 1e6)) without using floating point
289	 * and without any avoidable overflows.
290	 */
291	if (n <= 0)
292		ticks_left = 0;
293	else if (n < 256)
294		/*
295		 * Use fixed point to avoid a slow division by 1000000.
296		 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest.
297		 * 2^15 is the first power of 2 that gives exact results
298		 * for n between 0 and 256.
299		 */
300		ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15;
301	else
302		/*
303		 * Don't bother using fixed point, although gcc-2.7.2
304		 * generates particularly poor code for the long long
305		 * division, since even the slow way will complete long
306		 * before the delay is up (unless we're interrupted).
307		 */
308		ticks_left = ((u_int)n * (long long)timer_freq + 999999)
309			     / 1000000;
310
311	while (ticks_left > 0) {
312#ifdef KDB
313		if (kdb_active) {
314			outb(0x5f, 0);
315			tick = prev_tick - 1;
316			if (tick <= 0)
317				tick = timer0_max_count;
318		} else
319#endif
320			tick = getit();
321#ifdef DELAYDEBUG
322		++getit_calls;
323#endif
324		delta = prev_tick - tick;
325		prev_tick = tick;
326		if (delta < 0) {
327			delta += timer0_max_count;
328			/*
329			 * Guard against timer0_max_count being wrong.
330			 * This shouldn't happen in normal operation,
331			 * but it may happen if set_timer_freq() is
332			 * traced.
333			 */
334			if (delta < 0)
335				delta = 0;
336		}
337		ticks_left -= delta;
338	}
339#ifdef DELAYDEBUG
340	if (state == 1)
341		printf(" %d calls to getit() at %d usec each\n",
342		       getit_calls, (n + 5) / getit_calls);
343#endif
344}
345
346static void
347sysbeepstop(void *chan)
348{
349	ppi_spkr_off();		/* disable counter1 output to speaker */
350	timer_spkr_release();
351	beeping = 0;
352}
353
354int
355sysbeep(int pitch, int period)
356{
357	int x = splclock();
358
359	if (timer_spkr_acquire())
360		if (!beeping) {
361			/* Something else owns it. */
362			splx(x);
363			return (-1); /* XXX Should be EBUSY, but nobody cares anyway. */
364		}
365	disable_intr();
366	spkr_set_pitch(pitch);
367	enable_intr();
368	if (!beeping) {
369		/* enable counter1 output to speaker */
370		ppi_spkr_on();
371		beeping = period;
372		timeout(sysbeepstop, (void *)NULL, period);
373	}
374	splx(x);
375	return (0);
376}
377
378
379unsigned int delaycount;
380#define FIRST_GUESS	0x2000
381static void findcpuspeed(void)
382{
383	int i;
384	int remainder;
385
386	/* Put counter in count down mode */
387	outb(TIMER_MODE, TIMER_SEL0 | TIMER_16BIT | TIMER_RATEGEN);
388	outb(TIMER_CNTR0, 0xff);
389	outb(TIMER_CNTR0, 0xff);
390	for (i = FIRST_GUESS; i; i--)
391		;
392	remainder = getit();
393	delaycount = (FIRST_GUESS * TIMER_DIV(1000)) / (0xffff - remainder);
394}
395
396static u_int
397calibrate_clocks(void)
398{
399	int timeout;
400	u_int count, prev_count, tot_count;
401	u_short	sec, start_sec;
402
403	if (bootverbose)
404	        printf("Calibrating clock(s) ... ");
405	/* Check ARTIC. */
406	if (!(PC98_SYSTEM_PARAMETER(0x458) & 0x80) &&
407	    !(PC98_SYSTEM_PARAMETER(0x45b) & 0x04))
408		goto fail;
409	timeout = 100000000;
410
411	/* Read the ARTIC. */
412	sec = inw(0x5e);
413
414	/* Wait for the ARTIC to changes. */
415	start_sec = sec;
416	for (;;) {
417		sec = inw(0x5e);
418		if (sec != start_sec)
419			break;
420		if (--timeout == 0)
421			goto fail;
422	}
423
424	/* Start keeping track of the i8254 counter. */
425	prev_count = getit();
426	if (prev_count == 0 || prev_count > timer0_max_count)
427		goto fail;
428	tot_count = 0;
429
430	start_sec = sec;
431	for (;;) {
432		sec = inw(0x5e);
433		count = getit();
434		if (count == 0 || count > timer0_max_count)
435			goto fail;
436		if (count > prev_count)
437			tot_count += prev_count - (count - timer0_max_count);
438		else
439			tot_count += prev_count - count;
440		prev_count = count;
441		if ((sec == start_sec + 1200) || /* 1200 = 307.2KHz >> 8 */
442		    (sec < start_sec &&
443		        (u_int)sec + 0x10000 == (u_int)start_sec + 1200))
444			break;
445		if (--timeout == 0)
446			goto fail;
447	}
448
449	if (bootverbose) {
450	        printf("i8254 clock: %u Hz\n", tot_count);
451	}
452	return (tot_count);
453
454fail:
455	if (bootverbose)
456	        printf("failed, using default i8254 clock of %u Hz\n",
457		       timer_freq);
458	return (timer_freq);
459}
460
461static void
462set_timer_freq(u_int freq, int intr_freq)
463{
464	int new_timer0_real_max_count;
465
466	i8254_timecounter.tc_frequency = freq;
467	mtx_lock_spin(&clock_lock);
468	timer_freq = freq;
469	if (using_lapic_timer)
470		new_timer0_real_max_count = 0x10000;
471	else
472		new_timer0_real_max_count = TIMER_DIV(intr_freq);
473	if (new_timer0_real_max_count != timer0_real_max_count) {
474		timer0_real_max_count = new_timer0_real_max_count;
475		if (timer0_real_max_count == 0x10000)
476			timer0_max_count = 0xffff;
477		else
478			timer0_max_count = timer0_real_max_count;
479		outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
480		outb(TIMER_CNTR0, timer0_real_max_count & 0xff);
481		outb(TIMER_CNTR0, timer0_real_max_count >> 8);
482	}
483	mtx_unlock_spin(&clock_lock);
484}
485
486static void
487i8254_restore(void)
488{
489
490	mtx_lock_spin(&clock_lock);
491	outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
492	outb(TIMER_CNTR0, timer0_real_max_count & 0xff);
493	outb(TIMER_CNTR0, timer0_real_max_count >> 8);
494	mtx_unlock_spin(&clock_lock);
495}
496
497
498/*
499 * Restore all the timers non-atomically (XXX: should be atomically).
500 *
501 * This function is called from pmtimer_resume() to restore all the timers.
502 * This should not be necessary, but there are broken laptops that do not
503 * restore all the timers on resume.
504 */
505void
506timer_restore(void)
507{
508
509	i8254_restore();		/* restore timer_freq and hz */
510}
511
512/* This is separate from startrtclock() so that it can be called early. */
513void
514i8254_init(void)
515{
516
517	mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE);
518	set_timer_freq(timer_freq, hz);
519}
520
521void
522startrtclock()
523{
524	u_int delta, freq;
525
526	findcpuspeed();
527	if (pc98_machine_type & M_8M)
528		timer_freq = 1996800L; /* 1.9968 MHz */
529	else
530		timer_freq = 2457600L; /* 2.4576 MHz */
531
532	freq = calibrate_clocks();
533#ifdef CLK_CALIBRATION_LOOP
534	if (bootverbose) {
535		printf(
536		"Press a key on the console to abort clock calibration\n");
537		while (cncheckc() == -1)
538			calibrate_clocks();
539	}
540#endif
541
542	/*
543	 * Use the calibrated i8254 frequency if it seems reasonable.
544	 * Otherwise use the default, and don't use the calibrated i586
545	 * frequency.
546	 */
547	delta = freq > timer_freq ? freq - timer_freq : timer_freq - freq;
548	if (delta < timer_freq / 100) {
549#ifndef CLK_USE_I8254_CALIBRATION
550		if (bootverbose)
551			printf(
552"CLK_USE_I8254_CALIBRATION not specified - using default frequency\n");
553		freq = timer_freq;
554#endif
555		timer_freq = freq;
556	} else {
557		if (bootverbose)
558			printf(
559		    "%d Hz differs from default of %d Hz by more than 1%%\n",
560			       freq, timer_freq);
561	}
562
563	set_timer_freq(timer_freq, hz);
564	tc_init(&i8254_timecounter);
565
566	init_TSC();
567}
568
569static void
570rtc_serialcombit(int i)
571{
572	outb(IO_RTC, ((i&0x01)<<5)|0x07);
573	DELAY(1);
574	outb(IO_RTC, ((i&0x01)<<5)|0x17);
575	DELAY(1);
576	outb(IO_RTC, ((i&0x01)<<5)|0x07);
577	DELAY(1);
578}
579
580static void
581rtc_serialcom(int i)
582{
583	rtc_serialcombit(i&0x01);
584	rtc_serialcombit((i&0x02)>>1);
585	rtc_serialcombit((i&0x04)>>2);
586	rtc_serialcombit((i&0x08)>>3);
587	outb(IO_RTC, 0x07);
588	DELAY(1);
589	outb(IO_RTC, 0x0f);
590	DELAY(1);
591	outb(IO_RTC, 0x07);
592 	DELAY(1);
593}
594
595static void
596rtc_outb(int val)
597{
598	int s;
599	int sa = 0;
600
601	for (s=0;s<8;s++) {
602	    sa = ((val >> s) & 0x01) ? 0x27 : 0x07;
603	    outb(IO_RTC, sa);		/* set DI & CLK 0 */
604	    DELAY(1);
605	    outb(IO_RTC, sa | 0x10);	/* CLK 1 */
606	    DELAY(1);
607	}
608	outb(IO_RTC, sa & 0xef);	/* CLK 0 */
609}
610
611static int
612rtc_inb(void)
613{
614	int s;
615	int sa = 0;
616
617	for (s=0;s<8;s++) {
618	    sa |= ((inb(0x33) & 0x01) << s);
619	    outb(IO_RTC, 0x17);	/* CLK 1 */
620	    DELAY(1);
621	    outb(IO_RTC, 0x07);	/* CLK 0 */
622	    DELAY(2);
623	}
624	return sa;
625}
626
627/*
628 * Initialize the time of day register, based on the time base which is, e.g.
629 * from a filesystem.
630 */
631void
632inittodr(time_t base)
633{
634	struct timespec ts;
635	struct clocktime ct;
636
637	if (base) {
638		ts.tv_sec = base;
639		ts.tv_nsec = 0;
640		tc_setclock(&ts);
641	}
642
643	rtc_serialcom(0x03);	/* Time Read */
644	rtc_serialcom(0x01);	/* Register shift command. */
645	DELAY(20);
646
647	ct.nsec = 0;
648	ct.sec = bcd2bin(rtc_inb() & 0xff);		/* sec */
649	ct.min = bcd2bin(rtc_inb() & 0xff);		/* min */
650	ct.hour = bcd2bin(rtc_inb() & 0xff);		/* hour */
651	ct.day = bcd2bin(rtc_inb() & 0xff) - 1;		/* date */
652	ct.mon = (rtc_inb() >> 4) & 0x0f;		/* month */
653	ct.year = bcd2bin(rtc_inb() & 0xff) + 1900;	/* year */
654	if (ct.year < 1995)
655		ct.year += 100;
656	clock_ct_to_ts(&ct, &ts);
657	tc_setclock(&ts);
658}
659
660/*
661 * Write system time back to RTC
662 */
663void
664resettodr()
665{
666	struct timespec	ts;
667	struct clocktime ct;
668
669	if (disable_rtc_set)
670		return;
671
672	getnanotime(&ts);
673	ts.tv_sec -= utc_offset();
674	clock_ts_to_ct(&ts, &ct);
675
676	rtc_serialcom(0x01);	/* Register shift command. */
677
678	rtc_outb(bin2bcd(ct.sec)); 		/* Write back Seconds */
679	rtc_outb(bin2bcd(ct.min)); 		/* Write back Minutes */
680	rtc_outb(bin2bcd(ct.hour)); 		/* Write back Hours   */
681
682	rtc_outb(bin2bcd(ct.day));		/* Write back Day     */
683	rtc_outb((ct.mon << 4) | (ct.dow + 1));	/* Write back Month and DOW */
684	rtc_outb(bin2bcd(ct.year % 100));	/* Write back Year    */
685
686	rtc_serialcom(0x02);	/* Time set & Counter hold command. */
687	rtc_serialcom(0x00);	/* Register hold command. */
688}
689
690
691/*
692 * Start both clocks running.
693 */
694void
695cpu_initclocks()
696{
697
698#ifdef DEV_APIC
699	using_lapic_timer = lapic_setup_clock();
700#endif
701	/*
702	 * If we aren't using the local APIC timer to drive the kernel
703	 * clocks, setup the interrupt handler for the 8254 timer 0 so
704	 * that it can drive hardclock().  Otherwise, change the 8254
705	 * timecounter to user a simpler algorithm.
706	 */
707	if (!using_lapic_timer) {
708		intr_add_handler("clk", 0, (driver_filter_t *)clkintr, NULL,
709		    NULL, INTR_TYPE_CLK, NULL);
710		i8254_intsrc = intr_lookup_source(0);
711		if (i8254_intsrc != NULL)
712			i8254_pending =
713			    i8254_intsrc->is_pic->pic_source_pending;
714	} else {
715		i8254_timecounter.tc_get_timecount =
716		    i8254_simple_get_timecount;
717		i8254_timecounter.tc_counter_mask = 0xffff;
718		set_timer_freq(timer_freq, hz);
719	}
720
721	init_TSC_tc();
722}
723
724void
725cpu_startprofclock(void)
726{
727}
728
729void
730cpu_stopprofclock(void)
731{
732}
733
734static int
735sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS)
736{
737	int error;
738	u_int freq;
739
740	/*
741	 * Use `i8254' instead of `timer' in external names because `timer'
742	 * is is too generic.  Should use it everywhere.
743	 */
744	freq = timer_freq;
745	error = sysctl_handle_int(oidp, &freq, sizeof(freq), req);
746	if (error == 0 && req->newptr != NULL)
747		set_timer_freq(freq, hz);
748	return (error);
749}
750
751SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW,
752    0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", "");
753
754static unsigned
755i8254_simple_get_timecount(struct timecounter *tc)
756{
757
758	return (timer0_max_count - getit());
759}
760
761static unsigned
762i8254_get_timecount(struct timecounter *tc)
763{
764	u_int count;
765	u_int high, low;
766	u_int eflags;
767
768	eflags = read_eflags();
769	mtx_lock_spin(&clock_lock);
770
771	/* Select timer0 and latch counter value. */
772	outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
773
774	low = inb(TIMER_CNTR0);
775	high = inb(TIMER_CNTR0);
776	count = timer0_max_count - ((high << 8) | low);
777	if (count < i8254_lastcount ||
778	    (!i8254_ticked && (clkintr_pending ||
779	    ((count < 20 || (!(eflags & PSL_I) && count < timer0_max_count / 2u)) &&
780	    i8254_pending != NULL && i8254_pending(i8254_intsrc))))) {
781		i8254_ticked = 1;
782		i8254_offset += timer0_max_count;
783	}
784	i8254_lastcount = count;
785	count += i8254_offset;
786	mtx_unlock_spin(&clock_lock);
787	return (count);
788}
789
790#ifdef DEV_ISA
791/*
792 * Attach to the ISA PnP descriptors for the timer and realtime clock.
793 */
794static struct isa_pnp_id attimer_ids[] = {
795	{ 0x0001d041 /* PNP0100 */, "AT timer" },
796	{ 0x000bd041 /* PNP0B00 */, "AT realtime clock" },
797	{ 0 }
798};
799
800static int
801attimer_probe(device_t dev)
802{
803	int result;
804
805	if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids)) <= 0)
806		device_quiet(dev);
807	return(result);
808}
809
810static int
811attimer_attach(device_t dev)
812{
813	return(0);
814}
815
816static device_method_t attimer_methods[] = {
817	/* Device interface */
818	DEVMETHOD(device_probe,		attimer_probe),
819	DEVMETHOD(device_attach,	attimer_attach),
820	DEVMETHOD(device_detach,	bus_generic_detach),
821	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
822	DEVMETHOD(device_suspend,	bus_generic_suspend),	/* XXX stop statclock? */
823	DEVMETHOD(device_resume,	bus_generic_resume),	/* XXX restart statclock? */
824	{ 0, 0 }
825};
826
827static driver_t attimer_driver = {
828	"attimer",
829	attimer_methods,
830	1,		/* no softc */
831};
832
833static devclass_t attimer_devclass;
834
835DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0);
836#endif /* DEV_ISA */
837