pcrtc.c revision 166189 
1/*-
2 * Copyright (c) 1990 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz and Don Ahn.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 *    may be used to endorse or promote products derived from this software
18 *    without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 *	from: @(#)clock.c	7.2 (Berkeley) 5/12/91
33 * $FreeBSD: head/sys/pc98/cbus/pcrtc.c 166189 2007-01-23 08:48:26Z bde $
34 */
35
36/*
37 * Routines to handle clock hardware.
38 */
39
40/*
41 * inittodr, settodr and support routines written
42 * by Christoph Robitschko <chmr@edvz.tu-graz.ac.at>
43 *
44 * reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94
45 */
46
47/*
48 * modified for PC98 by Kakefuda
49 */
50
51#include "opt_apic.h"
52#include "opt_clock.h"
53#include "opt_isa.h"
54#include "opt_mca.h"
55
56#include <sys/param.h>
57#include <sys/systm.h>
58#include <sys/bus.h>
59#include <sys/clock.h>
60#include <sys/lock.h>
61#include <sys/kdb.h>
62#include <sys/mutex.h>
63#include <sys/proc.h>
64#include <sys/time.h>
65#include <sys/timetc.h>
66#include <sys/kernel.h>
67#include <sys/limits.h>
68#include <sys/module.h>
69#include <sys/sysctl.h>
70#include <sys/cons.h>
71#include <sys/power.h>
72
73#include <machine/clock.h>
74#include <machine/cpu.h>
75#include <machine/cputypes.h>
76#include <machine/frame.h>
77#include <machine/intr_machdep.h>
78#include <machine/md_var.h>
79#include <machine/psl.h>
80#ifdef DEV_APIC
81#include <machine/apicvar.h>
82#endif
83#include <machine/specialreg.h>
84#include <machine/ppireg.h>
85#include <machine/timerreg.h>
86
87#include <i386/isa/icu.h>
88#include <pc98/cbus/cbus.h>
89#include <pc98/pc98/pc98_machdep.h>
90#ifdef DEV_ISA
91#include <isa/isavar.h>
92#endif
93
94#define	TIMER_DIV(x) ((timer_freq + (x) / 2) / (x))
95
96int	clkintr_pending;
97int	pscnt = 1;
98int	psdiv = 1;
99int	statclock_disable;
100#ifndef TIMER_FREQ
101#define TIMER_FREQ   2457600
102#endif
103u_int	timer_freq = TIMER_FREQ;
104int	timer0_max_count;
105int	timer0_real_max_count;
106struct mtx clock_lock;
107
108static	int	beeping = 0;
109static	struct intsrc *i8254_intsrc;
110static	u_int32_t i8254_lastcount;
111static	u_int32_t i8254_offset;
112static	int	(*i8254_pending)(struct intsrc *);
113static	int	i8254_ticked;
114static	int	using_lapic_timer;
115
116/* Values for timerX_state: */
117#define	RELEASED	0
118#define	RELEASE_PENDING	1
119#define	ACQUIRED	2
120#define	ACQUIRE_PENDING	3
121
122static 	u_char	timer1_state;
123static	u_char	timer2_state;
124static void rtc_serialcombit(int);
125static void rtc_serialcom(int);
126static int rtc_inb(void);
127static void rtc_outb(int);
128
129static	unsigned i8254_get_timecount(struct timecounter *tc);
130static	unsigned i8254_simple_get_timecount(struct timecounter *tc);
131static	void	set_timer_freq(u_int freq, int intr_freq);
132
133static struct timecounter i8254_timecounter = {
134	i8254_get_timecount,	/* get_timecount */
135	0,			/* no poll_pps */
136	~0u,			/* counter_mask */
137	0,			/* frequency */
138	"i8254",		/* name */
139	0			/* quality */
140};
141
142static void
143clkintr(struct trapframe *frame)
144{
145
146	if (timecounter->tc_get_timecount == i8254_get_timecount) {
147		mtx_lock_spin(&clock_lock);
148		if (i8254_ticked)
149			i8254_ticked = 0;
150		else {
151			i8254_offset += timer0_max_count;
152			i8254_lastcount = 0;
153		}
154		clkintr_pending = 0;
155		mtx_unlock_spin(&clock_lock);
156	}
157	KASSERT(!using_lapic_timer, ("clk interrupt enabled with lapic timer"));
158	hardclock(TRAPF_USERMODE(frame), TRAPF_PC(frame));
159}
160
161int
162acquire_timer1(int mode)
163{
164
165	if (timer1_state != RELEASED)
166		return (-1);
167	timer1_state = ACQUIRED;
168
169	/*
170	 * This access to the timer registers is as atomic as possible
171	 * because it is a single instruction.  We could do better if we
172	 * knew the rate.  Use of splclock() limits glitches to 10-100us,
173	 * and this is probably good enough for timer2, so we aren't as
174	 * careful with it as with timer0.
175	 */
176	outb(TIMER_MODE, TIMER_SEL1 | (mode & 0x3f));
177
178	return (0);
179}
180
181int
182acquire_timer2(int mode)
183{
184
185	if (timer2_state != RELEASED)
186		return (-1);
187	timer2_state = ACQUIRED;
188
189	/*
190	 * This access to the timer registers is as atomic as possible
191	 * because it is a single instruction.  We could do better if we
192	 * knew the rate.  Use of splclock() limits glitches to 10-100us,
193	 * and this is probably good enough for timer2, so we aren't as
194	 * careful with it as with timer0.
195	 */
196	outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
197
198	return (0);
199}
200
201int
202release_timer1()
203{
204
205	if (timer1_state != ACQUIRED)
206		return (-1);
207	timer1_state = RELEASED;
208	outb(TIMER_MODE, TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT);
209	return (0);
210}
211
212int
213release_timer2()
214{
215
216	if (timer2_state != ACQUIRED)
217		return (-1);
218	timer2_state = RELEASED;
219	outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
220	return (0);
221}
222
223
224static int
225getit(void)
226{
227	int high, low;
228
229	mtx_lock_spin(&clock_lock);
230
231	/* Select timer0 and latch counter value. */
232	outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
233
234	low = inb(TIMER_CNTR0);
235	high = inb(TIMER_CNTR0);
236
237	mtx_unlock_spin(&clock_lock);
238	return ((high << 8) | low);
239}
240
241/*
242 * Wait "n" microseconds.
243 * Relies on timer 1 counting down from (timer_freq / hz)
244 * Note: timer had better have been programmed before this is first used!
245 */
246void
247DELAY(int n)
248{
249	int delta, prev_tick, tick, ticks_left;
250
251#ifdef DELAYDEBUG
252	int getit_calls = 1;
253	int n1;
254	static int state = 0;
255
256	if (state == 0) {
257		state = 1;
258		for (n1 = 1; n1 <= 10000000; n1 *= 10)
259			DELAY(n1);
260		state = 2;
261	}
262	if (state == 1)
263		printf("DELAY(%d)...", n);
264#endif
265	/*
266	 * Read the counter first, so that the rest of the setup overhead is
267	 * counted.  Guess the initial overhead is 20 usec (on most systems it
268	 * takes about 1.5 usec for each of the i/o's in getit().  The loop
269	 * takes about 6 usec on a 486/33 and 13 usec on a 386/20.  The
270	 * multiplications and divisions to scale the count take a while).
271	 *
272	 * However, if ddb is active then use a fake counter since reading
273	 * the i8254 counter involves acquiring a lock.  ddb must not do
274	 * locking for many reasons, but it calls here for at least atkbd
275	 * input.
276	 */
277#ifdef KDB
278	if (kdb_active)
279		prev_tick = 1;
280	else
281#endif
282		prev_tick = getit();
283	n -= 0;			/* XXX actually guess no initial overhead */
284	/*
285	 * Calculate (n * (timer_freq / 1e6)) without using floating point
286	 * and without any avoidable overflows.
287	 */
288	if (n <= 0)
289		ticks_left = 0;
290	else if (n < 256)
291		/*
292		 * Use fixed point to avoid a slow division by 1000000.
293		 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest.
294		 * 2^15 is the first power of 2 that gives exact results
295		 * for n between 0 and 256.
296		 */
297		ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15;
298	else
299		/*
300		 * Don't bother using fixed point, although gcc-2.7.2
301		 * generates particularly poor code for the long long
302		 * division, since even the slow way will complete long
303		 * before the delay is up (unless we're interrupted).
304		 */
305		ticks_left = ((u_int)n * (long long)timer_freq + 999999)
306			     / 1000000;
307
308	while (ticks_left > 0) {
309#ifdef KDB
310		if (kdb_active) {
311			outb(0x5f, 0);
312			tick = prev_tick - 1;
313			if (tick <= 0)
314				tick = timer0_max_count;
315		} else
316#endif
317			tick = getit();
318#ifdef DELAYDEBUG
319		++getit_calls;
320#endif
321		delta = prev_tick - tick;
322		prev_tick = tick;
323		if (delta < 0) {
324			delta += timer0_max_count;
325			/*
326			 * Guard against timer0_max_count being wrong.
327			 * This shouldn't happen in normal operation,
328			 * but it may happen if set_timer_freq() is
329			 * traced.
330			 */
331			if (delta < 0)
332				delta = 0;
333		}
334		ticks_left -= delta;
335	}
336#ifdef DELAYDEBUG
337	if (state == 1)
338		printf(" %d calls to getit() at %d usec each\n",
339		       getit_calls, (n + 5) / getit_calls);
340#endif
341}
342
343static void
344sysbeepstop(void *chan)
345{
346	ppi_spkr_off();		/* disable counter1 output to speaker */
347	timer_spkr_release();
348	beeping = 0;
349}
350
351int
352sysbeep(int pitch, int period)
353{
354	int x = splclock();
355
356	if (timer_spkr_acquire())
357		if (!beeping) {
358			/* Something else owns it. */
359			splx(x);
360			return (-1); /* XXX Should be EBUSY, but nobody cares anyway. */
361		}
362	disable_intr();
363	spkr_set_pitch(pitch);
364	enable_intr();
365	if (!beeping) {
366		/* enable counter1 output to speaker */
367		ppi_spkr_on();
368		beeping = period;
369		timeout(sysbeepstop, (void *)NULL, period);
370	}
371	splx(x);
372	return (0);
373}
374
375
376unsigned int delaycount;
377#define FIRST_GUESS	0x2000
378static void findcpuspeed(void)
379{
380	int i;
381	int remainder;
382
383	/* Put counter in count down mode */
384	outb(TIMER_MODE, TIMER_SEL0 | TIMER_16BIT | TIMER_RATEGEN);
385	outb(TIMER_CNTR0, 0xff);
386	outb(TIMER_CNTR0, 0xff);
387	for (i = FIRST_GUESS; i; i--)
388		;
389	remainder = getit();
390	delaycount = (FIRST_GUESS * TIMER_DIV(1000)) / (0xffff - remainder);
391}
392
393static u_int
394calibrate_clocks(void)
395{
396	int	timeout;
397	u_int	count, prev_count, tot_count;
398	u_short	sec, start_sec;
399
400	if (bootverbose)
401	        printf("Calibrating clock(s) ... ");
402	/* Check ARTIC. */
403	if (!(PC98_SYSTEM_PARAMETER(0x458) & 0x80) &&
404	    !(PC98_SYSTEM_PARAMETER(0x45b) & 0x04))
405		goto fail;
406	timeout = 100000000;
407
408	/* Read the ARTIC. */
409	sec = inw(0x5e);
410
411	/* Wait for the ARTIC to changes. */
412	start_sec = sec;
413	for (;;) {
414		sec = inw(0x5e);
415		if (sec != start_sec)
416			break;
417		if (--timeout == 0)
418			goto fail;
419	}
420	prev_count = getit();
421	if (prev_count == 0 || prev_count > timer0_max_count)
422		goto fail;
423	tot_count = 0;
424
425	start_sec = sec;
426	for (;;) {
427		sec = inw(0x5e);
428		count = getit();
429		if (count == 0 || count > timer0_max_count)
430			goto fail;
431		if (count > prev_count)
432			tot_count += prev_count - (count - timer0_max_count);
433		else
434			tot_count += prev_count - count;
435		prev_count = count;
436		if ((sec == start_sec + 1200) || /* 1200 = 307.2KHz >> 8 */
437		    (sec < start_sec &&
438		        (u_int)sec + 0x10000 == (u_int)start_sec + 1200))
439			break;
440		if (--timeout == 0)
441			goto fail;
442	}
443
444	if (bootverbose) {
445	        printf("i8254 clock: %u Hz\n", tot_count);
446	}
447	return (tot_count);
448
449fail:
450	if (bootverbose)
451	        printf("failed, using default i8254 clock of %u Hz\n",
452		       timer_freq);
453	return (timer_freq);
454}
455
456static void
457set_timer_freq(u_int freq, int intr_freq)
458{
459	int new_timer0_real_max_count;
460
461	i8254_timecounter.tc_frequency = freq;
462	mtx_lock_spin(&clock_lock);
463	timer_freq = freq;
464	if (using_lapic_timer)
465		new_timer0_real_max_count = 0x10000;
466	else
467		new_timer0_real_max_count = TIMER_DIV(intr_freq);
468	if (new_timer0_real_max_count != timer0_real_max_count) {
469		timer0_real_max_count = new_timer0_real_max_count;
470		if (timer0_real_max_count == 0x10000)
471			timer0_max_count = 0xffff;
472		else
473			timer0_max_count = timer0_real_max_count;
474		outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
475		outb(TIMER_CNTR0, timer0_real_max_count & 0xff);
476		outb(TIMER_CNTR0, timer0_real_max_count >> 8);
477	}
478	mtx_unlock_spin(&clock_lock);
479}
480
481static void
482i8254_restore(void)
483{
484
485	mtx_lock_spin(&clock_lock);
486	outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
487	outb(TIMER_CNTR0, timer0_real_max_count & 0xff);
488	outb(TIMER_CNTR0, timer0_real_max_count >> 8);
489	mtx_unlock_spin(&clock_lock);
490}
491
492
493/*
494 * Restore all the timers non-atomically (XXX: should be atomically).
495 *
496 * This function is called from pmtimer_resume() to restore all the timers.
497 * This should not be necessary, but there are broken laptops that do not
498 * restore all the timers on resume.
499 */
500void
501timer_restore(void)
502{
503
504	i8254_restore();		/* restore timer_freq and hz */
505}
506
507/* This is separate from startrtclock() so that it can be called early. */
508void
509i8254_init(void)
510{
511
512	mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE);
513	set_timer_freq(timer_freq, hz);
514}
515
516void
517startrtclock()
518{
519	u_int delta, freq;
520
521	findcpuspeed();
522	if (pc98_machine_type & M_8M)
523		timer_freq = 1996800L; /* 1.9968 MHz */
524	else
525		timer_freq = 2457600L; /* 2.4576 MHz */
526
527	freq = calibrate_clocks();
528#ifdef CLK_CALIBRATION_LOOP
529	if (bootverbose) {
530		printf(
531		"Press a key on the console to abort clock calibration\n");
532		while (cncheckc() == -1)
533			calibrate_clocks();
534	}
535#endif
536
537	/*
538	 * Use the calibrated i8254 frequency if it seems reasonable.
539	 * Otherwise use the default, and don't use the calibrated i586
540	 * frequency.
541	 */
542	delta = freq > timer_freq ? freq - timer_freq : timer_freq - freq;
543	if (delta < timer_freq / 100) {
544#ifndef CLK_USE_I8254_CALIBRATION
545		if (bootverbose)
546			printf(
547"CLK_USE_I8254_CALIBRATION not specified - using default frequency\n");
548		freq = timer_freq;
549#endif
550		timer_freq = freq;
551	} else {
552		if (bootverbose)
553			printf(
554		    "%d Hz differs from default of %d Hz by more than 1%%\n",
555			       freq, timer_freq);
556	}
557
558	set_timer_freq(timer_freq, hz);
559	tc_init(&i8254_timecounter);
560
561	init_TSC();
562}
563
564static void
565rtc_serialcombit(int i)
566{
567	outb(IO_RTC, ((i&0x01)<<5)|0x07);
568	DELAY(1);
569	outb(IO_RTC, ((i&0x01)<<5)|0x17);
570	DELAY(1);
571	outb(IO_RTC, ((i&0x01)<<5)|0x07);
572	DELAY(1);
573}
574
575static void
576rtc_serialcom(int i)
577{
578	rtc_serialcombit(i&0x01);
579	rtc_serialcombit((i&0x02)>>1);
580	rtc_serialcombit((i&0x04)>>2);
581	rtc_serialcombit((i&0x08)>>3);
582	outb(IO_RTC, 0x07);
583	DELAY(1);
584	outb(IO_RTC, 0x0f);
585	DELAY(1);
586	outb(IO_RTC, 0x07);
587 	DELAY(1);
588}
589
590static void
591rtc_outb(int val)
592{
593	int s;
594	int sa = 0;
595
596	for (s=0;s<8;s++) {
597	    sa = ((val >> s) & 0x01) ? 0x27 : 0x07;
598	    outb(IO_RTC, sa);		/* set DI & CLK 0 */
599	    DELAY(1);
600	    outb(IO_RTC, sa | 0x10);	/* CLK 1 */
601	    DELAY(1);
602	}
603	outb(IO_RTC, sa & 0xef);	/* CLK 0 */
604}
605
606static int
607rtc_inb(void)
608{
609	int s;
610	int sa = 0;
611
612	for (s=0;s<8;s++) {
613	    sa |= ((inb(0x33) & 0x01) << s);
614	    outb(IO_RTC, 0x17);	/* CLK 1 */
615	    DELAY(1);
616	    outb(IO_RTC, 0x07);	/* CLK 0 */
617	    DELAY(2);
618	}
619	return sa;
620}
621
622/*
623 * Initialize the time of day register, based on the time base which is, e.g.
624 * from a filesystem.
625 */
626void
627inittodr(time_t base)
628{
629	struct timespec ts;
630	struct clocktime ct;
631
632	if (base) {
633		ts.tv_sec = base;
634		ts.tv_nsec = 0;
635		tc_setclock(&ts);
636	}
637
638	rtc_serialcom(0x03);	/* Time Read */
639	rtc_serialcom(0x01);	/* Register shift command. */
640	DELAY(20);
641
642	ct.nsec = 0;
643	ct.sec = bcd2bin(rtc_inb() & 0xff);		/* sec */
644	ct.min = bcd2bin(rtc_inb() & 0xff);		/* min */
645	ct.hour = bcd2bin(rtc_inb() & 0xff);		/* hour */
646	ct.day = bcd2bin(rtc_inb() & 0xff) - 1;		/* date */
647	ct.mon = (rtc_inb() >> 4) & 0x0f;		/* month */
648	ct.year = bcd2bin(rtc_inb() & 0xff) + 1900;	/* year */
649	if (ct.year < 1995)
650		ct.year += 100;
651	clock_ct_to_ts(&ct, &ts);
652	tc_setclock(&ts);
653}
654
655/*
656 * Write system time back to RTC
657 */
658void
659resettodr()
660{
661	struct timespec ts;
662	struct clocktime ct;
663
664	if (disable_rtc_set)
665		return;
666
667	getnanotime(&ts);
668	ts.tv_sec -= utc_offset();
669	clock_ts_to_ct(&ts, &ct);
670
671	rtc_serialcom(0x01);	/* Register shift command. */
672
673	rtc_outb(bin2bcd(ct.sec)); 		/* Write back Seconds */
674	rtc_outb(bin2bcd(ct.min)); 		/* Write back Minutes */
675	rtc_outb(bin2bcd(ct.hour)); 		/* Write back Hours   */
676
677	rtc_outb(bin2bcd(ct.day));		/* Write back Day     */
678	rtc_outb((ct.mon << 4) | (ct.dow + 1));	/* Write back Month and DOW */
679	rtc_outb(bin2bcd(ct.year % 100));	/* Write back Year    */
680
681	rtc_serialcom(0x02);	/* Time set & Counter hold command. */
682	rtc_serialcom(0x00);	/* Register hold command. */
683}
684
685
686/*
687 * Start both clocks running.
688 */
689void
690cpu_initclocks()
691{
692
693#ifdef DEV_APIC
694	using_lapic_timer = lapic_setup_clock();
695#endif
696	/*
697	 * If we aren't using the local APIC timer to drive the kernel
698	 * clocks, setup the interrupt handler for the 8254 timer 0 so
699	 * that it can drive hardclock().  Otherwise, change the 8254
700	 * timecounter to user a simpler algorithm.
701	 */
702	if (!using_lapic_timer) {
703		intr_add_handler("clk", 0, (driver_intr_t *)clkintr, NULL,
704		    INTR_TYPE_CLK | INTR_FAST, NULL);
705		i8254_intsrc = intr_lookup_source(0);
706		if (i8254_intsrc != NULL)
707			i8254_pending =
708			    i8254_intsrc->is_pic->pic_source_pending;
709	} else {
710		i8254_timecounter.tc_get_timecount =
711		    i8254_simple_get_timecount;
712		i8254_timecounter.tc_counter_mask = 0xffff;
713		set_timer_freq(timer_freq, hz);
714	}
715
716	init_TSC_tc();
717}
718
719void
720cpu_startprofclock(void)
721{
722}
723
724void
725cpu_stopprofclock(void)
726{
727}
728
729static int
730sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS)
731{
732	int error;
733	u_int freq;
734
735	/*
736	 * Use `i8254' instead of `timer' in external names because `timer'
737	 * is is too generic.  Should use it everywhere.
738	 */
739	freq = timer_freq;
740	error = sysctl_handle_int(oidp, &freq, sizeof(freq), req);
741	if (error == 0 && req->newptr != NULL)
742		set_timer_freq(freq, hz);
743	return (error);
744}
745
746SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW,
747    0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", "");
748
749static unsigned
750i8254_simple_get_timecount(struct timecounter *tc)
751{
752
753	return (timer0_max_count - getit());
754}
755
756static unsigned
757i8254_get_timecount(struct timecounter *tc)
758{
759	u_int count;
760	u_int high, low;
761	u_int eflags;
762
763	eflags = read_eflags();
764	mtx_lock_spin(&clock_lock);
765
766	/* Select timer0 and latch counter value. */
767	outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
768
769	low = inb(TIMER_CNTR0);
770	high = inb(TIMER_CNTR0);
771	count = timer0_max_count - ((high << 8) | low);
772	if (count < i8254_lastcount ||
773	    (!i8254_ticked && (clkintr_pending ||
774	    ((count < 20 || (!(eflags & PSL_I) && count < timer0_max_count / 2u)) &&
775	    i8254_pending != NULL && i8254_pending(i8254_intsrc))))) {
776		i8254_ticked = 1;
777		i8254_offset += timer0_max_count;
778	}
779	i8254_lastcount = count;
780	count += i8254_offset;
781	mtx_unlock_spin(&clock_lock);
782	return (count);
783}
784
785#ifdef DEV_ISA
786/*
787 * Attach to the ISA PnP descriptors for the timer and realtime clock.
788 */
789static struct isa_pnp_id attimer_ids[] = {
790	{ 0x0001d041 /* PNP0100 */, "AT timer" },
791	{ 0x000bd041 /* PNP0B00 */, "AT realtime clock" },
792	{ 0 }
793};
794
795static int
796attimer_probe(device_t dev)
797{
798	int result;
799
800	if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids)) <= 0)
801		device_quiet(dev);
802	return(result);
803}
804
805static int
806attimer_attach(device_t dev)
807{
808	return(0);
809}
810
811static device_method_t attimer_methods[] = {
812	/* Device interface */
813	DEVMETHOD(device_probe,		attimer_probe),
814	DEVMETHOD(device_attach,	attimer_attach),
815	DEVMETHOD(device_detach,	bus_generic_detach),
816	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
817	DEVMETHOD(device_suspend,	bus_generic_suspend),	/* XXX stop statclock? */
818	DEVMETHOD(device_resume,	bus_generic_resume),	/* XXX restart statclock? */
819	{ 0, 0 }
820};
821
822static driver_t attimer_driver = {
823	"attimer",
824	attimer_methods,
825	1,		/* no softc */
826};
827
828static devclass_t attimer_devclass;
829
830DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0);
831#endif /* DEV_ISA */
832