1219820Sjeff/* 2219820Sjeff * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. 3219820Sjeff * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. 4219820Sjeff * Copyright (c) 2005, 2006, 2007 Cisco Systems. All rights reserved. 5272407Shselasky * Copyright (c) 2005, 2006, 2007, 2008, 2014 Mellanox Technologies. All rights reserved. 6219820Sjeff * Copyright (c) 2004 Voltaire, Inc. All rights reserved. 7219820Sjeff * 8219820Sjeff * This software is available to you under a choice of one of two 9219820Sjeff * licenses. You may choose to be licensed under the terms of the GNU 10219820Sjeff * General Public License (GPL) Version 2, available from the file 11219820Sjeff * COPYING in the main directory of this source tree, or the 12219820Sjeff * OpenIB.org BSD license below: 13219820Sjeff * 14219820Sjeff * Redistribution and use in source and binary forms, with or 15219820Sjeff * without modification, are permitted provided that the following 16219820Sjeff * conditions are met: 17219820Sjeff * 18219820Sjeff * - Redistributions of source code must retain the above 19219820Sjeff * copyright notice, this list of conditions and the following 20219820Sjeff * disclaimer. 21219820Sjeff * 22219820Sjeff * - Redistributions in binary form must reproduce the above 23219820Sjeff * copyright notice, this list of conditions and the following 24219820Sjeff * disclaimer in the documentation and/or other materials 25219820Sjeff * provided with the distribution. 26219820Sjeff * 27219820Sjeff * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 28219820Sjeff * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 29219820Sjeff * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 30219820Sjeff * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 31219820Sjeff * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 32219820Sjeff * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 33219820Sjeff * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 34219820Sjeff * SOFTWARE. 35219820Sjeff */ 36219820Sjeff 37219820Sjeff#ifndef MLX4_H 38219820Sjeff#define MLX4_H 39219820Sjeff 40219820Sjeff#include <linux/mutex.h> 41219820Sjeff#include <linux/radix-tree.h> 42255932Salfred#include <linux/rbtree.h> 43219820Sjeff#include <linux/timer.h> 44255932Salfred#include <linux/semaphore.h> 45219820Sjeff#include <linux/workqueue.h> 46272407Shselasky#include <linux/device.h> 47219820Sjeff#include <linux/mlx4/device.h> 48219820Sjeff#include <linux/mlx4/driver.h> 49219820Sjeff#include <linux/mlx4/doorbell.h> 50255932Salfred#include <linux/mlx4/cmd.h> 51219820Sjeff 52219820Sjeff#define DRV_NAME "mlx4_core" 53219820Sjeff#define PFX DRV_NAME ": " 54292107Shselasky#define DRV_VERSION "2.1.6" 55272407Shselasky#define DRV_RELDATE __DATE__ 56219820Sjeff 57272407Shselasky#define DRV_STACK_NAME "Linux-MLNX_OFED" 58272407Shselasky#define DRV_STACK_VERSION "2.1" 59272407Shselasky#define DRV_NAME_FOR_FW DRV_STACK_NAME","DRV_STACK_VERSION 60272407Shselasky 61255932Salfred#define MLX4_FS_UDP_UC_EN (1 << 1) 62255932Salfred#define MLX4_FS_TCP_UC_EN (1 << 2) 63255932Salfred#define MLX4_FS_NUM_OF_L2_ADDR 8 64255932Salfred#define MLX4_FS_MGM_LOG_ENTRY_SIZE 7 65255932Salfred#define MLX4_FS_NUM_MCG (1 << 17) 66255932Salfred 67255932Salfredstruct mlx4_set_port_prio2tc_context { 68255932Salfred u8 prio2tc[4]; 69255932Salfred}; 70255932Salfred 71255932Salfredstruct mlx4_port_scheduler_tc_cfg_be { 72255932Salfred __be16 pg; 73255932Salfred __be16 bw_precentage; 74255932Salfred __be16 max_bw_units; /* 3-100Mbps, 4-1Gbps, other values - reserved */ 75255932Salfred __be16 max_bw_value; 76255932Salfred}; 77255932Salfred 78255932Salfredstruct mlx4_set_port_scheduler_context { 79255932Salfred struct mlx4_port_scheduler_tc_cfg_be tc[MLX4_NUM_TC]; 80255932Salfred}; 81255932Salfred 82219820Sjeffenum { 83219820Sjeff MLX4_HCR_BASE = 0x80680, 84219820Sjeff MLX4_HCR_SIZE = 0x0001c, 85255932Salfred MLX4_CLR_INT_SIZE = 0x00008, 86255932Salfred MLX4_SLAVE_COMM_BASE = 0x0, 87255932Salfred MLX4_COMM_PAGESIZE = 0x1000, 88255932Salfred MLX4_CLOCK_SIZE = 0x00008 89219820Sjeff}; 90219820Sjeff 91219820Sjeffenum { 92255932Salfred MLX4_DEFAULT_MGM_LOG_ENTRY_SIZE = 10, 93255932Salfred MLX4_MIN_MGM_LOG_ENTRY_SIZE = 7, 94255932Salfred MLX4_MAX_MGM_LOG_ENTRY_SIZE = 12, 95255932Salfred MLX4_MAX_QP_PER_MGM = 4 * ((1 << MLX4_MAX_MGM_LOG_ENTRY_SIZE)/16 - 2), 96219820Sjeff}; 97219820Sjeff 98219820Sjeffenum { 99219820Sjeff MLX4_NUM_PDS = 1 << 15 100219820Sjeff}; 101219820Sjeff 102219820Sjeffenum { 103219820Sjeff MLX4_CMPT_TYPE_QP = 0, 104219820Sjeff MLX4_CMPT_TYPE_SRQ = 1, 105219820Sjeff MLX4_CMPT_TYPE_CQ = 2, 106219820Sjeff MLX4_CMPT_TYPE_EQ = 3, 107219820Sjeff MLX4_CMPT_NUM_TYPE 108219820Sjeff}; 109219820Sjeff 110219820Sjeffenum { 111219820Sjeff MLX4_CMPT_SHIFT = 24, 112219820Sjeff MLX4_NUM_CMPTS = MLX4_CMPT_NUM_TYPE << MLX4_CMPT_SHIFT 113219820Sjeff}; 114219820Sjeff 115272407Shselaskyenum mlx4_mpt_state { 116272407Shselasky MLX4_MPT_DISABLED = 0, 117272407Shselasky MLX4_MPT_EN_HW, 118272407Shselasky MLX4_MPT_EN_SW 119255932Salfred}; 120255932Salfred 121255932Salfred#define MLX4_COMM_TIME 10000 122255932Salfredenum { 123255932Salfred MLX4_COMM_CMD_RESET, 124255932Salfred MLX4_COMM_CMD_VHCR0, 125255932Salfred MLX4_COMM_CMD_VHCR1, 126255932Salfred MLX4_COMM_CMD_VHCR2, 127255932Salfred MLX4_COMM_CMD_VHCR_EN, 128255932Salfred MLX4_COMM_CMD_VHCR_POST, 129255932Salfred MLX4_COMM_CMD_FLR = 254 130255932Salfred}; 131255932Salfred 132255932Salfred/*The flag indicates that the slave should delay the RESET cmd*/ 133255932Salfred#define MLX4_DELAY_RESET_SLAVE 0xbbbbbbb 134255932Salfred/*indicates how many retries will be done if we are in the middle of FLR*/ 135255932Salfred#define NUM_OF_RESET_RETRIES 10 136255932Salfred#define SLEEP_TIME_IN_RESET (2 * 1000) 137255932Salfredenum mlx4_resource { 138255932Salfred RES_QP, 139255932Salfred RES_CQ, 140255932Salfred RES_SRQ, 141255932Salfred RES_XRCD, 142255932Salfred RES_MPT, 143255932Salfred RES_MTT, 144255932Salfred RES_MAC, 145255932Salfred RES_VLAN, 146272407Shselasky RES_NPORT_ID, 147255932Salfred RES_COUNTER, 148255932Salfred RES_FS_RULE, 149272407Shselasky RES_EQ, 150255932Salfred MLX4_NUM_OF_RESOURCE_TYPE 151255932Salfred}; 152255932Salfred 153255932Salfredenum mlx4_alloc_mode { 154255932Salfred RES_OP_RESERVE, 155255932Salfred RES_OP_RESERVE_AND_MAP, 156255932Salfred RES_OP_MAP_ICM, 157255932Salfred}; 158255932Salfred 159255932Salfredenum mlx4_res_tracker_free_type { 160255932Salfred RES_TR_FREE_ALL, 161255932Salfred RES_TR_FREE_SLAVES_ONLY, 162255932Salfred RES_TR_FREE_STRUCTS_ONLY, 163255932Salfred}; 164255932Salfred 165255932Salfred/* 166255932Salfred *Virtual HCR structures. 167255932Salfred * mlx4_vhcr is the sw representation, in machine endianess 168255932Salfred * 169255932Salfred * mlx4_vhcr_cmd is the formalized structure, the one that is passed 170255932Salfred * to FW to go through communication channel. 171255932Salfred * It is big endian, and has the same structure as the physical HCR 172255932Salfred * used by command interface 173255932Salfred */ 174255932Salfredstruct mlx4_vhcr { 175255932Salfred u64 in_param; 176255932Salfred u64 out_param; 177255932Salfred u32 in_modifier; 178255932Salfred u32 errno; 179255932Salfred u16 op; 180255932Salfred u16 token; 181255932Salfred u8 op_modifier; 182255932Salfred u8 e_bit; 183255932Salfred}; 184255932Salfred 185255932Salfredstruct mlx4_vhcr_cmd { 186255932Salfred __be64 in_param; 187255932Salfred __be32 in_modifier; 188272407Shselasky u32 reserved1; 189255932Salfred __be64 out_param; 190255932Salfred __be16 token; 191255932Salfred u16 reserved; 192255932Salfred u8 status; 193255932Salfred u8 flags; 194255932Salfred __be16 opcode; 195272407Shselasky} __packed; 196255932Salfred 197255932Salfredstruct mlx4_cmd_info { 198255932Salfred u16 opcode; 199255932Salfred bool has_inbox; 200255932Salfred bool has_outbox; 201255932Salfred bool out_is_imm; 202255932Salfred bool encode_slave_id; 203272407Shselasky bool skip_err_print; 204255932Salfred int (*verify)(struct mlx4_dev *dev, int slave, struct mlx4_vhcr *vhcr, 205255932Salfred struct mlx4_cmd_mailbox *inbox); 206255932Salfred int (*wrapper)(struct mlx4_dev *dev, int slave, struct mlx4_vhcr *vhcr, 207255932Salfred struct mlx4_cmd_mailbox *inbox, 208255932Salfred struct mlx4_cmd_mailbox *outbox, 209255932Salfred struct mlx4_cmd_info *cmd); 210255932Salfred}; 211255932Salfred 212272407Shselaskyenum { 213272407Shselasky MLX4_DEBUG_MASK_CMD_TIME = 0x100, 214272407Shselasky}; 215272407Shselasky 216219820Sjeff#ifdef CONFIG_MLX4_DEBUG 217219820Sjeffextern int mlx4_debug_level; 218219820Sjeff#else /* CONFIG_MLX4_DEBUG */ 219219820Sjeff#define mlx4_debug_level (0) 220219820Sjeff#endif /* CONFIG_MLX4_DEBUG */ 221219820Sjeff 222219820Sjeff#define mlx4_dbg(mdev, format, arg...) \ 223255932Salfreddo { \ 224255932Salfred if (mlx4_debug_level) \ 225255932Salfred dev_printk(KERN_DEBUG, &mdev->pdev->dev, format, ##arg); \ 226255932Salfred} while (0) 227219820Sjeff 228219820Sjeff#define mlx4_err(mdev, format, arg...) \ 229255932Salfred dev_err(&mdev->pdev->dev, format, ##arg) 230219820Sjeff#define mlx4_info(mdev, format, arg...) \ 231255932Salfred dev_info(&mdev->pdev->dev, format, ##arg) 232219820Sjeff#define mlx4_warn(mdev, format, arg...) \ 233255932Salfred dev_warn(&mdev->pdev->dev, format, ##arg) 234219820Sjeff 235255932Salfredextern int mlx4_log_num_mgm_entry_size; 236255932Salfredextern int log_mtts_per_seg; 237219820Sjeffextern int mlx4_blck_lb; 238255932Salfredextern int mlx4_set_4k_mtu; 239219820Sjeff 240255932Salfred#define MLX4_MAX_NUM_SLAVES (MLX4_MAX_NUM_PF + MLX4_MAX_NUM_VF) 241255932Salfred#define ALL_SLAVES 0xff 242255932Salfred 243219820Sjeffstruct mlx4_bitmap { 244219820Sjeff u32 last; 245219820Sjeff u32 top; 246219820Sjeff u32 max; 247219820Sjeff u32 reserved_top; 248219820Sjeff u32 mask; 249219820Sjeff u32 avail; 250219820Sjeff spinlock_t lock; 251219820Sjeff unsigned long *table; 252219820Sjeff}; 253219820Sjeff 254219820Sjeffstruct mlx4_buddy { 255219820Sjeff unsigned long **bits; 256219820Sjeff unsigned int *num_free; 257255932Salfred u32 max_order; 258219820Sjeff spinlock_t lock; 259219820Sjeff}; 260219820Sjeff 261219820Sjeffstruct mlx4_icm; 262219820Sjeff 263219820Sjeffstruct mlx4_icm_table { 264219820Sjeff u64 virt; 265219820Sjeff int num_icm; 266255932Salfred u32 num_obj; 267219820Sjeff int obj_size; 268219820Sjeff int lowmem; 269219820Sjeff int coherent; 270219820Sjeff struct mutex mutex; 271219820Sjeff struct mlx4_icm **icm; 272219820Sjeff}; 273219820Sjeff 274272407Shselasky#define MLX4_MPT_FLAG_SW_OWNS (0xfUL << 28) 275272407Shselasky#define MLX4_MPT_FLAG_FREE (0x3UL << 28) 276272407Shselasky#define MLX4_MPT_FLAG_MIO (1 << 17) 277272407Shselasky#define MLX4_MPT_FLAG_BIND_ENABLE (1 << 15) 278272407Shselasky#define MLX4_MPT_FLAG_PHYSICAL (1 << 9) 279272407Shselasky#define MLX4_MPT_FLAG_REGION (1 << 8) 280272407Shselasky 281272407Shselasky#define MLX4_MPT_PD_FLAG_FAST_REG (1 << 27) 282272407Shselasky#define MLX4_MPT_PD_FLAG_RAE (1 << 28) 283272407Shselasky#define MLX4_MPT_PD_FLAG_EN_INV (3 << 24) 284272407Shselasky 285272407Shselasky#define MLX4_MPT_QP_FLAG_BOUND_QP (1 << 7) 286272407Shselasky 287272407Shselasky#define MLX4_MPT_STATUS_SW 0xF0 288272407Shselasky#define MLX4_MPT_STATUS_HW 0x00 289272407Shselasky 290255932Salfred/* 291255932Salfred * Must be packed because mtt_seg is 64 bits but only aligned to 32 bits. 292255932Salfred */ 293255932Salfredstruct mlx4_mpt_entry { 294255932Salfred __be32 flags; 295255932Salfred __be32 qpn; 296255932Salfred __be32 key; 297255932Salfred __be32 pd_flags; 298255932Salfred __be64 start; 299255932Salfred __be64 length; 300255932Salfred __be32 lkey; 301255932Salfred __be32 win_cnt; 302255932Salfred u8 reserved1[3]; 303255932Salfred u8 mtt_rep; 304255932Salfred __be64 mtt_addr; 305255932Salfred __be32 mtt_sz; 306255932Salfred __be32 entity_size; 307255932Salfred __be32 first_byte_offset; 308255932Salfred} __packed; 309255932Salfred 310255932Salfred/* 311255932Salfred * Must be packed because start is 64 bits but only aligned to 32 bits. 312255932Salfred */ 313255932Salfredstruct mlx4_eq_context { 314255932Salfred __be32 flags; 315255932Salfred u16 reserved1[3]; 316255932Salfred __be16 page_offset; 317255932Salfred u8 log_eq_size; 318255932Salfred u8 reserved2[4]; 319255932Salfred u8 eq_period; 320255932Salfred u8 reserved3; 321255932Salfred u8 eq_max_count; 322255932Salfred u8 reserved4[3]; 323255932Salfred u8 intr; 324255932Salfred u8 log_page_size; 325255932Salfred u8 reserved5[2]; 326255932Salfred u8 mtt_base_addr_h; 327255932Salfred __be32 mtt_base_addr_l; 328255932Salfred u32 reserved6[2]; 329255932Salfred __be32 consumer_index; 330255932Salfred __be32 producer_index; 331255932Salfred u32 reserved7[4]; 332255932Salfred}; 333255932Salfred 334255932Salfredstruct mlx4_cq_context { 335255932Salfred __be32 flags; 336255932Salfred u16 reserved1[3]; 337255932Salfred __be16 page_offset; 338255932Salfred __be32 logsize_usrpage; 339255932Salfred __be16 cq_period; 340255932Salfred __be16 cq_max_count; 341255932Salfred u8 reserved2[3]; 342255932Salfred u8 comp_eqn; 343255932Salfred u8 log_page_size; 344255932Salfred u8 reserved3[2]; 345255932Salfred u8 mtt_base_addr_h; 346255932Salfred __be32 mtt_base_addr_l; 347255932Salfred __be32 last_notified_index; 348255932Salfred __be32 solicit_producer_index; 349255932Salfred __be32 consumer_index; 350255932Salfred __be32 producer_index; 351255932Salfred u32 reserved4[2]; 352255932Salfred __be64 db_rec_addr; 353255932Salfred}; 354255932Salfred 355255932Salfredstruct mlx4_srq_context { 356255932Salfred __be32 state_logsize_srqn; 357255932Salfred u8 logstride; 358255932Salfred u8 reserved1; 359255932Salfred __be16 xrcd; 360255932Salfred __be32 pg_offset_cqn; 361255932Salfred u32 reserved2; 362255932Salfred u8 log_page_size; 363255932Salfred u8 reserved3[2]; 364255932Salfred u8 mtt_base_addr_h; 365255932Salfred __be32 mtt_base_addr_l; 366255932Salfred __be32 pd; 367255932Salfred __be16 limit_watermark; 368255932Salfred __be16 wqe_cnt; 369255932Salfred u16 reserved4; 370255932Salfred __be16 wqe_counter; 371255932Salfred u32 reserved5; 372255932Salfred __be64 db_rec_addr; 373255932Salfred}; 374255932Salfred 375219820Sjeffstruct mlx4_eq { 376219820Sjeff struct mlx4_dev *dev; 377219820Sjeff void __iomem *doorbell; 378219820Sjeff int eqn; 379219820Sjeff u32 cons_index; 380219820Sjeff u16 irq; 381219820Sjeff u16 have_irq; 382219820Sjeff int nent; 383219820Sjeff struct mlx4_buf_list *page_list; 384219820Sjeff struct mlx4_mtt mtt; 385219820Sjeff}; 386219820Sjeff 387255932Salfredstruct mlx4_slave_eqe { 388255932Salfred u8 type; 389255932Salfred u8 port; 390255932Salfred u32 param; 391255932Salfred}; 392255932Salfred 393255932Salfredstruct mlx4_slave_event_eq_info { 394255932Salfred int eqn; 395255932Salfred u16 token; 396255932Salfred}; 397255932Salfred 398219820Sjeffstruct mlx4_profile { 399219820Sjeff int num_qp; 400219820Sjeff int rdmarc_per_qp; 401219820Sjeff int num_srq; 402219820Sjeff int num_cq; 403219820Sjeff int num_mcg; 404219820Sjeff int num_mpt; 405272407Shselasky unsigned num_mtt_segs; 406219820Sjeff}; 407219820Sjeff 408219820Sjeffstruct mlx4_fw { 409219820Sjeff u64 clr_int_base; 410219820Sjeff u64 catas_offset; 411255932Salfred u64 comm_base; 412255932Salfred u64 clock_offset; 413219820Sjeff struct mlx4_icm *fw_icm; 414219820Sjeff struct mlx4_icm *aux_icm; 415219820Sjeff u32 catas_size; 416219820Sjeff u16 fw_pages; 417219820Sjeff u8 clr_int_bar; 418219820Sjeff u8 catas_bar; 419255932Salfred u8 comm_bar; 420255932Salfred u8 clock_bar; 421219820Sjeff}; 422219820Sjeff 423255932Salfredstruct mlx4_comm { 424255932Salfred u32 slave_write; 425255932Salfred u32 slave_read; 426255932Salfred}; 427255932Salfred 428255932Salfredenum { 429255932Salfred MLX4_MCAST_CONFIG = 0, 430255932Salfred MLX4_MCAST_DISABLE = 1, 431255932Salfred MLX4_MCAST_ENABLE = 2, 432255932Salfred}; 433255932Salfred 434255932Salfred#define VLAN_FLTR_SIZE 128 435255932Salfred 436255932Salfredstruct mlx4_vlan_fltr { 437255932Salfred __be32 entry[VLAN_FLTR_SIZE]; 438255932Salfred}; 439255932Salfred 440255932Salfredstruct mlx4_mcast_entry { 441255932Salfred struct list_head list; 442255932Salfred u64 addr; 443255932Salfred}; 444255932Salfred 445255932Salfredstruct mlx4_promisc_qp { 446255932Salfred struct list_head list; 447255932Salfred u32 qpn; 448255932Salfred}; 449255932Salfred 450255932Salfredstruct mlx4_steer_index { 451255932Salfred struct list_head list; 452255932Salfred unsigned int index; 453255932Salfred struct list_head duplicates; 454255932Salfred}; 455255932Salfred 456255932Salfred#define MLX4_EVENT_TYPES_NUM 64 457255932Salfred 458255932Salfredstruct mlx4_slave_state { 459255932Salfred u8 comm_toggle; 460255932Salfred u8 last_cmd; 461255932Salfred u8 init_port_mask; 462255932Salfred bool active; 463272407Shselasky bool old_vlan_api; 464255932Salfred u8 function; 465255932Salfred dma_addr_t vhcr_dma; 466255932Salfred u16 mtu[MLX4_MAX_PORTS + 1]; 467255932Salfred __be32 ib_cap_mask[MLX4_MAX_PORTS + 1]; 468255932Salfred struct mlx4_slave_eqe eq[MLX4_MFUNC_MAX_EQES]; 469255932Salfred struct list_head mcast_filters[MLX4_MAX_PORTS + 1]; 470255932Salfred struct mlx4_vlan_fltr *vlan_filter[MLX4_MAX_PORTS + 1]; 471255932Salfred /* event type to eq number lookup */ 472255932Salfred struct mlx4_slave_event_eq_info event_eq[MLX4_EVENT_TYPES_NUM]; 473255932Salfred u16 eq_pi; 474255932Salfred u16 eq_ci; 475255932Salfred spinlock_t lock; 476255932Salfred /*initialized via the kzalloc*/ 477255932Salfred u8 is_slave_going_down; 478255932Salfred u32 cookie; 479255932Salfred enum slave_port_state port_state[MLX4_MAX_PORTS + 1]; 480255932Salfred}; 481255932Salfred 482255932Salfred#define MLX4_VGT 4095 483255932Salfred#define NO_INDX (-1) 484255932Salfred 485272407Shselasky 486255932Salfredstruct mlx4_vport_state { 487255932Salfred u64 mac; 488255932Salfred u16 default_vlan; 489255932Salfred u8 default_qos; 490255932Salfred u32 tx_rate; 491255932Salfred bool spoofchk; 492272407Shselasky u32 link_state; 493255932Salfred}; 494255932Salfred 495255932Salfredstruct mlx4_vf_admin_state { 496255932Salfred struct mlx4_vport_state vport[MLX4_MAX_PORTS + 1]; 497255932Salfred}; 498255932Salfred 499255932Salfredstruct mlx4_vport_oper_state { 500255932Salfred struct mlx4_vport_state state; 501255932Salfred int mac_idx; 502255932Salfred int vlan_idx; 503255932Salfred}; 504255932Salfredstruct mlx4_vf_oper_state { 505255932Salfred struct mlx4_vport_oper_state vport[MLX4_MAX_PORTS + 1]; 506255932Salfred}; 507255932Salfred 508255932Salfredstruct slave_list { 509255932Salfred struct mutex mutex; 510255932Salfred struct list_head res_list[MLX4_NUM_OF_RESOURCE_TYPE]; 511255932Salfred}; 512255932Salfred 513255932Salfredstruct resource_allocator { 514255932Salfred spinlock_t alloc_lock; 515255932Salfred union { 516255932Salfred int res_reserved; 517255932Salfred int res_port_rsvd[MLX4_MAX_PORTS]; 518255932Salfred }; 519255932Salfred union { 520255932Salfred int res_free; 521255932Salfred int res_port_free[MLX4_MAX_PORTS]; 522255932Salfred }; 523255932Salfred int *quota; 524255932Salfred int *allocated; 525255932Salfred int *guaranteed; 526255932Salfred}; 527255932Salfred 528255932Salfredstruct mlx4_resource_tracker { 529255932Salfred spinlock_t lock; 530255932Salfred /* tree for each resources */ 531255932Salfred struct rb_root res_tree[MLX4_NUM_OF_RESOURCE_TYPE]; 532255932Salfred /* num_of_slave's lists, one per slave */ 533255932Salfred struct slave_list *slave_list; 534255932Salfred struct resource_allocator res_alloc[MLX4_NUM_OF_RESOURCE_TYPE]; 535255932Salfred}; 536255932Salfred 537255932Salfred#define SLAVE_EVENT_EQ_SIZE 128 538255932Salfredstruct mlx4_slave_event_eq { 539255932Salfred u32 eqn; 540255932Salfred u32 cons; 541255932Salfred u32 prod; 542255932Salfred spinlock_t event_lock; 543255932Salfred struct mlx4_eqe event_eqe[SLAVE_EVENT_EQ_SIZE]; 544255932Salfred}; 545255932Salfred 546255932Salfredstruct mlx4_master_qp0_state { 547255932Salfred int proxy_qp0_active; 548255932Salfred int qp0_active; 549255932Salfred int port_active; 550255932Salfred}; 551255932Salfred 552255932Salfredstruct mlx4_mfunc_master_ctx { 553255932Salfred struct mlx4_slave_state *slave_state; 554255932Salfred struct mlx4_vf_admin_state *vf_admin; 555255932Salfred struct mlx4_vf_oper_state *vf_oper; 556255932Salfred struct mlx4_master_qp0_state qp0_state[MLX4_MAX_PORTS + 1]; 557255932Salfred int init_port_ref[MLX4_MAX_PORTS + 1]; 558255932Salfred u16 max_mtu[MLX4_MAX_PORTS + 1]; 559255932Salfred int disable_mcast_ref[MLX4_MAX_PORTS + 1]; 560255932Salfred struct mlx4_resource_tracker res_tracker; 561255932Salfred struct workqueue_struct *comm_wq; 562255932Salfred struct work_struct comm_work; 563272407Shselasky struct work_struct arm_comm_work; 564255932Salfred struct work_struct slave_event_work; 565255932Salfred struct work_struct slave_flr_event_work; 566255932Salfred spinlock_t slave_state_lock; 567255932Salfred __be32 comm_arm_bit_vector[4]; 568255932Salfred struct mlx4_eqe cmd_eqe; 569255932Salfred struct mlx4_slave_event_eq slave_eq; 570255932Salfred struct mutex gen_eqe_mutex[MLX4_MFUNC_MAX]; 571255932Salfred}; 572255932Salfred 573255932Salfredstruct mlx4_mfunc { 574255932Salfred struct mlx4_comm __iomem *comm; 575255932Salfred struct mlx4_vhcr_cmd *vhcr; 576255932Salfred dma_addr_t vhcr_dma; 577255932Salfred 578255932Salfred struct mlx4_mfunc_master_ctx master; 579255932Salfred}; 580255932Salfred 581255932Salfred#define MGM_QPN_MASK 0x00FFFFFF 582255932Salfred#define MGM_BLCK_LB_BIT 30 583255932Salfred 584255932Salfredstruct mlx4_mgm { 585255932Salfred __be32 next_gid_index; 586255932Salfred __be32 members_count; 587255932Salfred u32 reserved[2]; 588255932Salfred u8 gid[16]; 589255932Salfred __be32 qp[MLX4_MAX_QP_PER_MGM]; 590255932Salfred}; 591255932Salfred 592219820Sjeffstruct mlx4_cmd { 593219820Sjeff struct pci_pool *pool; 594219820Sjeff void __iomem *hcr; 595219820Sjeff struct mutex hcr_mutex; 596255932Salfred struct mutex slave_cmd_mutex; 597219820Sjeff struct semaphore poll_sem; 598219820Sjeff struct semaphore event_sem; 599219820Sjeff int max_cmds; 600219820Sjeff spinlock_t context_lock; 601219820Sjeff int free_head; 602219820Sjeff struct mlx4_cmd_context *context; 603219820Sjeff u16 token_mask; 604219820Sjeff u8 use_events; 605219820Sjeff u8 toggle; 606255932Salfred u8 comm_toggle; 607219820Sjeff}; 608219820Sjeff 609272407Shselaskyenum { 610272407Shselasky MLX4_VF_IMMED_VLAN_FLAG_VLAN = 1 << 0, 611272407Shselasky MLX4_VF_IMMED_VLAN_FLAG_QOS = 1 << 1, 612272407Shselasky}; 613272407Shselaskystruct mlx4_vf_immed_vlan_work { 614272407Shselasky struct work_struct work; 615272407Shselasky struct mlx4_priv *priv; 616272407Shselasky int flags; 617272407Shselasky int slave; 618272407Shselasky int vlan_ix; 619272407Shselasky int orig_vlan_ix; 620272407Shselasky u8 port; 621272407Shselasky u8 qos; 622272407Shselasky u16 vlan_id; 623272407Shselasky u16 orig_vlan_id; 624272407Shselasky}; 625272407Shselasky 626272407Shselasky 627219820Sjeffstruct mlx4_uar_table { 628219820Sjeff struct mlx4_bitmap bitmap; 629219820Sjeff}; 630219820Sjeff 631219820Sjeffstruct mlx4_mr_table { 632219820Sjeff struct mlx4_bitmap mpt_bitmap; 633219820Sjeff struct mlx4_buddy mtt_buddy; 634219820Sjeff u64 mtt_base; 635219820Sjeff u64 mpt_base; 636219820Sjeff struct mlx4_icm_table mtt_table; 637219820Sjeff struct mlx4_icm_table dmpt_table; 638219820Sjeff}; 639219820Sjeff 640219820Sjeffstruct mlx4_cq_table { 641219820Sjeff struct mlx4_bitmap bitmap; 642219820Sjeff spinlock_t lock; 643272407Shselasky rwlock_t cq_table_lock; 644219820Sjeff struct radix_tree_root tree; 645219820Sjeff struct mlx4_icm_table table; 646219820Sjeff struct mlx4_icm_table cmpt_table; 647219820Sjeff}; 648219820Sjeff 649219820Sjeffstruct mlx4_eq_table { 650219820Sjeff struct mlx4_bitmap bitmap; 651219820Sjeff char *irq_names; 652219820Sjeff void __iomem *clr_int; 653219820Sjeff void __iomem **uar_map; 654219820Sjeff u32 clr_mask; 655219820Sjeff struct mlx4_eq *eq; 656219820Sjeff struct mlx4_icm_table table; 657219820Sjeff struct mlx4_icm_table cmpt_table; 658219820Sjeff int have_irq; 659219820Sjeff u8 inta_pin; 660219820Sjeff}; 661219820Sjeff 662219820Sjeffstruct mlx4_srq_table { 663219820Sjeff struct mlx4_bitmap bitmap; 664219820Sjeff spinlock_t lock; 665255932Salfred struct radix_tree_root tree; 666219820Sjeff struct mlx4_icm_table table; 667219820Sjeff struct mlx4_icm_table cmpt_table; 668219820Sjeff}; 669219820Sjeff 670219820Sjeffstruct mlx4_qp_table { 671219820Sjeff struct mlx4_bitmap bitmap; 672219820Sjeff u32 rdmarc_base; 673219820Sjeff int rdmarc_shift; 674219820Sjeff spinlock_t lock; 675219820Sjeff struct mlx4_icm_table qp_table; 676219820Sjeff struct mlx4_icm_table auxc_table; 677219820Sjeff struct mlx4_icm_table altc_table; 678219820Sjeff struct mlx4_icm_table rdmarc_table; 679219820Sjeff struct mlx4_icm_table cmpt_table; 680219820Sjeff}; 681219820Sjeff 682219820Sjeffstruct mlx4_mcg_table { 683219820Sjeff struct mutex mutex; 684219820Sjeff struct mlx4_bitmap bitmap; 685219820Sjeff struct mlx4_icm_table table; 686219820Sjeff}; 687219820Sjeff 688219820Sjeffstruct mlx4_catas_err { 689219820Sjeff u32 __iomem *map; 690219820Sjeff struct timer_list timer; 691219820Sjeff struct list_head list; 692219820Sjeff}; 693219820Sjeff 694219820Sjeff#define MLX4_MAX_MAC_NUM 128 695219820Sjeff#define MLX4_MAC_TABLE_SIZE (MLX4_MAX_MAC_NUM << 3) 696219820Sjeff 697219820Sjeffstruct mlx4_mac_table { 698219820Sjeff __be64 entries[MLX4_MAX_MAC_NUM]; 699219820Sjeff int refs[MLX4_MAX_MAC_NUM]; 700219820Sjeff struct mutex mutex; 701219820Sjeff int total; 702219820Sjeff int max; 703219820Sjeff}; 704219820Sjeff 705219820Sjeff#define MLX4_MAX_VLAN_NUM 128 706219820Sjeff#define MLX4_VLAN_TABLE_SIZE (MLX4_MAX_VLAN_NUM << 2) 707219820Sjeff 708219820Sjeffstruct mlx4_vlan_table { 709219820Sjeff __be32 entries[MLX4_MAX_VLAN_NUM]; 710219820Sjeff int refs[MLX4_MAX_VLAN_NUM]; 711219820Sjeff struct mutex mutex; 712219820Sjeff int total; 713219820Sjeff int max; 714219820Sjeff}; 715219820Sjeff 716255932Salfred#define SET_PORT_GEN_ALL_VALID 0x7 717255932Salfred#define SET_PORT_PROMISC_SHIFT 31 718255932Salfred#define SET_PORT_MC_PROMISC_SHIFT 30 719255932Salfred 720255932Salfredenum { 721255932Salfred MCAST_DIRECT_ONLY = 0, 722255932Salfred MCAST_DIRECT = 1, 723255932Salfred MCAST_DEFAULT = 2 724255932Salfred}; 725255932Salfred 726255932Salfred 727255932Salfredstruct mlx4_set_port_general_context { 728255932Salfred u8 reserved[3]; 729255932Salfred u8 flags; 730255932Salfred u16 reserved2; 731255932Salfred __be16 mtu; 732255932Salfred u8 pptx; 733255932Salfred u8 pfctx; 734255932Salfred u16 reserved3; 735255932Salfred u8 pprx; 736255932Salfred u8 pfcrx; 737255932Salfred u16 reserved4; 738255932Salfred}; 739255932Salfred 740255932Salfredstruct mlx4_set_port_rqp_calc_context { 741255932Salfred __be32 base_qpn; 742255932Salfred u8 rererved; 743255932Salfred u8 n_mac; 744255932Salfred u8 n_vlan; 745255932Salfred u8 n_prio; 746255932Salfred u8 reserved2[3]; 747255932Salfred u8 mac_miss; 748255932Salfred u8 intra_no_vlan; 749255932Salfred u8 no_vlan; 750255932Salfred u8 intra_vlan_miss; 751255932Salfred u8 vlan_miss; 752255932Salfred u8 reserved3[3]; 753255932Salfred u8 no_vlan_prio; 754255932Salfred __be32 promisc; 755255932Salfred __be32 mcast; 756255932Salfred}; 757255932Salfred 758292107Shselaskystruct mlx4_hca_info { 759292107Shselasky struct mlx4_dev *dev; 760292107Shselasky struct device_attribute firmware_attr; 761292107Shselasky struct device_attribute hca_attr; 762292107Shselasky struct device_attribute board_attr; 763292107Shselasky}; 764292107Shselasky 765219820Sjeffstruct mlx4_port_info { 766219820Sjeff struct mlx4_dev *dev; 767219820Sjeff int port; 768219820Sjeff char dev_name[16]; 769219820Sjeff struct device_attribute port_attr; 770219820Sjeff enum mlx4_port_type tmp_type; 771255932Salfred char dev_mtu_name[16]; 772255932Salfred struct device_attribute port_mtu_attr; 773219820Sjeff struct mlx4_mac_table mac_table; 774219820Sjeff struct mlx4_vlan_table vlan_table; 775255932Salfred int base_qpn; 776219820Sjeff}; 777219820Sjeff 778219820Sjeffstruct mlx4_sense { 779219820Sjeff struct mlx4_dev *dev; 780219820Sjeff u8 do_sense_port[MLX4_MAX_PORTS + 1]; 781219820Sjeff u8 sense_allowed[MLX4_MAX_PORTS + 1]; 782219820Sjeff struct delayed_work sense_poll; 783219820Sjeff}; 784219820Sjeff 785255932Salfredstruct mlx4_msix_ctl { 786255932Salfred u64 pool_bm; 787255932Salfred struct mutex pool_lock; 788255932Salfred}; 789219820Sjeff 790255932Salfredstruct mlx4_steer { 791255932Salfred struct list_head promisc_qps[MLX4_NUM_STEERS]; 792255932Salfred struct list_head steer_entries[MLX4_NUM_STEERS]; 793255932Salfred}; 794255932Salfred 795272407Shselaskyenum { 796272407Shselasky MLX4_PCI_DEV_IS_VF = 1 << 0, 797272407Shselasky MLX4_PCI_DEV_FORCE_SENSE_PORT = 1 << 1, 798255932Salfred}; 799255932Salfred 800272407Shselaskystruct mlx4_roce_gid_entry { 801272407Shselasky u8 raw[16]; 802272407Shselasky}; 803255932Salfred 804272407Shselaskystruct counter_index { 805272407Shselasky struct list_head list; 806272407Shselasky u32 index; 807272407Shselasky}; 808255932Salfred 809272407Shselaskystruct mlx4_counters { 810272407Shselasky struct mlx4_bitmap bitmap; 811272407Shselasky struct list_head global_port_list[MLX4_MAX_PORTS]; 812272407Shselasky struct list_head vf_list[MLX4_MAX_NUM_VF][MLX4_MAX_PORTS]; 813272407Shselasky struct mutex mutex; 814255932Salfred}; 815255932Salfred 816255932Salfredenum { 817272407Shselasky MLX4_NO_RR = 0, 818272407Shselasky MLX4_USE_RR = 1, 819255932Salfred}; 820255932Salfred 821219820Sjeffstruct mlx4_priv { 822219820Sjeff struct mlx4_dev dev; 823219820Sjeff 824219820Sjeff struct list_head dev_list; 825219820Sjeff struct list_head ctx_list; 826219820Sjeff spinlock_t ctx_lock; 827219820Sjeff 828255932Salfred int pci_dev_data; 829255932Salfred 830219820Sjeff struct list_head pgdir_list; 831219820Sjeff struct mutex pgdir_mutex; 832219820Sjeff 833219820Sjeff struct mlx4_fw fw; 834219820Sjeff struct mlx4_cmd cmd; 835255932Salfred struct mlx4_mfunc mfunc; 836219820Sjeff 837219820Sjeff struct mlx4_bitmap pd_bitmap; 838219820Sjeff struct mlx4_bitmap xrcd_bitmap; 839219820Sjeff struct mlx4_uar_table uar_table; 840219820Sjeff struct mlx4_mr_table mr_table; 841219820Sjeff struct mlx4_cq_table cq_table; 842219820Sjeff struct mlx4_eq_table eq_table; 843219820Sjeff struct mlx4_srq_table srq_table; 844219820Sjeff struct mlx4_qp_table qp_table; 845219820Sjeff struct mlx4_mcg_table mcg_table; 846272407Shselasky struct mlx4_counters counters_table; 847219820Sjeff 848219820Sjeff struct mlx4_catas_err catas_err; 849219820Sjeff 850219820Sjeff void __iomem *clr_base; 851219820Sjeff 852219820Sjeff struct mlx4_uar driver_uar; 853219820Sjeff void __iomem *kar; 854219820Sjeff struct mlx4_port_info port[MLX4_MAX_PORTS + 1]; 855292107Shselasky struct mlx4_hca_info hca_info; 856219820Sjeff struct mlx4_sense sense; 857219820Sjeff struct mutex port_mutex; 858255932Salfred struct mlx4_msix_ctl msix_ctl; 859255932Salfred struct mlx4_steer *steer; 860255932Salfred struct list_head bf_list; 861255932Salfred struct mutex bf_mutex; 862255932Salfred struct io_mapping *bf_mapping; 863255932Salfred void __iomem *clock_mapping; 864255932Salfred int reserved_mtts; 865255932Salfred int fs_hash_mode; 866255932Salfred u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS]; 867255932Salfred __be64 slave_node_guids[MLX4_MFUNC_MAX]; 868255932Salfred struct mlx4_roce_gid_entry roce_gids[MLX4_MAX_PORTS][128]; 869255932Salfred atomic_t opreq_count; 870255932Salfred struct work_struct opreq_task; 871219820Sjeff}; 872219820Sjeff 873219820Sjeffstatic inline struct mlx4_priv *mlx4_priv(struct mlx4_dev *dev) 874219820Sjeff{ 875219820Sjeff return container_of(dev, struct mlx4_priv, dev); 876219820Sjeff} 877219820Sjeff 878219820Sjeff#define MLX4_SENSE_RANGE (HZ * 3) 879219820Sjeff 880219820Sjeffextern struct workqueue_struct *mlx4_wq; 881219820Sjeff 882219820Sjeffu32 mlx4_bitmap_alloc(struct mlx4_bitmap *bitmap); 883272407Shselaskyvoid mlx4_bitmap_free(struct mlx4_bitmap *bitmap, u32 obj, int use_rr); 884255932Salfredu32 mlx4_bitmap_alloc_range(struct mlx4_bitmap *bitmap, int cnt, 885255932Salfred int align, u32 skip_mask); 886272407Shselaskyvoid mlx4_bitmap_free_range(struct mlx4_bitmap *bitmap, u32 obj, int cnt, 887272407Shselasky int use_rr); 888219820Sjeffu32 mlx4_bitmap_avail(struct mlx4_bitmap *bitmap); 889219820Sjeffint mlx4_bitmap_init(struct mlx4_bitmap *bitmap, u32 num, u32 mask, 890219820Sjeff u32 reserved_bot, u32 resetrved_top); 891219820Sjeffvoid mlx4_bitmap_cleanup(struct mlx4_bitmap *bitmap); 892219820Sjeff 893219820Sjeffint mlx4_reset(struct mlx4_dev *dev); 894219820Sjeff 895219820Sjeffint mlx4_alloc_eq_table(struct mlx4_dev *dev); 896219820Sjeffvoid mlx4_free_eq_table(struct mlx4_dev *dev); 897219820Sjeff 898219820Sjeffint mlx4_init_pd_table(struct mlx4_dev *dev); 899219820Sjeffint mlx4_init_xrcd_table(struct mlx4_dev *dev); 900219820Sjeffint mlx4_init_uar_table(struct mlx4_dev *dev); 901219820Sjeffint mlx4_init_mr_table(struct mlx4_dev *dev); 902219820Sjeffint mlx4_init_eq_table(struct mlx4_dev *dev); 903219820Sjeffint mlx4_init_cq_table(struct mlx4_dev *dev); 904219820Sjeffint mlx4_init_qp_table(struct mlx4_dev *dev); 905219820Sjeffint mlx4_init_srq_table(struct mlx4_dev *dev); 906219820Sjeffint mlx4_init_mcg_table(struct mlx4_dev *dev); 907219820Sjeff 908219820Sjeffvoid mlx4_cleanup_pd_table(struct mlx4_dev *dev); 909255932Salfredvoid mlx4_cleanup_xrcd_table(struct mlx4_dev *dev); 910219820Sjeffvoid mlx4_cleanup_uar_table(struct mlx4_dev *dev); 911219820Sjeffvoid mlx4_cleanup_mr_table(struct mlx4_dev *dev); 912219820Sjeffvoid mlx4_cleanup_eq_table(struct mlx4_dev *dev); 913219820Sjeffvoid mlx4_cleanup_cq_table(struct mlx4_dev *dev); 914219820Sjeffvoid mlx4_cleanup_qp_table(struct mlx4_dev *dev); 915219820Sjeffvoid mlx4_cleanup_srq_table(struct mlx4_dev *dev); 916219820Sjeffvoid mlx4_cleanup_mcg_table(struct mlx4_dev *dev); 917255932Salfredint __mlx4_qp_alloc_icm(struct mlx4_dev *dev, int qpn); 918255932Salfredvoid __mlx4_qp_free_icm(struct mlx4_dev *dev, int qpn); 919255932Salfredint __mlx4_cq_alloc_icm(struct mlx4_dev *dev, int *cqn); 920255932Salfredvoid __mlx4_cq_free_icm(struct mlx4_dev *dev, int cqn); 921255932Salfredint __mlx4_srq_alloc_icm(struct mlx4_dev *dev, int *srqn); 922255932Salfredvoid __mlx4_srq_free_icm(struct mlx4_dev *dev, int srqn); 923272407Shselaskyint __mlx4_mpt_reserve(struct mlx4_dev *dev); 924272407Shselaskyvoid __mlx4_mpt_release(struct mlx4_dev *dev, u32 index); 925272407Shselaskyint __mlx4_mpt_alloc_icm(struct mlx4_dev *dev, u32 index); 926272407Shselaskyvoid __mlx4_mpt_free_icm(struct mlx4_dev *dev, u32 index); 927255932Salfredu32 __mlx4_alloc_mtt_range(struct mlx4_dev *dev, int order); 928255932Salfredvoid __mlx4_free_mtt_range(struct mlx4_dev *dev, u32 first_seg, int order); 929219820Sjeff 930255932Salfredint mlx4_WRITE_MTT_wrapper(struct mlx4_dev *dev, int slave, 931255932Salfred struct mlx4_vhcr *vhcr, 932255932Salfred struct mlx4_cmd_mailbox *inbox, 933255932Salfred struct mlx4_cmd_mailbox *outbox, 934255932Salfred struct mlx4_cmd_info *cmd); 935255932Salfredint mlx4_SYNC_TPT_wrapper(struct mlx4_dev *dev, int slave, 936255932Salfred struct mlx4_vhcr *vhcr, 937255932Salfred struct mlx4_cmd_mailbox *inbox, 938255932Salfred struct mlx4_cmd_mailbox *outbox, 939255932Salfred struct mlx4_cmd_info *cmd); 940255932Salfredint mlx4_SW2HW_MPT_wrapper(struct mlx4_dev *dev, int slave, 941255932Salfred struct mlx4_vhcr *vhcr, 942255932Salfred struct mlx4_cmd_mailbox *inbox, 943255932Salfred struct mlx4_cmd_mailbox *outbox, 944255932Salfred struct mlx4_cmd_info *cmd); 945255932Salfredint mlx4_HW2SW_MPT_wrapper(struct mlx4_dev *dev, int slave, 946255932Salfred struct mlx4_vhcr *vhcr, 947255932Salfred struct mlx4_cmd_mailbox *inbox, 948255932Salfred struct mlx4_cmd_mailbox *outbox, 949255932Salfred struct mlx4_cmd_info *cmd); 950255932Salfredint mlx4_QUERY_MPT_wrapper(struct mlx4_dev *dev, int slave, 951255932Salfred struct mlx4_vhcr *vhcr, 952255932Salfred struct mlx4_cmd_mailbox *inbox, 953255932Salfred struct mlx4_cmd_mailbox *outbox, 954255932Salfred struct mlx4_cmd_info *cmd); 955255932Salfredint mlx4_SW2HW_EQ_wrapper(struct mlx4_dev *dev, int slave, 956255932Salfred struct mlx4_vhcr *vhcr, 957255932Salfred struct mlx4_cmd_mailbox *inbox, 958255932Salfred struct mlx4_cmd_mailbox *outbox, 959255932Salfred struct mlx4_cmd_info *cmd); 960255932Salfredint mlx4_DMA_wrapper(struct mlx4_dev *dev, int slave, 961255932Salfred struct mlx4_vhcr *vhcr, 962255932Salfred struct mlx4_cmd_mailbox *inbox, 963255932Salfred struct mlx4_cmd_mailbox *outbox, 964255932Salfred struct mlx4_cmd_info *cmd); 965255932Salfredint __mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, 966272407Shselasky int *base, u8 flags); 967255932Salfredvoid __mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt); 968255932Salfredint __mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac); 969255932Salfredvoid __mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac); 970255932Salfredint __mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, 971255932Salfred int start_index, int npages, u64 *page_list); 972272407Shselaskyint __mlx4_counter_alloc(struct mlx4_dev *dev, int slave, int port, u32 *idx); 973272407Shselaskyvoid __mlx4_counter_free(struct mlx4_dev *dev, int slave, int port, u32 idx); 974272407Shselasky 975272407Shselaskyint __mlx4_slave_counters_free(struct mlx4_dev *dev, int slave); 976272407Shselaskyint __mlx4_clear_if_stat(struct mlx4_dev *dev, 977272407Shselasky u8 counter_index); 978272407Shselaskyu8 mlx4_get_default_counter_index(struct mlx4_dev *dev, int slave, int port); 979272407Shselasky 980255932Salfredint __mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn); 981255932Salfredvoid __mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn); 982255932Salfred 983219820Sjeffvoid mlx4_start_catas_poll(struct mlx4_dev *dev); 984219820Sjeffvoid mlx4_stop_catas_poll(struct mlx4_dev *dev); 985219820Sjeffvoid mlx4_catas_init(void); 986219820Sjeffint mlx4_restart_one(struct pci_dev *pdev); 987219820Sjeffint mlx4_register_device(struct mlx4_dev *dev); 988219820Sjeffvoid mlx4_unregister_device(struct mlx4_dev *dev); 989255932Salfredvoid mlx4_dispatch_event(struct mlx4_dev *dev, enum mlx4_dev_event type, 990255932Salfred unsigned long param); 991219820Sjeff 992219820Sjeffstruct mlx4_dev_cap; 993219820Sjeffstruct mlx4_init_hca_param; 994219820Sjeff 995219820Sjeffu64 mlx4_make_profile(struct mlx4_dev *dev, 996219820Sjeff struct mlx4_profile *request, 997219820Sjeff struct mlx4_dev_cap *dev_cap, 998219820Sjeff struct mlx4_init_hca_param *init_hca); 999255932Salfredvoid mlx4_master_comm_channel(struct work_struct *work); 1000272407Shselaskyvoid mlx4_master_arm_comm_channel(struct work_struct *work); 1001255932Salfredvoid mlx4_gen_slave_eqe(struct work_struct *work); 1002255932Salfredvoid mlx4_master_handle_slave_flr(struct work_struct *work); 1003219820Sjeff 1004255932Salfredint mlx4_ALLOC_RES_wrapper(struct mlx4_dev *dev, int slave, 1005255932Salfred struct mlx4_vhcr *vhcr, 1006255932Salfred struct mlx4_cmd_mailbox *inbox, 1007255932Salfred struct mlx4_cmd_mailbox *outbox, 1008255932Salfred struct mlx4_cmd_info *cmd); 1009255932Salfredint mlx4_FREE_RES_wrapper(struct mlx4_dev *dev, int slave, 1010255932Salfred struct mlx4_vhcr *vhcr, 1011255932Salfred struct mlx4_cmd_mailbox *inbox, 1012255932Salfred struct mlx4_cmd_mailbox *outbox, 1013255932Salfred struct mlx4_cmd_info *cmd); 1014255932Salfredint mlx4_MAP_EQ_wrapper(struct mlx4_dev *dev, int slave, 1015255932Salfred struct mlx4_vhcr *vhcr, struct mlx4_cmd_mailbox *inbox, 1016255932Salfred struct mlx4_cmd_mailbox *outbox, 1017255932Salfred struct mlx4_cmd_info *cmd); 1018255932Salfredint mlx4_COMM_INT_wrapper(struct mlx4_dev *dev, int slave, 1019255932Salfred struct mlx4_vhcr *vhcr, 1020255932Salfred struct mlx4_cmd_mailbox *inbox, 1021255932Salfred struct mlx4_cmd_mailbox *outbox, 1022255932Salfred struct mlx4_cmd_info *cmd); 1023255932Salfredint mlx4_HW2SW_EQ_wrapper(struct mlx4_dev *dev, int slave, 1024255932Salfred struct mlx4_vhcr *vhcr, 1025255932Salfred struct mlx4_cmd_mailbox *inbox, 1026255932Salfred struct mlx4_cmd_mailbox *outbox, 1027255932Salfred struct mlx4_cmd_info *cmd); 1028255932Salfredint mlx4_QUERY_EQ_wrapper(struct mlx4_dev *dev, int slave, 1029255932Salfred struct mlx4_vhcr *vhcr, 1030255932Salfred struct mlx4_cmd_mailbox *inbox, 1031255932Salfred struct mlx4_cmd_mailbox *outbox, 1032255932Salfred struct mlx4_cmd_info *cmd); 1033255932Salfredint mlx4_SW2HW_CQ_wrapper(struct mlx4_dev *dev, int slave, 1034255932Salfred struct mlx4_vhcr *vhcr, 1035255932Salfred struct mlx4_cmd_mailbox *inbox, 1036255932Salfred struct mlx4_cmd_mailbox *outbox, 1037255932Salfred struct mlx4_cmd_info *cmd); 1038255932Salfredint mlx4_HW2SW_CQ_wrapper(struct mlx4_dev *dev, int slave, 1039255932Salfred struct mlx4_vhcr *vhcr, 1040255932Salfred struct mlx4_cmd_mailbox *inbox, 1041255932Salfred struct mlx4_cmd_mailbox *outbox, 1042255932Salfred struct mlx4_cmd_info *cmd); 1043255932Salfredint mlx4_QUERY_CQ_wrapper(struct mlx4_dev *dev, int slave, 1044255932Salfred struct mlx4_vhcr *vhcr, 1045255932Salfred struct mlx4_cmd_mailbox *inbox, 1046255932Salfred struct mlx4_cmd_mailbox *outbox, 1047255932Salfred struct mlx4_cmd_info *cmd); 1048255932Salfredint mlx4_MODIFY_CQ_wrapper(struct mlx4_dev *dev, int slave, 1049255932Salfred struct mlx4_vhcr *vhcr, 1050255932Salfred struct mlx4_cmd_mailbox *inbox, 1051255932Salfred struct mlx4_cmd_mailbox *outbox, 1052255932Salfred struct mlx4_cmd_info *cmd); 1053255932Salfredint mlx4_SW2HW_SRQ_wrapper(struct mlx4_dev *dev, int slave, 1054255932Salfred struct mlx4_vhcr *vhcr, 1055255932Salfred struct mlx4_cmd_mailbox *inbox, 1056255932Salfred struct mlx4_cmd_mailbox *outbox, 1057255932Salfred struct mlx4_cmd_info *cmd); 1058255932Salfredint mlx4_HW2SW_SRQ_wrapper(struct mlx4_dev *dev, int slave, 1059255932Salfred struct mlx4_vhcr *vhcr, 1060255932Salfred struct mlx4_cmd_mailbox *inbox, 1061255932Salfred struct mlx4_cmd_mailbox *outbox, 1062255932Salfred struct mlx4_cmd_info *cmd); 1063255932Salfredint mlx4_QUERY_SRQ_wrapper(struct mlx4_dev *dev, int slave, 1064255932Salfred struct mlx4_vhcr *vhcr, 1065255932Salfred struct mlx4_cmd_mailbox *inbox, 1066255932Salfred struct mlx4_cmd_mailbox *outbox, 1067255932Salfred struct mlx4_cmd_info *cmd); 1068255932Salfredint mlx4_ARM_SRQ_wrapper(struct mlx4_dev *dev, int slave, 1069255932Salfred struct mlx4_vhcr *vhcr, 1070255932Salfred struct mlx4_cmd_mailbox *inbox, 1071255932Salfred struct mlx4_cmd_mailbox *outbox, 1072255932Salfred struct mlx4_cmd_info *cmd); 1073255932Salfredint mlx4_GEN_QP_wrapper(struct mlx4_dev *dev, int slave, 1074255932Salfred struct mlx4_vhcr *vhcr, 1075255932Salfred struct mlx4_cmd_mailbox *inbox, 1076255932Salfred struct mlx4_cmd_mailbox *outbox, 1077255932Salfred struct mlx4_cmd_info *cmd); 1078255932Salfredint mlx4_RST2INIT_QP_wrapper(struct mlx4_dev *dev, int slave, 1079255932Salfred struct mlx4_vhcr *vhcr, 1080255932Salfred struct mlx4_cmd_mailbox *inbox, 1081255932Salfred struct mlx4_cmd_mailbox *outbox, 1082255932Salfred struct mlx4_cmd_info *cmd); 1083255932Salfredint mlx4_INIT2INIT_QP_wrapper(struct mlx4_dev *dev, int slave, 1084255932Salfred struct mlx4_vhcr *vhcr, 1085255932Salfred struct mlx4_cmd_mailbox *inbox, 1086255932Salfred struct mlx4_cmd_mailbox *outbox, 1087255932Salfred struct mlx4_cmd_info *cmd); 1088255932Salfredint mlx4_INIT2RTR_QP_wrapper(struct mlx4_dev *dev, int slave, 1089255932Salfred struct mlx4_vhcr *vhcr, 1090255932Salfred struct mlx4_cmd_mailbox *inbox, 1091255932Salfred struct mlx4_cmd_mailbox *outbox, 1092255932Salfred struct mlx4_cmd_info *cmd); 1093255932Salfredint mlx4_RTR2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, 1094255932Salfred struct mlx4_vhcr *vhcr, 1095255932Salfred struct mlx4_cmd_mailbox *inbox, 1096255932Salfred struct mlx4_cmd_mailbox *outbox, 1097255932Salfred struct mlx4_cmd_info *cmd); 1098255932Salfredint mlx4_RTS2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, 1099255932Salfred struct mlx4_vhcr *vhcr, 1100255932Salfred struct mlx4_cmd_mailbox *inbox, 1101255932Salfred struct mlx4_cmd_mailbox *outbox, 1102255932Salfred struct mlx4_cmd_info *cmd); 1103255932Salfredint mlx4_SQERR2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, 1104255932Salfred struct mlx4_vhcr *vhcr, 1105255932Salfred struct mlx4_cmd_mailbox *inbox, 1106255932Salfred struct mlx4_cmd_mailbox *outbox, 1107255932Salfred struct mlx4_cmd_info *cmd); 1108255932Salfredint mlx4_2ERR_QP_wrapper(struct mlx4_dev *dev, int slave, 1109255932Salfred struct mlx4_vhcr *vhcr, 1110255932Salfred struct mlx4_cmd_mailbox *inbox, 1111255932Salfred struct mlx4_cmd_mailbox *outbox, 1112255932Salfred struct mlx4_cmd_info *cmd); 1113255932Salfredint mlx4_RTS2SQD_QP_wrapper(struct mlx4_dev *dev, int slave, 1114255932Salfred struct mlx4_vhcr *vhcr, 1115255932Salfred struct mlx4_cmd_mailbox *inbox, 1116255932Salfred struct mlx4_cmd_mailbox *outbox, 1117255932Salfred struct mlx4_cmd_info *cmd); 1118255932Salfredint mlx4_SQD2SQD_QP_wrapper(struct mlx4_dev *dev, int slave, 1119255932Salfred struct mlx4_vhcr *vhcr, 1120255932Salfred struct mlx4_cmd_mailbox *inbox, 1121255932Salfred struct mlx4_cmd_mailbox *outbox, 1122255932Salfred struct mlx4_cmd_info *cmd); 1123255932Salfredint mlx4_SQD2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, 1124255932Salfred struct mlx4_vhcr *vhcr, 1125255932Salfred struct mlx4_cmd_mailbox *inbox, 1126255932Salfred struct mlx4_cmd_mailbox *outbox, 1127255932Salfred struct mlx4_cmd_info *cmd); 1128255932Salfredint mlx4_2RST_QP_wrapper(struct mlx4_dev *dev, int slave, 1129255932Salfred struct mlx4_vhcr *vhcr, 1130255932Salfred struct mlx4_cmd_mailbox *inbox, 1131255932Salfred struct mlx4_cmd_mailbox *outbox, 1132255932Salfred struct mlx4_cmd_info *cmd); 1133255932Salfredint mlx4_QUERY_QP_wrapper(struct mlx4_dev *dev, int slave, 1134255932Salfred struct mlx4_vhcr *vhcr, 1135255932Salfred struct mlx4_cmd_mailbox *inbox, 1136255932Salfred struct mlx4_cmd_mailbox *outbox, 1137255932Salfred struct mlx4_cmd_info *cmd); 1138255932Salfred 1139255932Salfredint mlx4_GEN_EQE(struct mlx4_dev *dev, int slave, struct mlx4_eqe *eqe); 1140255932Salfred 1141219820Sjeffint mlx4_cmd_init(struct mlx4_dev *dev); 1142219820Sjeffvoid mlx4_cmd_cleanup(struct mlx4_dev *dev); 1143255932Salfredint mlx4_multi_func_init(struct mlx4_dev *dev); 1144255932Salfredvoid mlx4_multi_func_cleanup(struct mlx4_dev *dev); 1145219820Sjeffvoid mlx4_cmd_event(struct mlx4_dev *dev, u16 token, u8 status, u64 out_param); 1146219820Sjeffint mlx4_cmd_use_events(struct mlx4_dev *dev); 1147219820Sjeffvoid mlx4_cmd_use_polling(struct mlx4_dev *dev); 1148219820Sjeff 1149255932Salfredint mlx4_comm_cmd(struct mlx4_dev *dev, u8 cmd, u16 param, 1150255932Salfred unsigned long timeout); 1151255932Salfred 1152219820Sjeffvoid mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn); 1153219820Sjeffvoid mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type); 1154219820Sjeff 1155219820Sjeffvoid mlx4_qp_event(struct mlx4_dev *dev, u32 qpn, int event_type); 1156219820Sjeff 1157219820Sjeffvoid mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type); 1158219820Sjeff 1159219820Sjeffvoid mlx4_handle_catas_err(struct mlx4_dev *dev); 1160219820Sjeff 1161255932Salfredint mlx4_SENSE_PORT(struct mlx4_dev *dev, int port, 1162255932Salfred enum mlx4_port_type *type); 1163219820Sjeffvoid mlx4_do_sense_ports(struct mlx4_dev *dev, 1164219820Sjeff enum mlx4_port_type *stype, 1165219820Sjeff enum mlx4_port_type *defaults); 1166219820Sjeffvoid mlx4_start_sense(struct mlx4_dev *dev); 1167219820Sjeffvoid mlx4_stop_sense(struct mlx4_dev *dev); 1168272407Shselaskyvoid mlx4_sense_init(struct mlx4_dev *dev); 1169219820Sjeffint mlx4_check_port_params(struct mlx4_dev *dev, 1170219820Sjeff enum mlx4_port_type *port_type); 1171219820Sjeffint mlx4_change_port_types(struct mlx4_dev *dev, 1172219820Sjeff enum mlx4_port_type *port_types); 1173219820Sjeff 1174219820Sjeffvoid mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table); 1175219820Sjeffvoid mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table); 1176255932Salfredvoid __mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan); 1177255932Salfredint __mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index); 1178219820Sjeff 1179255932Salfredint mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_sz); 1180255932Salfred/* resource tracker functions*/ 1181255932Salfredint mlx4_get_slave_from_resource_id(struct mlx4_dev *dev, 1182255932Salfred enum mlx4_resource resource_type, 1183255932Salfred u64 resource_id, int *slave); 1184255932Salfredvoid mlx4_delete_all_resources_for_slave(struct mlx4_dev *dev, int slave_id); 1185255932Salfredint mlx4_init_resource_tracker(struct mlx4_dev *dev); 1186255932Salfred 1187255932Salfredvoid mlx4_free_resource_tracker(struct mlx4_dev *dev, 1188255932Salfred enum mlx4_res_tracker_free_type type); 1189255932Salfred 1190255932Salfredint mlx4_QUERY_FW_wrapper(struct mlx4_dev *dev, int slave, 1191255932Salfred struct mlx4_vhcr *vhcr, 1192255932Salfred struct mlx4_cmd_mailbox *inbox, 1193255932Salfred struct mlx4_cmd_mailbox *outbox, 1194255932Salfred struct mlx4_cmd_info *cmd); 1195255932Salfredint mlx4_SET_PORT_wrapper(struct mlx4_dev *dev, int slave, 1196255932Salfred struct mlx4_vhcr *vhcr, 1197255932Salfred struct mlx4_cmd_mailbox *inbox, 1198255932Salfred struct mlx4_cmd_mailbox *outbox, 1199255932Salfred struct mlx4_cmd_info *cmd); 1200255932Salfredint mlx4_INIT_PORT_wrapper(struct mlx4_dev *dev, int slave, 1201255932Salfred struct mlx4_vhcr *vhcr, 1202255932Salfred struct mlx4_cmd_mailbox *inbox, 1203255932Salfred struct mlx4_cmd_mailbox *outbox, 1204255932Salfred struct mlx4_cmd_info *cmd); 1205255932Salfredint mlx4_CLOSE_PORT_wrapper(struct mlx4_dev *dev, int slave, 1206255932Salfred struct mlx4_vhcr *vhcr, 1207255932Salfred struct mlx4_cmd_mailbox *inbox, 1208255932Salfred struct mlx4_cmd_mailbox *outbox, 1209255932Salfred struct mlx4_cmd_info *cmd); 1210255932Salfredint mlx4_QUERY_DEV_CAP_wrapper(struct mlx4_dev *dev, int slave, 1211255932Salfred struct mlx4_vhcr *vhcr, 1212255932Salfred struct mlx4_cmd_mailbox *inbox, 1213255932Salfred struct mlx4_cmd_mailbox *outbox, 1214255932Salfred struct mlx4_cmd_info *cmd); 1215255932Salfredint mlx4_QUERY_PORT_wrapper(struct mlx4_dev *dev, int slave, 1216255932Salfred struct mlx4_vhcr *vhcr, 1217255932Salfred struct mlx4_cmd_mailbox *inbox, 1218255932Salfred struct mlx4_cmd_mailbox *outbox, 1219255932Salfred struct mlx4_cmd_info *cmd); 1220219820Sjeffint mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps); 1221219820Sjeff 1222255932Salfredint mlx4_get_slave_pkey_gid_tbl_len(struct mlx4_dev *dev, u8 port, 1223255932Salfred int *gid_tbl_len, int *pkey_tbl_len); 1224255932Salfred 1225255932Salfredint mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave, 1226255932Salfred struct mlx4_vhcr *vhcr, 1227255932Salfred struct mlx4_cmd_mailbox *inbox, 1228255932Salfred struct mlx4_cmd_mailbox *outbox, 1229255932Salfred struct mlx4_cmd_info *cmd); 1230255932Salfred 1231255932Salfredint mlx4_PROMISC_wrapper(struct mlx4_dev *dev, int slave, 1232255932Salfred struct mlx4_vhcr *vhcr, 1233255932Salfred struct mlx4_cmd_mailbox *inbox, 1234255932Salfred struct mlx4_cmd_mailbox *outbox, 1235255932Salfred struct mlx4_cmd_info *cmd); 1236255932Salfredint mlx4_qp_detach_common(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], 1237255932Salfred enum mlx4_protocol prot, enum mlx4_steer_type steer); 1238255932Salfredint mlx4_qp_attach_common(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], 1239255932Salfred int block_mcast_loopback, enum mlx4_protocol prot, 1240255932Salfred enum mlx4_steer_type steer); 1241272407Shselaskyint mlx4_trans_to_dmfs_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, 1242272407Shselasky u8 gid[16], u8 port, 1243272407Shselasky int block_mcast_loopback, 1244272407Shselasky enum mlx4_protocol prot, u64 *reg_id); 1245273379Shselaskyint mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, u64 mac, u64 clear, u8 mode); 1246255932Salfredint mlx4_SET_MCAST_FLTR_wrapper(struct mlx4_dev *dev, int slave, 1247255932Salfred struct mlx4_vhcr *vhcr, 1248255932Salfred struct mlx4_cmd_mailbox *inbox, 1249255932Salfred struct mlx4_cmd_mailbox *outbox, 1250255932Salfred struct mlx4_cmd_info *cmd); 1251255932Salfredint mlx4_SET_VLAN_FLTR_wrapper(struct mlx4_dev *dev, int slave, 1252255932Salfred struct mlx4_vhcr *vhcr, 1253255932Salfred struct mlx4_cmd_mailbox *inbox, 1254255932Salfred struct mlx4_cmd_mailbox *outbox, 1255255932Salfred struct mlx4_cmd_info *cmd); 1256255932Salfredint mlx4_common_set_vlan_fltr(struct mlx4_dev *dev, int function, 1257255932Salfred int port, void *buf); 1258255932Salfredint mlx4_DUMP_ETH_STATS_wrapper(struct mlx4_dev *dev, int slave, 1259255932Salfred struct mlx4_vhcr *vhcr, 1260255932Salfred struct mlx4_cmd_mailbox *inbox, 1261255932Salfred struct mlx4_cmd_mailbox *outbox, 1262255932Salfred struct mlx4_cmd_info *cmd); 1263255932Salfredint mlx4_PKEY_TABLE_wrapper(struct mlx4_dev *dev, int slave, 1264255932Salfred struct mlx4_vhcr *vhcr, 1265255932Salfred struct mlx4_cmd_mailbox *inbox, 1266255932Salfred struct mlx4_cmd_mailbox *outbox, 1267255932Salfred struct mlx4_cmd_info *cmd); 1268255932Salfredint mlx4_QUERY_IF_STAT_wrapper(struct mlx4_dev *dev, int slave, 1269255932Salfred struct mlx4_vhcr *vhcr, 1270255932Salfred struct mlx4_cmd_mailbox *inbox, 1271255932Salfred struct mlx4_cmd_mailbox *outbox, 1272255932Salfred struct mlx4_cmd_info *cmd); 1273255932Salfredint mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave, 1274255932Salfred struct mlx4_vhcr *vhcr, 1275255932Salfred struct mlx4_cmd_mailbox *inbox, 1276255932Salfred struct mlx4_cmd_mailbox *outbox, 1277255932Salfred struct mlx4_cmd_info *cmd); 1278255932Salfredint mlx4_QP_FLOW_STEERING_DETACH_wrapper(struct mlx4_dev *dev, int slave, 1279255932Salfred struct mlx4_vhcr *vhcr, 1280255932Salfred struct mlx4_cmd_mailbox *inbox, 1281255932Salfred struct mlx4_cmd_mailbox *outbox, 1282255932Salfred struct mlx4_cmd_info *cmd); 1283272407Shselaskyint mlx4_MOD_STAT_CFG_wrapper(struct mlx4_dev *dev, int slave, 1284272407Shselasky struct mlx4_vhcr *vhcr, 1285272407Shselasky struct mlx4_cmd_mailbox *inbox, 1286272407Shselasky struct mlx4_cmd_mailbox *outbox, 1287272407Shselasky struct mlx4_cmd_info *cmd); 1288255932Salfred 1289255932Salfredint mlx4_get_mgm_entry_size(struct mlx4_dev *dev); 1290255932Salfredint mlx4_get_qp_per_mgm(struct mlx4_dev *dev); 1291255932Salfred 1292255932Salfredstatic inline void set_param_l(u64 *arg, u32 val) 1293255932Salfred{ 1294255932Salfred *arg = (*arg & 0xffffffff00000000ULL) | (u64) val; 1295255932Salfred} 1296255932Salfred 1297255932Salfredstatic inline void set_param_h(u64 *arg, u32 val) 1298255932Salfred{ 1299255932Salfred *arg = (*arg & 0xffffffff) | ((u64) val << 32); 1300255932Salfred} 1301255932Salfred 1302255932Salfredstatic inline u32 get_param_l(u64 *arg) 1303255932Salfred{ 1304255932Salfred return (u32) (*arg & 0xffffffff); 1305255932Salfred} 1306255932Salfred 1307255932Salfredstatic inline u32 get_param_h(u64 *arg) 1308255932Salfred{ 1309255932Salfred return (u32)(*arg >> 32); 1310255932Salfred} 1311255932Salfred 1312255932Salfredstatic inline spinlock_t *mlx4_tlock(struct mlx4_dev *dev) 1313255932Salfred{ 1314255932Salfred return &mlx4_priv(dev)->mfunc.master.res_tracker.lock; 1315255932Salfred} 1316255932Salfred 1317255932Salfred#define NOT_MASKED_PD_BITS 17 1318255932Salfred 1319255932Salfredvoid sys_tune_init(void); 1320255932Salfredvoid sys_tune_fini(void); 1321255932Salfred 1322255932Salfredvoid mlx4_init_quotas(struct mlx4_dev *dev); 1323255932Salfred 1324255932Salfredint mlx4_get_slave_num_gids(struct mlx4_dev *dev, int slave); 1325255932Salfredint mlx4_get_base_gid_ix(struct mlx4_dev *dev, int slave); 1326272407Shselaskyvoid mlx4_vf_immed_vlan_work_handler(struct work_struct *_work); 1327255932Salfred 1328219820Sjeff#endif /* MLX4_H */ 1329