uart_cpu_xlp.c revision 225394
1225394Sjchandra/*-
2225394Sjchandra * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
3225394Sjchandra * reserved.
4225394Sjchandra *
5225394Sjchandra * Redistribution and use in source and binary forms, with or without
6225394Sjchandra * modification, are permitted provided that the following conditions are
7225394Sjchandra * met:
8225394Sjchandra *
9225394Sjchandra * 1. Redistributions of source code must retain the above copyright
10225394Sjchandra *    notice, this list of conditions and the following disclaimer.
11225394Sjchandra * 2. Redistributions in binary form must reproduce the above copyright
12225394Sjchandra *    notice, this list of conditions and the following disclaimer in
13225394Sjchandra *    the documentation and/or other materials provided with the
14225394Sjchandra *    distribution.
15225394Sjchandra *
16225394Sjchandra * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
17225394Sjchandra * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18225394Sjchandra * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19225394Sjchandra * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
20225394Sjchandra * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21225394Sjchandra * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22225394Sjchandra * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23225394Sjchandra * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24225394Sjchandra * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25225394Sjchandra * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26225394Sjchandra * THE POSSIBILITY OF SUCH DAMAGE.
27225394Sjchandra *
28225394Sjchandra * NETLOGIC_BSD */
29225394Sjchandra
30225394Sjchandra/*
31225394Sjchandra * Skeleton of this file was based on respective code for ARM
32225394Sjchandra * code written by Olivier Houchard.
33225394Sjchandra */
34225394Sjchandra/*
35225394Sjchandra * XLRMIPS: This file is hacked from arm/...
36225394Sjchandra */
37225394Sjchandra#include "opt_uart.h"
38225394Sjchandra
39225394Sjchandra#include <sys/cdefs.h>
40225394Sjchandra__FBSDID("$FreeBSD: head/sys/mips/nlm/uart_cpu_xlp.c 225394 2011-09-05 10:45:29Z jchandra $");
41225394Sjchandra
42225394Sjchandra#include <sys/param.h>
43225394Sjchandra#include <sys/systm.h>
44225394Sjchandra#include <sys/bus.h>
45225394Sjchandra#include <sys/cons.h>
46225394Sjchandra#include <sys/kdb.h>
47225394Sjchandra#include <sys/kernel.h>
48225394Sjchandra#include <sys/lock.h>
49225394Sjchandra#include <sys/mutex.h>
50225394Sjchandra
51225394Sjchandra#include <machine/bus.h>
52225394Sjchandra
53225394Sjchandra#include <dev/uart/uart.h>
54225394Sjchandra#include <dev/uart/uart_cpu.h>
55225394Sjchandra
56225394Sjchandra#include <mips/nlm/hal/haldefs.h>
57225394Sjchandra#include <mips/nlm/hal/iomap.h>
58225394Sjchandra#include <mips/nlm/hal/uart.h>
59225394Sjchandra
60225394Sjchandrabus_space_tag_t uart_bus_space_io;
61225394Sjchandrabus_space_tag_t uart_bus_space_mem;
62225394Sjchandra
63225394Sjchandra/*
64225394Sjchandra * need a special bus space for this, because the Netlogic SoC
65225394Sjchandra * UART allows only 32 bit access to its registers
66225394Sjchandra */
67225394Sjchandrastatic struct bus_space nlm_uart_bussp;
68225394Sjchandra
69225394Sjchandrastatic u_int8_t
70225394Sjchandranlm_uart_bussp_read_1(void *tag, bus_space_handle_t handle,
71225394Sjchandra    bus_size_t offset)
72225394Sjchandra{
73225394Sjchandra	return (u_int8_t)(*(volatile u_int32_t *)(handle + offset));
74225394Sjchandra}
75225394Sjchandra
76225394Sjchandrastatic void
77225394Sjchandranlm_uart_bussp_write_1(void *tag, bus_space_handle_t handle,
78225394Sjchandra    bus_size_t offset, u_int8_t value)
79225394Sjchandra{
80225394Sjchandra	*(volatile u_int32_t *)(handle + offset) =  value;
81225394Sjchandra}
82225394Sjchandra
83225394Sjchandraint
84225394Sjchandrauart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
85225394Sjchandra{
86225394Sjchandra	return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
87225394Sjchandra}
88225394Sjchandra
89225394Sjchandraint
90225394Sjchandrauart_cpu_getdev(int devtype, struct uart_devinfo *di)
91225394Sjchandra{
92225394Sjchandra	/* Create custom bus space */
93225394Sjchandra	memcpy(&nlm_uart_bussp, rmi_bus_space, sizeof(nlm_uart_bussp));
94225394Sjchandra	nlm_uart_bussp.bs_r_1 = nlm_uart_bussp_read_1;
95225394Sjchandra	nlm_uart_bussp.bs_w_1 = nlm_uart_bussp_write_1;
96225394Sjchandra
97225394Sjchandra	di->ops = uart_getops(&uart_ns8250_class);
98225394Sjchandra	di->bas.chan = 0;
99225394Sjchandra	di->bas.bst = &nlm_uart_bussp;
100225394Sjchandra	di->bas.bsh = nlm_get_uart_regbase(0, 0);
101225394Sjchandra
102225394Sjchandra	di->bas.regshft = 2;
103225394Sjchandra	/* divisor = rclk / (baudrate * 16); */
104225394Sjchandra	di->bas.rclk = 133000000;
105225394Sjchandra	di->baudrate = 115200;
106225394Sjchandra	di->databits = 8;
107225394Sjchandra	di->stopbits = 1;
108225394Sjchandra	di->parity = UART_PARITY_NONE;
109225394Sjchandra
110225394Sjchandra	uart_bus_space_io = NULL;
111225394Sjchandra	uart_bus_space_mem = &nlm_uart_bussp;
112225394Sjchandra	return (0);
113225394Sjchandra}
114