1225394Sjchandra/*- 2225394Sjchandra * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights 3225394Sjchandra * reserved. 4225394Sjchandra * 5225394Sjchandra * Redistribution and use in source and binary forms, with or without 6225394Sjchandra * modification, are permitted provided that the following conditions are 7225394Sjchandra * met: 8225394Sjchandra * 9225394Sjchandra * 1. Redistributions of source code must retain the above copyright 10225394Sjchandra * notice, this list of conditions and the following disclaimer. 11225394Sjchandra * 2. Redistributions in binary form must reproduce the above copyright 12225394Sjchandra * notice, this list of conditions and the following disclaimer in 13225394Sjchandra * the documentation and/or other materials provided with the 14225394Sjchandra * distribution. 15225394Sjchandra * 16225394Sjchandra * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND 17225394Sjchandra * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18225394Sjchandra * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19225394Sjchandra * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE 20225394Sjchandra * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21225394Sjchandra * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22225394Sjchandra * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23225394Sjchandra * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24225394Sjchandra * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25225394Sjchandra * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26225394Sjchandra * THE POSSIBILITY OF SUCH DAMAGE. 27225394Sjchandra * 28225394Sjchandra * NETLOGIC_BSD 29225394Sjchandra * $FreeBSD: releng/10.3/sys/mips/nlm/hal/usb.h 225394 2011-09-05 10:45:29Z jchandra $ 30225394Sjchandra */ 31225394Sjchandra 32225394Sjchandra#ifndef __NLM_USB_H__ 33225394Sjchandra#define __NLM_USB_H__ 34225394Sjchandra 35225394Sjchandra#define USB_CTL_0 0x01 36225394Sjchandra#define USB_PHY_0 0x0A 37225394Sjchandra#define USB_PHY_RESET 0x01 38225394Sjchandra#define USB_PHY_PORT_RESET_0 0x10 39225394Sjchandra#define USB_PHY_PORT_RESET_1 0x20 40225394Sjchandra#define USB_CONTROLLER_RESET 0x01 41225394Sjchandra#define USB_INT_STATUS 0x0E 42225394Sjchandra#define USB_INT_EN 0x0F 43225394Sjchandra#define USB_PHY_INTERRUPT_EN 0x01 44225394Sjchandra#define USB_OHCI_INTERRUPT_EN 0x02 45225394Sjchandra#define USB_OHCI_INTERRUPT1_EN 0x04 46225394Sjchandra#define USB_OHCI_INTERRUPT2_EN 0x08 47225394Sjchandra#define USB_CTRL_INTERRUPT_EN 0x10 48225394Sjchandra 49225394Sjchandra 50225394Sjchandra#if !defined(LOCORE) && !defined(__ASSEMBLY__) 51225394Sjchandra 52225394Sjchandra#define nlm_read_usb_reg(b, r) nlm_read_reg(b,r) 53225394Sjchandra#define nlm_write_usb_reg(b, r, v) nlm_write_reg(b,r,v) 54225394Sjchandra#define nlm_get_usb_pcibase(node, inst) nlm_pcicfg_base(XLP_IO_USB_OFFSET(node, inst)) 55225394Sjchandra#define nlm_get_usb_hcd_base(node, inst) nlm_xkphys_map_pcibar0(nlm_get_usb_pcibase(node, inst)) 56225394Sjchandra#define nlm_get_usb_regbase(node, inst) (nlm_get_usb_pcibase(node, inst) + XLP_IO_PCI_HDRSZ) 57225394Sjchandra 58225394Sjchandra#endif 59225394Sjchandra#endif 60