1/*- 2 * Copyright (c) 2004 Juli Mallett <jmallett@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: releng/10.3/sys/mips/include/intr_machdep.h 228982 2011-12-30 03:54:22Z marcel $ 27 */ 28 29#ifndef _MACHINE_INTR_MACHDEP_H_ 30#define _MACHINE_INTR_MACHDEP_H_ 31 32#include <machine/atomic.h> 33 34#if defined(CPU_RMI) || defined(CPU_NLM) 35#define XLR_MAX_INTR 64 36#else 37#define NHARD_IRQS 6 38#define NSOFT_IRQS 2 39#endif 40 41struct trapframe; 42 43void cpu_init_interrupts(void); 44void cpu_establish_hardintr(const char *, driver_filter_t *, driver_intr_t *, 45 void *, int, int, void **); 46void cpu_establish_softintr(const char *, driver_filter_t *, void (*)(void*), 47 void *, int, int, void **); 48void cpu_intr(struct trapframe *); 49 50/* 51 * Allow a platform to override the default hard interrupt mask and unmask 52 * functions. The 'arg' can be cast safely to an 'int' and holds the mips 53 * hard interrupt number to mask or unmask. 54 */ 55typedef void (*cpu_intr_mask_t)(void *arg); 56typedef void (*cpu_intr_unmask_t)(void *arg); 57void cpu_set_hardintr_mask_func(cpu_intr_mask_t func); 58void cpu_set_hardintr_unmask_func(cpu_intr_unmask_t func); 59 60/* 61 * Opaque datatype that represents intr counter 62 */ 63typedef unsigned long* mips_intrcnt_t; 64 65mips_intrcnt_t mips_intrcnt_create(const char *); 66void mips_intrcnt_setname(mips_intrcnt_t, const char *); 67 68static __inline void 69mips_intrcnt_inc(mips_intrcnt_t counter) 70{ 71 if (counter) 72 atomic_add_long(counter, 1); 73} 74#endif /* !_MACHINE_INTR_MACHDEP_H_ */ 75