ar71xx_gpio.c revision 234515 
1/*-
2 * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
3 * Copyright (c) 2009, Luiz Otavio O Souza.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice unmodified, this list of conditions, and the following
11 *    disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29/*
30 * GPIO driver for AR71xx
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD: head/sys/mips/atheros/ar71xx_gpio.c 234515 2012-04-20 22:44:00Z adrian $");
35
36#include <sys/param.h>
37#include <sys/systm.h>
38#include <sys/bus.h>
39
40#include <sys/kernel.h>
41#include <sys/module.h>
42#include <sys/rman.h>
43#include <sys/lock.h>
44#include <sys/mutex.h>
45#include <sys/gpio.h>
46
47#include <machine/bus.h>
48#include <machine/resource.h>
49#include <mips/atheros/ar71xxreg.h>
50#include <mips/atheros/ar71xx_setup.h>
51#include <mips/atheros/ar71xx_gpiovar.h>
52
53#include "gpio_if.h"
54
55#define	DEFAULT_CAPS	(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)
56
57/*
58 * Helpers
59 */
60static void ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc,
61    uint32_t mask);
62static void ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc,
63    uint32_t mask);
64static void ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc,
65    struct gpio_pin *pin, uint32_t flags);
66
67/*
68 * Driver stuff
69 */
70static int ar71xx_gpio_probe(device_t dev);
71static int ar71xx_gpio_attach(device_t dev);
72static int ar71xx_gpio_detach(device_t dev);
73static int ar71xx_gpio_filter(void *arg);
74static void ar71xx_gpio_intr(void *arg);
75
76/*
77 * GPIO interface
78 */
79static int ar71xx_gpio_pin_max(device_t dev, int *maxpin);
80static int ar71xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps);
81static int ar71xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t
82    *flags);
83static int ar71xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name);
84static int ar71xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags);
85static int ar71xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value);
86static int ar71xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val);
87static int ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin);
88
89static void
90ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc, uint32_t mask)
91{
92	GPIO_SET_BITS(sc, AR71XX_GPIO_FUNCTION, mask);
93}
94
95static void
96ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc, uint32_t mask)
97{
98	GPIO_CLEAR_BITS(sc, AR71XX_GPIO_FUNCTION, mask);
99}
100
101static void
102ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc, struct gpio_pin *pin,
103    unsigned int flags)
104{
105	uint32_t mask;
106
107	mask = 1 << pin->gp_pin;
108
109	/*
110	 * Manage input/output
111	 */
112	if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
113		pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT);
114		if (flags & GPIO_PIN_OUTPUT) {
115			pin->gp_flags |= GPIO_PIN_OUTPUT;
116			GPIO_SET_BITS(sc, AR71XX_GPIO_OE, mask);
117		}
118		else {
119			pin->gp_flags |= GPIO_PIN_INPUT;
120			GPIO_CLEAR_BITS(sc, AR71XX_GPIO_OE, mask);
121		}
122	}
123}
124
125static int
126ar71xx_gpio_pin_max(device_t dev, int *maxpin)
127{
128
129	switch (ar71xx_soc) {
130		case AR71XX_SOC_AR9130:
131		case AR71XX_SOC_AR9132:
132			*maxpin = AR91XX_GPIO_PINS - 1;
133			break;
134		case AR71XX_SOC_AR7240:
135		case AR71XX_SOC_AR7241:
136		case AR71XX_SOC_AR7242:
137			*maxpin = AR724X_GPIO_PINS - 1;
138			break;
139		default:
140			*maxpin = AR71XX_GPIO_PINS - 1;
141	}
142	return (0);
143}
144
145static int
146ar71xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
147{
148	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
149	int i;
150
151	for (i = 0; i < sc->gpio_npins; i++) {
152		if (sc->gpio_pins[i].gp_pin == pin)
153			break;
154	}
155
156	if (i >= sc->gpio_npins)
157		return (EINVAL);
158
159	GPIO_LOCK(sc);
160	*caps = sc->gpio_pins[i].gp_caps;
161	GPIO_UNLOCK(sc);
162
163	return (0);
164}
165
166static int
167ar71xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
168{
169	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
170	int i;
171
172	for (i = 0; i < sc->gpio_npins; i++) {
173		if (sc->gpio_pins[i].gp_pin == pin)
174			break;
175	}
176
177	if (i >= sc->gpio_npins)
178		return (EINVAL);
179
180	GPIO_LOCK(sc);
181	*flags = sc->gpio_pins[i].gp_flags;
182	GPIO_UNLOCK(sc);
183
184	return (0);
185}
186
187static int
188ar71xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
189{
190	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
191	int i;
192
193	for (i = 0; i < sc->gpio_npins; i++) {
194		if (sc->gpio_pins[i].gp_pin == pin)
195			break;
196	}
197
198	if (i >= sc->gpio_npins)
199		return (EINVAL);
200
201	GPIO_LOCK(sc);
202	memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME);
203	GPIO_UNLOCK(sc);
204
205	return (0);
206}
207
208static int
209ar71xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
210{
211	int i;
212	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
213
214	for (i = 0; i < sc->gpio_npins; i++) {
215		if (sc->gpio_pins[i].gp_pin == pin)
216			break;
217	}
218
219	if (i >= sc->gpio_npins)
220		return (EINVAL);
221
222	/* Filter out unwanted flags */
223	if ((flags &= sc->gpio_pins[i].gp_caps) != flags)
224		return (EINVAL);
225
226	/* Can't mix input/output together */
227	if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) ==
228	    (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT))
229		return (EINVAL);
230
231	ar71xx_gpio_pin_configure(sc, &sc->gpio_pins[i], flags);
232	return (0);
233}
234
235static int
236ar71xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
237{
238	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
239	int i;
240
241	for (i = 0; i < sc->gpio_npins; i++) {
242		if (sc->gpio_pins[i].gp_pin == pin)
243			break;
244	}
245
246	if (i >= sc->gpio_npins)
247		return (EINVAL);
248
249	if (value)
250		GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin));
251	else
252		GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin));
253
254	return (0);
255}
256
257static int
258ar71xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
259{
260	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
261	int i;
262
263	for (i = 0; i < sc->gpio_npins; i++) {
264		if (sc->gpio_pins[i].gp_pin == pin)
265			break;
266	}
267
268	if (i >= sc->gpio_npins)
269		return (EINVAL);
270
271	*val = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0;
272
273	return (0);
274}
275
276static int
277ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin)
278{
279	int res, i;
280	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
281
282	for (i = 0; i < sc->gpio_npins; i++) {
283		if (sc->gpio_pins[i].gp_pin == pin)
284			break;
285	}
286
287	if (i >= sc->gpio_npins)
288		return (EINVAL);
289
290	res = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0;
291	if (res)
292		GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin));
293	else
294		GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin));
295
296	return (0);
297}
298
299static int
300ar71xx_gpio_filter(void *arg)
301{
302
303	/* TODO: something useful */
304	return (FILTER_STRAY);
305}
306
307
308
309static void
310ar71xx_gpio_intr(void *arg)
311{
312	struct ar71xx_gpio_softc *sc = arg;
313	GPIO_LOCK(sc);
314	/* TODO: something useful */
315	GPIO_UNLOCK(sc);
316}
317
318static int
319ar71xx_gpio_probe(device_t dev)
320{
321
322	device_set_desc(dev, "Atheros AR71XX GPIO driver");
323	return (0);
324}
325
326static int
327ar71xx_gpio_attach(device_t dev)
328{
329	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
330	int error = 0;
331	int i, j, maxpin;
332	int mask, pinon;
333	int old = 0;
334
335	KASSERT((device_get_unit(dev) == 0),
336	    ("ar71xx_gpio: Only one gpio module supported"));
337
338	mtx_init(&sc->gpio_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
339	    MTX_DEF);
340
341	/* Map control/status registers. */
342	sc->gpio_mem_rid = 0;
343	sc->gpio_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
344	    &sc->gpio_mem_rid, RF_ACTIVE);
345
346	if (sc->gpio_mem_res == NULL) {
347		device_printf(dev, "couldn't map memory\n");
348		error = ENXIO;
349		ar71xx_gpio_detach(dev);
350		return(error);
351	}
352
353	if ((sc->gpio_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
354	    &sc->gpio_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
355		device_printf(dev, "unable to allocate IRQ resource\n");
356		return (ENXIO);
357	}
358
359	if ((bus_setup_intr(dev, sc->gpio_irq_res, INTR_TYPE_MISC,
360	    ar71xx_gpio_filter, ar71xx_gpio_intr, sc, &sc->gpio_ih))) {
361		device_printf(dev,
362		    "WARNING: unable to register interrupt handler\n");
363		return (ENXIO);
364	}
365
366	sc->dev = dev;
367
368	/* Enable function bits that are required */
369	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
370	    "function_set", &mask) == 0) {
371		device_printf(dev, "function_set: 0x%x\n", mask);
372		ar71xx_gpio_function_enable(sc, mask);
373		old = 1;
374	}
375	/* Disable function bits that are required */
376	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
377	    "function_clear", &mask) == 0) {
378		device_printf(dev, "function_clear: 0x%x\n", mask);
379		ar71xx_gpio_function_disable(sc, mask);
380		old = 1;
381	}
382	/* Handle previous behaviour */
383	if (old == 0) {
384		ar71xx_gpio_function_enable(sc, GPIO_FUNC_SPI_CS1_EN);
385		ar71xx_gpio_function_enable(sc, GPIO_FUNC_SPI_CS2_EN);
386	}
387
388	/* Configure all pins as input */
389	/* disable interrupts for all pins */
390	GPIO_WRITE(sc, AR71XX_GPIO_INT_MASK, 0);
391
392	/* Initialise all pins specified in the mask, up to the pin count */
393	(void) ar71xx_gpio_pin_max(dev, &maxpin);
394	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
395	    "pinmask", &mask) != 0)
396		mask = 0;
397	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
398	    "pinon", &pinon) != 0)
399		pinon = 0;
400	device_printf(dev, "gpio pinmask=0x%x\n", mask);
401	for (i = 0, j = 0; j < maxpin; j++) {
402		if ((mask & (1 << j)) == 0)
403			continue;
404		snprintf(sc->gpio_pins[i].gp_name, GPIOMAXNAME,
405		    "pin %d", j);
406		sc->gpio_pins[i].gp_pin = j;
407		sc->gpio_pins[i].gp_caps = DEFAULT_CAPS;
408		sc->gpio_pins[i].gp_flags = 0;
409		ar71xx_gpio_pin_configure(sc, &sc->gpio_pins[i], DEFAULT_CAPS);
410		i++;
411	}
412	sc->gpio_npins = i;
413	for (i = 0; i < sc->gpio_npins; i++) {
414		j = sc->gpio_pins[i].gp_pin;
415		if ((pinon & (1 << j)) != 0)
416			ar71xx_gpio_pin_set(dev, j, 1);
417	}
418	device_add_child(dev, "gpioc", device_get_unit(dev));
419	device_add_child(dev, "gpiobus", device_get_unit(dev));
420	return (bus_generic_attach(dev));
421}
422
423static int
424ar71xx_gpio_detach(device_t dev)
425{
426	struct ar71xx_gpio_softc *sc = device_get_softc(dev);
427
428	KASSERT(mtx_initialized(&sc->gpio_mtx), ("gpio mutex not initialized"));
429
430	ar71xx_gpio_function_disable(sc, GPIO_FUNC_SPI_CS1_EN);
431	ar71xx_gpio_function_disable(sc, GPIO_FUNC_SPI_CS2_EN);
432	bus_generic_detach(dev);
433
434	if (sc->gpio_mem_res)
435		bus_release_resource(dev, SYS_RES_MEMORY, sc->gpio_mem_rid,
436		    sc->gpio_mem_res);
437
438	mtx_destroy(&sc->gpio_mtx);
439
440	return(0);
441}
442
443static device_method_t ar71xx_gpio_methods[] = {
444	DEVMETHOD(device_probe, ar71xx_gpio_probe),
445	DEVMETHOD(device_attach, ar71xx_gpio_attach),
446	DEVMETHOD(device_detach, ar71xx_gpio_detach),
447
448	/* GPIO protocol */
449	DEVMETHOD(gpio_pin_max, ar71xx_gpio_pin_max),
450	DEVMETHOD(gpio_pin_getname, ar71xx_gpio_pin_getname),
451	DEVMETHOD(gpio_pin_getflags, ar71xx_gpio_pin_getflags),
452	DEVMETHOD(gpio_pin_getcaps, ar71xx_gpio_pin_getcaps),
453	DEVMETHOD(gpio_pin_setflags, ar71xx_gpio_pin_setflags),
454	DEVMETHOD(gpio_pin_get, ar71xx_gpio_pin_get),
455	DEVMETHOD(gpio_pin_set, ar71xx_gpio_pin_set),
456	DEVMETHOD(gpio_pin_toggle, ar71xx_gpio_pin_toggle),
457	{0, 0},
458};
459
460static driver_t ar71xx_gpio_driver = {
461	"gpio",
462	ar71xx_gpio_methods,
463	sizeof(struct ar71xx_gpio_softc),
464};
465static devclass_t ar71xx_gpio_devclass;
466
467DRIVER_MODULE(ar71xx_gpio, apb, ar71xx_gpio_driver, ar71xx_gpio_devclass, 0, 0);
468