locore.S revision 78269
1/*- 2 * Copyright (c) 1998 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/ia64/ia64/locore.S 78269 2001-06-15 09:59:27Z peter $ 27 */ 28/* 29 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 30 * All rights reserved. 31 * 32 * Author: Chris G. Demetriou 33 * 34 * Permission to use, copy, modify and distribute this software and 35 * its documentation is hereby granted, provided that both the copyright 36 * notice and this permission notice appear in all copies of the 37 * software, derivative works or modified versions, and any portions 38 * thereof, and that both notices appear in supporting documentation. 39 * 40 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 41 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 42 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 43 * 44 * Carnegie Mellon requests users of this software to return to 45 * 46 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 47 * School of Computer Science 48 * Carnegie Mellon University 49 * Pittsburgh PA 15213-3890 50 * 51 * any improvements or extensions that they make and grant Carnegie the 52 * rights to redistribute these changes. 53 */ 54 55#include <sys/cdefs.h> 56#include <machine/asm.h> 57#include <machine/fpu.h> 58#include <sys/syscall.h> 59#include <assym.s> 60 61#ifndef EVCNT_COUNTERS 62#define _LOCORE 63#include <machine/intrcnt.h> 64#endif 65 66 .text 67 68/* 69 * Not really a leaf but we can't return. 70 */ 71ENTRY(locorestart, 1) 72 73 movl r8=ia64_vector_table // set up IVT early 74 movl r9=ia64_vhpt+(1<<8)+(15<<2)+1 // and VHPT 75 ;; 76 mov cr.iva=r8 77 mov cr.pta=r9 78 ;; 79 srlz.i 80 ;; 81 srlz.d 82 ;; 83 movl gp=__gp // find kernel globals 84 ;; 85 br.call.sptk.many rp=ia64_init 86 87 /* 88 * switch to proc0 and then initialise the rest of the kernel. 89 */ 90 alloc r16=ar.pfs,0,0,1,0 91 ;; 92 movl out0=proc0 93 ;; 94 add out0=P_ADDR,out0 95 ;; 96 ld8 out0=[out0] 97 ;; 98 add r16=U_PCB_B0,out0 // return to mi_startup 99 movl r17=mi_startup 100 ;; 101 st8 [r16]=r17 102 ;; 103 br.call.sptk.many rp=restorectx 104 105 /* NOTREACHED */ 106 107 END(locorestart) 108 109 110/**************************************************************************/ 111 112/* 113 * Signal "trampoline" code. Invoked from RTE setup by sendsig(). 114 * 115 * On entry, registers look like: 116 * 117 * r14 signal number 118 * r15 pointer to siginfo_t 119 * r16 pointer to signal context frame (scp) 120 * r17 address of handler function descriptor 121 * r18 address of new backing store (if any) 122 * sp+16 pointer to sigframe 123 */ 124 125ENTRY(sigcode,0) 126 ld8 r8=[r17],8 // function address 127 ;; 128 ld8 gp=[r17] // function's gp value 129 mov b6=r8 // transfer to a branch register 130 cover 131 ;; 132 add r8=UC_MCONTEXT_MC_AR_BSP,r16 // address or mc_ar_bsp 133 mov r9=ar.bsp // save ar.bsp 134 ;; 135 st8 [r8]=r9 136 cmp.eq p1,p2=r0,r18 // check for new bs 137(p1) br.cond.sptk.few 1f // branch if not switching 138 flushrs // flush out to old bs 139 mov ar.rsc=0 // switch off RSE 140 add r8=UC_MCONTEXT_MC_AR_RNAT,r16 // address of mc_ar_rnat 141 ;; 142 mov r9=ar.rnat // value of ar.rnat after flush 143 mov ar.bspstore=r18 // point at new bs 144 ;; 145 st8 [r8]=r9 // remember ar.rnat 146 mov ar.rsc=15 // XXX bogus value - check 147 invala 148 ;; 1491: alloc r5=ar.pfs,0,0,3,0 // register frame for call 150 ;; 151 mov out0=r14 // signal number 152 mov out1=r15 // siginfo 153 mov out2=r16 // ucontext 154 mov r4=r16 // save from call 155 br.call.sptk.few rp=b6 // call the signal handler 156 ;; 157 alloc r14=ar.pfs,0,0,0,0 // discard call frame 158 ;; 159(p1) br.cond.sptk.few 2f // note: p1 is preserved 160 flushrs 161 mov ar.rsc=0 162 add r8=UC_MCONTEXT_MC_AR_RNAT,r4 // address of mc_ar_rnat 163 ;; 164 ld8 r9=[r8] 165 ;; 166 add r8=UC_MCONTEXT_MC_AR_BSP,r4 // address of mc_ar_bsp 167 ;; 168 ld8 r10=[r8] 169 ;; 170 mov ar.bspstore=r10 171 ;; 172 mov ar.rnat=r9 173 mov ar.rsc=15 174 ;; 1752: CALLSYS_NOERROR(sigreturn) // call sigreturn() 176 alloc r14=ar.pfs,0,0,1,0 ;; 177 mov out0=ret0 // if that failed, get error code 178 CALLSYS_NOERROR(exit) // and call exit() with it. 179XENTRY(esigcode) 180 END(sigcode) 181 182 .data 183 EXPORT(szsigcode) 184 .quad esigcode-sigcode 185 .text 186 187 .data 188 EXPORT(proc0paddr) 189 .quad 0 190 191 .text 192 193/* XXX: make systat/vmstat happy */ 194 .data 195EXPORT(intrnames) 196 .asciz "clock" 197intr_n = 0 198.rept INTRCNT_COUNT 199 .ascii "intr " 200 .byte intr_n / 10 + '0, intr_n % 10 + '0 201 .asciz " " /* space for platform-specific rewrite */ 202 intr_n = intr_n + 1 203.endr 204EXPORT(eintrnames) 205 .align 8 206EXPORT(intrcnt) 207 .fill INTRCNT_COUNT + 1, 8, 0 208EXPORT(eintrcnt) 209 .text 210