cpufunc.h revision 78903
1/*-
2 * Copyright (c) 1993 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 *    must display the following acknowledgement:
15 *	This product includes software developed by the University of
16 *	California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 *    may be used to endorse or promote products derived from this software
19 *    without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * $FreeBSD: head/sys/i386/include/cpufunc.h 78903 2001-06-28 02:08:13Z bsd $
34 */
35
36/*
37 * Functions to provide access to special i386 instructions.
38 */
39
40#ifndef _MACHINE_CPUFUNC_H_
41#define	_MACHINE_CPUFUNC_H_
42
43#include <sys/cdefs.h>
44
45__BEGIN_DECLS
46#define readb(va)	(*(volatile u_int8_t *) (va))
47#define readw(va)	(*(volatile u_int16_t *) (va))
48#define readl(va)	(*(volatile u_int32_t *) (va))
49
50#define writeb(va, d)	(*(volatile u_int8_t *) (va) = (d))
51#define writew(va, d)	(*(volatile u_int16_t *) (va) = (d))
52#define writel(va, d)	(*(volatile u_int32_t *) (va) = (d))
53
54#ifdef	__GNUC__
55
56#ifdef SWTCH_OPTIM_STATS
57extern	int	tlb_flush_count;	/* XXX */
58#endif
59
60static __inline void
61breakpoint(void)
62{
63	__asm __volatile("int $3");
64}
65
66static __inline u_int
67bsfl(u_int mask)
68{
69	u_int	result;
70
71	__asm __volatile("bsfl %0,%0" : "=r" (result) : "0" (mask));
72	return (result);
73}
74
75static __inline u_int
76bsrl(u_int mask)
77{
78	u_int	result;
79
80	__asm __volatile("bsrl %0,%0" : "=r" (result) : "0" (mask));
81	return (result);
82}
83
84static __inline void
85disable_intr(void)
86{
87	__asm __volatile("cli" : : : "memory");
88}
89
90static __inline void
91enable_intr(void)
92{
93	__asm __volatile("sti");
94}
95
96#define	HAVE_INLINE_FFS
97
98static __inline int
99ffs(int mask)
100{
101	/*
102	 * Note that gcc-2's builtin ffs would be used if we didn't declare
103	 * this inline or turn off the builtin.  The builtin is faster but
104	 * broken in gcc-2.4.5 and slower but working in gcc-2.5 and later
105	 * versions.
106	 */
107	 return (mask == 0 ? mask : bsfl((u_int)mask) + 1);
108}
109
110#define	HAVE_INLINE_FLS
111
112static __inline int
113fls(int mask)
114{
115	return (mask == 0 ? mask : bsrl((u_int)mask) + 1);
116}
117
118#if __GNUC__ < 2
119
120#define	inb(port)		inbv(port)
121#define	outb(port, data)	outbv(port, data)
122
123#else /* __GNUC >= 2 */
124
125/*
126 * The following complications are to get around gcc not having a
127 * constraint letter for the range 0..255.  We still put "d" in the
128 * constraint because "i" isn't a valid constraint when the port
129 * isn't constant.  This only matters for -O0 because otherwise
130 * the non-working version gets optimized away.
131 *
132 * Use an expression-statement instead of a conditional expression
133 * because gcc-2.6.0 would promote the operands of the conditional
134 * and produce poor code for "if ((inb(var) & const1) == const2)".
135 *
136 * The unnecessary test `(port) < 0x10000' is to generate a warning if
137 * the `port' has type u_short or smaller.  Such types are pessimal.
138 * This actually only works for signed types.  The range check is
139 * careful to avoid generating warnings.
140 */
141#define	inb(port) __extension__ ({					\
142	u_char	_data;							\
143	if (__builtin_constant_p(port) && ((port) & 0xffff) < 0x100	\
144	    && (port) < 0x10000)					\
145		_data = inbc(port);					\
146	else								\
147		_data = inbv(port);					\
148	_data; })
149
150#define	outb(port, data) (						\
151	__builtin_constant_p(port) && ((port) & 0xffff) < 0x100		\
152	&& (port) < 0x10000						\
153	? outbc(port, data) : outbv(port, data))
154
155static __inline u_char
156inbc(u_int port)
157{
158	u_char	data;
159
160	__asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port)));
161	return (data);
162}
163
164static __inline void
165outbc(u_int port, u_char data)
166{
167	__asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port)));
168}
169
170#endif /* __GNUC <= 2 */
171
172static __inline u_char
173inbv(u_int port)
174{
175	u_char	data;
176	/*
177	 * We use %%dx and not %1 here because i/o is done at %dx and not at
178	 * %edx, while gcc generates inferior code (movw instead of movl)
179	 * if we tell it to load (u_short) port.
180	 */
181	__asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
182	return (data);
183}
184
185static __inline u_int
186inl(u_int port)
187{
188	u_int	data;
189
190	__asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port));
191	return (data);
192}
193
194static __inline void
195insb(u_int port, void *addr, size_t cnt)
196{
197	__asm __volatile("cld; rep; insb"
198			 : "=D" (addr), "=c" (cnt)
199			 :  "0" (addr),  "1" (cnt), "d" (port)
200			 : "memory");
201}
202
203static __inline void
204insw(u_int port, void *addr, size_t cnt)
205{
206	__asm __volatile("cld; rep; insw"
207			 : "=D" (addr), "=c" (cnt)
208			 :  "0" (addr),  "1" (cnt), "d" (port)
209			 : "memory");
210}
211
212static __inline void
213insl(u_int port, void *addr, size_t cnt)
214{
215	__asm __volatile("cld; rep; insl"
216			 : "=D" (addr), "=c" (cnt)
217			 :  "0" (addr),  "1" (cnt), "d" (port)
218			 : "memory");
219}
220
221static __inline void
222invd(void)
223{
224	__asm __volatile("invd");
225}
226
227#if defined(SMP) && defined(_KERNEL)
228
229/*
230 * When using APIC IPI's, invlpg() is not simply the invlpg instruction
231 * (this is a bug) and the inlining cost is prohibitive since the call
232 * executes into the IPI transmission system.
233 */
234void	invlpg		__P((u_int addr));
235void	invltlb		__P((void));
236
237static __inline void
238cpu_invlpg(void *addr)
239{
240	__asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
241}
242
243static __inline void
244cpu_invltlb(void)
245{
246	u_int	temp;
247	/*
248	 * This should be implemented as load_cr3(rcr3()) when load_cr3()
249	 * is inlined.
250	 */
251	__asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp)
252			 : : "memory");
253#if defined(SWTCH_OPTIM_STATS)
254	++tlb_flush_count;
255#endif
256}
257
258#else /* !(SMP && _KERNEL) */
259
260static __inline void
261invlpg(u_int addr)
262{
263	__asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
264}
265
266static __inline void
267invltlb(void)
268{
269	u_int	temp;
270	/*
271	 * This should be implemented as load_cr3(rcr3()) when load_cr3()
272	 * is inlined.
273	 */
274	__asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp)
275			 : : "memory");
276#ifdef SWTCH_OPTIM_STATS
277	++tlb_flush_count;
278#endif
279}
280
281#endif /* SMP && _KERNEL */
282
283static __inline u_short
284inw(u_int port)
285{
286	u_short	data;
287
288	__asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port));
289	return (data);
290}
291
292static __inline void
293outbv(u_int port, u_char data)
294{
295	u_char	al;
296	/*
297	 * Use an unnecessary assignment to help gcc's register allocator.
298	 * This make a large difference for gcc-1.40 and a tiny difference
299	 * for gcc-2.6.0.  For gcc-1.40, al had to be ``asm("ax")'' for
300	 * best results.  gcc-2.6.0 can't handle this.
301	 */
302	al = data;
303	__asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
304}
305
306static __inline void
307outl(u_int port, u_int data)
308{
309	/*
310	 * outl() and outw() aren't used much so we haven't looked at
311	 * possible micro-optimizations such as the unnecessary
312	 * assignment for them.
313	 */
314	__asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port));
315}
316
317static __inline void
318outsb(u_int port, const void *addr, size_t cnt)
319{
320	__asm __volatile("cld; rep; outsb"
321			 : "=S" (addr), "=c" (cnt)
322			 :  "0" (addr),  "1" (cnt), "d" (port));
323}
324
325static __inline void
326outsw(u_int port, const void *addr, size_t cnt)
327{
328	__asm __volatile("cld; rep; outsw"
329			 : "=S" (addr), "=c" (cnt)
330			 :  "0" (addr),  "1" (cnt), "d" (port));
331}
332
333static __inline void
334outsl(u_int port, const void *addr, size_t cnt)
335{
336	__asm __volatile("cld; rep; outsl"
337			 : "=S" (addr), "=c" (cnt)
338			 :  "0" (addr),  "1" (cnt), "d" (port));
339}
340
341static __inline void
342outw(u_int port, u_short data)
343{
344	__asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port));
345}
346
347static __inline u_int
348rcr2(void)
349{
350	u_int	data;
351
352	__asm __volatile("movl %%cr2,%0" : "=r" (data));
353	return (data);
354}
355
356static __inline u_int
357read_eflags(void)
358{
359	u_int	ef;
360
361	__asm __volatile("pushfl; popl %0" : "=r" (ef));
362	return (ef);
363}
364
365static __inline u_int64_t
366rdmsr(u_int msr)
367{
368	u_int64_t rv;
369
370	__asm __volatile("rdmsr" : "=A" (rv) : "c" (msr));
371	return (rv);
372}
373
374static __inline u_int64_t
375rdpmc(u_int pmc)
376{
377	u_int64_t rv;
378
379	__asm __volatile("rdpmc" : "=A" (rv) : "c" (pmc));
380	return (rv);
381}
382
383static __inline u_int64_t
384rdtsc(void)
385{
386	u_int64_t rv;
387
388	__asm __volatile("rdtsc" : "=A" (rv));
389	return (rv);
390}
391
392static __inline void
393wbinvd(void)
394{
395	__asm __volatile("wbinvd");
396}
397
398static __inline void
399write_eflags(u_int ef)
400{
401	__asm __volatile("pushl %0; popfl" : : "r" (ef));
402}
403
404static __inline void
405wrmsr(u_int msr, u_int64_t newval)
406{
407	__asm __volatile("wrmsr" : : "A" (newval), "c" (msr));
408}
409
410static __inline u_int
411rfs(void)
412{
413	u_int sel;
414	__asm __volatile("movl %%fs,%0" : "=rm" (sel));
415	return (sel);
416}
417
418static __inline u_int
419rgs(void)
420{
421	u_int sel;
422	__asm __volatile("movl %%gs,%0" : "=rm" (sel));
423	return (sel);
424}
425
426static __inline void
427load_fs(u_int sel)
428{
429	__asm __volatile("movl %0,%%fs" : : "rm" (sel));
430}
431
432static __inline void
433load_gs(u_int sel)
434{
435	__asm __volatile("movl %0,%%gs" : : "rm" (sel));
436}
437
438static __inline u_int
439rdr0(void)
440{
441	u_int	data;
442	__asm __volatile("movl %%dr0,%0" : "=r" (data));
443	return (data);
444}
445
446static __inline void
447load_dr0(u_int sel)
448{
449	__asm __volatile("movl %0,%%dr0" : : "r" (sel));
450}
451
452static __inline u_int
453rdr1(void)
454{
455	u_int	data;
456	__asm __volatile("movl %%dr1,%0" : "=r" (data));
457	return (data);
458}
459
460static __inline void
461load_dr1(u_int sel)
462{
463	__asm __volatile("movl %0,%%dr1" : : "r" (sel));
464}
465
466static __inline u_int
467rdr2(void)
468{
469	u_int	data;
470	__asm __volatile("movl %%dr2,%0" : "=r" (data));
471	return (data);
472}
473
474static __inline void
475load_dr2(u_int sel)
476{
477	__asm __volatile("movl %0,%%dr2" : : "r" (sel));
478}
479
480static __inline u_int
481rdr3(void)
482{
483	u_int	data;
484	__asm __volatile("movl %%dr3,%0" : "=r" (data));
485	return (data);
486}
487
488static __inline void
489load_dr3(u_int sel)
490{
491	__asm __volatile("movl %0,%%dr3" : : "r" (sel));
492}
493
494static __inline u_int
495rdr4(void)
496{
497	u_int	data;
498	__asm __volatile("movl %%dr4,%0" : "=r" (data));
499	return (data);
500}
501
502static __inline void
503load_dr4(u_int sel)
504{
505	__asm __volatile("movl %0,%%dr4" : : "r" (sel));
506}
507
508static __inline u_int
509rdr5(void)
510{
511	u_int	data;
512	__asm __volatile("movl %%dr5,%0" : "=r" (data));
513	return (data);
514}
515
516static __inline void
517load_dr5(u_int sel)
518{
519	__asm __volatile("movl %0,%%dr5" : : "r" (sel));
520}
521
522static __inline u_int
523rdr6(void)
524{
525	u_int	data;
526	__asm __volatile("movl %%dr6,%0" : "=r" (data));
527	return (data);
528}
529
530static __inline void
531load_dr6(u_int sel)
532{
533	__asm __volatile("movl %0,%%dr6" : : "r" (sel));
534}
535
536static __inline u_int
537rdr7(void)
538{
539	u_int	data;
540	__asm __volatile("movl %%dr7,%0" : "=r" (data));
541	return (data);
542}
543
544static __inline void
545load_dr7(u_int sel)
546{
547	__asm __volatile("movl %0,%%dr7" : : "r" (sel));
548}
549
550static __inline critical_t
551critical_enter(void)
552{
553	critical_t eflags;
554
555	eflags = read_eflags();
556	disable_intr();
557	return (eflags);
558}
559
560static __inline void
561critical_exit(critical_t eflags)
562{
563	write_eflags(eflags);
564}
565
566#else /* !__GNUC__ */
567
568int	breakpoint	__P((void));
569u_int	bsfl		__P((u_int mask));
570u_int	bsrl		__P((u_int mask));
571void	disable_intr	__P((void));
572void	enable_intr	__P((void));
573u_char	inb		__P((u_int port));
574u_int	inl		__P((u_int port));
575void	insb		__P((u_int port, void *addr, size_t cnt));
576void	insl		__P((u_int port, void *addr, size_t cnt));
577void	insw		__P((u_int port, void *addr, size_t cnt));
578void	invd		__P((void));
579void	invlpg		__P((u_int addr));
580void	invltlb		__P((void));
581u_short	inw		__P((u_int port));
582void	outb		__P((u_int port, u_char data));
583void	outl		__P((u_int port, u_int data));
584void	outsb		__P((u_int port, void *addr, size_t cnt));
585void	outsl		__P((u_int port, void *addr, size_t cnt));
586void	outsw		__P((u_int port, void *addr, size_t cnt));
587void	outw		__P((u_int port, u_short data));
588u_int	rcr2		__P((void));
589u_int64_t rdmsr		__P((u_int msr));
590u_int64_t rdpmc		__P((u_int pmc));
591u_int64_t rdtsc		__P((void));
592u_int	read_eflags	__P((void));
593void	wbinvd		__P((void));
594void	write_eflags	__P((u_int ef));
595void	wrmsr		__P((u_int msr, u_int64_t newval));
596u_int	rfs		__P((void));
597u_int	rgs		__P((void));
598void	load_fs		__P((u_int sel));
599void	load_gs		__P((u_int sel));
600critical_t critical_enter __P((void));
601void	critical_exit	__P((critical_t eflags));
602
603#endif	/* __GNUC__ */
604
605void	load_cr0	__P((u_int cr0));
606void	load_cr3	__P((u_int cr3));
607void	load_cr4	__P((u_int cr4));
608void	ltr		__P((u_short sel));
609u_int	rcr0		__P((void));
610u_int	rcr3		__P((void));
611u_int	rcr4		__P((void));
612void    reset_dbregs    __P((void));
613__END_DECLS
614
615#endif /* !_MACHINE_CPUFUNC_H_ */
616