cpufunc.h revision 28921
1/*- 2 * Copyright (c) 1993 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Berkeley and its contributors. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * $Id: cpufunc.h,v 1.69 1997/07/17 04:33:46 dyson Exp $ 34 */ 35 36/* 37 * Functions to provide access to special i386 instructions. 38 */ 39 40#ifndef _MACHINE_CPUFUNC_H_ 41#define _MACHINE_CPUFUNC_H_ 42 43#include <sys/cdefs.h> 44#include <sys/types.h> 45 46#include <machine/lock.h> 47 48 49#ifdef __GNUC__ 50 51static __inline void 52breakpoint(void) 53{ 54 __asm __volatile("int $3"); 55} 56 57static __inline void 58disable_intr(void) 59{ 60 __asm __volatile("cli" : : : "memory"); 61 MPINTR_LOCK(); 62} 63 64static __inline void 65enable_intr(void) 66{ 67 MPINTR_UNLOCK(); 68 __asm __volatile("sti"); 69} 70 71#define HAVE_INLINE_FFS 72 73static __inline int 74ffs(int mask) 75{ 76 int result; 77 /* 78 * bsfl turns out to be not all that slow on 486's. It can beaten 79 * using a binary search to reduce to 4 bits and then a table lookup, 80 * but only if the code is inlined and in the cache, and the code 81 * is quite large so inlining it probably busts the cache. 82 * 83 * Note that gcc-2's builtin ffs would be used if we didn't declare 84 * this inline or turn off the builtin. The builtin is faster but 85 * broken in gcc-2.4.5 and slower but working in gcc-2.5 and 2.6. 86 */ 87 __asm __volatile("testl %0,%0; je 1f; bsfl %0,%0; incl %0; 1:" 88 : "=r" (result) : "0" (mask)); 89 return (result); 90} 91 92#define HAVE_INLINE_FLS 93 94static __inline int 95fls(int mask) 96{ 97 int result; 98 __asm __volatile("testl %0,%0; je 1f; bsrl %0,%0; incl %0; 1:" 99 : "=r" (result) : "0" (mask)); 100 return (result); 101} 102 103#if __GNUC__ < 2 104 105#define inb(port) inbv(port) 106#define outb(port, data) outbv(port, data) 107 108#else /* __GNUC >= 2 */ 109 110/* 111 * The following complications are to get around gcc not having a 112 * constraint letter for the range 0..255. We still put "d" in the 113 * constraint because "i" isn't a valid constraint when the port 114 * isn't constant. This only matters for -O0 because otherwise 115 * the non-working version gets optimized away. 116 * 117 * Use an expression-statement instead of a conditional expression 118 * because gcc-2.6.0 would promote the operands of the conditional 119 * and produce poor code for "if ((inb(var) & const1) == const2)". 120 * 121 * The unnecessary test `(port) < 0x10000' is to generate a warning if 122 * the `port' has type u_short or smaller. Such types are pessimal. 123 * This actually only works for signed types. The range check is 124 * careful to avoid generating warnings. 125 */ 126#define inb(port) __extension__ ({ \ 127 u_char _data; \ 128 if (__builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \ 129 && (port) < 0x10000) \ 130 _data = inbc(port); \ 131 else \ 132 _data = inbv(port); \ 133 _data; }) 134 135#define outb(port, data) ( \ 136 __builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \ 137 && (port) < 0x10000 \ 138 ? outbc(port, data) : outbv(port, data)) 139 140static __inline u_char 141inbc(u_int port) 142{ 143 u_char data; 144 145 __asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port))); 146 return (data); 147} 148 149static __inline void 150outbc(u_int port, u_char data) 151{ 152 __asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port))); 153} 154 155#endif /* __GNUC <= 2 */ 156 157static __inline u_char 158inbv(u_int port) 159{ 160 u_char data; 161 /* 162 * We use %%dx and not %1 here because i/o is done at %dx and not at 163 * %edx, while gcc generates inferior code (movw instead of movl) 164 * if we tell it to load (u_short) port. 165 */ 166 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 167 return (data); 168} 169 170static __inline u_long 171inl(u_int port) 172{ 173 u_long data; 174 175 __asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port)); 176 return (data); 177} 178 179static __inline void 180insb(u_int port, void *addr, size_t cnt) 181{ 182 __asm __volatile("cld; rep; insb" 183 : : "d" (port), "D" (addr), "c" (cnt) 184 : "di", "cx", "memory"); 185} 186 187static __inline void 188insw(u_int port, void *addr, size_t cnt) 189{ 190 __asm __volatile("cld; rep; insw" 191 : : "d" (port), "D" (addr), "c" (cnt) 192 : "di", "cx", "memory"); 193} 194 195static __inline void 196insl(u_int port, void *addr, size_t cnt) 197{ 198 __asm __volatile("cld; rep; insl" 199 : : "d" (port), "D" (addr), "c" (cnt) 200 : "di", "cx", "memory"); 201} 202 203static __inline void 204invd(void) 205{ 206 __asm __volatile("invd"); 207} 208 209#ifdef KERNEL 210#ifdef SMP 211 212/* 213 * When using APIC IPI's, the inlining cost is prohibitive since the call 214 * executes into the IPI transmission system. 215 */ 216void invlpg __P((u_int addr)); 217void invltlb __P((void)); 218 219#else /* !SMP */ 220 221static __inline void 222invlpg(u_int addr) 223{ 224 __asm __volatile("invlpg (%0)" : : "r" (addr) : "memory"); 225} 226 227static __inline void 228invltlb(void) 229{ 230 u_long temp; 231 /* 232 * This should be implemented as load_cr3(rcr3()) when load_cr3() 233 * is inlined. 234 */ 235 __asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp) 236 : : "memory"); 237} 238 239#endif /* SMP */ 240#endif /* KERNEL */ 241 242static __inline u_short 243inw(u_int port) 244{ 245 u_short data; 246 247 __asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port)); 248 return (data); 249} 250 251static __inline u_int 252loadandclear(u_int *addr) 253{ 254 u_int result; 255 256 __asm __volatile("xorl %0,%0; xchgl %1,%0" 257 : "=&r" (result) : "m" (*addr)); 258 return (result); 259} 260 261static __inline void 262outbv(u_int port, u_char data) 263{ 264 u_char al; 265 /* 266 * Use an unnecessary assignment to help gcc's register allocator. 267 * This make a large difference for gcc-1.40 and a tiny difference 268 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 269 * best results. gcc-2.6.0 can't handle this. 270 */ 271 al = data; 272 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 273} 274 275static __inline void 276outl(u_int port, u_long data) 277{ 278 /* 279 * outl() and outw() aren't used much so we haven't looked at 280 * possible micro-optimizations such as the unnecessary 281 * assignment for them. 282 */ 283 __asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port)); 284} 285 286static __inline void 287outsb(u_int port, void *addr, size_t cnt) 288{ 289 __asm __volatile("cld; rep; outsb" 290 : : "d" (port), "S" (addr), "c" (cnt) 291 : "si", "cx"); 292} 293 294static __inline void 295outsw(u_int port, void *addr, size_t cnt) 296{ 297 __asm __volatile("cld; rep; outsw" 298 : : "d" (port), "S" (addr), "c" (cnt) 299 : "si", "cx"); 300} 301 302static __inline void 303outsl(u_int port, void *addr, size_t cnt) 304{ 305 __asm __volatile("cld; rep; outsl" 306 : : "d" (port), "S" (addr), "c" (cnt) 307 : "si", "cx"); 308} 309 310static __inline void 311outw(u_int port, u_short data) 312{ 313 __asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port)); 314} 315 316static __inline u_long 317rcr2(void) 318{ 319 u_long data; 320 321 __asm __volatile("movl %%cr2,%0" : "=r" (data)); 322 return (data); 323} 324 325static __inline u_long 326read_eflags(void) 327{ 328 u_long ef; 329 330 __asm __volatile("pushfl; popl %0" : "=r" (ef)); 331 return (ef); 332} 333 334static __inline quad_t 335rdmsr(u_int msr) 336{ 337 quad_t rv; 338 339 __asm __volatile(".byte 0x0f, 0x32" : "=A" (rv) : "c" (msr)); 340 return (rv); 341} 342 343static __inline quad_t 344rdpmc(u_int pmc) 345{ 346 quad_t rv; 347 348 __asm __volatile(".byte 0x0f, 0x33" : "=A" (rv) : "c" (pmc)); 349 return (rv); 350} 351 352static __inline quad_t 353rdtsc(void) 354{ 355 quad_t rv; 356 357 __asm __volatile(".byte 0x0f, 0x31" : "=A" (rv)); 358 return (rv); 359} 360 361static __inline void 362setbits(volatile unsigned *addr, u_int bits) 363{ 364 __asm __volatile( 365#ifdef SMP 366 "lock; " 367#endif 368 "orl %1,%0" : "=m" (*addr) : "ir" (bits)); 369} 370 371static __inline void 372wbinvd(void) 373{ 374 __asm __volatile("wbinvd"); 375} 376 377static __inline void 378write_eflags(u_long ef) 379{ 380 __asm __volatile("pushl %0; popfl" : : "r" (ef)); 381} 382 383static __inline void 384wrmsr(u_int msr, quad_t newval) 385{ 386 __asm __volatile(".byte 0x0f, 0x30" : : "A" (newval), "c" (msr)); 387} 388 389#else /* !__GNUC__ */ 390 391int breakpoint __P((void)); 392void disable_intr __P((void)); 393void enable_intr __P((void)); 394u_char inb __P((u_int port)); 395u_long inl __P((u_int port)); 396void insb __P((u_int port, void *addr, size_t cnt)); 397void insl __P((u_int port, void *addr, size_t cnt)); 398void insw __P((u_int port, void *addr, size_t cnt)); 399void invd __P((void)); 400void invlpg __P((u_int addr)); 401void invltlb __P((void)); 402u_short inw __P((u_int port)); 403u_int loadandclear __P((u_int *addr)); 404void outb __P((u_int port, u_char data)); 405void outl __P((u_int port, u_long data)); 406void outsb __P((u_int port, void *addr, size_t cnt)); 407void outsl __P((u_int port, void *addr, size_t cnt)); 408void outsw __P((u_int port, void *addr, size_t cnt)); 409void outw __P((u_int port, u_short data)); 410u_long rcr2 __P((void)); 411quad_t rdmsr __P((u_int msr)); 412quad_t rdpmc __P((u_int pmc)); 413quad_t rdtsc __P((void)); 414u_long read_eflags __P((void)); 415void setbits __P((volatile unsigned *addr, u_int bits)); 416void wbinvd __P((void)); 417void write_eflags __P((u_long ef)); 418void wrmsr __P((u_int msr, quad_t newval)); 419 420#endif /* __GNUC__ */ 421 422void load_cr0 __P((u_long cr0)); 423void load_cr3 __P((u_long cr3)); 424void load_cr4 __P((u_long cr4)); 425void ltr __P((u_short sel)); 426u_int rcr0 __P((void)); 427u_long rcr3 __P((void)); 428u_long rcr4 __P((void)); 429 430#endif /* !_MACHINE_CPUFUNC_H_ */ 431