cpufunc.h revision 16878
1/*-
2 * Copyright (c) 1993 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 *    must display the following acknowledgement:
15 *	This product includes software developed by the University of
16 *	California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 *    may be used to endorse or promote products derived from this software
19 *    without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 *	$Id: cpufunc.h,v 1.51 1996/07/01 18:12:23 bde Exp $
34 */
35
36/*
37 * Functions to provide access to special i386 instructions.
38 */
39
40#ifndef _MACHINE_CPUFUNC_H_
41#define	_MACHINE_CPUFUNC_H_
42
43#include <sys/cdefs.h>
44#include <sys/types.h>
45
46#ifdef	__GNUC__
47
48static __inline void
49breakpoint(void)
50{
51	__asm __volatile("int $3");
52}
53
54static __inline void
55disable_intr(void)
56{
57	__asm __volatile("cli" : : : "memory");
58}
59
60static __inline void
61enable_intr(void)
62{
63	__asm __volatile("sti");
64}
65
66#define	HAVE_INLINE_FFS
67
68static __inline int
69ffs(int mask)
70{
71	int	result;
72	/*
73	 * bsfl turns out to be not all that slow on 486's.  It can beaten
74	 * using a binary search to reduce to 4 bits and then a table lookup,
75	 * but only if the code is inlined and in the cache, and the code
76	 * is quite large so inlining it probably busts the cache.
77	 *
78	 * Note that gcc-2's builtin ffs would be used if we didn't declare
79	 * this inline or turn off the builtin.  The builtin is faster but
80	 * broken in gcc-2.4.5 and slower but working in gcc-2.5 and 2.6.
81	 */
82	__asm __volatile("testl %0,%0; je 1f; bsfl %0,%0; incl %0; 1:"
83			 : "=r" (result) : "0" (mask));
84	return (result);
85}
86
87#if __GNUC__ < 2
88
89#define	inb(port)		inbv(port)
90#define	outb(port, data)	outbv(port, data)
91
92#else /* __GNUC >= 2 */
93
94/*
95 * The following complications are to get around gcc not having a
96 * constraint letter for the range 0..255.  We still put "d" in the
97 * constraint because "i" isn't a valid constraint when the port
98 * isn't constant.  This only matters for -O0 because otherwise
99 * the non-working version gets optimized away.
100 *
101 * Use an expression-statement instead of a conditional expression
102 * because gcc-2.6.0 would promote the operands of the conditional
103 * and produce poor code for "if ((inb(var) & const1) == const2)".
104 */
105#define	inb(port)	({						\
106	u_char	_data;							\
107	if (__builtin_constant_p((int) (port)) && (port) < 256ul)	\
108		_data = inbc(port);					\
109	else								\
110		_data = inbv(port);					\
111	_data; })
112
113#define	outb(port, data) \
114	(__builtin_constant_p((int) (port)) && (port) < 256ul \
115	 ? outbc(port, data) : outbv(port, data))
116
117static __inline u_char
118inbc(u_int port)
119{
120	u_char	data;
121
122	__asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port)));
123	return (data);
124}
125
126static __inline void
127outbc(u_int port, u_char data)
128{
129	__asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port)));
130}
131
132#endif /* __GNUC <= 2 */
133
134static __inline u_char
135inbv(u_int port)
136{
137	u_char	data;
138	/*
139	 * We use %%dx and not %1 here because i/o is done at %dx and not at
140	 * %edx, while gcc generates inferior code (movw instead of movl)
141	 * if we tell it to load (u_short) port.
142	 */
143	__asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
144	return (data);
145}
146
147static __inline u_long
148inl(u_int port)
149{
150	u_long	data;
151
152	__asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port));
153	return (data);
154}
155
156static __inline void
157insb(u_int port, void *addr, size_t cnt)
158{
159	__asm __volatile("cld; rep; insb"
160			 : : "d" (port), "D" (addr), "c" (cnt)
161			 : "di", "cx", "memory");
162}
163
164static __inline void
165insw(u_int port, void *addr, size_t cnt)
166{
167	__asm __volatile("cld; rep; insw"
168			 : : "d" (port), "D" (addr), "c" (cnt)
169			 : "di", "cx", "memory");
170}
171
172static __inline void
173insl(u_int port, void *addr, size_t cnt)
174{
175	__asm __volatile("cld; rep; insl"
176			 : : "d" (port), "D" (addr), "c" (cnt)
177			 : "di", "cx", "memory");
178}
179
180static __inline u_short
181inw(u_int port)
182{
183	u_short	data;
184
185	__asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port));
186	return (data);
187}
188
189static __inline u_int
190loadandclear(u_int *addr)
191{
192	u_int	result;
193
194	__asm __volatile("xorl %0,%0; xchgl %1,%0"
195			 : "=&r" (result) : "m" (*addr));
196	return (result);
197}
198
199static __inline void
200outbv(u_int port, u_char data)
201{
202	u_char	al;
203	/*
204	 * Use an unnecessary assignment to help gcc's register allocator.
205	 * This make a large difference for gcc-1.40 and a tiny difference
206	 * for gcc-2.6.0.  For gcc-1.40, al had to be ``asm("ax")'' for
207	 * best results.  gcc-2.6.0 can't handle this.
208	 */
209	al = data;
210	__asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
211}
212
213static __inline void
214outl(u_int port, u_long data)
215{
216	/*
217	 * outl() and outw() aren't used much so we haven't looked at
218	 * possible micro-optimizations such as the unnecessary
219	 * assignment for them.
220	 */
221	__asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port));
222}
223
224static __inline void
225outsb(u_int port, void *addr, size_t cnt)
226{
227	__asm __volatile("cld; rep; outsb"
228			 : : "d" (port), "S" (addr), "c" (cnt)
229			 : "si", "cx");
230}
231
232static __inline void
233outsw(u_int port, void *addr, size_t cnt)
234{
235	__asm __volatile("cld; rep; outsw"
236			 : : "d" (port), "S" (addr), "c" (cnt)
237			 : "si", "cx");
238}
239
240static __inline void
241outsl(u_int port, void *addr, size_t cnt)
242{
243	__asm __volatile("cld; rep; outsl"
244			 : : "d" (port), "S" (addr), "c" (cnt)
245			 : "si", "cx");
246}
247
248static __inline void
249outw(u_int port, u_short data)
250{
251	__asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port));
252}
253
254#ifdef PC98
255static inline u_char
256epson_inb(u_int port)
257{
258	u_char	data;
259
260	outb(0x43f, 0x42);
261	data = inb(port);
262	outb(0x43f, 0x40);
263	return (data);
264}
265
266static inline void
267epson_outb(u_int port, u_char data)
268{
269	outb(0x43f, 0x42);
270	outb(port,data);
271	outb(0x43f, 0x40);
272}
273
274static inline void
275epson_insw(u_int port, void *addr, size_t cnt)
276{
277	int	s;
278
279	s = splbio();
280	outb(0x43f, 0x42);
281	disable_intr();
282	insw((u_int)port, (void *)addr, (size_t)cnt);
283	outb(0x43f, 0x40);
284	splx(s);
285}
286
287static inline void
288epson_outsw(u_int port, void *addr, size_t cnt)
289{
290	int	s;
291
292	s = splbio();
293	outb(0x43f, 0x42);
294	disable_intr();
295	outsw((u_int)port, (void *)addr, (size_t)cnt);
296	outb(0x43f, 0x40);
297	splx(s);
298}
299#endif /* PC98 */
300
301static __inline void
302pmap_update(void)
303{
304	u_long	temp;
305	/*
306	 * This should be implemented as load_cr3(rcr3()) when load_cr3()
307	 * is inlined.
308	 */
309	__asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp)
310			 : : "memory");
311}
312
313static __inline u_long
314rcr2(void)
315{
316	u_long	data;
317
318	__asm __volatile("movl %%cr2,%0" : "=r" (data));
319	return (data);
320}
321
322static __inline u_long
323read_eflags(void)
324{
325	u_long	ef;
326
327	__asm __volatile("pushfl; popl %0" : "=r" (ef));
328	return (ef);
329}
330
331static __inline quad_t
332rdmsr(u_int msr)
333{
334	quad_t rv;
335
336	__asm __volatile(".byte 0x0f, 0x32" : "=A" (rv) : "c" (msr));
337	return (rv);
338}
339
340static __inline quad_t
341rdpmc(u_int pmc)
342{
343	quad_t rv;
344
345	__asm __volatile(".byte 0x0f, 0x33" : "=A" (rv) : "c" (pmc));
346	return (rv);
347}
348
349static __inline quad_t
350rdtsc(void)
351{
352	quad_t rv;
353
354	__asm __volatile(".byte 0x0f, 0x31" : "=A" (rv));
355	return (rv);
356}
357
358static __inline void
359setbits(volatile unsigned *addr, u_int bits)
360{
361	__asm __volatile("orl %1,%0" : "=m" (*addr) : "ir" (bits));
362}
363
364static __inline void
365write_eflags(u_long ef)
366{
367	__asm __volatile("pushl %0; popfl" : : "r" (ef));
368}
369
370static __inline void
371wrmsr(u_int msr, quad_t newval)
372{
373	__asm __volatile(".byte 0x0f, 0x30" : : "A" (newval), "c" (msr));
374}
375
376#else /* !__GNUC__ */
377
378int	breakpoint	__P((void));
379void	disable_intr	__P((void));
380void	enable_intr	__P((void));
381u_char	inb		__P((u_int port));
382u_long	inl		__P((u_int port));
383void	insb		__P((u_int port, void *addr, size_t cnt));
384void	insl		__P((u_int port, void *addr, size_t cnt));
385void	insw		__P((u_int port, void *addr, size_t cnt));
386u_short	inw		__P((u_int port));
387u_int	loadandclear	__P((u_int *addr));
388void	outb		__P((u_int port, u_char data));
389void	outl		__P((u_int port, u_long data));
390void	outsb		__P((u_int port, void *addr, size_t cnt));
391void	outsl		__P((u_int port, void *addr, size_t cnt));
392void	outsw		__P((u_int port, void *addr, size_t cnt));
393void	outw		__P((u_int port, u_short data));
394void	pmap_update	__P((void));
395u_long	rcr2		__P((void));
396quad_t	rdmsr		__P((u_int msr));
397quad_t	rdpmc		__P((u_int pmc));
398quad_t	rdtsc		__P((void));
399u_long	read_eflags	__P((void));
400void	setbits		__P((volatile unsigned *addr, u_int bits));
401void	write_eflags	__P((u_long ef));
402void	wrmsr		__P((u_int msr, quad_t newval));
403
404#endif	/* __GNUC__ */
405
406void	load_cr0	__P((u_long cr0));
407void	load_cr3	__P((u_long cr3));
408void	ltr		__P((u_short sel));
409u_int	rcr0		__P((void));
410u_long	rcr3		__P((void));
411
412#include <machine/spl.h>	/* XXX belongs elsewhere */
413
414#endif /* !_MACHINE_CPUFUNC_H_ */
415