cpufunc.h revision 16875
1/*- 2 * Copyright (c) 1993 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Berkeley and its contributors. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * $Id: cpufunc.h,v 1.50 1996/06/14 11:01:01 asami Exp $ 34 */ 35 36/* 37 * Functions to provide access to special i386 instructions. 38 */ 39 40#ifndef _MACHINE_CPUFUNC_H_ 41#define _MACHINE_CPUFUNC_H_ 42 43#include <sys/cdefs.h> 44#include <sys/types.h> 45 46#include <machine/spl.h> /* XXX belongs elsewhere */ 47 48#ifdef __GNUC__ 49 50static __inline void 51breakpoint(void) 52{ 53 __asm __volatile("int $3"); 54} 55 56static __inline void 57disable_intr(void) 58{ 59 __asm __volatile("cli" : : : "memory"); 60} 61 62static __inline void 63enable_intr(void) 64{ 65 __asm __volatile("sti"); 66} 67 68#define HAVE_INLINE_FFS 69 70static __inline int 71ffs(int mask) 72{ 73 int result; 74 /* 75 * bsfl turns out to be not all that slow on 486's. It can beaten 76 * using a binary search to reduce to 4 bits and then a table lookup, 77 * but only if the code is inlined and in the cache, and the code 78 * is quite large so inlining it probably busts the cache. 79 * 80 * Note that gcc-2's builtin ffs would be used if we didn't declare 81 * this inline or turn off the builtin. The builtin is faster but 82 * broken in gcc-2.4.5 and slower but working in gcc-2.5 and 2.6. 83 */ 84 __asm __volatile("testl %0,%0; je 1f; bsfl %0,%0; incl %0; 1:" 85 : "=r" (result) : "0" (mask)); 86 return (result); 87} 88 89#if __GNUC__ < 2 90 91#define inb(port) inbv(port) 92#define outb(port, data) outbv(port, data) 93 94#else /* __GNUC >= 2 */ 95 96/* 97 * The following complications are to get around gcc not having a 98 * constraint letter for the range 0..255. We still put "d" in the 99 * constraint because "i" isn't a valid constraint when the port 100 * isn't constant. This only matters for -O0 because otherwise 101 * the non-working version gets optimized away. 102 * 103 * Use an expression-statement instead of a conditional expression 104 * because gcc-2.6.0 would promote the operands of the conditional 105 * and produce poor code for "if ((inb(var) & const1) == const2)". 106 */ 107#define inb(port) ({ \ 108 u_char _data; \ 109 if (__builtin_constant_p((int) (port)) && (port) < 256ul) \ 110 _data = inbc(port); \ 111 else \ 112 _data = inbv(port); \ 113 _data; }) 114 115#define outb(port, data) \ 116 (__builtin_constant_p((int) (port)) && (port) < 256ul \ 117 ? outbc(port, data) : outbv(port, data)) 118 119static __inline u_char 120inbc(u_int port) 121{ 122 u_char data; 123 124 __asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port))); 125 return (data); 126} 127 128static __inline void 129outbc(u_int port, u_char data) 130{ 131 __asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port))); 132} 133 134#endif /* __GNUC <= 2 */ 135 136static __inline u_char 137inbv(u_int port) 138{ 139 u_char data; 140 /* 141 * We use %%dx and not %1 here because i/o is done at %dx and not at 142 * %edx, while gcc generates inferior code (movw instead of movl) 143 * if we tell it to load (u_short) port. 144 */ 145 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 146 return (data); 147} 148 149static __inline u_long 150inl(u_int port) 151{ 152 u_long data; 153 154 __asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port)); 155 return (data); 156} 157 158static __inline void 159insb(u_int port, void *addr, size_t cnt) 160{ 161 __asm __volatile("cld; rep; insb" 162 : : "d" (port), "D" (addr), "c" (cnt) 163 : "di", "cx", "memory"); 164} 165 166static __inline void 167insw(u_int port, void *addr, size_t cnt) 168{ 169 __asm __volatile("cld; rep; insw" 170 : : "d" (port), "D" (addr), "c" (cnt) 171 : "di", "cx", "memory"); 172} 173 174static __inline void 175insl(u_int port, void *addr, size_t cnt) 176{ 177 __asm __volatile("cld; rep; insl" 178 : : "d" (port), "D" (addr), "c" (cnt) 179 : "di", "cx", "memory"); 180} 181 182static __inline u_short 183inw(u_int port) 184{ 185 u_short data; 186 187 __asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port)); 188 return (data); 189} 190 191static __inline u_int 192loadandclear(u_int *addr) 193{ 194 u_int result; 195 196 __asm __volatile("xorl %0,%0; xchgl %1,%0" 197 : "=&r" (result) : "m" (*addr)); 198 return (result); 199} 200 201static __inline void 202outbv(u_int port, u_char data) 203{ 204 u_char al; 205 /* 206 * Use an unnecessary assignment to help gcc's register allocator. 207 * This make a large difference for gcc-1.40 and a tiny difference 208 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 209 * best results. gcc-2.6.0 can't handle this. 210 */ 211 al = data; 212 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 213} 214 215static __inline void 216outl(u_int port, u_long data) 217{ 218 /* 219 * outl() and outw() aren't used much so we haven't looked at 220 * possible micro-optimizations such as the unnecessary 221 * assignment for them. 222 */ 223 __asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port)); 224} 225 226static __inline void 227outsb(u_int port, void *addr, size_t cnt) 228{ 229 __asm __volatile("cld; rep; outsb" 230 : : "d" (port), "S" (addr), "c" (cnt) 231 : "si", "cx"); 232} 233 234static __inline void 235outsw(u_int port, void *addr, size_t cnt) 236{ 237 __asm __volatile("cld; rep; outsw" 238 : : "d" (port), "S" (addr), "c" (cnt) 239 : "si", "cx"); 240} 241 242static __inline void 243outsl(u_int port, void *addr, size_t cnt) 244{ 245 __asm __volatile("cld; rep; outsl" 246 : : "d" (port), "S" (addr), "c" (cnt) 247 : "si", "cx"); 248} 249 250static __inline void 251outw(u_int port, u_short data) 252{ 253 __asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port)); 254} 255 256#ifdef PC98 257static inline u_char 258epson_inb(u_int port) 259{ 260 u_char data; 261 262 outb(0x43f, 0x42); 263 data = inb(port); 264 outb(0x43f, 0x40); 265 return (data); 266} 267 268static inline void 269epson_outb(u_int port, u_char data) 270{ 271 outb(0x43f, 0x42); 272 outb(port,data); 273 outb(0x43f, 0x40); 274} 275 276static inline void 277epson_insw(u_int port, void *addr, size_t cnt) 278{ 279 int s; 280 281 s = splbio(); 282 outb(0x43f, 0x42); 283 disable_intr(); 284 insw((u_int)port, (void *)addr, (size_t)cnt); 285 outb(0x43f, 0x40); 286 splx(s); 287} 288 289static inline void 290epson_outsw(u_int port, void *addr, size_t cnt) 291{ 292 int s; 293 294 s = splbio(); 295 outb(0x43f, 0x42); 296 disable_intr(); 297 outsw((u_int)port, (void *)addr, (size_t)cnt); 298 outb(0x43f, 0x40); 299 splx(s); 300} 301#endif /* PC98 */ 302 303static __inline void 304pmap_update(void) 305{ 306 u_long temp; 307 /* 308 * This should be implemented as load_cr3(rcr3()) when load_cr3() 309 * is inlined. 310 */ 311 __asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp) 312 : : "memory"); 313} 314 315static __inline u_long 316rcr2(void) 317{ 318 u_long data; 319 320 __asm __volatile("movl %%cr2,%0" : "=r" (data)); 321 return (data); 322} 323 324static __inline u_long 325read_eflags(void) 326{ 327 u_long ef; 328 329 __asm __volatile("pushfl; popl %0" : "=r" (ef)); 330 return (ef); 331} 332 333static __inline quad_t 334rdmsr(u_int msr) 335{ 336 quad_t rv; 337 338 __asm __volatile(".byte 0x0f, 0x32" : "=A" (rv) : "c" (msr)); 339 return (rv); 340} 341 342static __inline quad_t 343rdpmc(u_int pmc) 344{ 345 quad_t rv; 346 347 __asm __volatile(".byte 0x0f, 0x33" : "=A" (rv) : "c" (pmc)); 348 return (rv); 349} 350 351static __inline quad_t 352rdtsc(void) 353{ 354 quad_t rv; 355 356 __asm __volatile(".byte 0x0f, 0x31" : "=A" (rv)); 357 return (rv); 358} 359 360static __inline void 361write_eflags(u_long ef) 362{ 363 __asm __volatile("pushl %0; popfl" : : "r" (ef)); 364} 365 366static __inline void 367wrmsr(u_int msr, quad_t newval) 368{ 369 __asm __volatile(".byte 0x0f, 0x30" : : "A" (newval), "c" (msr)); 370} 371 372#else /* !__GNUC__ */ 373 374int breakpoint __P((void)); 375void disable_intr __P((void)); 376void enable_intr __P((void)); 377u_char inb __P((u_int port)); 378u_long inl __P((u_int port)); 379void insb __P((u_int port, void *addr, size_t cnt)); 380void insl __P((u_int port, void *addr, size_t cnt)); 381void insw __P((u_int port, void *addr, size_t cnt)); 382u_short inw __P((u_int port)); 383u_int loadandclear __P((u_int *addr)); 384void outb __P((u_int port, u_char data)); 385void outl __P((u_int port, u_long data)); 386void outsb __P((u_int port, void *addr, size_t cnt)); 387void outsl __P((u_int port, void *addr, size_t cnt)); 388void outsw __P((u_int port, void *addr, size_t cnt)); 389void outw __P((u_int port, u_short data)); 390void pmap_update __P((void)); 391u_long rcr2 __P((void)); 392quad_t rdmsr __P((u_int msr)); 393quad_t rdpmc __P((u_int pmc)); 394quad_t rdtsc __P((void)); 395u_long read_eflags __P((void)); 396void write_eflags __P((u_long ef)); 397void wrmsr __P((u_int msr, quad_t newval)); 398 399#endif /* __GNUC__ */ 400 401void load_cr0 __P((u_long cr0)); 402void load_cr3 __P((u_long cr3)); 403void ltr __P((u_short sel)); 404u_int rcr0 __P((void)); 405u_long rcr3 __P((void)); 406 407#endif /* !_MACHINE_CPUFUNC_H_ */ 408