bus.h revision 145253
1/*- 2 * Copyright (c) KATO Takenori, 1999. 3 * 4 * All rights reserved. Unpublished rights reserved under the copyright 5 * laws of Japan. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer as 13 * the first lines of this file unmodified. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * $FreeBSD: head/sys/i386/include/bus.h 145253 2005-04-18 21:45:34Z imp $ 32 */ 33 34/* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */ 35 36/*- 37 * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc. 38 * All rights reserved. 39 * 40 * This code is derived from software contributed to The NetBSD Foundation 41 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 42 * NASA Ames Research Center. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by the NetBSD 55 * Foundation, Inc. and its contributors. 56 * 4. Neither the name of The NetBSD Foundation nor the names of its 57 * contributors may be used to endorse or promote products derived 58 * from this software without specific prior written permission. 59 * 60 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 61 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 62 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 63 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 64 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 65 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 66 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 67 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 68 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 69 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 70 * POSSIBILITY OF SUCH DAMAGE. 71 */ 72 73/*- 74 * Copyright (c) 1996 Charles M. Hannum. All rights reserved. 75 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 76 * 77 * Redistribution and use in source and binary forms, with or without 78 * modification, are permitted provided that the following conditions 79 * are met: 80 * 1. Redistributions of source code must retain the above copyright 81 * notice, this list of conditions and the following disclaimer. 82 * 2. Redistributions in binary form must reproduce the above copyright 83 * notice, this list of conditions and the following disclaimer in the 84 * documentation and/or other materials provided with the distribution. 85 * 3. All advertising materials mentioning features or use of this software 86 * must display the following acknowledgement: 87 * This product includes software developed by Christopher G. Demetriou 88 * for the NetBSD Project. 89 * 4. The name of the author may not be used to endorse or promote products 90 * derived from this software without specific prior written permission 91 * 92 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 93 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 94 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 95 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 96 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 97 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 98 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 99 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 100 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 101 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 102 */ 103 104#ifndef _I386_BUS_H_ 105#define _I386_BUS_H_ 106 107#include <machine/_bus.h> 108#include <machine/cpufunc.h> 109 110/* 111 * To remain compatible with NetBSD's interface, default to both memio and 112 * pio when neither of them is defined. 113 */ 114#if !defined(_I386_BUS_PIO_H_) && !defined(_I386_BUS_MEMIO_H_) 115#define _I386_BUS_PIO_H_ 116#define _I386_BUS_MEMIO_H_ 117#endif 118 119/* 120 * Values for the i386 bus space tag, not to be used directly by MI code. 121 */ 122#define I386_BUS_SPACE_IO 0 /* space is i/o space */ 123#define I386_BUS_SPACE_MEM 1 /* space is mem space */ 124 125#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF 126#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF 127#define BUS_SPACE_MAXSIZE 0xFFFFFFFF 128#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF 129#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF 130#ifdef PAE 131#define BUS_SPACE_MAXADDR 0xFFFFFFFFFFFFFFFFULL 132#else 133#define BUS_SPACE_MAXADDR 0xFFFFFFFF 134#endif 135 136#define BUS_SPACE_UNRESTRICTED (~0) 137 138/* 139 * Map a region of device bus space into CPU virtual address space. 140 */ 141 142static __inline int bus_space_map(bus_space_tag_t t, bus_addr_t addr, 143 bus_size_t size, int flags, 144 bus_space_handle_t *bshp); 145 146static __inline int 147bus_space_map(bus_space_tag_t t __unused, bus_addr_t addr, 148 bus_size_t size __unused, int flags __unused, 149 bus_space_handle_t *bshp) 150{ 151 152 *bshp = addr; 153 return (0); 154} 155 156/* 157 * Unmap a region of device bus space. 158 */ 159 160static __inline void bus_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh, 161 bus_size_t size); 162 163static __inline void 164bus_space_unmap(bus_space_tag_t t __unused, bus_space_handle_t bsh __unused, 165 bus_size_t size __unused) 166{ 167} 168 169/* 170 * Get a new handle for a subregion of an already-mapped area of bus space. 171 */ 172 173static __inline int bus_space_subregion(bus_space_tag_t t, 174 bus_space_handle_t bsh, 175 bus_size_t offset, bus_size_t size, 176 bus_space_handle_t *nbshp); 177 178static __inline int 179bus_space_subregion(bus_space_tag_t t __unused, bus_space_handle_t bsh, 180 bus_size_t offset, bus_size_t size __unused, 181 bus_space_handle_t *nbshp) 182{ 183 184 *nbshp = bsh + offset; 185 return (0); 186} 187 188/* 189 * Allocate a region of memory that is accessible to devices in bus space. 190 */ 191 192int bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart, 193 bus_addr_t rend, bus_size_t size, bus_size_t align, 194 bus_size_t boundary, int flags, bus_addr_t *addrp, 195 bus_space_handle_t *bshp); 196 197/* 198 * Free a region of bus space accessible memory. 199 */ 200 201static __inline void bus_space_free(bus_space_tag_t t, bus_space_handle_t bsh, 202 bus_size_t size); 203 204static __inline void 205bus_space_free(bus_space_tag_t t __unused, bus_space_handle_t bsh __unused, 206 bus_size_t size __unused) 207{ 208} 209 210 211#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_) 212 213/* 214 * Read a 1, 2, 4, or 8 byte quantity from bus space 215 * described by tag/handle/offset. 216 */ 217static __inline u_int8_t bus_space_read_1(bus_space_tag_t tag, 218 bus_space_handle_t handle, 219 bus_size_t offset); 220 221static __inline u_int16_t bus_space_read_2(bus_space_tag_t tag, 222 bus_space_handle_t handle, 223 bus_size_t offset); 224 225static __inline u_int32_t bus_space_read_4(bus_space_tag_t tag, 226 bus_space_handle_t handle, 227 bus_size_t offset); 228 229static __inline u_int8_t 230bus_space_read_1(bus_space_tag_t tag, bus_space_handle_t handle, 231 bus_size_t offset) 232{ 233#if defined (_I386_BUS_PIO_H_) 234#if defined (_I386_BUS_MEMIO_H_) 235 if (tag == I386_BUS_SPACE_IO) 236#endif 237 return (inb(handle + offset)); 238#endif 239#if defined (_I386_BUS_MEMIO_H_) 240 return (*(volatile u_int8_t *)(handle + offset)); 241#endif 242} 243 244static __inline u_int16_t 245bus_space_read_2(bus_space_tag_t tag, bus_space_handle_t handle, 246 bus_size_t offset) 247{ 248#if defined(_I386_BUS_PIO_H_) 249#if defined(_I386_BUS_MEMIO_H_) 250 if (tag == I386_BUS_SPACE_IO) 251#endif 252 return (inw(handle + offset)); 253#endif 254#if defined(_I386_BUS_MEMIO_H_) 255 return (*(volatile u_int16_t *)(handle + offset)); 256#endif 257} 258 259static __inline u_int32_t 260bus_space_read_4(bus_space_tag_t tag, bus_space_handle_t handle, 261 bus_size_t offset) 262{ 263#if defined(_I386_BUS_PIO_H_) 264#if defined(_I386_BUS_MEMIO_H_) 265 if (tag == I386_BUS_SPACE_IO) 266#endif 267 return (inl(handle + offset)); 268#endif 269#if defined(_I386_BUS_MEMIO_H_) 270 return (*(volatile u_int32_t *)(handle + offset)); 271#endif 272} 273 274#if 0 /* Cause a link error for bus_space_read_8 */ 275#define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!! 276#endif 277 278/* 279 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 280 * described by tag/handle/offset and copy into buffer provided. 281 */ 282static __inline void bus_space_read_multi_1(bus_space_tag_t tag, 283 bus_space_handle_t bsh, 284 bus_size_t offset, u_int8_t *addr, 285 size_t count); 286 287static __inline void bus_space_read_multi_2(bus_space_tag_t tag, 288 bus_space_handle_t bsh, 289 bus_size_t offset, u_int16_t *addr, 290 size_t count); 291 292static __inline void bus_space_read_multi_4(bus_space_tag_t tag, 293 bus_space_handle_t bsh, 294 bus_size_t offset, u_int32_t *addr, 295 size_t count); 296 297static __inline void 298bus_space_read_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh, 299 bus_size_t offset, u_int8_t *addr, size_t count) 300{ 301#if defined(_I386_BUS_PIO_H_) 302#if defined(_I386_BUS_MEMIO_H_) 303 if (tag == I386_BUS_SPACE_IO) 304#endif 305 insb(bsh + offset, addr, count); 306#endif 307#if defined(_I386_BUS_MEMIO_H_) 308#if defined(_I386_BUS_PIO_H_) 309 else 310#endif 311 { 312#ifdef __GNUCLIKE_ASM 313 __asm __volatile(" \n\ 314 cld \n\ 315 1: movb (%2),%%al \n\ 316 stosb \n\ 317 loop 1b" : 318 "=D" (addr), "=c" (count) : 319 "r" (bsh + offset), "0" (addr), "1" (count) : 320 "%eax", "memory"); 321#else 322# ifndef lint 323# error "no assembler code for your compiler" 324# endif 325#endif 326 } 327#endif 328} 329 330static __inline void 331bus_space_read_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh, 332 bus_size_t offset, u_int16_t *addr, size_t count) 333{ 334#if defined(_I386_BUS_PIO_H_) 335#if defined(_I386_BUS_MEMIO_H_) 336 if (tag == I386_BUS_SPACE_IO) 337#endif 338 insw(bsh + offset, addr, count); 339#endif 340#if defined(_I386_BUS_MEMIO_H_) 341#if defined(_I386_BUS_PIO_H_) 342 else 343#endif 344 { 345#ifdef __GNUCLIKE_ASM 346 __asm __volatile(" \n\ 347 cld \n\ 348 1: movw (%2),%%ax \n\ 349 stosw \n\ 350 loop 1b" : 351 "=D" (addr), "=c" (count) : 352 "r" (bsh + offset), "0" (addr), "1" (count) : 353 "%eax", "memory"); 354#else 355# ifndef lint 356# error "no assembler code for your compiler" 357# endif 358#endif 359 } 360#endif 361} 362 363static __inline void 364bus_space_read_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh, 365 bus_size_t offset, u_int32_t *addr, size_t count) 366{ 367#if defined(_I386_BUS_PIO_H_) 368#if defined(_I386_BUS_MEMIO_H_) 369 if (tag == I386_BUS_SPACE_IO) 370#endif 371 insl(bsh + offset, addr, count); 372#endif 373#if defined(_I386_BUS_MEMIO_H_) 374#if defined(_I386_BUS_PIO_H_) 375 else 376#endif 377 { 378#ifdef __GNUCLIKE_ASM 379 __asm __volatile(" \n\ 380 cld \n\ 381 1: movl (%2),%%eax \n\ 382 stosl \n\ 383 loop 1b" : 384 "=D" (addr), "=c" (count) : 385 "r" (bsh + offset), "0" (addr), "1" (count) : 386 "%eax", "memory"); 387#else 388# ifndef lint 389# error "no assembler code for your compiler" 390# endif 391#endif 392 } 393#endif 394} 395 396#if 0 /* Cause a link error for bus_space_read_multi_8 */ 397#define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!! 398#endif 399 400/* 401 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 402 * described by tag/handle and starting at `offset' and copy into 403 * buffer provided. 404 */ 405static __inline void bus_space_read_region_1(bus_space_tag_t tag, 406 bus_space_handle_t bsh, 407 bus_size_t offset, u_int8_t *addr, 408 size_t count); 409 410static __inline void bus_space_read_region_2(bus_space_tag_t tag, 411 bus_space_handle_t bsh, 412 bus_size_t offset, u_int16_t *addr, 413 size_t count); 414 415static __inline void bus_space_read_region_4(bus_space_tag_t tag, 416 bus_space_handle_t bsh, 417 bus_size_t offset, u_int32_t *addr, 418 size_t count); 419 420 421static __inline void 422bus_space_read_region_1(bus_space_tag_t tag, bus_space_handle_t bsh, 423 bus_size_t offset, u_int8_t *addr, size_t count) 424{ 425#if defined(_I386_BUS_PIO_H_) 426#if defined(_I386_BUS_MEMIO_H_) 427 if (tag == I386_BUS_SPACE_IO) 428#endif 429 { 430 int _port_ = bsh + offset; 431#ifdef __GNUCLIKE_ASM 432 __asm __volatile(" \n\ 433 cld \n\ 434 1: inb %w2,%%al \n\ 435 stosb \n\ 436 incl %2 \n\ 437 loop 1b" : 438 "=D" (addr), "=c" (count), "=d" (_port_) : 439 "0" (addr), "1" (count), "2" (_port_) : 440 "%eax", "memory", "cc"); 441#else 442# ifndef lint 443# error "no assembler code for your compiler" 444# endif 445#endif 446 } 447#endif 448#if defined(_I386_BUS_MEMIO_H_) 449#if defined(_I386_BUS_PIO_H_) 450 else 451#endif 452 { 453 int _port_ = bsh + offset; 454#ifdef __GNUCLIKE_ASM 455 __asm __volatile(" \n\ 456 cld \n\ 457 repne \n\ 458 movsb" : 459 "=D" (addr), "=c" (count), "=S" (_port_) : 460 "0" (addr), "1" (count), "2" (_port_) : 461 "memory", "cc"); 462#else 463# ifndef lint 464# error "no assembler code for your compiler" 465# endif 466#endif 467 } 468#endif 469} 470 471static __inline void 472bus_space_read_region_2(bus_space_tag_t tag, bus_space_handle_t bsh, 473 bus_size_t offset, u_int16_t *addr, size_t count) 474{ 475#if defined(_I386_BUS_PIO_H_) 476#if defined(_I386_BUS_MEMIO_H_) 477 if (tag == I386_BUS_SPACE_IO) 478#endif 479 { 480 int _port_ = bsh + offset; 481#ifdef __GNUCLIKE_ASM 482 __asm __volatile(" \n\ 483 cld \n\ 484 1: inw %w2,%%ax \n\ 485 stosw \n\ 486 addl $2,%2 \n\ 487 loop 1b" : 488 "=D" (addr), "=c" (count), "=d" (_port_) : 489 "0" (addr), "1" (count), "2" (_port_) : 490 "%eax", "memory", "cc"); 491#else 492# ifndef lint 493# error "no assembler code for your compiler" 494# endif 495#endif 496 } 497#endif 498#if defined(_I386_BUS_MEMIO_H_) 499#if defined(_I386_BUS_PIO_H_) 500 else 501#endif 502 { 503 int _port_ = bsh + offset; 504#ifdef __GNUCLIKE_ASM 505 __asm __volatile(" \n\ 506 cld \n\ 507 repne \n\ 508 movsw" : 509 "=D" (addr), "=c" (count), "=S" (_port_) : 510 "0" (addr), "1" (count), "2" (_port_) : 511 "memory", "cc"); 512#else 513# ifndef lint 514# error "no assembler code for your compiler" 515# endif 516#endif 517 } 518#endif 519} 520 521static __inline void 522bus_space_read_region_4(bus_space_tag_t tag, bus_space_handle_t bsh, 523 bus_size_t offset, u_int32_t *addr, size_t count) 524{ 525#if defined(_I386_BUS_PIO_H_) 526#if defined(_I386_BUS_MEMIO_H_) 527 if (tag == I386_BUS_SPACE_IO) 528#endif 529 { 530 int _port_ = bsh + offset; 531#ifdef __GNUCLIKE_ASM 532 __asm __volatile(" \n\ 533 cld \n\ 534 1: inl %w2,%%eax \n\ 535 stosl \n\ 536 addl $4,%2 \n\ 537 loop 1b" : 538 "=D" (addr), "=c" (count), "=d" (_port_) : 539 "0" (addr), "1" (count), "2" (_port_) : 540 "%eax", "memory", "cc"); 541#else 542# ifndef lint 543# error "no assembler code for your compiler" 544# endif 545#endif 546 } 547#endif 548#if defined(_I386_BUS_MEMIO_H_) 549#if defined(_I386_BUS_PIO_H_) 550 else 551#endif 552 { 553 int _port_ = bsh + offset; 554#ifdef __GNUCLIKE_ASM 555 __asm __volatile(" \n\ 556 cld \n\ 557 repne \n\ 558 movsl" : 559 "=D" (addr), "=c" (count), "=S" (_port_) : 560 "0" (addr), "1" (count), "2" (_port_) : 561 "memory", "cc"); 562#else 563# ifndef lint 564# error "no assembler code for your compiler" 565# endif 566#endif 567 } 568#endif 569} 570 571#if 0 /* Cause a link error for bus_space_read_region_8 */ 572#define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!! 573#endif 574 575/* 576 * Write the 1, 2, 4, or 8 byte value `value' to bus space 577 * described by tag/handle/offset. 578 */ 579 580static __inline void bus_space_write_1(bus_space_tag_t tag, 581 bus_space_handle_t bsh, 582 bus_size_t offset, u_int8_t value); 583 584static __inline void bus_space_write_2(bus_space_tag_t tag, 585 bus_space_handle_t bsh, 586 bus_size_t offset, u_int16_t value); 587 588static __inline void bus_space_write_4(bus_space_tag_t tag, 589 bus_space_handle_t bsh, 590 bus_size_t offset, u_int32_t value); 591 592static __inline void 593bus_space_write_1(bus_space_tag_t tag, bus_space_handle_t bsh, 594 bus_size_t offset, u_int8_t value) 595{ 596#if defined(_I386_BUS_PIO_H_) 597#if defined(_I386_BUS_MEMIO_H_) 598 if (tag == I386_BUS_SPACE_IO) 599#endif 600 outb(bsh + offset, value); 601#endif 602#if defined(_I386_BUS_MEMIO_H_) 603#if defined(_I386_BUS_PIO_H_) 604 else 605#endif 606 *(volatile u_int8_t *)(bsh + offset) = value; 607#endif 608} 609 610static __inline void 611bus_space_write_2(bus_space_tag_t tag, bus_space_handle_t bsh, 612 bus_size_t offset, u_int16_t value) 613{ 614#if defined(_I386_BUS_PIO_H_) 615#if defined(_I386_BUS_MEMIO_H_) 616 if (tag == I386_BUS_SPACE_IO) 617#endif 618 outw(bsh + offset, value); 619#endif 620#if defined(_I386_BUS_MEMIO_H_) 621#if defined(_I386_BUS_PIO_H_) 622 else 623#endif 624 *(volatile u_int16_t *)(bsh + offset) = value; 625#endif 626} 627 628static __inline void 629bus_space_write_4(bus_space_tag_t tag, bus_space_handle_t bsh, 630 bus_size_t offset, u_int32_t value) 631{ 632#if defined(_I386_BUS_PIO_H_) 633#if defined(_I386_BUS_MEMIO_H_) 634 if (tag == I386_BUS_SPACE_IO) 635#endif 636 outl(bsh + offset, value); 637#endif 638#if defined(_I386_BUS_MEMIO_H_) 639#if defined(_I386_BUS_PIO_H_) 640 else 641#endif 642 *(volatile u_int32_t *)(bsh + offset) = value; 643#endif 644} 645 646#if 0 /* Cause a link error for bus_space_write_8 */ 647#define bus_space_write_8 !!! bus_space_write_8 not implemented !!! 648#endif 649 650/* 651 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer 652 * provided to bus space described by tag/handle/offset. 653 */ 654 655static __inline void bus_space_write_multi_1(bus_space_tag_t tag, 656 bus_space_handle_t bsh, 657 bus_size_t offset, 658 const u_int8_t *addr, 659 size_t count); 660static __inline void bus_space_write_multi_2(bus_space_tag_t tag, 661 bus_space_handle_t bsh, 662 bus_size_t offset, 663 const u_int16_t *addr, 664 size_t count); 665 666static __inline void bus_space_write_multi_4(bus_space_tag_t tag, 667 bus_space_handle_t bsh, 668 bus_size_t offset, 669 const u_int32_t *addr, 670 size_t count); 671 672static __inline void 673bus_space_write_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh, 674 bus_size_t offset, const u_int8_t *addr, size_t count) 675{ 676#if defined(_I386_BUS_PIO_H_) 677#if defined(_I386_BUS_MEMIO_H_) 678 if (tag == I386_BUS_SPACE_IO) 679#endif 680 outsb(bsh + offset, addr, count); 681#endif 682#if defined(_I386_BUS_MEMIO_H_) 683#if defined(_I386_BUS_PIO_H_) 684 else 685#endif 686 { 687#ifdef __GNUCLIKE_ASM 688 __asm __volatile(" \n\ 689 cld \n\ 690 1: lodsb \n\ 691 movb %%al,(%2) \n\ 692 loop 1b" : 693 "=S" (addr), "=c" (count) : 694 "r" (bsh + offset), "0" (addr), "1" (count) : 695 "%eax", "memory", "cc"); 696#else 697# ifndef lint 698# error "no assembler code for your compiler" 699# endif 700#endif 701 } 702#endif 703} 704 705static __inline void 706bus_space_write_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh, 707 bus_size_t offset, const u_int16_t *addr, size_t count) 708{ 709#if defined(_I386_BUS_PIO_H_) 710#if defined(_I386_BUS_MEMIO_H_) 711 if (tag == I386_BUS_SPACE_IO) 712#endif 713 outsw(bsh + offset, addr, count); 714#endif 715#if defined(_I386_BUS_MEMIO_H_) 716#if defined(_I386_BUS_PIO_H_) 717 else 718#endif 719 { 720#ifdef __GNUCLIKE_ASM 721 __asm __volatile(" \n\ 722 cld \n\ 723 1: lodsw \n\ 724 movw %%ax,(%2) \n\ 725 loop 1b" : 726 "=S" (addr), "=c" (count) : 727 "r" (bsh + offset), "0" (addr), "1" (count) : 728 "%eax", "memory", "cc"); 729#else 730# ifndef lint 731# error "no assembler code for your compiler" 732# endif 733#endif 734 } 735#endif 736} 737 738static __inline void 739bus_space_write_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh, 740 bus_size_t offset, const u_int32_t *addr, size_t count) 741{ 742#if defined(_I386_BUS_PIO_H_) 743#if defined(_I386_BUS_MEMIO_H_) 744 if (tag == I386_BUS_SPACE_IO) 745#endif 746 outsl(bsh + offset, addr, count); 747#endif 748#if defined(_I386_BUS_MEMIO_H_) 749#if defined(_I386_BUS_PIO_H_) 750 else 751#endif 752 { 753#ifdef __GNUCLIKE_ASM 754 __asm __volatile(" \n\ 755 cld \n\ 756 1: lodsl \n\ 757 movl %%eax,(%2) \n\ 758 loop 1b" : 759 "=S" (addr), "=c" (count) : 760 "r" (bsh + offset), "0" (addr), "1" (count) : 761 "%eax", "memory", "cc"); 762#else 763# ifndef lint 764# error "no assembler code for your compiler" 765# endif 766#endif 767 } 768#endif 769} 770 771#if 0 /* Cause a link error for bus_space_write_multi_8 */ 772#define bus_space_write_multi_8(t, h, o, a, c) \ 773 !!! bus_space_write_multi_8 unimplemented !!! 774#endif 775 776/* 777 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided 778 * to bus space described by tag/handle starting at `offset'. 779 */ 780 781static __inline void bus_space_write_region_1(bus_space_tag_t tag, 782 bus_space_handle_t bsh, 783 bus_size_t offset, 784 const u_int8_t *addr, 785 size_t count); 786static __inline void bus_space_write_region_2(bus_space_tag_t tag, 787 bus_space_handle_t bsh, 788 bus_size_t offset, 789 const u_int16_t *addr, 790 size_t count); 791static __inline void bus_space_write_region_4(bus_space_tag_t tag, 792 bus_space_handle_t bsh, 793 bus_size_t offset, 794 const u_int32_t *addr, 795 size_t count); 796 797static __inline void 798bus_space_write_region_1(bus_space_tag_t tag, bus_space_handle_t bsh, 799 bus_size_t offset, const u_int8_t *addr, size_t count) 800{ 801#if defined(_I386_BUS_PIO_H_) 802#if defined(_I386_BUS_MEMIO_H_) 803 if (tag == I386_BUS_SPACE_IO) 804#endif 805 { 806 int _port_ = bsh + offset; 807#ifdef __GNUCLIKE_ASM 808 __asm __volatile(" \n\ 809 cld \n\ 810 1: lodsb \n\ 811 outb %%al,%w0 \n\ 812 incl %0 \n\ 813 loop 1b" : 814 "=d" (_port_), "=S" (addr), "=c" (count) : 815 "0" (_port_), "1" (addr), "2" (count) : 816 "%eax", "memory", "cc"); 817#else 818# ifndef lint 819# error "no assembler code for your compiler" 820# endif 821#endif 822 } 823#endif 824#if defined(_I386_BUS_MEMIO_H_) 825#if defined(_I386_BUS_PIO_H_) 826 else 827#endif 828 { 829 int _port_ = bsh + offset; 830#ifdef __GNUCLIKE_ASM 831 __asm __volatile(" \n\ 832 cld \n\ 833 repne \n\ 834 movsb" : 835 "=D" (_port_), "=S" (addr), "=c" (count) : 836 "0" (_port_), "1" (addr), "2" (count) : 837 "memory", "cc"); 838#else 839# ifndef lint 840# error "no assembler code for your compiler" 841# endif 842#endif 843 } 844#endif 845} 846 847static __inline void 848bus_space_write_region_2(bus_space_tag_t tag, bus_space_handle_t bsh, 849 bus_size_t offset, const u_int16_t *addr, size_t count) 850{ 851#if defined(_I386_BUS_PIO_H_) 852#if defined(_I386_BUS_MEMIO_H_) 853 if (tag == I386_BUS_SPACE_IO) 854#endif 855 { 856 int _port_ = bsh + offset; 857#ifdef __GNUCLIKE_ASM 858 __asm __volatile(" \n\ 859 cld \n\ 860 1: lodsw \n\ 861 outw %%ax,%w0 \n\ 862 addl $2,%0 \n\ 863 loop 1b" : 864 "=d" (_port_), "=S" (addr), "=c" (count) : 865 "0" (_port_), "1" (addr), "2" (count) : 866 "%eax", "memory", "cc"); 867#else 868# ifndef lint 869# error "no assembler code for your compiler" 870# endif 871#endif 872 } 873#endif 874#if defined(_I386_BUS_MEMIO_H_) 875#if defined(_I386_BUS_PIO_H_) 876 else 877#endif 878 { 879 int _port_ = bsh + offset; 880#ifdef __GNUCLIKE_ASM 881 __asm __volatile(" \n\ 882 cld \n\ 883 repne \n\ 884 movsw" : 885 "=D" (_port_), "=S" (addr), "=c" (count) : 886 "0" (_port_), "1" (addr), "2" (count) : 887 "memory", "cc"); 888#else 889# ifndef lint 890# error "no assembler code for your compiler" 891# endif 892#endif 893 } 894#endif 895} 896 897static __inline void 898bus_space_write_region_4(bus_space_tag_t tag, bus_space_handle_t bsh, 899 bus_size_t offset, const u_int32_t *addr, size_t count) 900{ 901#if defined(_I386_BUS_PIO_H_) 902#if defined(_I386_BUS_MEMIO_H_) 903 if (tag == I386_BUS_SPACE_IO) 904#endif 905 { 906 int _port_ = bsh + offset; 907#ifdef __GNUCLIKE_ASM 908 __asm __volatile(" \n\ 909 cld \n\ 910 1: lodsl \n\ 911 outl %%eax,%w0 \n\ 912 addl $4,%0 \n\ 913 loop 1b" : 914 "=d" (_port_), "=S" (addr), "=c" (count) : 915 "0" (_port_), "1" (addr), "2" (count) : 916 "%eax", "memory", "cc"); 917#else 918# ifndef lint 919# error "no assembler code for your compiler" 920# endif 921#endif 922 } 923#endif 924#if defined(_I386_BUS_MEMIO_H_) 925#if defined(_I386_BUS_PIO_H_) 926 else 927#endif 928 { 929 int _port_ = bsh + offset; 930#ifdef __GNUCLIKE_ASM 931 __asm __volatile(" \n\ 932 cld \n\ 933 repne \n\ 934 movsl" : 935 "=D" (_port_), "=S" (addr), "=c" (count) : 936 "0" (_port_), "1" (addr), "2" (count) : 937 "memory", "cc"); 938#else 939# ifndef lint 940# error "no assembler code for your compiler" 941# endif 942#endif 943 } 944#endif 945} 946 947#if 0 /* Cause a link error for bus_space_write_region_8 */ 948#define bus_space_write_region_8 \ 949 !!! bus_space_write_region_8 unimplemented !!! 950#endif 951 952/* 953 * Write the 1, 2, 4, or 8 byte value `val' to bus space described 954 * by tag/handle/offset `count' times. 955 */ 956 957static __inline void bus_space_set_multi_1(bus_space_tag_t tag, 958 bus_space_handle_t bsh, 959 bus_size_t offset, 960 u_int8_t value, size_t count); 961static __inline void bus_space_set_multi_2(bus_space_tag_t tag, 962 bus_space_handle_t bsh, 963 bus_size_t offset, 964 u_int16_t value, size_t count); 965static __inline void bus_space_set_multi_4(bus_space_tag_t tag, 966 bus_space_handle_t bsh, 967 bus_size_t offset, 968 u_int32_t value, size_t count); 969 970static __inline void 971bus_space_set_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh, 972 bus_size_t offset, u_int8_t value, size_t count) 973{ 974 bus_space_handle_t addr = bsh + offset; 975 976#if defined(_I386_BUS_PIO_H_) 977#if defined(_I386_BUS_MEMIO_H_) 978 if (tag == I386_BUS_SPACE_IO) 979#endif 980 while (count--) 981 outb(addr, value); 982#endif 983#if defined(_I386_BUS_MEMIO_H_) 984#if defined(_I386_BUS_PIO_H_) 985 else 986#endif 987 while (count--) 988 *(volatile u_int8_t *)(addr) = value; 989#endif 990} 991 992static __inline void 993bus_space_set_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh, 994 bus_size_t offset, u_int16_t value, size_t count) 995{ 996 bus_space_handle_t addr = bsh + offset; 997 998#if defined(_I386_BUS_PIO_H_) 999#if defined(_I386_BUS_MEMIO_H_) 1000 if (tag == I386_BUS_SPACE_IO) 1001#endif 1002 while (count--) 1003 outw(addr, value); 1004#endif 1005#if defined(_I386_BUS_MEMIO_H_) 1006#if defined(_I386_BUS_PIO_H_) 1007 else 1008#endif 1009 while (count--) 1010 *(volatile u_int16_t *)(addr) = value; 1011#endif 1012} 1013 1014static __inline void 1015bus_space_set_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh, 1016 bus_size_t offset, u_int32_t value, size_t count) 1017{ 1018 bus_space_handle_t addr = bsh + offset; 1019 1020#if defined(_I386_BUS_PIO_H_) 1021#if defined(_I386_BUS_MEMIO_H_) 1022 if (tag == I386_BUS_SPACE_IO) 1023#endif 1024 while (count--) 1025 outl(addr, value); 1026#endif 1027#if defined(_I386_BUS_MEMIO_H_) 1028#if defined(_I386_BUS_PIO_H_) 1029 else 1030#endif 1031 while (count--) 1032 *(volatile u_int32_t *)(addr) = value; 1033#endif 1034} 1035 1036#if 0 /* Cause a link error for bus_space_set_multi_8 */ 1037#define bus_space_set_multi_8 !!! bus_space_set_multi_8 unimplemented !!! 1038#endif 1039 1040/* 1041 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described 1042 * by tag/handle starting at `offset'. 1043 */ 1044 1045static __inline void bus_space_set_region_1(bus_space_tag_t tag, 1046 bus_space_handle_t bsh, 1047 bus_size_t offset, u_int8_t value, 1048 size_t count); 1049static __inline void bus_space_set_region_2(bus_space_tag_t tag, 1050 bus_space_handle_t bsh, 1051 bus_size_t offset, u_int16_t value, 1052 size_t count); 1053static __inline void bus_space_set_region_4(bus_space_tag_t tag, 1054 bus_space_handle_t bsh, 1055 bus_size_t offset, u_int32_t value, 1056 size_t count); 1057 1058static __inline void 1059bus_space_set_region_1(bus_space_tag_t tag, bus_space_handle_t bsh, 1060 bus_size_t offset, u_int8_t value, size_t count) 1061{ 1062 bus_space_handle_t addr = bsh + offset; 1063 1064#if defined(_I386_BUS_PIO_H_) 1065#if defined(_I386_BUS_MEMIO_H_) 1066 if (tag == I386_BUS_SPACE_IO) 1067#endif 1068 for (; count != 0; count--, addr++) 1069 outb(addr, value); 1070#endif 1071#if defined(_I386_BUS_MEMIO_H_) 1072#if defined(_I386_BUS_PIO_H_) 1073 else 1074#endif 1075 for (; count != 0; count--, addr++) 1076 *(volatile u_int8_t *)(addr) = value; 1077#endif 1078} 1079 1080static __inline void 1081bus_space_set_region_2(bus_space_tag_t tag, bus_space_handle_t bsh, 1082 bus_size_t offset, u_int16_t value, size_t count) 1083{ 1084 bus_space_handle_t addr = bsh + offset; 1085 1086#if defined(_I386_BUS_PIO_H_) 1087#if defined(_I386_BUS_MEMIO_H_) 1088 if (tag == I386_BUS_SPACE_IO) 1089#endif 1090 for (; count != 0; count--, addr += 2) 1091 outw(addr, value); 1092#endif 1093#if defined(_I386_BUS_MEMIO_H_) 1094#if defined(_I386_BUS_PIO_H_) 1095 else 1096#endif 1097 for (; count != 0; count--, addr += 2) 1098 *(volatile u_int16_t *)(addr) = value; 1099#endif 1100} 1101 1102static __inline void 1103bus_space_set_region_4(bus_space_tag_t tag, bus_space_handle_t bsh, 1104 bus_size_t offset, u_int32_t value, size_t count) 1105{ 1106 bus_space_handle_t addr = bsh + offset; 1107 1108#if defined(_I386_BUS_PIO_H_) 1109#if defined(_I386_BUS_MEMIO_H_) 1110 if (tag == I386_BUS_SPACE_IO) 1111#endif 1112 for (; count != 0; count--, addr += 4) 1113 outl(addr, value); 1114#endif 1115#if defined(_I386_BUS_MEMIO_H_) 1116#if defined(_I386_BUS_PIO_H_) 1117 else 1118#endif 1119 for (; count != 0; count--, addr += 4) 1120 *(volatile u_int32_t *)(addr) = value; 1121#endif 1122} 1123 1124#if 0 /* Cause a link error for bus_space_set_region_8 */ 1125#define bus_space_set_region_8 !!! bus_space_set_region_8 unimplemented !!! 1126#endif 1127 1128/* 1129 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting 1130 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. 1131 */ 1132 1133static __inline void bus_space_copy_region_1(bus_space_tag_t tag, 1134 bus_space_handle_t bsh1, 1135 bus_size_t off1, 1136 bus_space_handle_t bsh2, 1137 bus_size_t off2, size_t count); 1138 1139static __inline void bus_space_copy_region_2(bus_space_tag_t tag, 1140 bus_space_handle_t bsh1, 1141 bus_size_t off1, 1142 bus_space_handle_t bsh2, 1143 bus_size_t off2, size_t count); 1144 1145static __inline void bus_space_copy_region_4(bus_space_tag_t tag, 1146 bus_space_handle_t bsh1, 1147 bus_size_t off1, 1148 bus_space_handle_t bsh2, 1149 bus_size_t off2, size_t count); 1150 1151static __inline void 1152bus_space_copy_region_1(bus_space_tag_t tag, bus_space_handle_t bsh1, 1153 bus_size_t off1, bus_space_handle_t bsh2, 1154 bus_size_t off2, size_t count) 1155{ 1156 bus_space_handle_t addr1 = bsh1 + off1; 1157 bus_space_handle_t addr2 = bsh2 + off2; 1158 1159#if defined(_I386_BUS_PIO_H_) 1160#if defined(_I386_BUS_MEMIO_H_) 1161 if (tag == I386_BUS_SPACE_IO) 1162#endif 1163 { 1164 if (addr1 >= addr2) { 1165 /* src after dest: copy forward */ 1166 for (; count != 0; count--, addr1++, addr2++) 1167 outb(addr2, inb(addr1)); 1168 } else { 1169 /* dest after src: copy backwards */ 1170 for (addr1 += (count - 1), addr2 += (count - 1); 1171 count != 0; count--, addr1--, addr2--) 1172 outb(addr2, inb(addr1)); 1173 } 1174 } 1175#endif 1176#if defined(_I386_BUS_MEMIO_H_) 1177#if defined(_I386_BUS_PIO_H_) 1178 else 1179#endif 1180 { 1181 if (addr1 >= addr2) { 1182 /* src after dest: copy forward */ 1183 for (; count != 0; count--, addr1++, addr2++) 1184 *(volatile u_int8_t *)(addr2) = 1185 *(volatile u_int8_t *)(addr1); 1186 } else { 1187 /* dest after src: copy backwards */ 1188 for (addr1 += (count - 1), addr2 += (count - 1); 1189 count != 0; count--, addr1--, addr2--) 1190 *(volatile u_int8_t *)(addr2) = 1191 *(volatile u_int8_t *)(addr1); 1192 } 1193 } 1194#endif 1195} 1196 1197static __inline void 1198bus_space_copy_region_2(bus_space_tag_t tag, bus_space_handle_t bsh1, 1199 bus_size_t off1, bus_space_handle_t bsh2, 1200 bus_size_t off2, size_t count) 1201{ 1202 bus_space_handle_t addr1 = bsh1 + off1; 1203 bus_space_handle_t addr2 = bsh2 + off2; 1204 1205#if defined(_I386_BUS_PIO_H_) 1206#if defined(_I386_BUS_MEMIO_H_) 1207 if (tag == I386_BUS_SPACE_IO) 1208#endif 1209 { 1210 if (addr1 >= addr2) { 1211 /* src after dest: copy forward */ 1212 for (; count != 0; count--, addr1 += 2, addr2 += 2) 1213 outw(addr2, inw(addr1)); 1214 } else { 1215 /* dest after src: copy backwards */ 1216 for (addr1 += 2 * (count - 1), addr2 += 2 * (count - 1); 1217 count != 0; count--, addr1 -= 2, addr2 -= 2) 1218 outw(addr2, inw(addr1)); 1219 } 1220 } 1221#endif 1222#if defined(_I386_BUS_MEMIO_H_) 1223#if defined(_I386_BUS_PIO_H_) 1224 else 1225#endif 1226 { 1227 if (addr1 >= addr2) { 1228 /* src after dest: copy forward */ 1229 for (; count != 0; count--, addr1 += 2, addr2 += 2) 1230 *(volatile u_int16_t *)(addr2) = 1231 *(volatile u_int16_t *)(addr1); 1232 } else { 1233 /* dest after src: copy backwards */ 1234 for (addr1 += 2 * (count - 1), addr2 += 2 * (count - 1); 1235 count != 0; count--, addr1 -= 2, addr2 -= 2) 1236 *(volatile u_int16_t *)(addr2) = 1237 *(volatile u_int16_t *)(addr1); 1238 } 1239 } 1240#endif 1241} 1242 1243static __inline void 1244bus_space_copy_region_4(bus_space_tag_t tag, bus_space_handle_t bsh1, 1245 bus_size_t off1, bus_space_handle_t bsh2, 1246 bus_size_t off2, size_t count) 1247{ 1248 bus_space_handle_t addr1 = bsh1 + off1; 1249 bus_space_handle_t addr2 = bsh2 + off2; 1250 1251#if defined(_I386_BUS_PIO_H_) 1252#if defined(_I386_BUS_MEMIO_H_) 1253 if (tag == I386_BUS_SPACE_IO) 1254#endif 1255 { 1256 if (addr1 >= addr2) { 1257 /* src after dest: copy forward */ 1258 for (; count != 0; count--, addr1 += 4, addr2 += 4) 1259 outl(addr2, inl(addr1)); 1260 } else { 1261 /* dest after src: copy backwards */ 1262 for (addr1 += 4 * (count - 1), addr2 += 4 * (count - 1); 1263 count != 0; count--, addr1 -= 4, addr2 -= 4) 1264 outl(addr2, inl(addr1)); 1265 } 1266 } 1267#endif 1268#if defined(_I386_BUS_MEMIO_H_) 1269#if defined(_I386_BUS_PIO_H_) 1270 else 1271#endif 1272 { 1273 if (addr1 >= addr2) { 1274 /* src after dest: copy forward */ 1275 for (; count != 0; count--, addr1 += 4, addr2 += 4) 1276 *(volatile u_int32_t *)(addr2) = 1277 *(volatile u_int32_t *)(addr1); 1278 } else { 1279 /* dest after src: copy backwards */ 1280 for (addr1 += 4 * (count - 1), addr2 += 4 * (count - 1); 1281 count != 0; count--, addr1 -= 4, addr2 -= 4) 1282 *(volatile u_int32_t *)(addr2) = 1283 *(volatile u_int32_t *)(addr1); 1284 } 1285 } 1286#endif 1287} 1288 1289#endif /* defined(_I386_BUS_PIO_H_) || defined(_I386_MEM_IO_H_) */ 1290 1291#if 0 /* Cause a link error for bus_space_copy_8 */ 1292#define bus_space_copy_region_8 !!! bus_space_copy_region_8 unimplemented !!! 1293#endif 1294 1295/* 1296 * Bus read/write barrier methods. 1297 * 1298 * void bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, 1299 * bus_size_t offset, bus_size_t len, int flags); 1300 * 1301 * 1302 * Note that BUS_SPACE_BARRIER_WRITE doesn't do anything other than 1303 * prevent reordering by the compiler; all Intel x86 processors currently 1304 * retire operations outside the CPU in program order. 1305 */ 1306#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 1307#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 1308 1309static __inline void 1310bus_space_barrier(bus_space_tag_t tag __unused, bus_space_handle_t bsh __unused, 1311 bus_size_t offset __unused, bus_size_t len __unused, int flags) 1312{ 1313#ifdef __GNUCLIKE_ASM 1314 if (flags & BUS_SPACE_BARRIER_READ) 1315 __asm __volatile("lock; addl $0,0(%%esp)" : : : "memory"); 1316 else 1317 __asm __volatile("" : : : "memory"); 1318#else 1319# ifndef lint 1320# error "no assembler code for your compiler" 1321# endif 1322#endif 1323} 1324 1325#if BUS_SPACE_NO_LEGACY 1326#undef inb 1327#undef outb 1328#define inb(a) compiler_error 1329#define inw(a) compiler_error 1330#define inl(a) compiler_error 1331#define outb(a, b) compiler_error 1332#define outw(a, b) compiler_error 1333#define outl(a, b) compiler_error 1334#endif 1335 1336#include <machine/bus_dma.h> 1337 1338/* 1339 * Stream accesses are the same as normal accesses on i386/pc98; there are no 1340 * supported bus systems with an endianess different from the host one. 1341 */ 1342#define bus_space_read_stream_1(t, h, o) bus_space_read_1((t), (h), (o)) 1343#define bus_space_read_stream_2(t, h, o) bus_space_read_2((t), (h), (o)) 1344#define bus_space_read_stream_4(t, h, o) bus_space_read_4((t), (h), (o)) 1345 1346#define bus_space_read_multi_stream_1(t, h, o, a, c) \ 1347 bus_space_read_multi_1((t), (h), (o), (a), (c)) 1348#define bus_space_read_multi_stream_2(t, h, o, a, c) \ 1349 bus_space_read_multi_2((t), (h), (o), (a), (c)) 1350#define bus_space_read_multi_stream_4(t, h, o, a, c) \ 1351 bus_space_read_multi_4((t), (h), (o), (a), (c)) 1352 1353#define bus_space_write_stream_1(t, h, o, v) \ 1354 bus_space_write_1((t), (h), (o), (v)) 1355#define bus_space_write_stream_2(t, h, o, v) \ 1356 bus_space_write_2((t), (h), (o), (v)) 1357#define bus_space_write_stream_4(t, h, o, v) \ 1358 bus_space_write_4((t), (h), (o), (v)) 1359 1360#define bus_space_write_multi_stream_1(t, h, o, a, c) \ 1361 bus_space_write_multi_1((t), (h), (o), (a), (c)) 1362#define bus_space_write_multi_stream_2(t, h, o, a, c) \ 1363 bus_space_write_multi_2((t), (h), (o), (a), (c)) 1364#define bus_space_write_multi_stream_4(t, h, o, a, c) \ 1365 bus_space_write_multi_4((t), (h), (o), (a), (c)) 1366 1367#define bus_space_set_multi_stream_1(t, h, o, v, c) \ 1368 bus_space_set_multi_1((t), (h), (o), (v), (c)) 1369#define bus_space_set_multi_stream_2(t, h, o, v, c) \ 1370 bus_space_set_multi_2((t), (h), (o), (v), (c)) 1371#define bus_space_set_multi_stream_4(t, h, o, v, c) \ 1372 bus_space_set_multi_4((t), (h), (o), (v), (c)) 1373 1374#define bus_space_read_region_stream_1(t, h, o, a, c) \ 1375 bus_space_read_region_1((t), (h), (o), (a), (c)) 1376#define bus_space_read_region_stream_2(t, h, o, a, c) \ 1377 bus_space_read_region_2((t), (h), (o), (a), (c)) 1378#define bus_space_read_region_stream_4(t, h, o, a, c) \ 1379 bus_space_read_region_4((t), (h), (o), (a), (c)) 1380 1381#define bus_space_write_region_stream_1(t, h, o, a, c) \ 1382 bus_space_write_region_1((t), (h), (o), (a), (c)) 1383#define bus_space_write_region_stream_2(t, h, o, a, c) \ 1384 bus_space_write_region_2((t), (h), (o), (a), (c)) 1385#define bus_space_write_region_stream_4(t, h, o, a, c) \ 1386 bus_space_write_region_4((t), (h), (o), (a), (c)) 1387 1388#define bus_space_set_region_stream_1(t, h, o, v, c) \ 1389 bus_space_set_region_1((t), (h), (o), (v), (c)) 1390#define bus_space_set_region_stream_2(t, h, o, v, c) \ 1391 bus_space_set_region_2((t), (h), (o), (v), (c)) 1392#define bus_space_set_region_stream_4(t, h, o, v, c) \ 1393 bus_space_set_region_4((t), (h), (o), (v), (c)) 1394 1395#define bus_space_copy_region_stream_1(t, h1, o1, h2, o2, c) \ 1396 bus_space_copy_region_1((t), (h1), (o1), (h2), (o2), (c)) 1397#define bus_space_copy_region_stream_2(t, h1, o1, h2, o2, c) \ 1398 bus_space_copy_region_2((t), (h1), (o1), (h2), (o2), (c)) 1399#define bus_space_copy_region_stream_4(t, h1, o1, h2, o2, c) \ 1400 bus_space_copy_region_4((t), (h1), (o1), (h2), (o2), (c)) 1401 1402#endif /* _I386_BUS_H_ */ 1403