machdep.c revision 28976
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 * $Id: machdep.c,v 1.258 1997/08/26 18:10:30 peter Exp $ 39 */ 40 41#include "apm.h" 42#include "npx.h" 43#include "opt_sysvipc.h" 44#include "opt_ddb.h" 45#include "opt_bounce.h" 46#include "opt_maxmem.h" 47#include "opt_perfmon.h" 48#include "opt_smp.h" 49#include "opt_userconfig.h" 50 51#include <sys/param.h> 52#include <sys/systm.h> 53#include <sys/sysproto.h> 54#include <sys/signalvar.h> 55#include <sys/kernel.h> 56#include <sys/proc.h> 57#include <sys/buf.h> 58#include <sys/reboot.h> 59#include <sys/conf.h> 60#include <sys/callout.h> 61#include <sys/malloc.h> 62#include <sys/mbuf.h> 63#include <sys/msgbuf.h> 64#include <sys/sysent.h> 65#include <sys/sysctl.h> 66#include <sys/vmmeter.h> 67 68#ifdef SYSVSHM 69#include <sys/shm.h> 70#endif 71 72#ifdef SYSVMSG 73#include <sys/msg.h> 74#endif 75 76#ifdef SYSVSEM 77#include <sys/sem.h> 78#endif 79 80#include <vm/vm.h> 81#include <vm/vm_param.h> 82#include <vm/vm_prot.h> 83#include <sys/lock.h> 84#include <vm/vm_kern.h> 85#include <vm/vm_object.h> 86#include <vm/vm_page.h> 87#include <vm/vm_map.h> 88#include <vm/vm_pager.h> 89#include <vm/vm_extern.h> 90 91#include <sys/user.h> 92#include <sys/exec.h> 93 94#include <ddb/ddb.h> 95 96#include <net/netisr.h> 97 98#if NAPM > 0 99#include <machine/apm_bios.h> 100#endif 101#include <machine/cpu.h> 102#include <machine/reg.h> 103#include <machine/psl.h> 104#include <machine/clock.h> 105#include <machine/specialreg.h> 106#include <machine/cons.h> 107#include <machine/bootinfo.h> 108#include <machine/md_var.h> 109#include <machine/pcb_ext.h> 110#ifdef SMP 111#include <machine/smp.h> 112#endif 113#ifdef PERFMON 114#include <machine/perfmon.h> 115#endif 116 117#include <i386/isa/isa_device.h> 118#include <i386/isa/intr_machdep.h> 119#include <i386/isa/rtc.h> 120#include <machine/random.h> 121 122extern void init386 __P((int first)); 123extern int ptrace_set_pc __P((struct proc *p, unsigned int addr)); 124extern int ptrace_single_step __P((struct proc *p)); 125extern int ptrace_write_u __P((struct proc *p, vm_offset_t off, int data)); 126extern void dblfault_handler __P((void)); 127 128extern void printcpuinfo(void); /* XXX header file */ 129extern void earlysetcpuclass(void); /* same header file */ 130extern void finishidentcpu(void); 131extern void panicifcpuunsupported(void); 132extern void initializecpu(void); 133 134static void cpu_startup __P((void *)); 135SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 136 137 138#ifdef BOUNCE_BUFFERS 139extern char *bouncememory; 140extern int maxbkva; 141#ifdef BOUNCEPAGES 142int bouncepages = BOUNCEPAGES; 143#else 144int bouncepages = 0; 145#endif 146#endif /* BOUNCE_BUFFERS */ 147 148extern int freebufspace; 149int msgbufmapped = 0; /* set when safe to use msgbuf */ 150int _udatasel, _ucodesel; 151u_int atdevbase; 152 153 154int physmem = 0; 155int cold = 1; 156 157static int 158sysctl_hw_physmem SYSCTL_HANDLER_ARGS 159{ 160 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req); 161 return (error); 162} 163 164SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD, 165 0, 0, sysctl_hw_physmem, "I", ""); 166 167static int 168sysctl_hw_usermem SYSCTL_HANDLER_ARGS 169{ 170 int error = sysctl_handle_int(oidp, 0, 171 ctob(physmem - cnt.v_wire_count), req); 172 return (error); 173} 174 175SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD, 176 0, 0, sysctl_hw_usermem, "I", ""); 177 178int boothowto = 0, bootverbose = 0, Maxmem = 0; 179static int badpages = 0; 180long dumplo; 181extern int bootdev; 182 183vm_offset_t phys_avail[10]; 184 185/* must be 2 less so 0 0 can signal end of chunks */ 186#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 187 188static void setup_netisrs __P((struct linker_set *)); /* XXX declare elsewhere */ 189 190static vm_offset_t buffer_sva, buffer_eva; 191vm_offset_t clean_sva, clean_eva; 192static vm_offset_t pager_sva, pager_eva; 193extern struct linker_set netisr_set; 194 195#define offsetof(type, member) ((size_t)(&((type *)0)->member)) 196 197static void 198cpu_startup(dummy) 199 void *dummy; 200{ 201 register unsigned i; 202 register caddr_t v; 203 vm_offset_t maxaddr; 204 vm_size_t size = 0; 205 int firstaddr; 206 vm_offset_t minaddr; 207 208 if (boothowto & RB_VERBOSE) 209 bootverbose++; 210 211 /* 212 * Good {morning,afternoon,evening,night}. 213 */ 214 printf(version); 215 earlysetcpuclass(); 216 startrtclock(); 217 printcpuinfo(); 218 panicifcpuunsupported(); 219#ifdef PERFMON 220 perfmon_init(); 221#endif 222 printf("real memory = %d (%dK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024); 223 /* 224 * Display any holes after the first chunk of extended memory. 225 */ 226 if (badpages != 0) { 227 int indx = 1; 228 229 /* 230 * XXX skip reporting ISA hole & unmanaged kernel memory 231 */ 232 if (phys_avail[0] == PAGE_SIZE) 233 indx += 2; 234 235 printf("Physical memory hole(s):\n"); 236 for (; phys_avail[indx + 1] != 0; indx += 2) { 237 int size = phys_avail[indx + 1] - phys_avail[indx]; 238 239 printf("0x%08lx - 0x%08lx, %d bytes (%d pages)\n", phys_avail[indx], 240 phys_avail[indx + 1] - 1, size, size / PAGE_SIZE); 241 } 242 } 243 244 /* 245 * Quickly wire in netisrs. 246 */ 247 setup_netisrs(&netisr_set); 248 249 /* 250 * Allocate space for system data structures. 251 * The first available kernel virtual address is in "v". 252 * As pages of kernel virtual memory are allocated, "v" is incremented. 253 * As pages of memory are allocated and cleared, 254 * "firstaddr" is incremented. 255 * An index into the kernel page table corresponding to the 256 * virtual memory address maintained in "v" is kept in "mapaddr". 257 */ 258 259 /* 260 * Make two passes. The first pass calculates how much memory is 261 * needed and allocates it. The second pass assigns virtual 262 * addresses to the various data structures. 263 */ 264 firstaddr = 0; 265again: 266 v = (caddr_t)firstaddr; 267 268#define valloc(name, type, num) \ 269 (name) = (type *)v; v = (caddr_t)((name)+(num)) 270#define valloclim(name, type, num, lim) \ 271 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num))) 272 valloc(callout, struct callout, ncallout); 273#ifdef SYSVSHM 274 valloc(shmsegs, struct shmid_ds, shminfo.shmmni); 275#endif 276#ifdef SYSVSEM 277 valloc(sema, struct semid_ds, seminfo.semmni); 278 valloc(sem, struct sem, seminfo.semmns); 279 /* This is pretty disgusting! */ 280 valloc(semu, int, (seminfo.semmnu * seminfo.semusz) / sizeof(int)); 281#endif 282#ifdef SYSVMSG 283 valloc(msgpool, char, msginfo.msgmax); 284 valloc(msgmaps, struct msgmap, msginfo.msgseg); 285 valloc(msghdrs, struct msg, msginfo.msgtql); 286 valloc(msqids, struct msqid_ds, msginfo.msgmni); 287#endif 288 289 if (nbuf == 0) { 290 nbuf = 30; 291 if( physmem > 1024) 292 nbuf += min((physmem - 1024) / 8, 2048); 293 } 294 nswbuf = max(min(nbuf/4, 128), 16); 295 296 valloc(swbuf, struct buf, nswbuf); 297 valloc(buf, struct buf, nbuf); 298 299#ifdef BOUNCE_BUFFERS 300 /* 301 * If there is more than 16MB of memory, allocate some bounce buffers 302 */ 303 if (Maxmem > 4096) { 304 if (bouncepages == 0) { 305 bouncepages = 64; 306 bouncepages += ((Maxmem - 4096) / 2048) * 32; 307 if (bouncepages > 128) 308 bouncepages = 128; 309 } 310 v = (caddr_t)((vm_offset_t)round_page(v)); 311 valloc(bouncememory, char, bouncepages * PAGE_SIZE); 312 } 313#endif 314 315 /* 316 * End of first pass, size has been calculated so allocate memory 317 */ 318 if (firstaddr == 0) { 319 size = (vm_size_t)(v - firstaddr); 320 firstaddr = (int)kmem_alloc(kernel_map, round_page(size)); 321 if (firstaddr == 0) 322 panic("startup: no room for tables"); 323 goto again; 324 } 325 326 /* 327 * End of second pass, addresses have been assigned 328 */ 329 if ((vm_size_t)(v - firstaddr) != size) 330 panic("startup: table size inconsistency"); 331 332#ifdef BOUNCE_BUFFERS 333 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 334 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + 335 maxbkva + pager_map_size, TRUE); 336 io_map = kmem_suballoc(clean_map, &minaddr, &maxaddr, maxbkva, FALSE); 337#else 338 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 339 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size, TRUE); 340#endif 341 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva, 342 (nbuf*BKVASIZE), TRUE); 343 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva, 344 (nswbuf*MAXPHYS) + pager_map_size, TRUE); 345 pager_map->system_map = 1; 346 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 347 (16*ARG_MAX), TRUE); 348 u_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 349 (maxproc*UPAGES*PAGE_SIZE), FALSE); 350 351 /* 352 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size 353 * we use the more space efficient malloc in place of kmem_alloc. 354 */ 355 { 356 vm_offset_t mb_map_size; 357 358 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES; 359 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE)); 360 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT); 361 bzero(mclrefcnt, mb_map_size / MCLBYTES); 362 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr, 363 mb_map_size, FALSE); 364 mb_map->system_map = 1; 365 } 366 367 /* 368 * Initialize callouts 369 */ 370 callfree = callout; 371 for (i = 1; i < ncallout; i++) 372 callout[i-1].c_next = &callout[i]; 373 374#if defined(USERCONFIG) 375#if defined(USERCONFIG_BOOT) 376 if (1) { 377#else 378 if (boothowto & RB_CONFIG) { 379#endif 380 userconfig(); 381 cninit(); /* the preferred console may have changed */ 382 } 383#endif 384 385#ifdef BOUNCE_BUFFERS 386 /* 387 * init bounce buffers 388 */ 389 vm_bounce_init(); 390#endif 391 392 printf("avail memory = %d (%dK bytes)\n", ptoa(cnt.v_free_count), 393 ptoa(cnt.v_free_count) / 1024); 394 395 /* 396 * Set up buffers, so they can be used to read disk labels. 397 */ 398 bufinit(); 399 vm_pager_bufferinit(); 400 401#ifdef SMP 402 /* 403 * OK, enough kmem_alloc/malloc state should be up, lets get on with it! 404 */ 405 mp_start(); /* fire up the APs and APICs */ 406 mp_announce(); 407#endif /* SMP */ 408} 409 410int 411register_netisr(num, handler) 412 int num; 413 netisr_t *handler; 414{ 415 416 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) { 417 printf("register_netisr: bad isr number: %d\n", num); 418 return (EINVAL); 419 } 420 netisrs[num] = handler; 421 return (0); 422} 423 424static void 425setup_netisrs(ls) 426 struct linker_set *ls; 427{ 428 int i; 429 const struct netisrtab *nit; 430 431 for(i = 0; ls->ls_items[i]; i++) { 432 nit = (const struct netisrtab *)ls->ls_items[i]; 433 register_netisr(nit->nit_num, nit->nit_isr); 434 } 435} 436 437/* 438 * Send an interrupt to process. 439 * 440 * Stack is set up to allow sigcode stored 441 * at top to call routine, followed by kcall 442 * to sigreturn routine below. After sigreturn 443 * resets the signal mask, the stack, and the 444 * frame pointer, it returns to the user 445 * specified pc, psl. 446 */ 447void 448sendsig(catcher, sig, mask, code) 449 sig_t catcher; 450 int sig, mask; 451 u_long code; 452{ 453 register struct proc *p = curproc; 454 register struct trapframe *regs; 455 register struct sigframe *fp; 456 struct sigframe sf; 457 struct sigacts *psp = p->p_sigacts; 458 int oonstack; 459 460 regs = p->p_md.md_regs; 461 oonstack = psp->ps_sigstk.ss_flags & SS_ONSTACK; 462 /* 463 * Allocate and validate space for the signal handler context. 464 */ 465 if ((psp->ps_flags & SAS_ALTSTACK) && !oonstack && 466 (psp->ps_sigonstack & sigmask(sig))) { 467 fp = (struct sigframe *)(psp->ps_sigstk.ss_sp + 468 psp->ps_sigstk.ss_size - sizeof(struct sigframe)); 469 psp->ps_sigstk.ss_flags |= SS_ONSTACK; 470 } else { 471 fp = (struct sigframe *)regs->tf_esp - 1; 472 } 473 474 /* 475 * grow() will return FALSE if the fp will not fit inside the stack 476 * and the stack can not be grown. useracc will return FALSE 477 * if access is denied. 478 */ 479 if ((grow(p, (int)fp) == FALSE) || 480 (useracc((caddr_t)fp, sizeof(struct sigframe), B_WRITE) == FALSE)) { 481 /* 482 * Process has trashed its stack; give it an illegal 483 * instruction to halt it in its tracks. 484 */ 485 SIGACTION(p, SIGILL) = SIG_DFL; 486 sig = sigmask(SIGILL); 487 p->p_sigignore &= ~sig; 488 p->p_sigcatch &= ~sig; 489 p->p_sigmask &= ~sig; 490 psignal(p, SIGILL); 491 return; 492 } 493 494 /* 495 * Build the argument list for the signal handler. 496 */ 497 if (p->p_sysent->sv_sigtbl) { 498 if (sig < p->p_sysent->sv_sigsize) 499 sig = p->p_sysent->sv_sigtbl[sig]; 500 else 501 sig = p->p_sysent->sv_sigsize + 1; 502 } 503 sf.sf_signum = sig; 504 sf.sf_code = code; 505 sf.sf_scp = &fp->sf_sc; 506 sf.sf_addr = (char *) regs->tf_err; 507 sf.sf_handler = catcher; 508 509 /* save scratch registers */ 510 sf.sf_sc.sc_eax = regs->tf_eax; 511 sf.sf_sc.sc_ebx = regs->tf_ebx; 512 sf.sf_sc.sc_ecx = regs->tf_ecx; 513 sf.sf_sc.sc_edx = regs->tf_edx; 514 sf.sf_sc.sc_esi = regs->tf_esi; 515 sf.sf_sc.sc_edi = regs->tf_edi; 516 sf.sf_sc.sc_cs = regs->tf_cs; 517 sf.sf_sc.sc_ds = regs->tf_ds; 518 sf.sf_sc.sc_ss = regs->tf_ss; 519 sf.sf_sc.sc_es = regs->tf_es; 520 sf.sf_sc.sc_isp = regs->tf_isp; 521 522 /* 523 * Build the signal context to be used by sigreturn. 524 */ 525 sf.sf_sc.sc_onstack = oonstack; 526 sf.sf_sc.sc_mask = mask; 527 sf.sf_sc.sc_sp = regs->tf_esp; 528 sf.sf_sc.sc_fp = regs->tf_ebp; 529 sf.sf_sc.sc_pc = regs->tf_eip; 530 sf.sf_sc.sc_ps = regs->tf_eflags; 531 sf.sf_sc.sc_trapno = regs->tf_trapno; 532 sf.sf_sc.sc_err = regs->tf_err; 533 534 /* 535 * If we're a vm86 process, we want to save the segment registers. 536 * We also change eflags to be our emulated eflags, not the actual 537 * eflags. 538 */ 539 if (regs->tf_eflags & PSL_VM) { 540 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 541 struct vm86_kernel *vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 542 543 sf.sf_sc.sc_gs = tf->tf_vm86_gs; 544 sf.sf_sc.sc_fs = tf->tf_vm86_fs; 545 sf.sf_sc.sc_es = tf->tf_vm86_es; 546 sf.sf_sc.sc_ds = tf->tf_vm86_ds; 547 548 if (vm86->vm86_has_vme == 0) 549 sf.sf_sc.sc_ps = (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) 550 | (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 551 552 /* 553 * We should never have PSL_T set when returning from vm86 554 * mode. It may be set here if we deliver a signal before 555 * getting to vm86 mode, so turn it off. 556 */ 557 tf->tf_eflags &= ~(PSL_VM | PSL_T | PSL_VIF | PSL_VIP); 558 } 559 560 /* 561 * Copy the sigframe out to the user's stack. 562 */ 563 if (copyout(&sf, fp, sizeof(struct sigframe)) != 0) { 564 /* 565 * Something is wrong with the stack pointer. 566 * ...Kill the process. 567 */ 568 sigexit(p, SIGILL); 569 } 570 571 regs->tf_esp = (int)fp; 572 regs->tf_eip = (int)(((char *)PS_STRINGS) - *(p->p_sysent->sv_szsigcode)); 573 regs->tf_cs = _ucodesel; 574 regs->tf_ds = _udatasel; 575 regs->tf_es = _udatasel; 576 regs->tf_ss = _udatasel; 577} 578 579/* 580 * System call to cleanup state after a signal 581 * has been taken. Reset signal mask and 582 * stack state from context left by sendsig (above). 583 * Return to previous pc and psl as specified by 584 * context left by sendsig. Check carefully to 585 * make sure that the user has not modified the 586 * state to gain improper privileges. 587 */ 588int 589sigreturn(p, uap, retval) 590 struct proc *p; 591 struct sigreturn_args /* { 592 struct sigcontext *sigcntxp; 593 } */ *uap; 594 int *retval; 595{ 596 register struct sigcontext *scp; 597 register struct sigframe *fp; 598 register struct trapframe *regs = p->p_md.md_regs; 599 int eflags; 600 601 /* 602 * (XXX old comment) regs->tf_esp points to the return address. 603 * The user scp pointer is above that. 604 * The return address is faked in the signal trampoline code 605 * for consistency. 606 */ 607 scp = uap->sigcntxp; 608 fp = (struct sigframe *) 609 ((caddr_t)scp - offsetof(struct sigframe, sf_sc)); 610 611 if (useracc((caddr_t)fp, sizeof (*fp), B_WRITE) == 0) 612 return(EFAULT); 613 614 eflags = scp->sc_ps; 615 if (eflags & PSL_VM) { 616 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 617 struct vm86_kernel *vm86; 618 619 /* 620 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 621 * set up the vm86 area, and we can't enter vm86 mode. 622 */ 623 if (p->p_addr->u_pcb.pcb_ext == 0) 624 return (EINVAL); 625 vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 626 if (vm86->vm86_inited == 0) 627 return (EINVAL); 628 629 /* go back to user mode if both flags are set */ 630 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 631 trapsignal(p, SIGBUS, 0); 632 633#define VM_USERCHANGE (PSL_USERCHANGE | PSL_RF) 634#define VME_USERCHANGE (VM_USERCHANGE | PSL_VIP | PSL_VIF) 635 if (vm86->vm86_has_vme) { 636 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 637 (eflags & VME_USERCHANGE) | PSL_VM; 638 } else { 639 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 640 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM; 641 } 642 tf->tf_vm86_ds = scp->sc_ds; 643 tf->tf_vm86_es = scp->sc_es; 644 tf->tf_vm86_fs = scp->sc_fs; 645 tf->tf_vm86_gs = scp->sc_gs; 646 tf->tf_ds = _udatasel; 647 tf->tf_es = _udatasel; 648 } else { 649 /* 650 * Don't allow users to change privileged or reserved flags. 651 */ 652#define EFLAGS_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 653 /* 654 * XXX do allow users to change the privileged flag PSL_RF. 655 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 656 * should sometimes set it there too. tf_eflags is kept in 657 * the signal context during signal handling and there is no 658 * other place to remember it, so the PSL_RF bit may be 659 * corrupted by the signal handler without us knowing. 660 * Corruption of the PSL_RF bit at worst causes one more or 661 * one less debugger trap, so allowing it is fairly harmless. 662 */ 663 if (!EFLAGS_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 664#ifdef DEBUG 665 printf("sigreturn: eflags = 0x%x\n", eflags); 666#endif 667 return(EINVAL); 668 } 669 670 /* 671 * Don't allow users to load a valid privileged %cs. Let the 672 * hardware check for invalid selectors, excess privilege in 673 * other selectors, invalid %eip's and invalid %esp's. 674 */ 675#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 676 if (!CS_SECURE(scp->sc_cs)) { 677#ifdef DEBUG 678 printf("sigreturn: cs = 0x%x\n", scp->sc_cs); 679#endif 680 trapsignal(p, SIGBUS, T_PROTFLT); 681 return(EINVAL); 682 } 683 regs->tf_ds = scp->sc_ds; 684 regs->tf_es = scp->sc_es; 685 } 686 /* restore scratch registers */ 687 regs->tf_eax = scp->sc_eax; 688 regs->tf_ebx = scp->sc_ebx; 689 regs->tf_ecx = scp->sc_ecx; 690 regs->tf_edx = scp->sc_edx; 691 regs->tf_esi = scp->sc_esi; 692 regs->tf_edi = scp->sc_edi; 693 regs->tf_cs = scp->sc_cs; 694 regs->tf_ss = scp->sc_ss; 695 regs->tf_isp = scp->sc_isp; 696 697 if (useracc((caddr_t)scp, sizeof (*scp), B_WRITE) == 0) 698 return(EINVAL); 699 700 if (scp->sc_onstack & 01) 701 p->p_sigacts->ps_sigstk.ss_flags |= SS_ONSTACK; 702 else 703 p->p_sigacts->ps_sigstk.ss_flags &= ~SS_ONSTACK; 704 p->p_sigmask = scp->sc_mask & ~sigcantmask; 705 regs->tf_ebp = scp->sc_fp; 706 regs->tf_esp = scp->sc_sp; 707 regs->tf_eip = scp->sc_pc; 708 regs->tf_eflags = eflags; 709 return(EJUSTRETURN); 710} 711 712/* 713 * Machine dependent boot() routine 714 * 715 * I haven't seen anything to put here yet 716 * Possibly some stuff might be grafted back here from boot() 717 */ 718void 719cpu_boot(int howto) 720{ 721} 722 723/* 724 * Shutdown the CPU as much as possible 725 */ 726void 727cpu_halt(void) 728{ 729 for (;;) 730 __asm__ ("hlt"); 731} 732 733/* 734 * Turn the power off. 735 */ 736void 737cpu_power_down(void) 738{ 739#if NAPM > 0 740 apm_power_off(); 741#endif 742} 743 744/* 745 * Clear registers on exec 746 */ 747void 748setregs(p, entry, stack) 749 struct proc *p; 750 u_long entry; 751 u_long stack; 752{ 753 struct trapframe *regs = p->p_md.md_regs; 754 755#ifdef USER_LDT 756 struct pcb *pcb = &p->p_addr->u_pcb; 757 758 /* was i386_user_cleanup() in NetBSD */ 759 if (pcb->pcb_ldt) { 760 if (pcb == curpcb) 761 lldt(GSEL(GUSERLDT_SEL, SEL_KPL)); 762 kmem_free(kernel_map, (vm_offset_t)pcb->pcb_ldt, 763 pcb->pcb_ldt_len * sizeof(union descriptor)); 764 pcb->pcb_ldt_len = (int)pcb->pcb_ldt = 0; 765 } 766#endif 767 768 bzero((char *)regs, sizeof(struct trapframe)); 769 regs->tf_eip = entry; 770 regs->tf_esp = stack; 771 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 772 regs->tf_ss = _udatasel; 773 regs->tf_ds = _udatasel; 774 regs->tf_es = _udatasel; 775 regs->tf_cs = _ucodesel; 776 777 /* 778 * Initialize the math emulator (if any) for the current process. 779 * Actually, just clear the bit that says that the emulator has 780 * been initialized. Initialization is delayed until the process 781 * traps to the emulator (if it is done at all) mainly because 782 * emulators don't provide an entry point for initialization. 783 */ 784 p->p_addr->u_pcb.pcb_flags &= ~FP_SOFTFP; 785 786 /* 787 * Arrange to trap the next npx or `fwait' instruction (see npx.c 788 * for why fwait must be trapped at least if there is an npx or an 789 * emulator). This is mainly to handle the case where npx0 is not 790 * configured, since the npx routines normally set up the trap 791 * otherwise. It should be done only at boot time, but doing it 792 * here allows modifying `npx_exists' for testing the emulator on 793 * systems with an npx. 794 */ 795 load_cr0(rcr0() | CR0_MP | CR0_TS); 796 797#if NNPX > 0 798 /* Initialize the npx (if any) for the current process. */ 799 npxinit(__INITIAL_NPXCW__); 800#endif 801} 802 803static int 804sysctl_machdep_adjkerntz SYSCTL_HANDLER_ARGS 805{ 806 int error; 807 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 808 req); 809 if (!error && req->newptr) 810 resettodr(); 811 return (error); 812} 813 814SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 815 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 816 817SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 818 CTLFLAG_RW, &disable_rtc_set, 0, ""); 819 820SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 821 CTLFLAG_RD, &bootinfo, bootinfo, ""); 822 823SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 824 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 825 826/* 827 * Initialize 386 and configure to run kernel 828 */ 829 830/* 831 * Initialize segments & interrupt table 832 */ 833 834int currentldt; 835int _default_ldt; 836#ifdef SMP 837union descriptor gdt[NGDT + NCPU]; /* global descriptor table */ 838#else 839union descriptor gdt[NGDT]; /* global descriptor table */ 840#endif 841struct gate_descriptor idt[NIDT]; /* interrupt descriptor table */ 842union descriptor ldt[NLDT]; /* local descriptor table */ 843#ifdef SMP 844/* table descriptors - used to load tables by microp */ 845struct region_descriptor r_gdt, r_idt; 846#endif 847 848#ifdef SMP 849extern struct i386tss common_tss; /* One tss per cpu */ 850#else 851struct i386tss common_tss; 852#ifdef VM86 853struct segment_descriptor common_tssd; 854u_int private_tss = 0; /* flag indicating private tss */ 855#endif /* VM86 */ 856#endif 857 858static struct i386tss dblfault_tss; 859static char dblfault_stack[PAGE_SIZE]; 860 861extern struct user *proc0paddr; 862 863 864/* software prototypes -- in more palatable form */ 865struct soft_segment_descriptor gdt_segs[ 866#ifdef SMP 867 NGDT + NCPU 868#endif 869 ] = { 870/* GNULL_SEL 0 Null Descriptor */ 871{ 0x0, /* segment base address */ 872 0x0, /* length */ 873 0, /* segment type */ 874 0, /* segment descriptor priority level */ 875 0, /* segment descriptor present */ 876 0, 0, 877 0, /* default 32 vs 16 bit size */ 878 0 /* limit granularity (byte/page units)*/ }, 879/* GCODE_SEL 1 Code Descriptor for kernel */ 880{ 0x0, /* segment base address */ 881 0xfffff, /* length - all address space */ 882 SDT_MEMERA, /* segment type */ 883 0, /* segment descriptor priority level */ 884 1, /* segment descriptor present */ 885 0, 0, 886 1, /* default 32 vs 16 bit size */ 887 1 /* limit granularity (byte/page units)*/ }, 888/* GDATA_SEL 2 Data Descriptor for kernel */ 889{ 0x0, /* segment base address */ 890 0xfffff, /* length - all address space */ 891 SDT_MEMRWA, /* segment type */ 892 0, /* segment descriptor priority level */ 893 1, /* segment descriptor present */ 894 0, 0, 895 1, /* default 32 vs 16 bit size */ 896 1 /* limit granularity (byte/page units)*/ }, 897/* GLDT_SEL 3 LDT Descriptor */ 898{ (int) ldt, /* segment base address */ 899 sizeof(ldt)-1, /* length - all address space */ 900 SDT_SYSLDT, /* segment type */ 901 SEL_UPL, /* segment descriptor priority level */ 902 1, /* segment descriptor present */ 903 0, 0, 904 0, /* unused - default 32 vs 16 bit size */ 905 0 /* limit granularity (byte/page units)*/ }, 906/* GTGATE_SEL 4 Null Descriptor - Placeholder */ 907{ 0x0, /* segment base address */ 908 0x0, /* length - all address space */ 909 0, /* segment type */ 910 0, /* segment descriptor priority level */ 911 0, /* segment descriptor present */ 912 0, 0, 913 0, /* default 32 vs 16 bit size */ 914 0 /* limit granularity (byte/page units)*/ }, 915/* GPANIC_SEL 5 Panic Tss Descriptor */ 916{ (int) &dblfault_tss, /* segment base address */ 917 sizeof(struct i386tss)-1,/* length - all address space */ 918 SDT_SYS386TSS, /* segment type */ 919 0, /* segment descriptor priority level */ 920 1, /* segment descriptor present */ 921 0, 0, 922 0, /* unused - default 32 vs 16 bit size */ 923 0 /* limit granularity (byte/page units)*/ }, 924/* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 925{ 926 (int) &common_tss, /* segment base address */ 927 sizeof(struct i386tss)-1,/* length - all address space */ 928 SDT_SYS386TSS, /* segment type */ 929 0, /* segment descriptor priority level */ 930 1, /* segment descriptor present */ 931 0, 0, 932 0, /* unused - default 32 vs 16 bit size */ 933 0 /* limit granularity (byte/page units)*/ }, 934/* GUSERLDT_SEL 7 User LDT Descriptor per process */ 935{ (int) ldt, /* segment base address */ 936 (512 * sizeof(union descriptor)-1), /* length */ 937 SDT_SYSLDT, /* segment type */ 938 0, /* segment descriptor priority level */ 939 1, /* segment descriptor present */ 940 0, 0, 941 0, /* unused - default 32 vs 16 bit size */ 942 0 /* limit granularity (byte/page units)*/ }, 943/* GAPMCODE32_SEL 8 APM BIOS 32-bit interface (32bit Code) */ 944{ 0, /* segment base address (overwritten by APM) */ 945 0xfffff, /* length */ 946 SDT_MEMERA, /* segment type */ 947 0, /* segment descriptor priority level */ 948 1, /* segment descriptor present */ 949 0, 0, 950 1, /* default 32 vs 16 bit size */ 951 1 /* limit granularity (byte/page units)*/ }, 952/* GAPMCODE16_SEL 9 APM BIOS 32-bit interface (16bit Code) */ 953{ 0, /* segment base address (overwritten by APM) */ 954 0xfffff, /* length */ 955 SDT_MEMERA, /* segment type */ 956 0, /* segment descriptor priority level */ 957 1, /* segment descriptor present */ 958 0, 0, 959 0, /* default 32 vs 16 bit size */ 960 1 /* limit granularity (byte/page units)*/ }, 961/* GAPMDATA_SEL 10 APM BIOS 32-bit interface (Data) */ 962{ 0, /* segment base address (overwritten by APM) */ 963 0xfffff, /* length */ 964 SDT_MEMRWA, /* segment type */ 965 0, /* segment descriptor priority level */ 966 1, /* segment descriptor present */ 967 0, 0, 968 1, /* default 32 vs 16 bit size */ 969 1 /* limit granularity (byte/page units)*/ }, 970}; 971 972static struct soft_segment_descriptor ldt_segs[] = { 973 /* Null Descriptor - overwritten by call gate */ 974{ 0x0, /* segment base address */ 975 0x0, /* length - all address space */ 976 0, /* segment type */ 977 0, /* segment descriptor priority level */ 978 0, /* segment descriptor present */ 979 0, 0, 980 0, /* default 32 vs 16 bit size */ 981 0 /* limit granularity (byte/page units)*/ }, 982 /* Null Descriptor - overwritten by call gate */ 983{ 0x0, /* segment base address */ 984 0x0, /* length - all address space */ 985 0, /* segment type */ 986 0, /* segment descriptor priority level */ 987 0, /* segment descriptor present */ 988 0, 0, 989 0, /* default 32 vs 16 bit size */ 990 0 /* limit granularity (byte/page units)*/ }, 991 /* Null Descriptor - overwritten by call gate */ 992{ 0x0, /* segment base address */ 993 0x0, /* length - all address space */ 994 0, /* segment type */ 995 0, /* segment descriptor priority level */ 996 0, /* segment descriptor present */ 997 0, 0, 998 0, /* default 32 vs 16 bit size */ 999 0 /* limit granularity (byte/page units)*/ }, 1000 /* Code Descriptor for user */ 1001{ 0x0, /* segment base address */ 1002 0xfffff, /* length - all address space */ 1003 SDT_MEMERA, /* segment type */ 1004 SEL_UPL, /* segment descriptor priority level */ 1005 1, /* segment descriptor present */ 1006 0, 0, 1007 1, /* default 32 vs 16 bit size */ 1008 1 /* limit granularity (byte/page units)*/ }, 1009 /* Data Descriptor for user */ 1010{ 0x0, /* segment base address */ 1011 0xfffff, /* length - all address space */ 1012 SDT_MEMRWA, /* segment type */ 1013 SEL_UPL, /* segment descriptor priority level */ 1014 1, /* segment descriptor present */ 1015 0, 0, 1016 1, /* default 32 vs 16 bit size */ 1017 1 /* limit granularity (byte/page units)*/ }, 1018}; 1019 1020void 1021setidt(idx, func, typ, dpl, selec) 1022 int idx; 1023 inthand_t *func; 1024 int typ; 1025 int dpl; 1026 int selec; 1027{ 1028 struct gate_descriptor *ip = idt + idx; 1029 1030 ip->gd_looffset = (int)func; 1031 ip->gd_selector = selec; 1032 ip->gd_stkcpy = 0; 1033 ip->gd_xx = 0; 1034 ip->gd_type = typ; 1035 ip->gd_dpl = dpl; 1036 ip->gd_p = 1; 1037 ip->gd_hioffset = ((int)func)>>16 ; 1038} 1039 1040#define IDTVEC(name) __CONCAT(X,name) 1041 1042extern inthand_t 1043 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1044 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1045 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1046 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1047 IDTVEC(syscall), IDTVEC(int0x80_syscall); 1048 1049void 1050sdtossd(sd, ssd) 1051 struct segment_descriptor *sd; 1052 struct soft_segment_descriptor *ssd; 1053{ 1054 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1055 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1056 ssd->ssd_type = sd->sd_type; 1057 ssd->ssd_dpl = sd->sd_dpl; 1058 ssd->ssd_p = sd->sd_p; 1059 ssd->ssd_def32 = sd->sd_def32; 1060 ssd->ssd_gran = sd->sd_gran; 1061} 1062 1063void 1064init386(first) 1065 int first; 1066{ 1067 int x; 1068 unsigned biosbasemem, biosextmem; 1069 struct gate_descriptor *gdp; 1070 int gsel_tss; 1071 1072 struct isa_device *idp; 1073#ifndef SMP 1074 /* table descriptors - used to load tables by microp */ 1075 struct region_descriptor r_gdt, r_idt; 1076#endif 1077 int pagesinbase, pagesinext; 1078 int target_page, pa_indx; 1079 int off; 1080 1081 proc0.p_addr = proc0paddr; 1082 1083 atdevbase = ISA_HOLE_START + KERNBASE; 1084 1085 /* 1086 * Initialize the console before we print anything out. 1087 */ 1088 cninit(); 1089 1090 /* 1091 * make gdt memory segments, the code segment goes up to end of the 1092 * page with etext in it, the data segment goes to the end of 1093 * the address space 1094 */ 1095 /* 1096 * XXX text protection is temporarily (?) disabled. The limit was 1097 * i386_btop(round_page(etext)) - 1. 1098 */ 1099 gdt_segs[GCODE_SEL].ssd_limit = i386_btop(0) - 1; 1100 gdt_segs[GDATA_SEL].ssd_limit = i386_btop(0) - 1; 1101#ifdef BDE_DEBUGGER 1102#define NGDT1 8 /* avoid overwriting db entries with APM ones */ 1103#else 1104#define NGDT1 (sizeof gdt_segs / sizeof gdt_segs[0]) 1105#endif 1106 for (x = 0; x < NGDT1; x++) 1107 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1108#ifdef VM86 1109 common_tssd = gdt[GPROC0_SEL].sd; 1110#endif /* VM86 */ 1111 1112#ifdef SMP 1113 /* 1114 * Spin these up now. init_secondary() grabs them. We could use 1115 * #for(x,y,z) / #endfor cpp directives if they existed. 1116 */ 1117 for (x = 0; x < NCPU; x++) { 1118 gdt_segs[NGDT + x] = gdt_segs[GPROC0_SEL]; 1119 ssdtosd(&gdt_segs[NGDT + x], &gdt[NGDT + x].sd); 1120 } 1121#endif 1122 1123 /* make ldt memory segments */ 1124 /* 1125 * The data segment limit must not cover the user area because we 1126 * don't want the user area to be writable in copyout() etc. (page 1127 * level protection is lost in kernel mode on 386's). Also, we 1128 * don't want the user area to be writable directly (page level 1129 * protection of the user area is not available on 486's with 1130 * CR0_WP set, because there is no user-read/kernel-write mode). 1131 * 1132 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it 1133 * should be spelled ...MAX_USER... 1134 */ 1135#define VM_END_USER_RW_ADDRESS VM_MAXUSER_ADDRESS 1136 /* 1137 * The code segment limit has to cover the user area until we move 1138 * the signal trampoline out of the user area. This is safe because 1139 * the code segment cannot be written to directly. 1140 */ 1141#define VM_END_USER_R_ADDRESS (VM_END_USER_RW_ADDRESS + UPAGES * PAGE_SIZE) 1142 ldt_segs[LUCODE_SEL].ssd_limit = i386_btop(VM_END_USER_R_ADDRESS) - 1; 1143 ldt_segs[LUDATA_SEL].ssd_limit = i386_btop(VM_END_USER_RW_ADDRESS) - 1; 1144 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 1145 ssdtosd(&ldt_segs[x], &ldt[x].sd); 1146 1147 /* exceptions */ 1148 for (x = 0; x < NIDT; x++) 1149 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1150 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1151 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1152 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1153 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1154 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1155 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1156 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1157 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1158 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 1159 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1160 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1161 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1162 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1163 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1164 setidt(14, &IDTVEC(page), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1165 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1166 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1167 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1168 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1169 setidt(0x80, &IDTVEC(int0x80_syscall), 1170 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1171 1172#include "isa.h" 1173#if NISA >0 1174 isa_defaultirq(); 1175#endif 1176 rand_initialize(); 1177 1178 r_gdt.rd_limit = sizeof(gdt) - 1; 1179 r_gdt.rd_base = (int) gdt; 1180 lgdt(&r_gdt); 1181 1182 r_idt.rd_limit = sizeof(idt) - 1; 1183 r_idt.rd_base = (int) idt; 1184 lidt(&r_idt); 1185 1186 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1187 lldt(_default_ldt); 1188 currentldt = _default_ldt; 1189 1190#ifdef DDB 1191 kdb_init(); 1192 if (boothowto & RB_KDB) 1193 Debugger("Boot flags requested debugger"); 1194#endif 1195 1196 finishidentcpu(); /* Final stage of CPU initialization */ 1197 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1198 initializecpu(); /* Initialize CPU registers */ 1199 1200 /* Use BIOS values stored in RTC CMOS RAM, since probing 1201 * breaks certain 386 AT relics. 1202 */ 1203 biosbasemem = rtcin(RTC_BASELO)+ (rtcin(RTC_BASEHI)<<8); 1204 biosextmem = rtcin(RTC_EXTLO)+ (rtcin(RTC_EXTHI)<<8); 1205 1206 /* 1207 * If BIOS tells us that it has more than 640k in the basemem, 1208 * don't believe it - set it to 640k. 1209 */ 1210 if (biosbasemem > 640) { 1211 printf("Preposterous RTC basemem of %dK, truncating to 640K\n", 1212 biosbasemem); 1213 biosbasemem = 640; 1214 } 1215 if (bootinfo.bi_memsizes_valid && bootinfo.bi_basemem > 640) { 1216 printf("Preposterous BIOS basemem of %dK, truncating to 640K\n", 1217 bootinfo.bi_basemem); 1218 bootinfo.bi_basemem = 640; 1219 } 1220 1221 /* 1222 * Warn if the official BIOS interface disagrees with the RTC 1223 * interface used above about the amount of base memory or the 1224 * amount of extended memory. Prefer the BIOS value for the base 1225 * memory. This is necessary for machines that `steal' base 1226 * memory for use as BIOS memory, at least if we are going to use 1227 * the BIOS for apm. Prefer the RTC value for extended memory. 1228 * Eventually the hackish interface shouldn't even be looked at. 1229 */ 1230 if (bootinfo.bi_memsizes_valid) { 1231 if (bootinfo.bi_basemem != biosbasemem) { 1232 vm_offset_t pa; 1233 1234 printf( 1235 "BIOS basemem (%ldK) != RTC basemem (%dK), setting to BIOS value\n", 1236 bootinfo.bi_basemem, biosbasemem); 1237 biosbasemem = bootinfo.bi_basemem; 1238 1239 /* 1240 * XXX if biosbasemem is now < 640, there is `hole' 1241 * between the end of base memory and the start of 1242 * ISA memory. The hole may be empty or it may 1243 * contain BIOS code or data. Map it read/write so 1244 * that the BIOS can write to it. (Memory from 0 to 1245 * the physical end of the kernel is mapped read-only 1246 * to begin with and then parts of it are remapped. 1247 * The parts that aren't remapped form holes that 1248 * remain read-only and are unused by the kernel. 1249 * The base memory area is below the physical end of 1250 * the kernel and right now forms a read-only hole. 1251 * The part of it from 0 to 1252 * (trunc_page(biosbasemem * 1024) - 1) will be 1253 * remapped and used by the kernel later.) 1254 * 1255 * This code is similar to the code used in 1256 * pmap_mapdev, but since no memory needs to be 1257 * allocated we simply change the mapping. 1258 */ 1259 for (pa = trunc_page(biosbasemem * 1024); 1260 pa < ISA_HOLE_START; pa += PAGE_SIZE) { 1261 unsigned *pte; 1262 1263 pte = (unsigned *)vtopte(pa + KERNBASE); 1264 *pte = pa | PG_RW | PG_V; 1265 } 1266 } 1267 if (bootinfo.bi_extmem != biosextmem) 1268 printf("BIOS extmem (%ldK) != RTC extmem (%dK)\n", 1269 bootinfo.bi_extmem, biosextmem); 1270 } 1271 1272#ifdef SMP 1273 /* make hole for AP bootstrap code */ 1274 pagesinbase = mp_bootaddress(biosbasemem) / PAGE_SIZE; 1275#else 1276 pagesinbase = biosbasemem * 1024 / PAGE_SIZE; 1277#endif 1278 1279 pagesinext = biosextmem * 1024 / PAGE_SIZE; 1280 1281 /* 1282 * Special hack for chipsets that still remap the 384k hole when 1283 * there's 16MB of memory - this really confuses people that 1284 * are trying to use bus mastering ISA controllers with the 1285 * "16MB limit"; they only have 16MB, but the remapping puts 1286 * them beyond the limit. 1287 */ 1288 /* 1289 * If extended memory is between 15-16MB (16-17MB phys address range), 1290 * chop it to 15MB. 1291 */ 1292 if ((pagesinext > 3840) && (pagesinext < 4096)) 1293 pagesinext = 3840; 1294 1295 /* 1296 * Maxmem isn't the "maximum memory", it's one larger than the 1297 * highest page of the physical address space. It should be 1298 * called something like "Maxphyspage". 1299 */ 1300 Maxmem = pagesinext + 0x100000/PAGE_SIZE; 1301 1302#ifdef MAXMEM 1303 Maxmem = MAXMEM/4; 1304#endif 1305 1306#if NNPX > 0 1307 idp = find_isadev(isa_devtab_null, &npxdriver, 0); 1308 if (idp != NULL && idp->id_msize != 0) 1309 Maxmem = idp->id_msize / 4; 1310#endif 1311 1312#ifdef SMP 1313 /* look for the MP hardware - needed for apic addresses */ 1314 mp_probe(); 1315#endif 1316 1317 /* call pmap initialization to make new kernel address space */ 1318 pmap_bootstrap (first, 0); 1319 1320 /* 1321 * Size up each available chunk of physical memory. 1322 */ 1323 1324 /* 1325 * We currently don't bother testing base memory. 1326 * XXX ...but we probably should. 1327 */ 1328 pa_indx = 0; 1329 badpages = 0; 1330 if (pagesinbase > 1) { 1331 phys_avail[pa_indx++] = PAGE_SIZE; /* skip first page of memory */ 1332 phys_avail[pa_indx] = ptoa(pagesinbase);/* memory up to the ISA hole */ 1333 physmem = pagesinbase - 1; 1334 } else { 1335 /* point at first chunk end */ 1336 pa_indx++; 1337 } 1338 1339 for (target_page = avail_start; target_page < ptoa(Maxmem); target_page += PAGE_SIZE) { 1340 int tmp, page_bad = FALSE; 1341 1342 /* 1343 * map page into kernel: valid, read/write, non-cacheable 1344 */ 1345 *(int *)CMAP1 = PG_V | PG_RW | PG_N | target_page; 1346 invltlb(); 1347 1348 tmp = *(int *)CADDR1; 1349 /* 1350 * Test for alternating 1's and 0's 1351 */ 1352 *(volatile int *)CADDR1 = 0xaaaaaaaa; 1353 if (*(volatile int *)CADDR1 != 0xaaaaaaaa) { 1354 page_bad = TRUE; 1355 } 1356 /* 1357 * Test for alternating 0's and 1's 1358 */ 1359 *(volatile int *)CADDR1 = 0x55555555; 1360 if (*(volatile int *)CADDR1 != 0x55555555) { 1361 page_bad = TRUE; 1362 } 1363 /* 1364 * Test for all 1's 1365 */ 1366 *(volatile int *)CADDR1 = 0xffffffff; 1367 if (*(volatile int *)CADDR1 != 0xffffffff) { 1368 page_bad = TRUE; 1369 } 1370 /* 1371 * Test for all 0's 1372 */ 1373 *(volatile int *)CADDR1 = 0x0; 1374 if (*(volatile int *)CADDR1 != 0x0) { 1375 /* 1376 * test of page failed 1377 */ 1378 page_bad = TRUE; 1379 } 1380 /* 1381 * Restore original value. 1382 */ 1383 *(int *)CADDR1 = tmp; 1384 1385 /* 1386 * Adjust array of valid/good pages. 1387 */ 1388 if (page_bad == FALSE) { 1389 /* 1390 * If this good page is a continuation of the 1391 * previous set of good pages, then just increase 1392 * the end pointer. Otherwise start a new chunk. 1393 * Note that "end" points one higher than end, 1394 * making the range >= start and < end. 1395 */ 1396 if (phys_avail[pa_indx] == target_page) { 1397 phys_avail[pa_indx] += PAGE_SIZE; 1398 } else { 1399 pa_indx++; 1400 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1401 printf("Too many holes in the physical address space, giving up\n"); 1402 pa_indx--; 1403 break; 1404 } 1405 phys_avail[pa_indx++] = target_page; /* start */ 1406 phys_avail[pa_indx] = target_page + PAGE_SIZE; /* end */ 1407 } 1408 physmem++; 1409 } else { 1410 badpages++; 1411 page_bad = FALSE; 1412 } 1413 } 1414 1415 *(int *)CMAP1 = 0; 1416 invltlb(); 1417 1418 /* 1419 * XXX 1420 * The last chunk must contain at least one page plus the message 1421 * buffer to avoid complicating other code (message buffer address 1422 * calculation, etc.). 1423 */ 1424 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1425 round_page(sizeof(struct msgbuf)) >= phys_avail[pa_indx]) { 1426 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1427 phys_avail[pa_indx--] = 0; 1428 phys_avail[pa_indx--] = 0; 1429 } 1430 1431 Maxmem = atop(phys_avail[pa_indx]); 1432 1433 /* Trim off space for the message buffer. */ 1434 phys_avail[pa_indx] -= round_page(sizeof(struct msgbuf)); 1435 1436 avail_end = phys_avail[pa_indx]; 1437 1438 /* now running on new page tables, configured,and u/iom is accessible */ 1439 1440 /* Map the message buffer. */ 1441 for (off = 0; off < round_page(sizeof(struct msgbuf)); off += PAGE_SIZE) 1442 pmap_enter(kernel_pmap, (vm_offset_t)msgbufp + off, 1443 avail_end + off, VM_PROT_ALL, TRUE); 1444 msgbufmapped = 1; 1445 1446 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1447#ifdef VM86 1448 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE - 16; 1449#else 1450 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE; 1451#endif /* VM86 */ 1452 common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ; 1453 common_tss.tss_ioopt = (sizeof common_tss) << 16; 1454 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1455 ltr(gsel_tss); 1456 1457 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 1458 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)]; 1459 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 1460 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 1461 dblfault_tss.tss_cr3 = (int)IdlePTD; 1462 dblfault_tss.tss_eip = (int) dblfault_handler; 1463 dblfault_tss.tss_eflags = PSL_KERNEL; 1464 dblfault_tss.tss_ds = dblfault_tss.tss_es = dblfault_tss.tss_fs = 1465 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 1466 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 1467 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 1468 1469 /* make a call gate to reenter kernel with */ 1470 gdp = &ldt[LSYS5CALLS_SEL].gd; 1471 1472 x = (int) &IDTVEC(syscall); 1473 gdp->gd_looffset = x++; 1474 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 1475 gdp->gd_stkcpy = 1; 1476 gdp->gd_type = SDT_SYS386CGT; 1477 gdp->gd_dpl = SEL_UPL; 1478 gdp->gd_p = 1; 1479 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16; 1480 1481 /* XXX does this work? */ 1482 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1483 1484 /* transfer to user mode */ 1485 1486 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL); 1487 _udatasel = LSEL(LUDATA_SEL, SEL_UPL); 1488 1489 /* setup proc 0's pcb */ 1490 proc0.p_addr->u_pcb.pcb_flags = 0; 1491 proc0.p_addr->u_pcb.pcb_cr3 = (int)IdlePTD; 1492 proc0.p_addr->u_pcb.pcb_mpnest = 1; 1493 proc0.p_addr->u_pcb.pcb_ext = 0; 1494} 1495 1496int 1497ptrace_set_pc(p, addr) 1498 struct proc *p; 1499 unsigned int addr; 1500{ 1501 p->p_md.md_regs->tf_eip = addr; 1502 return (0); 1503} 1504 1505int 1506ptrace_single_step(p) 1507 struct proc *p; 1508{ 1509 p->p_md.md_regs->tf_eflags |= PSL_T; 1510 return (0); 1511} 1512 1513int ptrace_write_u(p, off, data) 1514 struct proc *p; 1515 vm_offset_t off; 1516 int data; 1517{ 1518 struct trapframe frame_copy; 1519 vm_offset_t min; 1520 struct trapframe *tp; 1521 1522 /* 1523 * Privileged kernel state is scattered all over the user area. 1524 * Only allow write access to parts of regs and to fpregs. 1525 */ 1526 min = (char *)p->p_md.md_regs - (char *)p->p_addr; 1527 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) { 1528 tp = p->p_md.md_regs; 1529 frame_copy = *tp; 1530 *(int *)((char *)&frame_copy + (off - min)) = data; 1531 if (!EFLAGS_SECURE(frame_copy.tf_eflags, tp->tf_eflags) || 1532 !CS_SECURE(frame_copy.tf_cs)) 1533 return (EINVAL); 1534 *(int*)((char *)p->p_addr + off) = data; 1535 return (0); 1536 } 1537 min = offsetof(struct user, u_pcb) + offsetof(struct pcb, pcb_savefpu); 1538 if (off >= min && off <= min + sizeof(struct save87) - sizeof(int)) { 1539 *(int*)((char *)p->p_addr + off) = data; 1540 return (0); 1541 } 1542 return (EFAULT); 1543} 1544 1545int 1546fill_regs(p, regs) 1547 struct proc *p; 1548 struct reg *regs; 1549{ 1550 struct pcb *pcb; 1551 struct trapframe *tp; 1552 1553 tp = p->p_md.md_regs; 1554 regs->r_es = tp->tf_es; 1555 regs->r_ds = tp->tf_ds; 1556 regs->r_edi = tp->tf_edi; 1557 regs->r_esi = tp->tf_esi; 1558 regs->r_ebp = tp->tf_ebp; 1559 regs->r_ebx = tp->tf_ebx; 1560 regs->r_edx = tp->tf_edx; 1561 regs->r_ecx = tp->tf_ecx; 1562 regs->r_eax = tp->tf_eax; 1563 regs->r_eip = tp->tf_eip; 1564 regs->r_cs = tp->tf_cs; 1565 regs->r_eflags = tp->tf_eflags; 1566 regs->r_esp = tp->tf_esp; 1567 regs->r_ss = tp->tf_ss; 1568 pcb = &p->p_addr->u_pcb; 1569 regs->r_fs = pcb->pcb_fs; 1570 regs->r_gs = pcb->pcb_gs; 1571 return (0); 1572} 1573 1574int 1575set_regs(p, regs) 1576 struct proc *p; 1577 struct reg *regs; 1578{ 1579 struct pcb *pcb; 1580 struct trapframe *tp; 1581 1582 tp = p->p_md.md_regs; 1583 if (!EFLAGS_SECURE(regs->r_eflags, tp->tf_eflags) || 1584 !CS_SECURE(regs->r_cs)) 1585 return (EINVAL); 1586 tp->tf_es = regs->r_es; 1587 tp->tf_ds = regs->r_ds; 1588 tp->tf_edi = regs->r_edi; 1589 tp->tf_esi = regs->r_esi; 1590 tp->tf_ebp = regs->r_ebp; 1591 tp->tf_ebx = regs->r_ebx; 1592 tp->tf_edx = regs->r_edx; 1593 tp->tf_ecx = regs->r_ecx; 1594 tp->tf_eax = regs->r_eax; 1595 tp->tf_eip = regs->r_eip; 1596 tp->tf_cs = regs->r_cs; 1597 tp->tf_eflags = regs->r_eflags; 1598 tp->tf_esp = regs->r_esp; 1599 tp->tf_ss = regs->r_ss; 1600 pcb = &p->p_addr->u_pcb; 1601 pcb->pcb_fs = regs->r_fs; 1602 pcb->pcb_gs = regs->r_gs; 1603 return (0); 1604} 1605 1606#ifndef DDB 1607void 1608Debugger(const char *msg) 1609{ 1610 printf("Debugger(\"%s\") called.\n", msg); 1611} 1612#endif /* no DDB */ 1613 1614#include <sys/disklabel.h> 1615 1616/* 1617 * Determine the size of the transfer, and make sure it is 1618 * within the boundaries of the partition. Adjust transfer 1619 * if needed, and signal errors or early completion. 1620 */ 1621int 1622bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel) 1623{ 1624 struct partition *p = lp->d_partitions + dkpart(bp->b_dev); 1625 int labelsect = lp->d_partitions[0].p_offset; 1626 int maxsz = p->p_size, 1627 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT; 1628 1629 /* overwriting disk label ? */ 1630 /* XXX should also protect bootstrap in first 8K */ 1631 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect && 1632#if LABELSECTOR != 0 1633 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect && 1634#endif 1635 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1636 bp->b_error = EROFS; 1637 goto bad; 1638 } 1639 1640#if defined(DOSBBSECTOR) && defined(notyet) 1641 /* overwriting master boot record? */ 1642 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR && 1643 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1644 bp->b_error = EROFS; 1645 goto bad; 1646 } 1647#endif 1648 1649 /* beyond partition? */ 1650 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) { 1651 /* if exactly at end of disk, return an EOF */ 1652 if (bp->b_blkno == maxsz) { 1653 bp->b_resid = bp->b_bcount; 1654 return(0); 1655 } 1656 /* or truncate if part of it fits */ 1657 sz = maxsz - bp->b_blkno; 1658 if (sz <= 0) { 1659 bp->b_error = EINVAL; 1660 goto bad; 1661 } 1662 bp->b_bcount = sz << DEV_BSHIFT; 1663 } 1664 1665 bp->b_pblkno = bp->b_blkno + p->p_offset; 1666 return(1); 1667 1668bad: 1669 bp->b_flags |= B_ERROR; 1670 return(-1); 1671} 1672 1673#ifdef DDB 1674 1675/* 1676 * Provide inb() and outb() as functions. They are normally only 1677 * available as macros calling inlined functions, thus cannot be 1678 * called inside DDB. 1679 * 1680 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 1681 */ 1682 1683#undef inb 1684#undef outb 1685 1686/* silence compiler warnings */ 1687u_char inb(u_int); 1688void outb(u_int, u_char); 1689 1690u_char 1691inb(u_int port) 1692{ 1693 u_char data; 1694 /* 1695 * We use %%dx and not %1 here because i/o is done at %dx and not at 1696 * %edx, while gcc generates inferior code (movw instead of movl) 1697 * if we tell it to load (u_short) port. 1698 */ 1699 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 1700 return (data); 1701} 1702 1703void 1704outb(u_int port, u_char data) 1705{ 1706 u_char al; 1707 /* 1708 * Use an unnecessary assignment to help gcc's register allocator. 1709 * This make a large difference for gcc-1.40 and a tiny difference 1710 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 1711 * best results. gcc-2.6.0 can't handle this. 1712 */ 1713 al = data; 1714 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 1715} 1716 1717#endif /* DDB */ 1718