machdep.c revision 162954
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 */ 39 40#include <sys/cdefs.h> 41__FBSDID("$FreeBSD: head/sys/i386/i386/machdep.c 162954 2006-10-02 12:59:59Z phk $"); 42 43#include "opt_apic.h" 44#include "opt_atalk.h" 45#include "opt_compat.h" 46#include "opt_cpu.h" 47#include "opt_ddb.h" 48#include "opt_inet.h" 49#include "opt_ipx.h" 50#include "opt_isa.h" 51#include "opt_kstack_pages.h" 52#include "opt_maxmem.h" 53#include "opt_msgbuf.h" 54#include "opt_npx.h" 55#include "opt_perfmon.h" 56#include "opt_xbox.h" 57 58#include <sys/param.h> 59#include <sys/proc.h> 60#include <sys/systm.h> 61#include <sys/bio.h> 62#include <sys/buf.h> 63#include <sys/bus.h> 64#include <sys/callout.h> 65#include <sys/clock.h> 66#include <sys/cons.h> 67#include <sys/cpu.h> 68#include <sys/eventhandler.h> 69#include <sys/exec.h> 70#include <sys/imgact.h> 71#include <sys/kdb.h> 72#include <sys/kernel.h> 73#include <sys/ktr.h> 74#include <sys/linker.h> 75#include <sys/lock.h> 76#include <sys/malloc.h> 77#include <sys/memrange.h> 78#include <sys/msgbuf.h> 79#include <sys/mutex.h> 80#include <sys/pcpu.h> 81#include <sys/ptrace.h> 82#include <sys/reboot.h> 83#include <sys/sched.h> 84#include <sys/signalvar.h> 85#include <sys/sysctl.h> 86#include <sys/sysent.h> 87#include <sys/sysproto.h> 88#include <sys/ucontext.h> 89#include <sys/vmmeter.h> 90 91#include <vm/vm.h> 92#include <vm/vm_extern.h> 93#include <vm/vm_kern.h> 94#include <vm/vm_page.h> 95#include <vm/vm_map.h> 96#include <vm/vm_object.h> 97#include <vm/vm_pager.h> 98#include <vm/vm_param.h> 99 100#ifdef DDB 101#ifndef KDB 102#error KDB must be enabled in order for DDB to work! 103#endif 104#include <ddb/ddb.h> 105#include <ddb/db_sym.h> 106#endif 107 108#include <isa/rtc.h> 109 110#include <net/netisr.h> 111 112#include <machine/bootinfo.h> 113#include <machine/clock.h> 114#include <machine/cpu.h> 115#include <machine/cputypes.h> 116#include <machine/intr_machdep.h> 117#include <machine/md_var.h> 118#include <machine/pc/bios.h> 119#include <machine/pcb.h> 120#include <machine/pcb_ext.h> 121#include <machine/proc.h> 122#include <machine/reg.h> 123#include <machine/sigframe.h> 124#include <machine/specialreg.h> 125#include <machine/vm86.h> 126#ifdef PERFMON 127#include <machine/perfmon.h> 128#endif 129#ifdef SMP 130#include <machine/privatespace.h> 131#include <machine/smp.h> 132#endif 133 134#ifdef DEV_ISA 135#include <i386/isa/icu.h> 136#endif 137 138#ifdef XBOX 139#include <machine/xbox.h> 140 141int arch_i386_is_xbox = 0; 142uint32_t arch_i386_xbox_memsize = 0; 143#endif 144 145/* Sanity check for __curthread() */ 146CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 147 148extern void init386(int first); 149extern void dblfault_handler(void); 150 151extern void printcpuinfo(void); /* XXX header file */ 152extern void finishidentcpu(void); 153extern void panicifcpuunsupported(void); 154extern void initializecpu(void); 155 156#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 157#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 158 159#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 160#define CPU_ENABLE_SSE 161#endif 162 163static void cpu_startup(void *); 164static void fpstate_drop(struct thread *td); 165static void get_fpcontext(struct thread *td, mcontext_t *mcp); 166static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 167#ifdef CPU_ENABLE_SSE 168static void set_fpregs_xmm(struct save87 *, struct savexmm *); 169static void fill_fpregs_xmm(struct savexmm *, struct save87 *); 170#endif /* CPU_ENABLE_SSE */ 171SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 172 173#ifdef DDB 174extern vm_offset_t ksym_start, ksym_end; 175#endif 176 177int _udatasel, _ucodesel; 178u_int basemem; 179 180int cold = 1; 181 182#ifdef COMPAT_43 183static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask); 184#endif 185#ifdef COMPAT_FREEBSD4 186static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask); 187#endif 188 189long Maxmem = 0; 190long realmem = 0; 191 192#define PHYSMAP_SIZE (2 * 16) 193 194vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 195vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 196 197/* must be 2 less so 0 0 can signal end of chunks */ 198#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 199#define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 200 201struct kva_md_info kmi; 202 203static struct trapframe proc0_tf; 204#ifndef SMP 205static struct pcpu __pcpu; 206#endif 207 208struct mtx icu_lock; 209 210struct mem_range_softc mem_range_softc; 211 212static void 213cpu_startup(dummy) 214 void *dummy; 215{ 216 /* 217 * Good {morning,afternoon,evening,night}. 218 */ 219 startrtclock(); 220 printcpuinfo(); 221 panicifcpuunsupported(); 222#ifdef PERFMON 223 perfmon_init(); 224#endif 225 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem), 226 ptoa((uintmax_t)Maxmem) / 1048576); 227 realmem = Maxmem; 228 /* 229 * Display any holes after the first chunk of extended memory. 230 */ 231 if (bootverbose) { 232 int indx; 233 234 printf("Physical memory chunk(s):\n"); 235 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 236 vm_paddr_t size; 237 238 size = phys_avail[indx + 1] - phys_avail[indx]; 239 printf( 240 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 241 (uintmax_t)phys_avail[indx], 242 (uintmax_t)phys_avail[indx + 1] - 1, 243 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 244 } 245 } 246 247 vm_ksubmap_init(&kmi); 248 249 printf("avail memory = %ju (%ju MB)\n", 250 ptoa((uintmax_t)cnt.v_free_count), 251 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 252 253 /* 254 * Set up buffers, so they can be used to read disk labels. 255 */ 256 bufinit(); 257 vm_pager_bufferinit(); 258 259 cpu_setregs(); 260} 261 262/* 263 * Send an interrupt to process. 264 * 265 * Stack is set up to allow sigcode stored 266 * at top to call routine, followed by kcall 267 * to sigreturn routine below. After sigreturn 268 * resets the signal mask, the stack, and the 269 * frame pointer, it returns to the user 270 * specified pc, psl. 271 */ 272#ifdef COMPAT_43 273static void 274osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 275{ 276 struct osigframe sf, *fp; 277 struct proc *p; 278 struct thread *td; 279 struct sigacts *psp; 280 struct trapframe *regs; 281 int sig; 282 int oonstack; 283 284 td = curthread; 285 p = td->td_proc; 286 PROC_LOCK_ASSERT(p, MA_OWNED); 287 sig = ksi->ksi_signo; 288 psp = p->p_sigacts; 289 mtx_assert(&psp->ps_mtx, MA_OWNED); 290 regs = td->td_frame; 291 oonstack = sigonstack(regs->tf_esp); 292 293 /* Allocate space for the signal handler context. */ 294 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack && 295 SIGISMEMBER(psp->ps_sigonstack, sig)) { 296 fp = (struct osigframe *)(td->td_sigstk.ss_sp + 297 td->td_sigstk.ss_size - sizeof(struct osigframe)); 298#if defined(COMPAT_43) 299 td->td_sigstk.ss_flags |= SS_ONSTACK; 300#endif 301 } else 302 fp = (struct osigframe *)regs->tf_esp - 1; 303 304 /* Translate the signal if appropriate. */ 305 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 306 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 307 308 /* Build the argument list for the signal handler. */ 309 sf.sf_signum = sig; 310 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc; 311 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 312 /* Signal handler installed with SA_SIGINFO. */ 313 sf.sf_arg2 = (register_t)&fp->sf_siginfo; 314 sf.sf_siginfo.si_signo = sig; 315 sf.sf_siginfo.si_code = ksi->ksi_code; 316 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher; 317 } else { 318 /* Old FreeBSD-style arguments. */ 319 sf.sf_arg2 = ksi->ksi_code; 320 sf.sf_addr = (register_t)ksi->ksi_addr; 321 sf.sf_ahu.sf_handler = catcher; 322 } 323 mtx_unlock(&psp->ps_mtx); 324 PROC_UNLOCK(p); 325 326 /* Save most if not all of trap frame. */ 327 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax; 328 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx; 329 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx; 330 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx; 331 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi; 332 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi; 333 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs; 334 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds; 335 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss; 336 sf.sf_siginfo.si_sc.sc_es = regs->tf_es; 337 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs; 338 sf.sf_siginfo.si_sc.sc_gs = rgs(); 339 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp; 340 341 /* Build the signal context to be used by osigreturn(). */ 342 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0; 343 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask); 344 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp; 345 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp; 346 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip; 347 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags; 348 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno; 349 sf.sf_siginfo.si_sc.sc_err = regs->tf_err; 350 351 /* 352 * If we're a vm86 process, we want to save the segment registers. 353 * We also change eflags to be our emulated eflags, not the actual 354 * eflags. 355 */ 356 if (regs->tf_eflags & PSL_VM) { 357 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */ 358 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 359 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 360 361 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs; 362 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs; 363 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es; 364 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds; 365 366 if (vm86->vm86_has_vme == 0) 367 sf.sf_siginfo.si_sc.sc_ps = 368 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 369 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 370 371 /* See sendsig() for comments. */ 372 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 373 } 374 375 /* 376 * Copy the sigframe out to the user's stack. 377 */ 378 if (copyout(&sf, fp, sizeof(*fp)) != 0) { 379#ifdef DEBUG 380 printf("process %ld has trashed its stack\n", (long)p->p_pid); 381#endif 382 PROC_LOCK(p); 383 sigexit(td, SIGILL); 384 } 385 386 regs->tf_esp = (int)fp; 387 regs->tf_eip = PS_STRINGS - szosigcode; 388 regs->tf_eflags &= ~PSL_T; 389 regs->tf_cs = _ucodesel; 390 regs->tf_ds = _udatasel; 391 regs->tf_es = _udatasel; 392 regs->tf_fs = _udatasel; 393 load_gs(_udatasel); 394 regs->tf_ss = _udatasel; 395 PROC_LOCK(p); 396 mtx_lock(&psp->ps_mtx); 397} 398#endif /* COMPAT_43 */ 399 400#ifdef COMPAT_FREEBSD4 401static void 402freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 403{ 404 struct sigframe4 sf, *sfp; 405 struct proc *p; 406 struct thread *td; 407 struct sigacts *psp; 408 struct trapframe *regs; 409 int sig; 410 int oonstack; 411 412 td = curthread; 413 p = td->td_proc; 414 PROC_LOCK_ASSERT(p, MA_OWNED); 415 sig = ksi->ksi_signo; 416 psp = p->p_sigacts; 417 mtx_assert(&psp->ps_mtx, MA_OWNED); 418 regs = td->td_frame; 419 oonstack = sigonstack(regs->tf_esp); 420 421 /* Save user context. */ 422 bzero(&sf, sizeof(sf)); 423 sf.sf_uc.uc_sigmask = *mask; 424 sf.sf_uc.uc_stack = td->td_sigstk; 425 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 426 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 427 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 428 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 429 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 430 431 /* Allocate space for the signal handler context. */ 432 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 433 SIGISMEMBER(psp->ps_sigonstack, sig)) { 434 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp + 435 td->td_sigstk.ss_size - sizeof(struct sigframe4)); 436#if defined(COMPAT_43) 437 td->td_sigstk.ss_flags |= SS_ONSTACK; 438#endif 439 } else 440 sfp = (struct sigframe4 *)regs->tf_esp - 1; 441 442 /* Translate the signal if appropriate. */ 443 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 444 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 445 446 /* Build the argument list for the signal handler. */ 447 sf.sf_signum = sig; 448 sf.sf_ucontext = (register_t)&sfp->sf_uc; 449 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 450 /* Signal handler installed with SA_SIGINFO. */ 451 sf.sf_siginfo = (register_t)&sfp->sf_si; 452 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 453 454 /* Fill in POSIX parts */ 455 sf.sf_si.si_signo = sig; 456 sf.sf_si.si_code = ksi->ksi_code; 457 sf.sf_si.si_addr = ksi->ksi_addr; 458 } else { 459 /* Old FreeBSD-style arguments. */ 460 sf.sf_siginfo = ksi->ksi_code; 461 sf.sf_addr = (register_t)ksi->ksi_addr; 462 sf.sf_ahu.sf_handler = catcher; 463 } 464 mtx_unlock(&psp->ps_mtx); 465 PROC_UNLOCK(p); 466 467 /* 468 * If we're a vm86 process, we want to save the segment registers. 469 * We also change eflags to be our emulated eflags, not the actual 470 * eflags. 471 */ 472 if (regs->tf_eflags & PSL_VM) { 473 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 474 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 475 476 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 477 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 478 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 479 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 480 481 if (vm86->vm86_has_vme == 0) 482 sf.sf_uc.uc_mcontext.mc_eflags = 483 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 484 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 485 486 /* 487 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 488 * syscalls made by the signal handler. This just avoids 489 * wasting time for our lazy fixup of such faults. PSL_NT 490 * does nothing in vm86 mode, but vm86 programs can set it 491 * almost legitimately in probes for old cpu types. 492 */ 493 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 494 } 495 496 /* 497 * Copy the sigframe out to the user's stack. 498 */ 499 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 500#ifdef DEBUG 501 printf("process %ld has trashed its stack\n", (long)p->p_pid); 502#endif 503 PROC_LOCK(p); 504 sigexit(td, SIGILL); 505 } 506 507 regs->tf_esp = (int)sfp; 508 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode; 509 regs->tf_eflags &= ~PSL_T; 510 regs->tf_cs = _ucodesel; 511 regs->tf_ds = _udatasel; 512 regs->tf_es = _udatasel; 513 regs->tf_fs = _udatasel; 514 regs->tf_ss = _udatasel; 515 PROC_LOCK(p); 516 mtx_lock(&psp->ps_mtx); 517} 518#endif /* COMPAT_FREEBSD4 */ 519 520void 521sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 522{ 523 struct sigframe sf, *sfp; 524 struct proc *p; 525 struct thread *td; 526 struct sigacts *psp; 527 char *sp; 528 struct trapframe *regs; 529 int sig; 530 int oonstack; 531 532 td = curthread; 533 p = td->td_proc; 534 PROC_LOCK_ASSERT(p, MA_OWNED); 535 sig = ksi->ksi_signo; 536 psp = p->p_sigacts; 537 mtx_assert(&psp->ps_mtx, MA_OWNED); 538#ifdef COMPAT_FREEBSD4 539 if (SIGISMEMBER(psp->ps_freebsd4, sig)) { 540 freebsd4_sendsig(catcher, ksi, mask); 541 return; 542 } 543#endif 544#ifdef COMPAT_43 545 if (SIGISMEMBER(psp->ps_osigset, sig)) { 546 osendsig(catcher, ksi, mask); 547 return; 548 } 549#endif 550 regs = td->td_frame; 551 oonstack = sigonstack(regs->tf_esp); 552 553 /* Save user context. */ 554 bzero(&sf, sizeof(sf)); 555 sf.sf_uc.uc_sigmask = *mask; 556 sf.sf_uc.uc_stack = td->td_sigstk; 557 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 558 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 559 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 560 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 561 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 562 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 563 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 564 fpstate_drop(td); 565 566 /* Allocate space for the signal handler context. */ 567 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 568 SIGISMEMBER(psp->ps_sigonstack, sig)) { 569 sp = td->td_sigstk.ss_sp + 570 td->td_sigstk.ss_size - sizeof(struct sigframe); 571#if defined(COMPAT_43) 572 td->td_sigstk.ss_flags |= SS_ONSTACK; 573#endif 574 } else 575 sp = (char *)regs->tf_esp - sizeof(struct sigframe); 576 /* Align to 16 bytes. */ 577 sfp = (struct sigframe *)((unsigned int)sp & ~0xF); 578 579 /* Translate the signal if appropriate. */ 580 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 581 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 582 583 /* Build the argument list for the signal handler. */ 584 sf.sf_signum = sig; 585 sf.sf_ucontext = (register_t)&sfp->sf_uc; 586 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 587 /* Signal handler installed with SA_SIGINFO. */ 588 sf.sf_siginfo = (register_t)&sfp->sf_si; 589 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 590 591 /* Fill in POSIX parts */ 592 sf.sf_si = ksi->ksi_info; 593 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 594 } else { 595 /* Old FreeBSD-style arguments. */ 596 sf.sf_siginfo = ksi->ksi_code; 597 sf.sf_addr = (register_t)ksi->ksi_addr; 598 sf.sf_ahu.sf_handler = catcher; 599 } 600 mtx_unlock(&psp->ps_mtx); 601 PROC_UNLOCK(p); 602 603 /* 604 * If we're a vm86 process, we want to save the segment registers. 605 * We also change eflags to be our emulated eflags, not the actual 606 * eflags. 607 */ 608 if (regs->tf_eflags & PSL_VM) { 609 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 610 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 611 612 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 613 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 614 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 615 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 616 617 if (vm86->vm86_has_vme == 0) 618 sf.sf_uc.uc_mcontext.mc_eflags = 619 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 620 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 621 622 /* 623 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 624 * syscalls made by the signal handler. This just avoids 625 * wasting time for our lazy fixup of such faults. PSL_NT 626 * does nothing in vm86 mode, but vm86 programs can set it 627 * almost legitimately in probes for old cpu types. 628 */ 629 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 630 } 631 632 /* 633 * Copy the sigframe out to the user's stack. 634 */ 635 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 636#ifdef DEBUG 637 printf("process %ld has trashed its stack\n", (long)p->p_pid); 638#endif 639 PROC_LOCK(p); 640 sigexit(td, SIGILL); 641 } 642 643 regs->tf_esp = (int)sfp; 644 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 645 regs->tf_eflags &= ~PSL_T; 646 regs->tf_cs = _ucodesel; 647 regs->tf_ds = _udatasel; 648 regs->tf_es = _udatasel; 649 regs->tf_fs = _udatasel; 650 regs->tf_ss = _udatasel; 651 PROC_LOCK(p); 652 mtx_lock(&psp->ps_mtx); 653} 654 655/* 656 * System call to cleanup state after a signal 657 * has been taken. Reset signal mask and 658 * stack state from context left by sendsig (above). 659 * Return to previous pc and psl as specified by 660 * context left by sendsig. Check carefully to 661 * make sure that the user has not modified the 662 * state to gain improper privileges. 663 * 664 * MPSAFE 665 */ 666#ifdef COMPAT_43 667int 668osigreturn(td, uap) 669 struct thread *td; 670 struct osigreturn_args /* { 671 struct osigcontext *sigcntxp; 672 } */ *uap; 673{ 674 struct osigcontext sc; 675 struct trapframe *regs; 676 struct osigcontext *scp; 677 struct proc *p = td->td_proc; 678 int eflags, error; 679 ksiginfo_t ksi; 680 681 regs = td->td_frame; 682 error = copyin(uap->sigcntxp, &sc, sizeof(sc)); 683 if (error != 0) 684 return (error); 685 scp = ≻ 686 eflags = scp->sc_ps; 687 if (eflags & PSL_VM) { 688 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 689 struct vm86_kernel *vm86; 690 691 /* 692 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 693 * set up the vm86 area, and we can't enter vm86 mode. 694 */ 695 if (td->td_pcb->pcb_ext == 0) 696 return (EINVAL); 697 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 698 if (vm86->vm86_inited == 0) 699 return (EINVAL); 700 701 /* Go back to user mode if both flags are set. */ 702 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 703 ksiginfo_init_trap(&ksi); 704 ksi.ksi_signo = SIGBUS; 705 ksi.ksi_code = BUS_OBJERR; 706 ksi.ksi_addr = (void *)regs->tf_eip; 707 trapsignal(td, &ksi); 708 } 709 710 if (vm86->vm86_has_vme) { 711 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 712 (eflags & VME_USERCHANGE) | PSL_VM; 713 } else { 714 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 715 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 716 (eflags & VM_USERCHANGE) | PSL_VM; 717 } 718 tf->tf_vm86_ds = scp->sc_ds; 719 tf->tf_vm86_es = scp->sc_es; 720 tf->tf_vm86_fs = scp->sc_fs; 721 tf->tf_vm86_gs = scp->sc_gs; 722 tf->tf_ds = _udatasel; 723 tf->tf_es = _udatasel; 724 tf->tf_fs = _udatasel; 725 } else { 726 /* 727 * Don't allow users to change privileged or reserved flags. 728 */ 729 /* 730 * XXX do allow users to change the privileged flag PSL_RF. 731 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 732 * should sometimes set it there too. tf_eflags is kept in 733 * the signal context during signal handling and there is no 734 * other place to remember it, so the PSL_RF bit may be 735 * corrupted by the signal handler without us knowing. 736 * Corruption of the PSL_RF bit at worst causes one more or 737 * one less debugger trap, so allowing it is fairly harmless. 738 */ 739 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 740 return (EINVAL); 741 } 742 743 /* 744 * Don't allow users to load a valid privileged %cs. Let the 745 * hardware check for invalid selectors, excess privilege in 746 * other selectors, invalid %eip's and invalid %esp's. 747 */ 748 if (!CS_SECURE(scp->sc_cs)) { 749 ksiginfo_init_trap(&ksi); 750 ksi.ksi_signo = SIGBUS; 751 ksi.ksi_code = BUS_OBJERR; 752 ksi.ksi_trapno = T_PROTFLT; 753 ksi.ksi_addr = (void *)regs->tf_eip; 754 trapsignal(td, &ksi); 755 return (EINVAL); 756 } 757 regs->tf_ds = scp->sc_ds; 758 regs->tf_es = scp->sc_es; 759 regs->tf_fs = scp->sc_fs; 760 } 761 762 /* Restore remaining registers. */ 763 regs->tf_eax = scp->sc_eax; 764 regs->tf_ebx = scp->sc_ebx; 765 regs->tf_ecx = scp->sc_ecx; 766 regs->tf_edx = scp->sc_edx; 767 regs->tf_esi = scp->sc_esi; 768 regs->tf_edi = scp->sc_edi; 769 regs->tf_cs = scp->sc_cs; 770 regs->tf_ss = scp->sc_ss; 771 regs->tf_isp = scp->sc_isp; 772 regs->tf_ebp = scp->sc_fp; 773 regs->tf_esp = scp->sc_sp; 774 regs->tf_eip = scp->sc_pc; 775 regs->tf_eflags = eflags; 776 777 PROC_LOCK(p); 778#if defined(COMPAT_43) 779 if (scp->sc_onstack & 1) 780 td->td_sigstk.ss_flags |= SS_ONSTACK; 781 else 782 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 783#endif 784 SIGSETOLD(td->td_sigmask, scp->sc_mask); 785 SIG_CANTMASK(td->td_sigmask); 786 signotify(td); 787 PROC_UNLOCK(p); 788 return (EJUSTRETURN); 789} 790#endif /* COMPAT_43 */ 791 792#ifdef COMPAT_FREEBSD4 793/* 794 * MPSAFE 795 */ 796int 797freebsd4_sigreturn(td, uap) 798 struct thread *td; 799 struct freebsd4_sigreturn_args /* { 800 const ucontext4 *sigcntxp; 801 } */ *uap; 802{ 803 struct ucontext4 uc; 804 struct proc *p = td->td_proc; 805 struct trapframe *regs; 806 const struct ucontext4 *ucp; 807 int cs, eflags, error; 808 ksiginfo_t ksi; 809 810 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 811 if (error != 0) 812 return (error); 813 ucp = &uc; 814 regs = td->td_frame; 815 eflags = ucp->uc_mcontext.mc_eflags; 816 if (eflags & PSL_VM) { 817 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 818 struct vm86_kernel *vm86; 819 820 /* 821 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 822 * set up the vm86 area, and we can't enter vm86 mode. 823 */ 824 if (td->td_pcb->pcb_ext == 0) 825 return (EINVAL); 826 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 827 if (vm86->vm86_inited == 0) 828 return (EINVAL); 829 830 /* Go back to user mode if both flags are set. */ 831 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 832 ksiginfo_init_trap(&ksi); 833 ksi.ksi_signo = SIGBUS; 834 ksi.ksi_code = BUS_OBJERR; 835 ksi.ksi_addr = (void *)regs->tf_eip; 836 trapsignal(td, &ksi); 837 } 838 if (vm86->vm86_has_vme) { 839 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 840 (eflags & VME_USERCHANGE) | PSL_VM; 841 } else { 842 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 843 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 844 (eflags & VM_USERCHANGE) | PSL_VM; 845 } 846 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 847 tf->tf_eflags = eflags; 848 tf->tf_vm86_ds = tf->tf_ds; 849 tf->tf_vm86_es = tf->tf_es; 850 tf->tf_vm86_fs = tf->tf_fs; 851 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 852 tf->tf_ds = _udatasel; 853 tf->tf_es = _udatasel; 854 tf->tf_fs = _udatasel; 855 } else { 856 /* 857 * Don't allow users to change privileged or reserved flags. 858 */ 859 /* 860 * XXX do allow users to change the privileged flag PSL_RF. 861 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 862 * should sometimes set it there too. tf_eflags is kept in 863 * the signal context during signal handling and there is no 864 * other place to remember it, so the PSL_RF bit may be 865 * corrupted by the signal handler without us knowing. 866 * Corruption of the PSL_RF bit at worst causes one more or 867 * one less debugger trap, so allowing it is fairly harmless. 868 */ 869 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 870 printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags); 871 return (EINVAL); 872 } 873 874 /* 875 * Don't allow users to load a valid privileged %cs. Let the 876 * hardware check for invalid selectors, excess privilege in 877 * other selectors, invalid %eip's and invalid %esp's. 878 */ 879 cs = ucp->uc_mcontext.mc_cs; 880 if (!CS_SECURE(cs)) { 881 printf("freebsd4_sigreturn: cs = 0x%x\n", cs); 882 ksiginfo_init_trap(&ksi); 883 ksi.ksi_signo = SIGBUS; 884 ksi.ksi_code = BUS_OBJERR; 885 ksi.ksi_trapno = T_PROTFLT; 886 ksi.ksi_addr = (void *)regs->tf_eip; 887 trapsignal(td, &ksi); 888 return (EINVAL); 889 } 890 891 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 892 } 893 894 PROC_LOCK(p); 895#if defined(COMPAT_43) 896 if (ucp->uc_mcontext.mc_onstack & 1) 897 td->td_sigstk.ss_flags |= SS_ONSTACK; 898 else 899 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 900#endif 901 902 td->td_sigmask = ucp->uc_sigmask; 903 SIG_CANTMASK(td->td_sigmask); 904 signotify(td); 905 PROC_UNLOCK(p); 906 return (EJUSTRETURN); 907} 908#endif /* COMPAT_FREEBSD4 */ 909 910/* 911 * MPSAFE 912 */ 913int 914sigreturn(td, uap) 915 struct thread *td; 916 struct sigreturn_args /* { 917 const struct __ucontext *sigcntxp; 918 } */ *uap; 919{ 920 ucontext_t uc; 921 struct proc *p = td->td_proc; 922 struct trapframe *regs; 923 const ucontext_t *ucp; 924 int cs, eflags, error, ret; 925 ksiginfo_t ksi; 926 927 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 928 if (error != 0) 929 return (error); 930 ucp = &uc; 931 regs = td->td_frame; 932 eflags = ucp->uc_mcontext.mc_eflags; 933 if (eflags & PSL_VM) { 934 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 935 struct vm86_kernel *vm86; 936 937 /* 938 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 939 * set up the vm86 area, and we can't enter vm86 mode. 940 */ 941 if (td->td_pcb->pcb_ext == 0) 942 return (EINVAL); 943 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 944 if (vm86->vm86_inited == 0) 945 return (EINVAL); 946 947 /* Go back to user mode if both flags are set. */ 948 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 949 ksiginfo_init_trap(&ksi); 950 ksi.ksi_signo = SIGBUS; 951 ksi.ksi_code = BUS_OBJERR; 952 ksi.ksi_addr = (void *)regs->tf_eip; 953 trapsignal(td, &ksi); 954 } 955 956 if (vm86->vm86_has_vme) { 957 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 958 (eflags & VME_USERCHANGE) | PSL_VM; 959 } else { 960 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 961 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 962 (eflags & VM_USERCHANGE) | PSL_VM; 963 } 964 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 965 tf->tf_eflags = eflags; 966 tf->tf_vm86_ds = tf->tf_ds; 967 tf->tf_vm86_es = tf->tf_es; 968 tf->tf_vm86_fs = tf->tf_fs; 969 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 970 tf->tf_ds = _udatasel; 971 tf->tf_es = _udatasel; 972 tf->tf_fs = _udatasel; 973 } else { 974 /* 975 * Don't allow users to change privileged or reserved flags. 976 */ 977 /* 978 * XXX do allow users to change the privileged flag PSL_RF. 979 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 980 * should sometimes set it there too. tf_eflags is kept in 981 * the signal context during signal handling and there is no 982 * other place to remember it, so the PSL_RF bit may be 983 * corrupted by the signal handler without us knowing. 984 * Corruption of the PSL_RF bit at worst causes one more or 985 * one less debugger trap, so allowing it is fairly harmless. 986 */ 987 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 988 printf("sigreturn: eflags = 0x%x\n", eflags); 989 return (EINVAL); 990 } 991 992 /* 993 * Don't allow users to load a valid privileged %cs. Let the 994 * hardware check for invalid selectors, excess privilege in 995 * other selectors, invalid %eip's and invalid %esp's. 996 */ 997 cs = ucp->uc_mcontext.mc_cs; 998 if (!CS_SECURE(cs)) { 999 printf("sigreturn: cs = 0x%x\n", cs); 1000 ksiginfo_init_trap(&ksi); 1001 ksi.ksi_signo = SIGBUS; 1002 ksi.ksi_code = BUS_OBJERR; 1003 ksi.ksi_trapno = T_PROTFLT; 1004 ksi.ksi_addr = (void *)regs->tf_eip; 1005 trapsignal(td, &ksi); 1006 return (EINVAL); 1007 } 1008 1009 ret = set_fpcontext(td, &ucp->uc_mcontext); 1010 if (ret != 0) 1011 return (ret); 1012 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 1013 } 1014 1015 PROC_LOCK(p); 1016#if defined(COMPAT_43) 1017 if (ucp->uc_mcontext.mc_onstack & 1) 1018 td->td_sigstk.ss_flags |= SS_ONSTACK; 1019 else 1020 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 1021#endif 1022 1023 td->td_sigmask = ucp->uc_sigmask; 1024 SIG_CANTMASK(td->td_sigmask); 1025 signotify(td); 1026 PROC_UNLOCK(p); 1027 return (EJUSTRETURN); 1028} 1029 1030/* 1031 * Machine dependent boot() routine 1032 * 1033 * I haven't seen anything to put here yet 1034 * Possibly some stuff might be grafted back here from boot() 1035 */ 1036void 1037cpu_boot(int howto) 1038{ 1039} 1040 1041/* Get current clock frequency for the given cpu id. */ 1042int 1043cpu_est_clockrate(int cpu_id, uint64_t *rate) 1044{ 1045 register_t reg; 1046 uint64_t tsc1, tsc2; 1047 1048 if (pcpu_find(cpu_id) == NULL || rate == NULL) 1049 return (EINVAL); 1050 if (!tsc_present) 1051 return (EOPNOTSUPP); 1052 1053 /* If we're booting, trust the rate calibrated moments ago. */ 1054 if (cold) { 1055 *rate = tsc_freq; 1056 return (0); 1057 } 1058 1059#ifdef SMP 1060 /* Schedule ourselves on the indicated cpu. */ 1061 mtx_lock_spin(&sched_lock); 1062 sched_bind(curthread, cpu_id); 1063 mtx_unlock_spin(&sched_lock); 1064#endif 1065 1066 /* Calibrate by measuring a short delay. */ 1067 reg = intr_disable(); 1068 tsc1 = rdtsc(); 1069 DELAY(1000); 1070 tsc2 = rdtsc(); 1071 intr_restore(reg); 1072 1073#ifdef SMP 1074 mtx_lock_spin(&sched_lock); 1075 sched_unbind(curthread); 1076 mtx_unlock_spin(&sched_lock); 1077#endif 1078 1079 /* 1080 * Calculate the difference in readings, convert to Mhz, and 1081 * subtract 0.5% of the total. Empirical testing has shown that 1082 * overhead in DELAY() works out to approximately this value. 1083 */ 1084 tsc2 -= tsc1; 1085 *rate = tsc2 * 1000 - tsc2 * 5; 1086 return (0); 1087} 1088 1089/* 1090 * Shutdown the CPU as much as possible 1091 */ 1092void 1093cpu_halt(void) 1094{ 1095 for (;;) 1096 __asm__ ("hlt"); 1097} 1098 1099/* 1100 * Hook to idle the CPU when possible. In the SMP case we default to 1101 * off because a halted cpu will not currently pick up a new thread in the 1102 * run queue until the next timer tick. If turned on this will result in 1103 * approximately a 4.2% loss in real time performance in buildworld tests 1104 * (but improves user and sys times oddly enough), and saves approximately 1105 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 1106 * 1107 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 1108 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 1109 * Then we can have our cake and eat it too. 1110 * 1111 * XXX I'm turning it on for SMP as well by default for now. It seems to 1112 * help lock contention somewhat, and this is critical for HTT. -Peter 1113 */ 1114static int cpu_idle_hlt = 1; 1115SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 1116 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 1117 1118static void 1119cpu_idle_default(void) 1120{ 1121 /* 1122 * we must absolutely guarentee that hlt is the 1123 * absolute next instruction after sti or we 1124 * introduce a timing window. 1125 */ 1126 __asm __volatile("sti; hlt"); 1127} 1128 1129/* 1130 * Note that we have to be careful here to avoid a race between checking 1131 * sched_runnable() and actually halting. If we don't do this, we may waste 1132 * the time between calling hlt and the next interrupt even though there 1133 * is a runnable process. 1134 */ 1135void 1136cpu_idle(void) 1137{ 1138 1139#ifdef SMP 1140 if (mp_grab_cpu_hlt()) 1141 return; 1142#endif 1143 1144 if (cpu_idle_hlt) { 1145 disable_intr(); 1146 if (sched_runnable()) 1147 enable_intr(); 1148 else 1149 (*cpu_idle_hook)(); 1150 } 1151} 1152 1153/* Other subsystems (e.g., ACPI) can hook this later. */ 1154void (*cpu_idle_hook)(void) = cpu_idle_default; 1155 1156/* 1157 * Clear registers on exec 1158 */ 1159void 1160exec_setregs(td, entry, stack, ps_strings) 1161 struct thread *td; 1162 u_long entry; 1163 u_long stack; 1164 u_long ps_strings; 1165{ 1166 struct trapframe *regs = td->td_frame; 1167 struct pcb *pcb = td->td_pcb; 1168 1169 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */ 1170 pcb->pcb_gs = _udatasel; 1171 load_gs(_udatasel); 1172 1173 if (td->td_proc->p_md.md_ldt) 1174 user_ldt_free(td); 1175 1176 bzero((char *)regs, sizeof(struct trapframe)); 1177 regs->tf_eip = entry; 1178 regs->tf_esp = stack; 1179 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 1180 regs->tf_ss = _udatasel; 1181 regs->tf_ds = _udatasel; 1182 regs->tf_es = _udatasel; 1183 regs->tf_fs = _udatasel; 1184 regs->tf_cs = _ucodesel; 1185 1186 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */ 1187 regs->tf_ebx = ps_strings; 1188 1189 /* 1190 * Reset the hardware debug registers if they were in use. 1191 * They won't have any meaning for the newly exec'd process. 1192 */ 1193 if (pcb->pcb_flags & PCB_DBREGS) { 1194 pcb->pcb_dr0 = 0; 1195 pcb->pcb_dr1 = 0; 1196 pcb->pcb_dr2 = 0; 1197 pcb->pcb_dr3 = 0; 1198 pcb->pcb_dr6 = 0; 1199 pcb->pcb_dr7 = 0; 1200 if (pcb == PCPU_GET(curpcb)) { 1201 /* 1202 * Clear the debug registers on the running 1203 * CPU, otherwise they will end up affecting 1204 * the next process we switch to. 1205 */ 1206 reset_dbregs(); 1207 } 1208 pcb->pcb_flags &= ~PCB_DBREGS; 1209 } 1210 1211 /* 1212 * Initialize the math emulator (if any) for the current process. 1213 * Actually, just clear the bit that says that the emulator has 1214 * been initialized. Initialization is delayed until the process 1215 * traps to the emulator (if it is done at all) mainly because 1216 * emulators don't provide an entry point for initialization. 1217 */ 1218 td->td_pcb->pcb_flags &= ~FP_SOFTFP; 1219 1220 /* 1221 * Drop the FP state if we hold it, so that the process gets a 1222 * clean FP state if it uses the FPU again. 1223 */ 1224 fpstate_drop(td); 1225 1226 /* 1227 * XXX - Linux emulator 1228 * Make sure sure edx is 0x0 on entry. Linux binaries depend 1229 * on it. 1230 */ 1231 td->td_retval[1] = 0; 1232} 1233 1234void 1235cpu_setregs(void) 1236{ 1237 unsigned int cr0; 1238 1239 cr0 = rcr0(); 1240 1241 /* 1242 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support: 1243 * 1244 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 1245 * instructions. We must set the CR0_MP bit and use the CR0_TS 1246 * bit to control the trap, because setting the CR0_EM bit does 1247 * not cause WAIT instructions to trap. It's important to trap 1248 * WAIT instructions - otherwise the "wait" variants of no-wait 1249 * control instructions would degenerate to the "no-wait" variants 1250 * after FP context switches but work correctly otherwise. It's 1251 * particularly important to trap WAITs when there is no NPX - 1252 * otherwise the "wait" variants would always degenerate. 1253 * 1254 * Try setting CR0_NE to get correct error reporting on 486DX's. 1255 * Setting it should fail or do nothing on lesser processors. 1256 */ 1257 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 1258 load_cr0(cr0); 1259 load_gs(_udatasel); 1260} 1261 1262static int 1263sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 1264{ 1265 int error; 1266 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 1267 req); 1268 if (!error && req->newptr) 1269 resettodr(); 1270 return (error); 1271} 1272 1273SYSCTL_PROC(_machdep, OID_AUTO, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 1274 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 1275 1276SYSCTL_INT(_machdep, OID_AUTO, disable_rtc_set, 1277 CTLFLAG_RW, &disable_rtc_set, 0, ""); 1278 1279SYSCTL_INT(_machdep, OID_AUTO, wall_cmos_clock, 1280 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 1281 1282u_long bootdev; /* not a struct cdev *- encoding is different */ 1283SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev, 1284 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)"); 1285 1286/* 1287 * Initialize 386 and configure to run kernel 1288 */ 1289 1290/* 1291 * Initialize segments & interrupt table 1292 */ 1293 1294int _default_ldt; 1295union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */ 1296static struct gate_descriptor idt0[NIDT]; 1297struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 1298union descriptor ldt[NLDT]; /* local descriptor table */ 1299struct region_descriptor r_gdt, r_idt; /* table descriptors */ 1300 1301#if defined(I586_CPU) && !defined(NO_F00F_HACK) 1302extern int has_f00f_bug; 1303#endif 1304 1305static struct i386tss dblfault_tss; 1306static char dblfault_stack[PAGE_SIZE]; 1307 1308extern vm_offset_t proc0kstack; 1309 1310 1311/* 1312 * software prototypes -- in more palatable form. 1313 * 1314 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret 1315 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it) 1316 */ 1317struct soft_segment_descriptor gdt_segs[] = { 1318/* GNULL_SEL 0 Null Descriptor */ 1319{ 0x0, /* segment base address */ 1320 0x0, /* length */ 1321 0, /* segment type */ 1322 0, /* segment descriptor priority level */ 1323 0, /* segment descriptor present */ 1324 0, 0, 1325 0, /* default 32 vs 16 bit size */ 1326 0 /* limit granularity (byte/page units)*/ }, 1327/* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */ 1328{ 0x0, /* segment base address */ 1329 0xfffff, /* length - all address space */ 1330 SDT_MEMRWA, /* segment type */ 1331 0, /* segment descriptor priority level */ 1332 1, /* segment descriptor present */ 1333 0, 0, 1334 1, /* default 32 vs 16 bit size */ 1335 1 /* limit granularity (byte/page units)*/ }, 1336/* GUFS_SEL 2 %fs Descriptor for user */ 1337{ 0x0, /* segment base address */ 1338 0xfffff, /* length - all address space */ 1339 SDT_MEMRWA, /* segment type */ 1340 SEL_UPL, /* segment descriptor priority level */ 1341 1, /* segment descriptor present */ 1342 0, 0, 1343 1, /* default 32 vs 16 bit size */ 1344 1 /* limit granularity (byte/page units)*/ }, 1345/* GUGS_SEL 3 %gs Descriptor for user */ 1346{ 0x0, /* segment base address */ 1347 0xfffff, /* length - all address space */ 1348 SDT_MEMRWA, /* segment type */ 1349 SEL_UPL, /* segment descriptor priority level */ 1350 1, /* segment descriptor present */ 1351 0, 0, 1352 1, /* default 32 vs 16 bit size */ 1353 1 /* limit granularity (byte/page units)*/ }, 1354/* GCODE_SEL 4 Code Descriptor for kernel */ 1355{ 0x0, /* segment base address */ 1356 0xfffff, /* length - all address space */ 1357 SDT_MEMERA, /* segment type */ 1358 0, /* segment descriptor priority level */ 1359 1, /* segment descriptor present */ 1360 0, 0, 1361 1, /* default 32 vs 16 bit size */ 1362 1 /* limit granularity (byte/page units)*/ }, 1363/* GDATA_SEL 5 Data Descriptor for kernel */ 1364{ 0x0, /* segment base address */ 1365 0xfffff, /* length - all address space */ 1366 SDT_MEMRWA, /* segment type */ 1367 0, /* segment descriptor priority level */ 1368 1, /* segment descriptor present */ 1369 0, 0, 1370 1, /* default 32 vs 16 bit size */ 1371 1 /* limit granularity (byte/page units)*/ }, 1372/* GUCODE_SEL 6 Code Descriptor for user */ 1373{ 0x0, /* segment base address */ 1374 0xfffff, /* length - all address space */ 1375 SDT_MEMERA, /* segment type */ 1376 SEL_UPL, /* segment descriptor priority level */ 1377 1, /* segment descriptor present */ 1378 0, 0, 1379 1, /* default 32 vs 16 bit size */ 1380 1 /* limit granularity (byte/page units)*/ }, 1381/* GUDATA_SEL 7 Data Descriptor for user */ 1382{ 0x0, /* segment base address */ 1383 0xfffff, /* length - all address space */ 1384 SDT_MEMRWA, /* segment type */ 1385 SEL_UPL, /* segment descriptor priority level */ 1386 1, /* segment descriptor present */ 1387 0, 0, 1388 1, /* default 32 vs 16 bit size */ 1389 1 /* limit granularity (byte/page units)*/ }, 1390/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */ 1391{ 0x400, /* segment base address */ 1392 0xfffff, /* length */ 1393 SDT_MEMRWA, /* segment type */ 1394 0, /* segment descriptor priority level */ 1395 1, /* segment descriptor present */ 1396 0, 0, 1397 1, /* default 32 vs 16 bit size */ 1398 1 /* limit granularity (byte/page units)*/ }, 1399/* GPROC0_SEL 9 Proc 0 Tss Descriptor */ 1400{ 1401 0x0, /* segment base address */ 1402 sizeof(struct i386tss)-1,/* length */ 1403 SDT_SYS386TSS, /* segment type */ 1404 0, /* segment descriptor priority level */ 1405 1, /* segment descriptor present */ 1406 0, 0, 1407 0, /* unused - default 32 vs 16 bit size */ 1408 0 /* limit granularity (byte/page units)*/ }, 1409/* GLDT_SEL 10 LDT Descriptor */ 1410{ (int) ldt, /* segment base address */ 1411 sizeof(ldt)-1, /* length - all address space */ 1412 SDT_SYSLDT, /* segment type */ 1413 SEL_UPL, /* segment descriptor priority level */ 1414 1, /* segment descriptor present */ 1415 0, 0, 1416 0, /* unused - default 32 vs 16 bit size */ 1417 0 /* limit granularity (byte/page units)*/ }, 1418/* GUSERLDT_SEL 11 User LDT Descriptor per process */ 1419{ (int) ldt, /* segment base address */ 1420 (512 * sizeof(union descriptor)-1), /* length */ 1421 SDT_SYSLDT, /* segment type */ 1422 0, /* segment descriptor priority level */ 1423 1, /* segment descriptor present */ 1424 0, 0, 1425 0, /* unused - default 32 vs 16 bit size */ 1426 0 /* limit granularity (byte/page units)*/ }, 1427/* GPANIC_SEL 12 Panic Tss Descriptor */ 1428{ (int) &dblfault_tss, /* segment base address */ 1429 sizeof(struct i386tss)-1,/* length - all address space */ 1430 SDT_SYS386TSS, /* segment type */ 1431 0, /* segment descriptor priority level */ 1432 1, /* segment descriptor present */ 1433 0, 0, 1434 0, /* unused - default 32 vs 16 bit size */ 1435 0 /* limit granularity (byte/page units)*/ }, 1436/* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */ 1437{ 0, /* segment base address (overwritten) */ 1438 0xfffff, /* length */ 1439 SDT_MEMERA, /* segment type */ 1440 0, /* segment descriptor priority level */ 1441 1, /* segment descriptor present */ 1442 0, 0, 1443 0, /* default 32 vs 16 bit size */ 1444 1 /* limit granularity (byte/page units)*/ }, 1445/* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */ 1446{ 0, /* segment base address (overwritten) */ 1447 0xfffff, /* length */ 1448 SDT_MEMERA, /* segment type */ 1449 0, /* segment descriptor priority level */ 1450 1, /* segment descriptor present */ 1451 0, 0, 1452 0, /* default 32 vs 16 bit size */ 1453 1 /* limit granularity (byte/page units)*/ }, 1454/* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */ 1455{ 0, /* segment base address (overwritten) */ 1456 0xfffff, /* length */ 1457 SDT_MEMRWA, /* segment type */ 1458 0, /* segment descriptor priority level */ 1459 1, /* segment descriptor present */ 1460 0, 0, 1461 1, /* default 32 vs 16 bit size */ 1462 1 /* limit granularity (byte/page units)*/ }, 1463/* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */ 1464{ 0, /* segment base address (overwritten) */ 1465 0xfffff, /* length */ 1466 SDT_MEMRWA, /* segment type */ 1467 0, /* segment descriptor priority level */ 1468 1, /* segment descriptor present */ 1469 0, 0, 1470 0, /* default 32 vs 16 bit size */ 1471 1 /* limit granularity (byte/page units)*/ }, 1472/* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */ 1473{ 0, /* segment base address (overwritten) */ 1474 0xfffff, /* length */ 1475 SDT_MEMRWA, /* segment type */ 1476 0, /* segment descriptor priority level */ 1477 1, /* segment descriptor present */ 1478 0, 0, 1479 0, /* default 32 vs 16 bit size */ 1480 1 /* limit granularity (byte/page units)*/ }, 1481/* GNDIS_SEL 18 NDIS Descriptor */ 1482{ 0x0, /* segment base address */ 1483 0x0, /* length */ 1484 0, /* segment type */ 1485 0, /* segment descriptor priority level */ 1486 0, /* segment descriptor present */ 1487 0, 0, 1488 0, /* default 32 vs 16 bit size */ 1489 0 /* limit granularity (byte/page units)*/ }, 1490}; 1491 1492static struct soft_segment_descriptor ldt_segs[] = { 1493 /* Null Descriptor - overwritten by call gate */ 1494{ 0x0, /* segment base address */ 1495 0x0, /* length - all address space */ 1496 0, /* segment type */ 1497 0, /* segment descriptor priority level */ 1498 0, /* segment descriptor present */ 1499 0, 0, 1500 0, /* default 32 vs 16 bit size */ 1501 0 /* limit granularity (byte/page units)*/ }, 1502 /* Null Descriptor - overwritten by call gate */ 1503{ 0x0, /* segment base address */ 1504 0x0, /* length - all address space */ 1505 0, /* segment type */ 1506 0, /* segment descriptor priority level */ 1507 0, /* segment descriptor present */ 1508 0, 0, 1509 0, /* default 32 vs 16 bit size */ 1510 0 /* limit granularity (byte/page units)*/ }, 1511 /* Null Descriptor - overwritten by call gate */ 1512{ 0x0, /* segment base address */ 1513 0x0, /* length - all address space */ 1514 0, /* segment type */ 1515 0, /* segment descriptor priority level */ 1516 0, /* segment descriptor present */ 1517 0, 0, 1518 0, /* default 32 vs 16 bit size */ 1519 0 /* limit granularity (byte/page units)*/ }, 1520 /* Code Descriptor for user */ 1521{ 0x0, /* segment base address */ 1522 0xfffff, /* length - all address space */ 1523 SDT_MEMERA, /* segment type */ 1524 SEL_UPL, /* segment descriptor priority level */ 1525 1, /* segment descriptor present */ 1526 0, 0, 1527 1, /* default 32 vs 16 bit size */ 1528 1 /* limit granularity (byte/page units)*/ }, 1529 /* Null Descriptor - overwritten by call gate */ 1530{ 0x0, /* segment base address */ 1531 0x0, /* length - all address space */ 1532 0, /* segment type */ 1533 0, /* segment descriptor priority level */ 1534 0, /* segment descriptor present */ 1535 0, 0, 1536 0, /* default 32 vs 16 bit size */ 1537 0 /* limit granularity (byte/page units)*/ }, 1538 /* Data Descriptor for user */ 1539{ 0x0, /* segment base address */ 1540 0xfffff, /* length - all address space */ 1541 SDT_MEMRWA, /* segment type */ 1542 SEL_UPL, /* segment descriptor priority level */ 1543 1, /* segment descriptor present */ 1544 0, 0, 1545 1, /* default 32 vs 16 bit size */ 1546 1 /* limit granularity (byte/page units)*/ }, 1547}; 1548 1549void 1550setidt(idx, func, typ, dpl, selec) 1551 int idx; 1552 inthand_t *func; 1553 int typ; 1554 int dpl; 1555 int selec; 1556{ 1557 struct gate_descriptor *ip; 1558 1559 ip = idt + idx; 1560 ip->gd_looffset = (int)func; 1561 ip->gd_selector = selec; 1562 ip->gd_stkcpy = 0; 1563 ip->gd_xx = 0; 1564 ip->gd_type = typ; 1565 ip->gd_dpl = dpl; 1566 ip->gd_p = 1; 1567 ip->gd_hioffset = ((int)func)>>16 ; 1568} 1569 1570#define IDTVEC(name) __CONCAT(X,name) 1571 1572extern inthand_t 1573 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1574 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1575 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1576 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1577 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall); 1578 1579#ifdef DDB 1580/* 1581 * Display the index and function name of any IDT entries that don't use 1582 * the default 'rsvd' entry point. 1583 */ 1584DB_SHOW_COMMAND(idt, db_show_idt) 1585{ 1586 struct gate_descriptor *ip; 1587 int idx; 1588 uintptr_t func; 1589 1590 ip = idt; 1591 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) { 1592 func = (ip->gd_hioffset << 16 | ip->gd_looffset); 1593 if (func != (uintptr_t)&IDTVEC(rsvd)) { 1594 db_printf("%3d\t", idx); 1595 db_printsym(func, DB_STGY_PROC); 1596 db_printf("\n"); 1597 } 1598 ip++; 1599 } 1600} 1601#endif 1602 1603void 1604sdtossd(sd, ssd) 1605 struct segment_descriptor *sd; 1606 struct soft_segment_descriptor *ssd; 1607{ 1608 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1609 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1610 ssd->ssd_type = sd->sd_type; 1611 ssd->ssd_dpl = sd->sd_dpl; 1612 ssd->ssd_p = sd->sd_p; 1613 ssd->ssd_def32 = sd->sd_def32; 1614 ssd->ssd_gran = sd->sd_gran; 1615} 1616 1617/* 1618 * Populate the (physmap) array with base/bound pairs describing the 1619 * available physical memory in the system, then test this memory and 1620 * build the phys_avail array describing the actually-available memory. 1621 * 1622 * If we cannot accurately determine the physical memory map, then use 1623 * value from the 0xE801 call, and failing that, the RTC. 1624 * 1625 * Total memory size may be set by the kernel environment variable 1626 * hw.physmem or the compile-time define MAXMEM. 1627 * 1628 * XXX first should be vm_paddr_t. 1629 */ 1630static void 1631getmemsize(int first) 1632{ 1633 int i, physmap_idx, pa_indx, da_indx; 1634 int hasbrokenint12, has_smap; 1635 u_long physmem_tunable; 1636 u_int extmem; 1637 struct vm86frame vmf; 1638 struct vm86context vmc; 1639 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 1640 pt_entry_t *pte; 1641 struct bios_smap *smap; 1642 quad_t dcons_addr, dcons_size; 1643 1644 has_smap = 0; 1645#ifdef XBOX 1646 if (arch_i386_is_xbox) { 1647 /* 1648 * We queried the memory size before, so chop off 4MB for 1649 * the framebuffer and inform the OS of this. 1650 */ 1651 physmap[0] = 0; 1652 physmap[1] = (arch_i386_xbox_memsize * 1024 * 1024) - XBOX_FB_SIZE; 1653 physmap_idx = 0; 1654 goto physmap_done; 1655 } 1656#endif 1657 1658 hasbrokenint12 = 0; 1659 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12); 1660 bzero(&vmf, sizeof(vmf)); 1661 bzero(physmap, sizeof(physmap)); 1662 basemem = 0; 1663 1664 /* 1665 * Some newer BIOSes has broken INT 12H implementation which cause 1666 * kernel panic immediately. In this case, we need to scan SMAP 1667 * with INT 15:E820 first, then determine base memory size. 1668 */ 1669 if (hasbrokenint12) { 1670 goto int15e820; 1671 } 1672 1673 /* 1674 * Perform "base memory" related probes & setup 1675 */ 1676 vm86_intcall(0x12, &vmf); 1677 basemem = vmf.vmf_ax; 1678 if (basemem > 640) { 1679 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 1680 basemem); 1681 basemem = 640; 1682 } 1683 1684 /* 1685 * XXX if biosbasemem is now < 640, there is a `hole' 1686 * between the end of base memory and the start of 1687 * ISA memory. The hole may be empty or it may 1688 * contain BIOS code or data. Map it read/write so 1689 * that the BIOS can write to it. (Memory from 0 to 1690 * the physical end of the kernel is mapped read-only 1691 * to begin with and then parts of it are remapped. 1692 * The parts that aren't remapped form holes that 1693 * remain read-only and are unused by the kernel. 1694 * The base memory area is below the physical end of 1695 * the kernel and right now forms a read-only hole. 1696 * The part of it from PAGE_SIZE to 1697 * (trunc_page(biosbasemem * 1024) - 1) will be 1698 * remapped and used by the kernel later.) 1699 * 1700 * This code is similar to the code used in 1701 * pmap_mapdev, but since no memory needs to be 1702 * allocated we simply change the mapping. 1703 */ 1704 for (pa = trunc_page(basemem * 1024); 1705 pa < ISA_HOLE_START; pa += PAGE_SIZE) 1706 pmap_kenter(KERNBASE + pa, pa); 1707 1708 /* 1709 * Map pages between basemem and ISA_HOLE_START, if any, r/w into 1710 * the vm86 page table so that vm86 can scribble on them using 1711 * the vm86 map too. XXX: why 2 ways for this and only 1 way for 1712 * page 0, at least as initialized here? 1713 */ 1714 pte = (pt_entry_t *)vm86paddr; 1715 for (i = basemem / 4; i < 160; i++) 1716 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1717 1718int15e820: 1719 /* 1720 * map page 1 R/W into the kernel page table so we can use it 1721 * as a buffer. The kernel will unmap this page later. 1722 */ 1723 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT); 1724 1725 /* 1726 * get memory map with INT 15:E820 1727 */ 1728 vmc.npages = 0; 1729 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT)); 1730 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di); 1731 1732 physmap_idx = 0; 1733 vmf.vmf_ebx = 0; 1734 do { 1735 vmf.vmf_eax = 0xE820; 1736 vmf.vmf_edx = SMAP_SIG; 1737 vmf.vmf_ecx = sizeof(struct bios_smap); 1738 i = vm86_datacall(0x15, &vmf, &vmc); 1739 if (i || vmf.vmf_eax != SMAP_SIG) 1740 break; 1741 if (boothowto & RB_VERBOSE) 1742 printf("SMAP type=%02x base=%016llx len=%016llx\n", 1743 smap->type, smap->base, smap->length); 1744 has_smap = 1; 1745 1746 if (smap->type != 0x01) 1747 continue; 1748 1749 if (smap->length == 0) 1750 continue; 1751 1752#ifndef PAE 1753 if (smap->base >= 0xffffffff) { 1754 printf("%uK of memory above 4GB ignored\n", 1755 (u_int)(smap->length / 1024)); 1756 continue; 1757 } 1758#endif 1759 1760 for (i = 0; i <= physmap_idx; i += 2) { 1761 if (smap->base < physmap[i + 1]) { 1762 if (boothowto & RB_VERBOSE) 1763 printf( 1764 "Overlapping or non-montonic memory region, ignoring second region\n"); 1765 continue; 1766 } 1767 } 1768 1769 if (smap->base == physmap[physmap_idx + 1]) { 1770 physmap[physmap_idx + 1] += smap->length; 1771 continue; 1772 } 1773 1774 physmap_idx += 2; 1775 if (physmap_idx == PHYSMAP_SIZE) { 1776 printf( 1777 "Too many segments in the physical address map, giving up\n"); 1778 break; 1779 } 1780 physmap[physmap_idx] = smap->base; 1781 physmap[physmap_idx + 1] = smap->base + smap->length; 1782 } while (vmf.vmf_ebx != 0); 1783 1784 /* 1785 * Perform "base memory" related probes & setup based on SMAP 1786 */ 1787 if (basemem == 0) { 1788 for (i = 0; i <= physmap_idx; i += 2) { 1789 if (physmap[i] == 0x00000000) { 1790 basemem = physmap[i + 1] / 1024; 1791 break; 1792 } 1793 } 1794 1795 /* 1796 * XXX this function is horribly organized and has to the same 1797 * things that it does above here. 1798 */ 1799 if (basemem == 0) 1800 basemem = 640; 1801 if (basemem > 640) { 1802 printf( 1803 "Preposterous BIOS basemem of %uK, truncating to 640K\n", 1804 basemem); 1805 basemem = 640; 1806 } 1807 1808 /* 1809 * Let vm86 scribble on pages between basemem and 1810 * ISA_HOLE_START, as above. 1811 */ 1812 for (pa = trunc_page(basemem * 1024); 1813 pa < ISA_HOLE_START; pa += PAGE_SIZE) 1814 pmap_kenter(KERNBASE + pa, pa); 1815 pte = (pt_entry_t *)vm86paddr; 1816 for (i = basemem / 4; i < 160; i++) 1817 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1818 } 1819 1820 if (physmap[1] != 0) 1821 goto physmap_done; 1822 1823 /* 1824 * If we failed above, try memory map with INT 15:E801 1825 */ 1826 vmf.vmf_ax = 0xE801; 1827 if (vm86_intcall(0x15, &vmf) == 0) { 1828 extmem = vmf.vmf_cx + vmf.vmf_dx * 64; 1829 } else { 1830#if 0 1831 vmf.vmf_ah = 0x88; 1832 vm86_intcall(0x15, &vmf); 1833 extmem = vmf.vmf_ax; 1834#else 1835 /* 1836 * Prefer the RTC value for extended memory. 1837 */ 1838 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8); 1839#endif 1840 } 1841 1842 /* 1843 * Special hack for chipsets that still remap the 384k hole when 1844 * there's 16MB of memory - this really confuses people that 1845 * are trying to use bus mastering ISA controllers with the 1846 * "16MB limit"; they only have 16MB, but the remapping puts 1847 * them beyond the limit. 1848 * 1849 * If extended memory is between 15-16MB (16-17MB phys address range), 1850 * chop it to 15MB. 1851 */ 1852 if ((extmem > 15 * 1024) && (extmem < 16 * 1024)) 1853 extmem = 15 * 1024; 1854 1855 physmap[0] = 0; 1856 physmap[1] = basemem * 1024; 1857 physmap_idx = 2; 1858 physmap[physmap_idx] = 0x100000; 1859 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024; 1860 1861physmap_done: 1862 /* 1863 * Now, physmap contains a map of physical memory. 1864 */ 1865 1866#ifdef SMP 1867 /* make hole for AP bootstrap code */ 1868 physmap[1] = mp_bootaddress(physmap[1]); 1869#endif 1870 1871 /* 1872 * Maxmem isn't the "maximum memory", it's one larger than the 1873 * highest page of the physical address space. It should be 1874 * called something like "Maxphyspage". We may adjust this 1875 * based on ``hw.physmem'' and the results of the memory test. 1876 */ 1877 Maxmem = atop(physmap[physmap_idx + 1]); 1878 1879#ifdef MAXMEM 1880 Maxmem = MAXMEM / 4; 1881#endif 1882 1883 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 1884 Maxmem = atop(physmem_tunable); 1885 1886 /* 1887 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend 1888 * the amount of memory in the system. 1889 */ 1890 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1])) 1891 Maxmem = atop(physmap[physmap_idx + 1]); 1892 1893 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1894 (boothowto & RB_VERBOSE)) 1895 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1896 1897 /* 1898 * If Maxmem has been increased beyond what the system has detected, 1899 * extend the last memory segment to the new limit. 1900 */ 1901 if (atop(physmap[physmap_idx + 1]) < Maxmem) 1902 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem); 1903 1904 /* call pmap initialization to make new kernel address space */ 1905 pmap_bootstrap(first, 0); 1906 1907 /* 1908 * Size up each available chunk of physical memory. 1909 */ 1910 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1911 pa_indx = 0; 1912 da_indx = 1; 1913 phys_avail[pa_indx++] = physmap[0]; 1914 phys_avail[pa_indx] = physmap[0]; 1915 dump_avail[da_indx] = physmap[0]; 1916 pte = CMAP1; 1917 1918 /* 1919 * Get dcons buffer address 1920 */ 1921 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 1922 getenv_quad("dcons.size", &dcons_size) == 0) 1923 dcons_addr = 0; 1924 1925 /* 1926 * physmap is in bytes, so when converting to page boundaries, 1927 * round up the start address and round down the end address. 1928 */ 1929 for (i = 0; i <= physmap_idx; i += 2) { 1930 vm_paddr_t end; 1931 1932 end = ptoa((vm_paddr_t)Maxmem); 1933 if (physmap[i + 1] < end) 1934 end = trunc_page(physmap[i + 1]); 1935 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1936 int tmp, page_bad, full; 1937 int *ptr = (int *)CADDR1; 1938 1939 full = FALSE; 1940 /* 1941 * block out kernel memory as not available. 1942 */ 1943 if (pa >= KERNLOAD && pa < first) 1944 goto do_dump_avail; 1945 1946 /* 1947 * block out dcons buffer 1948 */ 1949 if (dcons_addr > 0 1950 && pa >= trunc_page(dcons_addr) 1951 && pa < dcons_addr + dcons_size) 1952 goto do_dump_avail; 1953 1954 page_bad = FALSE; 1955 1956 /* 1957 * map page into kernel: valid, read/write,non-cacheable 1958 */ 1959 *pte = pa | PG_V | PG_RW | PG_N; 1960 invltlb(); 1961 1962 tmp = *(int *)ptr; 1963 /* 1964 * Test for alternating 1's and 0's 1965 */ 1966 *(volatile int *)ptr = 0xaaaaaaaa; 1967 if (*(volatile int *)ptr != 0xaaaaaaaa) 1968 page_bad = TRUE; 1969 /* 1970 * Test for alternating 0's and 1's 1971 */ 1972 *(volatile int *)ptr = 0x55555555; 1973 if (*(volatile int *)ptr != 0x55555555) 1974 page_bad = TRUE; 1975 /* 1976 * Test for all 1's 1977 */ 1978 *(volatile int *)ptr = 0xffffffff; 1979 if (*(volatile int *)ptr != 0xffffffff) 1980 page_bad = TRUE; 1981 /* 1982 * Test for all 0's 1983 */ 1984 *(volatile int *)ptr = 0x0; 1985 if (*(volatile int *)ptr != 0x0) 1986 page_bad = TRUE; 1987 /* 1988 * Restore original value. 1989 */ 1990 *(int *)ptr = tmp; 1991 1992 /* 1993 * Adjust array of valid/good pages. 1994 */ 1995 if (page_bad == TRUE) 1996 continue; 1997 /* 1998 * If this good page is a continuation of the 1999 * previous set of good pages, then just increase 2000 * the end pointer. Otherwise start a new chunk. 2001 * Note that "end" points one higher than end, 2002 * making the range >= start and < end. 2003 * If we're also doing a speculative memory 2004 * test and we at or past the end, bump up Maxmem 2005 * so that we keep going. The first bad page 2006 * will terminate the loop. 2007 */ 2008 if (phys_avail[pa_indx] == pa) { 2009 phys_avail[pa_indx] += PAGE_SIZE; 2010 } else { 2011 pa_indx++; 2012 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 2013 printf( 2014 "Too many holes in the physical address space, giving up\n"); 2015 pa_indx--; 2016 full = TRUE; 2017 goto do_dump_avail; 2018 } 2019 phys_avail[pa_indx++] = pa; /* start */ 2020 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 2021 } 2022 physmem++; 2023do_dump_avail: 2024 if (dump_avail[da_indx] == pa) { 2025 dump_avail[da_indx] += PAGE_SIZE; 2026 } else { 2027 da_indx++; 2028 if (da_indx == DUMP_AVAIL_ARRAY_END) { 2029 da_indx--; 2030 goto do_next; 2031 } 2032 dump_avail[da_indx++] = pa; /* start */ 2033 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 2034 } 2035do_next: 2036 if (full) 2037 break; 2038 } 2039 } 2040 *pte = 0; 2041 invltlb(); 2042 2043 /* 2044 * XXX 2045 * The last chunk must contain at least one page plus the message 2046 * buffer to avoid complicating other code (message buffer address 2047 * calculation, etc.). 2048 */ 2049 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 2050 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 2051 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 2052 phys_avail[pa_indx--] = 0; 2053 phys_avail[pa_indx--] = 0; 2054 } 2055 2056 Maxmem = atop(phys_avail[pa_indx]); 2057 2058 /* Trim off space for the message buffer. */ 2059 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 2060 2061 avail_end = phys_avail[pa_indx]; 2062} 2063 2064void 2065init386(first) 2066 int first; 2067{ 2068 struct gate_descriptor *gdp; 2069 int gsel_tss, metadata_missing, off, x; 2070 struct pcpu *pc; 2071 2072 thread0.td_kstack = proc0kstack; 2073 thread0.td_pcb = (struct pcb *) 2074 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 2075 2076 /* 2077 * This may be done better later if it gets more high level 2078 * components in it. If so just link td->td_proc here. 2079 */ 2080 proc_linkup(&proc0, &ksegrp0, &thread0); 2081 2082 metadata_missing = 0; 2083 if (bootinfo.bi_modulep) { 2084 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 2085 preload_bootstrap_relocate(KERNBASE); 2086 } else { 2087 metadata_missing = 1; 2088 } 2089 if (envmode == 1) 2090 kern_envp = static_env; 2091 else if (bootinfo.bi_envp) 2092 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 2093 2094 /* Init basic tunables, hz etc */ 2095 init_param1(); 2096 2097 /* 2098 * Make gdt memory segments. All segments cover the full 4GB 2099 * of address space and permissions are enforced at page level. 2100 */ 2101 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1); 2102 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1); 2103 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1); 2104 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1); 2105 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1); 2106 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1); 2107 2108#ifdef SMP 2109 pc = &SMP_prvspace[0].pcpu; 2110#else 2111 pc = &__pcpu; 2112#endif 2113 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1); 2114 gdt_segs[GPRIV_SEL].ssd_base = (int) pc; 2115 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss; 2116 2117 for (x = 0; x < NGDT; x++) 2118 ssdtosd(&gdt_segs[x], &gdt[x].sd); 2119 2120 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 2121 r_gdt.rd_base = (int) gdt; 2122 lgdt(&r_gdt); 2123 2124 pcpu_init(pc, 0, sizeof(struct pcpu)); 2125 PCPU_SET(prvspace, pc); 2126 PCPU_SET(curthread, &thread0); 2127 PCPU_SET(curpcb, thread0.td_pcb); 2128 2129 /* 2130 * Initialize mutexes. 2131 * 2132 * icu_lock: in order to allow an interrupt to occur in a critical 2133 * section, to set pcpu->ipending (etc...) properly, we 2134 * must be able to get the icu lock, so it can't be 2135 * under witness. 2136 */ 2137 mutex_init(); 2138 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN); 2139 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 2140 2141 /* make ldt memory segments */ 2142 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1); 2143 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1); 2144 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 2145 ssdtosd(&ldt_segs[x], &ldt[x].sd); 2146 2147 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 2148 lldt(_default_ldt); 2149 PCPU_SET(currentldt, _default_ldt); 2150 2151 /* exceptions */ 2152 for (x = 0; x < NIDT; x++) 2153 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, 2154 GSEL(GCODE_SEL, SEL_KPL)); 2155 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, 2156 GSEL(GCODE_SEL, SEL_KPL)); 2157 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL, 2158 GSEL(GCODE_SEL, SEL_KPL)); 2159 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL, 2160 GSEL(GCODE_SEL, SEL_KPL)); 2161 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL, 2162 GSEL(GCODE_SEL, SEL_KPL)); 2163 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, 2164 GSEL(GCODE_SEL, SEL_KPL)); 2165 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, 2166 GSEL(GCODE_SEL, SEL_KPL)); 2167 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2168 GSEL(GCODE_SEL, SEL_KPL)); 2169 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL 2170 , GSEL(GCODE_SEL, SEL_KPL)); 2171 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 2172 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, 2173 GSEL(GCODE_SEL, SEL_KPL)); 2174 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, 2175 GSEL(GCODE_SEL, SEL_KPL)); 2176 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, 2177 GSEL(GCODE_SEL, SEL_KPL)); 2178 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, 2179 GSEL(GCODE_SEL, SEL_KPL)); 2180 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2181 GSEL(GCODE_SEL, SEL_KPL)); 2182 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, 2183 GSEL(GCODE_SEL, SEL_KPL)); 2184 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, 2185 GSEL(GCODE_SEL, SEL_KPL)); 2186 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, 2187 GSEL(GCODE_SEL, SEL_KPL)); 2188 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, 2189 GSEL(GCODE_SEL, SEL_KPL)); 2190 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, 2191 GSEL(GCODE_SEL, SEL_KPL)); 2192 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL, 2193 GSEL(GCODE_SEL, SEL_KPL)); 2194 2195 r_idt.rd_limit = sizeof(idt0) - 1; 2196 r_idt.rd_base = (int) idt; 2197 lidt(&r_idt); 2198 2199#ifdef XBOX 2200 /* 2201 * The following code queries the PCI ID of 0:0:0. For the XBOX, 2202 * This should be 0x10de / 0x02a5. 2203 * 2204 * This is exactly what Linux does. 2205 */ 2206 outl(0xcf8, 0x80000000); 2207 if (inl(0xcfc) == 0x02a510de) { 2208 arch_i386_is_xbox = 1; 2209 pic16l_setled(XBOX_LED_GREEN); 2210 2211 /* 2212 * We are an XBOX, but we may have either 64MB or 128MB of 2213 * memory. The PCI host bridge should be programmed for this, 2214 * so we just query it. 2215 */ 2216 outl(0xcf8, 0x80000084); 2217 arch_i386_xbox_memsize = (inl(0xcfc) == 0x7FFFFFF) ? 128 : 64; 2218 } 2219#endif /* XBOX */ 2220 2221 /* 2222 * Initialize the console before we print anything out. 2223 */ 2224 cninit(); 2225 2226 if (metadata_missing) 2227 printf("WARNING: loader(8) metadata is missing!\n"); 2228 2229#ifdef DEV_ISA 2230 elcr_probe(); 2231 atpic_startup(); 2232#endif 2233 2234#ifdef DDB 2235 ksym_start = bootinfo.bi_symtab; 2236 ksym_end = bootinfo.bi_esymtab; 2237#endif 2238 2239 kdb_init(); 2240 2241#ifdef KDB 2242 if (boothowto & RB_KDB) 2243 kdb_enter("Boot flags requested debugger"); 2244#endif 2245 2246 finishidentcpu(); /* Final stage of CPU initialization */ 2247 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2248 GSEL(GCODE_SEL, SEL_KPL)); 2249 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2250 GSEL(GCODE_SEL, SEL_KPL)); 2251 initializecpu(); /* Initialize CPU registers */ 2252 2253 /* make an initial tss so cpu can get interrupt stack on syscall! */ 2254 /* Note: -16 is so we can grow the trapframe if we came from vm86 */ 2255 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack + 2256 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16); 2257 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL)); 2258 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 2259 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd); 2260 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); 2261 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16); 2262 ltr(gsel_tss); 2263 2264 /* pointer to selector slot for %fs/%gs */ 2265 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd); 2266 2267 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 2268 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)]; 2269 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 2270 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 2271#ifdef PAE 2272 dblfault_tss.tss_cr3 = (int)IdlePDPT; 2273#else 2274 dblfault_tss.tss_cr3 = (int)IdlePTD; 2275#endif 2276 dblfault_tss.tss_eip = (int)dblfault_handler; 2277 dblfault_tss.tss_eflags = PSL_KERNEL; 2278 dblfault_tss.tss_ds = dblfault_tss.tss_es = 2279 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 2280 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL); 2281 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 2282 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 2283 2284 vm86_initialize(); 2285 getmemsize(first); 2286 init_param2(physmem); 2287 2288 /* now running on new page tables, configured,and u/iom is accessible */ 2289 2290 /* Map the message buffer. */ 2291 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 2292 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off); 2293 2294 msgbufinit(msgbufp, MSGBUF_SIZE); 2295 2296 /* make a call gate to reenter kernel with */ 2297 gdp = &ldt[LSYS5CALLS_SEL].gd; 2298 2299 x = (int) &IDTVEC(lcall_syscall); 2300 gdp->gd_looffset = x; 2301 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 2302 gdp->gd_stkcpy = 1; 2303 gdp->gd_type = SDT_SYS386CGT; 2304 gdp->gd_dpl = SEL_UPL; 2305 gdp->gd_p = 1; 2306 gdp->gd_hioffset = x >> 16; 2307 2308 /* XXX does this work? */ 2309 /* XXX yes! */ 2310 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2311 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2312 2313 /* transfer to user mode */ 2314 2315 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 2316 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 2317 2318 /* setup proc 0's pcb */ 2319 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */ 2320#ifdef PAE 2321 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT; 2322#else 2323 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; 2324#endif 2325 thread0.td_pcb->pcb_ext = 0; 2326 thread0.td_frame = &proc0_tf; 2327} 2328 2329void 2330cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 2331{ 2332 2333 pcpu->pc_acpi_id = 0xffffffff; 2334} 2335 2336void 2337spinlock_enter(void) 2338{ 2339 struct thread *td; 2340 2341 td = curthread; 2342 if (td->td_md.md_spinlock_count == 0) 2343 td->td_md.md_saved_flags = intr_disable(); 2344 td->td_md.md_spinlock_count++; 2345 critical_enter(); 2346} 2347 2348void 2349spinlock_exit(void) 2350{ 2351 struct thread *td; 2352 2353 td = curthread; 2354 critical_exit(); 2355 td->td_md.md_spinlock_count--; 2356 if (td->td_md.md_spinlock_count == 0) 2357 intr_restore(td->td_md.md_saved_flags); 2358} 2359 2360#if defined(I586_CPU) && !defined(NO_F00F_HACK) 2361static void f00f_hack(void *unused); 2362SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL) 2363 2364static void 2365f00f_hack(void *unused) 2366{ 2367 struct gate_descriptor *new_idt; 2368 vm_offset_t tmp; 2369 2370 if (!has_f00f_bug) 2371 return; 2372 2373 GIANT_REQUIRED; 2374 2375 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 2376 2377 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 2378 if (tmp == 0) 2379 panic("kmem_alloc returned 0"); 2380 2381 /* Put the problematic entry (#6) at the end of the lower page. */ 2382 new_idt = (struct gate_descriptor*) 2383 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor)); 2384 bcopy(idt, new_idt, sizeof(idt0)); 2385 r_idt.rd_base = (u_int)new_idt; 2386 lidt(&r_idt); 2387 idt = new_idt; 2388 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 2389 VM_PROT_READ, FALSE) != KERN_SUCCESS) 2390 panic("vm_map_protect failed"); 2391} 2392#endif /* defined(I586_CPU) && !NO_F00F_HACK */ 2393 2394/* 2395 * Construct a PCB from a trapframe. This is called from kdb_trap() where 2396 * we want to start a backtrace from the function that caused us to enter 2397 * the debugger. We have the context in the trapframe, but base the trace 2398 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 2399 * enough for a backtrace. 2400 */ 2401void 2402makectx(struct trapframe *tf, struct pcb *pcb) 2403{ 2404 2405 pcb->pcb_edi = tf->tf_edi; 2406 pcb->pcb_esi = tf->tf_esi; 2407 pcb->pcb_ebp = tf->tf_ebp; 2408 pcb->pcb_ebx = tf->tf_ebx; 2409 pcb->pcb_eip = tf->tf_eip; 2410 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8; 2411} 2412 2413int 2414ptrace_set_pc(struct thread *td, u_long addr) 2415{ 2416 2417 td->td_frame->tf_eip = addr; 2418 return (0); 2419} 2420 2421int 2422ptrace_single_step(struct thread *td) 2423{ 2424 td->td_frame->tf_eflags |= PSL_T; 2425 return (0); 2426} 2427 2428int 2429ptrace_clear_single_step(struct thread *td) 2430{ 2431 td->td_frame->tf_eflags &= ~PSL_T; 2432 return (0); 2433} 2434 2435int 2436fill_regs(struct thread *td, struct reg *regs) 2437{ 2438 struct pcb *pcb; 2439 struct trapframe *tp; 2440 2441 tp = td->td_frame; 2442 pcb = td->td_pcb; 2443 regs->r_fs = tp->tf_fs; 2444 regs->r_es = tp->tf_es; 2445 regs->r_ds = tp->tf_ds; 2446 regs->r_edi = tp->tf_edi; 2447 regs->r_esi = tp->tf_esi; 2448 regs->r_ebp = tp->tf_ebp; 2449 regs->r_ebx = tp->tf_ebx; 2450 regs->r_edx = tp->tf_edx; 2451 regs->r_ecx = tp->tf_ecx; 2452 regs->r_eax = tp->tf_eax; 2453 regs->r_eip = tp->tf_eip; 2454 regs->r_cs = tp->tf_cs; 2455 regs->r_eflags = tp->tf_eflags; 2456 regs->r_esp = tp->tf_esp; 2457 regs->r_ss = tp->tf_ss; 2458 regs->r_gs = pcb->pcb_gs; 2459 return (0); 2460} 2461 2462int 2463set_regs(struct thread *td, struct reg *regs) 2464{ 2465 struct pcb *pcb; 2466 struct trapframe *tp; 2467 2468 tp = td->td_frame; 2469 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) || 2470 !CS_SECURE(regs->r_cs)) 2471 return (EINVAL); 2472 pcb = td->td_pcb; 2473 tp->tf_fs = regs->r_fs; 2474 tp->tf_es = regs->r_es; 2475 tp->tf_ds = regs->r_ds; 2476 tp->tf_edi = regs->r_edi; 2477 tp->tf_esi = regs->r_esi; 2478 tp->tf_ebp = regs->r_ebp; 2479 tp->tf_ebx = regs->r_ebx; 2480 tp->tf_edx = regs->r_edx; 2481 tp->tf_ecx = regs->r_ecx; 2482 tp->tf_eax = regs->r_eax; 2483 tp->tf_eip = regs->r_eip; 2484 tp->tf_cs = regs->r_cs; 2485 tp->tf_eflags = regs->r_eflags; 2486 tp->tf_esp = regs->r_esp; 2487 tp->tf_ss = regs->r_ss; 2488 pcb->pcb_gs = regs->r_gs; 2489 return (0); 2490} 2491 2492#ifdef CPU_ENABLE_SSE 2493static void 2494fill_fpregs_xmm(sv_xmm, sv_87) 2495 struct savexmm *sv_xmm; 2496 struct save87 *sv_87; 2497{ 2498 register struct env87 *penv_87 = &sv_87->sv_env; 2499 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2500 int i; 2501 2502 bzero(sv_87, sizeof(*sv_87)); 2503 2504 /* FPU control/status */ 2505 penv_87->en_cw = penv_xmm->en_cw; 2506 penv_87->en_sw = penv_xmm->en_sw; 2507 penv_87->en_tw = penv_xmm->en_tw; 2508 penv_87->en_fip = penv_xmm->en_fip; 2509 penv_87->en_fcs = penv_xmm->en_fcs; 2510 penv_87->en_opcode = penv_xmm->en_opcode; 2511 penv_87->en_foo = penv_xmm->en_foo; 2512 penv_87->en_fos = penv_xmm->en_fos; 2513 2514 /* FPU registers */ 2515 for (i = 0; i < 8; ++i) 2516 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 2517} 2518 2519static void 2520set_fpregs_xmm(sv_87, sv_xmm) 2521 struct save87 *sv_87; 2522 struct savexmm *sv_xmm; 2523{ 2524 register struct env87 *penv_87 = &sv_87->sv_env; 2525 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2526 int i; 2527 2528 /* FPU control/status */ 2529 penv_xmm->en_cw = penv_87->en_cw; 2530 penv_xmm->en_sw = penv_87->en_sw; 2531 penv_xmm->en_tw = penv_87->en_tw; 2532 penv_xmm->en_fip = penv_87->en_fip; 2533 penv_xmm->en_fcs = penv_87->en_fcs; 2534 penv_xmm->en_opcode = penv_87->en_opcode; 2535 penv_xmm->en_foo = penv_87->en_foo; 2536 penv_xmm->en_fos = penv_87->en_fos; 2537 2538 /* FPU registers */ 2539 for (i = 0; i < 8; ++i) 2540 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 2541} 2542#endif /* CPU_ENABLE_SSE */ 2543 2544int 2545fill_fpregs(struct thread *td, struct fpreg *fpregs) 2546{ 2547#ifdef CPU_ENABLE_SSE 2548 if (cpu_fxsr) { 2549 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm, 2550 (struct save87 *)fpregs); 2551 return (0); 2552 } 2553#endif /* CPU_ENABLE_SSE */ 2554 bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs); 2555 return (0); 2556} 2557 2558int 2559set_fpregs(struct thread *td, struct fpreg *fpregs) 2560{ 2561#ifdef CPU_ENABLE_SSE 2562 if (cpu_fxsr) { 2563 set_fpregs_xmm((struct save87 *)fpregs, 2564 &td->td_pcb->pcb_save.sv_xmm); 2565 return (0); 2566 } 2567#endif /* CPU_ENABLE_SSE */ 2568 bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs); 2569 return (0); 2570} 2571 2572/* 2573 * Get machine context. 2574 */ 2575int 2576get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 2577{ 2578 struct trapframe *tp; 2579 2580 tp = td->td_frame; 2581 2582 PROC_LOCK(curthread->td_proc); 2583 mcp->mc_onstack = sigonstack(tp->tf_esp); 2584 PROC_UNLOCK(curthread->td_proc); 2585 mcp->mc_gs = td->td_pcb->pcb_gs; 2586 mcp->mc_fs = tp->tf_fs; 2587 mcp->mc_es = tp->tf_es; 2588 mcp->mc_ds = tp->tf_ds; 2589 mcp->mc_edi = tp->tf_edi; 2590 mcp->mc_esi = tp->tf_esi; 2591 mcp->mc_ebp = tp->tf_ebp; 2592 mcp->mc_isp = tp->tf_isp; 2593 mcp->mc_eflags = tp->tf_eflags; 2594 if (flags & GET_MC_CLEAR_RET) { 2595 mcp->mc_eax = 0; 2596 mcp->mc_edx = 0; 2597 mcp->mc_eflags &= ~PSL_C; 2598 } else { 2599 mcp->mc_eax = tp->tf_eax; 2600 mcp->mc_edx = tp->tf_edx; 2601 } 2602 mcp->mc_ebx = tp->tf_ebx; 2603 mcp->mc_ecx = tp->tf_ecx; 2604 mcp->mc_eip = tp->tf_eip; 2605 mcp->mc_cs = tp->tf_cs; 2606 mcp->mc_esp = tp->tf_esp; 2607 mcp->mc_ss = tp->tf_ss; 2608 mcp->mc_len = sizeof(*mcp); 2609 get_fpcontext(td, mcp); 2610 return (0); 2611} 2612 2613/* 2614 * Set machine context. 2615 * 2616 * However, we don't set any but the user modifiable flags, and we won't 2617 * touch the cs selector. 2618 */ 2619int 2620set_mcontext(struct thread *td, const mcontext_t *mcp) 2621{ 2622 struct trapframe *tp; 2623 int eflags, ret; 2624 2625 tp = td->td_frame; 2626 if (mcp->mc_len != sizeof(*mcp)) 2627 return (EINVAL); 2628 eflags = (mcp->mc_eflags & PSL_USERCHANGE) | 2629 (tp->tf_eflags & ~PSL_USERCHANGE); 2630 if ((ret = set_fpcontext(td, mcp)) == 0) { 2631 tp->tf_fs = mcp->mc_fs; 2632 tp->tf_es = mcp->mc_es; 2633 tp->tf_ds = mcp->mc_ds; 2634 tp->tf_edi = mcp->mc_edi; 2635 tp->tf_esi = mcp->mc_esi; 2636 tp->tf_ebp = mcp->mc_ebp; 2637 tp->tf_ebx = mcp->mc_ebx; 2638 tp->tf_edx = mcp->mc_edx; 2639 tp->tf_ecx = mcp->mc_ecx; 2640 tp->tf_eax = mcp->mc_eax; 2641 tp->tf_eip = mcp->mc_eip; 2642 tp->tf_eflags = eflags; 2643 tp->tf_esp = mcp->mc_esp; 2644 tp->tf_ss = mcp->mc_ss; 2645 td->td_pcb->pcb_gs = mcp->mc_gs; 2646 ret = 0; 2647 } 2648 return (ret); 2649} 2650 2651static void 2652get_fpcontext(struct thread *td, mcontext_t *mcp) 2653{ 2654#ifndef DEV_NPX 2655 mcp->mc_fpformat = _MC_FPFMT_NODEV; 2656 mcp->mc_ownedfp = _MC_FPOWNED_NONE; 2657#else 2658 union savefpu *addr; 2659 2660 /* 2661 * XXX mc_fpstate might be misaligned, since its declaration is not 2662 * unportabilized using __attribute__((aligned(16))) like the 2663 * declaration of struct savemm, and anyway, alignment doesn't work 2664 * for auto variables since we don't use gcc's pessimal stack 2665 * alignment. Work around this by abusing the spare fields after 2666 * mcp->mc_fpstate. 2667 * 2668 * XXX unpessimize most cases by only aligning when fxsave might be 2669 * called, although this requires knowing too much about 2670 * npxgetregs()'s internals. 2671 */ 2672 addr = (union savefpu *)&mcp->mc_fpstate; 2673 if (td == PCPU_GET(fpcurthread) && 2674#ifdef CPU_ENABLE_SSE 2675 cpu_fxsr && 2676#endif 2677 ((uintptr_t)(void *)addr & 0xF)) { 2678 do 2679 addr = (void *)((char *)addr + 4); 2680 while ((uintptr_t)(void *)addr & 0xF); 2681 } 2682 mcp->mc_ownedfp = npxgetregs(td, addr); 2683 if (addr != (union savefpu *)&mcp->mc_fpstate) { 2684 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate)); 2685 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2)); 2686 } 2687 mcp->mc_fpformat = npxformat(); 2688#endif 2689} 2690 2691static int 2692set_fpcontext(struct thread *td, const mcontext_t *mcp) 2693{ 2694 union savefpu *addr; 2695 2696 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 2697 return (0); 2698 else if (mcp->mc_fpformat != _MC_FPFMT_387 && 2699 mcp->mc_fpformat != _MC_FPFMT_XMM) 2700 return (EINVAL); 2701 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 2702 /* We don't care what state is left in the FPU or PCB. */ 2703 fpstate_drop(td); 2704 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 2705 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 2706 /* XXX align as above. */ 2707 addr = (union savefpu *)&mcp->mc_fpstate; 2708 if (td == PCPU_GET(fpcurthread) && 2709#ifdef CPU_ENABLE_SSE 2710 cpu_fxsr && 2711#endif 2712 ((uintptr_t)(void *)addr & 0xF)) { 2713 do 2714 addr = (void *)((char *)addr + 4); 2715 while ((uintptr_t)(void *)addr & 0xF); 2716 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate)); 2717 } 2718#ifdef DEV_NPX 2719#ifdef CPU_ENABLE_SSE 2720 if (cpu_fxsr) 2721 addr->sv_xmm.sv_env.en_mxcsr &= cpu_mxcsr_mask; 2722#endif 2723 /* 2724 * XXX we violate the dubious requirement that npxsetregs() 2725 * be called with interrupts disabled. 2726 */ 2727 npxsetregs(td, addr); 2728#endif 2729 /* 2730 * Don't bother putting things back where they were in the 2731 * misaligned case, since we know that the caller won't use 2732 * them again. 2733 */ 2734 } else 2735 return (EINVAL); 2736 return (0); 2737} 2738 2739static void 2740fpstate_drop(struct thread *td) 2741{ 2742 register_t s; 2743 2744 s = intr_disable(); 2745#ifdef DEV_NPX 2746 if (PCPU_GET(fpcurthread) == td) 2747 npxdrop(); 2748#endif 2749 /* 2750 * XXX force a full drop of the npx. The above only drops it if we 2751 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case. 2752 * 2753 * XXX I don't much like npxgetregs()'s semantics of doing a full 2754 * drop. Dropping only to the pcb matches fnsave's behaviour. 2755 * We only need to drop to !PCB_INITDONE in sendsig(). But 2756 * sendsig() is the only caller of npxgetregs()... perhaps we just 2757 * have too many layers. 2758 */ 2759 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE; 2760 intr_restore(s); 2761} 2762 2763int 2764fill_dbregs(struct thread *td, struct dbreg *dbregs) 2765{ 2766 struct pcb *pcb; 2767 2768 if (td == NULL) { 2769 dbregs->dr[0] = rdr0(); 2770 dbregs->dr[1] = rdr1(); 2771 dbregs->dr[2] = rdr2(); 2772 dbregs->dr[3] = rdr3(); 2773 dbregs->dr[4] = rdr4(); 2774 dbregs->dr[5] = rdr5(); 2775 dbregs->dr[6] = rdr6(); 2776 dbregs->dr[7] = rdr7(); 2777 } else { 2778 pcb = td->td_pcb; 2779 dbregs->dr[0] = pcb->pcb_dr0; 2780 dbregs->dr[1] = pcb->pcb_dr1; 2781 dbregs->dr[2] = pcb->pcb_dr2; 2782 dbregs->dr[3] = pcb->pcb_dr3; 2783 dbregs->dr[4] = 0; 2784 dbregs->dr[5] = 0; 2785 dbregs->dr[6] = pcb->pcb_dr6; 2786 dbregs->dr[7] = pcb->pcb_dr7; 2787 } 2788 return (0); 2789} 2790 2791int 2792set_dbregs(struct thread *td, struct dbreg *dbregs) 2793{ 2794 struct pcb *pcb; 2795 int i; 2796 u_int32_t mask1, mask2; 2797 2798 if (td == NULL) { 2799 load_dr0(dbregs->dr[0]); 2800 load_dr1(dbregs->dr[1]); 2801 load_dr2(dbregs->dr[2]); 2802 load_dr3(dbregs->dr[3]); 2803 load_dr4(dbregs->dr[4]); 2804 load_dr5(dbregs->dr[5]); 2805 load_dr6(dbregs->dr[6]); 2806 load_dr7(dbregs->dr[7]); 2807 } else { 2808 /* 2809 * Don't let an illegal value for dr7 get set. Specifically, 2810 * check for undefined settings. Setting these bit patterns 2811 * result in undefined behaviour and can lead to an unexpected 2812 * TRCTRAP. 2813 */ 2814 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8; 2815 i++, mask1 <<= 2, mask2 <<= 2) 2816 if ((dbregs->dr[7] & mask1) == mask2) 2817 return (EINVAL); 2818 2819 pcb = td->td_pcb; 2820 2821 /* 2822 * Don't let a process set a breakpoint that is not within the 2823 * process's address space. If a process could do this, it 2824 * could halt the system by setting a breakpoint in the kernel 2825 * (if ddb was enabled). Thus, we need to check to make sure 2826 * that no breakpoints are being enabled for addresses outside 2827 * process's address space. 2828 * 2829 * XXX - what about when the watched area of the user's 2830 * address space is written into from within the kernel 2831 * ... wouldn't that still cause a breakpoint to be generated 2832 * from within kernel mode? 2833 */ 2834 2835 if (dbregs->dr[7] & 0x3) { 2836 /* dr0 is enabled */ 2837 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 2838 return (EINVAL); 2839 } 2840 2841 if (dbregs->dr[7] & (0x3<<2)) { 2842 /* dr1 is enabled */ 2843 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 2844 return (EINVAL); 2845 } 2846 2847 if (dbregs->dr[7] & (0x3<<4)) { 2848 /* dr2 is enabled */ 2849 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 2850 return (EINVAL); 2851 } 2852 2853 if (dbregs->dr[7] & (0x3<<6)) { 2854 /* dr3 is enabled */ 2855 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 2856 return (EINVAL); 2857 } 2858 2859 pcb->pcb_dr0 = dbregs->dr[0]; 2860 pcb->pcb_dr1 = dbregs->dr[1]; 2861 pcb->pcb_dr2 = dbregs->dr[2]; 2862 pcb->pcb_dr3 = dbregs->dr[3]; 2863 pcb->pcb_dr6 = dbregs->dr[6]; 2864 pcb->pcb_dr7 = dbregs->dr[7]; 2865 2866 pcb->pcb_flags |= PCB_DBREGS; 2867 } 2868 2869 return (0); 2870} 2871 2872/* 2873 * Return > 0 if a hardware breakpoint has been hit, and the 2874 * breakpoint was in user space. Return 0, otherwise. 2875 */ 2876int 2877user_dbreg_trap(void) 2878{ 2879 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */ 2880 u_int32_t bp; /* breakpoint bits extracted from dr6 */ 2881 int nbp; /* number of breakpoints that triggered */ 2882 caddr_t addr[4]; /* breakpoint addresses */ 2883 int i; 2884 2885 dr7 = rdr7(); 2886 if ((dr7 & 0x000000ff) == 0) { 2887 /* 2888 * all GE and LE bits in the dr7 register are zero, 2889 * thus the trap couldn't have been caused by the 2890 * hardware debug registers 2891 */ 2892 return 0; 2893 } 2894 2895 nbp = 0; 2896 dr6 = rdr6(); 2897 bp = dr6 & 0x0000000f; 2898 2899 if (!bp) { 2900 /* 2901 * None of the breakpoint bits are set meaning this 2902 * trap was not caused by any of the debug registers 2903 */ 2904 return 0; 2905 } 2906 2907 /* 2908 * at least one of the breakpoints were hit, check to see 2909 * which ones and if any of them are user space addresses 2910 */ 2911 2912 if (bp & 0x01) { 2913 addr[nbp++] = (caddr_t)rdr0(); 2914 } 2915 if (bp & 0x02) { 2916 addr[nbp++] = (caddr_t)rdr1(); 2917 } 2918 if (bp & 0x04) { 2919 addr[nbp++] = (caddr_t)rdr2(); 2920 } 2921 if (bp & 0x08) { 2922 addr[nbp++] = (caddr_t)rdr3(); 2923 } 2924 2925 for (i=0; i<nbp; i++) { 2926 if (addr[i] < 2927 (caddr_t)VM_MAXUSER_ADDRESS) { 2928 /* 2929 * addr[i] is in user space 2930 */ 2931 return nbp; 2932 } 2933 } 2934 2935 /* 2936 * None of the breakpoints are in user space. 2937 */ 2938 return 0; 2939} 2940 2941#ifndef DEV_APIC 2942#include <machine/apicvar.h> 2943 2944/* 2945 * Provide stub functions so that the MADT APIC enumerator in the acpi 2946 * kernel module will link against a kernel without 'device apic'. 2947 * 2948 * XXX - This is a gross hack. 2949 */ 2950void 2951apic_register_enumerator(struct apic_enumerator *enumerator) 2952{ 2953} 2954 2955void * 2956ioapic_create(uintptr_t addr, int32_t id, int intbase) 2957{ 2958 return (NULL); 2959} 2960 2961int 2962ioapic_disable_pin(void *cookie, u_int pin) 2963{ 2964 return (ENXIO); 2965} 2966 2967int 2968ioapic_get_vector(void *cookie, u_int pin) 2969{ 2970 return (-1); 2971} 2972 2973void 2974ioapic_register(void *cookie) 2975{ 2976} 2977 2978int 2979ioapic_remap_vector(void *cookie, u_int pin, int vector) 2980{ 2981 return (ENXIO); 2982} 2983 2984int 2985ioapic_set_extint(void *cookie, u_int pin) 2986{ 2987 return (ENXIO); 2988} 2989 2990int 2991ioapic_set_nmi(void *cookie, u_int pin) 2992{ 2993 return (ENXIO); 2994} 2995 2996int 2997ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol) 2998{ 2999 return (ENXIO); 3000} 3001 3002int 3003ioapic_set_triggermode(void *cookie, u_int pin, enum intr_trigger trigger) 3004{ 3005 return (ENXIO); 3006} 3007 3008void 3009lapic_create(u_int apic_id, int boot_cpu) 3010{ 3011} 3012 3013void 3014lapic_init(uintptr_t addr) 3015{ 3016} 3017 3018int 3019lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode) 3020{ 3021 return (ENXIO); 3022} 3023 3024int 3025lapic_set_lvt_polarity(u_int apic_id, u_int lvt, enum intr_polarity pol) 3026{ 3027 return (ENXIO); 3028} 3029 3030int 3031lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, enum intr_trigger trigger) 3032{ 3033 return (ENXIO); 3034} 3035#endif 3036 3037#ifdef KDB 3038 3039/* 3040 * Provide inb() and outb() as functions. They are normally only 3041 * available as macros calling inlined functions, thus cannot be 3042 * called from the debugger. 3043 * 3044 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 3045 */ 3046 3047#undef inb 3048#undef outb 3049 3050/* silence compiler warnings */ 3051u_char inb(u_int); 3052void outb(u_int, u_char); 3053 3054u_char 3055inb(u_int port) 3056{ 3057 u_char data; 3058 /* 3059 * We use %%dx and not %1 here because i/o is done at %dx and not at 3060 * %edx, while gcc generates inferior code (movw instead of movl) 3061 * if we tell it to load (u_short) port. 3062 */ 3063 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 3064 return (data); 3065} 3066 3067void 3068outb(u_int port, u_char data) 3069{ 3070 u_char al; 3071 /* 3072 * Use an unnecessary assignment to help gcc's register allocator. 3073 * This make a large difference for gcc-1.40 and a tiny difference 3074 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 3075 * best results. gcc-2.6.0 can't handle this. 3076 */ 3077 al = data; 3078 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 3079} 3080 3081#endif /* KDB */ 3082