machdep.c revision 117600
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 */ 39 40#include <sys/cdefs.h> 41__FBSDID("$FreeBSD: head/sys/i386/i386/machdep.c 117600 2003-07-15 00:11:04Z davidxu $"); 42 43#include "opt_atalk.h" 44#include "opt_compat.h" 45#include "opt_cpu.h" 46#include "opt_ddb.h" 47#include "opt_inet.h" 48#include "opt_ipx.h" 49#include "opt_isa.h" 50#include "opt_maxmem.h" 51#include "opt_msgbuf.h" 52#include "opt_npx.h" 53#include "opt_perfmon.h" 54#include "opt_kstack_pages.h" 55 56#include <sys/param.h> 57#include <sys/systm.h> 58#include <sys/sysproto.h> 59#include <sys/signalvar.h> 60#include <sys/imgact.h> 61#include <sys/kernel.h> 62#include <sys/ktr.h> 63#include <sys/linker.h> 64#include <sys/lock.h> 65#include <sys/malloc.h> 66#include <sys/mutex.h> 67#include <sys/pcpu.h> 68#include <sys/proc.h> 69#include <sys/bio.h> 70#include <sys/buf.h> 71#include <sys/reboot.h> 72#include <sys/callout.h> 73#include <sys/msgbuf.h> 74#include <sys/sched.h> 75#include <sys/sysent.h> 76#include <sys/sysctl.h> 77#include <sys/ucontext.h> 78#include <sys/vmmeter.h> 79#include <sys/bus.h> 80#include <sys/eventhandler.h> 81 82#include <vm/vm.h> 83#include <vm/vm_param.h> 84#include <vm/vm_kern.h> 85#include <vm/vm_object.h> 86#include <vm/vm_page.h> 87#include <vm/vm_map.h> 88#include <vm/vm_pager.h> 89#include <vm/vm_extern.h> 90 91#include <sys/user.h> 92#include <sys/exec.h> 93#include <sys/cons.h> 94 95#include <ddb/ddb.h> 96 97#include <net/netisr.h> 98 99#include <machine/cpu.h> 100#include <machine/cputypes.h> 101#include <machine/reg.h> 102#include <machine/clock.h> 103#include <machine/specialreg.h> 104#include <machine/bootinfo.h> 105#include <machine/md_var.h> 106#include <machine/pc/bios.h> 107#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */ 108#include <machine/proc.h> 109#ifdef PERFMON 110#include <machine/perfmon.h> 111#endif 112#ifdef SMP 113#include <machine/privatespace.h> 114#include <machine/smp.h> 115#endif 116 117#include <i386/isa/icu.h> 118#include <i386/isa/intr_machdep.h> 119#include <isa/rtc.h> 120#include <machine/vm86.h> 121#include <sys/ptrace.h> 122#include <machine/sigframe.h> 123 124extern void init386(int first); 125extern void dblfault_handler(void); 126 127extern void printcpuinfo(void); /* XXX header file */ 128extern void finishidentcpu(void); 129extern void panicifcpuunsupported(void); 130extern void initializecpu(void); 131 132#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 133#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 134 135#if !defined(CPU_ENABLE_SSE) && defined(I686_CPU) 136#define CPU_ENABLE_SSE 137#endif 138#if defined(CPU_DISABLE_SSE) 139#undef CPU_ENABLE_SSE 140#endif 141 142static void cpu_startup(void *); 143static void fpstate_drop(struct thread *td); 144static void get_fpcontext(struct thread *td, mcontext_t *mcp); 145static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 146#ifdef CPU_ENABLE_SSE 147static void set_fpregs_xmm(struct save87 *, struct savexmm *); 148static void fill_fpregs_xmm(struct savexmm *, struct save87 *); 149#endif /* CPU_ENABLE_SSE */ 150SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 151 152int _udatasel, _ucodesel; 153u_int atdevbase; 154 155int cold = 1; 156 157#ifdef COMPAT_43 158static void osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code); 159#endif 160#ifdef COMPAT_FREEBSD4 161static void freebsd4_sendsig(sig_t catcher, int sig, sigset_t *mask, 162 u_long code); 163#endif 164 165long Maxmem = 0; 166 167vm_paddr_t phys_avail[10]; 168 169/* must be 2 less so 0 0 can signal end of chunks */ 170#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 171 172struct kva_md_info kmi; 173 174static struct trapframe proc0_tf; 175#ifndef SMP 176static struct pcpu __pcpu; 177#endif 178 179struct mtx icu_lock; 180 181static void 182cpu_startup(dummy) 183 void *dummy; 184{ 185 /* 186 * Good {morning,afternoon,evening,night}. 187 */ 188 startrtclock(); 189 printcpuinfo(); 190 panicifcpuunsupported(); 191#ifdef PERFMON 192 perfmon_init(); 193#endif 194 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem), 195 ptoa((uintmax_t)Maxmem) / 1048576); 196 /* 197 * Display any holes after the first chunk of extended memory. 198 */ 199 if (bootverbose) { 200 int indx; 201 202 printf("Physical memory chunk(s):\n"); 203 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 204 vm_paddr_t size; 205 206 size = phys_avail[indx + 1] - phys_avail[indx]; 207 printf( 208 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 209 (uintmax_t)phys_avail[indx], 210 (uintmax_t)phys_avail[indx + 1] - 1, 211 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 212 } 213 } 214 215 vm_ksubmap_init(&kmi); 216 217 printf("avail memory = %ju (%ju MB)\n", 218 ptoa((uintmax_t)cnt.v_free_count), 219 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 220 221 /* 222 * Set up buffers, so they can be used to read disk labels. 223 */ 224 bufinit(); 225 vm_pager_bufferinit(); 226 227#ifndef SMP 228 /* For SMP, we delay the cpu_setregs() until after SMP startup. */ 229 cpu_setregs(); 230#endif 231} 232 233/* 234 * Send an interrupt to process. 235 * 236 * Stack is set up to allow sigcode stored 237 * at top to call routine, followed by kcall 238 * to sigreturn routine below. After sigreturn 239 * resets the signal mask, the stack, and the 240 * frame pointer, it returns to the user 241 * specified pc, psl. 242 */ 243#ifdef COMPAT_43 244static void 245osendsig(catcher, sig, mask, code) 246 sig_t catcher; 247 int sig; 248 sigset_t *mask; 249 u_long code; 250{ 251 struct osigframe sf, *fp; 252 struct proc *p; 253 struct thread *td; 254 struct sigacts *psp; 255 struct trapframe *regs; 256 int oonstack; 257 258 td = curthread; 259 p = td->td_proc; 260 PROC_LOCK_ASSERT(p, MA_OWNED); 261 psp = p->p_sigacts; 262 mtx_assert(&psp->ps_mtx, MA_OWNED); 263 regs = td->td_frame; 264 oonstack = sigonstack(regs->tf_esp); 265 266 /* Allocate space for the signal handler context. */ 267 if ((p->p_flag & P_ALTSTACK) && !oonstack && 268 SIGISMEMBER(psp->ps_sigonstack, sig)) { 269 fp = (struct osigframe *)(p->p_sigstk.ss_sp + 270 p->p_sigstk.ss_size - sizeof(struct osigframe)); 271#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 272 p->p_sigstk.ss_flags |= SS_ONSTACK; 273#endif 274 } else 275 fp = (struct osigframe *)regs->tf_esp - 1; 276 277 /* Translate the signal if appropriate. */ 278 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 279 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 280 281 /* Build the argument list for the signal handler. */ 282 sf.sf_signum = sig; 283 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc; 284 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 285 /* Signal handler installed with SA_SIGINFO. */ 286 sf.sf_arg2 = (register_t)&fp->sf_siginfo; 287 sf.sf_siginfo.si_signo = sig; 288 sf.sf_siginfo.si_code = code; 289 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher; 290 } else { 291 /* Old FreeBSD-style arguments. */ 292 sf.sf_arg2 = code; 293 sf.sf_addr = regs->tf_err; 294 sf.sf_ahu.sf_handler = catcher; 295 } 296 mtx_unlock(&psp->ps_mtx); 297 PROC_UNLOCK(p); 298 299 /* Save most if not all of trap frame. */ 300 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax; 301 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx; 302 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx; 303 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx; 304 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi; 305 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi; 306 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs; 307 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds; 308 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss; 309 sf.sf_siginfo.si_sc.sc_es = regs->tf_es; 310 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs; 311 sf.sf_siginfo.si_sc.sc_gs = rgs(); 312 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp; 313 314 /* Build the signal context to be used by osigreturn(). */ 315 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0; 316 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask); 317 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp; 318 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp; 319 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip; 320 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags; 321 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno; 322 sf.sf_siginfo.si_sc.sc_err = regs->tf_err; 323 324 /* 325 * If we're a vm86 process, we want to save the segment registers. 326 * We also change eflags to be our emulated eflags, not the actual 327 * eflags. 328 */ 329 if (regs->tf_eflags & PSL_VM) { 330 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */ 331 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 332 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 333 334 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs; 335 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs; 336 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es; 337 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds; 338 339 if (vm86->vm86_has_vme == 0) 340 sf.sf_siginfo.si_sc.sc_ps = 341 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 342 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 343 344 /* See sendsig() for comments. */ 345 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 346 } 347 348 /* 349 * Copy the sigframe out to the user's stack. 350 */ 351 if (copyout(&sf, fp, sizeof(*fp)) != 0) { 352#ifdef DEBUG 353 printf("process %ld has trashed its stack\n", (long)p->p_pid); 354#endif 355 PROC_LOCK(p); 356 sigexit(td, SIGILL); 357 } 358 359 regs->tf_esp = (int)fp; 360 regs->tf_eip = PS_STRINGS - szosigcode; 361 regs->tf_eflags &= ~PSL_T; 362 regs->tf_cs = _ucodesel; 363 regs->tf_ds = _udatasel; 364 regs->tf_es = _udatasel; 365 regs->tf_fs = _udatasel; 366 load_gs(_udatasel); 367 regs->tf_ss = _udatasel; 368 PROC_LOCK(p); 369 mtx_lock(&psp->ps_mtx); 370} 371#endif /* COMPAT_43 */ 372 373#ifdef COMPAT_FREEBSD4 374static void 375freebsd4_sendsig(catcher, sig, mask, code) 376 sig_t catcher; 377 int sig; 378 sigset_t *mask; 379 u_long code; 380{ 381 struct sigframe4 sf, *sfp; 382 struct proc *p; 383 struct thread *td; 384 struct sigacts *psp; 385 struct trapframe *regs; 386 int oonstack; 387 388 td = curthread; 389 p = td->td_proc; 390 PROC_LOCK_ASSERT(p, MA_OWNED); 391 psp = p->p_sigacts; 392 mtx_assert(&psp->ps_mtx, MA_OWNED); 393 regs = td->td_frame; 394 oonstack = sigonstack(regs->tf_esp); 395 396 /* Save user context. */ 397 bzero(&sf, sizeof(sf)); 398 sf.sf_uc.uc_sigmask = *mask; 399 sf.sf_uc.uc_stack = p->p_sigstk; 400 sf.sf_uc.uc_stack.ss_flags = (p->p_flag & P_ALTSTACK) 401 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 402 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 403 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 404 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 405 406 /* Allocate space for the signal handler context. */ 407 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack && 408 SIGISMEMBER(psp->ps_sigonstack, sig)) { 409 sfp = (struct sigframe4 *)(p->p_sigstk.ss_sp + 410 p->p_sigstk.ss_size - sizeof(struct sigframe4)); 411#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 412 p->p_sigstk.ss_flags |= SS_ONSTACK; 413#endif 414 } else 415 sfp = (struct sigframe4 *)regs->tf_esp - 1; 416 417 /* Translate the signal if appropriate. */ 418 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 419 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 420 421 /* Build the argument list for the signal handler. */ 422 sf.sf_signum = sig; 423 sf.sf_ucontext = (register_t)&sfp->sf_uc; 424 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 425 /* Signal handler installed with SA_SIGINFO. */ 426 sf.sf_siginfo = (register_t)&sfp->sf_si; 427 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 428 429 /* Fill in POSIX parts */ 430 sf.sf_si.si_signo = sig; 431 sf.sf_si.si_code = code; 432 sf.sf_si.si_addr = (void *)regs->tf_err; 433 } else { 434 /* Old FreeBSD-style arguments. */ 435 sf.sf_siginfo = code; 436 sf.sf_addr = regs->tf_err; 437 sf.sf_ahu.sf_handler = catcher; 438 } 439 mtx_unlock(&psp->ps_mtx); 440 PROC_UNLOCK(p); 441 442 /* 443 * If we're a vm86 process, we want to save the segment registers. 444 * We also change eflags to be our emulated eflags, not the actual 445 * eflags. 446 */ 447 if (regs->tf_eflags & PSL_VM) { 448 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 449 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 450 451 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 452 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 453 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 454 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 455 456 if (vm86->vm86_has_vme == 0) 457 sf.sf_uc.uc_mcontext.mc_eflags = 458 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 459 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 460 461 /* 462 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 463 * syscalls made by the signal handler. This just avoids 464 * wasting time for our lazy fixup of such faults. PSL_NT 465 * does nothing in vm86 mode, but vm86 programs can set it 466 * almost legitimately in probes for old cpu types. 467 */ 468 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 469 } 470 471 /* 472 * Copy the sigframe out to the user's stack. 473 */ 474 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 475#ifdef DEBUG 476 printf("process %ld has trashed its stack\n", (long)p->p_pid); 477#endif 478 PROC_LOCK(p); 479 sigexit(td, SIGILL); 480 } 481 482 regs->tf_esp = (int)sfp; 483 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode; 484 regs->tf_eflags &= ~PSL_T; 485 regs->tf_cs = _ucodesel; 486 regs->tf_ds = _udatasel; 487 regs->tf_es = _udatasel; 488 regs->tf_fs = _udatasel; 489 regs->tf_ss = _udatasel; 490 PROC_LOCK(p); 491 mtx_lock(&psp->ps_mtx); 492} 493#endif /* COMPAT_FREEBSD4 */ 494 495void 496sendsig(catcher, sig, mask, code) 497 sig_t catcher; 498 int sig; 499 sigset_t *mask; 500 u_long code; 501{ 502 struct sigframe sf, *sfp; 503 struct proc *p; 504 struct thread *td; 505 struct sigacts *psp; 506 char *sp; 507 struct trapframe *regs; 508 int oonstack; 509 510 td = curthread; 511 p = td->td_proc; 512 PROC_LOCK_ASSERT(p, MA_OWNED); 513 psp = p->p_sigacts; 514 mtx_assert(&psp->ps_mtx, MA_OWNED); 515#ifdef COMPAT_FREEBSD4 516 if (SIGISMEMBER(psp->ps_freebsd4, sig)) { 517 freebsd4_sendsig(catcher, sig, mask, code); 518 return; 519 } 520#endif 521#ifdef COMPAT_43 522 if (SIGISMEMBER(psp->ps_osigset, sig)) { 523 osendsig(catcher, sig, mask, code); 524 return; 525 } 526#endif 527 regs = td->td_frame; 528 oonstack = sigonstack(regs->tf_esp); 529 530 /* Save user context. */ 531 bzero(&sf, sizeof(sf)); 532 sf.sf_uc.uc_sigmask = *mask; 533 sf.sf_uc.uc_stack = p->p_sigstk; 534 sf.sf_uc.uc_stack.ss_flags = (p->p_flag & P_ALTSTACK) 535 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 536 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 537 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 538 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 539 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 540 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 541 fpstate_drop(td); 542 543 /* Allocate space for the signal handler context. */ 544 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack && 545 SIGISMEMBER(psp->ps_sigonstack, sig)) { 546 sp = p->p_sigstk.ss_sp + 547 p->p_sigstk.ss_size - sizeof(struct sigframe); 548#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 549 p->p_sigstk.ss_flags |= SS_ONSTACK; 550#endif 551 } else 552 sp = (char *)regs->tf_esp - sizeof(struct sigframe); 553 /* Align to 16 bytes. */ 554 sfp = (struct sigframe *)((unsigned int)sp & ~0xF); 555 556 /* Translate the signal if appropriate. */ 557 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 558 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 559 560 /* Build the argument list for the signal handler. */ 561 sf.sf_signum = sig; 562 sf.sf_ucontext = (register_t)&sfp->sf_uc; 563 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 564 /* Signal handler installed with SA_SIGINFO. */ 565 sf.sf_siginfo = (register_t)&sfp->sf_si; 566 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 567 568 /* Fill in POSIX parts */ 569 sf.sf_si.si_signo = sig; 570 sf.sf_si.si_code = code; 571 sf.sf_si.si_addr = (void *)regs->tf_err; 572 } else { 573 /* Old FreeBSD-style arguments. */ 574 sf.sf_siginfo = code; 575 sf.sf_addr = regs->tf_err; 576 sf.sf_ahu.sf_handler = catcher; 577 } 578 mtx_unlock(&psp->ps_mtx); 579 PROC_UNLOCK(p); 580 581 /* 582 * If we're a vm86 process, we want to save the segment registers. 583 * We also change eflags to be our emulated eflags, not the actual 584 * eflags. 585 */ 586 if (regs->tf_eflags & PSL_VM) { 587 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 588 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 589 590 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 591 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 592 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 593 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 594 595 if (vm86->vm86_has_vme == 0) 596 sf.sf_uc.uc_mcontext.mc_eflags = 597 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 598 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 599 600 /* 601 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 602 * syscalls made by the signal handler. This just avoids 603 * wasting time for our lazy fixup of such faults. PSL_NT 604 * does nothing in vm86 mode, but vm86 programs can set it 605 * almost legitimately in probes for old cpu types. 606 */ 607 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 608 } 609 610 /* 611 * Copy the sigframe out to the user's stack. 612 */ 613 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 614#ifdef DEBUG 615 printf("process %ld has trashed its stack\n", (long)p->p_pid); 616#endif 617 PROC_LOCK(p); 618 sigexit(td, SIGILL); 619 } 620 621 regs->tf_esp = (int)sfp; 622 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 623 regs->tf_eflags &= ~PSL_T; 624 regs->tf_cs = _ucodesel; 625 regs->tf_ds = _udatasel; 626 regs->tf_es = _udatasel; 627 regs->tf_fs = _udatasel; 628 regs->tf_ss = _udatasel; 629 PROC_LOCK(p); 630 mtx_lock(&psp->ps_mtx); 631} 632 633/* 634 * Build siginfo_t for SA thread 635 */ 636void 637cpu_thread_siginfo(int sig, u_long code, siginfo_t *si) 638{ 639 struct proc *p; 640 struct thread *td; 641 642 td = curthread; 643 p = td->td_proc; 644 PROC_LOCK_ASSERT(p, MA_OWNED); 645 646 bzero(si, sizeof(*si)); 647 si->si_signo = sig; 648 si->si_code = code; 649 si->si_addr = (void *)td->td_frame->tf_err; 650 /* XXXKSE fill other fields */ 651} 652 653/* 654 * System call to cleanup state after a signal 655 * has been taken. Reset signal mask and 656 * stack state from context left by sendsig (above). 657 * Return to previous pc and psl as specified by 658 * context left by sendsig. Check carefully to 659 * make sure that the user has not modified the 660 * state to gain improper privileges. 661 * 662 * MPSAFE 663 */ 664#ifdef COMPAT_43 665int 666osigreturn(td, uap) 667 struct thread *td; 668 struct osigreturn_args /* { 669 struct osigcontext *sigcntxp; 670 } */ *uap; 671{ 672 struct osigcontext sc; 673 struct trapframe *regs; 674 struct osigcontext *scp; 675 struct proc *p = td->td_proc; 676 int eflags, error; 677 678 regs = td->td_frame; 679 error = copyin(uap->sigcntxp, &sc, sizeof(sc)); 680 if (error != 0) 681 return (error); 682 scp = ≻ 683 eflags = scp->sc_ps; 684 if (eflags & PSL_VM) { 685 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 686 struct vm86_kernel *vm86; 687 688 /* 689 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 690 * set up the vm86 area, and we can't enter vm86 mode. 691 */ 692 if (td->td_pcb->pcb_ext == 0) 693 return (EINVAL); 694 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 695 if (vm86->vm86_inited == 0) 696 return (EINVAL); 697 698 /* Go back to user mode if both flags are set. */ 699 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 700 trapsignal(td, SIGBUS, 0); 701 702 if (vm86->vm86_has_vme) { 703 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 704 (eflags & VME_USERCHANGE) | PSL_VM; 705 } else { 706 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 707 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 708 (eflags & VM_USERCHANGE) | PSL_VM; 709 } 710 tf->tf_vm86_ds = scp->sc_ds; 711 tf->tf_vm86_es = scp->sc_es; 712 tf->tf_vm86_fs = scp->sc_fs; 713 tf->tf_vm86_gs = scp->sc_gs; 714 tf->tf_ds = _udatasel; 715 tf->tf_es = _udatasel; 716 tf->tf_fs = _udatasel; 717 } else { 718 /* 719 * Don't allow users to change privileged or reserved flags. 720 */ 721 /* 722 * XXX do allow users to change the privileged flag PSL_RF. 723 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 724 * should sometimes set it there too. tf_eflags is kept in 725 * the signal context during signal handling and there is no 726 * other place to remember it, so the PSL_RF bit may be 727 * corrupted by the signal handler without us knowing. 728 * Corruption of the PSL_RF bit at worst causes one more or 729 * one less debugger trap, so allowing it is fairly harmless. 730 */ 731 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 732 return (EINVAL); 733 } 734 735 /* 736 * Don't allow users to load a valid privileged %cs. Let the 737 * hardware check for invalid selectors, excess privilege in 738 * other selectors, invalid %eip's and invalid %esp's. 739 */ 740 if (!CS_SECURE(scp->sc_cs)) { 741 trapsignal(td, SIGBUS, T_PROTFLT); 742 return (EINVAL); 743 } 744 regs->tf_ds = scp->sc_ds; 745 regs->tf_es = scp->sc_es; 746 regs->tf_fs = scp->sc_fs; 747 } 748 749 /* Restore remaining registers. */ 750 regs->tf_eax = scp->sc_eax; 751 regs->tf_ebx = scp->sc_ebx; 752 regs->tf_ecx = scp->sc_ecx; 753 regs->tf_edx = scp->sc_edx; 754 regs->tf_esi = scp->sc_esi; 755 regs->tf_edi = scp->sc_edi; 756 regs->tf_cs = scp->sc_cs; 757 regs->tf_ss = scp->sc_ss; 758 regs->tf_isp = scp->sc_isp; 759 regs->tf_ebp = scp->sc_fp; 760 regs->tf_esp = scp->sc_sp; 761 regs->tf_eip = scp->sc_pc; 762 regs->tf_eflags = eflags; 763 764 PROC_LOCK(p); 765#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 766 if (scp->sc_onstack & 1) 767 p->p_sigstk.ss_flags |= SS_ONSTACK; 768 else 769 p->p_sigstk.ss_flags &= ~SS_ONSTACK; 770#endif 771 SIGSETOLD(td->td_sigmask, scp->sc_mask); 772 SIG_CANTMASK(td->td_sigmask); 773 signotify(td); 774 PROC_UNLOCK(p); 775 return (EJUSTRETURN); 776} 777#endif /* COMPAT_43 */ 778 779#ifdef COMPAT_FREEBSD4 780/* 781 * MPSAFE 782 */ 783int 784freebsd4_sigreturn(td, uap) 785 struct thread *td; 786 struct freebsd4_sigreturn_args /* { 787 const ucontext4 *sigcntxp; 788 } */ *uap; 789{ 790 struct ucontext4 uc; 791 struct proc *p = td->td_proc; 792 struct trapframe *regs; 793 const struct ucontext4 *ucp; 794 int cs, eflags, error; 795 796 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 797 if (error != 0) 798 return (error); 799 ucp = &uc; 800 regs = td->td_frame; 801 eflags = ucp->uc_mcontext.mc_eflags; 802 if (eflags & PSL_VM) { 803 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 804 struct vm86_kernel *vm86; 805 806 /* 807 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 808 * set up the vm86 area, and we can't enter vm86 mode. 809 */ 810 if (td->td_pcb->pcb_ext == 0) 811 return (EINVAL); 812 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 813 if (vm86->vm86_inited == 0) 814 return (EINVAL); 815 816 /* Go back to user mode if both flags are set. */ 817 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 818 trapsignal(td, SIGBUS, 0); 819 820 if (vm86->vm86_has_vme) { 821 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 822 (eflags & VME_USERCHANGE) | PSL_VM; 823 } else { 824 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 825 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 826 (eflags & VM_USERCHANGE) | PSL_VM; 827 } 828 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 829 tf->tf_eflags = eflags; 830 tf->tf_vm86_ds = tf->tf_ds; 831 tf->tf_vm86_es = tf->tf_es; 832 tf->tf_vm86_fs = tf->tf_fs; 833 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 834 tf->tf_ds = _udatasel; 835 tf->tf_es = _udatasel; 836 tf->tf_fs = _udatasel; 837 } else { 838 /* 839 * Don't allow users to change privileged or reserved flags. 840 */ 841 /* 842 * XXX do allow users to change the privileged flag PSL_RF. 843 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 844 * should sometimes set it there too. tf_eflags is kept in 845 * the signal context during signal handling and there is no 846 * other place to remember it, so the PSL_RF bit may be 847 * corrupted by the signal handler without us knowing. 848 * Corruption of the PSL_RF bit at worst causes one more or 849 * one less debugger trap, so allowing it is fairly harmless. 850 */ 851 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 852 printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags); 853 return (EINVAL); 854 } 855 856 /* 857 * Don't allow users to load a valid privileged %cs. Let the 858 * hardware check for invalid selectors, excess privilege in 859 * other selectors, invalid %eip's and invalid %esp's. 860 */ 861 cs = ucp->uc_mcontext.mc_cs; 862 if (!CS_SECURE(cs)) { 863 printf("freebsd4_sigreturn: cs = 0x%x\n", cs); 864 trapsignal(td, SIGBUS, T_PROTFLT); 865 return (EINVAL); 866 } 867 868 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 869 } 870 871 PROC_LOCK(p); 872#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 873 if (ucp->uc_mcontext.mc_onstack & 1) 874 p->p_sigstk.ss_flags |= SS_ONSTACK; 875 else 876 p->p_sigstk.ss_flags &= ~SS_ONSTACK; 877#endif 878 879 td->td_sigmask = ucp->uc_sigmask; 880 SIG_CANTMASK(td->td_sigmask); 881 signotify(td); 882 PROC_UNLOCK(p); 883 return (EJUSTRETURN); 884} 885#endif /* COMPAT_FREEBSD4 */ 886 887/* 888 * MPSAFE 889 */ 890int 891sigreturn(td, uap) 892 struct thread *td; 893 struct sigreturn_args /* { 894 const __ucontext *sigcntxp; 895 } */ *uap; 896{ 897 ucontext_t uc; 898 struct proc *p = td->td_proc; 899 struct trapframe *regs; 900 const ucontext_t *ucp; 901 int cs, eflags, error, ret; 902 903 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 904 if (error != 0) 905 return (error); 906 ucp = &uc; 907 regs = td->td_frame; 908 eflags = ucp->uc_mcontext.mc_eflags; 909 if (eflags & PSL_VM) { 910 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 911 struct vm86_kernel *vm86; 912 913 /* 914 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 915 * set up the vm86 area, and we can't enter vm86 mode. 916 */ 917 if (td->td_pcb->pcb_ext == 0) 918 return (EINVAL); 919 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 920 if (vm86->vm86_inited == 0) 921 return (EINVAL); 922 923 /* Go back to user mode if both flags are set. */ 924 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 925 trapsignal(td, SIGBUS, 0); 926 927 if (vm86->vm86_has_vme) { 928 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 929 (eflags & VME_USERCHANGE) | PSL_VM; 930 } else { 931 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 932 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 933 (eflags & VM_USERCHANGE) | PSL_VM; 934 } 935 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 936 tf->tf_eflags = eflags; 937 tf->tf_vm86_ds = tf->tf_ds; 938 tf->tf_vm86_es = tf->tf_es; 939 tf->tf_vm86_fs = tf->tf_fs; 940 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 941 tf->tf_ds = _udatasel; 942 tf->tf_es = _udatasel; 943 tf->tf_fs = _udatasel; 944 } else { 945 /* 946 * Don't allow users to change privileged or reserved flags. 947 */ 948 /* 949 * XXX do allow users to change the privileged flag PSL_RF. 950 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 951 * should sometimes set it there too. tf_eflags is kept in 952 * the signal context during signal handling and there is no 953 * other place to remember it, so the PSL_RF bit may be 954 * corrupted by the signal handler without us knowing. 955 * Corruption of the PSL_RF bit at worst causes one more or 956 * one less debugger trap, so allowing it is fairly harmless. 957 */ 958 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 959 printf("sigreturn: eflags = 0x%x\n", eflags); 960 return (EINVAL); 961 } 962 963 /* 964 * Don't allow users to load a valid privileged %cs. Let the 965 * hardware check for invalid selectors, excess privilege in 966 * other selectors, invalid %eip's and invalid %esp's. 967 */ 968 cs = ucp->uc_mcontext.mc_cs; 969 if (!CS_SECURE(cs)) { 970 printf("sigreturn: cs = 0x%x\n", cs); 971 trapsignal(td, SIGBUS, T_PROTFLT); 972 return (EINVAL); 973 } 974 975 ret = set_fpcontext(td, &ucp->uc_mcontext); 976 if (ret != 0) 977 return (ret); 978 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 979 } 980 981 PROC_LOCK(p); 982#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 983 if (ucp->uc_mcontext.mc_onstack & 1) 984 p->p_sigstk.ss_flags |= SS_ONSTACK; 985 else 986 p->p_sigstk.ss_flags &= ~SS_ONSTACK; 987#endif 988 989 td->td_sigmask = ucp->uc_sigmask; 990 SIG_CANTMASK(td->td_sigmask); 991 signotify(td); 992 PROC_UNLOCK(p); 993 return (EJUSTRETURN); 994} 995 996/* 997 * Machine dependent boot() routine 998 * 999 * I haven't seen anything to put here yet 1000 * Possibly some stuff might be grafted back here from boot() 1001 */ 1002void 1003cpu_boot(int howto) 1004{ 1005} 1006 1007/* 1008 * Shutdown the CPU as much as possible 1009 */ 1010void 1011cpu_halt(void) 1012{ 1013 for (;;) 1014 __asm__ ("hlt"); 1015} 1016 1017/* 1018 * Hook to idle the CPU when possible. In the SMP case we default to 1019 * off because a halted cpu will not currently pick up a new thread in the 1020 * run queue until the next timer tick. If turned on this will result in 1021 * approximately a 4.2% loss in real time performance in buildworld tests 1022 * (but improves user and sys times oddly enough), and saves approximately 1023 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 1024 * 1025 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 1026 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 1027 * Then we can have our cake and eat it too. 1028 * 1029 * XXX I'm turning it on for SMP as well by default for now. It seems to 1030 * help lock contention somewhat, and this is critical for HTT. -Peter 1031 */ 1032static int cpu_idle_hlt = 1; 1033SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 1034 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 1035 1036/* 1037 * Note that we have to be careful here to avoid a race between checking 1038 * sched_runnable() and actually halting. If we don't do this, we may waste 1039 * the time between calling hlt and the next interrupt even though there 1040 * is a runnable process. 1041 */ 1042void 1043cpu_idle(void) 1044{ 1045 1046#ifdef SMP 1047 if (mp_grab_cpu_hlt()) 1048 return; 1049#endif 1050 1051 if (cpu_idle_hlt) { 1052 disable_intr(); 1053 if (sched_runnable()) { 1054 enable_intr(); 1055 } else { 1056 /* 1057 * we must absolutely guarentee that hlt is the 1058 * absolute next instruction after sti or we 1059 * introduce a timing window. 1060 */ 1061 __asm __volatile("sti; hlt"); 1062 } 1063 } 1064} 1065 1066/* 1067 * Clear registers on exec 1068 */ 1069void 1070exec_setregs(td, entry, stack, ps_strings) 1071 struct thread *td; 1072 u_long entry; 1073 u_long stack; 1074 u_long ps_strings; 1075{ 1076 struct trapframe *regs = td->td_frame; 1077 struct pcb *pcb = td->td_pcb; 1078 1079 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */ 1080 pcb->pcb_gs = _udatasel; 1081 load_gs(_udatasel); 1082 1083 if (td->td_proc->p_md.md_ldt) 1084 user_ldt_free(td); 1085 1086 bzero((char *)regs, sizeof(struct trapframe)); 1087 regs->tf_eip = entry; 1088 regs->tf_esp = stack; 1089 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 1090 regs->tf_ss = _udatasel; 1091 regs->tf_ds = _udatasel; 1092 regs->tf_es = _udatasel; 1093 regs->tf_fs = _udatasel; 1094 regs->tf_cs = _ucodesel; 1095 1096 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */ 1097 regs->tf_ebx = ps_strings; 1098 1099 /* 1100 * Reset the hardware debug registers if they were in use. 1101 * They won't have any meaning for the newly exec'd process. 1102 */ 1103 if (pcb->pcb_flags & PCB_DBREGS) { 1104 pcb->pcb_dr0 = 0; 1105 pcb->pcb_dr1 = 0; 1106 pcb->pcb_dr2 = 0; 1107 pcb->pcb_dr3 = 0; 1108 pcb->pcb_dr6 = 0; 1109 pcb->pcb_dr7 = 0; 1110 if (pcb == PCPU_GET(curpcb)) { 1111 /* 1112 * Clear the debug registers on the running 1113 * CPU, otherwise they will end up affecting 1114 * the next process we switch to. 1115 */ 1116 reset_dbregs(); 1117 } 1118 pcb->pcb_flags &= ~PCB_DBREGS; 1119 } 1120 1121 /* 1122 * Initialize the math emulator (if any) for the current process. 1123 * Actually, just clear the bit that says that the emulator has 1124 * been initialized. Initialization is delayed until the process 1125 * traps to the emulator (if it is done at all) mainly because 1126 * emulators don't provide an entry point for initialization. 1127 */ 1128 td->td_pcb->pcb_flags &= ~FP_SOFTFP; 1129 1130 /* 1131 * Arrange to trap the next npx or `fwait' instruction (see npx.c 1132 * for why fwait must be trapped at least if there is an npx or an 1133 * emulator). This is mainly to handle the case where npx0 is not 1134 * configured, since the npx routines normally set up the trap 1135 * otherwise. It should be done only at boot time, but doing it 1136 * here allows modifying `npx_exists' for testing the emulator on 1137 * systems with an npx. 1138 */ 1139 load_cr0(rcr0() | CR0_MP | CR0_TS); 1140 1141 /* Initialize the npx (if any) for the current process. */ 1142 /* 1143 * XXX the above load_cr0() also initializes it and is a layering 1144 * violation if NPX is configured. It drops the npx partially 1145 * and this would be fatal if we were interrupted now, and decided 1146 * to force the state to the pcb, and checked the invariant 1147 * (CR0_TS clear) if and only if PCPU_GET(fpcurthread) != NULL). 1148 * ALL of this can happen except the check. The check used to 1149 * happen and be fatal later when we didn't complete the drop 1150 * before returning to user mode. This should be fixed properly 1151 * soon. 1152 */ 1153 fpstate_drop(td); 1154 1155 /* 1156 * XXX - Linux emulator 1157 * Make sure sure edx is 0x0 on entry. Linux binaries depend 1158 * on it. 1159 */ 1160 td->td_retval[1] = 0; 1161} 1162 1163void 1164cpu_setregs(void) 1165{ 1166 unsigned int cr0; 1167 1168 cr0 = rcr0(); 1169#ifdef SMP 1170 cr0 |= CR0_NE; /* Done by npxinit() */ 1171#endif 1172 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ 1173#ifndef I386_CPU 1174 cr0 |= CR0_WP | CR0_AM; 1175#endif 1176 load_cr0(cr0); 1177 load_gs(_udatasel); 1178} 1179 1180static int 1181sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 1182{ 1183 int error; 1184 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 1185 req); 1186 if (!error && req->newptr) 1187 resettodr(); 1188 return (error); 1189} 1190 1191SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 1192 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 1193 1194SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 1195 CTLFLAG_RW, &disable_rtc_set, 0, ""); 1196 1197SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 1198 CTLFLAG_RD, &bootinfo, bootinfo, ""); 1199 1200SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 1201 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 1202 1203u_long bootdev; /* not a dev_t - encoding is different */ 1204SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev, 1205 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in dev_t format)"); 1206 1207/* 1208 * Initialize 386 and configure to run kernel 1209 */ 1210 1211/* 1212 * Initialize segments & interrupt table 1213 */ 1214 1215int _default_ldt; 1216union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */ 1217static struct gate_descriptor idt0[NIDT]; 1218struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 1219union descriptor ldt[NLDT]; /* local descriptor table */ 1220#ifdef SMP 1221/* table descriptors - used to load tables by microp */ 1222struct region_descriptor r_gdt, r_idt; 1223#endif 1224 1225int private_tss; /* flag indicating private tss */ 1226 1227#if defined(I586_CPU) && !defined(NO_F00F_HACK) 1228extern int has_f00f_bug; 1229#endif 1230 1231static struct i386tss dblfault_tss; 1232static char dblfault_stack[PAGE_SIZE]; 1233 1234extern struct user *proc0uarea; 1235extern vm_offset_t proc0kstack; 1236 1237 1238/* software prototypes -- in more palatable form */ 1239struct soft_segment_descriptor gdt_segs[] = { 1240/* GNULL_SEL 0 Null Descriptor */ 1241{ 0x0, /* segment base address */ 1242 0x0, /* length */ 1243 0, /* segment type */ 1244 0, /* segment descriptor priority level */ 1245 0, /* segment descriptor present */ 1246 0, 0, 1247 0, /* default 32 vs 16 bit size */ 1248 0 /* limit granularity (byte/page units)*/ }, 1249/* GCODE_SEL 1 Code Descriptor for kernel */ 1250{ 0x0, /* segment base address */ 1251 0xfffff, /* length - all address space */ 1252 SDT_MEMERA, /* segment type */ 1253 0, /* segment descriptor priority level */ 1254 1, /* segment descriptor present */ 1255 0, 0, 1256 1, /* default 32 vs 16 bit size */ 1257 1 /* limit granularity (byte/page units)*/ }, 1258/* GDATA_SEL 2 Data Descriptor for kernel */ 1259{ 0x0, /* segment base address */ 1260 0xfffff, /* length - all address space */ 1261 SDT_MEMRWA, /* segment type */ 1262 0, /* segment descriptor priority level */ 1263 1, /* segment descriptor present */ 1264 0, 0, 1265 1, /* default 32 vs 16 bit size */ 1266 1 /* limit granularity (byte/page units)*/ }, 1267/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */ 1268{ 0x0, /* segment base address */ 1269 0xfffff, /* length - all address space */ 1270 SDT_MEMRWA, /* segment type */ 1271 0, /* segment descriptor priority level */ 1272 1, /* segment descriptor present */ 1273 0, 0, 1274 1, /* default 32 vs 16 bit size */ 1275 1 /* limit granularity (byte/page units)*/ }, 1276/* GPROC0_SEL 4 Proc 0 Tss Descriptor */ 1277{ 1278 0x0, /* segment base address */ 1279 sizeof(struct i386tss)-1,/* length - all address space */ 1280 SDT_SYS386TSS, /* segment type */ 1281 0, /* segment descriptor priority level */ 1282 1, /* segment descriptor present */ 1283 0, 0, 1284 0, /* unused - default 32 vs 16 bit size */ 1285 0 /* limit granularity (byte/page units)*/ }, 1286/* GLDT_SEL 5 LDT Descriptor */ 1287{ (int) ldt, /* segment base address */ 1288 sizeof(ldt)-1, /* length - all address space */ 1289 SDT_SYSLDT, /* segment type */ 1290 SEL_UPL, /* segment descriptor priority level */ 1291 1, /* segment descriptor present */ 1292 0, 0, 1293 0, /* unused - default 32 vs 16 bit size */ 1294 0 /* limit granularity (byte/page units)*/ }, 1295/* GUSERLDT_SEL 6 User LDT Descriptor per process */ 1296{ (int) ldt, /* segment base address */ 1297 (512 * sizeof(union descriptor)-1), /* length */ 1298 SDT_SYSLDT, /* segment type */ 1299 0, /* segment descriptor priority level */ 1300 1, /* segment descriptor present */ 1301 0, 0, 1302 0, /* unused - default 32 vs 16 bit size */ 1303 0 /* limit granularity (byte/page units)*/ }, 1304/* GTGATE_SEL 7 Null Descriptor - Placeholder */ 1305{ 0x0, /* segment base address */ 1306 0x0, /* length - all address space */ 1307 0, /* segment type */ 1308 0, /* segment descriptor priority level */ 1309 0, /* segment descriptor present */ 1310 0, 0, 1311 0, /* default 32 vs 16 bit size */ 1312 0 /* limit granularity (byte/page units)*/ }, 1313/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */ 1314{ 0x400, /* segment base address */ 1315 0xfffff, /* length */ 1316 SDT_MEMRWA, /* segment type */ 1317 0, /* segment descriptor priority level */ 1318 1, /* segment descriptor present */ 1319 0, 0, 1320 1, /* default 32 vs 16 bit size */ 1321 1 /* limit granularity (byte/page units)*/ }, 1322/* GPANIC_SEL 9 Panic Tss Descriptor */ 1323{ (int) &dblfault_tss, /* segment base address */ 1324 sizeof(struct i386tss)-1,/* length - all address space */ 1325 SDT_SYS386TSS, /* segment type */ 1326 0, /* segment descriptor priority level */ 1327 1, /* segment descriptor present */ 1328 0, 0, 1329 0, /* unused - default 32 vs 16 bit size */ 1330 0 /* limit granularity (byte/page units)*/ }, 1331/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */ 1332{ 0, /* segment base address (overwritten) */ 1333 0xfffff, /* length */ 1334 SDT_MEMERA, /* segment type */ 1335 0, /* segment descriptor priority level */ 1336 1, /* segment descriptor present */ 1337 0, 0, 1338 0, /* default 32 vs 16 bit size */ 1339 1 /* limit granularity (byte/page units)*/ }, 1340/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */ 1341{ 0, /* segment base address (overwritten) */ 1342 0xfffff, /* length */ 1343 SDT_MEMERA, /* segment type */ 1344 0, /* segment descriptor priority level */ 1345 1, /* segment descriptor present */ 1346 0, 0, 1347 0, /* default 32 vs 16 bit size */ 1348 1 /* limit granularity (byte/page units)*/ }, 1349/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */ 1350{ 0, /* segment base address (overwritten) */ 1351 0xfffff, /* length */ 1352 SDT_MEMRWA, /* segment type */ 1353 0, /* segment descriptor priority level */ 1354 1, /* segment descriptor present */ 1355 0, 0, 1356 1, /* default 32 vs 16 bit size */ 1357 1 /* limit granularity (byte/page units)*/ }, 1358/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */ 1359{ 0, /* segment base address (overwritten) */ 1360 0xfffff, /* length */ 1361 SDT_MEMRWA, /* segment type */ 1362 0, /* segment descriptor priority level */ 1363 1, /* segment descriptor present */ 1364 0, 0, 1365 0, /* default 32 vs 16 bit size */ 1366 1 /* limit granularity (byte/page units)*/ }, 1367/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */ 1368{ 0, /* segment base address (overwritten) */ 1369 0xfffff, /* length */ 1370 SDT_MEMRWA, /* segment type */ 1371 0, /* segment descriptor priority level */ 1372 1, /* segment descriptor present */ 1373 0, 0, 1374 0, /* default 32 vs 16 bit size */ 1375 1 /* limit granularity (byte/page units)*/ }, 1376}; 1377 1378static struct soft_segment_descriptor ldt_segs[] = { 1379 /* Null Descriptor - overwritten by call gate */ 1380{ 0x0, /* segment base address */ 1381 0x0, /* length - all address space */ 1382 0, /* segment type */ 1383 0, /* segment descriptor priority level */ 1384 0, /* segment descriptor present */ 1385 0, 0, 1386 0, /* default 32 vs 16 bit size */ 1387 0 /* limit granularity (byte/page units)*/ }, 1388 /* Null Descriptor - overwritten by call gate */ 1389{ 0x0, /* segment base address */ 1390 0x0, /* length - all address space */ 1391 0, /* segment type */ 1392 0, /* segment descriptor priority level */ 1393 0, /* segment descriptor present */ 1394 0, 0, 1395 0, /* default 32 vs 16 bit size */ 1396 0 /* limit granularity (byte/page units)*/ }, 1397 /* Null Descriptor - overwritten by call gate */ 1398{ 0x0, /* segment base address */ 1399 0x0, /* length - all address space */ 1400 0, /* segment type */ 1401 0, /* segment descriptor priority level */ 1402 0, /* segment descriptor present */ 1403 0, 0, 1404 0, /* default 32 vs 16 bit size */ 1405 0 /* limit granularity (byte/page units)*/ }, 1406 /* Code Descriptor for user */ 1407{ 0x0, /* segment base address */ 1408 0xfffff, /* length - all address space */ 1409 SDT_MEMERA, /* segment type */ 1410 SEL_UPL, /* segment descriptor priority level */ 1411 1, /* segment descriptor present */ 1412 0, 0, 1413 1, /* default 32 vs 16 bit size */ 1414 1 /* limit granularity (byte/page units)*/ }, 1415 /* Null Descriptor - overwritten by call gate */ 1416{ 0x0, /* segment base address */ 1417 0x0, /* length - all address space */ 1418 0, /* segment type */ 1419 0, /* segment descriptor priority level */ 1420 0, /* segment descriptor present */ 1421 0, 0, 1422 0, /* default 32 vs 16 bit size */ 1423 0 /* limit granularity (byte/page units)*/ }, 1424 /* Data Descriptor for user */ 1425{ 0x0, /* segment base address */ 1426 0xfffff, /* length - all address space */ 1427 SDT_MEMRWA, /* segment type */ 1428 SEL_UPL, /* segment descriptor priority level */ 1429 1, /* segment descriptor present */ 1430 0, 0, 1431 1, /* default 32 vs 16 bit size */ 1432 1 /* limit granularity (byte/page units)*/ }, 1433}; 1434 1435void 1436setidt(idx, func, typ, dpl, selec) 1437 int idx; 1438 inthand_t *func; 1439 int typ; 1440 int dpl; 1441 int selec; 1442{ 1443 struct gate_descriptor *ip; 1444 1445 ip = idt + idx; 1446 ip->gd_looffset = (int)func; 1447 ip->gd_selector = selec; 1448 ip->gd_stkcpy = 0; 1449 ip->gd_xx = 0; 1450 ip->gd_type = typ; 1451 ip->gd_dpl = dpl; 1452 ip->gd_p = 1; 1453 ip->gd_hioffset = ((int)func)>>16 ; 1454} 1455 1456#define IDTVEC(name) __CONCAT(X,name) 1457 1458extern inthand_t 1459 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1460 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1461 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1462 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1463 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall); 1464 1465void 1466sdtossd(sd, ssd) 1467 struct segment_descriptor *sd; 1468 struct soft_segment_descriptor *ssd; 1469{ 1470 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1471 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1472 ssd->ssd_type = sd->sd_type; 1473 ssd->ssd_dpl = sd->sd_dpl; 1474 ssd->ssd_p = sd->sd_p; 1475 ssd->ssd_def32 = sd->sd_def32; 1476 ssd->ssd_gran = sd->sd_gran; 1477} 1478 1479#define PHYSMAP_SIZE (2 * 8) 1480 1481/* 1482 * Populate the (physmap) array with base/bound pairs describing the 1483 * available physical memory in the system, then test this memory and 1484 * build the phys_avail array describing the actually-available memory. 1485 * 1486 * If we cannot accurately determine the physical memory map, then use 1487 * value from the 0xE801 call, and failing that, the RTC. 1488 * 1489 * Total memory size may be set by the kernel environment variable 1490 * hw.physmem or the compile-time define MAXMEM. 1491 * 1492 * XXX first should be vm_paddr_t. 1493 */ 1494static void 1495getmemsize(int first) 1496{ 1497 int i, physmap_idx, pa_indx; 1498 int hasbrokenint12; 1499 u_int basemem, extmem; 1500 struct vm86frame vmf; 1501 struct vm86context vmc; 1502 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 1503 pt_entry_t *pte; 1504 char *cp; 1505 struct bios_smap *smap; 1506 1507 hasbrokenint12 = 0; 1508 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12); 1509 bzero(&vmf, sizeof(struct vm86frame)); 1510 bzero(physmap, sizeof(physmap)); 1511 basemem = 0; 1512 1513 /* 1514 * Some newer BIOSes has broken INT 12H implementation which cause 1515 * kernel panic immediately. In this case, we need to scan SMAP 1516 * with INT 15:E820 first, then determine base memory size. 1517 */ 1518 if (hasbrokenint12) { 1519 goto int15e820; 1520 } 1521 1522 /* 1523 * Perform "base memory" related probes & setup 1524 */ 1525 vm86_intcall(0x12, &vmf); 1526 basemem = vmf.vmf_ax; 1527 if (basemem > 640) { 1528 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 1529 basemem); 1530 basemem = 640; 1531 } 1532 1533 /* 1534 * XXX if biosbasemem is now < 640, there is a `hole' 1535 * between the end of base memory and the start of 1536 * ISA memory. The hole may be empty or it may 1537 * contain BIOS code or data. Map it read/write so 1538 * that the BIOS can write to it. (Memory from 0 to 1539 * the physical end of the kernel is mapped read-only 1540 * to begin with and then parts of it are remapped. 1541 * The parts that aren't remapped form holes that 1542 * remain read-only and are unused by the kernel. 1543 * The base memory area is below the physical end of 1544 * the kernel and right now forms a read-only hole. 1545 * The part of it from PAGE_SIZE to 1546 * (trunc_page(biosbasemem * 1024) - 1) will be 1547 * remapped and used by the kernel later.) 1548 * 1549 * This code is similar to the code used in 1550 * pmap_mapdev, but since no memory needs to be 1551 * allocated we simply change the mapping. 1552 */ 1553 for (pa = trunc_page(basemem * 1024); 1554 pa < ISA_HOLE_START; pa += PAGE_SIZE) 1555 pmap_kenter(KERNBASE + pa, pa); 1556 1557 /* 1558 * if basemem != 640, map pages r/w into vm86 page table so 1559 * that the bios can scribble on it. 1560 */ 1561 pte = (pt_entry_t *)vm86paddr; 1562 for (i = basemem / 4; i < 160; i++) 1563 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1564 1565int15e820: 1566 /* 1567 * map page 1 R/W into the kernel page table so we can use it 1568 * as a buffer. The kernel will unmap this page later. 1569 */ 1570 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT); 1571 1572 /* 1573 * get memory map with INT 15:E820 1574 */ 1575 vmc.npages = 0; 1576 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT)); 1577 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di); 1578 1579 physmap_idx = 0; 1580 vmf.vmf_ebx = 0; 1581 do { 1582 vmf.vmf_eax = 0xE820; 1583 vmf.vmf_edx = SMAP_SIG; 1584 vmf.vmf_ecx = sizeof(struct bios_smap); 1585 i = vm86_datacall(0x15, &vmf, &vmc); 1586 if (i || vmf.vmf_eax != SMAP_SIG) 1587 break; 1588 if (boothowto & RB_VERBOSE) 1589 printf("SMAP type=%02x base=%016llx len=%016llx\n", 1590 smap->type, smap->base, smap->length); 1591 1592 if (smap->type != 0x01) 1593 goto next_run; 1594 1595 if (smap->length == 0) 1596 goto next_run; 1597 1598#ifndef PAE 1599 if (smap->base >= 0xffffffff) { 1600 printf("%uK of memory above 4GB ignored\n", 1601 (u_int)(smap->length / 1024)); 1602 goto next_run; 1603 } 1604#endif 1605 1606 for (i = 0; i <= physmap_idx; i += 2) { 1607 if (smap->base < physmap[i + 1]) { 1608 if (boothowto & RB_VERBOSE) 1609 printf( 1610 "Overlapping or non-montonic memory region, ignoring second region\n"); 1611 goto next_run; 1612 } 1613 } 1614 1615 if (smap->base == physmap[physmap_idx + 1]) { 1616 physmap[physmap_idx + 1] += smap->length; 1617 goto next_run; 1618 } 1619 1620 physmap_idx += 2; 1621 if (physmap_idx == PHYSMAP_SIZE) { 1622 printf( 1623 "Too many segments in the physical address map, giving up\n"); 1624 break; 1625 } 1626 physmap[physmap_idx] = smap->base; 1627 physmap[physmap_idx + 1] = smap->base + smap->length; 1628next_run: ; 1629 } while (vmf.vmf_ebx != 0); 1630 1631 /* 1632 * Perform "base memory" related probes & setup based on SMAP 1633 */ 1634 if (basemem == 0) { 1635 for (i = 0; i <= physmap_idx; i += 2) { 1636 if (physmap[i] == 0x00000000) { 1637 basemem = physmap[i + 1] / 1024; 1638 break; 1639 } 1640 } 1641 1642 if (basemem == 0) { 1643 basemem = 640; 1644 } 1645 1646 if (basemem > 640) { 1647 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 1648 basemem); 1649 basemem = 640; 1650 } 1651 1652 for (pa = trunc_page(basemem * 1024); 1653 pa < ISA_HOLE_START; pa += PAGE_SIZE) 1654 pmap_kenter(KERNBASE + pa, pa); 1655 1656 pte = (pt_entry_t *)vm86paddr; 1657 for (i = basemem / 4; i < 160; i++) 1658 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1659 } 1660 1661 if (physmap[1] != 0) 1662 goto physmap_done; 1663 1664 /* 1665 * If we failed above, try memory map with INT 15:E801 1666 */ 1667 vmf.vmf_ax = 0xE801; 1668 if (vm86_intcall(0x15, &vmf) == 0) { 1669 extmem = vmf.vmf_cx + vmf.vmf_dx * 64; 1670 } else { 1671#if 0 1672 vmf.vmf_ah = 0x88; 1673 vm86_intcall(0x15, &vmf); 1674 extmem = vmf.vmf_ax; 1675#else 1676 /* 1677 * Prefer the RTC value for extended memory. 1678 */ 1679 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8); 1680#endif 1681 } 1682 1683 /* 1684 * Special hack for chipsets that still remap the 384k hole when 1685 * there's 16MB of memory - this really confuses people that 1686 * are trying to use bus mastering ISA controllers with the 1687 * "16MB limit"; they only have 16MB, but the remapping puts 1688 * them beyond the limit. 1689 * 1690 * If extended memory is between 15-16MB (16-17MB phys address range), 1691 * chop it to 15MB. 1692 */ 1693 if ((extmem > 15 * 1024) && (extmem < 16 * 1024)) 1694 extmem = 15 * 1024; 1695 1696 physmap[0] = 0; 1697 physmap[1] = basemem * 1024; 1698 physmap_idx = 2; 1699 physmap[physmap_idx] = 0x100000; 1700 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024; 1701 1702physmap_done: 1703 /* 1704 * Now, physmap contains a map of physical memory. 1705 */ 1706 1707#ifdef SMP 1708 /* make hole for AP bootstrap code */ 1709 physmap[1] = mp_bootaddress(physmap[1] / 1024); 1710 1711 /* look for the MP hardware - needed for apic addresses */ 1712 i386_mp_probe(); 1713#endif 1714 1715 /* 1716 * Maxmem isn't the "maximum memory", it's one larger than the 1717 * highest page of the physical address space. It should be 1718 * called something like "Maxphyspage". We may adjust this 1719 * based on ``hw.physmem'' and the results of the memory test. 1720 */ 1721 Maxmem = atop(physmap[physmap_idx + 1]); 1722 1723#ifdef MAXMEM 1724 Maxmem = MAXMEM / 4; 1725#endif 1726 1727 /* 1728 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes 1729 * for the appropriate modifiers. This overrides MAXMEM. 1730 */ 1731 if ((cp = getenv("hw.physmem")) != NULL) { 1732 u_int64_t AllowMem, sanity; 1733 char *ep; 1734 1735 sanity = AllowMem = strtouq(cp, &ep, 0); 1736 if ((ep != cp) && (*ep != 0)) { 1737 switch(*ep) { 1738 case 'g': 1739 case 'G': 1740 AllowMem <<= 10; 1741 case 'm': 1742 case 'M': 1743 AllowMem <<= 10; 1744 case 'k': 1745 case 'K': 1746 AllowMem <<= 10; 1747 break; 1748 default: 1749 AllowMem = sanity = 0; 1750 } 1751 if (AllowMem < sanity) 1752 AllowMem = 0; 1753 } 1754 if (AllowMem == 0) 1755 printf("Ignoring invalid memory size of '%s'\n", cp); 1756 else 1757 Maxmem = atop(AllowMem); 1758 freeenv(cp); 1759 } 1760 1761 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1762 (boothowto & RB_VERBOSE)) 1763 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1764 1765 /* 1766 * If Maxmem has been increased beyond what the system has detected, 1767 * extend the last memory segment to the new limit. 1768 */ 1769 if (atop(physmap[physmap_idx + 1]) < Maxmem) 1770 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem); 1771 1772 /* call pmap initialization to make new kernel address space */ 1773 pmap_bootstrap(first, 0); 1774 1775 /* 1776 * Size up each available chunk of physical memory. 1777 */ 1778 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1779 pa_indx = 0; 1780 phys_avail[pa_indx++] = physmap[0]; 1781 phys_avail[pa_indx] = physmap[0]; 1782 pte = CMAP1; 1783 1784 /* 1785 * physmap is in bytes, so when converting to page boundaries, 1786 * round up the start address and round down the end address. 1787 */ 1788 for (i = 0; i <= physmap_idx; i += 2) { 1789 vm_paddr_t end; 1790 1791 end = ptoa((vm_paddr_t)Maxmem); 1792 if (physmap[i + 1] < end) 1793 end = trunc_page(physmap[i + 1]); 1794 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1795 int tmp, page_bad; 1796 int *ptr = (int *)CADDR1; 1797 1798 /* 1799 * block out kernel memory as not available. 1800 */ 1801 if (pa >= 0x100000 && pa < first) 1802 continue; 1803 1804 page_bad = FALSE; 1805 1806 /* 1807 * map page into kernel: valid, read/write,non-cacheable 1808 */ 1809 *pte = pa | PG_V | PG_RW | PG_N; 1810 invltlb(); 1811 1812 tmp = *(int *)ptr; 1813 /* 1814 * Test for alternating 1's and 0's 1815 */ 1816 *(volatile int *)ptr = 0xaaaaaaaa; 1817 if (*(volatile int *)ptr != 0xaaaaaaaa) { 1818 page_bad = TRUE; 1819 } 1820 /* 1821 * Test for alternating 0's and 1's 1822 */ 1823 *(volatile int *)ptr = 0x55555555; 1824 if (*(volatile int *)ptr != 0x55555555) { 1825 page_bad = TRUE; 1826 } 1827 /* 1828 * Test for all 1's 1829 */ 1830 *(volatile int *)ptr = 0xffffffff; 1831 if (*(volatile int *)ptr != 0xffffffff) { 1832 page_bad = TRUE; 1833 } 1834 /* 1835 * Test for all 0's 1836 */ 1837 *(volatile int *)ptr = 0x0; 1838 if (*(volatile int *)ptr != 0x0) { 1839 page_bad = TRUE; 1840 } 1841 /* 1842 * Restore original value. 1843 */ 1844 *(int *)ptr = tmp; 1845 1846 /* 1847 * Adjust array of valid/good pages. 1848 */ 1849 if (page_bad == TRUE) { 1850 continue; 1851 } 1852 /* 1853 * If this good page is a continuation of the 1854 * previous set of good pages, then just increase 1855 * the end pointer. Otherwise start a new chunk. 1856 * Note that "end" points one higher than end, 1857 * making the range >= start and < end. 1858 * If we're also doing a speculative memory 1859 * test and we at or past the end, bump up Maxmem 1860 * so that we keep going. The first bad page 1861 * will terminate the loop. 1862 */ 1863 if (phys_avail[pa_indx] == pa) { 1864 phys_avail[pa_indx] += PAGE_SIZE; 1865 } else { 1866 pa_indx++; 1867 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1868 printf( 1869 "Too many holes in the physical address space, giving up\n"); 1870 pa_indx--; 1871 break; 1872 } 1873 phys_avail[pa_indx++] = pa; /* start */ 1874 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1875 } 1876 physmem++; 1877 } 1878 } 1879 *pte = 0; 1880 invltlb(); 1881 1882 /* 1883 * XXX 1884 * The last chunk must contain at least one page plus the message 1885 * buffer to avoid complicating other code (message buffer address 1886 * calculation, etc.). 1887 */ 1888 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1889 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1890 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1891 phys_avail[pa_indx--] = 0; 1892 phys_avail[pa_indx--] = 0; 1893 } 1894 1895 Maxmem = atop(phys_avail[pa_indx]); 1896 1897 /* Trim off space for the message buffer. */ 1898 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1899 1900 avail_end = phys_avail[pa_indx]; 1901} 1902 1903void 1904init386(first) 1905 int first; 1906{ 1907 struct gate_descriptor *gdp; 1908 int gsel_tss, metadata_missing, off, x; 1909#ifndef SMP 1910 /* table descriptors - used to load tables by microp */ 1911 struct region_descriptor r_gdt, r_idt; 1912#endif 1913 struct pcpu *pc; 1914 1915 proc0.p_uarea = proc0uarea; 1916 thread0.td_kstack = proc0kstack; 1917 thread0.td_pcb = (struct pcb *) 1918 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1919 atdevbase = ISA_HOLE_START + KERNBASE; 1920 1921 /* 1922 * This may be done better later if it gets more high level 1923 * components in it. If so just link td->td_proc here. 1924 */ 1925 proc_linkup(&proc0, &ksegrp0, &kse0, &thread0); 1926 1927 metadata_missing = 0; 1928 if (bootinfo.bi_modulep) { 1929 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 1930 preload_bootstrap_relocate(KERNBASE); 1931 } else { 1932 metadata_missing = 1; 1933 } 1934 if (envmode == 1) 1935 kern_envp = static_env; 1936 else if (bootinfo.bi_envp) 1937 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 1938 1939 /* Init basic tunables, hz etc */ 1940 init_param1(); 1941 1942 /* 1943 * make gdt memory segments, the code segment goes up to end of the 1944 * page with etext in it, the data segment goes to the end of 1945 * the address space 1946 */ 1947 /* 1948 * XXX text protection is temporarily (?) disabled. The limit was 1949 * i386_btop(round_page(etext)) - 1. 1950 */ 1951 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1); 1952 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1); 1953#ifdef SMP 1954 pc = &SMP_prvspace[0].pcpu; 1955 gdt_segs[GPRIV_SEL].ssd_limit = 1956 atop(sizeof(struct privatespace) - 1); 1957#else 1958 pc = &__pcpu; 1959 gdt_segs[GPRIV_SEL].ssd_limit = 1960 atop(sizeof(struct pcpu) - 1); 1961#endif 1962 gdt_segs[GPRIV_SEL].ssd_base = (int) pc; 1963 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss; 1964 1965 for (x = 0; x < NGDT; x++) 1966 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1967 1968 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1969 r_gdt.rd_base = (int) gdt; 1970 lgdt(&r_gdt); 1971 1972 pcpu_init(pc, 0, sizeof(struct pcpu)); 1973 PCPU_SET(prvspace, pc); 1974 PCPU_SET(curthread, &thread0); 1975 1976 /* 1977 * Initialize mutexes. 1978 * 1979 * icu_lock: in order to allow an interrupt to occur in a critical 1980 * section, to set pcpu->ipending (etc...) properly, we 1981 * must be able to get the icu lock, so it can't be 1982 * under witness. 1983 */ 1984 mutex_init(); 1985 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_RECURSE); 1986 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1987 1988 /* make ldt memory segments */ 1989 /* 1990 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it 1991 * should be spelled ...MAX_USER... 1992 */ 1993 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1); 1994 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1); 1995 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 1996 ssdtosd(&ldt_segs[x], &ldt[x].sd); 1997 1998 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1999 lldt(_default_ldt); 2000 PCPU_SET(currentldt, _default_ldt); 2001 2002 /* exceptions */ 2003 for (x = 0; x < NIDT; x++) 2004 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, 2005 GSEL(GCODE_SEL, SEL_KPL)); 2006 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, 2007 GSEL(GCODE_SEL, SEL_KPL)); 2008 setidt(1, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL, 2009 GSEL(GCODE_SEL, SEL_KPL)); 2010 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, 2011 GSEL(GCODE_SEL, SEL_KPL)); 2012 setidt(3, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL, 2013 GSEL(GCODE_SEL, SEL_KPL)); 2014 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, 2015 GSEL(GCODE_SEL, SEL_KPL)); 2016 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, 2017 GSEL(GCODE_SEL, SEL_KPL)); 2018 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2019 GSEL(GCODE_SEL, SEL_KPL)); 2020 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL 2021 , GSEL(GCODE_SEL, SEL_KPL)); 2022 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 2023 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, 2024 GSEL(GCODE_SEL, SEL_KPL)); 2025 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, 2026 GSEL(GCODE_SEL, SEL_KPL)); 2027 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, 2028 GSEL(GCODE_SEL, SEL_KPL)); 2029 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, 2030 GSEL(GCODE_SEL, SEL_KPL)); 2031 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2032 GSEL(GCODE_SEL, SEL_KPL)); 2033 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, 2034 GSEL(GCODE_SEL, SEL_KPL)); 2035 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, 2036 GSEL(GCODE_SEL, SEL_KPL)); 2037 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, 2038 GSEL(GCODE_SEL, SEL_KPL)); 2039 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, 2040 GSEL(GCODE_SEL, SEL_KPL)); 2041 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, 2042 GSEL(GCODE_SEL, SEL_KPL)); 2043 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, 2044 GSEL(GCODE_SEL, SEL_KPL)); 2045 setidt(0x80, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL, 2046 GSEL(GCODE_SEL, SEL_KPL)); 2047 2048 r_idt.rd_limit = sizeof(idt0) - 1; 2049 r_idt.rd_base = (int) idt; 2050 lidt(&r_idt); 2051 2052 /* 2053 * Initialize the console before we print anything out. 2054 */ 2055 cninit(); 2056 2057 if (metadata_missing) 2058 printf("WARNING: loader(8) metadata is missing!\n"); 2059 2060#ifdef DEV_ISA 2061 isa_defaultirq(); 2062#endif 2063 2064#ifdef DDB 2065 kdb_init(); 2066 if (boothowto & RB_KDB) 2067 Debugger("Boot flags requested debugger"); 2068#endif 2069 2070 finishidentcpu(); /* Final stage of CPU initialization */ 2071 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2072 GSEL(GCODE_SEL, SEL_KPL)); 2073 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2074 GSEL(GCODE_SEL, SEL_KPL)); 2075 initializecpu(); /* Initialize CPU registers */ 2076 2077 /* make an initial tss so cpu can get interrupt stack on syscall! */ 2078 /* Note: -16 is so we can grow the trapframe if we came from vm86 */ 2079 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack + 2080 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16); 2081 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL)); 2082 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 2083 private_tss = 0; 2084 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd); 2085 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); 2086 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16); 2087 ltr(gsel_tss); 2088 2089 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 2090 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)]; 2091 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 2092 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 2093#ifdef PAE 2094 dblfault_tss.tss_cr3 = (int)IdlePDPT; 2095#else 2096 dblfault_tss.tss_cr3 = (int)IdlePTD; 2097#endif 2098 dblfault_tss.tss_eip = (int)dblfault_handler; 2099 dblfault_tss.tss_eflags = PSL_KERNEL; 2100 dblfault_tss.tss_ds = dblfault_tss.tss_es = 2101 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 2102 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL); 2103 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 2104 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 2105 2106 vm86_initialize(); 2107 getmemsize(first); 2108 init_param2(physmem); 2109 2110 /* now running on new page tables, configured,and u/iom is accessible */ 2111 2112 /* Map the message buffer. */ 2113 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 2114 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off); 2115 2116 msgbufinit(msgbufp, MSGBUF_SIZE); 2117 2118 /* make a call gate to reenter kernel with */ 2119 gdp = &ldt[LSYS5CALLS_SEL].gd; 2120 2121 x = (int) &IDTVEC(lcall_syscall); 2122 gdp->gd_looffset = x; 2123 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 2124 gdp->gd_stkcpy = 1; 2125 gdp->gd_type = SDT_SYS386CGT; 2126 gdp->gd_dpl = SEL_UPL; 2127 gdp->gd_p = 1; 2128 gdp->gd_hioffset = x >> 16; 2129 2130 /* XXX does this work? */ 2131 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2132 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2133 2134 /* transfer to user mode */ 2135 2136 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL); 2137 _udatasel = LSEL(LUDATA_SEL, SEL_UPL); 2138 2139 /* setup proc 0's pcb */ 2140 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */ 2141#ifdef PAE 2142 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT; 2143#else 2144 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; 2145#endif 2146 thread0.td_pcb->pcb_ext = 0; 2147 thread0.td_frame = &proc0_tf; 2148} 2149 2150void 2151cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 2152{ 2153} 2154 2155#if defined(I586_CPU) && !defined(NO_F00F_HACK) 2156static void f00f_hack(void *unused); 2157SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL); 2158 2159static void 2160f00f_hack(void *unused) { 2161 struct gate_descriptor *new_idt; 2162#ifndef SMP 2163 struct region_descriptor r_idt; 2164#endif 2165 vm_offset_t tmp; 2166 2167 if (!has_f00f_bug) 2168 return; 2169 2170 GIANT_REQUIRED; 2171 2172 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 2173 2174 r_idt.rd_limit = sizeof(idt0) - 1; 2175 2176 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 2177 if (tmp == 0) 2178 panic("kmem_alloc returned 0"); 2179 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0) 2180 panic("kmem_alloc returned non-page-aligned memory"); 2181 /* Put the first seven entries in the lower page */ 2182 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8)); 2183 bcopy(idt, new_idt, sizeof(idt0)); 2184 r_idt.rd_base = (int)new_idt; 2185 lidt(&r_idt); 2186 idt = new_idt; 2187 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 2188 VM_PROT_READ, FALSE) != KERN_SUCCESS) 2189 panic("vm_map_protect failed"); 2190 return; 2191} 2192#endif /* defined(I586_CPU) && !NO_F00F_HACK */ 2193 2194int 2195ptrace_set_pc(struct thread *td, unsigned long addr) 2196{ 2197 td->td_frame->tf_eip = addr; 2198 return (0); 2199} 2200 2201int 2202ptrace_single_step(struct thread *td) 2203{ 2204 td->td_frame->tf_eflags |= PSL_T; 2205 return (0); 2206} 2207 2208int 2209fill_regs(struct thread *td, struct reg *regs) 2210{ 2211 struct pcb *pcb; 2212 struct trapframe *tp; 2213 2214 tp = td->td_frame; 2215 regs->r_fs = tp->tf_fs; 2216 regs->r_es = tp->tf_es; 2217 regs->r_ds = tp->tf_ds; 2218 regs->r_edi = tp->tf_edi; 2219 regs->r_esi = tp->tf_esi; 2220 regs->r_ebp = tp->tf_ebp; 2221 regs->r_ebx = tp->tf_ebx; 2222 regs->r_edx = tp->tf_edx; 2223 regs->r_ecx = tp->tf_ecx; 2224 regs->r_eax = tp->tf_eax; 2225 regs->r_eip = tp->tf_eip; 2226 regs->r_cs = tp->tf_cs; 2227 regs->r_eflags = tp->tf_eflags; 2228 regs->r_esp = tp->tf_esp; 2229 regs->r_ss = tp->tf_ss; 2230 pcb = td->td_pcb; 2231 regs->r_gs = pcb->pcb_gs; 2232 return (0); 2233} 2234 2235int 2236set_regs(struct thread *td, struct reg *regs) 2237{ 2238 struct pcb *pcb; 2239 struct trapframe *tp; 2240 2241 tp = td->td_frame; 2242 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) || 2243 !CS_SECURE(regs->r_cs)) 2244 return (EINVAL); 2245 tp->tf_fs = regs->r_fs; 2246 tp->tf_es = regs->r_es; 2247 tp->tf_ds = regs->r_ds; 2248 tp->tf_edi = regs->r_edi; 2249 tp->tf_esi = regs->r_esi; 2250 tp->tf_ebp = regs->r_ebp; 2251 tp->tf_ebx = regs->r_ebx; 2252 tp->tf_edx = regs->r_edx; 2253 tp->tf_ecx = regs->r_ecx; 2254 tp->tf_eax = regs->r_eax; 2255 tp->tf_eip = regs->r_eip; 2256 tp->tf_cs = regs->r_cs; 2257 tp->tf_eflags = regs->r_eflags; 2258 tp->tf_esp = regs->r_esp; 2259 tp->tf_ss = regs->r_ss; 2260 pcb = td->td_pcb; 2261 pcb->pcb_gs = regs->r_gs; 2262 return (0); 2263} 2264 2265#ifdef CPU_ENABLE_SSE 2266static void 2267fill_fpregs_xmm(sv_xmm, sv_87) 2268 struct savexmm *sv_xmm; 2269 struct save87 *sv_87; 2270{ 2271 register struct env87 *penv_87 = &sv_87->sv_env; 2272 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2273 int i; 2274 2275 bzero(sv_87, sizeof(*sv_87)); 2276 2277 /* FPU control/status */ 2278 penv_87->en_cw = penv_xmm->en_cw; 2279 penv_87->en_sw = penv_xmm->en_sw; 2280 penv_87->en_tw = penv_xmm->en_tw; 2281 penv_87->en_fip = penv_xmm->en_fip; 2282 penv_87->en_fcs = penv_xmm->en_fcs; 2283 penv_87->en_opcode = penv_xmm->en_opcode; 2284 penv_87->en_foo = penv_xmm->en_foo; 2285 penv_87->en_fos = penv_xmm->en_fos; 2286 2287 /* FPU registers */ 2288 for (i = 0; i < 8; ++i) 2289 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 2290} 2291 2292static void 2293set_fpregs_xmm(sv_87, sv_xmm) 2294 struct save87 *sv_87; 2295 struct savexmm *sv_xmm; 2296{ 2297 register struct env87 *penv_87 = &sv_87->sv_env; 2298 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2299 int i; 2300 2301 /* FPU control/status */ 2302 penv_xmm->en_cw = penv_87->en_cw; 2303 penv_xmm->en_sw = penv_87->en_sw; 2304 penv_xmm->en_tw = penv_87->en_tw; 2305 penv_xmm->en_fip = penv_87->en_fip; 2306 penv_xmm->en_fcs = penv_87->en_fcs; 2307 penv_xmm->en_opcode = penv_87->en_opcode; 2308 penv_xmm->en_foo = penv_87->en_foo; 2309 penv_xmm->en_fos = penv_87->en_fos; 2310 2311 /* FPU registers */ 2312 for (i = 0; i < 8; ++i) 2313 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 2314} 2315#endif /* CPU_ENABLE_SSE */ 2316 2317int 2318fill_fpregs(struct thread *td, struct fpreg *fpregs) 2319{ 2320#ifdef CPU_ENABLE_SSE 2321 if (cpu_fxsr) { 2322 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm, 2323 (struct save87 *)fpregs); 2324 return (0); 2325 } 2326#endif /* CPU_ENABLE_SSE */ 2327 bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs); 2328 return (0); 2329} 2330 2331int 2332set_fpregs(struct thread *td, struct fpreg *fpregs) 2333{ 2334#ifdef CPU_ENABLE_SSE 2335 if (cpu_fxsr) { 2336 set_fpregs_xmm((struct save87 *)fpregs, 2337 &td->td_pcb->pcb_save.sv_xmm); 2338 return (0); 2339 } 2340#endif /* CPU_ENABLE_SSE */ 2341 bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs); 2342 return (0); 2343} 2344 2345/* 2346 * Get machine context. 2347 */ 2348int 2349get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) 2350{ 2351 struct trapframe *tp; 2352 2353 tp = td->td_frame; 2354 2355 PROC_LOCK(curthread->td_proc); 2356 mcp->mc_onstack = sigonstack(tp->tf_esp); 2357 PROC_UNLOCK(curthread->td_proc); 2358 mcp->mc_gs = td->td_pcb->pcb_gs; 2359 mcp->mc_fs = tp->tf_fs; 2360 mcp->mc_es = tp->tf_es; 2361 mcp->mc_ds = tp->tf_ds; 2362 mcp->mc_edi = tp->tf_edi; 2363 mcp->mc_esi = tp->tf_esi; 2364 mcp->mc_ebp = tp->tf_ebp; 2365 mcp->mc_isp = tp->tf_isp; 2366 if (clear_ret != 0) { 2367 mcp->mc_eax = 0; 2368 mcp->mc_edx = 0; 2369 } else { 2370 mcp->mc_eax = tp->tf_eax; 2371 mcp->mc_edx = tp->tf_edx; 2372 } 2373 mcp->mc_ebx = tp->tf_ebx; 2374 mcp->mc_ecx = tp->tf_ecx; 2375 mcp->mc_eip = tp->tf_eip; 2376 mcp->mc_cs = tp->tf_cs; 2377 mcp->mc_eflags = tp->tf_eflags; 2378 mcp->mc_esp = tp->tf_esp; 2379 mcp->mc_ss = tp->tf_ss; 2380 mcp->mc_len = sizeof(*mcp); 2381 get_fpcontext(td, mcp); 2382 return (0); 2383} 2384 2385/* 2386 * Set machine context. 2387 * 2388 * However, we don't set any but the user modifiable flags, and we won't 2389 * touch the cs selector. 2390 */ 2391int 2392set_mcontext(struct thread *td, const mcontext_t *mcp) 2393{ 2394 struct trapframe *tp; 2395 int eflags, ret; 2396 2397 tp = td->td_frame; 2398 if (mcp->mc_len != sizeof(*mcp)) 2399 return (EINVAL); 2400 eflags = (mcp->mc_eflags & PSL_USERCHANGE) | 2401 (tp->tf_eflags & ~PSL_USERCHANGE); 2402 if ((ret = set_fpcontext(td, mcp)) == 0) { 2403 tp->tf_fs = mcp->mc_fs; 2404 tp->tf_es = mcp->mc_es; 2405 tp->tf_ds = mcp->mc_ds; 2406 tp->tf_edi = mcp->mc_edi; 2407 tp->tf_esi = mcp->mc_esi; 2408 tp->tf_ebp = mcp->mc_ebp; 2409 tp->tf_ebx = mcp->mc_ebx; 2410 tp->tf_edx = mcp->mc_edx; 2411 tp->tf_ecx = mcp->mc_ecx; 2412 tp->tf_eax = mcp->mc_eax; 2413 tp->tf_eip = mcp->mc_eip; 2414 tp->tf_eflags = eflags; 2415 tp->tf_esp = mcp->mc_esp; 2416 tp->tf_ss = mcp->mc_ss; 2417 td->td_pcb->pcb_gs = mcp->mc_gs; 2418 ret = 0; 2419 } 2420 return (ret); 2421} 2422 2423static void 2424get_fpcontext(struct thread *td, mcontext_t *mcp) 2425{ 2426#ifndef DEV_NPX 2427 mcp->mc_fpformat = _MC_FPFMT_NODEV; 2428 mcp->mc_ownedfp = _MC_FPOWNED_NONE; 2429#else 2430 union savefpu *addr; 2431 2432 /* 2433 * XXX mc_fpstate might be misaligned, since its declaration is not 2434 * unportabilized using __attribute__((aligned(16))) like the 2435 * declaration of struct savemm, and anyway, alignment doesn't work 2436 * for auto variables since we don't use gcc's pessimal stack 2437 * alignment. Work around this by abusing the spare fields after 2438 * mcp->mc_fpstate. 2439 * 2440 * XXX unpessimize most cases by only aligning when fxsave might be 2441 * called, although this requires knowing too much about 2442 * npxgetregs()'s internals. 2443 */ 2444 addr = (union savefpu *)&mcp->mc_fpstate; 2445 if (td == PCPU_GET(fpcurthread) && 2446#ifdef CPU_ENABLE_SSE 2447 cpu_fxsr && 2448#endif 2449 ((uintptr_t)(void *)addr & 0xF)) { 2450 do 2451 addr = (void *)((char *)addr + 4); 2452 while ((uintptr_t)(void *)addr & 0xF); 2453 } 2454 mcp->mc_ownedfp = npxgetregs(td, addr); 2455 if (addr != (union savefpu *)&mcp->mc_fpstate) { 2456 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate)); 2457 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2)); 2458 } 2459 mcp->mc_fpformat = npxformat(); 2460#endif 2461} 2462 2463static int 2464set_fpcontext(struct thread *td, const mcontext_t *mcp) 2465{ 2466 union savefpu *addr; 2467 2468 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 2469 return (0); 2470 else if (mcp->mc_fpformat != _MC_FPFMT_387 && 2471 mcp->mc_fpformat != _MC_FPFMT_XMM) 2472 return (EINVAL); 2473 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 2474 /* We don't care what state is left in the FPU or PCB. */ 2475 fpstate_drop(td); 2476 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 2477 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 2478 /* XXX align as above. */ 2479 addr = (union savefpu *)&mcp->mc_fpstate; 2480 if (td == PCPU_GET(fpcurthread) && 2481#ifdef CPU_ENABLE_SSE 2482 cpu_fxsr && 2483#endif 2484 ((uintptr_t)(void *)addr & 0xF)) { 2485 do 2486 addr = (void *)((char *)addr + 4); 2487 while ((uintptr_t)(void *)addr & 0xF); 2488 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate)); 2489 } 2490#ifdef DEV_NPX 2491 /* 2492 * XXX we violate the dubious requirement that npxsetregs() 2493 * be called with interrupts disabled. 2494 */ 2495 npxsetregs(td, addr); 2496#endif 2497 /* 2498 * Don't bother putting things back where they were in the 2499 * misaligned case, since we know that the caller won't use 2500 * them again. 2501 */ 2502 } else 2503 return (EINVAL); 2504 return (0); 2505} 2506 2507static void 2508fpstate_drop(struct thread *td) 2509{ 2510 register_t s; 2511 2512 s = intr_disable(); 2513#ifdef DEV_NPX 2514 if (PCPU_GET(fpcurthread) == td) 2515 npxdrop(); 2516#endif 2517 /* 2518 * XXX force a full drop of the npx. The above only drops it if we 2519 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case. 2520 * 2521 * XXX I don't much like npxgetregs()'s semantics of doing a full 2522 * drop. Dropping only to the pcb matches fnsave's behaviour. 2523 * We only need to drop to !PCB_INITDONE in sendsig(). But 2524 * sendsig() is the only caller of npxgetregs()... perhaps we just 2525 * have too many layers. 2526 */ 2527 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE; 2528 intr_restore(s); 2529} 2530 2531int 2532fill_dbregs(struct thread *td, struct dbreg *dbregs) 2533{ 2534 struct pcb *pcb; 2535 2536 if (td == NULL) { 2537 dbregs->dr[0] = rdr0(); 2538 dbregs->dr[1] = rdr1(); 2539 dbregs->dr[2] = rdr2(); 2540 dbregs->dr[3] = rdr3(); 2541 dbregs->dr[4] = rdr4(); 2542 dbregs->dr[5] = rdr5(); 2543 dbregs->dr[6] = rdr6(); 2544 dbregs->dr[7] = rdr7(); 2545 } else { 2546 pcb = td->td_pcb; 2547 dbregs->dr[0] = pcb->pcb_dr0; 2548 dbregs->dr[1] = pcb->pcb_dr1; 2549 dbregs->dr[2] = pcb->pcb_dr2; 2550 dbregs->dr[3] = pcb->pcb_dr3; 2551 dbregs->dr[4] = 0; 2552 dbregs->dr[5] = 0; 2553 dbregs->dr[6] = pcb->pcb_dr6; 2554 dbregs->dr[7] = pcb->pcb_dr7; 2555 } 2556 return (0); 2557} 2558 2559int 2560set_dbregs(struct thread *td, struct dbreg *dbregs) 2561{ 2562 struct pcb *pcb; 2563 int i; 2564 u_int32_t mask1, mask2; 2565 2566 if (td == NULL) { 2567 load_dr0(dbregs->dr[0]); 2568 load_dr1(dbregs->dr[1]); 2569 load_dr2(dbregs->dr[2]); 2570 load_dr3(dbregs->dr[3]); 2571 load_dr4(dbregs->dr[4]); 2572 load_dr5(dbregs->dr[5]); 2573 load_dr6(dbregs->dr[6]); 2574 load_dr7(dbregs->dr[7]); 2575 } else { 2576 /* 2577 * Don't let an illegal value for dr7 get set. Specifically, 2578 * check for undefined settings. Setting these bit patterns 2579 * result in undefined behaviour and can lead to an unexpected 2580 * TRCTRAP. 2581 */ 2582 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8; 2583 i++, mask1 <<= 2, mask2 <<= 2) 2584 if ((dbregs->dr[7] & mask1) == mask2) 2585 return (EINVAL); 2586 2587 pcb = td->td_pcb; 2588 2589 /* 2590 * Don't let a process set a breakpoint that is not within the 2591 * process's address space. If a process could do this, it 2592 * could halt the system by setting a breakpoint in the kernel 2593 * (if ddb was enabled). Thus, we need to check to make sure 2594 * that no breakpoints are being enabled for addresses outside 2595 * process's address space, unless, perhaps, we were called by 2596 * uid 0. 2597 * 2598 * XXX - what about when the watched area of the user's 2599 * address space is written into from within the kernel 2600 * ... wouldn't that still cause a breakpoint to be generated 2601 * from within kernel mode? 2602 */ 2603 2604 if (suser(td) != 0) { 2605 if (dbregs->dr[7] & 0x3) { 2606 /* dr0 is enabled */ 2607 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 2608 return (EINVAL); 2609 } 2610 2611 if (dbregs->dr[7] & (0x3<<2)) { 2612 /* dr1 is enabled */ 2613 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 2614 return (EINVAL); 2615 } 2616 2617 if (dbregs->dr[7] & (0x3<<4)) { 2618 /* dr2 is enabled */ 2619 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 2620 return (EINVAL); 2621 } 2622 2623 if (dbregs->dr[7] & (0x3<<6)) { 2624 /* dr3 is enabled */ 2625 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 2626 return (EINVAL); 2627 } 2628 } 2629 2630 pcb->pcb_dr0 = dbregs->dr[0]; 2631 pcb->pcb_dr1 = dbregs->dr[1]; 2632 pcb->pcb_dr2 = dbregs->dr[2]; 2633 pcb->pcb_dr3 = dbregs->dr[3]; 2634 pcb->pcb_dr6 = dbregs->dr[6]; 2635 pcb->pcb_dr7 = dbregs->dr[7]; 2636 2637 pcb->pcb_flags |= PCB_DBREGS; 2638 } 2639 2640 return (0); 2641} 2642 2643/* 2644 * Return > 0 if a hardware breakpoint has been hit, and the 2645 * breakpoint was in user space. Return 0, otherwise. 2646 */ 2647int 2648user_dbreg_trap(void) 2649{ 2650 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */ 2651 u_int32_t bp; /* breakpoint bits extracted from dr6 */ 2652 int nbp; /* number of breakpoints that triggered */ 2653 caddr_t addr[4]; /* breakpoint addresses */ 2654 int i; 2655 2656 dr7 = rdr7(); 2657 if ((dr7 & 0x000000ff) == 0) { 2658 /* 2659 * all GE and LE bits in the dr7 register are zero, 2660 * thus the trap couldn't have been caused by the 2661 * hardware debug registers 2662 */ 2663 return 0; 2664 } 2665 2666 nbp = 0; 2667 dr6 = rdr6(); 2668 bp = dr6 & 0x0000000f; 2669 2670 if (!bp) { 2671 /* 2672 * None of the breakpoint bits are set meaning this 2673 * trap was not caused by any of the debug registers 2674 */ 2675 return 0; 2676 } 2677 2678 /* 2679 * at least one of the breakpoints were hit, check to see 2680 * which ones and if any of them are user space addresses 2681 */ 2682 2683 if (bp & 0x01) { 2684 addr[nbp++] = (caddr_t)rdr0(); 2685 } 2686 if (bp & 0x02) { 2687 addr[nbp++] = (caddr_t)rdr1(); 2688 } 2689 if (bp & 0x04) { 2690 addr[nbp++] = (caddr_t)rdr2(); 2691 } 2692 if (bp & 0x08) { 2693 addr[nbp++] = (caddr_t)rdr3(); 2694 } 2695 2696 for (i=0; i<nbp; i++) { 2697 if (addr[i] < 2698 (caddr_t)VM_MAXUSER_ADDRESS) { 2699 /* 2700 * addr[i] is in user space 2701 */ 2702 return nbp; 2703 } 2704 } 2705 2706 /* 2707 * None of the breakpoints are in user space. 2708 */ 2709 return 0; 2710} 2711 2712 2713#ifndef DDB 2714void 2715Debugger(const char *msg) 2716{ 2717 printf("Debugger(\"%s\") called.\n", msg); 2718} 2719#endif /* no DDB */ 2720 2721#ifdef DDB 2722 2723/* 2724 * Provide inb() and outb() as functions. They are normally only 2725 * available as macros calling inlined functions, thus cannot be 2726 * called inside DDB. 2727 * 2728 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 2729 */ 2730 2731#undef inb 2732#undef outb 2733 2734/* silence compiler warnings */ 2735u_char inb(u_int); 2736void outb(u_int, u_char); 2737 2738u_char 2739inb(u_int port) 2740{ 2741 u_char data; 2742 /* 2743 * We use %%dx and not %1 here because i/o is done at %dx and not at 2744 * %edx, while gcc generates inferior code (movw instead of movl) 2745 * if we tell it to load (u_short) port. 2746 */ 2747 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 2748 return (data); 2749} 2750 2751void 2752outb(u_int port, u_char data) 2753{ 2754 u_char al; 2755 /* 2756 * Use an unnecessary assignment to help gcc's register allocator. 2757 * This make a large difference for gcc-1.40 and a tiny difference 2758 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 2759 * best results. gcc-2.6.0 can't handle this. 2760 */ 2761 al = data; 2762 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 2763} 2764 2765#endif /* DDB */ 2766