imx6sl.dtsi revision 284090
1262569Simp/* 2262569Simp * Copyright 2013 Freescale Semiconductor, Inc. 3262569Simp * 4262569Simp * This program is free software; you can redistribute it and/or modify 5262569Simp * it under the terms of the GNU General Public License version 2 as 6262569Simp * published by the Free Software Foundation. 7262569Simp * 8262569Simp */ 9262569Simp 10270864Simp#include <dt-bindings/interrupt-controller/irq.h> 11262569Simp#include "skeleton.dtsi" 12262569Simp#include "imx6sl-pinfunc.h" 13262569Simp#include <dt-bindings/clock/imx6sl-clock.h> 14262569Simp 15262569Simp/ { 16262569Simp aliases { 17270864Simp ethernet0 = &fec; 18262569Simp gpio0 = &gpio1; 19262569Simp gpio1 = &gpio2; 20262569Simp gpio2 = &gpio3; 21262569Simp gpio3 = &gpio4; 22262569Simp gpio4 = &gpio5; 23262569Simp serial0 = &uart1; 24262569Simp serial1 = &uart2; 25262569Simp serial2 = &uart3; 26262569Simp serial3 = &uart4; 27262569Simp serial4 = &uart5; 28262569Simp spi0 = &ecspi1; 29262569Simp spi1 = &ecspi2; 30262569Simp spi2 = &ecspi3; 31262569Simp spi3 = &ecspi4; 32270864Simp usbphy0 = &usbphy1; 33270864Simp usbphy1 = &usbphy2; 34262569Simp }; 35262569Simp 36262569Simp cpus { 37262569Simp #address-cells = <1>; 38262569Simp #size-cells = <0>; 39262569Simp 40262569Simp cpu@0 { 41262569Simp compatible = "arm,cortex-a9"; 42262569Simp device_type = "cpu"; 43262569Simp reg = <0x0>; 44262569Simp next-level-cache = <&L2>; 45270864Simp operating-points = < 46270864Simp /* kHz uV */ 47270864Simp 996000 1275000 48270864Simp 792000 1175000 49270864Simp 396000 975000 50270864Simp >; 51270864Simp fsl,soc-operating-points = < 52270864Simp /* ARM kHz SOC-PU uV */ 53270864Simp 996000 1225000 54270864Simp 792000 1175000 55270864Simp 396000 1175000 56270864Simp >; 57270864Simp clock-latency = <61036>; /* two CLK32 periods */ 58270864Simp clocks = <&clks IMX6SL_CLK_ARM>, <&clks IMX6SL_CLK_PLL2_PFD2>, 59270864Simp <&clks IMX6SL_CLK_STEP>, <&clks IMX6SL_CLK_PLL1_SW>, 60270864Simp <&clks IMX6SL_CLK_PLL1_SYS>; 61270864Simp clock-names = "arm", "pll2_pfd2_396m", "step", 62270864Simp "pll1_sw", "pll1_sys"; 63270864Simp arm-supply = <®_arm>; 64270864Simp pu-supply = <®_pu>; 65270864Simp soc-supply = <®_soc>; 66262569Simp }; 67262569Simp }; 68262569Simp 69262569Simp intc: interrupt-controller@00a01000 { 70262569Simp compatible = "arm,cortex-a9-gic"; 71262569Simp #interrupt-cells = <3>; 72262569Simp interrupt-controller; 73262569Simp reg = <0x00a01000 0x1000>, 74262569Simp <0x00a00100 0x100>; 75262569Simp }; 76262569Simp 77262569Simp clocks { 78262569Simp #address-cells = <1>; 79262569Simp #size-cells = <0>; 80262569Simp 81262569Simp ckil { 82262569Simp compatible = "fixed-clock"; 83270864Simp #clock-cells = <0>; 84262569Simp clock-frequency = <32768>; 85262569Simp }; 86262569Simp 87262569Simp osc { 88262569Simp compatible = "fixed-clock"; 89270864Simp #clock-cells = <0>; 90262569Simp clock-frequency = <24000000>; 91262569Simp }; 92262569Simp }; 93262569Simp 94262569Simp soc { 95262569Simp #address-cells = <1>; 96262569Simp #size-cells = <1>; 97262569Simp compatible = "simple-bus"; 98262569Simp interrupt-parent = <&intc>; 99262569Simp ranges; 100262569Simp 101270864Simp ocram: sram@00900000 { 102270864Simp compatible = "mmio-sram"; 103270864Simp reg = <0x00900000 0x20000>; 104270864Simp clocks = <&clks IMX6SL_CLK_OCRAM>; 105270864Simp }; 106270864Simp 107262569Simp L2: l2-cache@00a02000 { 108262569Simp compatible = "arm,pl310-cache"; 109262569Simp reg = <0x00a02000 0x1000>; 110270864Simp interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>; 111262569Simp cache-unified; 112262569Simp cache-level = <2>; 113262569Simp arm,tag-latency = <4 2 3>; 114262569Simp arm,data-latency = <4 2 3>; 115262569Simp }; 116262569Simp 117262569Simp pmu { 118262569Simp compatible = "arm,cortex-a9-pmu"; 119270864Simp interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>; 120262569Simp }; 121262569Simp 122262569Simp aips1: aips-bus@02000000 { 123262569Simp compatible = "fsl,aips-bus", "simple-bus"; 124262569Simp #address-cells = <1>; 125262569Simp #size-cells = <1>; 126262569Simp reg = <0x02000000 0x100000>; 127262569Simp ranges; 128262569Simp 129262569Simp spba: spba-bus@02000000 { 130262569Simp compatible = "fsl,spba-bus", "simple-bus"; 131262569Simp #address-cells = <1>; 132262569Simp #size-cells = <1>; 133262569Simp reg = <0x02000000 0x40000>; 134262569Simp ranges; 135262569Simp 136262569Simp spdif: spdif@02004000 { 137262569Simp reg = <0x02004000 0x4000>; 138270864Simp interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>; 139262569Simp }; 140262569Simp 141262569Simp ecspi1: ecspi@02008000 { 142262569Simp #address-cells = <1>; 143262569Simp #size-cells = <0>; 144262569Simp compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi"; 145262569Simp reg = <0x02008000 0x4000>; 146270864Simp interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; 147262569Simp clocks = <&clks IMX6SL_CLK_ECSPI1>, 148262569Simp <&clks IMX6SL_CLK_ECSPI1>; 149262569Simp clock-names = "ipg", "per"; 150262569Simp status = "disabled"; 151262569Simp }; 152262569Simp 153262569Simp ecspi2: ecspi@0200c000 { 154262569Simp #address-cells = <1>; 155262569Simp #size-cells = <0>; 156262569Simp compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi"; 157262569Simp reg = <0x0200c000 0x4000>; 158270864Simp interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; 159262569Simp clocks = <&clks IMX6SL_CLK_ECSPI2>, 160262569Simp <&clks IMX6SL_CLK_ECSPI2>; 161262569Simp clock-names = "ipg", "per"; 162262569Simp status = "disabled"; 163262569Simp }; 164262569Simp 165262569Simp ecspi3: ecspi@02010000 { 166262569Simp #address-cells = <1>; 167262569Simp #size-cells = <0>; 168262569Simp compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi"; 169262569Simp reg = <0x02010000 0x4000>; 170270864Simp interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>; 171262569Simp clocks = <&clks IMX6SL_CLK_ECSPI3>, 172262569Simp <&clks IMX6SL_CLK_ECSPI3>; 173262569Simp clock-names = "ipg", "per"; 174262569Simp status = "disabled"; 175262569Simp }; 176262569Simp 177262569Simp ecspi4: ecspi@02014000 { 178262569Simp #address-cells = <1>; 179262569Simp #size-cells = <0>; 180262569Simp compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi"; 181262569Simp reg = <0x02014000 0x4000>; 182270864Simp interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; 183262569Simp clocks = <&clks IMX6SL_CLK_ECSPI4>, 184262569Simp <&clks IMX6SL_CLK_ECSPI4>; 185262569Simp clock-names = "ipg", "per"; 186262569Simp status = "disabled"; 187262569Simp }; 188262569Simp 189262569Simp uart5: serial@02018000 { 190262569Simp compatible = "fsl,imx6sl-uart", 191262569Simp "fsl,imx6q-uart", "fsl,imx21-uart"; 192262569Simp reg = <0x02018000 0x4000>; 193270864Simp interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>; 194262569Simp clocks = <&clks IMX6SL_CLK_UART>, 195262569Simp <&clks IMX6SL_CLK_UART_SERIAL>; 196262569Simp clock-names = "ipg", "per"; 197262569Simp dmas = <&sdma 33 4 0>, <&sdma 34 4 0>; 198262569Simp dma-names = "rx", "tx"; 199262569Simp status = "disabled"; 200262569Simp }; 201262569Simp 202262569Simp uart1: serial@02020000 { 203262569Simp compatible = "fsl,imx6sl-uart", 204262569Simp "fsl,imx6q-uart", "fsl,imx21-uart"; 205262569Simp reg = <0x02020000 0x4000>; 206270864Simp interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>; 207262569Simp clocks = <&clks IMX6SL_CLK_UART>, 208262569Simp <&clks IMX6SL_CLK_UART_SERIAL>; 209262569Simp clock-names = "ipg", "per"; 210262569Simp dmas = <&sdma 25 4 0>, <&sdma 26 4 0>; 211262569Simp dma-names = "rx", "tx"; 212262569Simp status = "disabled"; 213262569Simp }; 214262569Simp 215262569Simp uart2: serial@02024000 { 216262569Simp compatible = "fsl,imx6sl-uart", 217262569Simp "fsl,imx6q-uart", "fsl,imx21-uart"; 218262569Simp reg = <0x02024000 0x4000>; 219270864Simp interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>; 220262569Simp clocks = <&clks IMX6SL_CLK_UART>, 221262569Simp <&clks IMX6SL_CLK_UART_SERIAL>; 222262569Simp clock-names = "ipg", "per"; 223262569Simp dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; 224262569Simp dma-names = "rx", "tx"; 225262569Simp status = "disabled"; 226262569Simp }; 227262569Simp 228262569Simp ssi1: ssi@02028000 { 229284090Sian #sound-dai-cells = <0>; 230270864Simp compatible = "fsl,imx6sl-ssi", 231270864Simp "fsl,imx51-ssi"; 232262569Simp reg = <0x02028000 0x4000>; 233270864Simp interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; 234284090Sian clocks = <&clks IMX6SL_CLK_SSI1_IPG>, 235284090Sian <&clks IMX6SL_CLK_SSI1>; 236284090Sian clock-names = "ipg", "baud"; 237262569Simp dmas = <&sdma 37 1 0>, 238262569Simp <&sdma 38 1 0>; 239262569Simp dma-names = "rx", "tx"; 240262569Simp fsl,fifo-depth = <15>; 241262569Simp status = "disabled"; 242262569Simp }; 243262569Simp 244262569Simp ssi2: ssi@0202c000 { 245284090Sian #sound-dai-cells = <0>; 246270864Simp compatible = "fsl,imx6sl-ssi", 247270864Simp "fsl,imx51-ssi"; 248262569Simp reg = <0x0202c000 0x4000>; 249270864Simp interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; 250284090Sian clocks = <&clks IMX6SL_CLK_SSI2_IPG>, 251284090Sian <&clks IMX6SL_CLK_SSI2>; 252284090Sian clock-names = "ipg", "baud"; 253262569Simp dmas = <&sdma 41 1 0>, 254262569Simp <&sdma 42 1 0>; 255262569Simp dma-names = "rx", "tx"; 256262569Simp fsl,fifo-depth = <15>; 257262569Simp status = "disabled"; 258262569Simp }; 259262569Simp 260262569Simp ssi3: ssi@02030000 { 261284090Sian #sound-dai-cells = <0>; 262270864Simp compatible = "fsl,imx6sl-ssi", 263270864Simp "fsl,imx51-ssi"; 264262569Simp reg = <0x02030000 0x4000>; 265270864Simp interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>; 266284090Sian clocks = <&clks IMX6SL_CLK_SSI3_IPG>, 267284090Sian <&clks IMX6SL_CLK_SSI3>; 268284090Sian clock-names = "ipg", "baud"; 269262569Simp dmas = <&sdma 45 1 0>, 270262569Simp <&sdma 46 1 0>; 271262569Simp dma-names = "rx", "tx"; 272262569Simp fsl,fifo-depth = <15>; 273262569Simp status = "disabled"; 274262569Simp }; 275262569Simp 276262569Simp uart3: serial@02034000 { 277262569Simp compatible = "fsl,imx6sl-uart", 278262569Simp "fsl,imx6q-uart", "fsl,imx21-uart"; 279262569Simp reg = <0x02034000 0x4000>; 280270864Simp interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>; 281262569Simp clocks = <&clks IMX6SL_CLK_UART>, 282262569Simp <&clks IMX6SL_CLK_UART_SERIAL>; 283262569Simp clock-names = "ipg", "per"; 284262569Simp dmas = <&sdma 29 4 0>, <&sdma 30 4 0>; 285262569Simp dma-names = "rx", "tx"; 286262569Simp status = "disabled"; 287262569Simp }; 288262569Simp 289262569Simp uart4: serial@02038000 { 290262569Simp compatible = "fsl,imx6sl-uart", 291262569Simp "fsl,imx6q-uart", "fsl,imx21-uart"; 292262569Simp reg = <0x02038000 0x4000>; 293270864Simp interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; 294262569Simp clocks = <&clks IMX6SL_CLK_UART>, 295262569Simp <&clks IMX6SL_CLK_UART_SERIAL>; 296262569Simp clock-names = "ipg", "per"; 297262569Simp dmas = <&sdma 31 4 0>, <&sdma 32 4 0>; 298262569Simp dma-names = "rx", "tx"; 299262569Simp status = "disabled"; 300262569Simp }; 301262569Simp }; 302262569Simp 303262569Simp pwm1: pwm@02080000 { 304262569Simp #pwm-cells = <2>; 305262569Simp compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm"; 306262569Simp reg = <0x02080000 0x4000>; 307270864Simp interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>; 308262569Simp clocks = <&clks IMX6SL_CLK_PWM1>, 309262569Simp <&clks IMX6SL_CLK_PWM1>; 310262569Simp clock-names = "ipg", "per"; 311262569Simp }; 312262569Simp 313262569Simp pwm2: pwm@02084000 { 314262569Simp #pwm-cells = <2>; 315262569Simp compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm"; 316262569Simp reg = <0x02084000 0x4000>; 317270864Simp interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; 318262569Simp clocks = <&clks IMX6SL_CLK_PWM2>, 319262569Simp <&clks IMX6SL_CLK_PWM2>; 320262569Simp clock-names = "ipg", "per"; 321262569Simp }; 322262569Simp 323262569Simp pwm3: pwm@02088000 { 324262569Simp #pwm-cells = <2>; 325262569Simp compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm"; 326262569Simp reg = <0x02088000 0x4000>; 327270864Simp interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>; 328262569Simp clocks = <&clks IMX6SL_CLK_PWM3>, 329262569Simp <&clks IMX6SL_CLK_PWM3>; 330262569Simp clock-names = "ipg", "per"; 331262569Simp }; 332262569Simp 333262569Simp pwm4: pwm@0208c000 { 334262569Simp #pwm-cells = <2>; 335262569Simp compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm"; 336262569Simp reg = <0x0208c000 0x4000>; 337270864Simp interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; 338262569Simp clocks = <&clks IMX6SL_CLK_PWM4>, 339262569Simp <&clks IMX6SL_CLK_PWM4>; 340262569Simp clock-names = "ipg", "per"; 341262569Simp }; 342262569Simp 343262569Simp gpt: gpt@02098000 { 344262569Simp compatible = "fsl,imx6sl-gpt"; 345262569Simp reg = <0x02098000 0x4000>; 346270864Simp interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>; 347262569Simp clocks = <&clks IMX6SL_CLK_GPT>, 348262569Simp <&clks IMX6SL_CLK_GPT_SERIAL>; 349262569Simp clock-names = "ipg", "per"; 350262569Simp }; 351262569Simp 352262569Simp gpio1: gpio@0209c000 { 353262569Simp compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio"; 354262569Simp reg = <0x0209c000 0x4000>; 355270864Simp interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>, 356270864Simp <0 67 IRQ_TYPE_LEVEL_HIGH>; 357262569Simp gpio-controller; 358262569Simp #gpio-cells = <2>; 359262569Simp interrupt-controller; 360262569Simp #interrupt-cells = <2>; 361262569Simp }; 362262569Simp 363262569Simp gpio2: gpio@020a0000 { 364262569Simp compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio"; 365262569Simp reg = <0x020a0000 0x4000>; 366270864Simp interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>, 367270864Simp <0 69 IRQ_TYPE_LEVEL_HIGH>; 368262569Simp gpio-controller; 369262569Simp #gpio-cells = <2>; 370262569Simp interrupt-controller; 371262569Simp #interrupt-cells = <2>; 372262569Simp }; 373262569Simp 374262569Simp gpio3: gpio@020a4000 { 375262569Simp compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio"; 376262569Simp reg = <0x020a4000 0x4000>; 377270864Simp interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>, 378270864Simp <0 71 IRQ_TYPE_LEVEL_HIGH>; 379262569Simp gpio-controller; 380262569Simp #gpio-cells = <2>; 381262569Simp interrupt-controller; 382262569Simp #interrupt-cells = <2>; 383262569Simp }; 384262569Simp 385262569Simp gpio4: gpio@020a8000 { 386262569Simp compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio"; 387262569Simp reg = <0x020a8000 0x4000>; 388270864Simp interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>, 389270864Simp <0 73 IRQ_TYPE_LEVEL_HIGH>; 390262569Simp gpio-controller; 391262569Simp #gpio-cells = <2>; 392262569Simp interrupt-controller; 393262569Simp #interrupt-cells = <2>; 394262569Simp }; 395262569Simp 396262569Simp gpio5: gpio@020ac000 { 397262569Simp compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio"; 398262569Simp reg = <0x020ac000 0x4000>; 399270864Simp interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>, 400270864Simp <0 75 IRQ_TYPE_LEVEL_HIGH>; 401262569Simp gpio-controller; 402262569Simp #gpio-cells = <2>; 403262569Simp interrupt-controller; 404262569Simp #interrupt-cells = <2>; 405262569Simp }; 406262569Simp 407262569Simp kpp: kpp@020b8000 { 408270864Simp compatible = "fsl,imx6sl-kpp", "fsl,imx21-kpp"; 409262569Simp reg = <0x020b8000 0x4000>; 410270864Simp interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>; 411270864Simp clocks = <&clks IMX6SL_CLK_DUMMY>; 412270864Simp status = "disabled"; 413262569Simp }; 414262569Simp 415262569Simp wdog1: wdog@020bc000 { 416262569Simp compatible = "fsl,imx6sl-wdt", "fsl,imx21-wdt"; 417262569Simp reg = <0x020bc000 0x4000>; 418270864Simp interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>; 419262569Simp clocks = <&clks IMX6SL_CLK_DUMMY>; 420262569Simp }; 421262569Simp 422262569Simp wdog2: wdog@020c0000 { 423262569Simp compatible = "fsl,imx6sl-wdt", "fsl,imx21-wdt"; 424262569Simp reg = <0x020c0000 0x4000>; 425270864Simp interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>; 426262569Simp clocks = <&clks IMX6SL_CLK_DUMMY>; 427262569Simp status = "disabled"; 428262569Simp }; 429262569Simp 430262569Simp clks: ccm@020c4000 { 431262569Simp compatible = "fsl,imx6sl-ccm"; 432262569Simp reg = <0x020c4000 0x4000>; 433270864Simp interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>, 434270864Simp <0 88 IRQ_TYPE_LEVEL_HIGH>; 435262569Simp #clock-cells = <1>; 436262569Simp }; 437262569Simp 438262569Simp anatop: anatop@020c8000 { 439262569Simp compatible = "fsl,imx6sl-anatop", 440262569Simp "fsl,imx6q-anatop", 441262569Simp "syscon", "simple-bus"; 442262569Simp reg = <0x020c8000 0x1000>; 443270864Simp interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>, 444270864Simp <0 54 IRQ_TYPE_LEVEL_HIGH>, 445270864Simp <0 127 IRQ_TYPE_LEVEL_HIGH>; 446262569Simp 447262569Simp regulator-1p1@110 { 448262569Simp compatible = "fsl,anatop-regulator"; 449262569Simp regulator-name = "vdd1p1"; 450262569Simp regulator-min-microvolt = <800000>; 451262569Simp regulator-max-microvolt = <1375000>; 452262569Simp regulator-always-on; 453262569Simp anatop-reg-offset = <0x110>; 454262569Simp anatop-vol-bit-shift = <8>; 455262569Simp anatop-vol-bit-width = <5>; 456262569Simp anatop-min-bit-val = <4>; 457262569Simp anatop-min-voltage = <800000>; 458262569Simp anatop-max-voltage = <1375000>; 459262569Simp }; 460262569Simp 461262569Simp regulator-3p0@120 { 462262569Simp compatible = "fsl,anatop-regulator"; 463262569Simp regulator-name = "vdd3p0"; 464262569Simp regulator-min-microvolt = <2800000>; 465262569Simp regulator-max-microvolt = <3150000>; 466262569Simp regulator-always-on; 467262569Simp anatop-reg-offset = <0x120>; 468262569Simp anatop-vol-bit-shift = <8>; 469262569Simp anatop-vol-bit-width = <5>; 470262569Simp anatop-min-bit-val = <0>; 471262569Simp anatop-min-voltage = <2625000>; 472262569Simp anatop-max-voltage = <3400000>; 473262569Simp }; 474262569Simp 475262569Simp regulator-2p5@130 { 476262569Simp compatible = "fsl,anatop-regulator"; 477262569Simp regulator-name = "vdd2p5"; 478262569Simp regulator-min-microvolt = <2100000>; 479262569Simp regulator-max-microvolt = <2850000>; 480262569Simp regulator-always-on; 481262569Simp anatop-reg-offset = <0x130>; 482262569Simp anatop-vol-bit-shift = <8>; 483262569Simp anatop-vol-bit-width = <5>; 484262569Simp anatop-min-bit-val = <0>; 485262569Simp anatop-min-voltage = <2100000>; 486262569Simp anatop-max-voltage = <2850000>; 487262569Simp }; 488262569Simp 489262569Simp reg_arm: regulator-vddcore@140 { 490262569Simp compatible = "fsl,anatop-regulator"; 491270864Simp regulator-name = "vddarm"; 492262569Simp regulator-min-microvolt = <725000>; 493262569Simp regulator-max-microvolt = <1450000>; 494262569Simp regulator-always-on; 495262569Simp anatop-reg-offset = <0x140>; 496262569Simp anatop-vol-bit-shift = <0>; 497262569Simp anatop-vol-bit-width = <5>; 498262569Simp anatop-delay-reg-offset = <0x170>; 499262569Simp anatop-delay-bit-shift = <24>; 500262569Simp anatop-delay-bit-width = <2>; 501262569Simp anatop-min-bit-val = <1>; 502262569Simp anatop-min-voltage = <725000>; 503262569Simp anatop-max-voltage = <1450000>; 504262569Simp }; 505262569Simp 506262569Simp reg_pu: regulator-vddpu@140 { 507262569Simp compatible = "fsl,anatop-regulator"; 508262569Simp regulator-name = "vddpu"; 509262569Simp regulator-min-microvolt = <725000>; 510262569Simp regulator-max-microvolt = <1450000>; 511262569Simp regulator-always-on; 512262569Simp anatop-reg-offset = <0x140>; 513262569Simp anatop-vol-bit-shift = <9>; 514262569Simp anatop-vol-bit-width = <5>; 515262569Simp anatop-delay-reg-offset = <0x170>; 516262569Simp anatop-delay-bit-shift = <26>; 517262569Simp anatop-delay-bit-width = <2>; 518262569Simp anatop-min-bit-val = <1>; 519262569Simp anatop-min-voltage = <725000>; 520262569Simp anatop-max-voltage = <1450000>; 521262569Simp }; 522262569Simp 523262569Simp reg_soc: regulator-vddsoc@140 { 524262569Simp compatible = "fsl,anatop-regulator"; 525262569Simp regulator-name = "vddsoc"; 526262569Simp regulator-min-microvolt = <725000>; 527262569Simp regulator-max-microvolt = <1450000>; 528262569Simp regulator-always-on; 529262569Simp anatop-reg-offset = <0x140>; 530262569Simp anatop-vol-bit-shift = <18>; 531262569Simp anatop-vol-bit-width = <5>; 532262569Simp anatop-delay-reg-offset = <0x170>; 533262569Simp anatop-delay-bit-shift = <28>; 534262569Simp anatop-delay-bit-width = <2>; 535262569Simp anatop-min-bit-val = <1>; 536262569Simp anatop-min-voltage = <725000>; 537262569Simp anatop-max-voltage = <1450000>; 538262569Simp }; 539262569Simp }; 540262569Simp 541284090Sian tempmon: tempmon { 542284090Sian compatible = "fsl,imx6q-tempmon"; 543284090Sian interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>; 544284090Sian fsl,tempmon = <&anatop>; 545284090Sian fsl,tempmon-data = <&ocotp>; 546284090Sian clocks = <&clks IMX6SL_CLK_PLL3_USB_OTG>; 547284090Sian }; 548284090Sian 549262569Simp usbphy1: usbphy@020c9000 { 550262569Simp compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy"; 551262569Simp reg = <0x020c9000 0x1000>; 552270864Simp interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>; 553262569Simp clocks = <&clks IMX6SL_CLK_USBPHY1>; 554270864Simp fsl,anatop = <&anatop>; 555262569Simp }; 556262569Simp 557262569Simp usbphy2: usbphy@020ca000 { 558262569Simp compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy"; 559262569Simp reg = <0x020ca000 0x1000>; 560270864Simp interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>; 561262569Simp clocks = <&clks IMX6SL_CLK_USBPHY2>; 562270864Simp fsl,anatop = <&anatop>; 563262569Simp }; 564262569Simp 565262569Simp snvs@020cc000 { 566262569Simp compatible = "fsl,sec-v4.0-mon", "simple-bus"; 567262569Simp #address-cells = <1>; 568262569Simp #size-cells = <1>; 569262569Simp ranges = <0 0x020cc000 0x4000>; 570262569Simp 571262569Simp snvs-rtc-lp@34 { 572262569Simp compatible = "fsl,sec-v4.0-mon-rtc-lp"; 573262569Simp reg = <0x34 0x58>; 574270864Simp interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>, 575270864Simp <0 20 IRQ_TYPE_LEVEL_HIGH>; 576262569Simp }; 577284090Sian 578284090Sian snvs_poweroff: snvs-poweroff@38 { 579284090Sian compatible = "fsl,sec-v4.0-poweroff"; 580284090Sian reg = <0x38 0x4>; 581284090Sian status = "disabled"; 582284090Sian }; 583262569Simp }; 584262569Simp 585262569Simp epit1: epit@020d0000 { 586262569Simp reg = <0x020d0000 0x4000>; 587270864Simp interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; 588262569Simp }; 589262569Simp 590262569Simp epit2: epit@020d4000 { 591262569Simp reg = <0x020d4000 0x4000>; 592270864Simp interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; 593262569Simp }; 594262569Simp 595262569Simp src: src@020d8000 { 596262569Simp compatible = "fsl,imx6sl-src", "fsl,imx51-src"; 597262569Simp reg = <0x020d8000 0x4000>; 598270864Simp interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>, 599270864Simp <0 96 IRQ_TYPE_LEVEL_HIGH>; 600262569Simp #reset-cells = <1>; 601262569Simp }; 602262569Simp 603262569Simp gpc: gpc@020dc000 { 604262569Simp compatible = "fsl,imx6sl-gpc", "fsl,imx6q-gpc"; 605262569Simp reg = <0x020dc000 0x4000>; 606270864Simp interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; 607262569Simp }; 608262569Simp 609262569Simp gpr: iomuxc-gpr@020e0000 { 610262569Simp compatible = "fsl,imx6sl-iomuxc-gpr", 611262569Simp "fsl,imx6q-iomuxc-gpr", "syscon"; 612262569Simp reg = <0x020e0000 0x38>; 613262569Simp }; 614262569Simp 615262569Simp iomuxc: iomuxc@020e0000 { 616262569Simp compatible = "fsl,imx6sl-iomuxc"; 617262569Simp reg = <0x020e0000 0x4000>; 618262569Simp }; 619262569Simp 620262569Simp csi: csi@020e4000 { 621262569Simp reg = <0x020e4000 0x4000>; 622270864Simp interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>; 623262569Simp }; 624262569Simp 625262569Simp spdc: spdc@020e8000 { 626262569Simp reg = <0x020e8000 0x4000>; 627270864Simp interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>; 628262569Simp }; 629262569Simp 630262569Simp sdma: sdma@020ec000 { 631270864Simp compatible = "fsl,imx6sl-sdma", "fsl,imx6q-sdma"; 632262569Simp reg = <0x020ec000 0x4000>; 633270864Simp interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>; 634262569Simp clocks = <&clks IMX6SL_CLK_SDMA>, 635262569Simp <&clks IMX6SL_CLK_SDMA>; 636262569Simp clock-names = "ipg", "ahb"; 637262569Simp #dma-cells = <3>; 638262569Simp /* imx6sl reuses imx6q sdma firmware */ 639262569Simp fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; 640262569Simp }; 641262569Simp 642262569Simp pxp: pxp@020f0000 { 643262569Simp reg = <0x020f0000 0x4000>; 644270864Simp interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>; 645262569Simp }; 646262569Simp 647262569Simp epdc: epdc@020f4000 { 648262569Simp reg = <0x020f4000 0x4000>; 649270864Simp interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>; 650262569Simp }; 651262569Simp 652262569Simp lcdif: lcdif@020f8000 { 653284090Sian compatible = "fsl,imx6sl-lcdif", "fsl,imx28-lcdif"; 654262569Simp reg = <0x020f8000 0x4000>; 655270864Simp interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>; 656284090Sian clocks = <&clks IMX6SL_CLK_LCDIF_PIX>, 657284090Sian <&clks IMX6SL_CLK_LCDIF_AXI>, 658284090Sian <&clks IMX6SL_CLK_DUMMY>; 659284090Sian clock-names = "pix", "axi", "disp_axi"; 660284090Sian status = "disabled"; 661262569Simp }; 662262569Simp 663262569Simp dcp: dcp@020fc000 { 664262569Simp reg = <0x020fc000 0x4000>; 665270864Simp interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>; 666262569Simp }; 667262569Simp }; 668262569Simp 669262569Simp aips2: aips-bus@02100000 { 670262569Simp compatible = "fsl,aips-bus", "simple-bus"; 671262569Simp #address-cells = <1>; 672262569Simp #size-cells = <1>; 673262569Simp reg = <0x02100000 0x100000>; 674262569Simp ranges; 675262569Simp 676262569Simp usbotg1: usb@02184000 { 677262569Simp compatible = "fsl,imx6sl-usb", "fsl,imx27-usb"; 678262569Simp reg = <0x02184000 0x200>; 679270864Simp interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>; 680262569Simp clocks = <&clks IMX6SL_CLK_USBOH3>; 681262569Simp fsl,usbphy = <&usbphy1>; 682262569Simp fsl,usbmisc = <&usbmisc 0>; 683262569Simp status = "disabled"; 684262569Simp }; 685262569Simp 686262569Simp usbotg2: usb@02184200 { 687262569Simp compatible = "fsl,imx6sl-usb", "fsl,imx27-usb"; 688262569Simp reg = <0x02184200 0x200>; 689270864Simp interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>; 690262569Simp clocks = <&clks IMX6SL_CLK_USBOH3>; 691262569Simp fsl,usbphy = <&usbphy2>; 692262569Simp fsl,usbmisc = <&usbmisc 1>; 693262569Simp status = "disabled"; 694262569Simp }; 695262569Simp 696262569Simp usbh: usb@02184400 { 697262569Simp compatible = "fsl,imx6sl-usb", "fsl,imx27-usb"; 698262569Simp reg = <0x02184400 0x200>; 699270864Simp interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>; 700262569Simp clocks = <&clks IMX6SL_CLK_USBOH3>; 701262569Simp fsl,usbmisc = <&usbmisc 2>; 702262569Simp status = "disabled"; 703262569Simp }; 704262569Simp 705262569Simp usbmisc: usbmisc@02184800 { 706262569Simp #index-cells = <1>; 707262569Simp compatible = "fsl,imx6sl-usbmisc", "fsl,imx6q-usbmisc"; 708262569Simp reg = <0x02184800 0x200>; 709262569Simp clocks = <&clks IMX6SL_CLK_USBOH3>; 710262569Simp }; 711262569Simp 712262569Simp fec: ethernet@02188000 { 713262569Simp compatible = "fsl,imx6sl-fec", "fsl,imx25-fec"; 714262569Simp reg = <0x02188000 0x4000>; 715270864Simp interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>; 716270864Simp clocks = <&clks IMX6SL_CLK_ENET>, 717262569Simp <&clks IMX6SL_CLK_ENET_REF>; 718262569Simp clock-names = "ipg", "ahb"; 719262569Simp status = "disabled"; 720262569Simp }; 721262569Simp 722262569Simp usdhc1: usdhc@02190000 { 723262569Simp compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc"; 724262569Simp reg = <0x02190000 0x4000>; 725270864Simp interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; 726262569Simp clocks = <&clks IMX6SL_CLK_USDHC1>, 727262569Simp <&clks IMX6SL_CLK_USDHC1>, 728262569Simp <&clks IMX6SL_CLK_USDHC1>; 729262569Simp clock-names = "ipg", "ahb", "per"; 730262569Simp bus-width = <4>; 731262569Simp status = "disabled"; 732262569Simp }; 733262569Simp 734262569Simp usdhc2: usdhc@02194000 { 735262569Simp compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc"; 736262569Simp reg = <0x02194000 0x4000>; 737270864Simp interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; 738262569Simp clocks = <&clks IMX6SL_CLK_USDHC2>, 739262569Simp <&clks IMX6SL_CLK_USDHC2>, 740262569Simp <&clks IMX6SL_CLK_USDHC2>; 741262569Simp clock-names = "ipg", "ahb", "per"; 742262569Simp bus-width = <4>; 743262569Simp status = "disabled"; 744262569Simp }; 745262569Simp 746262569Simp usdhc3: usdhc@02198000 { 747262569Simp compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc"; 748262569Simp reg = <0x02198000 0x4000>; 749270864Simp interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; 750262569Simp clocks = <&clks IMX6SL_CLK_USDHC3>, 751262569Simp <&clks IMX6SL_CLK_USDHC3>, 752262569Simp <&clks IMX6SL_CLK_USDHC3>; 753262569Simp clock-names = "ipg", "ahb", "per"; 754262569Simp bus-width = <4>; 755262569Simp status = "disabled"; 756262569Simp }; 757262569Simp 758262569Simp usdhc4: usdhc@0219c000 { 759262569Simp compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc"; 760262569Simp reg = <0x0219c000 0x4000>; 761270864Simp interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>; 762262569Simp clocks = <&clks IMX6SL_CLK_USDHC4>, 763262569Simp <&clks IMX6SL_CLK_USDHC4>, 764262569Simp <&clks IMX6SL_CLK_USDHC4>; 765262569Simp clock-names = "ipg", "ahb", "per"; 766262569Simp bus-width = <4>; 767262569Simp status = "disabled"; 768262569Simp }; 769262569Simp 770262569Simp i2c1: i2c@021a0000 { 771262569Simp #address-cells = <1>; 772262569Simp #size-cells = <0>; 773262569Simp compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c"; 774262569Simp reg = <0x021a0000 0x4000>; 775270864Simp interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>; 776262569Simp clocks = <&clks IMX6SL_CLK_I2C1>; 777262569Simp status = "disabled"; 778262569Simp }; 779262569Simp 780262569Simp i2c2: i2c@021a4000 { 781262569Simp #address-cells = <1>; 782262569Simp #size-cells = <0>; 783262569Simp compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c"; 784262569Simp reg = <0x021a4000 0x4000>; 785270864Simp interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>; 786262569Simp clocks = <&clks IMX6SL_CLK_I2C2>; 787262569Simp status = "disabled"; 788262569Simp }; 789262569Simp 790262569Simp i2c3: i2c@021a8000 { 791262569Simp #address-cells = <1>; 792262569Simp #size-cells = <0>; 793262569Simp compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c"; 794262569Simp reg = <0x021a8000 0x4000>; 795270864Simp interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>; 796262569Simp clocks = <&clks IMX6SL_CLK_I2C3>; 797262569Simp status = "disabled"; 798262569Simp }; 799262569Simp 800262569Simp mmdc: mmdc@021b0000 { 801262569Simp compatible = "fsl,imx6sl-mmdc", "fsl,imx6q-mmdc"; 802262569Simp reg = <0x021b0000 0x4000>; 803262569Simp }; 804262569Simp 805262569Simp rngb: rngb@021b4000 { 806262569Simp reg = <0x021b4000 0x4000>; 807270864Simp interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>; 808262569Simp }; 809262569Simp 810262569Simp weim: weim@021b8000 { 811262569Simp reg = <0x021b8000 0x4000>; 812270864Simp interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>; 813262569Simp }; 814262569Simp 815262569Simp ocotp: ocotp@021bc000 { 816284090Sian compatible = "fsl,imx6sl-ocotp", "syscon"; 817262569Simp reg = <0x021bc000 0x4000>; 818262569Simp }; 819262569Simp 820262569Simp audmux: audmux@021d8000 { 821262569Simp compatible = "fsl,imx6sl-audmux", "fsl,imx31-audmux"; 822262569Simp reg = <0x021d8000 0x4000>; 823262569Simp status = "disabled"; 824262569Simp }; 825262569Simp }; 826262569Simp }; 827262569Simp}; 828