imx6sl.dtsi revision 270864
1262569Simp/* 2262569Simp * Copyright 2013 Freescale Semiconductor, Inc. 3262569Simp * 4262569Simp * This program is free software; you can redistribute it and/or modify 5262569Simp * it under the terms of the GNU General Public License version 2 as 6262569Simp * published by the Free Software Foundation. 7262569Simp * 8262569Simp */ 9262569Simp 10270864Simp#include <dt-bindings/interrupt-controller/irq.h> 11262569Simp#include "skeleton.dtsi" 12262569Simp#include "imx6sl-pinfunc.h" 13262569Simp#include <dt-bindings/clock/imx6sl-clock.h> 14262569Simp 15262569Simp/ { 16262569Simp aliases { 17270864Simp ethernet0 = &fec; 18262569Simp gpio0 = &gpio1; 19262569Simp gpio1 = &gpio2; 20262569Simp gpio2 = &gpio3; 21262569Simp gpio3 = &gpio4; 22262569Simp gpio4 = &gpio5; 23262569Simp serial0 = &uart1; 24262569Simp serial1 = &uart2; 25262569Simp serial2 = &uart3; 26262569Simp serial3 = &uart4; 27262569Simp serial4 = &uart5; 28262569Simp spi0 = &ecspi1; 29262569Simp spi1 = &ecspi2; 30262569Simp spi2 = &ecspi3; 31262569Simp spi3 = &ecspi4; 32270864Simp usbphy0 = &usbphy1; 33270864Simp usbphy1 = &usbphy2; 34262569Simp }; 35262569Simp 36262569Simp cpus { 37262569Simp #address-cells = <1>; 38262569Simp #size-cells = <0>; 39262569Simp 40262569Simp cpu@0 { 41262569Simp compatible = "arm,cortex-a9"; 42262569Simp device_type = "cpu"; 43262569Simp reg = <0x0>; 44262569Simp next-level-cache = <&L2>; 45270864Simp operating-points = < 46270864Simp /* kHz uV */ 47270864Simp 996000 1275000 48270864Simp 792000 1175000 49270864Simp 396000 975000 50270864Simp >; 51270864Simp fsl,soc-operating-points = < 52270864Simp /* ARM kHz SOC-PU uV */ 53270864Simp 996000 1225000 54270864Simp 792000 1175000 55270864Simp 396000 1175000 56270864Simp >; 57270864Simp clock-latency = <61036>; /* two CLK32 periods */ 58270864Simp clocks = <&clks IMX6SL_CLK_ARM>, <&clks IMX6SL_CLK_PLL2_PFD2>, 59270864Simp <&clks IMX6SL_CLK_STEP>, <&clks IMX6SL_CLK_PLL1_SW>, 60270864Simp <&clks IMX6SL_CLK_PLL1_SYS>; 61270864Simp clock-names = "arm", "pll2_pfd2_396m", "step", 62270864Simp "pll1_sw", "pll1_sys"; 63270864Simp arm-supply = <®_arm>; 64270864Simp pu-supply = <®_pu>; 65270864Simp soc-supply = <®_soc>; 66262569Simp }; 67262569Simp }; 68262569Simp 69262569Simp intc: interrupt-controller@00a01000 { 70262569Simp compatible = "arm,cortex-a9-gic"; 71262569Simp #interrupt-cells = <3>; 72262569Simp interrupt-controller; 73262569Simp reg = <0x00a01000 0x1000>, 74262569Simp <0x00a00100 0x100>; 75262569Simp }; 76262569Simp 77262569Simp clocks { 78262569Simp #address-cells = <1>; 79262569Simp #size-cells = <0>; 80262569Simp 81262569Simp ckil { 82262569Simp compatible = "fixed-clock"; 83270864Simp #clock-cells = <0>; 84262569Simp clock-frequency = <32768>; 85262569Simp }; 86262569Simp 87262569Simp osc { 88262569Simp compatible = "fixed-clock"; 89270864Simp #clock-cells = <0>; 90262569Simp clock-frequency = <24000000>; 91262569Simp }; 92262569Simp }; 93262569Simp 94262569Simp soc { 95262569Simp #address-cells = <1>; 96262569Simp #size-cells = <1>; 97262569Simp compatible = "simple-bus"; 98262569Simp interrupt-parent = <&intc>; 99262569Simp ranges; 100262569Simp 101270864Simp ocram: sram@00900000 { 102270864Simp compatible = "mmio-sram"; 103270864Simp reg = <0x00900000 0x20000>; 104270864Simp clocks = <&clks IMX6SL_CLK_OCRAM>; 105270864Simp }; 106270864Simp 107262569Simp L2: l2-cache@00a02000 { 108262569Simp compatible = "arm,pl310-cache"; 109262569Simp reg = <0x00a02000 0x1000>; 110270864Simp interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>; 111262569Simp cache-unified; 112262569Simp cache-level = <2>; 113262569Simp arm,tag-latency = <4 2 3>; 114262569Simp arm,data-latency = <4 2 3>; 115262569Simp }; 116262569Simp 117262569Simp pmu { 118262569Simp compatible = "arm,cortex-a9-pmu"; 119270864Simp interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>; 120262569Simp }; 121262569Simp 122262569Simp aips1: aips-bus@02000000 { 123262569Simp compatible = "fsl,aips-bus", "simple-bus"; 124262569Simp #address-cells = <1>; 125262569Simp #size-cells = <1>; 126262569Simp reg = <0x02000000 0x100000>; 127262569Simp ranges; 128262569Simp 129262569Simp spba: spba-bus@02000000 { 130262569Simp compatible = "fsl,spba-bus", "simple-bus"; 131262569Simp #address-cells = <1>; 132262569Simp #size-cells = <1>; 133262569Simp reg = <0x02000000 0x40000>; 134262569Simp ranges; 135262569Simp 136262569Simp spdif: spdif@02004000 { 137262569Simp reg = <0x02004000 0x4000>; 138270864Simp interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>; 139262569Simp }; 140262569Simp 141262569Simp ecspi1: ecspi@02008000 { 142262569Simp #address-cells = <1>; 143262569Simp #size-cells = <0>; 144262569Simp compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi"; 145262569Simp reg = <0x02008000 0x4000>; 146270864Simp interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; 147262569Simp clocks = <&clks IMX6SL_CLK_ECSPI1>, 148262569Simp <&clks IMX6SL_CLK_ECSPI1>; 149262569Simp clock-names = "ipg", "per"; 150262569Simp status = "disabled"; 151262569Simp }; 152262569Simp 153262569Simp ecspi2: ecspi@0200c000 { 154262569Simp #address-cells = <1>; 155262569Simp #size-cells = <0>; 156262569Simp compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi"; 157262569Simp reg = <0x0200c000 0x4000>; 158270864Simp interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; 159262569Simp clocks = <&clks IMX6SL_CLK_ECSPI2>, 160262569Simp <&clks IMX6SL_CLK_ECSPI2>; 161262569Simp clock-names = "ipg", "per"; 162262569Simp status = "disabled"; 163262569Simp }; 164262569Simp 165262569Simp ecspi3: ecspi@02010000 { 166262569Simp #address-cells = <1>; 167262569Simp #size-cells = <0>; 168262569Simp compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi"; 169262569Simp reg = <0x02010000 0x4000>; 170270864Simp interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>; 171262569Simp clocks = <&clks IMX6SL_CLK_ECSPI3>, 172262569Simp <&clks IMX6SL_CLK_ECSPI3>; 173262569Simp clock-names = "ipg", "per"; 174262569Simp status = "disabled"; 175262569Simp }; 176262569Simp 177262569Simp ecspi4: ecspi@02014000 { 178262569Simp #address-cells = <1>; 179262569Simp #size-cells = <0>; 180262569Simp compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi"; 181262569Simp reg = <0x02014000 0x4000>; 182270864Simp interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; 183262569Simp clocks = <&clks IMX6SL_CLK_ECSPI4>, 184262569Simp <&clks IMX6SL_CLK_ECSPI4>; 185262569Simp clock-names = "ipg", "per"; 186262569Simp status = "disabled"; 187262569Simp }; 188262569Simp 189262569Simp uart5: serial@02018000 { 190262569Simp compatible = "fsl,imx6sl-uart", 191262569Simp "fsl,imx6q-uart", "fsl,imx21-uart"; 192262569Simp reg = <0x02018000 0x4000>; 193270864Simp interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>; 194262569Simp clocks = <&clks IMX6SL_CLK_UART>, 195262569Simp <&clks IMX6SL_CLK_UART_SERIAL>; 196262569Simp clock-names = "ipg", "per"; 197262569Simp dmas = <&sdma 33 4 0>, <&sdma 34 4 0>; 198262569Simp dma-names = "rx", "tx"; 199262569Simp status = "disabled"; 200262569Simp }; 201262569Simp 202262569Simp uart1: serial@02020000 { 203262569Simp compatible = "fsl,imx6sl-uart", 204262569Simp "fsl,imx6q-uart", "fsl,imx21-uart"; 205262569Simp reg = <0x02020000 0x4000>; 206270864Simp interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>; 207262569Simp clocks = <&clks IMX6SL_CLK_UART>, 208262569Simp <&clks IMX6SL_CLK_UART_SERIAL>; 209262569Simp clock-names = "ipg", "per"; 210262569Simp dmas = <&sdma 25 4 0>, <&sdma 26 4 0>; 211262569Simp dma-names = "rx", "tx"; 212262569Simp status = "disabled"; 213262569Simp }; 214262569Simp 215262569Simp uart2: serial@02024000 { 216262569Simp compatible = "fsl,imx6sl-uart", 217262569Simp "fsl,imx6q-uart", "fsl,imx21-uart"; 218262569Simp reg = <0x02024000 0x4000>; 219270864Simp interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>; 220262569Simp clocks = <&clks IMX6SL_CLK_UART>, 221262569Simp <&clks IMX6SL_CLK_UART_SERIAL>; 222262569Simp clock-names = "ipg", "per"; 223262569Simp dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; 224262569Simp dma-names = "rx", "tx"; 225262569Simp status = "disabled"; 226262569Simp }; 227262569Simp 228262569Simp ssi1: ssi@02028000 { 229270864Simp compatible = "fsl,imx6sl-ssi", 230270864Simp "fsl,imx51-ssi"; 231262569Simp reg = <0x02028000 0x4000>; 232270864Simp interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; 233262569Simp clocks = <&clks IMX6SL_CLK_SSI1>; 234262569Simp dmas = <&sdma 37 1 0>, 235262569Simp <&sdma 38 1 0>; 236262569Simp dma-names = "rx", "tx"; 237262569Simp fsl,fifo-depth = <15>; 238262569Simp status = "disabled"; 239262569Simp }; 240262569Simp 241262569Simp ssi2: ssi@0202c000 { 242270864Simp compatible = "fsl,imx6sl-ssi", 243270864Simp "fsl,imx51-ssi"; 244262569Simp reg = <0x0202c000 0x4000>; 245270864Simp interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; 246262569Simp clocks = <&clks IMX6SL_CLK_SSI2>; 247262569Simp dmas = <&sdma 41 1 0>, 248262569Simp <&sdma 42 1 0>; 249262569Simp dma-names = "rx", "tx"; 250262569Simp fsl,fifo-depth = <15>; 251262569Simp status = "disabled"; 252262569Simp }; 253262569Simp 254262569Simp ssi3: ssi@02030000 { 255270864Simp compatible = "fsl,imx6sl-ssi", 256270864Simp "fsl,imx51-ssi"; 257262569Simp reg = <0x02030000 0x4000>; 258270864Simp interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>; 259262569Simp clocks = <&clks IMX6SL_CLK_SSI3>; 260262569Simp dmas = <&sdma 45 1 0>, 261262569Simp <&sdma 46 1 0>; 262262569Simp dma-names = "rx", "tx"; 263262569Simp fsl,fifo-depth = <15>; 264262569Simp status = "disabled"; 265262569Simp }; 266262569Simp 267262569Simp uart3: serial@02034000 { 268262569Simp compatible = "fsl,imx6sl-uart", 269262569Simp "fsl,imx6q-uart", "fsl,imx21-uart"; 270262569Simp reg = <0x02034000 0x4000>; 271270864Simp interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>; 272262569Simp clocks = <&clks IMX6SL_CLK_UART>, 273262569Simp <&clks IMX6SL_CLK_UART_SERIAL>; 274262569Simp clock-names = "ipg", "per"; 275262569Simp dmas = <&sdma 29 4 0>, <&sdma 30 4 0>; 276262569Simp dma-names = "rx", "tx"; 277262569Simp status = "disabled"; 278262569Simp }; 279262569Simp 280262569Simp uart4: serial@02038000 { 281262569Simp compatible = "fsl,imx6sl-uart", 282262569Simp "fsl,imx6q-uart", "fsl,imx21-uart"; 283262569Simp reg = <0x02038000 0x4000>; 284270864Simp interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; 285262569Simp clocks = <&clks IMX6SL_CLK_UART>, 286262569Simp <&clks IMX6SL_CLK_UART_SERIAL>; 287262569Simp clock-names = "ipg", "per"; 288262569Simp dmas = <&sdma 31 4 0>, <&sdma 32 4 0>; 289262569Simp dma-names = "rx", "tx"; 290262569Simp status = "disabled"; 291262569Simp }; 292262569Simp }; 293262569Simp 294262569Simp pwm1: pwm@02080000 { 295262569Simp #pwm-cells = <2>; 296262569Simp compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm"; 297262569Simp reg = <0x02080000 0x4000>; 298270864Simp interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>; 299262569Simp clocks = <&clks IMX6SL_CLK_PWM1>, 300262569Simp <&clks IMX6SL_CLK_PWM1>; 301262569Simp clock-names = "ipg", "per"; 302262569Simp }; 303262569Simp 304262569Simp pwm2: pwm@02084000 { 305262569Simp #pwm-cells = <2>; 306262569Simp compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm"; 307262569Simp reg = <0x02084000 0x4000>; 308270864Simp interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; 309262569Simp clocks = <&clks IMX6SL_CLK_PWM2>, 310262569Simp <&clks IMX6SL_CLK_PWM2>; 311262569Simp clock-names = "ipg", "per"; 312262569Simp }; 313262569Simp 314262569Simp pwm3: pwm@02088000 { 315262569Simp #pwm-cells = <2>; 316262569Simp compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm"; 317262569Simp reg = <0x02088000 0x4000>; 318270864Simp interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>; 319262569Simp clocks = <&clks IMX6SL_CLK_PWM3>, 320262569Simp <&clks IMX6SL_CLK_PWM3>; 321262569Simp clock-names = "ipg", "per"; 322262569Simp }; 323262569Simp 324262569Simp pwm4: pwm@0208c000 { 325262569Simp #pwm-cells = <2>; 326262569Simp compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm"; 327262569Simp reg = <0x0208c000 0x4000>; 328270864Simp interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; 329262569Simp clocks = <&clks IMX6SL_CLK_PWM4>, 330262569Simp <&clks IMX6SL_CLK_PWM4>; 331262569Simp clock-names = "ipg", "per"; 332262569Simp }; 333262569Simp 334262569Simp gpt: gpt@02098000 { 335262569Simp compatible = "fsl,imx6sl-gpt"; 336262569Simp reg = <0x02098000 0x4000>; 337270864Simp interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>; 338262569Simp clocks = <&clks IMX6SL_CLK_GPT>, 339262569Simp <&clks IMX6SL_CLK_GPT_SERIAL>; 340262569Simp clock-names = "ipg", "per"; 341262569Simp }; 342262569Simp 343262569Simp gpio1: gpio@0209c000 { 344262569Simp compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio"; 345262569Simp reg = <0x0209c000 0x4000>; 346270864Simp interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>, 347270864Simp <0 67 IRQ_TYPE_LEVEL_HIGH>; 348262569Simp gpio-controller; 349262569Simp #gpio-cells = <2>; 350262569Simp interrupt-controller; 351262569Simp #interrupt-cells = <2>; 352262569Simp }; 353262569Simp 354262569Simp gpio2: gpio@020a0000 { 355262569Simp compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio"; 356262569Simp reg = <0x020a0000 0x4000>; 357270864Simp interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>, 358270864Simp <0 69 IRQ_TYPE_LEVEL_HIGH>; 359262569Simp gpio-controller; 360262569Simp #gpio-cells = <2>; 361262569Simp interrupt-controller; 362262569Simp #interrupt-cells = <2>; 363262569Simp }; 364262569Simp 365262569Simp gpio3: gpio@020a4000 { 366262569Simp compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio"; 367262569Simp reg = <0x020a4000 0x4000>; 368270864Simp interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>, 369270864Simp <0 71 IRQ_TYPE_LEVEL_HIGH>; 370262569Simp gpio-controller; 371262569Simp #gpio-cells = <2>; 372262569Simp interrupt-controller; 373262569Simp #interrupt-cells = <2>; 374262569Simp }; 375262569Simp 376262569Simp gpio4: gpio@020a8000 { 377262569Simp compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio"; 378262569Simp reg = <0x020a8000 0x4000>; 379270864Simp interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>, 380270864Simp <0 73 IRQ_TYPE_LEVEL_HIGH>; 381262569Simp gpio-controller; 382262569Simp #gpio-cells = <2>; 383262569Simp interrupt-controller; 384262569Simp #interrupt-cells = <2>; 385262569Simp }; 386262569Simp 387262569Simp gpio5: gpio@020ac000 { 388262569Simp compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio"; 389262569Simp reg = <0x020ac000 0x4000>; 390270864Simp interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>, 391270864Simp <0 75 IRQ_TYPE_LEVEL_HIGH>; 392262569Simp gpio-controller; 393262569Simp #gpio-cells = <2>; 394262569Simp interrupt-controller; 395262569Simp #interrupt-cells = <2>; 396262569Simp }; 397262569Simp 398262569Simp kpp: kpp@020b8000 { 399270864Simp compatible = "fsl,imx6sl-kpp", "fsl,imx21-kpp"; 400262569Simp reg = <0x020b8000 0x4000>; 401270864Simp interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>; 402270864Simp clocks = <&clks IMX6SL_CLK_DUMMY>; 403270864Simp status = "disabled"; 404262569Simp }; 405262569Simp 406262569Simp wdog1: wdog@020bc000 { 407262569Simp compatible = "fsl,imx6sl-wdt", "fsl,imx21-wdt"; 408262569Simp reg = <0x020bc000 0x4000>; 409270864Simp interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>; 410262569Simp clocks = <&clks IMX6SL_CLK_DUMMY>; 411262569Simp }; 412262569Simp 413262569Simp wdog2: wdog@020c0000 { 414262569Simp compatible = "fsl,imx6sl-wdt", "fsl,imx21-wdt"; 415262569Simp reg = <0x020c0000 0x4000>; 416270864Simp interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>; 417262569Simp clocks = <&clks IMX6SL_CLK_DUMMY>; 418262569Simp status = "disabled"; 419262569Simp }; 420262569Simp 421262569Simp clks: ccm@020c4000 { 422262569Simp compatible = "fsl,imx6sl-ccm"; 423262569Simp reg = <0x020c4000 0x4000>; 424270864Simp interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>, 425270864Simp <0 88 IRQ_TYPE_LEVEL_HIGH>; 426262569Simp #clock-cells = <1>; 427262569Simp }; 428262569Simp 429262569Simp anatop: anatop@020c8000 { 430262569Simp compatible = "fsl,imx6sl-anatop", 431262569Simp "fsl,imx6q-anatop", 432262569Simp "syscon", "simple-bus"; 433262569Simp reg = <0x020c8000 0x1000>; 434270864Simp interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>, 435270864Simp <0 54 IRQ_TYPE_LEVEL_HIGH>, 436270864Simp <0 127 IRQ_TYPE_LEVEL_HIGH>; 437262569Simp 438262569Simp regulator-1p1@110 { 439262569Simp compatible = "fsl,anatop-regulator"; 440262569Simp regulator-name = "vdd1p1"; 441262569Simp regulator-min-microvolt = <800000>; 442262569Simp regulator-max-microvolt = <1375000>; 443262569Simp regulator-always-on; 444262569Simp anatop-reg-offset = <0x110>; 445262569Simp anatop-vol-bit-shift = <8>; 446262569Simp anatop-vol-bit-width = <5>; 447262569Simp anatop-min-bit-val = <4>; 448262569Simp anatop-min-voltage = <800000>; 449262569Simp anatop-max-voltage = <1375000>; 450262569Simp }; 451262569Simp 452262569Simp regulator-3p0@120 { 453262569Simp compatible = "fsl,anatop-regulator"; 454262569Simp regulator-name = "vdd3p0"; 455262569Simp regulator-min-microvolt = <2800000>; 456262569Simp regulator-max-microvolt = <3150000>; 457262569Simp regulator-always-on; 458262569Simp anatop-reg-offset = <0x120>; 459262569Simp anatop-vol-bit-shift = <8>; 460262569Simp anatop-vol-bit-width = <5>; 461262569Simp anatop-min-bit-val = <0>; 462262569Simp anatop-min-voltage = <2625000>; 463262569Simp anatop-max-voltage = <3400000>; 464262569Simp }; 465262569Simp 466262569Simp regulator-2p5@130 { 467262569Simp compatible = "fsl,anatop-regulator"; 468262569Simp regulator-name = "vdd2p5"; 469262569Simp regulator-min-microvolt = <2100000>; 470262569Simp regulator-max-microvolt = <2850000>; 471262569Simp regulator-always-on; 472262569Simp anatop-reg-offset = <0x130>; 473262569Simp anatop-vol-bit-shift = <8>; 474262569Simp anatop-vol-bit-width = <5>; 475262569Simp anatop-min-bit-val = <0>; 476262569Simp anatop-min-voltage = <2100000>; 477262569Simp anatop-max-voltage = <2850000>; 478262569Simp }; 479262569Simp 480262569Simp reg_arm: regulator-vddcore@140 { 481262569Simp compatible = "fsl,anatop-regulator"; 482270864Simp regulator-name = "vddarm"; 483262569Simp regulator-min-microvolt = <725000>; 484262569Simp regulator-max-microvolt = <1450000>; 485262569Simp regulator-always-on; 486262569Simp anatop-reg-offset = <0x140>; 487262569Simp anatop-vol-bit-shift = <0>; 488262569Simp anatop-vol-bit-width = <5>; 489262569Simp anatop-delay-reg-offset = <0x170>; 490262569Simp anatop-delay-bit-shift = <24>; 491262569Simp anatop-delay-bit-width = <2>; 492262569Simp anatop-min-bit-val = <1>; 493262569Simp anatop-min-voltage = <725000>; 494262569Simp anatop-max-voltage = <1450000>; 495262569Simp }; 496262569Simp 497262569Simp reg_pu: regulator-vddpu@140 { 498262569Simp compatible = "fsl,anatop-regulator"; 499262569Simp regulator-name = "vddpu"; 500262569Simp regulator-min-microvolt = <725000>; 501262569Simp regulator-max-microvolt = <1450000>; 502262569Simp regulator-always-on; 503262569Simp anatop-reg-offset = <0x140>; 504262569Simp anatop-vol-bit-shift = <9>; 505262569Simp anatop-vol-bit-width = <5>; 506262569Simp anatop-delay-reg-offset = <0x170>; 507262569Simp anatop-delay-bit-shift = <26>; 508262569Simp anatop-delay-bit-width = <2>; 509262569Simp anatop-min-bit-val = <1>; 510262569Simp anatop-min-voltage = <725000>; 511262569Simp anatop-max-voltage = <1450000>; 512262569Simp }; 513262569Simp 514262569Simp reg_soc: regulator-vddsoc@140 { 515262569Simp compatible = "fsl,anatop-regulator"; 516262569Simp regulator-name = "vddsoc"; 517262569Simp regulator-min-microvolt = <725000>; 518262569Simp regulator-max-microvolt = <1450000>; 519262569Simp regulator-always-on; 520262569Simp anatop-reg-offset = <0x140>; 521262569Simp anatop-vol-bit-shift = <18>; 522262569Simp anatop-vol-bit-width = <5>; 523262569Simp anatop-delay-reg-offset = <0x170>; 524262569Simp anatop-delay-bit-shift = <28>; 525262569Simp anatop-delay-bit-width = <2>; 526262569Simp anatop-min-bit-val = <1>; 527262569Simp anatop-min-voltage = <725000>; 528262569Simp anatop-max-voltage = <1450000>; 529262569Simp }; 530262569Simp }; 531262569Simp 532262569Simp usbphy1: usbphy@020c9000 { 533262569Simp compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy"; 534262569Simp reg = <0x020c9000 0x1000>; 535270864Simp interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>; 536262569Simp clocks = <&clks IMX6SL_CLK_USBPHY1>; 537270864Simp fsl,anatop = <&anatop>; 538262569Simp }; 539262569Simp 540262569Simp usbphy2: usbphy@020ca000 { 541262569Simp compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy"; 542262569Simp reg = <0x020ca000 0x1000>; 543270864Simp interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>; 544262569Simp clocks = <&clks IMX6SL_CLK_USBPHY2>; 545270864Simp fsl,anatop = <&anatop>; 546262569Simp }; 547262569Simp 548262569Simp snvs@020cc000 { 549262569Simp compatible = "fsl,sec-v4.0-mon", "simple-bus"; 550262569Simp #address-cells = <1>; 551262569Simp #size-cells = <1>; 552262569Simp ranges = <0 0x020cc000 0x4000>; 553262569Simp 554262569Simp snvs-rtc-lp@34 { 555262569Simp compatible = "fsl,sec-v4.0-mon-rtc-lp"; 556262569Simp reg = <0x34 0x58>; 557270864Simp interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>, 558270864Simp <0 20 IRQ_TYPE_LEVEL_HIGH>; 559262569Simp }; 560262569Simp }; 561262569Simp 562262569Simp epit1: epit@020d0000 { 563262569Simp reg = <0x020d0000 0x4000>; 564270864Simp interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; 565262569Simp }; 566262569Simp 567262569Simp epit2: epit@020d4000 { 568262569Simp reg = <0x020d4000 0x4000>; 569270864Simp interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; 570262569Simp }; 571262569Simp 572262569Simp src: src@020d8000 { 573262569Simp compatible = "fsl,imx6sl-src", "fsl,imx51-src"; 574262569Simp reg = <0x020d8000 0x4000>; 575270864Simp interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>, 576270864Simp <0 96 IRQ_TYPE_LEVEL_HIGH>; 577262569Simp #reset-cells = <1>; 578262569Simp }; 579262569Simp 580262569Simp gpc: gpc@020dc000 { 581262569Simp compatible = "fsl,imx6sl-gpc", "fsl,imx6q-gpc"; 582262569Simp reg = <0x020dc000 0x4000>; 583270864Simp interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; 584262569Simp }; 585262569Simp 586262569Simp gpr: iomuxc-gpr@020e0000 { 587262569Simp compatible = "fsl,imx6sl-iomuxc-gpr", 588262569Simp "fsl,imx6q-iomuxc-gpr", "syscon"; 589262569Simp reg = <0x020e0000 0x38>; 590262569Simp }; 591262569Simp 592262569Simp iomuxc: iomuxc@020e0000 { 593262569Simp compatible = "fsl,imx6sl-iomuxc"; 594262569Simp reg = <0x020e0000 0x4000>; 595262569Simp }; 596262569Simp 597262569Simp csi: csi@020e4000 { 598262569Simp reg = <0x020e4000 0x4000>; 599270864Simp interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>; 600262569Simp }; 601262569Simp 602262569Simp spdc: spdc@020e8000 { 603262569Simp reg = <0x020e8000 0x4000>; 604270864Simp interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>; 605262569Simp }; 606262569Simp 607262569Simp sdma: sdma@020ec000 { 608270864Simp compatible = "fsl,imx6sl-sdma", "fsl,imx6q-sdma"; 609262569Simp reg = <0x020ec000 0x4000>; 610270864Simp interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>; 611262569Simp clocks = <&clks IMX6SL_CLK_SDMA>, 612262569Simp <&clks IMX6SL_CLK_SDMA>; 613262569Simp clock-names = "ipg", "ahb"; 614262569Simp #dma-cells = <3>; 615262569Simp /* imx6sl reuses imx6q sdma firmware */ 616262569Simp fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; 617262569Simp }; 618262569Simp 619262569Simp pxp: pxp@020f0000 { 620262569Simp reg = <0x020f0000 0x4000>; 621270864Simp interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>; 622262569Simp }; 623262569Simp 624262569Simp epdc: epdc@020f4000 { 625262569Simp reg = <0x020f4000 0x4000>; 626270864Simp interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>; 627262569Simp }; 628262569Simp 629262569Simp lcdif: lcdif@020f8000 { 630262569Simp reg = <0x020f8000 0x4000>; 631270864Simp interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>; 632262569Simp }; 633262569Simp 634262569Simp dcp: dcp@020fc000 { 635262569Simp reg = <0x020fc000 0x4000>; 636270864Simp interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>; 637262569Simp }; 638262569Simp }; 639262569Simp 640262569Simp aips2: aips-bus@02100000 { 641262569Simp compatible = "fsl,aips-bus", "simple-bus"; 642262569Simp #address-cells = <1>; 643262569Simp #size-cells = <1>; 644262569Simp reg = <0x02100000 0x100000>; 645262569Simp ranges; 646262569Simp 647262569Simp usbotg1: usb@02184000 { 648262569Simp compatible = "fsl,imx6sl-usb", "fsl,imx27-usb"; 649262569Simp reg = <0x02184000 0x200>; 650270864Simp interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>; 651262569Simp clocks = <&clks IMX6SL_CLK_USBOH3>; 652262569Simp fsl,usbphy = <&usbphy1>; 653262569Simp fsl,usbmisc = <&usbmisc 0>; 654262569Simp status = "disabled"; 655262569Simp }; 656262569Simp 657262569Simp usbotg2: usb@02184200 { 658262569Simp compatible = "fsl,imx6sl-usb", "fsl,imx27-usb"; 659262569Simp reg = <0x02184200 0x200>; 660270864Simp interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>; 661262569Simp clocks = <&clks IMX6SL_CLK_USBOH3>; 662262569Simp fsl,usbphy = <&usbphy2>; 663262569Simp fsl,usbmisc = <&usbmisc 1>; 664262569Simp status = "disabled"; 665262569Simp }; 666262569Simp 667262569Simp usbh: usb@02184400 { 668262569Simp compatible = "fsl,imx6sl-usb", "fsl,imx27-usb"; 669262569Simp reg = <0x02184400 0x200>; 670270864Simp interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>; 671262569Simp clocks = <&clks IMX6SL_CLK_USBOH3>; 672262569Simp fsl,usbmisc = <&usbmisc 2>; 673262569Simp status = "disabled"; 674262569Simp }; 675262569Simp 676262569Simp usbmisc: usbmisc@02184800 { 677262569Simp #index-cells = <1>; 678262569Simp compatible = "fsl,imx6sl-usbmisc", "fsl,imx6q-usbmisc"; 679262569Simp reg = <0x02184800 0x200>; 680262569Simp clocks = <&clks IMX6SL_CLK_USBOH3>; 681262569Simp }; 682262569Simp 683262569Simp fec: ethernet@02188000 { 684262569Simp compatible = "fsl,imx6sl-fec", "fsl,imx25-fec"; 685262569Simp reg = <0x02188000 0x4000>; 686270864Simp interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>; 687270864Simp clocks = <&clks IMX6SL_CLK_ENET>, 688262569Simp <&clks IMX6SL_CLK_ENET_REF>; 689262569Simp clock-names = "ipg", "ahb"; 690262569Simp status = "disabled"; 691262569Simp }; 692262569Simp 693262569Simp usdhc1: usdhc@02190000 { 694262569Simp compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc"; 695262569Simp reg = <0x02190000 0x4000>; 696270864Simp interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; 697262569Simp clocks = <&clks IMX6SL_CLK_USDHC1>, 698262569Simp <&clks IMX6SL_CLK_USDHC1>, 699262569Simp <&clks IMX6SL_CLK_USDHC1>; 700262569Simp clock-names = "ipg", "ahb", "per"; 701262569Simp bus-width = <4>; 702262569Simp status = "disabled"; 703262569Simp }; 704262569Simp 705262569Simp usdhc2: usdhc@02194000 { 706262569Simp compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc"; 707262569Simp reg = <0x02194000 0x4000>; 708270864Simp interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; 709262569Simp clocks = <&clks IMX6SL_CLK_USDHC2>, 710262569Simp <&clks IMX6SL_CLK_USDHC2>, 711262569Simp <&clks IMX6SL_CLK_USDHC2>; 712262569Simp clock-names = "ipg", "ahb", "per"; 713262569Simp bus-width = <4>; 714262569Simp status = "disabled"; 715262569Simp }; 716262569Simp 717262569Simp usdhc3: usdhc@02198000 { 718262569Simp compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc"; 719262569Simp reg = <0x02198000 0x4000>; 720270864Simp interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; 721262569Simp clocks = <&clks IMX6SL_CLK_USDHC3>, 722262569Simp <&clks IMX6SL_CLK_USDHC3>, 723262569Simp <&clks IMX6SL_CLK_USDHC3>; 724262569Simp clock-names = "ipg", "ahb", "per"; 725262569Simp bus-width = <4>; 726262569Simp status = "disabled"; 727262569Simp }; 728262569Simp 729262569Simp usdhc4: usdhc@0219c000 { 730262569Simp compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc"; 731262569Simp reg = <0x0219c000 0x4000>; 732270864Simp interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>; 733262569Simp clocks = <&clks IMX6SL_CLK_USDHC4>, 734262569Simp <&clks IMX6SL_CLK_USDHC4>, 735262569Simp <&clks IMX6SL_CLK_USDHC4>; 736262569Simp clock-names = "ipg", "ahb", "per"; 737262569Simp bus-width = <4>; 738262569Simp status = "disabled"; 739262569Simp }; 740262569Simp 741262569Simp i2c1: i2c@021a0000 { 742262569Simp #address-cells = <1>; 743262569Simp #size-cells = <0>; 744262569Simp compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c"; 745262569Simp reg = <0x021a0000 0x4000>; 746270864Simp interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>; 747262569Simp clocks = <&clks IMX6SL_CLK_I2C1>; 748262569Simp status = "disabled"; 749262569Simp }; 750262569Simp 751262569Simp i2c2: i2c@021a4000 { 752262569Simp #address-cells = <1>; 753262569Simp #size-cells = <0>; 754262569Simp compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c"; 755262569Simp reg = <0x021a4000 0x4000>; 756270864Simp interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>; 757262569Simp clocks = <&clks IMX6SL_CLK_I2C2>; 758262569Simp status = "disabled"; 759262569Simp }; 760262569Simp 761262569Simp i2c3: i2c@021a8000 { 762262569Simp #address-cells = <1>; 763262569Simp #size-cells = <0>; 764262569Simp compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c"; 765262569Simp reg = <0x021a8000 0x4000>; 766270864Simp interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>; 767262569Simp clocks = <&clks IMX6SL_CLK_I2C3>; 768262569Simp status = "disabled"; 769262569Simp }; 770262569Simp 771262569Simp mmdc: mmdc@021b0000 { 772262569Simp compatible = "fsl,imx6sl-mmdc", "fsl,imx6q-mmdc"; 773262569Simp reg = <0x021b0000 0x4000>; 774262569Simp }; 775262569Simp 776262569Simp rngb: rngb@021b4000 { 777262569Simp reg = <0x021b4000 0x4000>; 778270864Simp interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>; 779262569Simp }; 780262569Simp 781262569Simp weim: weim@021b8000 { 782262569Simp reg = <0x021b8000 0x4000>; 783270864Simp interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>; 784262569Simp }; 785262569Simp 786262569Simp ocotp: ocotp@021bc000 { 787262569Simp compatible = "fsl,imx6sl-ocotp"; 788262569Simp reg = <0x021bc000 0x4000>; 789262569Simp }; 790262569Simp 791262569Simp audmux: audmux@021d8000 { 792262569Simp compatible = "fsl,imx6sl-audmux", "fsl,imx31-audmux"; 793262569Simp reg = <0x021d8000 0x4000>; 794262569Simp status = "disabled"; 795262569Simp }; 796262569Simp }; 797262569Simp }; 798262569Simp}; 799