imx6qdl.dtsi revision 284090
1262569Simp/* 2262569Simp * Copyright 2011 Freescale Semiconductor, Inc. 3262569Simp * Copyright 2011 Linaro Ltd. 4262569Simp * 5262569Simp * The code contained herein is licensed under the GNU General Public 6262569Simp * License. You may obtain a copy of the GNU General Public License 7262569Simp * Version 2 or later at the following locations: 8262569Simp * 9262569Simp * http://www.opensource.org/licenses/gpl-license.html 10262569Simp * http://www.gnu.org/copyleft/gpl.html 11262569Simp */ 12262569Simp 13270864Simp#include <dt-bindings/clock/imx6qdl-clock.h> 14270864Simp#include <dt-bindings/interrupt-controller/arm-gic.h> 15270864Simp 16262569Simp#include "skeleton.dtsi" 17262569Simp 18262569Simp/ { 19262569Simp aliases { 20270864Simp ethernet0 = &fec; 21270864Simp can0 = &can1; 22270864Simp can1 = &can2; 23262569Simp gpio0 = &gpio1; 24262569Simp gpio1 = &gpio2; 25262569Simp gpio2 = &gpio3; 26262569Simp gpio3 = &gpio4; 27262569Simp gpio4 = &gpio5; 28262569Simp gpio5 = &gpio6; 29262569Simp gpio6 = &gpio7; 30262569Simp i2c0 = &i2c1; 31262569Simp i2c1 = &i2c2; 32262569Simp i2c2 = &i2c3; 33270864Simp mmc0 = &usdhc1; 34270864Simp mmc1 = &usdhc2; 35270864Simp mmc2 = &usdhc3; 36270864Simp mmc3 = &usdhc4; 37262569Simp serial0 = &uart1; 38262569Simp serial1 = &uart2; 39262569Simp serial2 = &uart3; 40262569Simp serial3 = &uart4; 41262569Simp serial4 = &uart5; 42262569Simp spi0 = &ecspi1; 43262569Simp spi1 = &ecspi2; 44262569Simp spi2 = &ecspi3; 45262569Simp spi3 = &ecspi4; 46270864Simp usbphy0 = &usbphy1; 47270864Simp usbphy1 = &usbphy2; 48262569Simp }; 49262569Simp 50262569Simp intc: interrupt-controller@00a01000 { 51262569Simp compatible = "arm,cortex-a9-gic"; 52262569Simp #interrupt-cells = <3>; 53262569Simp interrupt-controller; 54262569Simp reg = <0x00a01000 0x1000>, 55262569Simp <0x00a00100 0x100>; 56262569Simp }; 57262569Simp 58262569Simp clocks { 59262569Simp #address-cells = <1>; 60262569Simp #size-cells = <0>; 61262569Simp 62262569Simp ckil { 63262569Simp compatible = "fsl,imx-ckil", "fixed-clock"; 64270864Simp #clock-cells = <0>; 65262569Simp clock-frequency = <32768>; 66262569Simp }; 67262569Simp 68262569Simp ckih1 { 69262569Simp compatible = "fsl,imx-ckih1", "fixed-clock"; 70270864Simp #clock-cells = <0>; 71262569Simp clock-frequency = <0>; 72262569Simp }; 73262569Simp 74262569Simp osc { 75262569Simp compatible = "fsl,imx-osc", "fixed-clock"; 76270864Simp #clock-cells = <0>; 77262569Simp clock-frequency = <24000000>; 78262569Simp }; 79262569Simp }; 80262569Simp 81262569Simp soc { 82262569Simp #address-cells = <1>; 83262569Simp #size-cells = <1>; 84262569Simp compatible = "simple-bus"; 85262569Simp interrupt-parent = <&intc>; 86262569Simp ranges; 87262569Simp 88262569Simp dma_apbh: dma-apbh@00110000 { 89262569Simp compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; 90262569Simp reg = <0x00110000 0x2000>; 91270864Simp interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>, 92270864Simp <0 13 IRQ_TYPE_LEVEL_HIGH>, 93270864Simp <0 13 IRQ_TYPE_LEVEL_HIGH>, 94270864Simp <0 13 IRQ_TYPE_LEVEL_HIGH>; 95262569Simp interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; 96262569Simp #dma-cells = <1>; 97262569Simp dma-channels = <4>; 98270864Simp clocks = <&clks IMX6QDL_CLK_APBH_DMA>; 99262569Simp }; 100262569Simp 101262569Simp gpmi: gpmi-nand@00112000 { 102262569Simp compatible = "fsl,imx6q-gpmi-nand"; 103262569Simp #address-cells = <1>; 104262569Simp #size-cells = <1>; 105262569Simp reg = <0x00112000 0x2000>, <0x00114000 0x2000>; 106262569Simp reg-names = "gpmi-nand", "bch"; 107270864Simp interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>; 108262569Simp interrupt-names = "bch"; 109270864Simp clocks = <&clks IMX6QDL_CLK_GPMI_IO>, 110270864Simp <&clks IMX6QDL_CLK_GPMI_APB>, 111270864Simp <&clks IMX6QDL_CLK_GPMI_BCH>, 112270864Simp <&clks IMX6QDL_CLK_GPMI_BCH_APB>, 113270864Simp <&clks IMX6QDL_CLK_PER1_BCH>; 114262569Simp clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", 115262569Simp "gpmi_bch_apb", "per1_bch"; 116262569Simp dmas = <&dma_apbh 0>; 117262569Simp dma-names = "rx-tx"; 118262569Simp status = "disabled"; 119262569Simp }; 120262569Simp 121262569Simp timer@00a00600 { 122262569Simp compatible = "arm,cortex-a9-twd-timer"; 123262569Simp reg = <0x00a00600 0x20>; 124262569Simp interrupts = <1 13 0xf01>; 125270864Simp clocks = <&clks IMX6QDL_CLK_TWD>; 126262569Simp }; 127262569Simp 128262569Simp L2: l2-cache@00a02000 { 129262569Simp compatible = "arm,pl310-cache"; 130262569Simp reg = <0x00a02000 0x1000>; 131270864Simp interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>; 132262569Simp cache-unified; 133262569Simp cache-level = <2>; 134262569Simp arm,tag-latency = <4 2 3>; 135262569Simp arm,data-latency = <4 2 3>; 136262569Simp }; 137262569Simp 138262569Simp pcie: pcie@0x01000000 { 139262569Simp compatible = "fsl,imx6q-pcie", "snps,dw-pcie"; 140284090Sian reg = <0x01ffc000 0x04000>, 141284090Sian <0x01f00000 0x80000>; 142284090Sian reg-names = "dbi", "config"; 143262569Simp #address-cells = <3>; 144262569Simp #size-cells = <2>; 145262569Simp device_type = "pci"; 146262569Simp ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000 /* configuration space */ 147262569Simp 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */ 148262569Simp 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ 149262569Simp num-lanes = <1>; 150270864Simp interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 151270864Simp interrupt-names = "msi"; 152270864Simp #interrupt-cells = <1>; 153270864Simp interrupt-map-mask = <0 0 0 0x7>; 154270864Simp interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 155270864Simp <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 156270864Simp <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 157270864Simp <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 158270864Simp clocks = <&clks IMX6QDL_CLK_PCIE_AXI>, 159270864Simp <&clks IMX6QDL_CLK_LVDS1_GATE>, 160270864Simp <&clks IMX6QDL_CLK_PCIE_REF_125M>; 161270864Simp clock-names = "pcie", "pcie_bus", "pcie_phy"; 162262569Simp status = "disabled"; 163262569Simp }; 164262569Simp 165262569Simp pmu { 166262569Simp compatible = "arm,cortex-a9-pmu"; 167270864Simp interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>; 168262569Simp }; 169262569Simp 170262569Simp aips-bus@02000000 { /* AIPS1 */ 171262569Simp compatible = "fsl,aips-bus", "simple-bus"; 172262569Simp #address-cells = <1>; 173262569Simp #size-cells = <1>; 174262569Simp reg = <0x02000000 0x100000>; 175262569Simp ranges; 176262569Simp 177262569Simp spba-bus@02000000 { 178262569Simp compatible = "fsl,spba-bus", "simple-bus"; 179262569Simp #address-cells = <1>; 180262569Simp #size-cells = <1>; 181262569Simp reg = <0x02000000 0x40000>; 182262569Simp ranges; 183262569Simp 184262569Simp spdif: spdif@02004000 { 185262569Simp compatible = "fsl,imx35-spdif"; 186262569Simp reg = <0x02004000 0x4000>; 187270864Simp interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>; 188262569Simp dmas = <&sdma 14 18 0>, 189262569Simp <&sdma 15 18 0>; 190262569Simp dma-names = "rx", "tx"; 191270864Simp clocks = <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_OSC>, 192270864Simp <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_DUMMY>, 193270864Simp <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_DUMMY>, 194270864Simp <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_DUMMY>, 195270864Simp <&clks IMX6QDL_CLK_DUMMY>; 196262569Simp clock-names = "core", "rxtx0", 197262569Simp "rxtx1", "rxtx2", 198262569Simp "rxtx3", "rxtx4", 199262569Simp "rxtx5", "rxtx6", 200262569Simp "rxtx7"; 201262569Simp status = "disabled"; 202262569Simp }; 203262569Simp 204262569Simp ecspi1: ecspi@02008000 { 205262569Simp #address-cells = <1>; 206262569Simp #size-cells = <0>; 207262569Simp compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 208262569Simp reg = <0x02008000 0x4000>; 209270864Simp interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; 210270864Simp clocks = <&clks IMX6QDL_CLK_ECSPI1>, 211270864Simp <&clks IMX6QDL_CLK_ECSPI1>; 212262569Simp clock-names = "ipg", "per"; 213270864Simp dmas = <&sdma 3 7 1>, <&sdma 4 7 2>; 214270864Simp dma-names = "rx", "tx"; 215262569Simp status = "disabled"; 216262569Simp }; 217262569Simp 218262569Simp ecspi2: ecspi@0200c000 { 219262569Simp #address-cells = <1>; 220262569Simp #size-cells = <0>; 221262569Simp compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 222262569Simp reg = <0x0200c000 0x4000>; 223270864Simp interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; 224270864Simp clocks = <&clks IMX6QDL_CLK_ECSPI2>, 225270864Simp <&clks IMX6QDL_CLK_ECSPI2>; 226262569Simp clock-names = "ipg", "per"; 227270864Simp dmas = <&sdma 5 7 1>, <&sdma 6 7 2>; 228270864Simp dma-names = "rx", "tx"; 229262569Simp status = "disabled"; 230262569Simp }; 231262569Simp 232262569Simp ecspi3: ecspi@02010000 { 233262569Simp #address-cells = <1>; 234262569Simp #size-cells = <0>; 235262569Simp compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 236262569Simp reg = <0x02010000 0x4000>; 237270864Simp interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>; 238270864Simp clocks = <&clks IMX6QDL_CLK_ECSPI3>, 239270864Simp <&clks IMX6QDL_CLK_ECSPI3>; 240262569Simp clock-names = "ipg", "per"; 241270864Simp dmas = <&sdma 7 7 1>, <&sdma 8 7 2>; 242270864Simp dma-names = "rx", "tx"; 243262569Simp status = "disabled"; 244262569Simp }; 245262569Simp 246262569Simp ecspi4: ecspi@02014000 { 247262569Simp #address-cells = <1>; 248262569Simp #size-cells = <0>; 249262569Simp compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 250262569Simp reg = <0x02014000 0x4000>; 251270864Simp interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; 252270864Simp clocks = <&clks IMX6QDL_CLK_ECSPI4>, 253270864Simp <&clks IMX6QDL_CLK_ECSPI4>; 254262569Simp clock-names = "ipg", "per"; 255270864Simp dmas = <&sdma 9 7 1>, <&sdma 10 7 2>; 256270864Simp dma-names = "rx", "tx"; 257262569Simp status = "disabled"; 258262569Simp }; 259262569Simp 260262569Simp uart1: serial@02020000 { 261262569Simp compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 262262569Simp reg = <0x02020000 0x4000>; 263270864Simp interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>; 264270864Simp clocks = <&clks IMX6QDL_CLK_UART_IPG>, 265270864Simp <&clks IMX6QDL_CLK_UART_SERIAL>; 266262569Simp clock-names = "ipg", "per"; 267262569Simp dmas = <&sdma 25 4 0>, <&sdma 26 4 0>; 268262569Simp dma-names = "rx", "tx"; 269262569Simp status = "disabled"; 270262569Simp }; 271262569Simp 272262569Simp esai: esai@02024000 { 273262569Simp reg = <0x02024000 0x4000>; 274270864Simp interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>; 275262569Simp }; 276262569Simp 277262569Simp ssi1: ssi@02028000 { 278284090Sian #sound-dai-cells = <0>; 279270864Simp compatible = "fsl,imx6q-ssi", 280270864Simp "fsl,imx51-ssi"; 281262569Simp reg = <0x02028000 0x4000>; 282270864Simp interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; 283284090Sian clocks = <&clks IMX6QDL_CLK_SSI1_IPG>, 284284090Sian <&clks IMX6QDL_CLK_SSI1>; 285284090Sian clock-names = "ipg", "baud"; 286262569Simp dmas = <&sdma 37 1 0>, 287262569Simp <&sdma 38 1 0>; 288262569Simp dma-names = "rx", "tx"; 289262569Simp fsl,fifo-depth = <15>; 290262569Simp status = "disabled"; 291262569Simp }; 292262569Simp 293262569Simp ssi2: ssi@0202c000 { 294284090Sian #sound-dai-cells = <0>; 295270864Simp compatible = "fsl,imx6q-ssi", 296270864Simp "fsl,imx51-ssi"; 297262569Simp reg = <0x0202c000 0x4000>; 298270864Simp interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; 299284090Sian clocks = <&clks IMX6QDL_CLK_SSI2_IPG>, 300284090Sian <&clks IMX6QDL_CLK_SSI2>; 301284090Sian clock-names = "ipg", "baud"; 302262569Simp dmas = <&sdma 41 1 0>, 303262569Simp <&sdma 42 1 0>; 304262569Simp dma-names = "rx", "tx"; 305262569Simp fsl,fifo-depth = <15>; 306262569Simp status = "disabled"; 307262569Simp }; 308262569Simp 309262569Simp ssi3: ssi@02030000 { 310284090Sian #sound-dai-cells = <0>; 311270864Simp compatible = "fsl,imx6q-ssi", 312270864Simp "fsl,imx51-ssi"; 313262569Simp reg = <0x02030000 0x4000>; 314270864Simp interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>; 315284090Sian clocks = <&clks IMX6QDL_CLK_SSI3_IPG>, 316284090Sian <&clks IMX6QDL_CLK_SSI3>; 317284090Sian clock-names = "ipg", "baud"; 318262569Simp dmas = <&sdma 45 1 0>, 319262569Simp <&sdma 46 1 0>; 320262569Simp dma-names = "rx", "tx"; 321262569Simp fsl,fifo-depth = <15>; 322262569Simp status = "disabled"; 323262569Simp }; 324262569Simp 325262569Simp asrc: asrc@02034000 { 326262569Simp reg = <0x02034000 0x4000>; 327270864Simp interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>; 328262569Simp }; 329262569Simp 330262569Simp spba@0203c000 { 331262569Simp reg = <0x0203c000 0x4000>; 332262569Simp }; 333262569Simp }; 334262569Simp 335262569Simp vpu: vpu@02040000 { 336284090Sian compatible = "cnm,coda960"; 337262569Simp reg = <0x02040000 0x3c000>; 338284090Sian interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>, 339284090Sian <0 3 IRQ_TYPE_LEVEL_HIGH>; 340284090Sian interrupt-names = "bit", "jpeg"; 341284090Sian clocks = <&clks IMX6QDL_CLK_VPU_AXI>, 342284090Sian <&clks IMX6QDL_CLK_MMDC_CH0_AXI>; 343284090Sian clock-names = "per", "ahb"; 344284090Sian resets = <&src 1>; 345284090Sian iram = <&ocram>; 346262569Simp }; 347262569Simp 348262569Simp aipstz@0207c000 { /* AIPSTZ1 */ 349262569Simp reg = <0x0207c000 0x4000>; 350262569Simp }; 351262569Simp 352262569Simp pwm1: pwm@02080000 { 353262569Simp #pwm-cells = <2>; 354262569Simp compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; 355262569Simp reg = <0x02080000 0x4000>; 356270864Simp interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>; 357270864Simp clocks = <&clks IMX6QDL_CLK_IPG>, 358270864Simp <&clks IMX6QDL_CLK_PWM1>; 359262569Simp clock-names = "ipg", "per"; 360262569Simp }; 361262569Simp 362262569Simp pwm2: pwm@02084000 { 363262569Simp #pwm-cells = <2>; 364262569Simp compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; 365262569Simp reg = <0x02084000 0x4000>; 366270864Simp interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; 367270864Simp clocks = <&clks IMX6QDL_CLK_IPG>, 368270864Simp <&clks IMX6QDL_CLK_PWM2>; 369262569Simp clock-names = "ipg", "per"; 370262569Simp }; 371262569Simp 372262569Simp pwm3: pwm@02088000 { 373262569Simp #pwm-cells = <2>; 374262569Simp compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; 375262569Simp reg = <0x02088000 0x4000>; 376270864Simp interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>; 377270864Simp clocks = <&clks IMX6QDL_CLK_IPG>, 378270864Simp <&clks IMX6QDL_CLK_PWM3>; 379262569Simp clock-names = "ipg", "per"; 380262569Simp }; 381262569Simp 382262569Simp pwm4: pwm@0208c000 { 383262569Simp #pwm-cells = <2>; 384262569Simp compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; 385262569Simp reg = <0x0208c000 0x4000>; 386270864Simp interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; 387270864Simp clocks = <&clks IMX6QDL_CLK_IPG>, 388270864Simp <&clks IMX6QDL_CLK_PWM4>; 389262569Simp clock-names = "ipg", "per"; 390262569Simp }; 391262569Simp 392262569Simp can1: flexcan@02090000 { 393262569Simp compatible = "fsl,imx6q-flexcan"; 394262569Simp reg = <0x02090000 0x4000>; 395270864Simp interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; 396270864Simp clocks = <&clks IMX6QDL_CLK_CAN1_IPG>, 397270864Simp <&clks IMX6QDL_CLK_CAN1_SERIAL>; 398262569Simp clock-names = "ipg", "per"; 399270864Simp status = "disabled"; 400262569Simp }; 401262569Simp 402262569Simp can2: flexcan@02094000 { 403262569Simp compatible = "fsl,imx6q-flexcan"; 404262569Simp reg = <0x02094000 0x4000>; 405270864Simp interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>; 406270864Simp clocks = <&clks IMX6QDL_CLK_CAN2_IPG>, 407270864Simp <&clks IMX6QDL_CLK_CAN2_SERIAL>; 408262569Simp clock-names = "ipg", "per"; 409270864Simp status = "disabled"; 410262569Simp }; 411262569Simp 412262569Simp gpt: gpt@02098000 { 413262569Simp compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt"; 414262569Simp reg = <0x02098000 0x4000>; 415270864Simp interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>; 416270864Simp clocks = <&clks IMX6QDL_CLK_GPT_IPG>, 417284090Sian <&clks IMX6QDL_CLK_GPT_IPG_PER>, 418284090Sian <&clks IMX6QDL_CLK_GPT_3M>; 419284090Sian clock-names = "ipg", "per", "osc_per"; 420262569Simp }; 421262569Simp 422262569Simp gpio1: gpio@0209c000 { 423262569Simp compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 424262569Simp reg = <0x0209c000 0x4000>; 425270864Simp interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>, 426270864Simp <0 67 IRQ_TYPE_LEVEL_HIGH>; 427262569Simp gpio-controller; 428262569Simp #gpio-cells = <2>; 429262569Simp interrupt-controller; 430262569Simp #interrupt-cells = <2>; 431262569Simp }; 432262569Simp 433262569Simp gpio2: gpio@020a0000 { 434262569Simp compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 435262569Simp reg = <0x020a0000 0x4000>; 436270864Simp interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>, 437270864Simp <0 69 IRQ_TYPE_LEVEL_HIGH>; 438262569Simp gpio-controller; 439262569Simp #gpio-cells = <2>; 440262569Simp interrupt-controller; 441262569Simp #interrupt-cells = <2>; 442262569Simp }; 443262569Simp 444262569Simp gpio3: gpio@020a4000 { 445262569Simp compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 446262569Simp reg = <0x020a4000 0x4000>; 447270864Simp interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>, 448270864Simp <0 71 IRQ_TYPE_LEVEL_HIGH>; 449262569Simp gpio-controller; 450262569Simp #gpio-cells = <2>; 451262569Simp interrupt-controller; 452262569Simp #interrupt-cells = <2>; 453262569Simp }; 454262569Simp 455262569Simp gpio4: gpio@020a8000 { 456262569Simp compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 457262569Simp reg = <0x020a8000 0x4000>; 458270864Simp interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>, 459270864Simp <0 73 IRQ_TYPE_LEVEL_HIGH>; 460262569Simp gpio-controller; 461262569Simp #gpio-cells = <2>; 462262569Simp interrupt-controller; 463262569Simp #interrupt-cells = <2>; 464262569Simp }; 465262569Simp 466262569Simp gpio5: gpio@020ac000 { 467262569Simp compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 468262569Simp reg = <0x020ac000 0x4000>; 469270864Simp interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>, 470270864Simp <0 75 IRQ_TYPE_LEVEL_HIGH>; 471262569Simp gpio-controller; 472262569Simp #gpio-cells = <2>; 473262569Simp interrupt-controller; 474262569Simp #interrupt-cells = <2>; 475262569Simp }; 476262569Simp 477262569Simp gpio6: gpio@020b0000 { 478262569Simp compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 479262569Simp reg = <0x020b0000 0x4000>; 480270864Simp interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>, 481270864Simp <0 77 IRQ_TYPE_LEVEL_HIGH>; 482262569Simp gpio-controller; 483262569Simp #gpio-cells = <2>; 484262569Simp interrupt-controller; 485262569Simp #interrupt-cells = <2>; 486262569Simp }; 487262569Simp 488262569Simp gpio7: gpio@020b4000 { 489262569Simp compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 490262569Simp reg = <0x020b4000 0x4000>; 491270864Simp interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>, 492270864Simp <0 79 IRQ_TYPE_LEVEL_HIGH>; 493262569Simp gpio-controller; 494262569Simp #gpio-cells = <2>; 495262569Simp interrupt-controller; 496262569Simp #interrupt-cells = <2>; 497262569Simp }; 498262569Simp 499262569Simp kpp: kpp@020b8000 { 500270864Simp compatible = "fsl,imx6q-kpp", "fsl,imx21-kpp"; 501262569Simp reg = <0x020b8000 0x4000>; 502270864Simp interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>; 503270864Simp clocks = <&clks IMX6QDL_CLK_IPG>; 504270864Simp status = "disabled"; 505262569Simp }; 506262569Simp 507262569Simp wdog1: wdog@020bc000 { 508262569Simp compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; 509262569Simp reg = <0x020bc000 0x4000>; 510270864Simp interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>; 511270864Simp clocks = <&clks IMX6QDL_CLK_DUMMY>; 512262569Simp }; 513262569Simp 514262569Simp wdog2: wdog@020c0000 { 515262569Simp compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; 516262569Simp reg = <0x020c0000 0x4000>; 517270864Simp interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>; 518270864Simp clocks = <&clks IMX6QDL_CLK_DUMMY>; 519262569Simp status = "disabled"; 520262569Simp }; 521262569Simp 522262569Simp clks: ccm@020c4000 { 523262569Simp compatible = "fsl,imx6q-ccm"; 524262569Simp reg = <0x020c4000 0x4000>; 525270864Simp interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>, 526270864Simp <0 88 IRQ_TYPE_LEVEL_HIGH>; 527262569Simp #clock-cells = <1>; 528262569Simp }; 529262569Simp 530262569Simp anatop: anatop@020c8000 { 531262569Simp compatible = "fsl,imx6q-anatop", "syscon", "simple-bus"; 532262569Simp reg = <0x020c8000 0x1000>; 533270864Simp interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>, 534270864Simp <0 54 IRQ_TYPE_LEVEL_HIGH>, 535270864Simp <0 127 IRQ_TYPE_LEVEL_HIGH>; 536262569Simp 537262569Simp regulator-1p1@110 { 538262569Simp compatible = "fsl,anatop-regulator"; 539262569Simp regulator-name = "vdd1p1"; 540262569Simp regulator-min-microvolt = <800000>; 541262569Simp regulator-max-microvolt = <1375000>; 542262569Simp regulator-always-on; 543262569Simp anatop-reg-offset = <0x110>; 544262569Simp anatop-vol-bit-shift = <8>; 545262569Simp anatop-vol-bit-width = <5>; 546262569Simp anatop-min-bit-val = <4>; 547262569Simp anatop-min-voltage = <800000>; 548262569Simp anatop-max-voltage = <1375000>; 549262569Simp }; 550262569Simp 551262569Simp regulator-3p0@120 { 552262569Simp compatible = "fsl,anatop-regulator"; 553262569Simp regulator-name = "vdd3p0"; 554262569Simp regulator-min-microvolt = <2800000>; 555262569Simp regulator-max-microvolt = <3150000>; 556262569Simp regulator-always-on; 557262569Simp anatop-reg-offset = <0x120>; 558262569Simp anatop-vol-bit-shift = <8>; 559262569Simp anatop-vol-bit-width = <5>; 560262569Simp anatop-min-bit-val = <0>; 561262569Simp anatop-min-voltage = <2625000>; 562262569Simp anatop-max-voltage = <3400000>; 563262569Simp }; 564262569Simp 565262569Simp regulator-2p5@130 { 566262569Simp compatible = "fsl,anatop-regulator"; 567262569Simp regulator-name = "vdd2p5"; 568262569Simp regulator-min-microvolt = <2000000>; 569262569Simp regulator-max-microvolt = <2750000>; 570262569Simp regulator-always-on; 571262569Simp anatop-reg-offset = <0x130>; 572262569Simp anatop-vol-bit-shift = <8>; 573262569Simp anatop-vol-bit-width = <5>; 574262569Simp anatop-min-bit-val = <0>; 575262569Simp anatop-min-voltage = <2000000>; 576262569Simp anatop-max-voltage = <2750000>; 577262569Simp }; 578262569Simp 579262569Simp reg_arm: regulator-vddcore@140 { 580262569Simp compatible = "fsl,anatop-regulator"; 581270864Simp regulator-name = "vddarm"; 582262569Simp regulator-min-microvolt = <725000>; 583262569Simp regulator-max-microvolt = <1450000>; 584262569Simp regulator-always-on; 585262569Simp anatop-reg-offset = <0x140>; 586262569Simp anatop-vol-bit-shift = <0>; 587262569Simp anatop-vol-bit-width = <5>; 588262569Simp anatop-delay-reg-offset = <0x170>; 589262569Simp anatop-delay-bit-shift = <24>; 590262569Simp anatop-delay-bit-width = <2>; 591262569Simp anatop-min-bit-val = <1>; 592262569Simp anatop-min-voltage = <725000>; 593262569Simp anatop-max-voltage = <1450000>; 594262569Simp }; 595262569Simp 596262569Simp reg_pu: regulator-vddpu@140 { 597262569Simp compatible = "fsl,anatop-regulator"; 598262569Simp regulator-name = "vddpu"; 599262569Simp regulator-min-microvolt = <725000>; 600262569Simp regulator-max-microvolt = <1450000>; 601262569Simp regulator-always-on; 602262569Simp anatop-reg-offset = <0x140>; 603262569Simp anatop-vol-bit-shift = <9>; 604262569Simp anatop-vol-bit-width = <5>; 605262569Simp anatop-delay-reg-offset = <0x170>; 606262569Simp anatop-delay-bit-shift = <26>; 607262569Simp anatop-delay-bit-width = <2>; 608262569Simp anatop-min-bit-val = <1>; 609262569Simp anatop-min-voltage = <725000>; 610262569Simp anatop-max-voltage = <1450000>; 611262569Simp }; 612262569Simp 613262569Simp reg_soc: regulator-vddsoc@140 { 614262569Simp compatible = "fsl,anatop-regulator"; 615262569Simp regulator-name = "vddsoc"; 616262569Simp regulator-min-microvolt = <725000>; 617262569Simp regulator-max-microvolt = <1450000>; 618262569Simp regulator-always-on; 619262569Simp anatop-reg-offset = <0x140>; 620262569Simp anatop-vol-bit-shift = <18>; 621262569Simp anatop-vol-bit-width = <5>; 622262569Simp anatop-delay-reg-offset = <0x170>; 623262569Simp anatop-delay-bit-shift = <28>; 624262569Simp anatop-delay-bit-width = <2>; 625262569Simp anatop-min-bit-val = <1>; 626262569Simp anatop-min-voltage = <725000>; 627262569Simp anatop-max-voltage = <1450000>; 628262569Simp }; 629262569Simp }; 630262569Simp 631262569Simp tempmon: tempmon { 632262569Simp compatible = "fsl,imx6q-tempmon"; 633270864Simp interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>; 634262569Simp fsl,tempmon = <&anatop>; 635262569Simp fsl,tempmon-data = <&ocotp>; 636270864Simp clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>; 637262569Simp }; 638262569Simp 639262569Simp usbphy1: usbphy@020c9000 { 640262569Simp compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; 641262569Simp reg = <0x020c9000 0x1000>; 642270864Simp interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>; 643270864Simp clocks = <&clks IMX6QDL_CLK_USBPHY1>; 644270864Simp fsl,anatop = <&anatop>; 645262569Simp }; 646262569Simp 647262569Simp usbphy2: usbphy@020ca000 { 648262569Simp compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; 649262569Simp reg = <0x020ca000 0x1000>; 650270864Simp interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>; 651270864Simp clocks = <&clks IMX6QDL_CLK_USBPHY2>; 652270864Simp fsl,anatop = <&anatop>; 653262569Simp }; 654262569Simp 655262569Simp snvs@020cc000 { 656262569Simp compatible = "fsl,sec-v4.0-mon", "simple-bus"; 657262569Simp #address-cells = <1>; 658262569Simp #size-cells = <1>; 659262569Simp ranges = <0 0x020cc000 0x4000>; 660262569Simp 661262569Simp snvs-rtc-lp@34 { 662262569Simp compatible = "fsl,sec-v4.0-mon-rtc-lp"; 663262569Simp reg = <0x34 0x58>; 664270864Simp interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>, 665270864Simp <0 20 IRQ_TYPE_LEVEL_HIGH>; 666262569Simp }; 667284090Sian 668284090Sian snvs_poweroff: snvs-poweroff@38 { 669284090Sian compatible = "fsl,sec-v4.0-poweroff"; 670284090Sian reg = <0x38 0x4>; 671284090Sian status = "disabled"; 672284090Sian }; 673262569Simp }; 674262569Simp 675262569Simp epit1: epit@020d0000 { /* EPIT1 */ 676262569Simp reg = <0x020d0000 0x4000>; 677270864Simp interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; 678262569Simp }; 679262569Simp 680262569Simp epit2: epit@020d4000 { /* EPIT2 */ 681262569Simp reg = <0x020d4000 0x4000>; 682270864Simp interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; 683262569Simp }; 684262569Simp 685262569Simp src: src@020d8000 { 686262569Simp compatible = "fsl,imx6q-src", "fsl,imx51-src"; 687262569Simp reg = <0x020d8000 0x4000>; 688270864Simp interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>, 689270864Simp <0 96 IRQ_TYPE_LEVEL_HIGH>; 690262569Simp #reset-cells = <1>; 691262569Simp }; 692262569Simp 693262569Simp gpc: gpc@020dc000 { 694262569Simp compatible = "fsl,imx6q-gpc"; 695262569Simp reg = <0x020dc000 0x4000>; 696270864Simp interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>, 697270864Simp <0 90 IRQ_TYPE_LEVEL_HIGH>; 698262569Simp }; 699262569Simp 700262569Simp gpr: iomuxc-gpr@020e0000 { 701262569Simp compatible = "fsl,imx6q-iomuxc-gpr", "syscon"; 702262569Simp reg = <0x020e0000 0x38>; 703262569Simp }; 704262569Simp 705262569Simp iomuxc: iomuxc@020e0000 { 706262569Simp compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc"; 707262569Simp reg = <0x020e0000 0x4000>; 708270864Simp }; 709262569Simp 710270864Simp ldb: ldb@020e0008 { 711270864Simp #address-cells = <1>; 712270864Simp #size-cells = <0>; 713270864Simp compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb"; 714270864Simp gpr = <&gpr>; 715270864Simp status = "disabled"; 716262569Simp 717270864Simp lvds-channel@0 { 718270864Simp #address-cells = <1>; 719270864Simp #size-cells = <0>; 720270864Simp reg = <0>; 721270864Simp status = "disabled"; 722262569Simp 723270864Simp port@0 { 724270864Simp reg = <0>; 725262569Simp 726270864Simp lvds0_mux_0: endpoint { 727270864Simp remote-endpoint = <&ipu1_di0_lvds0>; 728270864Simp }; 729262569Simp }; 730262569Simp 731270864Simp port@1 { 732270864Simp reg = <1>; 733262569Simp 734270864Simp lvds0_mux_1: endpoint { 735270864Simp remote-endpoint = <&ipu1_di1_lvds0>; 736270864Simp }; 737262569Simp }; 738262569Simp }; 739262569Simp 740270864Simp lvds-channel@1 { 741270864Simp #address-cells = <1>; 742270864Simp #size-cells = <0>; 743270864Simp reg = <1>; 744270864Simp status = "disabled"; 745262569Simp 746270864Simp port@0 { 747270864Simp reg = <0>; 748262569Simp 749270864Simp lvds1_mux_0: endpoint { 750270864Simp remote-endpoint = <&ipu1_di0_lvds1>; 751270864Simp }; 752262569Simp }; 753262569Simp 754270864Simp port@1 { 755270864Simp reg = <1>; 756262569Simp 757270864Simp lvds1_mux_1: endpoint { 758270864Simp remote-endpoint = <&ipu1_di1_lvds1>; 759270864Simp }; 760262569Simp }; 761262569Simp }; 762262569Simp }; 763262569Simp 764270864Simp hdmi: hdmi@0120000 { 765262569Simp #address-cells = <1>; 766262569Simp #size-cells = <0>; 767270864Simp reg = <0x00120000 0x9000>; 768270864Simp interrupts = <0 115 0x04>; 769262569Simp gpr = <&gpr>; 770270864Simp clocks = <&clks IMX6QDL_CLK_HDMI_IAHB>, 771270864Simp <&clks IMX6QDL_CLK_HDMI_ISFR>; 772270864Simp clock-names = "iahb", "isfr"; 773262569Simp status = "disabled"; 774262569Simp 775270864Simp port@0 { 776262569Simp reg = <0>; 777270864Simp 778270864Simp hdmi_mux_0: endpoint { 779270864Simp remote-endpoint = <&ipu1_di0_hdmi>; 780270864Simp }; 781262569Simp }; 782262569Simp 783270864Simp port@1 { 784262569Simp reg = <1>; 785270864Simp 786270864Simp hdmi_mux_1: endpoint { 787270864Simp remote-endpoint = <&ipu1_di1_hdmi>; 788270864Simp }; 789262569Simp }; 790262569Simp }; 791262569Simp 792262569Simp dcic1: dcic@020e4000 { 793262569Simp reg = <0x020e4000 0x4000>; 794270864Simp interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>; 795262569Simp }; 796262569Simp 797262569Simp dcic2: dcic@020e8000 { 798262569Simp reg = <0x020e8000 0x4000>; 799270864Simp interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>; 800262569Simp }; 801262569Simp 802262569Simp sdma: sdma@020ec000 { 803262569Simp compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; 804262569Simp reg = <0x020ec000 0x4000>; 805270864Simp interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>; 806270864Simp clocks = <&clks IMX6QDL_CLK_SDMA>, 807270864Simp <&clks IMX6QDL_CLK_SDMA>; 808262569Simp clock-names = "ipg", "ahb"; 809262569Simp #dma-cells = <3>; 810262569Simp fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; 811262569Simp }; 812262569Simp }; 813262569Simp 814262569Simp aips-bus@02100000 { /* AIPS2 */ 815262569Simp compatible = "fsl,aips-bus", "simple-bus"; 816262569Simp #address-cells = <1>; 817262569Simp #size-cells = <1>; 818262569Simp reg = <0x02100000 0x100000>; 819262569Simp ranges; 820262569Simp 821262569Simp caam@02100000 { 822262569Simp reg = <0x02100000 0x40000>; 823270864Simp interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>, 824270864Simp <0 106 IRQ_TYPE_LEVEL_HIGH>; 825262569Simp }; 826262569Simp 827262569Simp aipstz@0217c000 { /* AIPSTZ2 */ 828262569Simp reg = <0x0217c000 0x4000>; 829262569Simp }; 830262569Simp 831262569Simp usbotg: usb@02184000 { 832262569Simp compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 833262569Simp reg = <0x02184000 0x200>; 834270864Simp interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>; 835270864Simp clocks = <&clks IMX6QDL_CLK_USBOH3>; 836262569Simp fsl,usbphy = <&usbphy1>; 837262569Simp fsl,usbmisc = <&usbmisc 0>; 838262569Simp status = "disabled"; 839262569Simp }; 840262569Simp 841262569Simp usbh1: usb@02184200 { 842262569Simp compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 843262569Simp reg = <0x02184200 0x200>; 844270864Simp interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>; 845270864Simp clocks = <&clks IMX6QDL_CLK_USBOH3>; 846262569Simp fsl,usbphy = <&usbphy2>; 847262569Simp fsl,usbmisc = <&usbmisc 1>; 848262569Simp status = "disabled"; 849262569Simp }; 850262569Simp 851262569Simp usbh2: usb@02184400 { 852262569Simp compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 853262569Simp reg = <0x02184400 0x200>; 854270864Simp interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; 855270864Simp clocks = <&clks IMX6QDL_CLK_USBOH3>; 856262569Simp fsl,usbmisc = <&usbmisc 2>; 857262569Simp status = "disabled"; 858262569Simp }; 859262569Simp 860262569Simp usbh3: usb@02184600 { 861262569Simp compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 862262569Simp reg = <0x02184600 0x200>; 863270864Simp interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>; 864270864Simp clocks = <&clks IMX6QDL_CLK_USBOH3>; 865262569Simp fsl,usbmisc = <&usbmisc 3>; 866262569Simp status = "disabled"; 867262569Simp }; 868262569Simp 869262569Simp usbmisc: usbmisc@02184800 { 870262569Simp #index-cells = <1>; 871262569Simp compatible = "fsl,imx6q-usbmisc"; 872262569Simp reg = <0x02184800 0x200>; 873270864Simp clocks = <&clks IMX6QDL_CLK_USBOH3>; 874262569Simp }; 875262569Simp 876262569Simp fec: ethernet@02188000 { 877262569Simp compatible = "fsl,imx6q-fec"; 878262569Simp reg = <0x02188000 0x4000>; 879270864Simp interrupts-extended = 880270864Simp <&intc 0 118 IRQ_TYPE_LEVEL_HIGH>, 881270864Simp <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 882270864Simp clocks = <&clks IMX6QDL_CLK_ENET>, 883270864Simp <&clks IMX6QDL_CLK_ENET>, 884270864Simp <&clks IMX6QDL_CLK_ENET_REF>; 885262569Simp clock-names = "ipg", "ahb", "ptp"; 886262569Simp status = "disabled"; 887262569Simp }; 888262569Simp 889262569Simp mlb@0218c000 { 890262569Simp reg = <0x0218c000 0x4000>; 891270864Simp interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>, 892270864Simp <0 117 IRQ_TYPE_LEVEL_HIGH>, 893270864Simp <0 126 IRQ_TYPE_LEVEL_HIGH>; 894262569Simp }; 895262569Simp 896262569Simp usdhc1: usdhc@02190000 { 897262569Simp compatible = "fsl,imx6q-usdhc"; 898262569Simp reg = <0x02190000 0x4000>; 899270864Simp interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; 900270864Simp clocks = <&clks IMX6QDL_CLK_USDHC1>, 901270864Simp <&clks IMX6QDL_CLK_USDHC1>, 902270864Simp <&clks IMX6QDL_CLK_USDHC1>; 903262569Simp clock-names = "ipg", "ahb", "per"; 904262569Simp bus-width = <4>; 905262569Simp status = "disabled"; 906262569Simp }; 907262569Simp 908262569Simp usdhc2: usdhc@02194000 { 909262569Simp compatible = "fsl,imx6q-usdhc"; 910262569Simp reg = <0x02194000 0x4000>; 911270864Simp interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; 912270864Simp clocks = <&clks IMX6QDL_CLK_USDHC2>, 913270864Simp <&clks IMX6QDL_CLK_USDHC2>, 914270864Simp <&clks IMX6QDL_CLK_USDHC2>; 915262569Simp clock-names = "ipg", "ahb", "per"; 916262569Simp bus-width = <4>; 917262569Simp status = "disabled"; 918262569Simp }; 919262569Simp 920262569Simp usdhc3: usdhc@02198000 { 921262569Simp compatible = "fsl,imx6q-usdhc"; 922262569Simp reg = <0x02198000 0x4000>; 923270864Simp interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; 924270864Simp clocks = <&clks IMX6QDL_CLK_USDHC3>, 925270864Simp <&clks IMX6QDL_CLK_USDHC3>, 926270864Simp <&clks IMX6QDL_CLK_USDHC3>; 927262569Simp clock-names = "ipg", "ahb", "per"; 928262569Simp bus-width = <4>; 929262569Simp status = "disabled"; 930262569Simp }; 931262569Simp 932262569Simp usdhc4: usdhc@0219c000 { 933262569Simp compatible = "fsl,imx6q-usdhc"; 934262569Simp reg = <0x0219c000 0x4000>; 935270864Simp interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>; 936270864Simp clocks = <&clks IMX6QDL_CLK_USDHC4>, 937270864Simp <&clks IMX6QDL_CLK_USDHC4>, 938270864Simp <&clks IMX6QDL_CLK_USDHC4>; 939262569Simp clock-names = "ipg", "ahb", "per"; 940262569Simp bus-width = <4>; 941262569Simp status = "disabled"; 942262569Simp }; 943262569Simp 944262569Simp i2c1: i2c@021a0000 { 945262569Simp #address-cells = <1>; 946262569Simp #size-cells = <0>; 947262569Simp compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; 948262569Simp reg = <0x021a0000 0x4000>; 949270864Simp interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>; 950270864Simp clocks = <&clks IMX6QDL_CLK_I2C1>; 951262569Simp status = "disabled"; 952262569Simp }; 953262569Simp 954262569Simp i2c2: i2c@021a4000 { 955262569Simp #address-cells = <1>; 956262569Simp #size-cells = <0>; 957262569Simp compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; 958262569Simp reg = <0x021a4000 0x4000>; 959270864Simp interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>; 960270864Simp clocks = <&clks IMX6QDL_CLK_I2C2>; 961262569Simp status = "disabled"; 962262569Simp }; 963262569Simp 964262569Simp i2c3: i2c@021a8000 { 965262569Simp #address-cells = <1>; 966262569Simp #size-cells = <0>; 967262569Simp compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; 968262569Simp reg = <0x021a8000 0x4000>; 969270864Simp interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>; 970270864Simp clocks = <&clks IMX6QDL_CLK_I2C3>; 971262569Simp status = "disabled"; 972262569Simp }; 973262569Simp 974262569Simp romcp@021ac000 { 975262569Simp reg = <0x021ac000 0x4000>; 976262569Simp }; 977262569Simp 978262569Simp mmdc0: mmdc@021b0000 { /* MMDC0 */ 979262569Simp compatible = "fsl,imx6q-mmdc"; 980262569Simp reg = <0x021b0000 0x4000>; 981262569Simp }; 982262569Simp 983262569Simp mmdc1: mmdc@021b4000 { /* MMDC1 */ 984262569Simp reg = <0x021b4000 0x4000>; 985262569Simp }; 986262569Simp 987262569Simp weim: weim@021b8000 { 988262569Simp compatible = "fsl,imx6q-weim"; 989262569Simp reg = <0x021b8000 0x4000>; 990270864Simp interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>; 991270864Simp clocks = <&clks IMX6QDL_CLK_EIM_SLOW>; 992262569Simp }; 993262569Simp 994262569Simp ocotp: ocotp@021bc000 { 995262569Simp compatible = "fsl,imx6q-ocotp", "syscon"; 996262569Simp reg = <0x021bc000 0x4000>; 997262569Simp }; 998262569Simp 999262569Simp tzasc@021d0000 { /* TZASC1 */ 1000262569Simp reg = <0x021d0000 0x4000>; 1001270864Simp interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; 1002262569Simp }; 1003262569Simp 1004262569Simp tzasc@021d4000 { /* TZASC2 */ 1005262569Simp reg = <0x021d4000 0x4000>; 1006270864Simp interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; 1007262569Simp }; 1008262569Simp 1009262569Simp audmux: audmux@021d8000 { 1010262569Simp compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux"; 1011262569Simp reg = <0x021d8000 0x4000>; 1012262569Simp status = "disabled"; 1013262569Simp }; 1014262569Simp 1015270864Simp mipi_csi: mipi@021dc000 { 1016262569Simp reg = <0x021dc000 0x4000>; 1017262569Simp }; 1018262569Simp 1019270864Simp mipi_dsi: mipi@021e0000 { 1020270864Simp #address-cells = <1>; 1021270864Simp #size-cells = <0>; 1022262569Simp reg = <0x021e0000 0x4000>; 1023270864Simp status = "disabled"; 1024270864Simp 1025270864Simp port@0 { 1026270864Simp reg = <0>; 1027270864Simp 1028270864Simp mipi_mux_0: endpoint { 1029270864Simp remote-endpoint = <&ipu1_di0_mipi>; 1030270864Simp }; 1031270864Simp }; 1032270864Simp 1033270864Simp port@1 { 1034270864Simp reg = <1>; 1035270864Simp 1036270864Simp mipi_mux_1: endpoint { 1037270864Simp remote-endpoint = <&ipu1_di1_mipi>; 1038270864Simp }; 1039270864Simp }; 1040262569Simp }; 1041262569Simp 1042262569Simp vdoa@021e4000 { 1043262569Simp reg = <0x021e4000 0x4000>; 1044270864Simp interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>; 1045262569Simp }; 1046262569Simp 1047262569Simp uart2: serial@021e8000 { 1048262569Simp compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 1049262569Simp reg = <0x021e8000 0x4000>; 1050270864Simp interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>; 1051270864Simp clocks = <&clks IMX6QDL_CLK_UART_IPG>, 1052270864Simp <&clks IMX6QDL_CLK_UART_SERIAL>; 1053262569Simp clock-names = "ipg", "per"; 1054262569Simp dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; 1055262569Simp dma-names = "rx", "tx"; 1056262569Simp status = "disabled"; 1057262569Simp }; 1058262569Simp 1059262569Simp uart3: serial@021ec000 { 1060262569Simp compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 1061262569Simp reg = <0x021ec000 0x4000>; 1062270864Simp interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>; 1063270864Simp clocks = <&clks IMX6QDL_CLK_UART_IPG>, 1064270864Simp <&clks IMX6QDL_CLK_UART_SERIAL>; 1065262569Simp clock-names = "ipg", "per"; 1066262569Simp dmas = <&sdma 29 4 0>, <&sdma 30 4 0>; 1067262569Simp dma-names = "rx", "tx"; 1068262569Simp status = "disabled"; 1069262569Simp }; 1070262569Simp 1071262569Simp uart4: serial@021f0000 { 1072262569Simp compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 1073262569Simp reg = <0x021f0000 0x4000>; 1074270864Simp interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; 1075270864Simp clocks = <&clks IMX6QDL_CLK_UART_IPG>, 1076270864Simp <&clks IMX6QDL_CLK_UART_SERIAL>; 1077262569Simp clock-names = "ipg", "per"; 1078262569Simp dmas = <&sdma 31 4 0>, <&sdma 32 4 0>; 1079262569Simp dma-names = "rx", "tx"; 1080262569Simp status = "disabled"; 1081262569Simp }; 1082262569Simp 1083262569Simp uart5: serial@021f4000 { 1084262569Simp compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 1085262569Simp reg = <0x021f4000 0x4000>; 1086270864Simp interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>; 1087270864Simp clocks = <&clks IMX6QDL_CLK_UART_IPG>, 1088270864Simp <&clks IMX6QDL_CLK_UART_SERIAL>; 1089262569Simp clock-names = "ipg", "per"; 1090262569Simp dmas = <&sdma 33 4 0>, <&sdma 34 4 0>; 1091262569Simp dma-names = "rx", "tx"; 1092262569Simp status = "disabled"; 1093262569Simp }; 1094262569Simp }; 1095262569Simp 1096262569Simp ipu1: ipu@02400000 { 1097270864Simp #address-cells = <1>; 1098270864Simp #size-cells = <0>; 1099262569Simp compatible = "fsl,imx6q-ipu"; 1100262569Simp reg = <0x02400000 0x400000>; 1101270864Simp interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>, 1102270864Simp <0 5 IRQ_TYPE_LEVEL_HIGH>; 1103270864Simp clocks = <&clks IMX6QDL_CLK_IPU1>, 1104270864Simp <&clks IMX6QDL_CLK_IPU1_DI0>, 1105270864Simp <&clks IMX6QDL_CLK_IPU1_DI1>; 1106262569Simp clock-names = "bus", "di0", "di1"; 1107262569Simp resets = <&src 2>; 1108270864Simp 1109270864Simp ipu1_csi0: port@0 { 1110270864Simp reg = <0>; 1111270864Simp }; 1112270864Simp 1113270864Simp ipu1_csi1: port@1 { 1114270864Simp reg = <1>; 1115270864Simp }; 1116270864Simp 1117270864Simp ipu1_di0: port@2 { 1118270864Simp #address-cells = <1>; 1119270864Simp #size-cells = <0>; 1120270864Simp reg = <2>; 1121270864Simp 1122270864Simp ipu1_di0_disp0: endpoint@0 { 1123270864Simp }; 1124270864Simp 1125270864Simp ipu1_di0_hdmi: endpoint@1 { 1126270864Simp remote-endpoint = <&hdmi_mux_0>; 1127270864Simp }; 1128270864Simp 1129270864Simp ipu1_di0_mipi: endpoint@2 { 1130270864Simp remote-endpoint = <&mipi_mux_0>; 1131270864Simp }; 1132270864Simp 1133270864Simp ipu1_di0_lvds0: endpoint@3 { 1134270864Simp remote-endpoint = <&lvds0_mux_0>; 1135270864Simp }; 1136270864Simp 1137270864Simp ipu1_di0_lvds1: endpoint@4 { 1138270864Simp remote-endpoint = <&lvds1_mux_0>; 1139270864Simp }; 1140270864Simp }; 1141270864Simp 1142270864Simp ipu1_di1: port@3 { 1143270864Simp #address-cells = <1>; 1144270864Simp #size-cells = <0>; 1145270864Simp reg = <3>; 1146270864Simp 1147270864Simp ipu1_di0_disp1: endpoint@0 { 1148270864Simp }; 1149270864Simp 1150270864Simp ipu1_di1_hdmi: endpoint@1 { 1151270864Simp remote-endpoint = <&hdmi_mux_1>; 1152270864Simp }; 1153270864Simp 1154270864Simp ipu1_di1_mipi: endpoint@2 { 1155270864Simp remote-endpoint = <&mipi_mux_1>; 1156270864Simp }; 1157270864Simp 1158270864Simp ipu1_di1_lvds0: endpoint@3 { 1159270864Simp remote-endpoint = <&lvds0_mux_1>; 1160270864Simp }; 1161270864Simp 1162270864Simp ipu1_di1_lvds1: endpoint@4 { 1163270864Simp remote-endpoint = <&lvds1_mux_1>; 1164270864Simp }; 1165270864Simp }; 1166262569Simp }; 1167262569Simp }; 1168262569Simp}; 1169