1262569Simp/* 2262569Simp * Copyright 2013 Freescale Semiconductor, Inc. 3262569Simp * 4262569Simp * Author: Fabio Estevam <fabio.estevam@freescale.com> 5262569Simp * 6262569Simp * This program is free software; you can redistribute it and/or modify 7262569Simp * it under the terms of the GNU General Public License version 2 as 8262569Simp * published by the Free Software Foundation. 9262569Simp * 10262569Simp */ 11262569Simp 12262569Simp/ { 13262569Simp regulators { 14262569Simp compatible = "simple-bus"; 15270864Simp #address-cells = <1>; 16270864Simp #size-cells = <0>; 17262569Simp 18270864Simp reg_2p5v: regulator@0 { 19262569Simp compatible = "regulator-fixed"; 20270864Simp reg = <0>; 21262569Simp regulator-name = "2P5V"; 22262569Simp regulator-min-microvolt = <2500000>; 23262569Simp regulator-max-microvolt = <2500000>; 24262569Simp regulator-always-on; 25262569Simp }; 26262569Simp 27270864Simp reg_3p3v: regulator@1 { 28262569Simp compatible = "regulator-fixed"; 29270864Simp reg = <1>; 30262569Simp regulator-name = "3P3V"; 31262569Simp regulator-min-microvolt = <3300000>; 32262569Simp regulator-max-microvolt = <3300000>; 33262569Simp regulator-always-on; 34262569Simp }; 35262569Simp }; 36262569Simp 37262569Simp sound { 38262569Simp compatible = "fsl,imx6-wandboard-sgtl5000", 39262569Simp "fsl,imx-audio-sgtl5000"; 40262569Simp model = "imx6-wandboard-sgtl5000"; 41262569Simp ssi-controller = <&ssi1>; 42262569Simp audio-codec = <&codec>; 43262569Simp audio-routing = 44262569Simp "MIC_IN", "Mic Jack", 45262569Simp "Mic Jack", "Mic Bias", 46262569Simp "Headphone Jack", "HP_OUT"; 47262569Simp mux-int-port = <1>; 48262569Simp mux-ext-port = <3>; 49262569Simp }; 50262569Simp 51262569Simp sound-spdif { 52262569Simp compatible = "fsl,imx-audio-spdif"; 53262569Simp model = "imx-spdif"; 54262569Simp spdif-controller = <&spdif>; 55262569Simp spdif-out; 56262569Simp }; 57262569Simp}; 58262569Simp 59262569Simp&audmux { 60262569Simp pinctrl-names = "default"; 61270864Simp pinctrl-0 = <&pinctrl_audmux>; 62262569Simp status = "okay"; 63262569Simp}; 64262569Simp 65270864Simp&hdmi { 66270864Simp ddc-i2c-bus = <&i2c1>; 67270864Simp status = "okay"; 68270864Simp}; 69270864Simp 70270864Simp&i2c1 { 71270864Simp clock-frequency = <100000>; 72270864Simp pinctrl-names = "default"; 73270864Simp pinctrl-0 = <&pinctrl_i2c1>; 74270864Simp status = "okay"; 75270864Simp}; 76270864Simp 77262569Simp&i2c2 { 78262569Simp clock-frequency = <100000>; 79262569Simp pinctrl-names = "default"; 80270864Simp pinctrl-0 = <&pinctrl_i2c2>; 81262569Simp status = "okay"; 82262569Simp 83262569Simp codec: sgtl5000@0a { 84262569Simp compatible = "fsl,sgtl5000"; 85262569Simp reg = <0x0a>; 86262569Simp clocks = <&clks 201>; 87262569Simp VDDA-supply = <®_2p5v>; 88262569Simp VDDIO-supply = <®_3p3v>; 89262569Simp }; 90262569Simp}; 91262569Simp 92262569Simp&iomuxc { 93262569Simp pinctrl-names = "default"; 94262569Simp 95270864Simp imx6qdl-wandboard { 96270864Simp 97270864Simp pinctrl_audmux: audmuxgrp { 98262569Simp fsl,pins = < 99270864Simp MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 100270864Simp MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 101270864Simp MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 102270864Simp MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 103262569Simp >; 104262569Simp }; 105270864Simp 106270864Simp pinctrl_enet: enetgrp { 107270864Simp fsl,pins = < 108270864Simp MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 109270864Simp MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 110270864Simp MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 111270864Simp MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 112270864Simp MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 113270864Simp MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 114270864Simp MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 115270864Simp MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 116270864Simp MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 117270864Simp MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 118270864Simp MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 119270864Simp MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 120270864Simp MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 121270864Simp MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 122270864Simp MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 123270864Simp MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 124270864Simp MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 125270864Simp >; 126270864Simp }; 127270864Simp 128270864Simp pinctrl_i2c1: i2c1grp { 129270864Simp fsl,pins = < 130270864Simp MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 131270864Simp MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 132270864Simp >; 133270864Simp }; 134270864Simp 135270864Simp pinctrl_i2c2: i2c2grp { 136270864Simp fsl,pins = < 137270864Simp MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 138270864Simp MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 139270864Simp >; 140270864Simp }; 141270864Simp 142270864Simp pinctrl_spdif: spdifgrp { 143270864Simp fsl,pins = < 144270864Simp MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0 145270864Simp >; 146270864Simp }; 147270864Simp 148270864Simp pinctrl_uart1: uart1grp { 149270864Simp fsl,pins = < 150270864Simp MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 151270864Simp MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 152270864Simp >; 153270864Simp }; 154270864Simp 155270864Simp pinctrl_uart3: uart3grp { 156270864Simp fsl,pins = < 157270864Simp MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 158270864Simp MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 159270864Simp MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 160270864Simp MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 161270864Simp >; 162270864Simp }; 163270864Simp 164270864Simp pinctrl_usbotg: usbotggrp { 165270864Simp fsl,pins = < 166270864Simp MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 167270864Simp >; 168270864Simp }; 169270864Simp 170270864Simp pinctrl_usdhc1: usdhc1grp { 171270864Simp fsl,pins = < 172270864Simp MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059 173270864Simp MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059 174270864Simp MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059 175270864Simp MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059 176270864Simp MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059 177270864Simp MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059 178270864Simp >; 179270864Simp }; 180270864Simp 181270864Simp pinctrl_usdhc2: usdhc2grp { 182270864Simp fsl,pins = < 183270864Simp MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 184270864Simp MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 185270864Simp MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 186270864Simp MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 187270864Simp MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 188270864Simp MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 189270864Simp >; 190270864Simp }; 191270864Simp 192270864Simp pinctrl_usdhc3: usdhc3grp { 193270864Simp fsl,pins = < 194270864Simp MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 195270864Simp MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 196270864Simp MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 197270864Simp MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 198270864Simp MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 199270864Simp MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 200270864Simp >; 201270864Simp }; 202262569Simp }; 203262569Simp}; 204262569Simp 205262569Simp&fec { 206262569Simp pinctrl-names = "default"; 207270864Simp pinctrl-0 = <&pinctrl_enet>; 208262569Simp phy-mode = "rgmii"; 209262569Simp phy-reset-gpios = <&gpio3 29 0>; 210270864Simp interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 211270864Simp <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 212262569Simp status = "okay"; 213262569Simp}; 214262569Simp 215262569Simp&spdif { 216262569Simp pinctrl-names = "default"; 217270864Simp pinctrl-0 = <&pinctrl_spdif>; 218262569Simp status = "okay"; 219262569Simp}; 220262569Simp 221262569Simp&ssi1 { 222262569Simp status = "okay"; 223262569Simp}; 224262569Simp 225262569Simp&uart1 { 226262569Simp pinctrl-names = "default"; 227270864Simp pinctrl-0 = <&pinctrl_uart1>; 228262569Simp status = "okay"; 229262569Simp}; 230262569Simp 231262569Simp&uart3 { 232262569Simp pinctrl-names = "default"; 233270864Simp pinctrl-0 = <&pinctrl_uart3>; 234262569Simp fsl,uart-has-rtscts; 235262569Simp status = "okay"; 236262569Simp}; 237262569Simp 238262569Simp&usbh1 { 239262569Simp status = "okay"; 240262569Simp}; 241262569Simp 242262569Simp&usbotg { 243262569Simp pinctrl-names = "default"; 244270864Simp pinctrl-0 = <&pinctrl_usbotg>; 245262569Simp disable-over-current; 246262569Simp dr_mode = "peripheral"; 247262569Simp status = "okay"; 248262569Simp}; 249262569Simp 250262569Simp&usdhc1 { 251262569Simp pinctrl-names = "default"; 252270864Simp pinctrl-0 = <&pinctrl_usdhc1>; 253262569Simp cd-gpios = <&gpio1 2 0>; 254262569Simp status = "okay"; 255262569Simp}; 256262569Simp 257262569Simp&usdhc3 { 258262569Simp pinctrl-names = "default"; 259270864Simp pinctrl-0 = <&pinctrl_usdhc3>; 260262569Simp cd-gpios = <&gpio3 9 0>; 261262569Simp status = "okay"; 262262569Simp}; 263