imx6q-udoo.dts revision 270864 
1/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * Author: Fabio Estevam <fabio.estevam@freescale.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12/dts-v1/;
13#include "imx6q.dtsi"
14
15/ {
16	model = "Udoo i.MX6 Quad Board";
17	compatible = "udoo,imx6q-udoo", "fsl,imx6q";
18
19	chosen {
20		stdout-path = &uart2;
21	};
22
23	memory {
24		reg = <0x10000000 0x40000000>;
25	};
26
27	regulators {
28		compatible = "simple-bus";
29		#address-cells = <1>;
30		#size-cells = <0>;
31
32		reg_usb_h1_vbus: regulator@0 {
33			compatible = "regulator-fixed";
34			reg = <0>;
35			regulator-name = "usb_h1_vbus";
36			regulator-min-microvolt = <5000000>;
37			regulator-max-microvolt = <5000000>;
38			enable-active-high;
39			startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
40			gpio = <&gpio7 12 0>;
41		};
42	};
43};
44
45&fec {
46	pinctrl-names = "default";
47	pinctrl-0 = <&pinctrl_enet>;
48	phy-mode = "rgmii";
49	status = "okay";
50};
51
52&hdmi {
53	ddc-i2c-bus = <&i2c2>;
54	status = "okay";
55};
56
57&i2c2 {
58	clock-frequency = <100000>;
59	pinctrl-names = "default";
60	pinctrl-0 = <&pinctrl_i2c2>;
61	status = "okay";
62};
63
64&iomuxc {
65	imx6q-udoo {
66		pinctrl_enet: enetgrp {
67			fsl,pins = <
68				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
69				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
70				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
71				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
72				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
73				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
74				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
75				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
76				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
77				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
78				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
79				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
80				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
81				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
82				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
83				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
84			>;
85		};
86
87		pinctrl_i2c2: i2c2grp {
88			fsl,pins = <
89				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
90				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
91			>;
92		};
93
94		pinctrl_uart2: uart2grp {
95			fsl,pins = <
96				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
97				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
98			>;
99		};
100
101		pinctrl_usbh: usbhgrp {
102			fsl,pins = <
103				MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
104				MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
105			>;
106		};
107
108		pinctrl_usdhc3: usdhc3grp {
109			fsl,pins = <
110				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
111				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
112				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
113				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
114				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
115				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
116			>;
117		};
118	};
119};
120
121&sata {
122	status = "okay";
123};
124
125&uart2 {
126	pinctrl-names = "default";
127	pinctrl-0 = <&pinctrl_uart2>;
128	status = "okay";
129};
130
131&usbh1 {
132	pinctrl-names = "default";
133	pinctrl-0 = <&pinctrl_usbh>;
134	vbus-supply = <&reg_usb_h1_vbus>;
135	clocks = <&clks 201>;
136	status = "okay";
137};
138
139&usdhc3 {
140	pinctrl-names = "default";
141	pinctrl-0 = <&pinctrl_usdhc3>;
142	non-removable;
143	status = "okay";
144};
145